michele
342792df2d
ERROR stays only for RULE+MANDATORY. Hierarchy walks component→pin→net→block. Derating is PASS/MARGIN/RISK from Vop/Vrated. Timing and PI skip without numbers. ESD and HS return path are REVIEW, not RULE ERROR.
98 lines
4.5 KiB
Markdown
98 lines
4.5 KiB
Markdown
# Piano — PCB review (esame geometria + stesso motore finding)
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Specifica finding: [`motore-finding.md`](motore-finding.md). Schema e PCB usano **lo stesso oggetto**. Questo file è il job layout.
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**Non** è un auto-placer. PCB-only = geometria (mm, width, copper, via, pour, return stitch, pad-net). Validazione netlist / mux / LED resta schema.
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Contratto:
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| | Schema | PCB review | Placement F2 (fuori) |
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| --- | --- | --- | --- |
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| Promessa | Netlist vs libreria datasheet | Layout vs libreria + geometria | xy nuovi |
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| Motore finding | FACT / REQUIREMENT / INFERENCE | uguale | — |
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| Deep exam PDF | **Una volta** → `library/extracted` | Consuma cache, `pdf_path=None` | — |
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| Job | `MODE=run` | `MODE=pcb` | `MODE=placement` |
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| Output | `report.json` | `pcb_report.json` (merge in GET /report) | pack json |
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Senza `.kicad_pcb` il progetto è schema-completo. Il report schema non si riempie di PE-PLC/PE-SI.
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---
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## Motore (schema + PCB)
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Vedi `motore-finding.md`. Invarianti:
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1. Non mescolare FACT / REQUIREMENT / INFERENCE.
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2. Provenance **MANDATORY | RECOMMENDED | TYPICAL | EXAMPLE** nel rule DB. **Recommended ≠ ERROR**.
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3. Classi **RULE | RISK | REVIEW | INFO**. LLM = REVIEW, mai RULE.
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4. `decisions.json` + fingerprint: rescan non ri-naga (PSEL low intenzionale, ecc.).
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5. `status`, `confidence`, `evidence_status` indipendenti.
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6. Evidenza insufficiente → lo si dice, niente 1 oz / 10 °C / 50 Ω / IEC inventati.
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7. Oggetto riproducibile: facts, requirement, source, calculation, assumptions, confidence, severity, action.
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UI report (schema e layout): stessa `FindingCard` — Fact / Requirement / Inference, badge classe e provenance.
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Libreria: `library/extracted/{safe_mpn}.json` ∪ extracted/ progetto. PDF in `library/datasheets/blobs/`.
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---
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## Job PCB (invariato nello stack)
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```
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┌─ MODE=run → status → report.json
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Project files ───┼─ MODE=placement → placement_status → placement_plan.json
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└─ MODE=pcb → pcb_status → pcb_report.json
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```
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Stages: `ensure_graph` → `parse_pcb` → `classify` → `inventory` → `checks` → `ai_review` (layout vs library, no PDF) → `write_report`.
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Mutex vs analisi e vs placement. SSE `pcb_*`. IDs `PCB-{ref}-{001}`. KiCad `/net` vs net schema: **PE-LAY-003** una volta, non per-pad (`kicad_nets_match`).
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### Check PCB (geometria) — gated
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| ID | Gate |
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| --- | --- |
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| PE-LAY-001…003 | pad/ref/hierarchy nets |
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| PE-PLC-001…004 | `layout_rules` numerici |
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| PE-SI-001 | `length_match` mm |
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| PE-PWR-001 | I_load + width; IPC solo con thickness e Tjmax |
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| PE-DRT-001 | Vop e Vrated, Vop > Vr → RULE ERROR |
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| PE-DRT-002 | 0.8 < Vop/Vr ≤ 1 → RISK MARGIN |
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| PE-DRT-003 | Vop/Vr ≤ 0.8 → PASS summary INFO |
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| PE-HIER-001 | pin IC senza net |
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| PE-TIM-001/002 | RC / strap solo con numeri |
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| PE-PI-001/002 | local vs bulk; mm solo da layout_rules |
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| PE-ESD-001 / PE-RET-001 | REVIEW unless mandatory FACT |
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| PE-VIA-001 | via count + I_load (INFO, no tabella inventata) |
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| PE-THM-001 | P=I_load×drop, courtyard senza pour/via |
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| PE-KEL-001 | sense/Kelvin pintable + ≥2 altri sul net |
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| PE-STCH-001 | pour GND + segnale senza via GND nel bbox |
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| Creepage | **skip** senza numero datasheet/IEC |
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| Crystal keepout | PE-PLC-004 se kind=keepout |
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AI PCB: skip IC senza pintable (`run schematic review first`).
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---
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## Fasi
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**A — shipped:** oggetto finding condiviso, clamp provenance/class (**ERROR solo RULE+MANDATORY**), decisions, UI, libreria unica, geometria gated, net-slash, Action on card, geometria in contesto AI.
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**B — questa slice (shipped, gated):**
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| ID | Cosa | Gate |
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| --- | --- | --- |
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| Gerarchia | `hierarchy.json` component→pin→net→block | grafo (+ domains se `classify`) |
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| PE-HIER-001 | pin IC senza net | FACT net='' |
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| PE-DRT-001/002/003 | RISK / MARGIN / PASS | Vop **e** Vrated; niente % dielettrico inventato |
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| PE-TIM-001/002 | RC reset / strap | R, C e t_reset o Vih/Vil numerici |
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| PE-PI-001/002 | local vs bulk, I se noto | cap valorizzati; distanza solo con `max_distance_mm` |
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| PE-ESD-001 | ESD connettore/USB | REVIEW se manca parte ESD |
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| PE-RET-001 | return HS senza via GND | REVIEW, non ERROR |
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**B — ancora aperta:** energy/thermal FEM; SI oltre skew mm; BOM↔PCB↔datasheet completo; SPOF; EMI oltre ESD REVIEW.
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**C — fuori:** auto-place, write-back pcbnew, unire i job, sshd/keys, PinScope identity/fork.
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Deploy: `ssh periscope` + `/root/periscope/scripts/update-periscope.sh`.
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