FPGA-Neural

T

micheleandClaude Sonnet 5 7f9ece12dc docs: real P&R signoff for the result-writeback engine (EXP-0088)

Real in-context P&R confirms the result-writeback engine (EXP-0088)
closes timing with essentially zero cost: WNS=+0.099962ns (vs
EXP-0086's +0.095707ns), WHS=+0.036275ns, 0 failing endpoints. 6642
LUTs (+260 for the new engine), 16 DSP48E1 unchanged. This is now the
current, trustworthy signoff, promoted over EXP-0086/0087's own
pointers in both docs.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01MUG92aM9m68TRc4rG55BcC

2026-09-20 19:27:00 +02:00

benchmark_results

feat: add FPGA-Neural benchmark tooling + same-tier ECP5 P2/P4/P8 results

2026-09-02 19:48:03 +02:00

docs

docs: real P&R signoff for the result-writeback engine (EXP-0088)

2026-09-20 19:27:00 +02:00

hardware

docs: real P&R signoff for the result-writeback engine (EXP-0088)

2026-09-20 19:27:00 +02:00

sim

chore: remove root-level V1 duplicates, superseded by hardware/v1/ freeze