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micheleandClaude Sonnet 5 785e9461a0 docs: ESP32 host firmware specification (docs/FIRMWARE_SPEC.md)

Real, from-source spec for the ESP32-S3 host firmware -- every field
layout, address formula, and timing number is read directly from the
committed RTL (spi_host_bridge_v3.v, neural_director_grouped.v,
result_writeback.v, host_mem_bridge.v, flash_spi_master.v), not
guessed. Covers: physical interfaces, boot/bootstrap (JTAG factory,
Master-SPI autonomous, FLASH_XFER field update), the full management
SPI opcode reference and register map, job submission (including the
critical, real N=16 octet-dispatch requirement -- 8 jobs must share
w_base/n_tiles or the Director's queue stalls permanently with no
in-band recovery), result readback addressing, raw memory access,
config-flash relay with its real 2-dummy-byte timing requirement,
error handling, and honestly disclosed open items (no firmware exists
yet -- this is the specification).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01MUG92aM9m68TRc4rG55BcC

2026-09-22 08:39:29 +02:00

latex

docs: update LaTeX docs for N16 real timing closure + honest ESP32-S3 projection (EXP-0097)

2026-09-22 00:59:46 +02:00

ARCHITECTURE_ANALYSIS.md

docs: reframe primary docs -- N=16 is now the real fabrication target

2026-09-22 08:36:37 +02:00

BOM.md

feat: real DDRManager re-measurement at 32-bit channel + BOM/pinout docs (EXP-0087)

2026-09-20 18:37:41 +02:00

FIRMWARE_SPEC.md

docs: ESP32 host firmware specification (docs/FIRMWARE_SPEC.md)