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micheleandClaude Sonnet 5 d8ccc9d494 docs: datasheet addendum for two-flash programming architecture + FPGA_DATA_READY

Adds a real, dated section to ch.10 (Hardware and board) covering the
two-independent-flash architecture (neural-network data vs. boot
bitstream), the ESP32<->ECP5 JTAG-only link, and the real CABGA381
ball assignments (JTAG/PROGRAMN/INITN/DONE/CFG[2:0]/MSPI dedicated
pins), matching decisions.log DEC-0041.

Also closes ch.7's (Host interface) own long-standing "still needed"
list: the physical transport (spi_host_bridge.v) and the completion-
notification path (FPGA_DATA_READY) it used to flag as missing are
both now real -- described with the same system-idle-detector formula
implemented in the RTL.

Compiled clean (44 pages, 0 errors).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_013xXuuRUWZScuo1DeYJxs3v

2026-09-07 13:11:12 +02:00

chapters

docs: bring datasheet/ into the main repo under hardware/v2/docs

2026-09-07 05:09:14 +02:00

docs: bring datasheet/ into the main repo under hardware/v2/docs

2026-09-07 05:09:14 +02:00

v2-en

docs: datasheet addendum for two-flash programming architecture + FPGA_DATA_READY

2026-09-07 13:11:12 +02:00

FPGA-Neural-Datasheet.pdf

docs: bring datasheet/ into the main repo under hardware/v2/docs

2026-09-07 05:09:14 +02:00

FPGA-Neural-Datasheet.tex

docs: bring datasheet/ into the main repo under hardware/v2/docs

2026-09-07 05:09:14 +02:00

preamble.tex

docs: bring datasheet/ into the main repo under hardware/v2/docs

2026-09-07 05:09:14 +02:00

README.md

docs: bring datasheet/ into the main repo under hardware/v2/docs

2026-09-07 05:09:14 +02:00

README.md

FPGA-Neural — Datasheet

Datasheet tecnico multicapitolo dell'engine FPGA-Neural, in italiano e inglese. Ricostruito a partire dal codice RTL, dalla documentazione e dai benchmark presenti nella repository (revisione A1, settembre 2026).

Struttura

docs/datasheet/
├── FPGA-Neural-Datasheet.pdf        ← PDF italiano (36 pagine)
├── FPGA-Neural-Datasheet.tex        ← sorgente principale (IT)
├── preamble.tex                     ← stili, palette, box, TikZ
├── chapters/                        ← 14 capitoli (IT)
└── en/
    ├── FPGA-Neural-Datasheet-EN.pdf ← PDF inglese (36 pagine)
    ├── FPGA-Neural-Datasheet-EN.tex ← sorgente principale (EN)
    ├── preamble.tex                 ← stili (EN)
    └── chapters/                    ← 14 capitoli (EN)

Compilazione

Serve una distribuzione LaTeX con pgfplots, tikz-timing, tcolorbox, ltablex, listings, babel.

# Italiano
cd docs/datasheet
pdflatex FPGA-Neural-Datasheet.tex
pdflatex FPGA-Neural-Datasheet.tex   # 2ª passata per indice e riferimenti

# Inglese
cd docs/datasheet/en
pdflatex FPGA-Neural-Datasheet-EN.tex
pdflatex FPGA-Neural-Datasheet-EN.tex

Nota sul pinout

Il capitolo Progetto hardware e mappa dei segnali riporta l'analisi completa segnale-per-segnale del top-level spi_neuron_top, con la colonna Ball compilata con assegnazioni CABGA381 reali (53 segnali, .lpf reale in synth/) e verificata da un place&route reale (nextpnr-ecp5, 0 errori di vincolo, Program finished normally) — non più auto-piazzate.