michele
facbaa2305
Layout and AI findings always get action (fallback recommendation). The card renders that sentence in the body. PCB review context now includes vias under the footprint, copper thickness, nearby widths, courtyard, and keepout polygons.
279 lines
9.3 KiB
Python
279 lines
9.3 KiB
Python
"""KiCad PCB ingest — parse only, no SI/creepage checks.
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Favor: footprint+pad net; named nets; segment on a net.
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Against: .kicad_sch rejected; missing Reference skipped; empty board ok.
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"""
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from __future__ import annotations
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from pathlib import Path
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import pytest
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from backend.periscopex.parsers_kicad_pcb import parse_kicad_pcb
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_PCB = """(kicad_pcb (version 20240108) (generator pcbnew)
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(net 0 "")
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(net 1 "GND")
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(net 2 "+3V3")
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(footprint "Resistor_SMD:R_0603_1608Metric"
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(layer "F.Cu")
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(at 10 20 0)
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(property "Reference" "R1" (at 0 0 0) (effects (font (size 1 1))))
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(property "Value" "10k" (at 0 0 0) (effects (font (size 1 1))))
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(pad "1" smd roundrect (at -0.75 0) (size 0.8 0.9) (layers "F.Cu") (net 2 "+3V3"))
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(pad "2" smd roundrect (at 0.75 0) (size 0.8 0.9) (layers "F.Cu") (net 1 "GND"))
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)
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(footprint "Resistor_SMD:R_0603_1608Metric"
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(layer "F.Cu")
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(at 0 0 0)
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(property "Reference" "#PWR01" (at 0 0 0) (effects (font (size 1 1))))
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(pad "1" smd rect (at 0 0) (size 1 1) (layers "F.Cu") (net 1 "GND"))
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)
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(segment (start 10 20) (end 12 20) (width 0.25) (layer "F.Cu") (net 1))
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(via (at 11 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
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)
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"""
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def test_parse_footprint_pads_and_nets(tmp_path: Path):
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p = tmp_path / "board.kicad_pcb"
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p.write_text(_PCB)
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g = parse_kicad_pcb(p)
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assert "GND" in g.nets and "+3V3" in g.nets
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assert "R1" in g.footprints
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r1 = g.footprints["R1"]
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assert r1.x == 10 and r1.y == 20
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by_num = {pad.number: pad for pad in r1.pads}
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assert by_num["1"].net == "+3V3"
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assert by_num["2"].net == "GND"
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assert by_num["1"].x == pytest.approx(9.25)
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assert by_num["2"].x == pytest.approx(10.75)
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assert r1.courtyard == []
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def test_parse_segment_and_via_resolve_net_name(tmp_path: Path):
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p = tmp_path / "board.kicad_pcb"
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p.write_text(_PCB)
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g = parse_kicad_pcb(p)
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assert len(g.segments) == 1
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assert g.segments[0].net == "GND"
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assert len(g.vias) == 1
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assert g.vias[0].net == "GND"
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def test_power_flag_footprint_is_skipped(tmp_path: Path):
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p = tmp_path / "board.kicad_pcb"
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p.write_text(_PCB)
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g = parse_kicad_pcb(p)
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assert "#PWR01" not in g.footprints
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def test_kicad_sch_is_rejected_as_pcb(tmp_path: Path):
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p = tmp_path / "sheet.kicad_sch"
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p.write_text("(kicad_sch (version 20250114) (uuid \"1\"))\n")
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with pytest.raises(ValueError, match="kicad_pcb"):
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parse_kicad_pcb(p)
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def test_parse_keepout_zone_polygon(tmp_path: Path):
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p = tmp_path / "keepout.kicad_pcb"
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p.write_text("""(kicad_pcb (version 20240108) (generator pcbnew)
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(zone (net 0) (net_name "") (layer "F.Cu") (name "ANT_KEEPOUT")
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(keepout (tracks not_allowed) (vias not_allowed) (copperpour not_allowed))
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(polygon (pts (xy 0 0) (xy 10 0) (xy 10 8) (xy 0 8)))
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)
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)
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""")
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g = parse_kicad_pcb(p)
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assert len(g.zones) == 1
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z = g.zones[0]
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assert z.keepout is True
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assert z.name == "ANT_KEEPOUT"
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assert len(z.outlines[0]) == 4
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def test_empty_board_parses(tmp_path: Path):
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p = tmp_path / "empty.kicad_pcb"
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p.write_text("(kicad_pcb (version 20240108) (generator pcbnew))\n")
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g = parse_kicad_pcb(p)
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assert g.footprints == {}
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assert g.segments == []
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_PCB_V10 = """(kicad_pcb (version 20260206) (generator pcbnew)
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(footprint "Package_TO_SOT_SMD:SOT-23-5"
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(layer "F.Cu")
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(at 0 0 0)
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(property "Reference" "U3" (at 0 0 0) (effects (font (size 1 1))))
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(pad "1" smd rect (at 0 0) (size 1 1) (layers "F.Cu") (net "VSYS"))
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(pad "2" smd rect (at 1 0) (size 1 1) (layers "F.Cu") (net "GND"))
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(pad "5" smd rect (at 2 0) (size 1 1) (layers "F.Cu") (net "3V3_DIGITAL"))
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)
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(footprint "RF_Module:ESP"
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(layer "F.Cu")
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(at 10 0 0)
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(property "Reference" "U5" (at 0 0 0) (effects (font (size 1 1))))
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(pad "1" smd rect (at 0 0) (size 1 1) (layers "F.Cu") (net "GND"))
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(pad "2" smd rect (at 1 0) (size 1 1) (layers "F.Cu") (net "3V3_DIGITAL"))
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(pad "3" smd rect (at 2 0) (size 1 1) (layers "F.Cu") (net "/ESP32_EN"))
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)
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)
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"""
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def test_kicad10_pad_net_string_form(tmp_path: Path):
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from backend.periscopex.parsers_kicad_pcb import nets_from_pcb
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p = tmp_path / "v10.kicad_pcb"
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p.write_text(_PCB_V10)
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g = parse_kicad_pcb(p)
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assert g.footprints["U3"].pads[1].net == "GND"
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nets = nets_from_pcb(g)
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assert ("U3", "2") in nets["GND"]
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assert ("U3", "5") in nets["3V3_DIGITAL"]
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assert ("U5", "3") in nets["ESP32_EN"] # leading / stripped
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def test_build_graph_prefers_pcb_nets_over_sch(tmp_path: Path):
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"""Board pad nets win when sch geometry would swap rails."""
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from backend.periscopex.graph import build_graph
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sch = tmp_path / "netlist.kicad_sch"
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# Minimal sch: only needs to parse as kicad_sch with some parts.
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sch.write_text("""(kicad_sch (version 20250114) (uuid "1")
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(lib_symbols
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(symbol "Device:R"
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(pin passive (at 0 3.81 90) (length 2.54)
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(name "~" (effects (font (size 1.27 1.27))))
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(number "1" (effects (font (size 1.27 1.27))))
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)
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(pin passive (at 0 -3.81 90) (length 2.54)
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(name "~" (effects (font (size 1.27 1.27))))
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(number "2" (effects (font (size 1.27 1.27))))
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)
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)
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)
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(symbol (lib_id "Device:R") (at 0 0 0) (unit 1) (uuid "a")
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(property "Reference" "R1" (at 0 0 0) (effects (font (size 1.27 1.27))))
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(property "Value" "10k" (at 0 0 0) (effects (font (size 1.27 1.27))))
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(pin "1" (uuid "p1")) (pin "2" (uuid "p2"))
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)
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(global_label "GND" (at 0 3.81 0) (uuid "b"))
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)
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""")
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pcb = tmp_path / "pcb.kicad_pcb"
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pcb.write_text(_PCB_V10)
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bom = tmp_path / "bom.csv"
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bom.write_text(
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"Reference,Value,Footprint,Manufacturer Part Number\n"
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"U3,AP2112,SOT23,\nU5,ESP32,,\nR1,10k,,\n"
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)
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g = build_graph(
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sch, bom, tmp_path / "ex", tmp_path / "pat", tmp_path / "mod",
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pcb_path=pcb,
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)
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assert g.components["U3"].pins["2"] == "GND"
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assert g.components["U3"].pins["5"] == "3V3_DIGITAL"
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assert g.components["U5"].pins["1"] == "GND"
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assert g.components["U5"].pins["2"] == "3V3_DIGITAL"
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def test_upload_pcb_sets_has_pcb(tmp_path: Path):
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from fastapi.testclient import TestClient
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from backend.main import app
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from backend.services.storage import LocalStorageBackend
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app.state.storage = LocalStorageBackend(tmp_path)
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client = TestClient(app)
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pid = client.post("/api/projects", json={"name": "board"}).json()["id"]
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resp = client.post(
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f"/api/projects/{pid}/upload/pcb",
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files={"file": ("board.kicad_pcb", _PCB.encode(), "text/plain")},
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)
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assert resp.status_code == 200, resp.text
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body = resp.json()
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assert body["footprints"] == 1
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assert body["nets"] >= 2
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fresh = client.get(f"/api/projects/{pid}").json()
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assert fresh["has_pcb"] is True
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assert fresh["has_netlist"] is False
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def test_upload_sch_as_pcb_is_rejected(tmp_path: Path):
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from fastapi.testclient import TestClient
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from backend.main import app
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from backend.services.storage import LocalStorageBackend
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app.state.storage = LocalStorageBackend(tmp_path)
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client = TestClient(app)
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pid = client.post("/api/projects", json={"name": "board"}).json()["id"]
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resp = client.post(
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f"/api/projects/{pid}/upload/pcb",
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files={"file": ("sheet.kicad_sch", b"(kicad_sch (version 1))\n", "text/plain")},
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)
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assert resp.status_code == 400
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fresh = client.get(f"/api/projects/{pid}").json()
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assert not fresh.get("has_pcb")
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class _FakeWs:
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def __init__(self, root: Path):
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self.root = root
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def local_path(self, rel: str) -> Path:
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return self.root / rel
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def test_layout_graph_skipped_when_pcb_missing(tmp_path: Path):
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from backend.services.pipeline import _write_layout_graph
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(tmp_path / "uploads").mkdir()
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_write_layout_graph(_FakeWs(tmp_path), "p1")
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assert not (tmp_path / "layout_graph.json").is_file()
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def test_layout_graph_fail_soft_on_invalid_pcb(tmp_path: Path):
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from backend.services.pipeline import _write_layout_graph
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uploads = tmp_path / "uploads"
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uploads.mkdir()
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(uploads / "pcb.kicad_pcb").write_text("(kicad_sch (version 1))\n")
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_write_layout_graph(_FakeWs(tmp_path), "p1")
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assert not (tmp_path / "layout_graph.json").is_file()
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def test_layout_graph_written_from_valid_pcb(tmp_path: Path):
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from backend.services.pipeline import _write_layout_graph
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uploads = tmp_path / "uploads"
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uploads.mkdir()
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(uploads / "pcb.kicad_pcb").write_text(_PCB)
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_write_layout_graph(_FakeWs(tmp_path), "p1")
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out = tmp_path / "layout_graph.json"
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assert out.is_file()
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data = __import__("json").loads(out.read_text())
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assert "R1" in data["footprints"]
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def test_stackup_thickness_without_full_dielectrics(tmp_path: Path):
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p = tmp_path / "t.kicad_pcb"
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p.write_text("""(kicad_pcb (version 20240108)
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(net 0 "")
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(net 1 "VOUT")
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(setup
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(stackup
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(layer "F.Cu" (type "copper") (thickness 0.035mm))
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(layer "B.Cu" (type "copper") (thickness 0.035))
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)
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)
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(via (at 1 1) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
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(arc (start 0 0) (end 2 0) (width 0.4) (layer "F.Cu") (net 1))
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)
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""")
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g = parse_kicad_pcb(p)
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assert g.stackup is not None
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assert g.stackup.copper_thickness_mm == pytest.approx(0.035)
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assert len(g.vias) == 1
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assert any(s.width == pytest.approx(0.4) and s.net == "VOUT" for s in g.segments)
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