michele
4df04df5d4
Add /api/library datasheet import and component GET/PUT with no exam. Reorganize pytest into datasheet, library, schematic, PCB, and AF+AI. Document Rust criteria (none chosen; no rustup) and coding conformity.
108 lines
3.5 KiB
Python
108 lines
3.5 KiB
Python
"""BOM vs schematic MPN/value match.
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Favor: identical MPNs silent; real mismatch is ERROR PE-BOM-001 with
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designator; orphan BOM line is WARNING.
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Against: case/whitespace-only MPN is not a mismatch; empty schematic map
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skips the check (PADS path); BOM-empty + schematic MPN is fill, not ERROR.
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"""
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from __future__ import annotations
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from backend.periscopex.bom_match_check import check_bom_schematic_match
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from backend.periscopex.models import DesignGraph
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def test_matching_mpns_produce_no_findings():
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sch = {"U1": {"mpn": "SPX3819M5-L-3-3", "value": "3.3V LDO"}}
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bom = {"U1": {"mpn": "SPX3819M5-L-3-3", "value": "3.3V LDO"}}
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assert check_bom_schematic_match(sch, bom) == []
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def test_mpn_mismatch_is_error_ps_bom_001():
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sch = {"U1": {"mpn": "SPX3819M5-L-3-3", "value": "LDO"}}
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bom = {"U1": {"mpn": "AMS1117-3.3", "value": "LDO"}}
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findings = check_bom_schematic_match(sch, bom)
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assert len(findings) == 1
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f = findings[0]
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assert f.rule_id == "PE-BOM-001"
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assert f.source == "bom_match"
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assert f.status == "ERROR"
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assert f.designator == "U1"
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assert "SPX3819M5-L-3-3" in f.finding
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assert "AMS1117-3.3" in f.finding
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def test_orphan_bom_ref_is_warning():
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sch = {"U1": {"mpn": "MCUX", "value": "MCU"}}
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bom = {
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"U1": {"mpn": "MCUX", "value": "MCU"},
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"R99": {"mpn": "RC0603", "value": "10k"},
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}
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findings = check_bom_schematic_match(sch, bom)
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assert len(findings) == 1
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assert findings[0].rule_id == "PE-BOM-002"
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assert findings[0].status == "WARNING"
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assert findings[0].designator == "R99"
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def test_mpn_case_and_whitespace_are_not_a_mismatch():
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sch = {"U1": {"mpn": " mspm0g3507sptr ", "value": "MCU"}}
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bom = {"U1": {"mpn": "MSPM0G3507SPTR", "value": "MCU"}}
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assert check_bom_schematic_match(sch, bom) == []
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def test_empty_bom_mpn_with_schematic_mpn_is_not_a_mismatch():
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sch = {"U1": {"mpn": "MSPM0G3507SPTR", "value": "MCU"}}
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bom = {"U1": {"mpn": None, "value": "MSPM0"}}
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assert check_bom_schematic_match(sch, bom) == []
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def test_empty_schematic_map_skips_check():
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"""PADS/EDIF graphs have no schematic property table — do not treat
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every BOM line as an orphan."""
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sch = {}
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bom = {"U1": {"mpn": "MCUX", "value": "MCU"}, "R1": {"mpn": "RC", "value": "10k"}}
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assert check_bom_schematic_match(sch, bom) == []
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def test_legacy_design_graph_without_source_fields_still_validates():
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g = DesignGraph.model_validate({
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"components": {},
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"nets": {},
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})
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assert g.bom_fields == {}
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assert g.schematic_fields == {}
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def test_build_graph_kicad_mpn_mismatch_surfaces(tmp_path):
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from backend.periscopex.graph import build_graph
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net = tmp_path / "net.xml"
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net.write_text(
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"""<?xml version="1.0" encoding="UTF-8"?>
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<export version="E">
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<components>
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<comp ref="U1">
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<value>LDO</value>
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<fields><field name="MPN">SPX3819M5-L-3-3</field></fields>
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</comp>
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</components>
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<nets>
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<net code="1" name="GND"><node ref="U1" pin="2"/></net>
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</nets>
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</export>
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"""
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)
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bom = tmp_path / "bom.csv"
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bom.write_text(
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"Reference,Value,Footprint,Manufacturer Part Number\n"
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"U1,LDO,,AMS1117-3.3\n"
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)
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g = build_graph(
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net, bom, tmp_path / "empty_ex", tmp_path / "empty_pat", tmp_path / "empty_mod",
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)
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findings = check_bom_schematic_match(g.schematic_fields, g.bom_fields)
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assert len(findings) == 1
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assert findings[0].rule_id == "PE-BOM-001"
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assert findings[0].designator == "U1"
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