Commit Graph
7 Commits
Author SHA1 Message Date
michele bd3a6fd009 Gate interface certifiers to connectors on this board (2.61.2).
USB-C/RJ45/PoE/DDR3 are the method, not a catalog. No connector means
no finding. Bare RJ45 is Ethernet only; PoE needs PoE evidence. HubAudio
has USB-C and PoE MagJack, not DDR. Skip-I unchanged.
2026-09-21 12:24:54 +02:00
michele 6dc04b5cc7 Add USB-C, Ethernet, and PoE interface class certifiers (2.61.0).
Dedicated deterministic engines certify class and connection integrity
(CC1/CC2, Rd 5.1 kΩ, VBUS/GND, SuperSpeed if USB3; 10/100 vs GbE
magnetics; PoE only with evidence). Missing evidence is INSUFFICIENT
or N/A, never invented PoE, SuperSpeed, Z, or I. No FEM, no via IPC.
2026-09-21 11:52:44 +02:00
michele c362ef8a56 Split native Periscope (periscope/src) from inherited PinScope (periscope/dependency).
Keep validate.py and the finding engine as-is. AGPL LICENSE stays at the repo root.
Docker overlays dependency then src. Do not delete the inherited tree.
2026-09-20 14:31:42 +02:00
michele 312057b6d3 Gate SI layout_rules to the quoted bus, not EN RC onto USB.
PE-SI-009 no longer treats ESP32 CHIP_PU/EN RC as a USB series R.
USB without a library Z number stays PE-SI-010 measurement-only.
Pintable skill 1.13.0 requires net_class on SI kinds (usb2/usb3/MDI/RGMII/DDR3).
2026-09-20 13:13:19 +02:00
michele 65a91419a2 Check ImpedenceFinder against datasheet SI rules, not a dump table.
Each layout_rules SI requirement (diff/SE Z, skew, max length, spacing,
ref plane, vias, layer, return, series R) is one PASS/FAIL/MARGIN finding
with FACT and REQUIREMENT. USB/HDMI/PCIe/ETH/LVDS/DDR only; I2C GPIO CC
and analog REGN are skipped. No invented 90 Ω.
2026-09-20 10:45:27 +02:00
micheleandCursor 8d2b85600f Rebrand Pinscope to Periscope across product and codebase.
Rename the core package to periscopex, update UI/docs/Docker/deploy defaults to periscope.michelebigi.it, and keep legacy version/storage key aliases so existing projects keep working.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-09-13 20:02:04 +02:00
micheleandCursor 45e820fabc Add PCB intra-pair skew only when the datasheet gives millimetres.
PS-SI-001 and decoupling skip without a numeric layout_rule. Tests use simple_project nets, not invented USBPHY boards.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-09-10 23:34:57 +02:00