micheleandCursor
45e820fabc
PS-SI-001 and decoupling skip without a numeric layout_rule. Tests use simple_project nets, not invented USBPHY boards. Co-authored-by: Cursor <cursoragent@cursor.com>
48 lines
1.4 KiB
Python
48 lines
1.4 KiB
Python
"""G1 SI vs simple_project — no invented millimetres or USBPHY boards.
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Favor: real /USB.D+ and /USB.D- pair by suffix; eval stays 3 keys.
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Against: no .kicad_pcb → no PS-SI-001; 3W is not invented.
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"""
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from __future__ import annotations
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from pathlib import Path
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from backend.pinscopex.eval_report import eval_simple_project
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from backend.pinscopex.models import DesignGraph
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from backend.pinscopex.si_check import check_si, partner_net
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SIMPLE = Path(__file__).resolve().parents[1] / "simple_project"
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def _graph() -> DesignGraph:
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return DesignGraph.model_validate_json(
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(SIMPLE / "design_graph.json").read_text()
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)
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def test_simple_project_usb_dp_dm_are_a_named_pair():
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g = _graph()
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assert "/USB.D+" in g.nets
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assert "/USB.D-" in g.nets
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assert partner_net("/USB.D+") == "/USB.D-"
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assert partner_net("/USB.D-") == "/USB.D+"
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assert partner_net("/USBC.D+") == "/USBC.D-"
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def test_simple_project_without_pcb_has_no_ps_si_001():
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findings = check_si(_graph(), {}, None)
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assert findings == []
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assert all(f.rule_id != "PS-3W-001" for f in findings)
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def test_simple_project_eval_has_no_si_keys():
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scores = eval_simple_project(SIMPLE)
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assert scores.finding_count == 3
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assert scores.precision == 1.0
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assert scores.recall == 1.0
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assert not any(
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k.startswith("PS-SI-") or k.startswith("PS-3W-")
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for k in scores.extra_keys
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)
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