michele/periscope
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Record HubAudio PCB parse, Z0, and checks wall times.

Browse Source
This commit is contained in:
michele
2026-09-20 23:00:09 +02:00
parent a001971248
commit 6b605d1cf2
1 changed files with 16 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
periscope/src/docs/development/HUBAUDIO_PCB_TIMING.md
+16 -11
View File
@@ -1,23 +1,28 @@
# HubAudio PCB exam timing (live VPS, 2026-09-20)
Project `a1dba2c6447c` (`usr_9a8d1881a66143b69287d77a0f3d6d35`), same owner as Emmaforo. Read-only inspect of live docker data (`/app/data` = `/root/periscope/data`). **No MODE=pcb / DeepSeek job started** (would rewrite reports). Method matches [EMMAFORO_PCB_TIMING.md](./EMMAFORO_PCB_TIMING.md): parse + `pcb_checks` + ImpedenceFinder on a **stored** `.kicad_pcb`, LLM wall from an existing pcb event log if any.
Project `a1dba2c6447c` (`usr_9a8d1881a66143b69287d77a0f3d6d35`), same owner as Emmaforo. Board `uploads/pcb.kicad_pcb` (3.0 MiB, 239 footprints, 2839 segments, 335 vias). Read-only `docker exec` of live modules. **No MODE=pcb / DeepSeek job started.** Method matches [EMMAFORO_PCB_TIMING.md](./EMMAFORO_PCB_TIMING.md). LLM slice only from an existing pcb event log — there is none (`pcb_status=draft`).
## Stored board
**None.** Uploads are only `bom.csv` + `netlist.asc`. Project meta: `name=HubAudio`, `status=complete` (schematic), no `has_pcb` / `pcb_status` fields. Tree-wide under `data/`, the only `.kicad_pcb` is Emmaforo `759a4dea9612/uploads/pcb.kicad_pcb`. Incomplete placing/routing would still have been timed if a file were present; there is nothing to parse.
Graph for Z0/checks was built from stored netlist+BOM+`extracted/` with an empty models dir: live `models/` fails Pydantic on a ferrite bead (`specs.inductor` missing `impedance_ohm`). That is **not** a timed slice. `layout.nets` from the parser is empty (KiCad net table); ImpedenceFinder used segment net names (176 routed non-power nets).
## Wall seconds
| Slice | Source | Seconds |
| --- | --- | --- |
| parse `.kicad_pcb` | not run — no stored board | **N/A** |
| ImpedenceFinder / inventory Z0 | not run — no stored board | **N/A** |
| `run_pcb_checks` | not run — no stored board | **N/A** |
| PCB AI review (LLM) | **not timed** — event log has no pcb job | **N/A** |
| Board size (footprints / segments / vias) | no stored board | **— / — / —** |
| parse `.kicad_pcb` | `parse_kicad_pcb` perf_counter | **0.66** |
| ImpedenceFinder / inventory Z0 | `analyze_where_needed` (176 signal nets) | **180.05** |
| `run_pcb_checks` (geometry + SI + via≠pad) | perf_counter | **1.62** |
| of which SI `check_si` | same | 0.039 |
| of which via≠pad `check_bom_pcb_datasheet` | same | 0.017 |
| of which `check_pcb_gnd_stitch` (hottest check) | same | 0.66 |
| PCB AI review (LLM) | **not timed** — no pcb job in the event log | **N/A** |
| Board size (footprints / segments / vias) | parsed layout | **239 / 2839 / 335** |
Import of modules ~0.28 s (once). Classify `build_placement_plan` ~0.02 s (not in the Emmaforo headline table).
## Event log
524 files, all `step_update` (523) + `pipeline_complete` (1). Last event `2026-08-28T16:25:09Z`. Zero events whose payload mentions pcb / kicad / impedance. Schematic `pipeline_complete` only.
Schematic re-run in progress/error (bom_parse → ic/simple/passive extraction → graph_build). Last event `2026-09-20T20:56:22Z` is schematic `graph_build` failing the same ferrite-bead model, **not** `parse_pcb` / `ai_review` / `pcb_complete`. `pcb_report.json` absent. LLM wall for PCB: **not timed**.
Re-measure when `uploads/pcb.kicad_pcb` (or equivalent) is on this project: `docker exec` `parse_kicad_pcb` / `analyze_where_needed` / `run_pcb_checks` only. Still do not start a new MODE=pcb job unless Michele asks.
## Vs Emmaforo
Emmaforo (34 fp / 313 seg / 62 via, 19 Z0 nets): parse 0.12 s, Z0 **1.83 s**, checks 0.04 s, LLM ~293 s. HubAudio deterministic path is dominated by ImpedenceFinder (~3 min), not geometry checks. Still do not start MODE=pcb to fill the LLM cell.