Add AS4C32M16SA/SB SDRAM parts and castellated breakout footprints
- AS4C32M16SA-7TCNTR (TSOP-54) and AS4C32M16SB-7BIN (TFBGA-54) 512Mb SDRAM symbols/footprints, imported via UltraLibrarian/SnapEDA sources (see MANIFEST.csv for full provenance). - Fix Lattice LFE5U-45F-8BG381 symbol's Value/manf# grade suffix. - Import 3 castellated breakout footprints (QFP48/QFP64/SSOP8, 1.27mm castellation pitch) from coddingtonbear/kicad-castellated-breakouts into footprints/other/castellated_breakouts.pretty/, plus the upstream reference board projects under reference/ for future consultation. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01T5pjBJQ7tf9pwsSs8rG2sm
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Claude Sonnet 5
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# Castellated Breakouts for KiCad
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Do you own a milling machine that isn't _quite_ precise enough for that
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0.5mm-pitch IC you want to use? Maybe you like to home-etch your PCBs,
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but you haven't quite worked out a way of consistently exposing tiny
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0.2mm traces? The board designs and footprints in this repository
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can help you continue to develop your bespoke hand-crafted electronics
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projects at home by letting PCB board houses handle the parts of your
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design that are just a little too difficult to be worth fighting with
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on your own.
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Each board in this repository can be plotted in KiCad and sent off to your
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favorite board house (OshPark links are provided below) so you can have
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boards for your favorite ICs readily-available for the next time you'd
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like to use them in a design.
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## Boards
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### QFP64 (0.5mm pitch)
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<a href="https://oshpark.com/shared_projects/qaabAuOa"><img src="https://oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
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* IC Pin Pitch: 0.5mm
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* Compatible packages: QFP64 (BQFP64, CQFP64, LQFP64, TQFP64, etc). No
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center pad.
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* Castellation Pitch: 1.27mm
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* Board Files: [qfp64_0.5mm](qfp64_0.5mm)
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### QFP48 (0.5mm pitch)
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<a href="https://www.oshpark.com/shared_projects/mXCVQoyT"><img src="https://www.oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
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* IC Pin Pitch: 0.5mm
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* Compatible packages: QFP48 (BQFP48, CQFP48, LQFP48, TQFP48, etc). No
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center pad.
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* Castellation Pitch: 1.27mm
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* Board Files: [qfp48_0.5mm](qfp48_0.5mm)
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### SSOP20 (0.65mm pitch)
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<a href="https://oshpark.com/shared_projects/HR54aK0e"><img src="https://oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
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* IC Pin Pitch: 0.65mm
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* Compatible packages: SSOP20 (TSSOP20, etc) having a width (including pins)
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smaller than 11mm, and having at least 3mm of space available between the
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two rows of pins.
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* Castellation Pitch: 1.27mm
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* Board Files [ssop20_0.65mm](ssop20_0.65mm)
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### SSOP8 (0.65mm pitch)
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<a href="https://oshpark.com/shared_projects/lRtqVrhi"><img src="https://oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
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* IC Pin Pitch: 0.65mm
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* Compatible packages: SSOP8 (TSSOP8, etc) having a width (including pins)
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smaller than 9mm. No center pad.
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* Castellation Pitch: 1.27mm
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* Board Files: [ssop8_0.65mm](ssop8_0.65mm)
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## Plotting
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You can plot these on your own in KiCad, just make sure that you do *not*
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tent vias. The way castellations are implemented for at least OshPark
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involve having vias on the edge of the board, and routing the board
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board outline through the center of those vias. If the vias were
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tented, you would not be able to easily solder to them!
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For reference, the settings I've used in generating my plots for OshPark
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are below:
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### Copper
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### Drill
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## Contribution Guidelines
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This is by no means a prescriptive rule, but if you do find yourself attempting
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to contribute a new board or footprint, you may replicate the via spacing
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and trace sizes I've used above by configuring your design rules as so:
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Note that you will want to select the custom via setting (1mm diameter with 0.5mm drill)
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when placing the castellation vias.
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Matching the patterns used for other footprints is _not_ absolutely necessary,
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but if you submit a new breakout board, please try to follow the following
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guidelines:
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* Place your project in a folder named by the following pattern: `<FOOTPRINT><PIN_COUNT>_<PITCH>`,
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where `<FOOTPRINT>` is the name of the footprint type (`QFN`, `QFP`, `SSOP`) with as general of
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a name as possible (that is, exclude prefixes that affect only the height of the package --
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suffixes like `T` or `L`, for example), `<PIN_COUNT>` is the total count of pins, and `<PITCH>`
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is the pin pitch (with units -- millimeters preferred).
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* Update the reademe to include a section similar to the sections you see above including:
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* A title identifying your new castellated board.
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* A bulleted list describing the following details:
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* The pin pitch of the footprint.
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* A list of common compatible packages including whether the footprint
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includes a center pad.
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* The pitch of castellations.
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* A link to the folder in which you've placed your project's board files.
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* (Optional) A link to an OshPark project for that footprint.
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* (Optional) An image, preferably from the OshPark preview, of the front
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copper layer of the breakout board. Note that you need not host the
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image -- as part of merging your PR, the image will be moved to this
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project's folder in S3.
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## Disclaimer
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I am a hobbyist -- not an expert! If you see a problem in the design of
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any linked boards or have suggestions that might make this project more
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useful, I'd love to hear them!
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