diff --git a/3dmodels/other/AS4C32M16SB-7BIN.step b/3dmodels/other/AS4C32M16SB-7BIN.step
new file mode 100644
index 0000000..ce4e7e5
--- /dev/null
+++ b/3dmodels/other/AS4C32M16SB-7BIN.step
@@ -0,0 +1,4697 @@
+ISO-10303-21;
+HEADER;
+FILE_DESCRIPTION(('FreeCAD Model'),'2;1');
+FILE_NAME('Open CASCADE Shape Model','2025-09-13T04:17:01',(''),(''),
+  'Open CASCADE STEP processor 7.8','FreeCAD','Unknown');
+FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));
+ENDSEC;
+DATA;
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+#3861 = CURVE_STYLE('',#3862,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3862 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3863 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3864),#3598);
+#3864 = STYLED_ITEM('color',(#3865),#3560);
+#3865 = PRESENTATION_STYLE_ASSIGNMENT((#3866,#3871));
+#3866 = SURFACE_STYLE_USAGE(.BOTH.,#3867);
+#3867 = SURFACE_SIDE_STYLE('',(#3868));
+#3868 = SURFACE_STYLE_FILL_AREA(#3869);
+#3869 = FILL_AREA_STYLE('',(#3870));
+#3870 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3871 = CURVE_STYLE('',#3872,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3872 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3873 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3874),#3370);
+#3874 = STYLED_ITEM('color',(#3875),#3332);
+#3875 = PRESENTATION_STYLE_ASSIGNMENT((#3876,#3881));
+#3876 = SURFACE_STYLE_USAGE(.BOTH.,#3877);
+#3877 = SURFACE_SIDE_STYLE('',(#3878));
+#3878 = SURFACE_STYLE_FILL_AREA(#3879);
+#3879 = FILL_AREA_STYLE('',(#3880));
+#3880 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3881 = CURVE_STYLE('',#3882,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3882 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3883 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3884),#805);
+#3884 = STYLED_ITEM('color',(#3885),#767);
+#3885 = PRESENTATION_STYLE_ASSIGNMENT((#3886,#3891));
+#3886 = SURFACE_STYLE_USAGE(.BOTH.,#3887);
+#3887 = SURFACE_SIDE_STYLE('',(#3888));
+#3888 = SURFACE_STYLE_FILL_AREA(#3889);
+#3889 = FILL_AREA_STYLE('',(#3890));
+#3890 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3891 = CURVE_STYLE('',#3892,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3892 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3893 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3894),#1774);
+#3894 = STYLED_ITEM('color',(#3895),#1736);
+#3895 = PRESENTATION_STYLE_ASSIGNMENT((#3896,#3901));
+#3896 = SURFACE_STYLE_USAGE(.BOTH.,#3897);
+#3897 = SURFACE_SIDE_STYLE('',(#3898));
+#3898 = SURFACE_STYLE_FILL_AREA(#3899);
+#3899 = FILL_AREA_STYLE('',(#3900));
+#3900 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3901 = CURVE_STYLE('',#3902,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3902 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3903 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3904),#748);
+#3904 = STYLED_ITEM('color',(#3905),#710);
+#3905 = PRESENTATION_STYLE_ASSIGNMENT((#3906,#3911));
+#3906 = SURFACE_STYLE_USAGE(.BOTH.,#3907);
+#3907 = SURFACE_SIDE_STYLE('',(#3908));
+#3908 = SURFACE_STYLE_FILL_AREA(#3909);
+#3909 = FILL_AREA_STYLE('',(#3910));
+#3910 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3911 = CURVE_STYLE('',#3912,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3912 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3913 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3914),#1033);
+#3914 = STYLED_ITEM('color',(#3915),#995);
+#3915 = PRESENTATION_STYLE_ASSIGNMENT((#3916,#3921));
+#3916 = SURFACE_STYLE_USAGE(.BOTH.,#3917);
+#3917 = SURFACE_SIDE_STYLE('',(#3918));
+#3918 = SURFACE_STYLE_FILL_AREA(#3919);
+#3919 = FILL_AREA_STYLE('',(#3920));
+#3920 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3921 = CURVE_STYLE('',#3922,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3922 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3923 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3924),#2857);
+#3924 = STYLED_ITEM('color',(#3925),#2819);
+#3925 = PRESENTATION_STYLE_ASSIGNMENT((#3926,#3931));
+#3926 = SURFACE_STYLE_USAGE(.BOTH.,#3927);
+#3927 = SURFACE_SIDE_STYLE('',(#3928));
+#3928 = SURFACE_STYLE_FILL_AREA(#3929);
+#3929 = FILL_AREA_STYLE('',(#3930));
+#3930 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3931 = CURVE_STYLE('',#3932,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3932 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3933 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3934),#2458);
+#3934 = STYLED_ITEM('color',(#3935),#2420);
+#3935 = PRESENTATION_STYLE_ASSIGNMENT((#3936,#3941));
+#3936 = SURFACE_STYLE_USAGE(.BOTH.,#3937);
+#3937 = SURFACE_SIDE_STYLE('',(#3938));
+#3938 = SURFACE_STYLE_FILL_AREA(#3939);
+#3939 = FILL_AREA_STYLE('',(#3940));
+#3940 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3941 = CURVE_STYLE('',#3942,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3942 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3943 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3944),#2914);
+#3944 = STYLED_ITEM('color',(#3945),#2876);
+#3945 = PRESENTATION_STYLE_ASSIGNMENT((#3946,#3951));
+#3946 = SURFACE_STYLE_USAGE(.BOTH.,#3947);
+#3947 = SURFACE_SIDE_STYLE('',(#3948));
+#3948 = SURFACE_STYLE_FILL_AREA(#3949);
+#3949 = FILL_AREA_STYLE('',(#3950));
+#3950 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3951 = CURVE_STYLE('',#3952,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3952 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3953 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3954),#1375);
+#3954 = STYLED_ITEM('color',(#3955),#1337);
+#3955 = PRESENTATION_STYLE_ASSIGNMENT((#3956,#3961));
+#3956 = SURFACE_STYLE_USAGE(.BOTH.,#3957);
+#3957 = SURFACE_SIDE_STYLE('',(#3958));
+#3958 = SURFACE_STYLE_FILL_AREA(#3959);
+#3959 = FILL_AREA_STYLE('',(#3960));
+#3960 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3961 = CURVE_STYLE('',#3962,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3962 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3963 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3964),#2743);
+#3964 = STYLED_ITEM('color',(#3965),#2705);
+#3965 = PRESENTATION_STYLE_ASSIGNMENT((#3966,#3971));
+#3966 = SURFACE_STYLE_USAGE(.BOTH.,#3967);
+#3967 = SURFACE_SIDE_STYLE('',(#3968));
+#3968 = SURFACE_STYLE_FILL_AREA(#3969);
+#3969 = FILL_AREA_STYLE('',(#3970));
+#3970 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3971 = CURVE_STYLE('',#3972,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3972 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3973 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3974),#1888);
+#3974 = STYLED_ITEM('color',(#3975),#1850);
+#3975 = PRESENTATION_STYLE_ASSIGNMENT((#3976,#3981));
+#3976 = SURFACE_STYLE_USAGE(.BOTH.,#3977);
+#3977 = SURFACE_SIDE_STYLE('',(#3978));
+#3978 = SURFACE_STYLE_FILL_AREA(#3979);
+#3979 = FILL_AREA_STYLE('',(#3980));
+#3980 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3981 = CURVE_STYLE('',#3982,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3982 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3983 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3984),#2515);
+#3984 = STYLED_ITEM('color',(#3985),#2477);
+#3985 = PRESENTATION_STYLE_ASSIGNMENT((#3986,#3991));
+#3986 = SURFACE_STYLE_USAGE(.BOTH.,#3987);
+#3987 = SURFACE_SIDE_STYLE('',(#3988));
+#3988 = SURFACE_STYLE_FILL_AREA(#3989);
+#3989 = FILL_AREA_STYLE('',(#3990));
+#3990 = FILL_AREA_STYLE_COLOUR('',#3617);
+#3991 = CURVE_STYLE('',#3992,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#3992 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#3993 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #3994),#2116);
+#3994 = STYLED_ITEM('color',(#3995),#2078);
+#3995 = PRESENTATION_STYLE_ASSIGNMENT((#3996,#4001));
+#3996 = SURFACE_STYLE_USAGE(.BOTH.,#3997);
+#3997 = SURFACE_SIDE_STYLE('',(#3998));
+#3998 = SURFACE_STYLE_FILL_AREA(#3999);
+#3999 = FILL_AREA_STYLE('',(#4000));
+#4000 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4001 = CURVE_STYLE('',#4002,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4002 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4003 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4004),#1090);
+#4004 = STYLED_ITEM('color',(#4005),#1052);
+#4005 = PRESENTATION_STYLE_ASSIGNMENT((#4006,#4011));
+#4006 = SURFACE_STYLE_USAGE(.BOTH.,#4007);
+#4007 = SURFACE_SIDE_STYLE('',(#4008));
+#4008 = SURFACE_STYLE_FILL_AREA(#4009);
+#4009 = FILL_AREA_STYLE('',(#4010));
+#4010 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4011 = CURVE_STYLE('',#4012,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4012 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4013 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4014),#3484);
+#4014 = STYLED_ITEM('color',(#4015),#3446);
+#4015 = PRESENTATION_STYLE_ASSIGNMENT((#4016,#4021));
+#4016 = SURFACE_STYLE_USAGE(.BOTH.,#4017);
+#4017 = SURFACE_SIDE_STYLE('',(#4018));
+#4018 = SURFACE_STYLE_FILL_AREA(#4019);
+#4019 = FILL_AREA_STYLE('',(#4020));
+#4020 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4021 = CURVE_STYLE('',#4022,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4022 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4023 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4024),#3199);
+#4024 = STYLED_ITEM('color',(#4025),#3161);
+#4025 = PRESENTATION_STYLE_ASSIGNMENT((#4026,#4031));
+#4026 = SURFACE_STYLE_USAGE(.BOTH.,#4027);
+#4027 = SURFACE_SIDE_STYLE('',(#4028));
+#4028 = SURFACE_STYLE_FILL_AREA(#4029);
+#4029 = FILL_AREA_STYLE('',(#4030));
+#4030 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4031 = CURVE_STYLE('',#4032,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4032 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4033 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4034),#1318);
+#4034 = STYLED_ITEM('color',(#4035),#1280);
+#4035 = PRESENTATION_STYLE_ASSIGNMENT((#4036,#4041));
+#4036 = SURFACE_STYLE_USAGE(.BOTH.,#4037);
+#4037 = SURFACE_SIDE_STYLE('',(#4038));
+#4038 = SURFACE_STYLE_FILL_AREA(#4039);
+#4039 = FILL_AREA_STYLE('',(#4040));
+#4040 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4041 = CURVE_STYLE('',#4042,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4042 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4043 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4044),#1261);
+#4044 = STYLED_ITEM('color',(#4045),#1223);
+#4045 = PRESENTATION_STYLE_ASSIGNMENT((#4046,#4051));
+#4046 = SURFACE_STYLE_USAGE(.BOTH.,#4047);
+#4047 = SURFACE_SIDE_STYLE('',(#4048));
+#4048 = SURFACE_STYLE_FILL_AREA(#4049);
+#4049 = FILL_AREA_STYLE('',(#4050));
+#4050 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4051 = CURVE_STYLE('',#4052,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4052 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4053 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4054),#3256);
+#4054 = STYLED_ITEM('color',(#4055),#3218);
+#4055 = PRESENTATION_STYLE_ASSIGNMENT((#4056,#4061));
+#4056 = SURFACE_STYLE_USAGE(.BOTH.,#4057);
+#4057 = SURFACE_SIDE_STYLE('',(#4058));
+#4058 = SURFACE_STYLE_FILL_AREA(#4059);
+#4059 = FILL_AREA_STYLE('',(#4060));
+#4060 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4061 = CURVE_STYLE('',#4062,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4062 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4063 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4064),#919);
+#4064 = STYLED_ITEM('color',(#4065),#881);
+#4065 = PRESENTATION_STYLE_ASSIGNMENT((#4066,#4071));
+#4066 = SURFACE_STYLE_USAGE(.BOTH.,#4067);
+#4067 = SURFACE_SIDE_STYLE('',(#4068));
+#4068 = SURFACE_STYLE_FILL_AREA(#4069);
+#4069 = FILL_AREA_STYLE('',(#4070));
+#4070 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4071 = CURVE_STYLE('',#4072,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4072 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4073 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4074),#1603);
+#4074 = STYLED_ITEM('color',(#4075),#1565);
+#4075 = PRESENTATION_STYLE_ASSIGNMENT((#4076,#4081));
+#4076 = SURFACE_STYLE_USAGE(.BOTH.,#4077);
+#4077 = SURFACE_SIDE_STYLE('',(#4078));
+#4078 = SURFACE_STYLE_FILL_AREA(#4079);
+#4079 = FILL_AREA_STYLE('',(#4080));
+#4080 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4081 = CURVE_STYLE('',#4082,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4082 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4083 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4084),#634);
+#4084 = STYLED_ITEM('color',(#4085),#596);
+#4085 = PRESENTATION_STYLE_ASSIGNMENT((#4086,#4091));
+#4086 = SURFACE_STYLE_USAGE(.BOTH.,#4087);
+#4087 = SURFACE_SIDE_STYLE('',(#4088));
+#4088 = SURFACE_STYLE_FILL_AREA(#4089);
+#4089 = FILL_AREA_STYLE('',(#4090));
+#4090 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4091 = CURVE_STYLE('',#4092,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4092 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4093 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4094),#2401);
+#4094 = STYLED_ITEM('color',(#4095),#2363);
+#4095 = PRESENTATION_STYLE_ASSIGNMENT((#4096,#4101));
+#4096 = SURFACE_STYLE_USAGE(.BOTH.,#4097);
+#4097 = SURFACE_SIDE_STYLE('',(#4098));
+#4098 = SURFACE_STYLE_FILL_AREA(#4099);
+#4099 = FILL_AREA_STYLE('',(#4100));
+#4100 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4101 = CURVE_STYLE('',#4102,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4102 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4103 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4104),#1489);
+#4104 = STYLED_ITEM('color',(#4105),#1451);
+#4105 = PRESENTATION_STYLE_ASSIGNMENT((#4106,#4111));
+#4106 = SURFACE_STYLE_USAGE(.BOTH.,#4107);
+#4107 = SURFACE_SIDE_STYLE('',(#4108));
+#4108 = SURFACE_STYLE_FILL_AREA(#4109);
+#4109 = FILL_AREA_STYLE('',(#4110));
+#4110 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4111 = CURVE_STYLE('',#4112,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4112 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4113 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4114),#1717);
+#4114 = STYLED_ITEM('color',(#4115),#1679);
+#4115 = PRESENTATION_STYLE_ASSIGNMENT((#4116,#4121));
+#4116 = SURFACE_STYLE_USAGE(.BOTH.,#4117);
+#4117 = SURFACE_SIDE_STYLE('',(#4118));
+#4118 = SURFACE_STYLE_FILL_AREA(#4119);
+#4119 = FILL_AREA_STYLE('',(#4120));
+#4120 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4121 = CURVE_STYLE('',#4122,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4122 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4123 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4124),#2572);
+#4124 = STYLED_ITEM('color',(#4125),#2534);
+#4125 = PRESENTATION_STYLE_ASSIGNMENT((#4126,#4131));
+#4126 = SURFACE_STYLE_USAGE(.BOTH.,#4127);
+#4127 = SURFACE_SIDE_STYLE('',(#4128));
+#4128 = SURFACE_STYLE_FILL_AREA(#4129);
+#4129 = FILL_AREA_STYLE('',(#4130));
+#4130 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4131 = CURVE_STYLE('',#4132,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4132 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4133 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4134),#1831);
+#4134 = STYLED_ITEM('color',(#4135),#1793);
+#4135 = PRESENTATION_STYLE_ASSIGNMENT((#4136,#4141));
+#4136 = SURFACE_STYLE_USAGE(.BOTH.,#4137);
+#4137 = SURFACE_SIDE_STYLE('',(#4138));
+#4138 = SURFACE_STYLE_FILL_AREA(#4139);
+#4139 = FILL_AREA_STYLE('',(#4140));
+#4140 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4141 = CURVE_STYLE('',#4142,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4142 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4143 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4144),#2629);
+#4144 = STYLED_ITEM('color',(#4145),#2591);
+#4145 = PRESENTATION_STYLE_ASSIGNMENT((#4146,#4151));
+#4146 = SURFACE_STYLE_USAGE(.BOTH.,#4147);
+#4147 = SURFACE_SIDE_STYLE('',(#4148));
+#4148 = SURFACE_STYLE_FILL_AREA(#4149);
+#4149 = FILL_AREA_STYLE('',(#4150));
+#4150 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4151 = CURVE_STYLE('',#4152,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4152 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4153 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4154),#2230);
+#4154 = STYLED_ITEM('color',(#4155),#2192);
+#4155 = PRESENTATION_STYLE_ASSIGNMENT((#4156,#4161));
+#4156 = SURFACE_STYLE_USAGE(.BOTH.,#4157);
+#4157 = SURFACE_SIDE_STYLE('',(#4158));
+#4158 = SURFACE_STYLE_FILL_AREA(#4159);
+#4159 = FILL_AREA_STYLE('',(#4160));
+#4160 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4161 = CURVE_STYLE('',#4162,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4162 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+#4163 = MECHANICAL_DESIGN_GEOMETRIC_PRESENTATION_REPRESENTATION('',(
+    #4164),#1660);
+#4164 = STYLED_ITEM('color',(#4165),#1622);
+#4165 = PRESENTATION_STYLE_ASSIGNMENT((#4166,#4171));
+#4166 = SURFACE_STYLE_USAGE(.BOTH.,#4167);
+#4167 = SURFACE_SIDE_STYLE('',(#4168));
+#4168 = SURFACE_STYLE_FILL_AREA(#4169);
+#4169 = FILL_AREA_STYLE('',(#4170));
+#4170 = FILL_AREA_STYLE_COLOUR('',#3617);
+#4171 = CURVE_STYLE('',#4172,POSITIVE_LENGTH_MEASURE(0.1),#3620);
+#4172 = DRAUGHTING_PRE_DEFINED_CURVE_FONT('continuous');
+ENDSEC;
+END-ISO-10303-21;
diff --git a/MANIFEST.csv b/MANIFEST.csv
index 3b977cf..f12b6c8 100644
--- a/MANIFEST.csv
+++ b/MANIFEST.csv
@@ -648,3 +648,14 @@ footprint,/Users/michelebigi/Downloads/LIB_LFE5U-45F-8BG381I (2)/LFE5U-45F-8BG38
 3d-model,/Users/michelebigi/Downloads/LIB_LFE5U-45F-8BG381I (2)/LFE5U-45F-8BG381I/3D/LFE5U-45F-8BG381I.stp,3dmodels/fpga_cpld/LFE5U-45F-8BG381I.step,DEDUPED,150aff8c77bc12906478fe2e81b8571c69e3e61d6ecd28e1e017f78d81d7137e,"byte-identical to the already-imported vendor 3D body; import_component.py wrote a duplicate .stp and left the footprint's bare 'LFE5U-45F-8BG381I.stp' model reference untouched (it only skips rewriting when a (model ...) block is already present) -- manually repointed the footprint to ${KIPRJMOD}/3dmodels/fpga_cpld/LFE5U-45F-8BG381I.step and deleted the duplicate .stp; category=fpga_cpld"
 symbol,symbols/fpga_cpld/Lattice_ECP_FPGA.kicad_sym,symbols/fpga_cpld/Lattice_ECP_FPGA.kicad_sym,MODIFIED,,"kept the flat SamacSys symbol MIKILAB_LFE5U_45F_8BG381I:LFE5U-45F-8BG381I as-is, and additionally made the existing 9-unit ECP5U_45_CABGA381 symbol (community-imported, per-bank split) usable/searchable for the same part: Value/manf# set to LFE5U-45F-8BG381I (ball-for-ball verified identical to the SamacSys symbol -- same 381 CABGA381 pad numbers, same net assignments, only pin-name spelling differs), Footprint linked to MIKILAB_LFE5U_45F_8BG381I:BGA381C80P20X20_1700X1700X176; category=fpga_cpld"
 symbol,/Users/michelebigi/Downloads/IS66WVE4M16EBLL_70BLI.zip,symbols/memory/IS66WVE4M16EBLL-70BLI.kicad_sym,MODIFIED,,"replaced the existing SnapEDA-sourced symbol with this newer SamacSys export of the same part (same 48-TFBGA package, footprint geometry byte-identical to the already-imported footprint/3D body -- no footprint/3D reimport needed); manually fixed the raw SamacSys Footprint property (was bare 'IS66WVE4M16EBLL-70BLI:BGA48C75P8X6_800X600X120N', which import_component.py --update leaves untouched) to the registered nickname 'MIKILAB_IS66WVE4M16EBLL_70BLI:BGA48C75P8X6_800X600X120N'; this drops the old symbol's SnapEDA metadata (pricing/availability/datasheet links) in favor of SamacSys mechanical properties (ENOM, STANDARD, PARTREV, etc); category=memory"
+symbol,/var/folders/cv/lwgyj_k14gx2rc3t2rlt29s80000gn/T/ultralibrarian_qksr5cxd/KiCADv6/2026-09-06_22-07-57.kicad_sym,symbols/other/AS4C32M16SA-7TCNTR.kicad_sym,NEW,7df36af2a45279b4dd2cd18c004f7af8be311d5d94fab1b84b61dce6abe2fc5b,category=other
+footprint,/var/folders/cv/lwgyj_k14gx2rc3t2rlt29s80000gn/T/ultralibrarian_qksr5cxd/KiCADv6/footprints.pretty/TSOP-54_MIL400_ALL.kicad_mod,footprints/other/AS4C32M16SA-7TCNTR.pretty/TSOP-54_MIL400_ALL.kicad_mod,NEW,5dbfb5fc2d619e1783358021d96deeaa81acd6ca385f843aaebff16fd23a845d,category=other
+symbol,hand-composed (no vendor export available for the -7BIN/FBGA variant),symbols/other/AS4C32M16SB-7BIN.kicad_sym,NEW,bb3d4afb87c8bef73d16062a976bac098ca860be2d01b4696d44ee0572837a47,"copied from the sibling MIKILAB_AS4C32M16SA_7TCNTR:AS4C32M16SA-7TCNTR symbol (SA/SB are the same 512Mb x16 SDRAM JEDEC pinout, only die revision differs -- confirmed against Alliance's own AS4C32M16SB datasheet Figure 1, whose 54-pin TSOP table is pin-for-pin identical to the SA symbol's numbering) and renumbered every pin from its TSOP pin# to the equivalent 54-ball FBGA designator per that same datasheet's Figure 1.1 Ball Assignment table (Rev1.4 June2024, https://www.alliancememory.com/wp-content/uploads/AllianceMemory_512M_SDRAM_Bdie_AS4C32M16SB-7TXN-6TIN-7BIN__Rev1.4_June2024NK.pdf); all 54 ball<->signal pairs cross-checked programmatically against the datasheet grid before import (zero mismatches); category=other"
+footprint,/Applications/KiCad/KiCad.app/Contents/SharedSupport/footprints/Package_BGA.pretty/Alliance_TFBGA-54_8x8mm_Layout9x9_P0.8mm.kicad_mod,footprints/other/AS4C32M16SB-7BIN.pretty/Alliance_TFBGA-54_8x8mm_Layout9x9_P0.8mm.kicad_mod,NEW,c445d3e488a9c7862d97893963634fcb655fa117657d05685585416d8de3ff5d,"reused verbatim from KiCad's own standard Package_BGA library -- it is itself an Alliance-specific footprint (name/descr credit Alliance Memory) whose 8x8x1.2mm body, 0.8mm ball pitch and 9x9-with-depopulated-center 54-ball layout match the AS4C32M16SB datasheet's Figure 44 package outline exactly; standard library is not registered in this project's tables (see README known-gap notes), so the file was imported directly rather than referenced by nickname. No local 3D STEP file exists for this community footprint (dangling ${KICAD10_3DMODEL_DIR} reference, flagged as a check_library.py warning, not an error) -- pads/silkscreen/courtyard are complete and correct, only the 3D preview is missing, same as other vendor-imported footprints in this library; category=other"
+symbol,/Users/michelebigi/Downloads/AS4C32M16SB-7BIN.zip,,ERROR,,"A component named 'AS4C32M16SB-7BIN' already exists: symbols/other/AS4C32M16SB-7BIN.kicad_sym. Refusing to overwrite -- choose a different --name, pass --update to replace it in place, or remove the existing component first."
+symbol,/var/folders/cv/lwgyj_k14gx2rc3t2rlt29s80000gn/T/snapeda_gdyhq56d/AS4C32M16SB-7BIN.kicad_sym,symbols/other/AS4C32M16SB-7BIN.kicad_sym,UPDATED,8c9036ad3656f73a9ca7321732378cb7911cc53e24d43680e413ad65de44d2ea,category=other
+footprint,/var/folders/cv/lwgyj_k14gx2rc3t2rlt29s80000gn/T/snapeda_gdyhq56d/BGA54C80P6X9_800X800X120N.kicad_mod,footprints/other/AS4C32M16SB-7BIN.pretty/BGA54C80P6X9_800X800X120N.kicad_mod,UPDATED,31a8ea90574e69564335225e6dcad0b13511bc21dea0bcc6cafe1269e8a4428f,category=other
+3d-model,/var/folders/cv/lwgyj_k14gx2rc3t2rlt29s80000gn/T/snapeda_gdyhq56d/AS4C32M16SB-7BIN.step,3dmodels/other/AS4C32M16SB-7BIN.step,NEW,7a5bcc16e3a4e761b9b21bb9f55213477abd19dcf4a1f78f81c4164ed887cb00,category=other
+footprint,/tmp/kcb_extract/kicad-castellated-breakouts-master/kicad-castellated-breakouts.pretty/QFP48-1.27MM-CASTELLATED.kicad_mod,footprints/other/castellated_breakouts.pretty/QFP48-1.27MM-CASTELLATED.kicad_mod,NEW,3337c229df872fa541e5c96f2c5525fc53600e77eec580ab93f020d41ab44a14,category=other
+footprint,/tmp/kcb_extract/kicad-castellated-breakouts-master/kicad-castellated-breakouts.pretty/QFP64-1.27MM-CASTELLATED.kicad_mod,footprints/other/castellated_breakouts.pretty/QFP64-1.27MM-CASTELLATED.kicad_mod,NEW,de3f682f79645ee434d0cbe850bc687bbd65e3cecde3a0c88fe91b84432d8021,category=other
+footprint,/tmp/kcb_extract/kicad-castellated-breakouts-master/kicad-castellated-breakouts.pretty/SSOP8-1.27MM-CASTELLATED.kicad_mod,footprints/other/castellated_breakouts.pretty/SSOP8-1.27MM-CASTELLATED.kicad_mod,NEW,3d3beb23324b47f2d46783f537b873f02658c5bd190096ec715119bfe3eb6a76,category=other
diff --git a/footprints/other/AS4C32M16SA-7TCNTR.pretty/TSOP-54_MIL400_ALL.kicad_mod b/footprints/other/AS4C32M16SA-7TCNTR.pretty/TSOP-54_MIL400_ALL.kicad_mod
new file mode 100644
index 0000000..fbf72a4
--- /dev/null
+++ b/footprints/other/AS4C32M16SA-7TCNTR.pretty/TSOP-54_MIL400_ALL.kicad_mod
@@ -0,0 +1,349 @@
+(footprint "TSOP-54_MIL400_ALL" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tags "AS4C32M16SA-7TCNTR ")
+  (attr smd)
+  (fp_text reference "REF**" (at 0 0 unlocked) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value TSOP-54_MIL400_ALL (at 0 0 unlocked) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text user "*" (at -5.9944 -12.050999) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text user "*" (at -4.7625 -11.0744) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_poly (pts
+      (xy -6.8453 -3.390501)
+      (xy -6.8453 -3.009501)
+      (xy -6.5913 -3.009501)
+      (xy -6.5913 -3.390501)
+    ) (layer "F.SilkS") (width 0) (fill solid))
+  (fp_poly (pts
+      (xy -6.8453 4.609498)
+      (xy -6.8453 4.990498)
+      (xy -6.5913 4.990498)
+      (xy -6.5913 4.609498)
+    ) (layer "F.SilkS") (width 0) (fill solid))
+  (fp_line (start -5.1435 -10.171399) (end -5.1435 -10.628599) (layer "F.Fab") (width 0.0254))
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+  (pad "21" smd rect (at -5.7404 5.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "22" smd rect (at -5.7404 6.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "23" smd rect (at -5.7404 7.199998) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "24" smd rect (at -5.7404 7.999999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "25" smd rect (at -5.7404 8.799998) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "26" smd rect (at -5.7404 9.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "27" smd rect (at -5.7404 10.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "28" smd rect (at 5.7404 10.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "29" smd rect (at 5.7404 9.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "30" smd rect (at 5.7404 8.8) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "31" smd rect (at 5.7404 7.999999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "32" smd rect (at 5.7404 7.200001) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "33" smd rect (at 5.7404 6.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "34" smd rect (at 5.7404 5.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "35" smd rect (at 5.7404 4.800001) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "36" smd rect (at 5.7404 4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "37" smd rect (at 5.7404 3.200001) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "38" smd rect (at 5.7404 2.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "39" smd rect (at 5.7404 1.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "40" smd rect (at 5.7404 0.800001) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "41" smd rect (at 5.7404 0) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "42" smd rect (at 5.7404 -0.799998) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "43" smd rect (at 5.7404 -1.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "44" smd rect (at 5.7404 -2.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "45" smd rect (at 5.7404 -3.199999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "46" smd rect (at 5.7404 -4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "47" smd rect (at 5.7404 -4.799998) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "48" smd rect (at 5.7404 -5.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "49" smd rect (at 5.7404 -6.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "50" smd rect (at 5.7404 -7.199998) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "51" smd rect (at 5.7404 -7.999999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "52" smd rect (at 5.7404 -8.799998) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "53" smd rect (at 5.7404 -9.599999) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+  (pad "54" smd rect (at 5.7404 -10.4) (size 1.1938 0.508) (layers "F.Cu" "F.Paste" "F.Mask"))
+)
diff --git a/footprints/other/AS4C32M16SB-7BIN.pretty/BGA54C80P6X9_800X800X120N.kicad_mod b/footprints/other/AS4C32M16SB-7BIN.pretty/BGA54C80P6X9_800X800X120N.kicad_mod
new file mode 100644
index 0000000..f0d527e
--- /dev/null
+++ b/footprints/other/AS4C32M16SB-7BIN.pretty/BGA54C80P6X9_800X800X120N.kicad_mod
@@ -0,0 +1,88 @@
+
+(footprint BGA54C80P6X9_800X800X120N (layer F.Cu) (tedit 6A9ED200)
+  (descr "")
+  (attr smd)
+  (fp_text reference REF** (at -1.825 -5.885 0) (layer F.SilkS)
+    (effects (font (size 1.0 1.0) (thickness 0.15)))
+  )
+  (fp_text value BGA54C80P6X9_800X800X120N (at 10.875 5.885 0) (layer F.Fab)
+    (effects (font (size 1.0 1.0) (thickness 0.15)))
+  )
+  (pad A1 smd circle (at -3.2 -3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad A2 smd circle (at -2.4 -3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad A3 smd circle (at -1.6 -3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad A7 smd circle (at 1.6 -3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad A8 smd circle (at 2.4 -3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad A9 smd circle (at 3.2 -3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad B1 smd circle (at -3.2 -2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad B2 smd circle (at -2.4 -2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad B3 smd circle (at -1.6 -2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad B7 smd circle (at 1.6 -2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad B8 smd circle (at 2.4 -2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad B9 smd circle (at 3.2 -2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad C1 smd circle (at -3.2 -1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad C2 smd circle (at -2.4 -1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad C3 smd circle (at -1.6 -1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad C7 smd circle (at 1.6 -1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad C8 smd circle (at 2.4 -1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad C9 smd circle (at 3.2 -1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad D1 smd circle (at -3.2 -0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad D2 smd circle (at -2.4 -0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad D3 smd circle (at -1.6 -0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad D7 smd circle (at 1.6 -0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad D8 smd circle (at 2.4 -0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad D9 smd circle (at 3.2 -0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad E1 smd circle (at -3.2 0.0) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad E2 smd circle (at -2.4 0.0) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad E3 smd circle (at -1.6 0.0) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad E7 smd circle (at 1.6 0.0) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad E8 smd circle (at 2.4 0.0) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad E9 smd circle (at 3.2 0.0) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad F1 smd circle (at -3.2 0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad F2 smd circle (at -2.4 0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad F3 smd circle (at -1.6 0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad F7 smd circle (at 1.6 0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad F8 smd circle (at 2.4 0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad F9 smd circle (at 3.2 0.8) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad G1 smd circle (at -3.2 1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad G2 smd circle (at -2.4 1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad G3 smd circle (at -1.6 1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad G7 smd circle (at 1.6 1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad G8 smd circle (at 2.4 1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad G9 smd circle (at 3.2 1.6) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad H1 smd circle (at -3.2 2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad H2 smd circle (at -2.4 2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad H3 smd circle (at -1.6 2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad H7 smd circle (at 1.6 2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad H8 smd circle (at 2.4 2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad H9 smd circle (at 3.2 2.4) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad J1 smd circle (at -3.2 3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad J2 smd circle (at -2.4 3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad J3 smd circle (at -1.6 3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad J7 smd circle (at 1.6 3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad J8 smd circle (at 2.4 3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (pad J9 smd circle (at 3.2 3.2) (size 0.41 0.41) (layers F.Cu F.Mask F.Paste) (solder_mask_margin 0.102))
+  (fp_circle (center -4.5 -3.2) (end -4.4 -3.2) (layer F.SilkS) (width 0.2))
+  (fp_circle (center -4.5 -3.2) (end -4.4 -3.2) (layer F.Fab) (width 0.2))
+  (fp_line (start 4.0 4.0) (end -4.0 4.0) (layer F.Fab) (width 0.127))
+  (fp_line (start 4.0 -4.0) (end -4.0 -4.0) (layer F.Fab) (width 0.127))
+  (fp_line (start 4.0 4.0) (end 4.0 -4.0) (layer F.Fab) (width 0.127))
+  (fp_line (start -4.0 4.0) (end -4.0 -4.0) (layer F.Fab) (width 0.127))
+  (fp_line (start 4.0 4.0) (end 2.0 4.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start 4.0 4.0) (end 4.0 2.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start -4.0 4.0) (end -2.0 4.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start -4.0 4.0) (end -4.0 2.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start -4.0 -4.0) (end -2.0 -4.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start -4.0 -4.0) (end -4.0 -2.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start 4.0 -4.0) (end 2.0 -4.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start 4.0 -4.0) (end 4.0 -2.0) (layer F.SilkS) (width 0.127))
+  (fp_line (start -5.0 5.0) (end 5.0 5.0) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -5.0 -5.0) (end 5.0 -5.0) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -5.0 5.0) (end -5.0 -5.0) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 5.0 5.0) (end 5.0 -5.0) (layer F.CrtYd) (width 0.05))
+  (model ${KIPRJMOD}/3dmodels/other/AS4C32M16SB-7BIN.step
+    (offset (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
diff --git a/footprints/other/castellated_breakouts.pretty/QFP48-1.27MM-CASTELLATED.kicad_mod b/footprints/other/castellated_breakouts.pretty/QFP48-1.27MM-CASTELLATED.kicad_mod
new file mode 100644
index 0000000..6cba2d5
--- /dev/null
+++ b/footprints/other/castellated_breakouts.pretty/QFP48-1.27MM-CASTELLATED.kicad_mod
@@ -0,0 +1,56 @@
+(module QFP48-1.27MM-CASTELLATED (layer F.Cu) (tedit 5A3B5D1F)
+  (fp_text reference REF** (at 1.905 -13.335) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value QFP48-CASTELLATED (at 1.905 9.525) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 smd rect (at -6.985 -8.89) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -6.985 -7.62) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at -6.985 -6.35) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at -6.985 -5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at -6.985 -3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at -6.985 -2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at -6.985 -1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at -6.985 0) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 9 smd rect (at -6.985 1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 10 smd rect (at -6.985 2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 11 smd rect (at -6.985 3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 12 smd rect (at -6.985 5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 13 smd rect (at -5.08 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 14 smd rect (at -3.81 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 15 smd rect (at -2.54 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 16 smd rect (at -1.27 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 17 smd rect (at 0 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 18 smd rect (at 1.27 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 19 smd rect (at 2.54 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 20 smd rect (at 3.81 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 21 smd rect (at 5.08 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 22 smd rect (at 6.35 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 23 smd rect (at 7.62 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 24 smd rect (at 8.89 6.985) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 25 smd rect (at 10.795 5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 26 smd rect (at 10.795 3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 27 smd rect (at 10.795 2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 28 smd rect (at 10.795 1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 29 smd rect (at 10.795 0) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 30 smd rect (at 10.795 -1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 31 smd rect (at 10.795 -2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 32 smd rect (at 10.795 -3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 33 smd rect (at 10.795 -5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 34 smd rect (at 10.795 -6.35) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 35 smd rect (at 10.795 -7.62) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 36 smd rect (at 10.795 -8.89) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 37 smd rect (at 8.89 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 38 smd rect (at 7.62 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 39 smd rect (at 6.35 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 40 smd rect (at 5.08 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 41 smd rect (at 3.81 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 42 smd rect (at 2.54 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 43 smd rect (at 1.27 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 44 smd rect (at 0 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 45 smd rect (at -1.27 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 46 smd rect (at -2.54 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 47 smd rect (at -3.81 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 48 smd rect (at -5.08 -10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+)
diff --git a/footprints/other/castellated_breakouts.pretty/QFP64-1.27MM-CASTELLATED.kicad_mod b/footprints/other/castellated_breakouts.pretty/QFP64-1.27MM-CASTELLATED.kicad_mod
new file mode 100644
index 0000000..f544f2d
--- /dev/null
+++ b/footprints/other/castellated_breakouts.pretty/QFP64-1.27MM-CASTELLATED.kicad_mod
@@ -0,0 +1,72 @@
+(module QFP64-1.27MM-CASTELLATED (layer F.Cu) (tedit 5A3B5D12)
+  (fp_text reference REF** (at 1.27 -14.605) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value QFP64-CASTELLATED (at 1.27 13.335) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 smd rect (at -10.16 -10.16) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -10.16 -8.89) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at -10.16 -7.62) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at -10.16 -6.35) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at -10.16 -5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at -10.16 -3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at -10.16 -2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at -10.16 -1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 9 smd rect (at -10.16 0) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 10 smd rect (at -10.16 1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 11 smd rect (at -10.16 2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 12 smd rect (at -10.16 3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 13 smd rect (at -10.16 5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 14 smd rect (at -10.16 6.35) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 15 smd rect (at -10.16 7.62) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 16 smd rect (at -10.16 8.89) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 17 smd rect (at -8.255 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 18 smd rect (at -6.985 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 19 smd rect (at -5.715 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 20 smd rect (at -4.445 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 21 smd rect (at -3.175 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 22 smd rect (at -1.905 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 23 smd rect (at -0.635 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 24 smd rect (at 0.635 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 25 smd rect (at 1.905 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 26 smd rect (at 3.175 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 27 smd rect (at 4.445 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 28 smd rect (at 5.715 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 29 smd rect (at 6.985 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 30 smd rect (at 8.255 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 31 smd rect (at 9.525 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 32 smd rect (at 10.795 10.795) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 33 smd rect (at 12.7 8.89) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 34 smd rect (at 12.7 7.62) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 35 smd rect (at 12.7 6.35) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 36 smd rect (at 12.7 5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 37 smd rect (at 12.7 3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 38 smd rect (at 12.7 2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 39 smd rect (at 12.7 1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 40 smd rect (at 12.7 0) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 41 smd rect (at 12.7 -1.27) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 42 smd rect (at 12.7 -2.54) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 43 smd rect (at 12.7 -3.81) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 44 smd rect (at 12.7 -5.08) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 45 smd rect (at 12.7 -6.35) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 46 smd rect (at 12.7 -7.62) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 47 smd rect (at 12.7 -8.89) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 48 smd rect (at 12.7 -10.16) (size 2 1) (layers F.Cu F.Paste F.Mask))
+  (pad 49 smd rect (at 10.795 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 50 smd rect (at 9.525 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 51 smd rect (at 8.255 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 52 smd rect (at 6.985 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 53 smd rect (at 5.715 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 54 smd rect (at 4.445 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 55 smd rect (at 3.175 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 56 smd rect (at 1.905 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 57 smd rect (at 0.635 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 58 smd rect (at -0.635 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 59 smd rect (at -1.905 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 60 smd rect (at -3.175 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 61 smd rect (at -4.445 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 62 smd rect (at -5.715 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 63 smd rect (at -6.985 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+  (pad 64 smd rect (at -8.255 -12.065) (size 1 2) (layers F.Cu F.Paste F.Mask))
+)
diff --git a/footprints/other/castellated_breakouts.pretty/SSOP8-1.27MM-CASTELLATED.kicad_mod b/footprints/other/castellated_breakouts.pretty/SSOP8-1.27MM-CASTELLATED.kicad_mod
new file mode 100644
index 0000000..883aa54
--- /dev/null
+++ b/footprints/other/castellated_breakouts.pretty/SSOP8-1.27MM-CASTELLATED.kicad_mod
@@ -0,0 +1,20 @@
+(module SSOP8-1.27MM-CASTELLATED (layer F.Cu) (tedit 5A3B5D8D)
+  (fp_text reference REF** (at 0 -3.81) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value SSOP8 (at 0 5.08) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -5.715 -2.54) (end 6.35 -2.54) (layer F.SilkS) (width 0.15))
+  (fp_line (start 6.35 -2.54) (end 6.35 3.81) (layer F.SilkS) (width 0.15))
+  (fp_line (start 6.35 3.81) (end -5.715 3.81) (layer F.SilkS) (width 0.15))
+  (fp_line (start -5.715 3.81) (end -5.715 -2.54) (layer F.SilkS) (width 0.15))
+  (pad 1 smd rect (at -5.43 -1.27) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -5.43 0) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at -5.43 1.27) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at -5.43 2.54) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at 6.065 2.54) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at 6.065 1.27) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at 6.065 0) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at 6.065 -1.27) (size 2 1.05) (layers F.Cu F.Paste F.Mask))
+)
diff --git a/fp-lib-table b/fp-lib-table
index f9d0909..a1ccf01 100644
--- a/fp-lib-table
+++ b/fp-lib-table
@@ -38,6 +38,8 @@
   (lib (name "MIKILAB_25AA1024")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/25AA1024.pretty")(options "")(descr "25AA1024.pretty"))
   (lib (name "MIKILAB_ADG936BCPZ")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/ADG936BCPZ.pretty")(options "")(descr "ADG936BCPZ.pretty"))
   (lib (name "MIKILAB_ADG936BRUZ")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/ADG936BRUZ.pretty")(options "")(descr "ADG936BRUZ.pretty"))
+  (lib (name "MIKILAB_AS4C32M16SA_7TCNTR")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/AS4C32M16SA-7TCNTR.pretty")(options "")(descr "AS4C32M16SA-7TCNTR.pretty"))
+  (lib (name "MIKILAB_AS4C32M16SB_7BIN")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/AS4C32M16SB-7BIN.pretty")(options "")(descr "AS4C32M16SB-7BIN.pretty"))
   (lib (name "MIKILAB_CDCLVC1102PW")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/CDCLVC1102PW.pretty")(options "")(descr "CDCLVC1102PW.pretty"))
   (lib (name "MIKILAB_DMT6007LFG_7")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/DMT6007LFG-7.pretty")(options "")(descr "DMT6007LFG-7.pretty"))
   (lib (name "MIKILAB_ESD9B5_0ST5G")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/ESD9B5.0ST5G.pretty")(options "")(descr "ESD9B5.0ST5G.pretty"))
@@ -62,6 +64,7 @@
   (lib (name "MIKILAB_beaglebone_black")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/beaglebone_black.pretty")(options "")(descr "beaglebone_black.pretty"))
   (lib (name "MIKILAB_bel_fuse")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/bel_fuse.pretty")(options "")(descr "bel_fuse.pretty"))
   (lib (name "MIKILAB_bourns")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/bourns.pretty")(options "")(descr "bourns.pretty"))
+  (lib (name "MIKILAB_castellated_breakouts")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/castellated_breakouts.pretty")(options "")(descr "castellated_breakouts.pretty"))
   (lib (name "MIKILAB_ck")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/ck.pretty")(options "")(descr "ck.pretty"))
   (lib (name "MIKILAB_coilcraft")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/coilcraft.pretty")(options "")(descr "coilcraft.pretty"))
   (lib (name "MIKILAB_cts")(type "KiCad")(uri "${KIPRJMOD}/footprints/other/cts.pretty")(options "")(descr "cts.pretty"))
diff --git a/fp-lib-table.global b/fp-lib-table.global
index 1d9bfef..3c3d17b 100644
--- a/fp-lib-table.global
+++ b/fp-lib-table.global
@@ -38,6 +38,8 @@
   (lib (name "MIKILAB_25AA1024")(type "KiCad")(uri "${MIKILAB}/footprints/other/25AA1024.pretty")(options "")(descr "25AA1024.pretty"))
   (lib (name "MIKILAB_ADG936BCPZ")(type "KiCad")(uri "${MIKILAB}/footprints/other/ADG936BCPZ.pretty")(options "")(descr "ADG936BCPZ.pretty"))
   (lib (name "MIKILAB_ADG936BRUZ")(type "KiCad")(uri "${MIKILAB}/footprints/other/ADG936BRUZ.pretty")(options "")(descr "ADG936BRUZ.pretty"))
+  (lib (name "MIKILAB_AS4C32M16SA_7TCNTR")(type "KiCad")(uri "${MIKILAB}/footprints/other/AS4C32M16SA-7TCNTR.pretty")(options "")(descr "AS4C32M16SA-7TCNTR.pretty"))
+  (lib (name "MIKILAB_AS4C32M16SB_7BIN")(type "KiCad")(uri "${MIKILAB}/footprints/other/AS4C32M16SB-7BIN.pretty")(options "")(descr "AS4C32M16SB-7BIN.pretty"))
   (lib (name "MIKILAB_CDCLVC1102PW")(type "KiCad")(uri "${MIKILAB}/footprints/other/CDCLVC1102PW.pretty")(options "")(descr "CDCLVC1102PW.pretty"))
   (lib (name "MIKILAB_DMT6007LFG_7")(type "KiCad")(uri "${MIKILAB}/footprints/other/DMT6007LFG-7.pretty")(options "")(descr "DMT6007LFG-7.pretty"))
   (lib (name "MIKILAB_ESD9B5_0ST5G")(type "KiCad")(uri "${MIKILAB}/footprints/other/ESD9B5.0ST5G.pretty")(options "")(descr "ESD9B5.0ST5G.pretty"))
@@ -62,6 +64,7 @@
   (lib (name "MIKILAB_beaglebone_black")(type "KiCad")(uri "${MIKILAB}/footprints/other/beaglebone_black.pretty")(options "")(descr "beaglebone_black.pretty"))
   (lib (name "MIKILAB_bel_fuse")(type "KiCad")(uri "${MIKILAB}/footprints/other/bel_fuse.pretty")(options "")(descr "bel_fuse.pretty"))
   (lib (name "MIKILAB_bourns")(type "KiCad")(uri "${MIKILAB}/footprints/other/bourns.pretty")(options "")(descr "bourns.pretty"))
+  (lib (name "MIKILAB_castellated_breakouts")(type "KiCad")(uri "${MIKILAB}/footprints/other/castellated_breakouts.pretty")(options "")(descr "castellated_breakouts.pretty"))
   (lib (name "MIKILAB_ck")(type "KiCad")(uri "${MIKILAB}/footprints/other/ck.pretty")(options "")(descr "ck.pretty"))
   (lib (name "MIKILAB_coilcraft")(type "KiCad")(uri "${MIKILAB}/footprints/other/coilcraft.pretty")(options "")(descr "coilcraft.pretty"))
   (lib (name "MIKILAB_cts")(type "KiCad")(uri "${MIKILAB}/footprints/other/cts.pretty")(options "")(descr "cts.pretty"))
diff --git a/reference/kicad-castellated-breakouts/SOURCE.md b/reference/kicad-castellated-breakouts/SOURCE.md
new file mode 100644
index 0000000..081818d
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/SOURCE.md
@@ -0,0 +1,18 @@
+# Source
+
+Imported from [kicad-castellated-breakouts](https://github.com/coddingtonbear/kicad-castellated-breakouts)
+(zip snapshot, 2017-12-22).
+
+This folder is reference material only -- full KiCad board projects meant
+to be sent to a fab to produce ready-made castellated breakout adapters
+for fine-pitch QFP/SSOP packages. It is not part of this library's
+symbol/footprint/3D-model structure (no `sym-lib-table`/`fp-lib-table`
+entries reference anything here).
+
+The three footprints extracted from this project's `.pretty` library
+(`QFP48-1.27MM-CASTELLATED`, `QFP64-1.27MM-CASTELLATED`,
+`SSOP8-1.27MM-CASTELLATED`) were imported separately into
+`footprints/other/castellated_breakouts.pretty/` and are registered as
+`MIKILAB_castellated_breakouts` in `fp-lib-table`. See `readme.md` in
+this folder (the upstream project's own README) for pin-pitch/package
+compatibility details and OshPark links for each board.
diff --git a/reference/kicad-castellated-breakouts/qfp48_0.5mm/qfp48_0.5mm.kicad_pcb b/reference/kicad-castellated-breakouts/qfp48_0.5mm/qfp48_0.5mm.kicad_pcb
new file mode 100644
index 0000000..a507aa3
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/qfp48_0.5mm/qfp48_0.5mm.kicad_pcb
@@ -0,0 +1,485 @@
+(kicad_pcb (version 20171130) (host pcbnew "(2017-12-14 revision 75b21d0)-master")
+
+  (general
+    (thickness 1.6)
+    (drawings 5)
+    (tracks 152)
+    (zones 0)
+    (modules 1)
+    (nets 1)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 1)
+    (via_drill 0.5)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask true)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 1)
+    (via_drill 0.5)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+  )
+
+  (module adamgreig/agg-kicad/agg.pretty:LQFP-48 (layer F.Cu) (tedit 5A3B23AE) (tstamp 5A4DD8BC)
+    (at 171.45 78.105)
+    (fp_text reference REF** (at 0 -5.9) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value QFP48 (at 0 6.35) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -5.2 5.2) (end -5.2 -5.2) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 5.2 5.2) (end -5.2 5.2) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 5.2 -5.2) (end 5.2 5.2) (layer F.CrtYd) (width 0.01))
+    (fp_line (start -5.2 -5.2) (end 5.2 -5.2) (layer F.CrtYd) (width 0.01))
+    (fp_line (start -2.95 -2.35) (end -2.35 -2.95) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.95 2.95) (end -2.95 -2.35) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.95 2.95) (end -2.95 2.95) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.95 -2.95) (end 2.95 2.95) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.35 -2.95) (end 2.95 -2.95) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.615 4.6) (end 2.615 3.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.885 4.6) (end 2.615 4.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.885 3.6) (end 2.885 4.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.115 4.6) (end 2.115 3.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.385 4.6) (end 2.115 4.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.385 3.6) (end 2.385 4.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 1.615 4.6) (end 1.615 3.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 1.885 4.6) (end 1.615 4.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 1.885 3.6) (end 1.885 4.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 1.115 4.6) (end 1.115 3.6) (layer F.Fab) (width 0.01))
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+)
diff --git a/reference/kicad-castellated-breakouts/qfp48_0.5mm/qfp48_0.5mm.pro b/reference/kicad-castellated-breakouts/qfp48_0.5mm/qfp48_0.5mm.pro
new file mode 100644
index 0000000..152769c
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/qfp48_0.5mm/qfp48_0.5mm.pro
@@ -0,0 +1,33 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
diff --git a/reference/kicad-castellated-breakouts/qfp64_0.5mm/qfp64.kicad_pcb b/reference/kicad-castellated-breakouts/qfp64_0.5mm/qfp64.kicad_pcb
new file mode 100644
index 0000000..bcc53bb
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/qfp64_0.5mm/qfp64.kicad_pcb
@@ -0,0 +1,614 @@
+(kicad_pcb (version 20171130) (host pcbnew "(2017-12-14 revision 75b21d0)-master")
+
+  (general
+    (thickness 1.6)
+    (drawings 5)
+    (tracks 216)
+    (zones 0)
+    (modules 1)
+    (nets 1)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.4)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 1)
+    (via_drill 0.5)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (user_via 1 0.5)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010f0_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask true)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.4)
+    (trace_width 0.25)
+    (via_dia 1)
+    (via_drill 0.5)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+  )
+
+  (module adamgreig/agg-kicad/agg.pretty:LQFP-64 (layer F.Cu) (tedit 5A3B3425) (tstamp 5A5FE408)
+    (at 139.065 76.835)
+    (fp_text reference REF** (at 0 -7.4) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value QFP64 (at 0 8.255) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -6.7 6.7) (end -6.7 -6.7) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 6.7 6.7) (end -6.7 6.7) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 6.7 -6.7) (end 6.7 6.7) (layer F.CrtYd) (width 0.01))
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+  (segment (start 141.815 71.135) (end 141.815 69.64) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 141.815 69.64) (end 146.05 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 141.315 71.135) (end 141.315 68.87) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 141.315 68.87) (end 144.78 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 140.815 71.135) (end 140.815 68.1) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 140.815 68.1) (end 143.51 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 140.315 71.135) (end 140.315 67.33) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 140.315 67.33) (end 142.24 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 139.815 71.135) (end 139.815 66.56) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 139.815 66.56) (end 140.97 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 139.315 71.135) (end 139.315 65.79) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 139.315 65.79) (end 139.7 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 135.315 71.135) (end 135.27 71.135) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 135.27 71.135) (end 129.54 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 135.815 71.135) (end 135.815 70.41) (width 0.25) (layer F.Cu) (net 0))
+  (via (at 130.81 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (segment (start 136.315 71.135) (end 136.315 69.64) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 136.315 69.64) (end 132.08 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 136.815 71.135) (end 136.815 68.87) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 136.815 68.87) (end 133.35 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 137.315 71.135) (end 137.315 68.1) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 137.315 68.1) (end 134.62 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 137.815 71.135) (end 137.815 67.33) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 137.815 67.33) (end 135.89 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 138.315 71.135) (end 138.315 66.56) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 138.315 66.56) (end 137.16 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 138.815 71.135) (end 138.815 65.79) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 138.815 65.79) (end 138.43 65.405) (width 0.25) (layer F.Cu) (net 0))
+  (via (at 127.635 67.31) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 68.58) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 69.85) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 71.12) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 72.39) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 73.66) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 74.93) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 76.2) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 77.47) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 78.74) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 80.01) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 81.28) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 82.55) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 83.82) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 85.09) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 127.635 86.36) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 129.54 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 130.81 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 132.08 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 133.35 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 134.62 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 135.89 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 137.16 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 138.43 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 139.7 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 140.97 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 142.24 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 143.51 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 144.78 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 146.05 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 147.32 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 148.59 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 86.36) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 85.09) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 83.82) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 82.55) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 81.28) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 80.01) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 78.74) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 77.47) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 76.2) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 74.93) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 73.66) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 72.39) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 71.12) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 69.85) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 68.58) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 150.495 67.31) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 129.54 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 132.08 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 133.35 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 134.62 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 135.89 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 137.16 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 138.43 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 139.7 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 140.97 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 142.24 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 143.51 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 144.78 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 146.05 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 147.32 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 148.59 65.405) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+
+)
diff --git a/reference/kicad-castellated-breakouts/qfp64_0.5mm/qfp64.pro b/reference/kicad-castellated-breakouts/qfp64_0.5mm/qfp64.pro
new file mode 100644
index 0000000..8fe1816
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/qfp64_0.5mm/qfp64.pro
@@ -0,0 +1,63 @@
+update=Wednesday, November 22, 2017 'PMt' 03:36:40 PM
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+LibName30=stm32
diff --git a/reference/kicad-castellated-breakouts/readme.md b/reference/kicad-castellated-breakouts/readme.md
new file mode 100644
index 0000000..3b4ab8c
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/readme.md
@@ -0,0 +1,127 @@
+# Castellated Breakouts for KiCad
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/castellated_example.jpg)
+
+Do you own a milling machine that isn't _quite_ precise enough for that
+0.5mm-pitch IC you want to use?  Maybe you like to home-etch your PCBs,
+but you haven't quite worked out a way of consistently exposing tiny
+0.2mm traces?  The board designs and footprints in this repository
+can help you continue to develop your bespoke hand-crafted electronics
+projects at home by letting PCB board houses handle the parts of your
+design that are just a little too difficult to be worth fighting with
+on your own.
+
+Each board in this repository can be plotted in KiCad and sent off to your
+favorite board house (OshPark links are provided below) so you can have
+boards for your favorite ICs readily-available for the next time you'd
+like to use them in a design.
+
+## Boards
+
+### QFP64 (0.5mm pitch)
+
+<a href="https://oshpark.com/shared_projects/qaabAuOa"><img src="https://oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/qfp64_fcu_2.1.png)
+
+* IC Pin Pitch: 0.5mm
+* Compatible packages: QFP64 (BQFP64, CQFP64, LQFP64, TQFP64, etc).  No
+  center pad.
+* Castellation Pitch: 1.27mm
+* Board Files: [qfp64_0.5mm](qfp64_0.5mm)
+
+### QFP48 (0.5mm pitch)
+
+<a href="https://www.oshpark.com/shared_projects/mXCVQoyT"><img src="https://www.oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/qfp48_fcu.png)
+
+* IC Pin Pitch: 0.5mm
+* Compatible packages: QFP48 (BQFP48, CQFP48, LQFP48, TQFP48, etc).  No
+  center pad.
+* Castellation Pitch: 1.27mm
+* Board Files: [qfp48_0.5mm](qfp48_0.5mm)
+
+### SSOP20 (0.65mm pitch)
+
+<a href="https://oshpark.com/shared_projects/HR54aK0e"><img src="https://oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/ssop20_fcu.png)
+
+* IC Pin Pitch: 0.65mm
+* Compatible packages: SSOP20 (TSSOP20, etc) having a width (including pins)
+  smaller than 11mm, and having at least 3mm of space available between the
+  two rows of pins.
+* Castellation Pitch: 1.27mm
+* Board Files [ssop20_0.65mm](ssop20_0.65mm)
+
+### SSOP8 (0.65mm pitch)
+
+<a href="https://oshpark.com/shared_projects/lRtqVrhi"><img src="https://oshpark.com/assets/badge-5b7ec47045b78aef6eb9d83b3bac6b1920de805e9a0c227658eac6e19a045b9c.png" alt="Order from OSH Park" align="right"></img></a>
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/ssop8_fcu.png)
+
+* IC Pin Pitch: 0.65mm
+* Compatible packages: SSOP8 (TSSOP8, etc) having a width (including pins)
+  smaller than 9mm.  No center pad.
+* Castellation Pitch: 1.27mm
+* Board Files: [ssop8_0.65mm](ssop8_0.65mm)
+
+## Plotting
+
+You can plot these on your own in KiCad, just make sure that you do *not*
+tent vias.  The way castellations are implemented for at least OshPark
+involve having vias on the edge of the board, and routing the board
+board outline through the center of those vias.  If the vias were
+tented, you would not be able to easily solder to them!
+
+For reference, the settings I've used in generating my plots for OshPark
+are below:
+
+### Copper
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/plot_copper.png)
+
+### Drill
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/plot_drill.png)
+
+## Contribution Guidelines
+
+This is by no means a prescriptive rule, but if you do find yourself attempting
+to contribute a new board or footprint, you may replicate the via spacing
+and trace sizes I've used above by configuring your design rules as so:
+
+![](https://s3-us-west-2.amazonaws.com/coddingtonbear-public/github/kicad-castellated-breakouts/design_rules.png)
+
+Note that you will want to select the custom via setting (1mm diameter with 0.5mm drill)
+when placing the castellation vias.
+
+Matching the patterns used for other footprints is _not_ absolutely necessary,
+but if you submit a new breakout board, please try to follow the following
+guidelines:
+
+* Place your project in a folder named by the following pattern: `<FOOTPRINT><PIN_COUNT>_<PITCH>`,
+  where `<FOOTPRINT>` is the name of the footprint type (`QFN`, `QFP`, `SSOP`) with as general of
+  a name as possible (that is, exclude prefixes that affect only the height of the package -- 
+  suffixes like `T` or `L`, for example), `<PIN_COUNT>` is the total count of pins, and `<PITCH>`
+  is the pin pitch (with units -- millimeters preferred).
+* Update the reademe to include a section similar to the sections you see above including:
+  * A title identifying your new castellated board.
+  * A bulleted list describing the following details:
+    * The pin pitch of the footprint.
+    * A list of common compatible packages including whether the footprint
+      includes a center pad.
+    * The pitch of castellations.
+    * A link to the folder in which you've placed your project's board files.
+  * (Optional) A link to an OshPark project for that footprint.
+  * (Optional) An image, preferably from the OshPark preview, of the front
+  copper layer of the breakout board.  Note that you need not host the
+  image -- as part of merging your PR, the image will be moved to this
+  project's folder in S3.
+
+## Disclaimer
+
+I am a hobbyist -- not an expert!  If you see a problem in the design of
+any linked boards or have suggestions that might make this project more
+useful, I'd love to hear them!
diff --git a/reference/kicad-castellated-breakouts/ssop20_0.65mm/ssop20_0.65mm.kicad_pcb b/reference/kicad-castellated-breakouts/ssop20_0.65mm/ssop20_0.65mm.kicad_pcb
new file mode 100644
index 0000000..fd3e03d
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/ssop20_0.65mm/ssop20_0.65mm.kicad_pcb
@@ -0,0 +1,288 @@
+(kicad_pcb (version 20170920) (host pcbnew "(2017-09-25 revision 6e440ff)-master")
+
+  (general
+    (thickness 1.6)
+    (drawings 6)
+    (tracks 68)
+    (zones 0)
+    (modules 1)
+    (nets 1)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (user_via 1 0.5)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 3 0.45)
+    (pad_drill 0)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010f0_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask true)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+  )
+
+  (module adamgreig/agg-kicad/agg.pretty:SSOP-20 (layer F.Cu) (tedit 5A1A274A) (tstamp 5A74D0A9)
+    (at 116.205 79.375)
+    (fp_text reference REF** (at 0 -4.55) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value SSOP-20 (at 0 4.55) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -4.7 3.85) (end -4.7 -3.85) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 4.7 3.85) (end -4.7 3.85) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 4.7 -3.85) (end 4.7 3.85) (layer F.CrtYd) (width 0.01))
+    (fp_line (start -4.7 -3.85) (end 4.7 -3.85) (layer F.CrtYd) (width 0.01))
+    (fp_line (start 4.1 -2.735) (end 2.8 -2.735) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -3.115) (end 4.1 -2.735) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 -3.115) (end 4.1 -3.115) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -2.085) (end 2.8 -2.085) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -2.465) (end 4.1 -2.085) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 -2.465) (end 4.1 -2.465) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -1.435) (end 2.8 -1.435) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -1.815) (end 4.1 -1.435) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 -1.815) (end 4.1 -1.815) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -0.785) (end 2.8 -0.785) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -1.165) (end 4.1 -0.785) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 -1.165) (end 4.1 -1.165) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -0.135) (end 2.8 -0.135) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 -0.515) (end 4.1 -0.135) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 -0.515) (end 4.1 -0.515) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 0.515) (end 2.8 0.515) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 0.135) (end 4.1 0.515) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 0.135) (end 4.1 0.135) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 1.165) (end 2.8 1.165) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 0.785) (end 4.1 1.165) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 0.785) (end 4.1 0.785) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 1.815) (end 2.8 1.815) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 1.435) (end 4.1 1.815) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 1.435) (end 4.1 1.435) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 2.465) (end 2.8 2.465) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 2.085) (end 4.1 2.465) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 2.085) (end 4.1 2.085) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 3.115) (end 2.8 3.115) (layer F.Fab) (width 0.01))
+    (fp_line (start 4.1 2.735) (end 4.1 3.115) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 2.735) (end 4.1 2.735) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 3.115) (end -4.1 2.735) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 3.115) (end -4.1 3.115) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 2.735) (end -2.8 2.735) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 2.465) (end -4.1 2.085) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 2.465) (end -4.1 2.465) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 2.085) (end -2.8 2.085) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 1.815) (end -4.1 1.435) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 1.815) (end -4.1 1.815) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 1.435) (end -2.8 1.435) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 1.165) (end -4.1 0.785) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 1.165) (end -4.1 1.165) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 0.785) (end -2.8 0.785) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 0.515) (end -4.1 0.135) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 0.515) (end -4.1 0.515) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 0.135) (end -2.8 0.135) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -0.135) (end -4.1 -0.515) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 -0.135) (end -4.1 -0.135) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -0.515) (end -2.8 -0.515) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -0.785) (end -4.1 -1.165) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 -0.785) (end -4.1 -0.785) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -1.165) (end -2.8 -1.165) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -1.435) (end -4.1 -1.815) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 -1.435) (end -4.1 -1.435) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -1.815) (end -2.8 -1.815) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -2.085) (end -4.1 -2.465) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 -2.085) (end -4.1 -2.085) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -2.465) (end -2.8 -2.465) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -2.735) (end -4.1 -3.115) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 -2.735) (end -4.1 -2.735) (layer F.Fab) (width 0.01))
+    (fp_line (start -4.1 -3.115) (end -2.8 -3.115) (layer F.Fab) (width 0.01))
+    (fp_circle (center -2 -2.8) (end -2 -2.4) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 3.6) (end -2.8 -3.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 3.6) (end -2.8 3.6) (layer F.Fab) (width 0.01))
+    (fp_line (start 2.8 -3.6) (end 2.8 3.6) (layer F.Fab) (width 0.01))
+    (fp_line (start -2.8 -3.6) (end 2.8 -3.6) (layer F.Fab) (width 0.01))
+    (pad 20 smd rect (at 3.5 -2.925) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 19 smd rect (at 3.5 -2.275) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 18 smd rect (at 3.5 -1.625) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 17 smd rect (at 3.5 -0.975) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 16 smd rect (at 3.5 -0.325) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 15 smd rect (at 3.5 0.325) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 14 smd rect (at 3.5 0.975) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 13 smd rect (at 3.5 1.625) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 12 smd rect (at 3.5 2.275) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 11 smd rect (at 3.5 2.925) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 10 smd rect (at -3.5 2.925) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 9 smd rect (at -3.5 2.275) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 8 smd rect (at -3.5 1.625) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 7 smd rect (at -3.5 0.975) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 6 smd rect (at -3.5 0.325) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 5 smd rect (at -3.5 -0.325) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 4 smd rect (at -3.5 -0.975) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 3 smd rect (at -3.5 -1.625) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 2 smd rect (at -3.5 -2.275) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (pad 1 smd rect (at -3.5 -2.925) (size 4 0.45) (layers F.Cu F.Paste F.Mask))
+    (model ${KISYS3DMOD}/Housings_SSOP.3dshapes/SSOP-20_5.3x7.2mm_Pitch0.65mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_text "Castellated SSOP20 Breakout\n@coddingtonbear\n25 Nov 2017\n\n0.65mm Pitch\nMin 3mm Width\nMax 11mm WIdth" (at 108.6612 76.327) (layer B.SilkS)
+    (effects (font (size 0.5 0.5) (thickness 0.125)) (justify right mirror))
+  )
+  (gr_text SSOP20 (at 116.205 84.455) (layer F.SilkS)
+    (effects (font (size 1.5 1.5) (thickness 0.3)))
+  )
+  (gr_line (start 107.95 85.725) (end 107.95 73.025) (layer Edge.Cuts) (width 0.2))
+  (gr_line (start 124.46 85.725) (end 107.95 85.725) (layer Edge.Cuts) (width 0.2))
+  (gr_line (start 124.46 73.025) (end 124.46 85.725) (layer Edge.Cuts) (width 0.2))
+  (gr_line (start 107.95 73.025) (end 124.46 73.025) (layer Edge.Cuts) (width 0.2))
+
+  (segment (start 112.705 79.7) (end 108.26 79.7) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 108.26 79.7) (end 107.95 80.01) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 80.35) (end 108.88 80.35) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 108.88 80.35) (end 107.95 81.28) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 81) (end 109.5 81) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 109.5 81) (end 107.95 82.55) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 81.65) (end 110.12 81.65) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 110.12 81.65) (end 107.95 83.82) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 82.3) (end 112.705 82.775) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 82.775) (end 110.39 85.09) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 110.39 85.09) (end 108.657106 85.09) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 108.657106 85.09) (end 107.95 85.09) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 79.05) (end 108.26 79.05) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 108.26 79.05) (end 107.95 78.74) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 78.4) (end 108.88 78.4) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 108.88 78.4) (end 107.95 77.47) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 77.75) (end 109.5 77.75) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 109.5 77.75) (end 107.95 76.2) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 77.1) (end 110.12 77.1) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 110.12 77.1) (end 107.95 74.93) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 76.45) (end 112.705 75.975) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 112.705 75.975) (end 110.39 73.66) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 108.657106 73.66) (end 107.95 73.66) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 110.39 73.66) (end 108.657106 73.66) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 79.7) (end 124.15 79.7) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 124.15 79.7) (end 124.46 80.01) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 80.35) (end 123.53 80.35) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 123.53 80.35) (end 124.46 81.28) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 81) (end 122.91 81) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 122.91 81) (end 124.46 82.55) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 81.65) (end 122.29 81.65) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 122.29 81.65) (end 124.46 83.82) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 82.3) (end 119.705 82.775) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 82.775) (end 122.02 85.09) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 123.752894 85.09) (end 124.46 85.09) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 122.02 85.09) (end 123.752894 85.09) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 79.05) (end 124.15 79.05) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 124.15 79.05) (end 124.46 78.74) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 78.4) (end 123.53 78.4) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 123.53 78.4) (end 124.46 77.47) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 77.75) (end 122.91 77.75) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 122.91 77.75) (end 124.46 76.2) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 77.1) (end 122.29 77.1) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 122.29 77.1) (end 124.46 74.93) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 76.45) (end 119.705 75.975) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 119.705 75.975) (end 122.02 73.66) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 122.02 73.66) (end 123.752894 73.66) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 123.752894 73.66) (end 124.46 73.66) (width 0.25) (layer F.Cu) (net 0))
+  (via (at 107.95 85.09) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 83.82) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 82.55) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 81.28) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 80.01) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 73.66) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 74.93) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 76.2) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 77.47) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 107.95 78.74) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 85.09) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 83.82) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 82.55) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 81.28) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 80.01) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 73.66) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 74.93) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 76.2) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 77.47) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 124.46 78.74) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+
+)
diff --git a/reference/kicad-castellated-breakouts/ssop20_0.65mm/ssop20_0.65mm.pro b/reference/kicad-castellated-breakouts/ssop20_0.65mm/ssop20_0.65mm.pro
new file mode 100644
index 0000000..804cf83
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/ssop20_0.65mm/ssop20_0.65mm.pro
@@ -0,0 +1,62 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
diff --git a/reference/kicad-castellated-breakouts/ssop8_0.65mm/ssop8_0.65mm.kicad_pcb b/reference/kicad-castellated-breakouts/ssop8_0.65mm/ssop8_0.65mm.kicad_pcb
new file mode 100644
index 0000000..4a943f3
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/ssop8_0.65mm/ssop8_0.65mm.kicad_pcb
@@ -0,0 +1,184 @@
+(kicad_pcb (version 20170920) (host pcbnew "(2017-09-25 revision 6e440ff)-master")
+
+  (general
+    (thickness 1.6)
+    (drawings 10)
+    (tracks 32)
+    (zones 0)
+    (modules 1)
+    (nets 1)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (user_via 1 0.5)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010f0_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask true)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+  )
+
+  (module KiCad/Housings_SSOP.pretty:SSOP-8_2.95x2.8mm_Pitch0.65mm (layer F.Cu) (tedit 5A1A1C6B) (tstamp 5A2CB6B2)
+    (at 148.844 86.41)
+    (descr "SSOP-8 2.9 x2.8mm Pitch 0.65mm")
+    (tags "SSOP-8 2.95x2.8mm Pitch 0.65mm")
+    (attr smd)
+    (fp_text reference REF** (at 0.381 -4.495 180) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value SSOP8 (at 0 4.395) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.475 -1.4) (end 1.475 1.4) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.475 1.4) (end -1.475 1.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.475 1.4) (end -1.475 -0.7) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.475 -1.4) (end 1.475 -1.4) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.475 -1.4) (end -1.475 -0.7) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.5 -1.5) (end -2.5 -1.5) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.75 -1.65) (end 2.75 1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.75 1.65) (end -2.75 1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.75 1.65) (end -2.75 -1.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.75 -1.65) (end 2.75 -1.65) (layer F.CrtYd) (width 0.05))
+    (pad 8 smd rect (at 2.4 -0.975 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 7 smd rect (at 2.4 -0.325 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 6 smd rect (at 2.4 0.325 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 5 smd rect (at 2.4 0.975 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 4 smd rect (at -2.4 0.975 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 3 smd rect (at -2.4 0.325 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 2 smd rect (at -2.4 -0.325 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+    (pad 1 smd rect (at -2.4 -0.975 270) (size 0.3 4.2) (layers F.Cu F.Paste F.Mask))
+  )
+
+  (gr_text "Cast. SSOP8 Breakout\n@coddingtonbear\n25 Nov 2017\n\n0.65mm Pitch\nMax 9mm Width" (at 144.0815 85.9155) (layer B.SilkS)
+    (effects (font (size 0.5 0.5) (thickness 0.125)) (justify right mirror))
+  )
+  (gr_text SSOP8 (at 148.844 88.9) (layer F.SilkS)
+    (effects (font (size 0.75 0.75) (thickness 0.1875)))
+  )
+  (gr_line (start 143.51 89.535) (end 143.51 88.9) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 154.305 89.535) (end 143.51 89.535) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 154.305 83.82) (end 154.305 89.535) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 154.305 83.185) (end 154.305 83.82) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 143.51 83.185) (end 154.305 83.185) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 143.51 83.82) (end 143.51 83.185) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 143.51 88.9) (end 143.51 83.82) (layer Edge.Cuts) (width 0.2))
+  (gr_line (start 154.305 83.82) (end 154.305 88.9) (layer Edge.Cuts) (width 0.2))
+
+  (segment (start 146.444 85.435) (end 146.444 85.035) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 144.217106 84.455) (end 143.51 84.455) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 146.444 85.035) (end 145.864 84.455) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 145.864 84.455) (end 144.217106 84.455) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 146.444 87.385) (end 146.444 87.785) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 146.444 87.785) (end 145.964 88.265) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 145.964 88.265) (end 144.217106 88.265) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 144.217106 88.265) (end 143.51 88.265) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 146.444 86.735) (end 143.77 86.735) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 143.77 86.735) (end 143.51 86.995) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 146.444 86.085) (end 143.87 86.085) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 143.87 86.085) (end 143.51 85.725) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.244 85.435) (end 151.244 85.035) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.244 85.035) (end 151.824 84.455) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.824 84.455) (end 153.597894 84.455) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 153.597894 84.455) (end 154.305 84.455) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.244 87.385) (end 151.244 87.785) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.244 87.785) (end 151.724 88.265) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.724 88.265) (end 153.597894 88.265) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 153.597894 88.265) (end 154.305 88.265) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.244 86.735) (end 154.045 86.735) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 154.045 86.735) (end 154.305 86.995) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 151.244 86.085) (end 153.945 86.085) (width 0.25) (layer F.Cu) (net 0))
+  (segment (start 153.945 86.085) (end 154.305 85.725) (width 0.25) (layer F.Cu) (net 0))
+  (via (at 143.51 84.455) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 143.51 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 143.51 86.995) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 143.51 85.725) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 154.305 84.455) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 154.305 88.265) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 154.305 86.995) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+  (via (at 154.305 85.725) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 0))
+
+)
diff --git a/reference/kicad-castellated-breakouts/ssop8_0.65mm/ssop8_0.65mm.pro b/reference/kicad-castellated-breakouts/ssop8_0.65mm/ssop8_0.65mm.pro
new file mode 100644
index 0000000..804cf83
--- /dev/null
+++ b/reference/kicad-castellated-breakouts/ssop8_0.65mm/ssop8_0.65mm.pro
@@ -0,0 +1,62 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
diff --git a/sym-lib-table b/sym-lib-table
index 54accea..c65e676 100644
--- a/sym-lib-table
+++ b/sym-lib-table
@@ -202,6 +202,8 @@
   (lib (name "MIKILAB_74xGxx")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/74xGxx.kicad_sym")(options "")(descr "74xGxx"))
   (lib (name "MIKILAB_ADG936BCPZ")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/ADG936BCPZ.kicad_sym")(options "")(descr "ADG936BCPZ"))
   (lib (name "MIKILAB_ADG936BRUZ")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/ADG936BRUZ.kicad_sym")(options "")(descr "ADG936BRUZ"))
+  (lib (name "MIKILAB_AS4C32M16SA_7TCNTR")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/AS4C32M16SA-7TCNTR.kicad_sym")(options "")(descr "AS4C32M16SA-7TCNTR"))
+  (lib (name "MIKILAB_AS4C32M16SB_7BIN")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/AS4C32M16SB-7BIN.kicad_sym")(options "")(descr "AS4C32M16SB-7BIN"))
   (lib (name "MIKILAB_Amplifier_Current")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/Amplifier_Current.kicad_sym")(options "")(descr "Amplifier_Current"))
   (lib (name "MIKILAB_Amplifier_Difference")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/Amplifier_Difference.kicad_sym")(options "")(descr "Amplifier_Difference"))
   (lib (name "MIKILAB_Amplifier_Instrumentation")(type "KiCad")(uri "${KIPRJMOD}/symbols/other/Amplifier_Instrumentation.kicad_sym")(options "")(descr "Amplifier_Instrumentation"))
diff --git a/sym-lib-table.global b/sym-lib-table.global
index 3478e67..b2f559e 100644
--- a/sym-lib-table.global
+++ b/sym-lib-table.global
@@ -202,6 +202,8 @@
   (lib (name "MIKILAB_74xGxx")(type "KiCad")(uri "${MIKILAB}/symbols/other/74xGxx.kicad_sym")(options "")(descr "74xGxx"))
   (lib (name "MIKILAB_ADG936BCPZ")(type "KiCad")(uri "${MIKILAB}/symbols/other/ADG936BCPZ.kicad_sym")(options "")(descr "ADG936BCPZ"))
   (lib (name "MIKILAB_ADG936BRUZ")(type "KiCad")(uri "${MIKILAB}/symbols/other/ADG936BRUZ.kicad_sym")(options "")(descr "ADG936BRUZ"))
+  (lib (name "MIKILAB_AS4C32M16SA_7TCNTR")(type "KiCad")(uri "${MIKILAB}/symbols/other/AS4C32M16SA-7TCNTR.kicad_sym")(options "")(descr "AS4C32M16SA-7TCNTR"))
+  (lib (name "MIKILAB_AS4C32M16SB_7BIN")(type "KiCad")(uri "${MIKILAB}/symbols/other/AS4C32M16SB-7BIN.kicad_sym")(options "")(descr "AS4C32M16SB-7BIN"))
   (lib (name "MIKILAB_Amplifier_Current")(type "KiCad")(uri "${MIKILAB}/symbols/other/Amplifier_Current.kicad_sym")(options "")(descr "Amplifier_Current"))
   (lib (name "MIKILAB_Amplifier_Difference")(type "KiCad")(uri "${MIKILAB}/symbols/other/Amplifier_Difference.kicad_sym")(options "")(descr "Amplifier_Difference"))
   (lib (name "MIKILAB_Amplifier_Instrumentation")(type "KiCad")(uri "${MIKILAB}/symbols/other/Amplifier_Instrumentation.kicad_sym")(options "")(descr "Amplifier_Instrumentation"))
diff --git a/symbols/fpga_cpld/Lattice_ECP_FPGA.kicad_sym b/symbols/fpga_cpld/Lattice_ECP_FPGA.kicad_sym
index dcaf015..f1a536c 100644
--- a/symbols/fpga_cpld/Lattice_ECP_FPGA.kicad_sym
+++ b/symbols/fpga_cpld/Lattice_ECP_FPGA.kicad_sym
@@ -4837,7 +4837,7 @@
 				(justify right)
 			)
 		)
-		(property "Value" "LFE5U-45F-8BG381I"
+		(property "Value" "LFE5U-45F-8BG381C"
 			(at 3.81 3.81 0)
 			(show_name no)
 			(do_not_autoplace no)
@@ -4883,7 +4883,7 @@
 				)
 			)
 		)
-		(property "manf#" "LFE5U-45F-8BG381I"
+		(property "manf#" "LFE5U-45F-8BG381C"
 			(at 3.81 -1.27 0)
 			(show_name no)
 			(do_not_autoplace no)
diff --git a/symbols/other/AS4C32M16SA-7TCNTR.kicad_sym b/symbols/other/AS4C32M16SA-7TCNTR.kicad_sym
new file mode 100644
index 0000000..b53348a
--- /dev/null
+++ b/symbols/other/AS4C32M16SA-7TCNTR.kicad_sym
@@ -0,0 +1,310 @@
+(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
+  (symbol "AS4C32M16SA-7TCNTR" (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
+    (property "Reference" "U" (id 0) (at 20.32 12.7 0)
+      (effects (font (size 1.524 1.524)))
+    )
+    (property "Value" "AS4C32M16SA-7TCNTR" (id 1) (at 20.32 10.16 0)
+      (effects (font (size 1.524 1.524)))
+    )
+    (property "Footprint" "MIKILAB_AS4C32M16SA_7TCNTR:TSOP-54_MIL400_ALL" (id 2) (at 0 0 0)
+      (effects (font (size 1.27 1.27) italic) hide)
+    )
+    (property "Datasheet" "AS4C32M16SA-7TCNTR" (id 3) (at 0 0 0)
+      (effects (font (size 1.27 1.27) italic) hide)
+    )
+    (property "ki_keywords" "AS4C32M16SA-7TCNTR" (id 4) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_locked" "" (id 5) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_fp_filters" "TSOP-54_MIL400_ALL TSOP-54_MIL400_ALL-M TSOP-54_MIL400_ALL-L" (id 6) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (symbol "AS4C32M16SA-7TCNTR_1_1"
+      (polyline
+        (pts
+          (xy 7.62 7.62)
+          (xy 7.62 -60.96)
+        )
+        (stroke (width 0.127) (type default) (color 0 0 0 0))
+        (fill (type none))
+      )
+      (polyline
+        (pts
+          (xy 7.62 -60.96)
+          (xy 33.02 -60.96)
+        )
+        (stroke (width 0.127) (type default) (color 0 0 0 0))
+        (fill (type none))
+      )
+      (polyline
+        (pts
+          (xy 33.02 -60.96)
+          (xy 33.02 7.62)
+        )
+        (stroke (width 0.127) (type default) (color 0 0 0 0))
+        (fill (type none))
+      )
+      (polyline
+        (pts
+          (xy 33.02 7.62)
+          (xy 7.62 7.62)
+        )
+        (stroke (width 0.127) (type default) (color 0 0 0 0))
+        (fill (type none))
+      )
+      (pin bidirectional line (at 40.64 -7.62 180) (length 7.62)
+        (name "I/O1" (effects (font (size 1.27 1.27))))
+        (number "2" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -10.16 180) (length 7.62)
+        (name "I/O2" (effects (font (size 1.27 1.27))))
+        (number "4" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -12.7 180) (length 7.62)
+        (name "I/O3" (effects (font (size 1.27 1.27))))
+        (number "5" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -15.24 180) (length 7.62)
+        (name "I/O4" (effects (font (size 1.27 1.27))))
+        (number "7" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -17.78 180) (length 7.62)
+        (name "I/O5" (effects (font (size 1.27 1.27))))
+        (number "8" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -20.32 180) (length 7.62)
+        (name "I/O6" (effects (font (size 1.27 1.27))))
+        (number "10" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -22.86 180) (length 7.62)
+        (name "I/O7" (effects (font (size 1.27 1.27))))
+        (number "11" (effects (font (size 1.27 1.27))))
+      )
+      (pin bidirectional line (at 40.64 -25.4 180) (length 7.62)
+        (name "I/O8" (effects (font (size 1.27 1.27))))
+        (number "13" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 0 -53.34 0) (length 7.62)
+        (name "LDQM" (effects (font (size 1.27 1.27))))
+        (number "15" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 0 -48.26 0) (length 7.62)
+        (name "*WE" (effects (font (size 1.27 1.27))))
+        (number "16" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 0 -40.64 0) (length 7.62)
+        (name "*CAS" (effects (font (size 1.27 1.27))))
+        (number "17" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 0 -45.72 0) (length 7.62)
+        (name "*RAS" (effects (font (size 1.27 1.27))))
+        (number "18" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 0 -43.18 0) (length 7.62)
+        (name "*CS" (effects (font (size 1.27 1.27))))
+        (number "19" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 40.64 0 180) (length 7.62)
+        (name "BA0" (effects (font (size 1.27 1.27))))
+        (number "20" (effects (font (size 1.27 1.27))))
+      )
+      (pin unspecified line (at 40.64 -2.54 180) (length 7.62)
+        (name "BA1" (effects (font (size 1.27 1.27))))
+        (number "21" (effects (font (size 1.27 1.27))))
+      )
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diff --git a/symbols/other/AS4C32M16SB-7BIN.kicad_sym b/symbols/other/AS4C32M16SB-7BIN.kicad_sym
new file mode 100644
index 0000000..d70937f
--- /dev/null
+++ b/symbols/other/AS4C32M16SB-7BIN.kicad_sym
@@ -0,0 +1,490 @@
+
+(kicad_symbol_lib (version 20211014) (generator kicad_symbol_editor)
+  (symbol "AS4C32M16SB-7BIN" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
+    (property "Reference" "U" (id 0) (at -10.16 43.942 0)
+      (effects (font (size 1.27 1.27)) (justify bottom left))
+    )
+    (property "Value" "AS4C32M16SB-7BIN" (id 1) (at -10.16 -43.942 0)
+      (effects (font (size 1.27 1.27)) (justify top left))
+    )
+    (property "Footprint" "MIKILAB_AS4C32M16SB_7BIN:BGA54C80P6X9_800X800X120N" (id 2) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "MF" "Alliance Memory, Inc." (id 4) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "MAXIMUM_PACKAGE_HEIGHT" "1.2 mm" (id 5) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "Package" "None" (id 6) (at 0 0 0)
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+    )
+    (property "Price" "None" (id 7) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "Check_prices" "https://www.snapeda.com/parts/AS4C32M16SB-7BIN/Alliance+Hose/view-part/?ref=eda" (id 8) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "STANDARD" "IPC-7351B" (id 9) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "PARTREV" "Rev. 1.2" (id 10) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "SnapEDA_Link" "https://www.snapeda.com/parts/AS4C32M16SB-7BIN/Alliance+Hose/view-part/?ref=snap" (id 11) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "MP" "AS4C32M16SB-7BIN" (id 12) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "Purchase-URL" "https://www.snapeda.com/api/url_track_click_mouser/?unipart_id=6059076&manufacturer=Alliance Memory, Inc.&part_name=AS4C32M16SB-7BIN&search_term=as4c32m16sb-7bin" (id 13) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "Description" "\n                        \n                            SDRAM Memory IC 512Mb (32M x 16) Parallel 143 MHz 6 ns 54-TSOP II\n                        \n" (id 14) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "Availability" "In Stock" (id 15) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
+    (property "MANUFACTURER" "Alliance Memory" (id 16) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) (justify bottom) hide)
+    )
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\ No newline at end of file