FPGA-Neural

T

micheleandClaude Sonnet 5 ff5908f25f docs: log DEC-0009 -- project v22 paused, hard DSP resource ceiling on ECP5

Real nextpnr-ecp5 resource data shows the ECP5 family (45F: 72
MULT18X18D, 85F: 156) cannot reach the 20x-1000x speedup targets
discussed today with this or any redesigned architecture -- N=16 was
already near the 85F's absolute physical ceiling of 19 cores. User
made an informed decision to pause the project rather than chase a
target this hardware family cannot physically deliver.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01MUG92aM9m68TRc4rG55BcC

2026-09-16 15:38:39 +02:00

benchmark_results

feat: add FPGA-Neural benchmark tooling + same-tier ECP5 P2/P4/P8 results

2026-09-02 19:48:03 +02:00

docs

chore: remove root-level V1 duplicates, superseded by hardware/v1/ freeze

2026-09-07 05:30:17 +02:00

hardware

docs: log DEC-0009 -- project v22 paused, hard DSP resource ceiling on ECP5

2026-09-16 15:38:39 +02:00

sim

chore: remove root-level V1 duplicates, superseded by hardware/v1/ freeze