micheleandClaude Sonnet 5
97a21be240
Adds FPGA-exclusive access to the onboard W25Q128JV SPI NOR flash for weights/bias/network persistence, layered as spi_flash_master (raw SPI, USRMCLK-driven) -> flash_copy_engine (flash<->PSRAM streaming, erase- before-write, Page Program loop) -> flash_slot_manager (16-slot catalog with CRC32), exposed via 8 new SPI opcodes (0x40-0x47). Fixes two pre-existing bugs found during bring-up: a psram_controller.v request lost during power-up, and a one-cycle-pulse race in the PSRAM arbiter request handshake. Full simulation + real Yosys/nextpnr-ecp5 synthesis verification (0 errors, Fmax 66.68MHz) in WORKLOG.md and docs/FPGA-Neural-Flash-Subsystem-Verification.md. Also updates docs/pinout to reflect the 56-signal real .lpf (3 new flash pins) and documents the WRITE_RAM/READ_RAM host backpressure risk found while testing this subsystem. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_013xXuuRUWZScuo1DeYJxs3v
171 lines
4.4 KiB
Plaintext
171 lines
4.4 KiB
Plaintext
BLOCK ASYNCPATHS;
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BLOCK RESETPATHS;
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LOCATE COMP "clk" SITE "H5";
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IOBUF PORT "clk" IO_TYPE=LVCMOS33;
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LOCATE COMP "cs_n" SITE "B3";
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IOBUF PORT "cs_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "data_ready_n" SITE "C3";
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IOBUF PORT "data_ready_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "flash_cs_n" SITE "E4";
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IOBUF PORT "flash_cs_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "flash_miso" SITE "D5";
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IOBUF PORT "flash_miso" IO_TYPE=LVCMOS33;
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LOCATE COMP "flash_mosi" SITE "D3";
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IOBUF PORT "flash_mosi" IO_TYPE=LVCMOS33;
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LOCATE COMP "irq_n" SITE "C4";
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IOBUF PORT "irq_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "miso" SITE "A3";
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IOBUF PORT "miso" IO_TYPE=LVCMOS33;
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LOCATE COMP "mosi" SITE "C5";
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IOBUF PORT "mosi" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[0]" SITE "E16";
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IOBUF PORT "psram_a[0]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[10]" SITE "H17";
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IOBUF PORT "psram_a[10]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[11]" SITE "H18";
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IOBUF PORT "psram_a[11]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[12]" SITE "J16";
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IOBUF PORT "psram_a[12]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[13]" SITE "J17";
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IOBUF PORT "psram_a[13]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[14]" SITE "C20";
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IOBUF PORT "psram_a[14]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[15]" SITE "D19";
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IOBUF PORT "psram_a[15]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[16]" SITE "E19";
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IOBUF PORT "psram_a[16]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[17]" SITE "E20";
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IOBUF PORT "psram_a[17]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[18]" SITE "F19";
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IOBUF PORT "psram_a[18]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[19]" SITE "F20";
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IOBUF PORT "psram_a[19]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[1]" SITE "F16";
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IOBUF PORT "psram_a[1]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[20]" SITE "G20";
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IOBUF PORT "psram_a[20]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[21]" SITE "H20";
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IOBUF PORT "psram_a[21]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[22]" SITE "P18";
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IOBUF PORT "psram_a[22]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[2]" SITE "D18";
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IOBUF PORT "psram_a[2]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[3]" SITE "E17";
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IOBUF PORT "psram_a[3]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[4]" SITE "E18";
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IOBUF PORT "psram_a[4]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[5]" SITE "F18";
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IOBUF PORT "psram_a[5]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[6]" SITE "F17";
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IOBUF PORT "psram_a[6]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[7]" SITE "G16";
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IOBUF PORT "psram_a[7]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[8]" SITE "G18";
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IOBUF PORT "psram_a[8]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_a[9]" SITE "H16";
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IOBUF PORT "psram_a[9]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_ce_n" SITE "N17";
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IOBUF PORT "psram_ce_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[0]" SITE "K18";
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IOBUF PORT "psram_dq[0]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[10]" SITE "L17";
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IOBUF PORT "psram_dq[10]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[11]" SITE "M18";
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IOBUF PORT "psram_dq[11]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[12]" SITE "M17";
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IOBUF PORT "psram_dq[12]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[13]" SITE "N16";
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IOBUF PORT "psram_dq[13]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[14]" SITE "N18";
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IOBUF PORT "psram_dq[14]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[15]" SITE "P17";
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IOBUF PORT "psram_dq[15]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[1]" SITE "C18";
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IOBUF PORT "psram_dq[1]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[2]" SITE "D17";
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IOBUF PORT "psram_dq[2]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[3]" SITE "D20";
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IOBUF PORT "psram_dq[3]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[4]" SITE "G19";
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IOBUF PORT "psram_dq[4]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[5]" SITE "J18";
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IOBUF PORT "psram_dq[5]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[6]" SITE "J19";
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IOBUF PORT "psram_dq[6]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[7]" SITE "J20";
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IOBUF PORT "psram_dq[7]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[8]" SITE "K19";
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IOBUF PORT "psram_dq[8]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_dq[9]" SITE "K20";
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IOBUF PORT "psram_dq[9]" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_lb_n" SITE "T16";
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IOBUF PORT "psram_lb_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_oe_n" SITE "R16";
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IOBUF PORT "psram_oe_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_ub_n" SITE "N19";
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IOBUF PORT "psram_ub_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_we_n" SITE "R17";
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IOBUF PORT "psram_we_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "psram_zz_n" SITE "N20";
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IOBUF PORT "psram_zz_n" IO_TYPE=LVCMOS33;
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LOCATE COMP "rst" SITE "B4";
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IOBUF PORT "rst" IO_TYPE=LVCMOS33;
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LOCATE COMP "sclk" SITE "B5";
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IOBUF PORT "sclk" IO_TYPE=LVCMOS33;
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