micheleandClaude Sonnet 5
8d20a7bfbf
C.9 (pinout): certified citing this session's own F1-F7 work; also regenerated a real bitstream for the CURRENT full-system build (ecppack, 0 errors, real part header) rather than relying on an older pre-flash build's bitstream. C.10 (timing): certified citing Fmax re-measured at every structural change this session (54.58->75.30->73.88->66.68->67.91MHz), critical path re-verified identical at every re-synthesis. C.11 (toolchain): full RTL->Yosys->nextpnr-ecp5->ecppack flow re-run on the current build, 0 errors at every stage. Real-silicon behavior explicitly declared NOT certifiable (no physical hardware available). C.12 (netasm): certified citing 20/20 tests plus a real hardware round-trip already demonstrated earlier this session. C.13 (datasheet/RTL coherence): real, current discrepancy found and declared -- none of this campaign's 7 bugs (BUG-001-007) are yet mentioned in the datasheet or engine spec doc. Correct and expected (found after those docs were last updated), flagged as required follow-up after the campaign completes. C.14: page-mode PSRAM and the flash subsystem are actually COMPLETE, not "in progress" as the certification prompt assumed -- verified against real repo state. D (cross-cutting): CDC certified via C.7. Reset scheme found by exhaustive grep across all 20 RTL files to be synchronous-only everywhere (no posedge rst anywhere) -- a real fact, differs from the prompt's async-assert/sync-deassert phrasing, not a defect. FSM: the campaign's own BUG-002-007 ARE FSM defects, found and documented, but no exhaustive reachability analysis of every FSM was done (stated reserve). Width/overflow: 2 real cases found across the whole session. Lint: full-system Yosys check, one real warning (known PSRAM tristate), zero accidental latches confirmed signal-by-signal (25 explicit confirmations). Determinism: no real non-determinism found (the one apparent inconsistency, BUG-003, traced to genuinely different test stimuli between attempts, not unstable behavior for identical stimuli). Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_013xXuuRUWZScuo1DeYJxs3v
29 lines
1.5 KiB
Markdown
29 lines
1.5 KiB
Markdown
# C.12 — `netasm` (host, assemblatore pseudo-assembly → byte)
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Data: 2026-09-04.
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## Evidenza
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`tools/netasm/tests/test_netasm.py` — rieseguito da zero in Fase 0 di questa campagna
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(non preso dalla parola): **20/20 PASS**. Copertura, verificata leggendo i nomi dei test
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(`tests/test_netasm.py`), non solo il conteggio:
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- Parsing (denso/grafo, commenti, righe vuote, errori di sintassi).
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- Assemblaggio grafo byte-esatto **senza** padding, confrontato byte-per-byte contro
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l'esempio del manuale (§3), riferimento indipendente dall'implementazione.
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- Assemblaggio grafo **con** padding (PARALLEL=4).
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- Neurone a zero connessioni (`n_conn=0` → pad a un gruppo intero).
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- Guardie a tempo di compilazione: auto-riferimento, riferimento in avanti, output usato
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come sorgente, overflow `MAX_CONN`, overflow `N_TOTAL`, `OUTPUT` non dichiarato —
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ciascuna verificata come test **negativo** (deve rifiutare, non solo "non crashare").
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- Round-trip con l'RTL: gli stessi byte prodotti da `netasm` sono quelli effettivamente
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usati nel test end-to-end mandatorio del sottosistema flash
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(`sim/spi_neuron_top_flash_tb.v` TEST4, `netasm→SAVE_SLOT→LOAD_SLOT→RUN_NETWORK`,
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output=126 confermato) — non solo testato in isolamento, verificato anche contro
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l'hardware reale a valle.
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## Verdetto
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**CERTIFICATO.** Nessuna riserva — copertura sia positiva sia negativa, oracolo
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indipendente (esempio del manuale, non l'implementazione stessa), e un round-trip reale
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con l'hardware già dimostrato in una fase precedente di questa stessa sessione.
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