micheleandClaude Sonnet 5
264950923b
New n8_system_ddr3_top.v: a real, permanent, named top-level (not a build-time -generic override), byte-for-byte the same RTL as n16_system_ddr3_top.v with N_GROUPS defaulting to 2. Real, full P&R under this file's own name reproduces EXP-0095's own generic-override result exactly: WNS=0.000ns, WHS=+0.017ns, 0 failing setup endpoints, 64 DSP48E1/26.7%, 12535 LUTs/19.77%. New tb_n8_system_ddr3.v (real DDR3-model methodology, adapted from tb_n16_system_ddr3.v, M=16 positions covering every one of the 2 groups x 4 PEs x 2 lanes exactly once): real functional xsim, 16/16 PASS, 0 errors -- closes the real functional-verification gap this specific N previously had. N=8 is now BOTH functionally verified AND timing-closed under its own permanent name -- the real, definitive deployment target. N=2 kept as a documented, valid fallback; N=16 kept as documented, functionally- verified-but-not-timing-closed future work, not abandoned. docs/PHYSICAL_REALIZATION.md, docs/ARCHITECTURE_ANALYSIS.md, docs/PINOUT.md updated to reflect N=8 as the current real signoff. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01MUG92aM9m68TRc4rG55BcC