michele
f3be485b75
NUMERIC rows cite document title, revision, section/table, and page. USB Zdiff, Type-C Rp/Rd, 10BASE-T, and 1000BASE-T stay UNKNOWN. PDFs are not in git.
116 lines
4.5 KiB
Python
116 lines
4.5 KiB
Python
"""M10 catalog skeletons: PCIe/CXL logical vs physical, I2C/CAN/RGMII, HS processor ids."""
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from __future__ import annotations
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import json
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from backend.periscopex.protocol_catalog import (
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CAN_CHECKS,
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I2C_CHECKS,
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PCIE_CHECKS,
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PCI_PARALLEL_CHECKS,
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RGMII_CHECKS,
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build_m0_catalog,
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load_catalog,
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parse_catalog,
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)
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HS_LOGICAL = {
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"pci", "pci-x", "pcie", "cxl", "ccix", "opencapi",
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"upi", "dmi", "infinity-fabric", "hypertransport", "ucie",
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}
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NO_INVENTED = ("90", "100 ", "50 ", "120")
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def test_m10_logical_physical_split_pcie_cxl():
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cat = load_catalog()
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pcie_log = next(p for p in cat.logical_protocols if p.id == "pcie")
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cxl_log = next(p for p in cat.logical_protocols if p.id == "cxl")
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pcie_phy = next(p for p in cat.physical_interfaces if p.id == "pcie-phy-pcb")
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cxl_phy = next(p for p in cat.physical_interfaces if p.id == "cxl-phy-pcb")
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assert pcie_log.id != pcie_phy.id
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assert cxl_log.id != cxl_phy.id
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assert pcie_phy.logical_protocol_id == "pcie"
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assert cxl_phy.logical_protocol_id == "cxl"
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assert pcie_phy.logical_protocol_id != cxl_phy.logical_protocol_id
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assert pcie_phy.pcb_relevant == "YES"
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assert cxl_phy.pcb_relevant == "YES"
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assert set(pcie_phy.required_checks) == set(PCIE_CHECKS)
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assert set(cxl_phy.required_checks) == set(PCIE_CHECKS)
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def test_m10_high_speed_processor_ids_present():
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cat = load_catalog()
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logical = {p.id for p in cat.logical_protocols}
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assert HS_LOGICAL <= logical
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physical = {p.id: p for p in cat.physical_interfaces}
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assert physical["pci-pcb"].pcb_relevant == "YES"
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assert physical["pci-x-pcb"].pcb_relevant == "YES"
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assert set(physical["pci-pcb"].required_checks) == set(PCI_PARALLEL_CHECKS)
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assert physical["ccix-phy-pcb"].pcb_relevant == "YES"
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assert physical["opencapi-phy-pcb"].pcb_relevant == "YES"
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assert physical["hypertransport-phy-pcb"].pcb_relevant == "YES"
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assert physical["upi-phy"].pcb_relevant == "CONDITIONAL"
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assert physical["dmi-phy"].pcb_relevant == "CONDITIONAL"
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assert physical["infinity-fabric-phy"].pcb_relevant == "CONDITIONAL"
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assert physical["ucie-die-to-die"].pcb_relevant == "CONDITIONAL"
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assert physical["ucie-die-to-die"].logical_protocol_id == "ucie"
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for pid in HS_LOGICAL:
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ifaces = [p for p in cat.physical_interfaces if p.logical_protocol_id == pid]
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assert ifaces, pid
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assert all(p.id != pid for p in ifaces)
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def test_m10_i2c_can_rgmii_skeletons_named_checks_no_numbers():
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cat = load_catalog()
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i2c = next(p for p in cat.physical_interfaces if p.id == "i2c-pcb")
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can = next(p for p in cat.physical_interfaces if p.id == "can-pcb")
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rgmii = next(p for p in cat.physical_interfaces if p.id == "rgmii-pcb")
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assert i2c.logical_protocol_id == "i2c"
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assert can.logical_protocol_id == "can"
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assert rgmii.logical_protocol_id == "rgmii"
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assert i2c.pcb_relevant == "YES"
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assert can.pcb_relevant == "YES"
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assert rgmii.pcb_relevant == "YES"
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assert set(i2c.required_checks) == set(I2C_CHECKS)
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assert set(can.required_checks) == set(CAN_CHECKS)
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assert set(rgmii.required_checks) == set(RGMII_CHECKS)
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for iface in (i2c, can, rgmii):
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for c in iface.constraints:
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assert c.value is None
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assert c.value_kind in {
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"MISSING_SOURCE", "UNKNOWN", "PHY_DEPENDENT",
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"CONTROLLER_DEPENDENT", "VENDOR_DEPENDENT", "NOT_APPLICABLE",
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}
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assert c.value_kind != "NUMERIC"
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def test_m10_no_invented_ohms_and_no_usbif_fill():
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loaded = load_catalog()
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for iface in loaded.physical_interfaces:
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for c in iface.constraints:
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if c.value_kind == "NUMERIC":
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assert c.source is not None
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assert c.source.document
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else:
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assert c.value is None
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assert c.unit is None
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blob = json.dumps([
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c.model_dump() for p in loaded.physical_interfaces for c in p.constraints
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if p.logical_protocol_id in HS_LOGICAL | {"i2c", "can", "rgmii"}
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])
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for token in NO_INVENTED:
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assert token not in blob
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usb = next(p for p in loaded.physical_interfaces if p.id == "usb2-hs-dpair")
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z = next(c for c in usb.constraints if c.parameter == "differential_impedance")
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assert z.value_kind in {"MISSING_SOURCE", "UNKNOWN"}
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assert z.value is None
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assert z.source is None
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def test_m10_builder_matches_committed_catalog():
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loaded = load_catalog()
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rebuilt = parse_catalog(build_m0_catalog())
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assert loaded.model_dump() == rebuilt.model_dump()
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