michele 65a91419a2 Check ImpedenceFinder against datasheet SI rules, not a dump table. ...

Each layout_rules SI requirement (diff/SE Z, skew, max length, spacing,
ref plane, vias, layer, return, series R) is one PASS/FAIL/MARGIN finding
with FACT and REQUIREMENT. USB/HDMI/PCIe/ETH/LVDS/DDR only; I2C GPIO CC
and analog REGN are skipped. No invented 90 Ω.

2026-09-20 10:45:27 +02:00

..

how-it-works.svg

README: add pipeline diagram

2026-07-17 00:19:56 -07:00

motore-finding.md

Ship Fase B slices: hierarchy, derating bands, timing, PI, ESD/return.

2026-09-20 09:35:04 +02:00

piano-implementazione.md

Rebrand Pinscope to Periscope across product and codebase.

2026-09-13 20:02:04 +02:00

piano-pcb-review.md

Check ImpedenceFinder against datasheet SI rules, not a dump table.

2026-09-20 10:45:27 +02:00