Z/termination/levels from datasheet, stackup, fab, or cited pack only. Never invented USB ohms. No L3/OpenEMS. L0/L1 are not electrical.
265 lines
9.3 KiB
Python
265 lines
9.3 KiB
Python
"""M3 L1 GEOMETRIC certifier: mm vs NUMERIC/DESIGN only; no invented ps/ohm."""
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from __future__ import annotations
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import json
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from backend.periscopex.models import (
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Component,
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ComponentType,
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DesignGraph,
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LayoutGraph,
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LayoutSegment,
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LayoutVia,
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Net,
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NetType,
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PinConnection,
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)
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from backend.periscopex.protocol_catalog import (
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ConstraintSource,
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PhysicalInterface,
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ProtocolConstraint,
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)
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from backend.periscopex.protocol_l0 import protocol_exam
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from backend.periscopex.protocol_l1 import (
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_pack,
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certify_instance_l1,
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certify_l1,
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geometric_verdict,
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)
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from backend.periscopex.protocol_recognize import recognize_physical_buses
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def _ic(ref: str, pins: dict[str, str], *, mpn: str = "", value: str = "") -> Component:
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return Component(
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reference=ref, value=value or mpn, footprint="",
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component_type=ComponentType.IC, mpn=mpn or None, pins=pins,
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)
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def _net(name: str, *pairs: tuple[str, str]) -> Net:
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return Net(
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name=name, net_type=NetType.SIGNAL,
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pins=[PinConnection(component_ref=r, pin_number=p) for r, p in pairs],
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)
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def _usb_connected() -> DesignGraph:
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return DesignGraph(
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components={
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"U1": _ic("U1", {"1": "USB_D+", "2": "USB_D-"}, mpn="CH340E"),
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"J2": Component(
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reference="J2", value="USB2_TypeA",
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footprint="USB_A",
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component_type=ComponentType.CONNECTOR,
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pins={"2": "USB_D+", "3": "USB_D-"},
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),
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},
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nets={
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"USB_D+": _net("USB_D+", ("U1", "1"), ("J2", "2")),
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"USB_D-": _net("USB_D-", ("U1", "2"), ("J2", "3")),
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},
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)
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def _usb_layout(*, length_p: float = 10.0, length_m: float = 10.1) -> LayoutGraph:
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return LayoutGraph(
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segments=[
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LayoutSegment(start=(0, 0), end=(length_p, 0), width=0.2, layer="F.Cu", net="USB_D+"),
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LayoutSegment(start=(0, 0.2), end=(length_m, 0.2), width=0.2, layer="F.Cu", net="USB_D-"),
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],
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vias=[LayoutVia(x=1.0, y=0.0, net="USB_D+", drill=0.3, layers=("F.Cu", "B.Cu"))],
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)
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def _axi_graph() -> DesignGraph:
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return DesignGraph(
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components={
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"U3": _ic("U3", {"1": "AXI_AWVALID"}, mpn="XC7A100T", value="AXI4 interconnect"),
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},
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nets={"AXI_AWVALID": _net("AXI_AWVALID", ("U3", "1"))},
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)
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def _ddr_with_lanes() -> DesignGraph:
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pins = {str(i): f"DDR4_DQ{i}" for i in range(8)}
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pins.update({"8": "DDR4_DQS0_P", "9": "DDR4_DQS0_N"})
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u_mem = _ic("U5", pins, mpn="MT41K256M16TW", value="DDR4")
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u_cpu = _ic("U4", {str(i): pins[str(i)] for i in pins}, mpn="STM32", value="MCU")
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nets = {
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n: _net(n, ("U5", p), ("U4", p)) for p, n in pins.items()
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}
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return DesignGraph(components={"U5": u_mem, "U4": u_cpu}, nets=nets)
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def _ddr_no_grouping() -> DesignGraph:
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pins = {str(i): f"MEM_DAT{i}" for i in range(8)}
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return DesignGraph(
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components={"U5": _ic("U5", pins, mpn="MT41K256M16TW", value="DDR4")},
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nets={n: _net(n, ("U5", p)) for p, n in pins.items()},
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)
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def _cite() -> ConstraintSource:
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return ConstraintSource(document="project-netclass.txt", organization="design")
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def _design_mm(parameter: str, value: float) -> ProtocolConstraint:
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return ProtocolConstraint(
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id=f"design-{parameter}",
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parameter=parameter,
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value_kind="NUMERIC",
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mandatory="MANDATORY",
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source_type="PCB",
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source_class="IMPLEMENTATION",
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value=value,
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unit="mm",
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source=_cite(),
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limit_kind="DESIGN",
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)
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def _l1_for(graph: DesignGraph, logical_sub: str, layout: LayoutGraph | None):
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insts = recognize_physical_buses(graph)
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by, findings = certify_l1(graph, insts, layout)
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rows = []
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for inst in insts:
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if logical_sub in inst.logical_protocol_id:
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rows.extend(by.get(inst.instance_id, []))
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return rows, findings, insts
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def test_usb_skew_without_numeric_is_unknown_not_invented_ps():
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rows, _, _ = _l1_for(_usb_connected(), "usb2", _usb_layout())
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skew = [r for r in rows if r.check == "intra_pair_skew"]
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assert skew
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assert skew[0].result in {"UNKNOWN", "MISSING_SOURCE", "VENDOR_DEPENDENT"}
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assert skew[0].result != "PASS"
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blob = json.dumps(skew[0].model_dump())
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assert "ohm" not in blob.lower()
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assert "90" not in blob
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assert "ps" not in blob.lower() or skew[0].result != "PASS"
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def test_usb_length_unknown_without_numeric_limit():
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rows, _, _ = _l1_for(_usb_connected(), "usb2", _usb_layout())
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length = [r for r in rows if r.check == "length"]
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assert length
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assert length[0].measured_mm is not None
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assert length[0].result in {"UNKNOWN", "MISSING_SOURCE"}
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assert length[0].limit_mm is None
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def test_usb_no_layout_is_visible_skip_not_pass():
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rows, findings, _ = _l1_for(_usb_connected(), "usb2", None)
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assert rows
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assert all(r.result != "PASS" or r.check == "never" for r in rows)
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assert any(r.result == "UNKNOWN" for r in rows)
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assert any(f.rule_id == "PE-PRT-L1-001" for f in findings)
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assert any("non certificata a L1" in (f.finding or "") for f in findings)
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def test_axi_internal_l1_not_applicable():
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rows, findings, _ = _l1_for(_axi_graph(), "axi4", LayoutGraph())
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assert rows
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assert all(r.result == "NOT_APPLICABLE" for r in rows)
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assert all(r.result != "FAIL" for r in rows)
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sec, exam_findings = protocol_exam(_axi_graph(), layout=LayoutGraph())
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assert sec.max_level_reached == "L2"
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assert sec.macrophase == "M4"
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assert all(f.status != "ERROR" for f in exam_findings)
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blob = json.dumps([r.model_dump() for r in rows])
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assert "electrical certification" not in blob.lower() or "not electrical" in blob.lower()
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def test_ddr_missing_grouping_visible_skip_not_pass():
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rows, findings, insts = _l1_for(_ddr_no_grouping(), "ddr4", LayoutGraph())
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assert insts
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mapping = [r for r in rows if r.check in {"byte_lane_mapping", "dq_to_dqs_skew", "byte_lane_skew"}]
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assert mapping
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assert all(r.result != "PASS" for r in mapping)
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assert any(r.result == "UNKNOWN" for r in mapping)
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assert any(f.rule_id == "PE-PRT-L1-002" for f in findings)
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assert any("grouping" in (f.finding or "").lower() for f in findings)
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def test_ddr_reconstructed_lane_skew_stays_phy_dependent():
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layout = LayoutGraph(segments=[
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LayoutSegment(start=(0, 0), end=(20, 0), layer="F.Cu", net="DDR4_DQ0"),
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LayoutSegment(start=(0, 0), end=(21, 0), layer="F.Cu", net="DDR4_DQS0_P"),
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])
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rows, _, insts = _l1_for(_ddr_with_lanes(), "ddr4", layout)
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assert any(g.kind == "BYTE_LANE" for i in insts for g in i.groups)
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mapping = [r for r in rows if r.check == "byte_lane_mapping"]
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assert mapping and mapping[0].result == "PASS"
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skew = [r for r in rows if r.check == "dq_to_dqs_skew"]
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assert skew
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assert skew[0].result in {"PHY_DEPENDENT", "CONTROLLER_DEPENDENT", "VENDOR_DEPENDENT", "UNKNOWN"}
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assert skew[0].result != "PASS"
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assert skew[0].limit_mm is None
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def test_numeric_mm_design_limit_pass_and_fail():
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pass_v = geometric_verdict(_design_mm("length", 50.0), 10.0)
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fail_v = geometric_verdict(_design_mm("length", 50.0), 80.0)
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assert pass_v == "PASS"
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assert fail_v == "FAIL"
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graph = _usb_connected()
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insts = recognize_physical_buses(graph)
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usb = [i for i in insts if "usb" in i.logical_protocol_id][0]
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iface = PhysicalInterface(
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id="usb2-hs-dpair",
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logical_protocol_id="usb2-hs",
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bus_type="SERIAL",
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physical_layer="SERIAL_DIFFERENTIAL",
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pcb_relevant="YES",
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required_checks=["length"],
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constraints=[_design_mm("length", 50.0)],
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)
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short = certify_instance_l1(graph, usb, iface, _usb_layout(length_p=10, length_m=10))
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assert short[0].result == "PASS"
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assert short[0].measured_mm == 10.0
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assert short[0].limit_mm == 50.0
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long = certify_instance_l1(graph, usb, iface, _usb_layout(length_p=80, length_m=80))
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assert long[0].result == "FAIL"
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assert long[0].mandatory == "MANDATORY"
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def test_time_unit_numeric_is_unknown_not_converted_ps():
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cons = ProtocolConstraint(
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id="skew-ps",
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parameter="intra_pair_skew",
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value_kind="NUMERIC",
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mandatory="MANDATORY",
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source_type="STANDARD",
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source_class="NORMATIVE",
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value=15.0,
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unit="ps",
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source=ConstraintSource(document="USB-IF", organization="USB-IF"),
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limit_kind="STANDARD",
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)
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assert geometric_verdict(cons, 0.05) == "UNKNOWN"
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def test_recommended_never_fail_l1():
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rec = _pack("length", "FAIL", "RECOMMENDED", notes="over")
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assert rec.result != "FAIL"
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assert rec.status != "ERROR"
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def test_l1_does_not_run_impedance():
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rows, _, _ = _l1_for(_usb_connected(), "usb2", _usb_layout())
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assert not any(r.check in {"differential_impedance", "impedance", "termination"} for r in rows)
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blob = json.dumps([r.model_dump() for r in rows])
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assert "90" not in blob
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assert "electrical Z" in blob or "not electrical" in blob.lower()
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def test_protocol_exam_attaches_l1_checks():
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sec, _ = protocol_exam(_usb_connected(), layout=_usb_layout())
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assert sec.max_level_reached == "L2"
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assert sec.recognized_instances
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row = sec.recognized_instances[0]
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assert row.get("l1_checks")
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assert all(c.get("level") == "L1" for c in row["l1_checks"])
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