Schematic geometry on KiCad 10 boards was swapping rails and inventing
floating pins; board connectivity is authoritative when a PCB is uploaded.
Co-authored-by: Cursor <cursoragent@cursor.com>
Disconnected GND power flags were named GND_/GND__/… so the reviewer
flagged swapped rails and floating pins on correctly wired designs.
Co-authored-by: Cursor <cursoragent@cursor.com>
Sheets, optional BOM, and PCB are extracted together; a storage round-trip test proves the pipeline can re-parse child Sheetfiles.
Co-authored-by: Cursor <cursoragent@cursor.com>
A single .kicad_sch was parsed in isolation, so child sheets looked like an empty netlist. Report 404s now surface the real API error instead of a generic fetch failure.
Co-authored-by: Cursor <cursoragent@cursor.com>
Pipeline samples PCB traces when stackup εr/h is present; power/ground are skipped. Named nets can be re-analyzed from the Impedance tab.
Co-authored-by: Cursor <cursoragent@cursor.com>
PS-PLC-004 is a foreign net endpoint inside the KiCad courtyard. The lista↔codice table and sprints 0–10+ get an OK column where the hole is closed without invented millimetres.
Co-authored-by: Cursor <cursoragent@cursor.com>
X1 uses the same proximity rule as ICs. A detour is shortest path on PCB segments versus that millimetre, not a guessed loop ratio.
Co-authored-by: Cursor <cursoragent@cursor.com>
PS-PLC-003 uses the same_layer flag plus F/B layers from the PCB. A via in the courtyard is enough; an unset flag skips.
Co-authored-by: Cursor <cursoragent@cursor.com>
Skip without courtyard geometry or a numeric count — no pad-radius default. Tests use simple_project plus explicit coordinates as parameters.
Co-authored-by: Cursor <cursoragent@cursor.com>
PS-SI-001 and decoupling skip without a numeric layout_rule. Tests use simple_project nets, not invented USBPHY boards.
Co-authored-by: Cursor <cursoragent@cursor.com>
PS-PLC-001 fires only with a LayoutGraph: 15 mm vs a 2 mm rule is an error, a 1 mm cap is silent, and a null millimetre uses the declared 3 mm default as WARNING.
Co-authored-by: Cursor <cursoragent@cursor.com>
Accepted findings become ECO rows with a required reason; false-positive and wontfix stay off the change list. Pipeline re-runs keep dispositions by finding_id like comments.
Co-authored-by: Cursor <cursoragent@cursor.com>
Use the vendored Hammerstad-Jensen/Cohn engine for microstrip, stripline, and coupled-diff advice. Skip OpenEMS/pcbnew and refuse CPWG rather than inventing a number.
Co-authored-by: Cursor <cursoragent@cursor.com>
Cache distributor EOL/NRND/RoHS without inventing replacements, flag catalogued errata pull-ups only, and store layout_rules with a closed kind enum so millimetres stay null unless the datasheet stated a number.
Co-authored-by: Cursor <cursoragent@cursor.com>
Write pinscope-findings.json from the report, keep symbol uuid and child-sheet on the graph, and let the pcbnew plugin jump to a footprint or show the schematic uuid when IPC focus is unavailable.
Co-authored-by: Cursor <cursoragent@cursor.com>
Compare only specified IQ plus I_load to Iout_max and series-R drop, flag sequencing only when power_sequence is in specs, and treat DNP as a fitted-variant graph so a missing enable pull is ERROR only when the BOM actually marks DNP.
Co-authored-by: Cursor <cursoragent@cursor.com>
Match RC/LC/π/T without inventing fc, compare to ADC rate only when specs list it, and skip ferrite DCR unless the IC gives a limit. LDO Tj uses I_load not Iout_max, and missing θJA stays INFO.
Co-authored-by: Cursor <cursoragent@cursor.com>
Keep these as WARNING hints with wide bounds so a 4.7 kΩ or 100 nF VDD cap is not treated as a datasheet µF error.
Co-authored-by: Cursor <cursoragent@cursor.com>
V4.1 is natively multimodal so every stage uses deepseek-flash; pricing and the UI now surface dollars instead of empty credits. KiCad netlists and neighborhood fingerprints land in the same cut so a second run can keep the project and skip unchanged ICs.
Co-authored-by: Cursor <cursoragent@cursor.com>
Ignore enable straps on a power rail, NC nets, and SPI aliases; treat FB as an inductor and RN as a resistor so pull-ups and beads classify correctly.
Co-authored-by: Cursor <cursoragent@cursor.com>
Add Microchip/Murata/Silicon Labs URL tables, optional Mouser search, and suggested URLs on a miss so the wizard can open PDFs in the user's browser when the VPS is blocked.
Co-authored-by: Cursor <cursoragent@cursor.com>
Those 13 U* were in the BOM (TPS22965, TPD2E007, TMP117, …) but never entered ic_mpns, so review skipped them as missing PDFs. Also try the BOM Datasheet URL first.
Co-authored-by: Cursor <cursoragent@cursor.com>
Resume reuses pintables, skips LCSC/DigiKey before review, and emits a waiting heartbeat so a long DeepSeek turn is visible instead of a freeze.
Co-authored-by: Cursor <cursoragent@cursor.com>
Successful reviews are kept; skipped ICs such as a DeepSeek 400 are run again. Reprocess all re-reviews every IC while still using the library cache.
Co-authored-by: Cursor <cursoragent@cursor.com>
Decode EIA/Yageo/AVX chip codes into library specs, and find datasheets when the file is stored under the orderable catalog name.
Co-authored-by: Cursor <cursoragent@cursor.com>
Based on manvalan/pinscope main. Default LLM is DeepSeek with local
skills and PDF ingest. Datasheets are fetched from LCSC/TI, stored in
the component library, and review extracts abs-max with a deeper
checklist. Adds scripts/update-pinscope.sh for the production host.
The false-positive case log documents real production designs and belongs
in the private repo only. Contact-form fallback strings now point at the
public support address.
Agentic schematic validation: datasheet extraction via Claude Console
Skills, netlist/BOM design graph, per-IC direct datasheet review with
page citations, capacitor derating, Next.js report UI.
Extracted from the Pinscope cloud codebase. Auth and billing live in the
private gateway repo behind stable seams (billing_hook.py, adapter files
listed in CLAUDE.md).
micheleandCursor