michele/periscope
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5a69b380da909f31f18e2d1d735ddc7db72bec2a
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3 Commits
Author SHA1 Message Date
micheleandCursor 3f6082ae6d Run ImpedenceFinder Z0 on routed signal nets during project analysis. 
Pipeline samples PCB traces when stackup εr/h is present; power/ground are skipped. Named nets can be re-analyzed from the Impedance tab.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-11 00:21:49 +02:00
micheleandCursor 796cd9d8a2 Flag keepout tracks in the courtyard and mark the plan map OK. 
PS-PLC-004 is a foreign net endpoint inside the KiCad courtyard. The lista↔codice table and sprints 0–10+ get an OK column where the hole is closed without invented millimetres.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-11 00:11:02 +02:00
micheleandCursor e4fd6c3849 Ship Sprint 0 CAD foundations so findings, KiCad hierarchy, BOM match, eval, and optional PCB ingest have a stable contract. 
Extend Finding with rule_id/net/pins, flatten multi-sheet .kicad_sch, flag MPN mismatches, score simple_project, and parse .kicad_pcb without running layout DRC.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-10 21:54:37 +02:00