2 Commits

Include renames

Author	SHA1	Message	Date
micheleandCursor	78013bd404	Add power-margin, PG-to-EN sequencing, and DNP enable checks. ... Compare only specified IQ plus I_load to Iout_max and series-R drop, flag sequencing only when power_sequence is in specs, and treat DNP as a fitted-variant graph so a missing enable pull is ERROR only when the BOM actually marks DNP. Co-authored-by: Cursor <cursoragent@cursor.com>	2026-09-10 22:34:06 +02:00
micheleandCursor	a45a06e761	Add schematic filter topology and LDO/resistor thermal checks. ... Match RC/LC/π/T without inventing fc, compare to ADC rate only when specs list it, and skip ferrite DCR unless the IC gives a limit. LDO Tj uses I_load not Iout_max, and missing θJA stays INFO. Co-authored-by: Cursor <cursoragent@cursor.com>	2026-09-10 22:28:40 +02:00