michele/periscope
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
77 Commits 7 Branches 1 Tag
21e2be1cd037a8a74f8fd3d65a9d4e084d5b9e88
Commit Graph
3 Commits
Author SHA1 Message Date
micheleandCursor 21e2be1cd0 Strengthen pintable layout_rules skill and refresh empty extractions. 
Treat PCB/application layout guidance as a first-class extract, keep those pages in PDF trim, and re-run IC extraction once when rules are still empty under older model_version.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-13 18:01:15 +02:00
micheleandCursor 45e820fabc Add PCB intra-pair skew only when the datasheet gives millimetres. 
PS-SI-001 and decoupling skip without a numeric layout_rule. Tests use simple_project nets, not invented USBPHY boards.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-10 23:34:57 +02:00
micheleandCursor 7aed64cae5 Add lifecycle, errata, internal-features, and layout_rules checks. 
Cache distributor EOL/NRND/RoHS without inventing replacements, flag catalogued errata pull-ups only, and store layout_rules with a closed kind enum so millimetres stay null unless the datasheet stated a number.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-09-10 22:48:27 +02:00