Add AF trace analysis after PCB checks (2.63.5).

Trigger λ/10 and tr/(6 tpd) from FACT; pairs analyzed together; Z only from datasheet; visible INSUFFICIENT skips; lossless RLGC cascade (no OpenEMS).
2026-09-22 08:39:37 +02:00
parent 8b4f7710cf
commit c87adf11a9
15 changed files with 1469 additions and 7 deletions
@@ -60,6 +60,8 @@ def test_parse_segment_and_via_resolve_net_name(tmp_path: Path):
    assert g.segments[0].net == "GND"
    assert len(g.vias) == 1
    assert g.vias[0].net == "GND"
+    assert g.vias[0].drill == pytest.approx(0.4)
+    assert g.vias[0].layers == ("F.Cu", "B.Cu")


 def test_power_flag_footprint_is_skipped(tmp_path: Path):