Rewrite PADS/BOM dispatch and EDIF ingest as Periscope parsers.
KiCad schematic parser and PCB via≠pad parser stay native. Inherited parser files remain in dependency/.
This commit is contained in:
@@ -0,0 +1,213 @@
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"""Periscope schematic ingest: PADS ASCII, BOM CSV, and format dispatch.
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KiCad schematic/netlist parsing stays in ``parsers_kicad`` (already native).
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KiCad PCB via≠pad stays in ``parsers_kicad_pcb``. EDIF lives in ``parsers_edif``.
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"""
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from __future__ import annotations
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import csv
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import re
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from pathlib import Path
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from typing import Literal
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NetlistFormat = Literal["pads", "edif", "kicad_xml", "kicad_sexp", "kicad_sch"]
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_GND_EXACT = {"GND", "AGND", "DGND", "PGND", "VSS", "0V"}
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_DNP_TRUE = {"1", "y", "yes", "true", "dnp", "dni", "x"}
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_FITTED_FALSE = {"0", "n", "no", "false"}
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def detect_netlist_format(content: bytes | str) -> NetlistFormat:
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if isinstance(content, bytes):
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text = content[:2048].decode("utf-8", errors="replace")
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else:
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text = content[:2048]
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head = text.lstrip("\ufeff").lstrip()
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low = head[:40].lower()
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if low.startswith("(edif"):
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return "edif"
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if low.startswith("(kicad_sch"):
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return "kicad_sch"
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if low.startswith("(export"):
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return "kicad_sexp"
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if low.startswith("<?xml") or low.startswith("<export"):
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return "kicad_xml"
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return "pads"
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def _match_known_ref(tokens: list[str], known_refs: set[str] | None) -> tuple[str | None, str]:
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if not tokens:
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return None, ""
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if known_refs:
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for n in range(min(len(tokens), 8), 0, -1):
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candidate = " ".join(tokens[:n])
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if candidate in known_refs:
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return candidate, " ".join(tokens[n:])
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if len(tokens) >= 2:
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return tokens[0], " ".join(tokens[1:])
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return tokens[0], ""
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def _pins_from_signal_line(tokens: list[str], known_refs: set[str] | None) -> list[tuple[str, str]]:
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pins: list[tuple[str, str]] = []
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consumed = -1
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for j, token in enumerate(tokens):
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if j <= consumed or "." not in token:
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continue
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last_word, pin = token.rsplit(".", 1)
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if known_refs:
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matched_start: int | None = None
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for start in range(consumed + 1, j + 1):
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parts = tokens[start:j] + ([last_word] if last_word else [])
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candidate = " ".join(parts)
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if candidate and candidate in known_refs:
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matched_start = start
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break
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if matched_start is not None:
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ref = " ".join(tokens[matched_start:j] + ([last_word] if last_word else []))
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pins.append((ref, pin))
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consumed = j
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continue
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pins.append((last_word, pin))
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consumed = j
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return pins
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def parse_netlist(
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path: str | Path,
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known_refs: set[str] | None = None,
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) -> tuple[dict[str, str], dict[str, list[tuple[str, str]]]]:
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"""Parse PADS-PCB ASCII (``.asc``). Multi-word refs need ``known_refs`` from the BOM."""
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parts: dict[str, str] = {}
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nets: dict[str, list[tuple[str, str]]] = {}
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section: str | None = None
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current_net: str | None = None
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for raw_line in Path(path).read_text().splitlines():
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line = raw_line.strip()
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if not line:
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continue
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if line.startswith("*"):
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if line.startswith("*SIGNAL*"):
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pass
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elif line.startswith("*PART*"):
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section, current_net = "part", None
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continue
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elif line.startswith("*NET*"):
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section, current_net = "net", None
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continue
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elif line.startswith("*END*"):
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break
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else:
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section, current_net = None, None
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continue
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if section == "part":
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ref, footprint = _match_known_ref(line.split(), known_refs)
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if ref:
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parts[ref] = footprint
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elif section == "net":
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if line.startswith("*SIGNAL*"):
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current_net = line.split("*SIGNAL*", 1)[1].strip()
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nets.setdefault(current_net, [])
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elif current_net is not None:
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nets[current_net].extend(_pins_from_signal_line(line.split(), known_refs))
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if not parts and nets:
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for pins in nets.values():
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for ref, _pin in pins:
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parts.setdefault(ref, "")
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return parts, nets
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def parse_netlist_any(
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path: str | Path,
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known_refs: set[str] | None = None,
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*,
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include_subdesigns: set[str] | None = None,
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) -> tuple[dict[str, str], dict[str, list[tuple[str, str]]], NetlistFormat]:
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p = Path(path)
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fmt = detect_netlist_format(p.read_bytes()[:2048])
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if fmt == "edif":
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from backend.periscopex.parsers_edif import parse_edif_netlist
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parts, nets = parse_edif_netlist(p, include_subdesigns=include_subdesigns)
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elif fmt.startswith("kicad"):
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from backend.periscopex.parsers_kicad import parse_kicad
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parts, nets, _ = parse_kicad(p)
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else:
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parts, nets = parse_netlist(p, known_refs=known_refs)
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return parts, nets, fmt
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def validate_netlist(parts: dict, nets: dict) -> list[str]:
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errors: list[str] = []
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if not parts:
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errors.append(
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"No components found — is this a PADS-PCB (.asc), EDIF (.edn), "
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"or KiCad netlist / .kicad_sch?"
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)
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return errors
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if not nets:
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errors.append("No nets found — the connectivity section (*NET*) is missing or empty")
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return errors
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refs_in_nets = {ref for pins in nets.values() for ref, _ in pins}
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if not (set(parts) & refs_in_nets):
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errors.append(
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"No components are wired to any net — the connectivity section may be missing or malformed"
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)
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has_gnd = any(
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n.upper() in _GND_EXACT or n.upper().endswith("GND") or n.upper().startswith("GND")
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for n in nets
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)
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if not has_gnd:
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errors.append(
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"No ground net found (expected GND, AGND, DGND, VSS, etc.) — "
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"this may not be a complete schematic netlist"
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)
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return errors
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def parse_bom(
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path: str | Path,
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*,
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reference_col: str = "Reference",
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mpn_col: str = "Manufacturer Part Number",
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) -> dict[str, dict]:
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result: dict[str, dict] = {}
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reader = csv.DictReader(Path(path).read_text().splitlines())
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colnames = {n.lower() for n in (reader.fieldnames or []) if n}
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has_dnp_col = bool(colnames & {"dnp", "dni", "fitted", "populate"})
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has_variant_col = bool(colnames & {"variant"})
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for row in reader:
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refs_raw = row.get(reference_col, "")
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value = row.get("Value", "") or row.get("Comment", "")
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footprint = row.get("Footprint", "")
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mpn = (row.get(mpn_col, "") or "").strip() or None
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lcsc = row.get("LCSC", "") or None
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datasheet_url = (row.get("Datasheet", "") or "").strip() or None
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refs = [r.strip() for r in refs_raw.split(",") if r.strip()]
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if not mpn:
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mpn = (row.get("PNM", "") or "").strip() or None
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if not mpn and any(re.match(r"^U\d", r, re.I) for r in refs):
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mpn = (value or "").strip() or None
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dnp_raw = (row.get("DNP") or row.get("DNI") or "").strip().lower()
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fitted_raw = (row.get("Fitted") or row.get("Populate") or "").strip().lower()
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variant = (row.get("Variant") or row.get("variant") or "").strip() or None
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is_dnp = dnp_raw in _DNP_TRUE
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if not is_dnp and fitted_raw in _FITTED_FALSE:
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is_dnp = True
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for ref in refs:
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entry = {
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"value": value,
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"footprint": footprint,
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"mpn": mpn,
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"lcsc": lcsc,
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"datasheet_url": datasheet_url,
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}
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if has_dnp_col:
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entry["dnp"] = is_dnp
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if has_variant_col:
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entry["variant"] = variant
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result[ref] = entry
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return result
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@@ -0,0 +1,465 @@
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"""Periscope EDIF 2.0.0 schematic netlist ingest (Siemens xDX Designer).
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Returns the same ``(parts, nets)`` maps as PADS ingest. This module never
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emits layout vias, pads, tracks, or zones — those come from ``parsers_kicad_pcb``.
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"""
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from __future__ import annotations
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import re
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from pathlib import Path
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from typing import Iterator
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# ---------------------------------------------------------------------------
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# Tokenizer + s-expression parser
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# ---------------------------------------------------------------------------
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class _Str(str):
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"""Marker subclass so quoted-string tokens are distinguishable from atoms.
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Both atoms (e.g. ``viewRef``, ``&0441I3151``) and string values
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(e.g. ``"U3"``, ``"GROUND"``) end up as Python ``str`` in the parsed
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tree. EDIF rarely needs that distinction — string equality compares the
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same way — but the marker is here in case future logic does.
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"""
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def _tokenize(text: str) -> Iterator[object]:
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"""Yield tokens: ``'('``, ``')'``, atom :class:`str`, or quoted :class:`_Str`."""
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i, n = 0, len(text)
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while i < n:
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c = text[i]
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if c.isspace():
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i += 1
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continue
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if c == ";":
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# EDIF doesn't really use comments, but tolerate them just in case
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while i < n and text[i] != "\n":
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i += 1
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continue
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if c in "()":
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yield c
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i += 1
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continue
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if c == '"':
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j = i + 1
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buf: list[str] = []
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while j < n and text[j] != '"':
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if text[j] == "\\" and j + 1 < n:
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buf.append(text[j + 1])
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j += 2
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else:
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buf.append(text[j])
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j += 1
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yield _Str("".join(buf))
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i = j + 1
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continue
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j = i
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while j < n and not text[j].isspace() and text[j] not in '()"':
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j += 1
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yield text[i:j]
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i = j
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def _parse_sexp(tokens: list[object]) -> list:
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"""Build a nested list tree. Atoms / strings remain as ``str`` / ``_Str``."""
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it = iter(tokens)
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def parse_form() -> list:
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result: list = []
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for tok in it:
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if tok == "(":
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result.append(parse_form())
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elif tok == ")":
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return result
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else:
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result.append(tok)
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return result # unterminated at EOF — return what we have
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top: list = []
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for tok in it:
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if tok == "(":
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top.append(parse_form())
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elif tok == ")":
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raise ValueError("EDIF: unexpected ')' at top level")
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else:
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top.append(tok)
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return top
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# ---------------------------------------------------------------------------
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# Tree walkers
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# ---------------------------------------------------------------------------
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def _walk(node: object, head: str) -> Iterator[list]:
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"""Yield every nested list whose first element equals ``head``."""
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if not isinstance(node, list):
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return
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if node and isinstance(node[0], str) and node[0] == head:
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yield node
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for child in node:
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if isinstance(child, list):
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yield from _walk(child, head)
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def _node_id(node: list) -> str | None:
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"""Return the identifying atom of ``(<head> <id> ...)``.
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Handles ``(<head> (rename &INTERNAL "display") ...)`` by returning
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``&INTERNAL`` — the form used elsewhere by ``cellRef`` / ``instanceRef``.
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"""
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if len(node) < 2:
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return None
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second = node[1]
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if isinstance(second, list) and len(second) >= 2 and second[0] == "rename":
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return str(second[1])
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if isinstance(second, str):
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return str(second)
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return None
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def _direct_property(node: list, prop_name: str) -> str | None:
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"""Return the string value of a ``(property NAME (string "X") ...)`` child.
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Only looks at direct children of ``node`` — does not recurse into nested
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forms — so it can be called on an ``instance`` without picking up
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properties tucked inside ``portInstance`` blocks.
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"""
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for child in node:
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if not (isinstance(child, list) and len(child) >= 2 and child[0] == "property"):
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continue
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name_node = child[1]
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if isinstance(name_node, list) and name_node and name_node[0] == "rename":
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actual = str(name_node[1]) if len(name_node) >= 2 else ""
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elif isinstance(name_node, str):
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actual = str(name_node)
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else:
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continue
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if actual != prop_name:
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continue
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for elem in child[2:]:
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if isinstance(elem, list) and len(elem) >= 2 and elem[0] == "string":
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return str(elem[1])
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return None
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# ---------------------------------------------------------------------------
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# Stage extractors
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# ---------------------------------------------------------------------------
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def _build_cell_library(tree: list) -> dict[tuple[str, str], dict[str, str | None]]:
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"""Build ``(library_name, cell_id) -> {port_name: pin_type}``.
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``pin_type`` is ``"GROUND"`` (or any other ``Pin_Type`` property value) when
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the cell tagged the port; ``None`` when no Pin_Type property is present.
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Used to detect which nets are ground.
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"""
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cells: dict[tuple[str, str], dict[str, str | None]] = {}
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for lib in _walk(tree, "library"):
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if len(lib) < 2:
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continue
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lib_name = str(lib[1])
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for cell in _walk(lib, "cell"):
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cell_id = _node_id(cell)
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if not cell_id:
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continue
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port_map: dict[str, str | None] = {}
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for port in _walk(cell, "port"):
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if len(port) < 2:
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continue
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port_name = str(port[1])
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port_map[port_name] = _direct_property(port, "Pin_Type")
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cells[(lib_name, cell_id)] = port_map
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return cells
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def _find_cell_ref(node: list) -> tuple[str, str] | None:
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"""From an ``(instance ...)`` form, return ``(library_name, cell_id)`` from
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its ``(viewRef VIEW (cellRef CELL (libraryRef LIB)))`` triple."""
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for child in node:
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if not (isinstance(child, list) and child and child[0] == "viewRef"):
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continue
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for sub in child[1:]:
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if isinstance(sub, list) and len(sub) >= 2 and sub[0] == "cellRef":
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cell_id = str(sub[1])
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lib_name = ""
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for sub2 in sub[2:]:
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if isinstance(sub2, list) and len(sub2) >= 2 and sub2[0] == "libraryRef":
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lib_name = str(sub2[1])
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break
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return (lib_name, cell_id)
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return None
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_SUBDESIGN_PREFIX = re.compile(r"^(&\d+)[IN]\d+")
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def _subdesign_id(internal_id: str | None) -> str | None:
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"""Extract the sub-design prefix from an EDIF instance or net ID.
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Siemens xDX Designer emits internal IDs like ``&0441I2234`` (instance) or
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``&0441N2250`` (net), where ``&0441`` identifies the sub-design /
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schematic view the symbol belongs to. Different sub-designs in one file
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get different numeric prefixes; back-annotation, contents, and viewMap
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all reuse the same prefix per design.
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Returns ``None`` when the ID doesn't match the prefix scheme (bare-named
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cells, named nets like ``+5V``, or exports from non-xDX tools). The
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parser treats ``None`` as "shared / no sub-design" and includes those
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forms in every selection.
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"""
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if not internal_id:
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return None
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m = _SUBDESIGN_PREFIX.match(internal_id)
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return m.group(1) if m else None
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def _build_instance_map(tree: list) -> dict[str, dict]:
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"""Walk every ``(instance ...)`` form. Skip back-annotation refs in viewMap.
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Each entry: ``{cell_ref, port_pins, inline_designator, footprint, subdesign_id}``.
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"""
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instances: dict[str, dict] = {}
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for inst in _walk(tree, "instance"):
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inst_id = _node_id(inst)
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if not inst_id:
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continue
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cell_ref = _find_cell_ref(inst)
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port_pins: dict[str, str] = {}
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inline_des: str | None = None
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for child in inst:
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if not isinstance(child, list) or not child:
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continue
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if child[0] == "portInstance" and len(child) >= 2:
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port_name = str(child[1])
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for sub in child[2:]:
|
||||
if isinstance(sub, list) and len(sub) >= 2 and sub[0] == "designator":
|
||||
port_pins[port_name] = str(sub[1])
|
||||
break
|
||||
elif child[0] == "designator" and len(child) >= 2 and inline_des is None:
|
||||
inline_des = str(child[1])
|
||||
|
||||
instances[inst_id] = {
|
||||
"cell_ref": cell_ref,
|
||||
"port_pins": port_pins,
|
||||
"inline_designator": inline_des,
|
||||
"footprint": _direct_property(inst, "Cell_Name") or "",
|
||||
"subdesign_id": _subdesign_id(inst_id),
|
||||
}
|
||||
return instances
|
||||
|
||||
|
||||
def _build_back_annotation(tree: list) -> dict[str, str]:
|
||||
"""``instance_id -> real_designator`` from ``viewMap.instanceBackAnnotate``."""
|
||||
annotations: dict[str, str] = {}
|
||||
for ann in _walk(tree, "instanceBackAnnotate"):
|
||||
inst_id: str | None = None
|
||||
des: str | None = None
|
||||
for child in ann[1:]:
|
||||
if not isinstance(child, list) or len(child) < 2:
|
||||
continue
|
||||
if child[0] == "instanceRef":
|
||||
inst_id = str(child[1])
|
||||
elif child[0] == "designator":
|
||||
des = str(child[1])
|
||||
if inst_id and des:
|
||||
annotations[inst_id] = des
|
||||
return annotations
|
||||
|
||||
|
||||
def _is_template_designator(des: str) -> bool:
|
||||
"""xDX exports unconfigured instances with templates like ``R?`` / ``U?``."""
|
||||
return des.endswith("?")
|
||||
|
||||
|
||||
def _resolve_designators(
|
||||
instances: dict[str, dict], back_anno: dict[str, str]
|
||||
) -> dict[str, str]:
|
||||
"""For each instance, pick the real designator. Drop template-only ones."""
|
||||
resolved: dict[str, str] = {}
|
||||
for inst_id, inst in instances.items():
|
||||
inline = inst["inline_designator"]
|
||||
annotated = back_anno.get(inst_id)
|
||||
if inline and not _is_template_designator(inline):
|
||||
resolved[inst_id] = inline
|
||||
elif annotated and not _is_template_designator(annotated):
|
||||
resolved[inst_id] = annotated
|
||||
# else: unconfigured library symbol — skip
|
||||
return resolved
|
||||
|
||||
|
||||
def _extract_nets(
|
||||
tree: list,
|
||||
instances: dict[str, dict],
|
||||
designators: dict[str, str],
|
||||
cell_lib: dict[tuple[str, str], dict[str, str | None]],
|
||||
include_subdesigns: set[str] | None = None,
|
||||
) -> dict[str, list[tuple[str, str]]]:
|
||||
"""Walk every ``(net ...)`` form. Rename ground-touching nets to ``GND``.
|
||||
|
||||
When ``include_subdesigns`` is supplied, endpoints belonging to
|
||||
excluded sub-designs are dropped. A net is kept iff it has at least one
|
||||
surviving endpoint — bare-named nets (no sub-design prefix) survive as
|
||||
long as any of their referenced instances does.
|
||||
"""
|
||||
nets: dict[str, list[tuple[str, str]]] = {}
|
||||
for net in _walk(tree, "net"):
|
||||
if len(net) < 2:
|
||||
continue
|
||||
name_node = net[1]
|
||||
if isinstance(name_node, list) and len(name_node) >= 3 and name_node[0] == "rename":
|
||||
net_name = str(name_node[2])
|
||||
elif isinstance(name_node, str):
|
||||
net_name = str(name_node)
|
||||
else:
|
||||
continue
|
||||
|
||||
connections: list[tuple[str, str]] = []
|
||||
touches_ground = False
|
||||
for child in net[1:]:
|
||||
if not (isinstance(child, list) and child and child[0] == "joined"):
|
||||
continue
|
||||
for ref in child[1:]:
|
||||
if not (isinstance(ref, list) and len(ref) >= 2 and ref[0] == "portRef"):
|
||||
continue
|
||||
port_name = str(ref[1])
|
||||
inst_id: str | None = None
|
||||
for sub in ref[2:]:
|
||||
if isinstance(sub, list) and len(sub) >= 2 and sub[0] == "instanceRef":
|
||||
inst_id = str(sub[1])
|
||||
break
|
||||
if not inst_id or inst_id not in instances:
|
||||
continue
|
||||
inst = instances[inst_id]
|
||||
if include_subdesigns is not None:
|
||||
if inst["subdesign_id"] not in include_subdesigns:
|
||||
continue
|
||||
pin = inst["port_pins"].get(port_name)
|
||||
des = designators.get(inst_id)
|
||||
if not pin or not des:
|
||||
continue
|
||||
if inst["cell_ref"]:
|
||||
port_map = cell_lib.get(inst["cell_ref"], {})
|
||||
if port_map.get(port_name) == "GROUND":
|
||||
touches_ground = True
|
||||
connections.append((des, pin))
|
||||
|
||||
if not connections:
|
||||
continue
|
||||
final_name = "GND" if touches_ground else net_name
|
||||
nets.setdefault(final_name, []).extend(connections)
|
||||
return nets
|
||||
|
||||
|
||||
# ---------------------------------------------------------------------------
|
||||
# Public entry point
|
||||
# ---------------------------------------------------------------------------
|
||||
|
||||
|
||||
def _parse_tree(path: str | Path) -> list:
|
||||
text = Path(path).read_text(encoding="utf-8", errors="replace")
|
||||
return _parse_sexp(list(_tokenize(text)))
|
||||
|
||||
|
||||
def parse_edif_netlist(
|
||||
path: str | Path,
|
||||
*,
|
||||
include_subdesigns: set[str] | None = None,
|
||||
) -> tuple[dict[str, str], dict[str, list[tuple[str, str]]]]:
|
||||
"""Parse a Siemens xDX Designer EDIF 2.0.0 netlist (``.edn``).
|
||||
|
||||
Args:
|
||||
path: file to parse.
|
||||
include_subdesigns: when supplied, restrict the output to instances
|
||||
whose ``&NNNN`` sub-design prefix is in this set. Instances with
|
||||
no prefix (bare-named cells) are always kept. ``None`` (default)
|
||||
includes every sub-design — same behavior as before this flag
|
||||
existed.
|
||||
|
||||
Returns:
|
||||
parts: ``{reference: footprint}`` (footprint from the instance's
|
||||
``Cell_Name`` property — typically a package size like ``"0402"``)
|
||||
nets: ``{net_name: [(component_ref, pin_number), ...]}``
|
||||
|
||||
Ground nets are renamed to ``"GND"`` based on ``Pin_Type=GROUND`` port
|
||||
tags in the cell library; if no port tags ground (rare), net names stay
|
||||
as the EDIF-generated ``$NN…`` strings and downstream validation will
|
||||
surface the missing ground.
|
||||
"""
|
||||
tree = _parse_tree(path)
|
||||
|
||||
cell_lib = _build_cell_library(tree)
|
||||
instances = _build_instance_map(tree)
|
||||
back_anno = _build_back_annotation(tree)
|
||||
designators = _resolve_designators(instances, back_anno)
|
||||
|
||||
if include_subdesigns is not None:
|
||||
# Drop excluded instances before nets are walked. Instances with
|
||||
# subdesign_id=None (bare-named, no prefix) are always kept — they're
|
||||
# shared between sub-designs in the xDX export and dropping them
|
||||
# would orphan otherwise-included nets.
|
||||
designators = {
|
||||
iid: des
|
||||
for iid, des in designators.items()
|
||||
if instances[iid]["subdesign_id"] is None
|
||||
or instances[iid]["subdesign_id"] in include_subdesigns
|
||||
}
|
||||
|
||||
nets = _extract_nets(
|
||||
tree, instances, designators, cell_lib,
|
||||
include_subdesigns=include_subdesigns,
|
||||
)
|
||||
|
||||
parts: dict[str, str] = {}
|
||||
for inst_id, des in designators.items():
|
||||
parts[des] = instances[inst_id]["footprint"]
|
||||
|
||||
return parts, nets
|
||||
|
||||
|
||||
def list_edif_subdesigns(path: str | Path) -> list[dict]:
|
||||
"""Return one entry per sub-design found in the file.
|
||||
|
||||
Each entry: ``{"id": "&0441", "instance_count": 21,
|
||||
"designators": ["C1", "C2", ...]}``. Sub-designs are identified by the
|
||||
``&NNNN`` prefix on EDIF instance IDs; instances with no prefix (bare
|
||||
cells, rare in xDX exports) are bundled under ``"id": None`` and are
|
||||
always included regardless of the user's selection.
|
||||
|
||||
Designators are sorted naturally (R1 before R10) within each sub-design;
|
||||
sub-designs themselves are sorted by their first BOM-style designator so
|
||||
output is deterministic across runs.
|
||||
"""
|
||||
tree = _parse_tree(path)
|
||||
instances = _build_instance_map(tree)
|
||||
back_anno = _build_back_annotation(tree)
|
||||
designators = _resolve_designators(instances, back_anno)
|
||||
|
||||
by_sub: dict[str | None, list[str]] = {}
|
||||
for iid, des in designators.items():
|
||||
sub = instances[iid]["subdesign_id"]
|
||||
by_sub.setdefault(sub, []).append(des)
|
||||
|
||||
def _key(des: str) -> tuple:
|
||||
# Sort R1 before R10 — split on the first digit run.
|
||||
head = des.rstrip("0123456789")
|
||||
tail = des[len(head):]
|
||||
return (head, int(tail) if tail.isdigit() else 0)
|
||||
|
||||
out: list[dict] = []
|
||||
for sub, dlist in by_sub.items():
|
||||
dlist.sort(key=_key)
|
||||
out.append({
|
||||
"id": sub,
|
||||
"instance_count": len(dlist),
|
||||
"designators": dlist,
|
||||
})
|
||||
|
||||
out.sort(key=lambda e: (e["designators"][0] if e["designators"] else "", e["id"] or ""))
|
||||
return out
|
||||
@@ -0,0 +1,43 @@
|
||||
"""Schematic parsers load from src; they do not classify PCB vias as pads."""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
from pathlib import Path
|
||||
|
||||
import backend.periscopex.parsers as parsers
|
||||
import backend.periscopex.parsers_edif as parsers_edif
|
||||
import backend.periscopex.parsers_kicad_pcb as pcb
|
||||
from backend.periscopex.parsers import detect_netlist_format, parse_netlist_any
|
||||
|
||||
|
||||
def test_schematic_parsers_are_src():
|
||||
for mod, name in ((parsers, "parsers.py"), (parsers_edif, "parsers_edif.py")):
|
||||
path = Path(mod.__file__).resolve()
|
||||
assert path.name == name
|
||||
assert "src" in path.parts
|
||||
assert "Native Periscope overlay" not in path.read_text(encoding="utf-8")[:400]
|
||||
|
||||
|
||||
def test_pcb_parser_stays_native_kicad_pcb():
|
||||
path = Path(pcb.__file__).resolve()
|
||||
assert path.parts[-1] == "parsers_kicad_pcb.py"
|
||||
assert "src" in path.parts
|
||||
assert "_is_footprint_via" in path.read_text(encoding="utf-8")
|
||||
|
||||
|
||||
def test_detect_format_negative_pcb_is_not_edif_or_kicad_sch():
|
||||
# A board file starts with (kicad_pcb …), not schematic markers.
|
||||
sample = "(kicad_pcb (version 20240108)\n"
|
||||
assert detect_netlist_format(sample) == "pads" # unknown schematic → PADS sniff default
|
||||
|
||||
|
||||
def test_parse_netlist_any_pads_roundtrip(tmp_path: Path):
|
||||
asc = tmp_path / "n.asc"
|
||||
asc.write_text(
|
||||
"*PADS-PCB*\n*PART*\nR1 0603\nU1 QFP48\n*NET*\n*SIGNAL* GND\nR1.1 U1.8\n*SIGNAL* 3V3\nU1.7\n*END*\n"
|
||||
)
|
||||
parts, nets, fmt = parse_netlist_any(asc)
|
||||
assert fmt == "pads"
|
||||
assert parts["R1"] == "0603"
|
||||
assert ("R1", "1") in nets["GND"]
|
||||
assert "GND" in nets
|
||||
Reference in New Issue
Block a user