Add protocol-certification M10 catalog skeletons (2.72.0).

PCIe/CXL keep logical vs physical ids. I2C, CAN, RGMII and missing
high-speed processor interfaces get required_checks; numbers stay
UNKNOWN/MISSING_SOURCE until an official cite. No invented ohms.
This commit is contained in:
2026-09-22 13:03:48 +02:00
parent 866c2e9242
commit 7baffadd6b
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What's new in Periscope.
## 2.72.0 — 2026-09-22 — Protocol certification M10 (catalog skeletons)
Catalog skeletons and `required_checks` for **PCIe / CXL** (logical vs physical), **I2C**, **CAN**, **RGMII**, plus missing high-speed processor ids (PCI, PCI-X, CCIX, OpenCAPI, UPI, DMI, Infinity Fabric, HyperTransport, UCIe). Numbers stay **UNKNOWN / MISSING_SOURCE / PHY_DEPENDENT** until an official cite is in the pack. `pcb_relevant` is YES or CONDITIONAL as appropriate. No invented ohms, no USB-IF fill, no OpenEMS.
- [Changed] `protocol_catalog.py` + committed `catalog.json`.
- [New] pytest `tests/pcb/test_protocol_catalog_m10.py`.
## 2.71.0 — 2026-09-22 — Protocol certification M9 (L3 channel + visible skip)
L3 **CHANNEL** certifier: structure for timing budget (TOTALUSED=MARGIN), insertion loss, return loss, crosstalk, and complete channel. Numerical PASS/FAIL only when **existing channel FACT** (dB/ps) is already present — never invented S-parameters, never OpenEMS/FEM. Otherwise a visible skip: «Interfaccia X non certificata a L3 per mancanza di …». Internals (AXI/HBM) stay NOT_APPLICABLE. L0/L1 are not electrical. No M6 numeric packs.