Add power-margin, PG-to-EN sequencing, and DNP enable checks.
Compare only specified IQ plus I_load to Iout_max and series-R drop, flag sequencing only when power_sequence is in specs, and treat DNP as a fitted-variant graph so a missing enable pull is ERROR only when the BOM actually marks DNP. Co-authored-by: Cursor <cursoragent@cursor.com>
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@@ -94,7 +94,7 @@ export interface Net {
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export interface DesignGraph {
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components: Record<string, Component>;
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nets: Record<string, Net>;
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bom_fields?: Record<string, { mpn?: string | null; value?: string }>;
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bom_fields?: Record<string, { mpn?: string | null; value?: string; dnp?: boolean; variant?: string | null }>;
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schematic_fields?: Record<string, { mpn?: string | null; value?: string }>;
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}
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