Add HF line and bus analysis to run_pcb_checks (2.62.0).

Phase A: stub, return-split, and BOM termination on buses present on the
graph; DDR/CPU/FPGA class certifiers only when that device exists. Skip
without evidence. Via, pad, track, and zone stay distinct. Not DRC or FEM.

tests/test_si_check.py

@@ -78,6 +78,9 @@ def test_skip_i2c_gpio_cc_regn():
     assert bus_class("SGMII_TX_P") == "sgmii"
     assert bus_class("DDR3_DQ0") == "ddr3_dq"
     assert bus_class("DDR3_DQS0_P") == "ddr3_dqs"
+    assert bus_class("MIPI_D0_P") == "mipi"
+    assert bus_class("GTX_CLK") == "hf_clk"
+    assert bus_class("XTAL_IN") is None
     assert bus_class("USB_CC1") is None
     assert bus_class("I2C_SCL") is None