Add HF line and bus analysis to run_pcb_checks (2.62.0).

Phase A: stub, return-split, and BOM termination on buses present on the
graph; DDR/CPU/FPGA class certifiers only when that device exists. Skip
without evidence. Via, pad, track, and zone stay distinct. Not DRC or FEM.

tests/test_interface_class_check.py

@@ -559,7 +559,9 @@ def test_run_pcb_checks_skips_absent_interfaces():
     assert "PE-USBC-001" not in ids
     assert "PE-ETH-001" not in ids
     assert "PE-POE-001" not in ids
-    if_f = [f for f in findings if (f.rule_id or "").startswith(("PE-USBC", "PE-ETH", "PE-POE", "PE-DDR"))]
+    if_f = [f for f in findings if (f.rule_id or "").startswith(
+        ("PE-USBC", "PE-ETH", "PE-POE", "PE-DDR", "PE-CPU", "PE-FPGA")
+    )]
     assert if_f == []