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Check ImpedenceFinder against datasheet SI rules, not a dump table.

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Each layout_rules SI requirement (diff/SE Z, skew, max length, spacing,
ref plane, vias, layer, return, series R) is one PASS/FAIL/MARGIN finding
with FACT and REQUIREMENT. USB/HDMI/PCIe/ETH/LVDS/DDR only; I2C GPIO CC
and analog REGN are skipped. No invented 90 Ω.
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michele
2026-09-20 10:45:27 +02:00
parent 187605763d
commit 65a91419a2
14 changed files with 956 additions and 67 deletions
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frontend/content/changelog.md
+9 -1
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@@ -2,7 +2,15 @@
What's new in Periscope.
## 2.33.2 — 2026-09-20 — PCB complete opens the findings tree
## 2.34.0 — 2026-09-20 — ImpedenceFinder SI checks (not a dump table)
USB/HDMI/PCIe/ETH/LVDS/DDR layout_rules (diff/SE Z, skew, max length, spacing, ref plane, vias, layer, return, series R) are compared to ImpedenceFinder + copper. One PASS/FAIL/MARGIN finding per requirement. I2C/GPIO/CC/REGN are not 50 Ω.
- [New] `PE-SI-002`…`PE-SI-010`; ImpedenceFinder `z0_avg/min/max` in `run_pcb_checks`.
- [Changed] `PE-SI-001` only on impedance-controlled buses matching the rule `net_class`.
- [Changed] extract-pintable `layout_rules` kinds for SI; `default_model_version` 1.11.0.
A finished PCB exam no longer shows the raw watcher string `pcb_status=complete (terminal)`. The SSE hatch emits `pcb_complete`; the PCB page then opens `/report?domain=layout` (expand-on-click tree).