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Check ImpedenceFinder against datasheet SI rules, not a dump table.

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Each layout_rules SI requirement (diff/SE Z, skew, max length, spacing,
ref plane, vias, layer, return, series R) is one PASS/FAIL/MARGIN finding
with FACT and REQUIREMENT. USB/HDMI/PCIe/ETH/LVDS/DDR only; I2C GPIO CC
and analog REGN are skipped. No invented 90 Ω.
This commit is contained in:
michele
2026-09-20 10:45:27 +02:00
parent 187605763d
commit 65a91419a2
14 changed files with 956 additions and 67 deletions
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backend/periscopex/finding_engine.py
+16
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@@ -133,6 +133,22 @@ def _seed() -> None:
("PE-SI-001", "Differential skew vs length_match mm."),
):
_add(rid, "MANDATORY", "RULE", domain="pcb", requirement=req)
_add("PE-SI-002", "RECOMMENDED", "RISK", domain="pcb",
requirement="Diff/SE Z0 vs datasheet window (ImpedenceFinder avg/min/max).")
_add("PE-SI-003", "RECOMMENDED", "RISK", domain="pcb",
requirement="Max routed length vs datasheet millimetres.")
_add("PE-SI-004", "RECOMMENDED", "RISK", domain="pcb",
requirement="Intra-pair spacing vs datasheet millimetres.")
_add("PE-SI-005", "RECOMMENDED", "RISK", domain="pcb",
requirement="Reference plane / topology vs datasheet.")
_add("PE-SI-006", "RECOMMENDED", "RISK", domain="pcb",
requirement="HS via count vs datasheet min/max.")
_add("PE-SI-008", "RECOMMENDED", "REVIEW", domain="pcb",
requirement="Return via next to an impedance-controlled pair.")
_add("PE-SI-009", "RECOMMENDED", "RISK", domain="pcb",
requirement="Series resistor on the HS net vs datasheet ohms.")
_add("PE-SI-010", "TYPICAL", "INFO", domain="pcb",
requirement="HS bus measured; library has no SI FACT — not 90 Ω folklore.")
_add("PE-PLC-004", "RECOMMENDED", "REVIEW", domain="pcb",
requirement="Keepout from layout_rules — not a DRC for pad copper.")
_add("PE-VIA-001", "TYPICAL", "INFO", domain="pcb",