Run ImpedenceFinder Z0 on routed signal nets during project analysis.
Pipeline samples PCB traces when stackup εr/h is present; power/ground are skipped. Named nets can be re-analyzed from the Impedance tab. Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
@@ -0,0 +1,156 @@
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"""ImpedenceFinder net analysis on specified PCB traces.
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Walks sampled points on named nets (net_walk + planes + zsolver).
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Stackup and widths come from the board (or explicit LayoutStackup).
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No invented εr/h; missing stackup or empty net list skips.
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"""
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from __future__ import annotations
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from dataclasses import asdict
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from backend.vendor_path import ensure_impedancefinder
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ensure_impedancefinder()
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from impedancefinder import net_analysis, report
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from impedancefinder.model import (
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BoardData,
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DielectricLayer,
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Point2D,
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Stackup,
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TraceSegment,
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ViaSpan,
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ZonePolygon,
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)
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from backend.pinscopex.impedance import GeometryError
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from backend.pinscopex.models import DesignGraph, LayoutGraph, NetType
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def _stackup(layout: LayoutGraph) -> Stackup:
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raw = layout.stackup
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if raw is None:
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raise GeometryError("PCB has no stackup (copper + dielectric εr/h)")
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t = raw.copper_thickness_mm
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if t is None or t <= 0:
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raise GeometryError("PCB stackup has no copper thickness")
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return Stackup(
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copper_layer_names=tuple(raw.copper_layers),
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dielectrics=tuple(
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DielectricLayer(name=d.name, er=d.er, height_mm=d.height_mm)
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for d in raw.dielectrics
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),
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copper_thickness_mm=t,
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)
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def layout_to_board_data(layout: LayoutGraph) -> BoardData:
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stackup = _stackup(layout)
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segments: list[TraceSegment] = []
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for s in layout.segments:
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if not s.net or s.width <= 0:
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continue
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segments.append(TraceSegment(
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net=s.net,
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layer=s.layer,
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start=Point2D(s.start[0], s.start[1]),
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end=Point2D(s.end[0], s.end[1]),
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width_mm=s.width,
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))
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vias: list[ViaSpan] = []
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layers = stackup.copper_layer_names
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if len(layers) >= 2:
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top, bot = layers[0], layers[-1]
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for v in layout.vias:
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if not v.net or v.drill is None or v.drill <= 0:
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continue
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vias.append(ViaSpan(
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net=v.net,
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position=Point2D(v.x, v.y),
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top_layer=top,
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bottom_layer=bot,
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drill_mm=v.drill,
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))
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zones: list[ZonePolygon] = []
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for z in layout.zones:
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rings = tuple(
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tuple(Point2D(x, y) for x, y in ring)
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for ring in z.outlines
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if len(ring) >= 3
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)
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if rings:
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zones.append(ZonePolygon(net=z.net, layer=z.layer, outlines_mm=rings))
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return BoardData(
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segments=tuple(segments),
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vias=tuple(vias),
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zone_polygons=tuple(zones),
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copper_layer_names=stackup.copper_layer_names,
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stackup=stackup,
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outline=None,
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)
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def analyze_specified_nets(
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layout: LayoutGraph,
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net_names: list[str],
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pitch_mm: float,
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) -> list[dict]:
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"""Analyze only the named nets. Empty names → []. Missing net → error row."""
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if pitch_mm <= 0:
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raise GeometryError("pitch_mm must be > 0")
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wanted = [n.strip() for n in net_names if n and n.strip()]
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if not wanted:
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return []
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board = layout_to_board_data(layout)
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stackup = board.stackup
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assert stackup is not None
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rows: list[dict] = []
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for name in wanted:
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segs = net_analysis.segments_for(board, name)
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if not segs:
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rows.append({"net_name": name, "error": "no segments on this net"})
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continue
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result = net_analysis.analyze_net(board, stackup, name, pitch_mm)
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summary = report.summarize_net(name, board, result)
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row = asdict(summary)
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row["sample_count"] = len(result.samples)
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rows.append(row)
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return rows
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# ImpedenceFinder net_walk sample interval (mm). Same as vendor
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# tests/test_net_walk.py pitch_mm=1.0 — not a Z0 target.
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NET_WALK_PITCH_MM = 1.0
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def nets_needed(layout: LayoutGraph, graph: DesignGraph | None) -> list[str]:
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"""Routed copper that is not a power/ground net in the schematic."""
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routed = {s.net for s in layout.segments if s.net and s.width > 0}
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needed: list[str] = []
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for name in sorted(routed):
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if graph is not None:
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net = graph.nets.get(name)
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if net is not None and net.net_type in (NetType.POWER, NetType.GROUND):
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continue
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needed.append(name)
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return needed
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def analyze_where_needed(
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layout: LayoutGraph,
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graph: DesignGraph | None = None,
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pitch_mm: float = NET_WALK_PITCH_MM,
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) -> dict:
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"""Pipeline entry: skip without stackup or without routed signal nets."""
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if pitch_mm <= 0:
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raise GeometryError("pitch_mm must be > 0")
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if layout.stackup is None:
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return {"pitch_mm": pitch_mm, "nets": [], "skipped": "no stackup"}
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names = nets_needed(layout, graph)
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if not names:
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return {"pitch_mm": pitch_mm, "nets": [], "skipped": "no routed signal nets"}
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return {
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"pitch_mm": pitch_mm,
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"nets": analyze_specified_nets(layout, names, pitch_mm),
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"skipped": None,
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}
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@@ -477,6 +477,25 @@ class LayoutVia(BaseModel):
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x: float
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y: float
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net: str = ""
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drill: float | None = None
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class LayoutDielectric(BaseModel):
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name: str
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er: float
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height_mm: float
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class LayoutStackup(BaseModel):
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copper_layers: list[str]
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dielectrics: list[LayoutDielectric]
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copper_thickness_mm: float | None = None
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class LayoutZone(BaseModel):
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net: str
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layer: str
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outlines: list[list[tuple[float, float]]] = []
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class LayoutGraph(BaseModel):
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@@ -485,4 +504,6 @@ class LayoutGraph(BaseModel):
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footprints: dict[str, LayoutFootprint] = {}
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segments: list[LayoutSegment] = []
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vias: list[LayoutVia] = []
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stackup: LayoutStackup | None = None
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zones: list[LayoutZone] = []
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@@ -8,11 +8,14 @@ from __future__ import annotations
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from pathlib import Path
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from backend.pinscopex.models import (
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LayoutDielectric,
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LayoutFootprint,
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LayoutGraph,
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LayoutPad,
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LayoutSegment,
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LayoutStackup,
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LayoutVia,
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LayoutZone,
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)
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from backend.pinscopex.parsers_kicad import (
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_at,
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@@ -47,6 +50,89 @@ def _pad_net(pad: object) -> str:
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return ""
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def _net_name(node: object, nets: dict[str, int]) -> str:
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n = _kid(node, "net")
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if not n or len(n) < 2:
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named = _val(node, "net_name")
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return named
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if len(n) >= 3:
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return str(n[2])
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try:
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code = int(_fnum(n[1]))
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except (TypeError, ValueError):
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return ""
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return next((name for name, c in nets.items() if c == code), str(code))
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def _layer_type(node: object) -> str:
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return str(_val(node, "type") or "").lower()
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def _parse_stackup(tree: object) -> LayoutStackup | None:
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setup = _kid(tree, "setup")
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if not setup:
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return None
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stack = _kid(setup, "stackup")
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if not stack:
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return None
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copper: list[str] = []
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dielectrics: list[LayoutDielectric] = []
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thicknesses: list[float] = []
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for layer in _kids(stack, "layer"):
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name = str(layer[1]) if len(layer) > 1 and not isinstance(layer[1], list) else ""
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kind = _layer_type(layer)
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thick = _kid(layer, "thickness")
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height = _fnum(thick[1]) if thick and len(thick) > 1 else None
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if kind == "copper" or name.endswith(".Cu"):
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if name:
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copper.append(name)
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if height is not None and height > 0:
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thicknesses.append(height)
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continue
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if kind in {"core", "prepreg", "dielectric"} or name.lower().startswith("dielectric"):
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er_el = _kid(layer, "epsilon_r")
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if er_el is None:
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er_el = _kid(layer, "epsilonr")
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er = _fnum(er_el[1]) if er_el and len(er_el) > 1 else None
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if er is None or height is None or er <= 0 or height <= 0:
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continue
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dielectrics.append(LayoutDielectric(
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name=name or f"dielectric_{len(dielectrics)}",
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er=er,
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height_mm=height,
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))
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if len(copper) < 2 or len(dielectrics) != len(copper) - 1:
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return None
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t = thicknesses[0] if thicknesses else None
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return LayoutStackup(
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copper_layers=copper,
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dielectrics=dielectrics,
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copper_thickness_mm=t,
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)
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def _pts_xy(node: object) -> list[tuple[float, float]]:
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pts_el = _kid(node, "pts")
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if not pts_el:
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return []
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out: list[tuple[float, float]] = []
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for xy in pts_el[1:]:
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if isinstance(xy, list) and xy and xy[0] == "xy" and len(xy) >= 3:
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out.append((_fnum(xy[1]), _fnum(xy[2])))
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return out
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def _parse_zone(node: object, nets: dict[str, int]) -> list[LayoutZone]:
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net = str(_val(node, "net_name") or "") or _net_name(node, nets)
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zones: list[LayoutZone] = []
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for poly in _kids(node, "filled_polygon"):
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layer = _val(poly, "layer")
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pts = _pts_xy(poly)
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if layer and len(pts) >= 3:
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zones.append(LayoutZone(net=net, layer=layer, outlines=[pts]))
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return zones
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def _is_crtyd(layer: str) -> bool:
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return str(layer).endswith("CrtYd")
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@@ -105,6 +191,7 @@ def parse_kicad_pcb(path: str | Path) -> LayoutGraph:
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footprints: dict[str, LayoutFootprint] = {}
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segments: list[LayoutSegment] = []
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vias: list[LayoutVia] = []
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zones: list[LayoutZone] = []
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for node in tree[1:]:
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if not isinstance(node, list) or not node:
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@@ -150,31 +237,29 @@ def parse_kicad_pcb(path: str | Path) -> LayoutGraph:
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)
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continue
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if tag == "segment":
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net_el = _kid(node, "net")
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net_name = ""
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if net_el and len(net_el) >= 2:
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code = int(_fnum(net_el[1]))
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net_name = next((n for n, c in nets.items() if c == code), str(code))
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segments.append(LayoutSegment(
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start=_xy(node, "start"),
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end=_xy(node, "end"),
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width=_fnum(_val(node, "width") or 0),
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layer=_val(node, "layer"),
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net=net_name,
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net=_net_name(node, nets),
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))
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continue
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if tag == "via":
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net_el = _kid(node, "net")
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net_name = ""
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if net_el and len(net_el) >= 2:
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code = int(_fnum(net_el[1]))
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net_name = next((n for n, c in nets.items() if c == code), str(code))
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drill_el = _kid(node, "drill")
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drill = _fnum(drill_el[1]) if drill_el and len(drill_el) > 1 else None
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vx, vy, _ = _at(node)
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vias.append(LayoutVia(x=vx, y=vy, net=net_name))
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vias.append(LayoutVia(x=vx, y=vy, net=_net_name(node, nets), drill=drill))
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continue
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if tag == "zone":
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zones.extend(_parse_zone(node, nets))
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continue
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return LayoutGraph(
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nets=nets,
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footprints=footprints,
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segments=segments,
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vias=vias,
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stackup=_parse_stackup(tree),
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zones=zones,
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)
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@@ -1,11 +1,13 @@
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"""Standalone impedance calculator (no PCB, no findings)."""
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"""Impedance calculator and ImpedenceFinder analysis of PCB nets."""
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from __future__ import annotations
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import os
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import tempfile
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from dataclasses import asdict
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from typing import Literal
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from fastapi import APIRouter, HTTPException
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from fastapi import APIRouter, HTTPException, Request
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from pydantic import BaseModel
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from backend.pinscopex.impedance import (
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@@ -19,6 +21,13 @@ from backend.pinscopex.impedance import (
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stackup_targets,
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stripline_z0,
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)
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from backend.pinscopex.impedance_traces import (
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NET_WALK_PITCH_MM,
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analyze_specified_nets,
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)
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from backend.pinscopex.parsers_kicad_pcb import parse_kicad_pcb
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from backend.routers.deps import get_storage, resolve_or_404
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from backend.services import projects as proj_svc
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router = APIRouter(tags=["impedance"])
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@@ -73,3 +82,44 @@ def compute_impedance(body: ImpedanceRequest):
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return _z_for_kind(kind, geo)
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except GeometryError as exc:
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raise HTTPException(400, str(exc)) from exc
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class NetsRequest(BaseModel):
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nets: list[str]
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pitch_mm: float | None = None
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@router.get("/projects/{project_id}/impedance/nets")
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async def get_project_impedance_nets(project_id: str, request: Request):
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storage = get_storage(request)
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owner, _ = await resolve_or_404(request, project_id)
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prefix = proj_svc.project_prefix(owner, project_id)
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key = f"{prefix}/impedance_nets.json"
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if not storage.exists(key):
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return {"pitch_mm": NET_WALK_PITCH_MM, "nets": [], "skipped": "not run"}
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return storage.read_json(key)
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@router.post("/projects/{project_id}/impedance/nets")
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async def analyze_project_impedance_nets(
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project_id: str, body: NetsRequest, request: Request,
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):
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storage = get_storage(request)
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owner, _ = await resolve_or_404(request, project_id)
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prefix = proj_svc.project_prefix(owner, project_id)
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pcb_key = f"{prefix}/uploads/pcb.kicad_pcb"
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if not storage.exists(pcb_key):
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raise HTTPException(400, "No .kicad_pcb on this project")
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tmp = tempfile.NamedTemporaryFile(delete=False, suffix=".kicad_pcb")
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try:
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tmp.write(storage.read_bytes(pcb_key))
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tmp.close()
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layout = parse_kicad_pcb(tmp.name)
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finally:
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os.unlink(tmp.name)
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pitch = body.pitch_mm if body.pitch_mm is not None else NET_WALK_PITCH_MM
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try:
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rows = analyze_specified_nets(layout, body.nets, pitch)
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except GeometryError as exc:
|
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raise HTTPException(400, str(exc)) from exc
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return {"pitch_mm": pitch, "nets": rows, "skipped": None}
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@@ -257,6 +257,8 @@ class PipelineWorkspace:
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self._upload_dir("patterns")
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self._upload_dir("models")
|
||||
self._upload_file("design_graph.json")
|
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self._upload_file("layout_graph.json")
|
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self._upload_file("impedance_nets.json")
|
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self._upload_file("bom_summary.json")
|
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self._upload_file("derating.json")
|
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self._upload_file("report.json")
|
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@@ -1516,6 +1518,28 @@ def _write_layout_graph(ws: PipelineWorkspace, project_id: str) -> None:
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logger.exception("kicad_pcb parse failed — continuing without layout")
|
||||
|
||||
|
||||
def _write_impedance_nets(ws: PipelineWorkspace, graph) -> None:
|
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"""ImpedenceFinder Z0 on routed signal nets. Skip without PCB stackup."""
|
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path = ws.local_path("layout_graph.json")
|
||||
if not path.is_file():
|
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return
|
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try:
|
||||
from backend.pinscopex.impedance_traces import analyze_where_needed
|
||||
from backend.pinscopex.models import LayoutGraph
|
||||
|
||||
layout = LayoutGraph.model_validate_json(path.read_text())
|
||||
report = analyze_where_needed(layout, graph)
|
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out = ws.local_path("impedance_nets.json")
|
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out.write_text(json.dumps(report, indent=2) + "\n")
|
||||
logger.info(
|
||||
"impedance_nets: %s nets (skipped=%s)",
|
||||
len(report.get("nets") or []),
|
||||
report.get("skipped"),
|
||||
)
|
||||
except Exception:
|
||||
logger.exception("impedance net analysis failed — continuing")
|
||||
|
||||
|
||||
async def _stage_graph_build(ctx: PipelineContext) -> None:
|
||||
"""Stage 4 — Build the design graph from netlist, BOM, and extracted data."""
|
||||
broker.publish(ctx.project_id, "step_update",
|
||||
@@ -1546,6 +1570,7 @@ async def _stage_graph_build(ctx: PipelineContext) -> None:
|
||||
graph_path = ctx.ws.local_path("design_graph.json")
|
||||
graph_path.write_text(ctx.graph.model_dump_json(indent=2) + "\n")
|
||||
_write_layout_graph(ctx.ws, ctx.project_id)
|
||||
_write_impedance_nets(ctx.ws, ctx.graph)
|
||||
|
||||
broker.publish(ctx.project_id, "step_update",
|
||||
{"stage": "graph_build", "status": "complete",
|
||||
@@ -2110,6 +2135,7 @@ async def run_regen_pipeline(
|
||||
graph_path = ws.local_path("design_graph.json")
|
||||
graph_path.write_text(graph.model_dump_json(indent=2) + "\n")
|
||||
_write_layout_graph(ws, project_id)
|
||||
_write_impedance_nets(ws, graph)
|
||||
|
||||
broker.publish(project_id, "step_update",
|
||||
{"stage": "graph_build", "status": "complete",
|
||||
|
||||
@@ -106,7 +106,7 @@ Passi:
|
||||
| --- | --- | --- | --- |
|
||||
| 1 Plugin / telemetry / BOM match | Parser KiCad XML/sexp/`.kicad_sch` gerarchico; wizard BOM; `plugins/kicad/` + cad-bridge JSON | EasyEDA fuori scope; uuid/sheet sul plugin da verificare su board reale | **OK** |
|
||||
| 2 Datasheet / errata / OCR blocchi | Pintable, excerpt, quote_verify, errata, `internal_features` | Nessun RAG vendor | **OK** |
|
||||
| 3 Impedenze / stackup | ImpedenceFinder + tab Impedance + `.kicad_dru` | CPWG non nel vendor; niente Z0 sul rame del PCB | **OK** |
|
||||
| 3 Impedenze / stackup | ImpedenceFinder: calcolatrice + **Z0 sulle tracce** dei net signal (stackup PCB) | CPWG non nel vendor | **OK** |
|
||||
| 4 Filtri | `check_filters` (solo con poli/numeri in specs) | Niente \(f_c\) inventata | **OK** |
|
||||
| 5 Capacità PI | Decoupling sulla net; derating V; DC-bias/ESR se c’è il numero; mm sul PCB (`PS-PLC-001`) | — | **OK** |
|
||||
| 6 Elettrico | Pin mux; I2C/reset pull-up; LED; sequencing/IR/power margin se c’è il parametro | Senza numero in specs → skip | **OK** |
|
||||
|
||||
@@ -2,6 +2,12 @@
|
||||
|
||||
What's new in Pinscope.
|
||||
|
||||
## 2.26.0 — 2026-09-11 — ImpedenceFinder Z0 on PCB nets
|
||||
|
||||
A pipeline run with `.kicad_pcb` + stackup samples routed **signal** nets (power/ground skipped). Extra net names can be analyzed from the Impedance tab. Z0 is ImpedenceFinder net_walk/zsolver; no invented εr.
|
||||
|
||||
- [New] `impedance_nets.json` after graph build. GET/POST `/api/projects/{id}/impedance/nets`.
|
||||
|
||||
## 2.25.0 — 2026-09-10 — Keepout courtyard
|
||||
|
||||
`layout_rules` `keepout` flags a foreign net whose track endpoint is inside the KiCad courtyard. Own net and missing courtyard skip. No invented analog/digital classes.
|
||||
|
||||
@@ -347,7 +347,9 @@ export default function ProjectDetailPage({
|
||||
/>
|
||||
)}
|
||||
|
||||
{tab === "impedance" && <ImpedancePanel />}
|
||||
{tab === "impedance" && (
|
||||
<ImpedancePanel projectId={id} hasPcb={Boolean(project.hasPcb)} />
|
||||
)}
|
||||
|
||||
{tab === "logs" && (
|
||||
<ApiLogsSection logs={logs} />
|
||||
|
||||
@@ -1,13 +1,18 @@
|
||||
"use client";
|
||||
|
||||
import { useState } from "react";
|
||||
import { useEffect, useState } from "react";
|
||||
import { Card, CardContent, CardHeader, CardTitle } from "@/components/ui/card";
|
||||
import { Button } from "@/components/ui/button";
|
||||
import { Input } from "@/components/ui/input";
|
||||
import { Label } from "@/components/ui/label";
|
||||
import { computeImpedance } from "@/lib/api";
|
||||
import {
|
||||
analyzeImpedanceNets,
|
||||
computeImpedance,
|
||||
fetchImpedanceNets,
|
||||
} from "@/lib/api";
|
||||
import type {
|
||||
ImpedanceKind,
|
||||
ImpedanceNetsReport,
|
||||
ImpedanceStackupResult,
|
||||
ImpedanceTraceResult,
|
||||
} from "@/lib/types";
|
||||
@@ -21,7 +26,13 @@ function fmt(n: number | null | undefined, digits = 2): string {
|
||||
return n.toFixed(digits);
|
||||
}
|
||||
|
||||
export function ImpedancePanel() {
|
||||
export function ImpedancePanel({
|
||||
projectId,
|
||||
hasPcb,
|
||||
}: {
|
||||
projectId: string;
|
||||
hasPcb: boolean;
|
||||
}) {
|
||||
const [kind, setKind] = useState<ImpedanceKind>("microstrip");
|
||||
const [h, setH] = useState("0.20");
|
||||
const [er, setEr] = useState("4.5");
|
||||
@@ -33,6 +44,22 @@ export function ImpedancePanel() {
|
||||
const [busy, setBusy] = useState(false);
|
||||
const [trace, setTrace] = useState<ImpedanceTraceResult | null>(null);
|
||||
const [stackup, setStackup] = useState<ImpedanceStackupResult | null>(null);
|
||||
const [boardNets, setBoardNets] = useState<ImpedanceNetsReport | null>(null);
|
||||
const [extraNets, setExtraNets] = useState("");
|
||||
|
||||
useEffect(() => {
|
||||
let cancelled = false;
|
||||
fetchImpedanceNets(projectId)
|
||||
.then((r) => {
|
||||
if (!cancelled) setBoardNets(r);
|
||||
})
|
||||
.catch(() => {
|
||||
if (!cancelled) setBoardNets(null);
|
||||
});
|
||||
return () => {
|
||||
cancelled = true;
|
||||
};
|
||||
}, [projectId]);
|
||||
|
||||
async function runTrace() {
|
||||
setBusy(true);
|
||||
@@ -90,6 +117,23 @@ export function ImpedancePanel() {
|
||||
URL.revokeObjectURL(url);
|
||||
}
|
||||
|
||||
async function runSpecifiedNets() {
|
||||
const names = extraNets
|
||||
.split(/[\s,]+/)
|
||||
.map((n) => n.trim())
|
||||
.filter(Boolean);
|
||||
if (names.length === 0) return;
|
||||
setBusy(true);
|
||||
setError(null);
|
||||
try {
|
||||
setBoardNets(await analyzeImpedanceNets(projectId, names));
|
||||
} catch (e) {
|
||||
setError(e instanceof Error ? e.message : "Net analysis failed");
|
||||
} finally {
|
||||
setBusy(false);
|
||||
}
|
||||
}
|
||||
|
||||
const needsGap = kind === "cpw" || kind === "diff";
|
||||
|
||||
return (
|
||||
@@ -100,9 +144,9 @@ export function ImpedancePanel() {
|
||||
</CardHeader>
|
||||
<CardContent className="space-y-4">
|
||||
<p className="text-sm text-muted-foreground">
|
||||
IPC-2141 / Hammerstad–Jensen from ImpedenceFinder (same as KiCad
|
||||
pcb_calculator). Advice only — this tab does not sample the PCB
|
||||
and does not emit findings. CPWG is not implemented.
|
||||
ImpedenceFinder (Hammerstad–Jensen). The calculator is advice only.
|
||||
With a `.kicad_pcb` and stackup, a pipeline run samples routed signal
|
||||
nets. CPWG is not implemented upstream.
|
||||
</p>
|
||||
<div className="grid grid-cols-2 gap-3 sm:grid-cols-3">
|
||||
<label className="space-y-1">
|
||||
@@ -175,6 +219,72 @@ export function ImpedancePanel() {
|
||||
</CardContent>
|
||||
</Card>
|
||||
|
||||
<Card>
|
||||
<CardHeader>
|
||||
<CardTitle className="text-sm">PCB net Z0 (ImpedenceFinder)</CardTitle>
|
||||
</CardHeader>
|
||||
<CardContent className="space-y-3">
|
||||
{!hasPcb && (
|
||||
<p className="text-sm text-muted-foreground">
|
||||
Upload a `.kicad_pcb` and run analysis. Power/ground nets are
|
||||
skipped; signal traces with stackup εr/h are sampled.
|
||||
</p>
|
||||
)}
|
||||
{hasPcb && boardNets?.skipped && (
|
||||
<p className="text-sm text-muted-foreground">{boardNets.skipped}</p>
|
||||
)}
|
||||
{boardNets && boardNets.nets.length > 0 && (
|
||||
<table className="w-full text-sm">
|
||||
<thead>
|
||||
<tr className="text-left text-muted-foreground">
|
||||
<th className="py-1">Net</th>
|
||||
<th>Z0 avg Ω</th>
|
||||
<th>min–max</th>
|
||||
<th>mm</th>
|
||||
<th>topology</th>
|
||||
</tr>
|
||||
</thead>
|
||||
<tbody>
|
||||
{boardNets.nets.map((row) => (
|
||||
<tr key={row.net_name} className="border-t border-border">
|
||||
<td className="py-1">{row.net_name}</td>
|
||||
<td className="tabular-nums">
|
||||
{row.error ?? fmt(row.z0_avg_ohms)}
|
||||
</td>
|
||||
<td className="tabular-nums">
|
||||
{row.z0_min_ohms != null
|
||||
? `${fmt(row.z0_min_ohms)}–${fmt(row.z0_max_ohms)}`
|
||||
: "—"}
|
||||
</td>
|
||||
<td className="tabular-nums">{fmt(row.length_mm, 2)}</td>
|
||||
<td>{(row.topologies || []).join(", ") || "—"}</td>
|
||||
</tr>
|
||||
))}
|
||||
</tbody>
|
||||
</table>
|
||||
)}
|
||||
{hasPcb && (
|
||||
<div className="flex flex-wrap items-end gap-2">
|
||||
<label className="min-w-40 flex-1 space-y-1">
|
||||
<Label>Extra nets</Label>
|
||||
<Input
|
||||
value={extraNets}
|
||||
onChange={(e) => setExtraNets(e.target.value)}
|
||||
placeholder="/USB.D+ /USB.D-"
|
||||
/>
|
||||
</label>
|
||||
<Button
|
||||
variant="outline"
|
||||
onClick={runSpecifiedNets}
|
||||
disabled={busy}
|
||||
>
|
||||
Analyze named nets
|
||||
</Button>
|
||||
</div>
|
||||
)}
|
||||
</CardContent>
|
||||
</Card>
|
||||
|
||||
{stackup && (
|
||||
<Card>
|
||||
<CardHeader>
|
||||
|
||||
@@ -11,6 +11,7 @@ import type {
|
||||
DesignGraph,
|
||||
DeratingRow,
|
||||
ImpedanceKind,
|
||||
ImpedanceNetsReport,
|
||||
ImpedanceStackupResult,
|
||||
ImpedanceTraceResult,
|
||||
EdifSubDesign,
|
||||
@@ -609,6 +610,43 @@ export async function computeImpedance(body: {
|
||||
return res.json();
|
||||
}
|
||||
|
||||
export async function fetchImpedanceNets(
|
||||
projectId: string,
|
||||
): Promise<ImpedanceNetsReport> {
|
||||
const res = await authFetch(
|
||||
`${BASE}/api/projects/${projectId}/impedance/nets`,
|
||||
);
|
||||
if (!res.ok) {
|
||||
const detail = await res.json().catch(() => ({ detail: res.statusText }));
|
||||
throw new Error(
|
||||
typeof detail.detail === "string" ? detail.detail : "Impedance nets failed",
|
||||
);
|
||||
}
|
||||
return res.json();
|
||||
}
|
||||
|
||||
export async function analyzeImpedanceNets(
|
||||
projectId: string,
|
||||
nets: string[],
|
||||
pitch_mm?: number,
|
||||
): Promise<ImpedanceNetsReport> {
|
||||
const res = await authFetch(
|
||||
`${BASE}/api/projects/${projectId}/impedance/nets`,
|
||||
{
|
||||
method: "POST",
|
||||
headers: { "Content-Type": "application/json" },
|
||||
body: JSON.stringify({ nets, pitch_mm }),
|
||||
},
|
||||
);
|
||||
if (!res.ok) {
|
||||
const detail = await res.json().catch(() => ({ detail: res.statusText }));
|
||||
throw new Error(
|
||||
typeof detail.detail === "string" ? detail.detail : "Impedance nets failed",
|
||||
);
|
||||
}
|
||||
return res.json();
|
||||
}
|
||||
|
||||
export async function fetchReport(
|
||||
projectId: string,
|
||||
): Promise<ValidationReport> {
|
||||
|
||||
@@ -364,6 +364,27 @@ export interface ImpedanceStackupResult {
|
||||
kicad_dru: string;
|
||||
}
|
||||
|
||||
export interface ImpedanceNetRow {
|
||||
net_name: string;
|
||||
length_mm?: number;
|
||||
branch_count?: number;
|
||||
is_differential?: boolean;
|
||||
partner_net_name?: string | null;
|
||||
topologies?: string[];
|
||||
z0_min_ohms?: number | null;
|
||||
z0_max_ohms?: number | null;
|
||||
z0_avg_ohms?: number | null;
|
||||
flags?: string[];
|
||||
sample_count?: number;
|
||||
error?: string;
|
||||
}
|
||||
|
||||
export interface ImpedanceNetsReport {
|
||||
pitch_mm: number;
|
||||
nets: ImpedanceNetRow[];
|
||||
skipped: string | null;
|
||||
}
|
||||
|
||||
export interface NetlistPreviewDesignator {
|
||||
ref: string;
|
||||
pins: { number: string; net_name: string }[];
|
||||
|
||||
@@ -0,0 +1,194 @@
|
||||
"""ImpedenceFinder analysis on specified nets — widths/stackup from the board.
|
||||
|
||||
Favor: named net Z0 matches zsolver on the same w/h/εr/t.
|
||||
Against: empty net list; missing net; no stackup.
|
||||
"""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
from pathlib import Path
|
||||
|
||||
import pytest
|
||||
|
||||
from backend.pinscopex.impedance import GeometryError
|
||||
from backend.pinscopex.impedance_traces import (
|
||||
analyze_specified_nets,
|
||||
analyze_where_needed,
|
||||
)
|
||||
from backend.pinscopex.models import (
|
||||
DesignGraph,
|
||||
LayoutDielectric,
|
||||
LayoutGraph,
|
||||
LayoutSegment,
|
||||
LayoutStackup,
|
||||
LayoutZone,
|
||||
Net,
|
||||
NetType,
|
||||
)
|
||||
from backend.pinscopex.parsers_kicad_pcb import parse_kicad_pcb
|
||||
from backend.vendor_path import ensure_impedancefinder
|
||||
|
||||
ensure_impedancefinder()
|
||||
from impedancefinder import zsolver
|
||||
|
||||
_H = 0.15
|
||||
_ER = 4.3
|
||||
_T = 0.035
|
||||
_W = 0.2
|
||||
_PITCH = 2.0
|
||||
|
||||
|
||||
def _layout() -> LayoutGraph:
|
||||
return LayoutGraph(
|
||||
segments=[
|
||||
LayoutSegment(
|
||||
start=(0.0, 0.0), end=(10.0, 0.0),
|
||||
width=_W, layer="F.Cu", net="SIG",
|
||||
),
|
||||
LayoutSegment(
|
||||
start=(0.0, 2.0), end=(4.0, 2.0),
|
||||
width=0.3, layer="F.Cu", net="OTHER",
|
||||
),
|
||||
],
|
||||
stackup=LayoutStackup(
|
||||
copper_layers=["F.Cu", "In1.Cu", "In2.Cu", "B.Cu"],
|
||||
dielectrics=[
|
||||
LayoutDielectric(name="prepreg_top", er=_ER, height_mm=_H),
|
||||
LayoutDielectric(name="core", er=4.4, height_mm=0.7),
|
||||
LayoutDielectric(name="prepreg_bottom", er=4.3, height_mm=0.15),
|
||||
],
|
||||
copper_thickness_mm=_T,
|
||||
),
|
||||
zones=[
|
||||
LayoutZone(
|
||||
net="GND",
|
||||
layer="In1.Cu",
|
||||
outlines=[[(-5.0, -5.0), (50.0, -5.0), (50.0, 5.0), (-5.0, 5.0)]],
|
||||
),
|
||||
],
|
||||
)
|
||||
|
||||
|
||||
def test_specified_net_z0_matches_impedancefinder_zsolver():
|
||||
rows = analyze_specified_nets(_layout(), ["SIG"], _PITCH)
|
||||
assert len(rows) == 1
|
||||
row = rows[0]
|
||||
assert row["net_name"] == "SIG"
|
||||
expect = zsolver.microstrip_z0(_W, _H, _ER, _T)
|
||||
assert row["z0_avg_ohms"] == pytest.approx(expect, rel=1e-6)
|
||||
assert row["z0_min_ohms"] == pytest.approx(expect, rel=1e-6)
|
||||
|
||||
|
||||
def test_only_specified_nets_are_analyzed():
|
||||
rows = analyze_specified_nets(_layout(), ["SIG"], _PITCH)
|
||||
assert [r["net_name"] for r in rows] == ["SIG"]
|
||||
|
||||
|
||||
def test_missing_net_is_error_not_invented_z0():
|
||||
rows = analyze_specified_nets(_layout(), ["NO_SUCH_NET"], _PITCH)
|
||||
assert rows[0]["error"] == "no segments on this net"
|
||||
assert "z0_avg_ohms" not in rows[0] or rows[0].get("z0_avg_ohms") is None
|
||||
|
||||
|
||||
def test_empty_net_list_is_silent():
|
||||
assert analyze_specified_nets(_layout(), [" ", ""], _PITCH) == []
|
||||
|
||||
|
||||
def test_no_stackup_raises():
|
||||
layout = LayoutGraph(
|
||||
segments=[LayoutSegment(start=(0, 0), end=(1, 0), width=0.2, layer="F.Cu", net="SIG")],
|
||||
)
|
||||
with pytest.raises(GeometryError, match="stackup"):
|
||||
analyze_specified_nets(layout, ["SIG"], _PITCH)
|
||||
|
||||
|
||||
_PCB_STACKUP = """(kicad_pcb (version 20240108) (generator pcbnew)
|
||||
(net 0 "")
|
||||
(net 1 "GND")
|
||||
(net 2 "SIG")
|
||||
(setup
|
||||
(stackup
|
||||
(layer "F.Cu" (type copper) (thickness 0.035))
|
||||
(layer "dielectric 1" (type core) (thickness 0.15) (epsilon_r 4.3))
|
||||
(layer "In1.Cu" (type copper) (thickness 0.035))
|
||||
(layer "dielectric 2" (type core) (thickness 0.7) (epsilon_r 4.4))
|
||||
(layer "In2.Cu" (type copper) (thickness 0.035))
|
||||
(layer "dielectric 3" (type prepreg) (thickness 0.15) (epsilon_r 4.3))
|
||||
(layer "B.Cu" (type copper) (thickness 0.035))
|
||||
)
|
||||
)
|
||||
(segment (start 0 0) (end 10 0) (width 0.2) (layer "F.Cu") (net 2))
|
||||
(zone (net 1) (net_name "GND") (layer "In1.Cu")
|
||||
(filled_polygon (layer "In1.Cu")
|
||||
(pts (xy -5 -5) (xy 50 -5) (xy 50 5) (xy -5 5))
|
||||
)
|
||||
)
|
||||
)
|
||||
"""
|
||||
|
||||
|
||||
def test_parse_stackup_and_zone_then_analyze_sig(tmp_path: Path):
|
||||
p = tmp_path / "board.kicad_pcb"
|
||||
p.write_text(_PCB_STACKUP)
|
||||
layout = parse_kicad_pcb(p)
|
||||
assert layout.stackup is not None
|
||||
assert layout.stackup.copper_layers[0] == "F.Cu"
|
||||
assert layout.stackup.dielectrics[0].er == 4.3
|
||||
assert layout.zones and layout.zones[0].net == "GND"
|
||||
rows = analyze_specified_nets(layout, ["SIG"], _PITCH)
|
||||
expect = zsolver.microstrip_z0(_W, _H, _ER, _T)
|
||||
assert rows[0]["z0_avg_ohms"] == pytest.approx(expect, rel=1e-6)
|
||||
|
||||
|
||||
def test_project_analysis_skips_power_and_runs_signal():
|
||||
graph = DesignGraph(nets={
|
||||
"SIG": Net(name="SIG", net_type=NetType.SIGNAL),
|
||||
"OTHER": Net(name="OTHER", net_type=NetType.POWER),
|
||||
})
|
||||
report = analyze_where_needed(_layout(), graph, pitch_mm=_PITCH)
|
||||
assert report["skipped"] is None
|
||||
names = [r["net_name"] for r in report["nets"]]
|
||||
assert names == ["SIG"]
|
||||
expect = zsolver.microstrip_z0(_W, _H, _ER, _T)
|
||||
assert report["nets"][0]["z0_avg_ohms"] == pytest.approx(expect, rel=1e-6)
|
||||
|
||||
|
||||
def test_project_analysis_skips_without_stackup():
|
||||
layout = LayoutGraph(
|
||||
segments=[LayoutSegment(start=(0, 0), end=(1, 0), width=0.2, layer="F.Cu", net="SIG")],
|
||||
)
|
||||
report = analyze_where_needed(layout, None, pitch_mm=_PITCH)
|
||||
assert report["nets"] == []
|
||||
assert report["skipped"] == "no stackup"
|
||||
|
||||
|
||||
def test_pipeline_writes_impedance_nets_for_signal(tmp_path: Path):
|
||||
import json
|
||||
from backend.services.pipeline import _write_impedance_nets
|
||||
|
||||
class Ws:
|
||||
def local_path(self, rel: str) -> Path:
|
||||
return tmp_path / rel
|
||||
|
||||
layout = _layout()
|
||||
(tmp_path / "layout_graph.json").write_text(layout.model_dump_json())
|
||||
graph = DesignGraph(nets={
|
||||
"SIG": Net(name="SIG", net_type=NetType.SIGNAL),
|
||||
"OTHER": Net(name="OTHER", net_type=NetType.POWER),
|
||||
})
|
||||
_write_impedance_nets(Ws(), graph)
|
||||
data = json.loads((tmp_path / "impedance_nets.json").read_text())
|
||||
assert [r["net_name"] for r in data["nets"]] == ["SIG"]
|
||||
|
||||
|
||||
def test_get_impedance_nets_without_run_is_empty(tmp_path: Path):
|
||||
from fastapi.testclient import TestClient
|
||||
from backend.main import app
|
||||
from backend.services.storage import LocalStorageBackend
|
||||
|
||||
app.state.storage = LocalStorageBackend(tmp_path)
|
||||
client = TestClient(app)
|
||||
pid = client.post("/api/projects", json={"name": "z0"}).json()["id"]
|
||||
body = client.get(f"/api/projects/{pid}/impedance/nets").json()
|
||||
assert body["nets"] == []
|
||||
assert body["skipped"] == "not run"
|
||||
Reference in New Issue
Block a user