Treat finished PCB review as complete, not a raw SSE error.

The status watcher synthesized pcb_error with pcb_status=complete (terminal)
when the worker finished before pcb_complete arrived. Map that hatch to
pcb_complete, publish the event before flipping status, and send /pcb to
the layout report tree.

frontend/content/changelog.md

@@ -2,6 +2,14 @@
 
 What's new in Periscope.
 
+## 2.33.2 — 2026-09-20 — PCB complete opens the findings tree
+
+A finished PCB exam no longer shows the raw watcher string `pcb_status=complete (terminal)`. The SSE hatch emits `pcb_complete`; the PCB page then opens `/report?domain=layout` (expand-on-click tree).
+
+- [Fixed] Synthetic PCB SSE for `pcb_status=complete` is `pcb_complete`, not `pcb_error`.
+- [Fixed] `/project/[id]/pcb` navigates to the layout report when the run finishes.
+- [Fixed] Restored changelog heading for 2.33.0 (version history).
+
 ## 2.33.1 — 2026-09-20 — ESD/PI filters, ERROR-first sort, findings tree
 
 PE-ESD-001 only on J* ∩ IC nets (no NC / unconnected / VSYS/GND/3V3 spam). PE-PI-001 treats any capacitor on the rail, including KiCad `/` names, as decoupling. Report API and UI sort ERROR then WARNING then INFO, then RULE > RISK > REVIEW > INFO. The report left list is an expand-on-click tree (IC → pin/net → cards), not a dump of open groups.
@@ -11,7 +19,7 @@ PE-ESD-001 only on J* ∩ IC nets (no NC / unconnected / VSYS/GND/3V3 spam). PE-
 - [Changed] GET `/report` and `complete_findings` order by severity then class.
 - [Changed] Findings sidebar is a collapsed tree; PCB exam cards live in the same tree.
 
-
+## 2.33.0 — 2026-09-20 — Fase B: hierarchy, derating bands, timing, PI, ESD/return
 
 Usable slices (not a platform): component→pin→net→block inventory, capacitor PASS/MARGIN/RISK from Vop/Vrated, RC/strap timing only with numbers, local vs bulk PI, ESD and HS return as REVIEW.