Add MODE=pcb layout exam job with AI and deterministic checks.

Parallel pcb_status pipeline: parse board, classify domains/groups,
inventory traces, PE-LAY/PLC/SI/DRT checks, per-IC datasheet review.
Findings merge into the report UI. No auto-place or pcbnew write-back.

backend/services/event_bridge.py

@@ -49,6 +49,9 @@ TERMINAL_EVENTS = frozenset({
     "placement_complete",
     "placement_error",
     "placement_cancelled",
+    "pcb_complete",
+    "pcb_error",
+    "pcb_cancelled",
 })