Add MODE=pcb layout exam job with AI and deterministic checks.

Parallel pcb_status pipeline: parse board, classify domains/groups,
inventory traces, PE-LAY/PLC/SI/DRT checks, per-IC datasheet review.
Findings merge into the report UI. No auto-place or pcbnew write-back.

backend/routers/reports.py

@@ -40,10 +40,16 @@ async def get_report(project_id: str, request: Request):
     storage = get_storage(request)
     owner_user_id, _ = await resolve_or_404(request, project_id)
     prefix = proj_svc.project_prefix(owner_user_id, project_id)
-    key = f"{prefix}/report.json"
-    if not storage.exists(key):
+    schema_key = f"{prefix}/report.json"
+    pcb_key = f"{prefix}/pcb_report.json"
+    schema = storage.read_json(schema_key) if storage.exists(schema_key) else None
+    pcb = storage.read_json(pcb_key) if storage.exists(pcb_key) else None
+    from backend.periscopex.pcb_checks import merge_schema_pcb_reports
+
+    merged = merge_schema_pcb_reports(schema, pcb)
+    if merged is None:
         raise HTTPException(404, "Report not found — run the pipeline first")
-    return JSONResponse(storage.read_json(key))
+    return JSONResponse(merged)
 
 
 @router.get("/report/{project_id}/cad-bridge")