Add MODE=pcb layout exam job with AI and deterministic checks.
Parallel pcb_status pipeline: parse board, classify domains/groups, inventory traces, PE-LAY/PLC/SI/DRT checks, per-IC datasheet review. Findings merge into the report UI. No auto-place or pcbnew write-back.
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@@ -148,6 +148,9 @@ async def get_project(project_id: str, request: Request):
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healed_pl = proj_svc.heal_if_placement_stuck(storage, owner_user_id, project_id)
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if healed_pl is not None:
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meta = healed_pl
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healed_pcb = proj_svc.heal_if_pcb_stuck(storage, owner_user_id, project_id)
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if healed_pcb is not None:
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meta = healed_pcb
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return meta.model_dump()
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