Count thermal vias in the courtyard against min_via_count.

Skip without courtyard geometry or a numeric count — no pad-radius default. Tests use simple_project plus explicit coordinates as parameters.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
2026-09-10 23:39:05 +02:00
co-authored by Cursor
parent 45e820fabc
commit 0fafbbbb06
7 changed files with 188 additions and 85 deletions
+1
View File
@@ -462,6 +462,7 @@ class LayoutFootprint(BaseModel):
y: float
layer: str = ""
pads: list[LayoutPad] = []
courtyard: list[tuple[float, float]] = []
class LayoutSegment(BaseModel):
+49
View File
@@ -47,6 +47,54 @@ def _pad_net(pad: object) -> str:
return ""
def _is_crtyd(layer: str) -> bool:
return str(layer).endswith("CrtYd")
def _abs(fx: float, fy: float, frot: float, lx: float, ly: float) -> tuple[float, float]:
rx, ry = _rotate(lx, ly, frot)
return fx + rx, fy + ry
def _courtyard_pts(node: object, fx: float, fy: float, frot: float) -> list[tuple[float, float]]:
"""Courtyard vertices from the PCB file. Empty if KiCad has no CrtYd."""
pts: list[tuple[float, float]] = []
for poly in _kids(node, "fp_poly"):
if not _is_crtyd(_val(poly, "layer")):
continue
pts_el = _kid(poly, "pts")
if not pts_el:
continue
for xy in pts_el[1:]:
if isinstance(xy, list) and xy and xy[0] == "xy" and len(xy) >= 3:
pts.append(_abs(fx, fy, frot, _fnum(xy[1]), _fnum(xy[2])))
if pts:
return pts
for rect in _kids(node, "fp_rect"):
if not _is_crtyd(_val(rect, "layer")):
continue
sx, sy = _xy(rect, "start")
ex, ey = _xy(rect, "end")
return [
_abs(fx, fy, frot, sx, sy),
_abs(fx, fy, frot, ex, sy),
_abs(fx, fy, frot, ex, ey),
_abs(fx, fy, frot, sx, ey),
]
for line in _kids(node, "fp_line"):
if not _is_crtyd(_val(line, "layer")):
continue
sx, sy = _xy(line, "start")
ex, ey = _xy(line, "end")
a = _abs(fx, fy, frot, sx, sy)
b = _abs(fx, fy, frot, ex, ey)
if not pts or pts[-1] != a:
pts.append(a)
if pts[-1] != b:
pts.append(b)
return pts
def parse_kicad_pcb(path: str | Path) -> LayoutGraph:
p = Path(path)
tree = _parse_sexp(p.read_text(encoding="utf-8", errors="replace"))
@@ -98,6 +146,7 @@ def parse_kicad_pcb(path: str | Path) -> LayoutGraph:
y=fy,
layer=layer,
pads=pads,
courtyard=_courtyard_pts(node, fx, fy, frot),
)
continue
if tag == "segment":
+97 -46
View File
@@ -2,6 +2,8 @@
Runs only when a LayoutGraph is present and a decoupling_proximity rule
has a numeric max_distance_mm. Null millimetres skip — no 3 mm default.
Thermal vias (`PS-PLC-002`) skip without courtyard vertices and without
min_via_count — no invented pad radius.
"""
from __future__ import annotations
@@ -66,50 +68,99 @@ def check_placement(
if not cons or not cons.layout_rules:
continue
for rule in cons.layout_rules:
if rule.get("kind") != "decoupling_proximity":
continue
pin_no = _pin_number(cons, str(rule.get("pin") or ""))
if not pin_no:
continue
net = _net_for_pin(graph, ref, pin_no)
if not net:
continue
ic_pad = _pad_for(layout, ref, pin_no)
if not ic_pad:
continue
caps = graph.capacitors_on_net(net)
cap_pads: list[LayoutPad] = []
for cref in caps:
fp = layout.footprints.get(cref)
if not fp:
continue
for pad in fp.pads:
if pad.net == net or pad.net == ic_pad.net:
cap_pads.append(pad)
if not cap_pads:
continue
nearest = min(_dist(ic_pad, p) for p in cap_pads)
extracted = rule.get("max_distance_mm")
if extracted is None:
continue
limit = float(extracted)
if nearest <= limit:
continue
findings.append(Finding(
designator=ref,
mpn=comp.mpn or cons.mpn,
aspect="placement",
finding=(
f"Decoupling on {net} is {nearest:.1f} mm from {ref}.{pin_no} "
f"(limit {limit:g} mm)."
),
why=f"Datasheet max_distance_mm={limit:g}.",
status="ERROR",
recommendation="Place the decoupling capacitor closer to the supply pin.",
source="placement_check",
rule_id="PS-PLC-001",
net=net,
pins=[pin_no],
source_page=rule.get("source_page"),
))
kind = rule.get("kind")
if kind == "decoupling_proximity":
findings.extend(
_decoupling_finding(ref, comp, cons, rule, graph, layout)
)
elif kind == "thermal_via":
findings.extend(_thermal_via_finding(ref, comp, cons, rule, layout))
return findings
def _decoupling_finding(ref, comp, cons, rule, graph: DesignGraph, layout: LayoutGraph) -> list[Finding]:
pin_no = _pin_number(cons, str(rule.get("pin") or ""))
if not pin_no:
return []
net = _net_for_pin(graph, ref, pin_no)
if not net:
return []
ic_pad = _pad_for(layout, ref, pin_no)
if not ic_pad:
return []
cap_pads: list[LayoutPad] = []
for cref in graph.capacitors_on_net(net):
fp = layout.footprints.get(cref)
if not fp:
continue
for pad in fp.pads:
if pad.net == net or pad.net == ic_pad.net:
cap_pads.append(pad)
if not cap_pads:
return []
nearest = min(_dist(ic_pad, p) for p in cap_pads)
extracted = rule.get("max_distance_mm")
if extracted is None:
return []
limit = float(extracted)
if nearest <= limit:
return []
return [Finding(
designator=ref,
mpn=comp.mpn or cons.mpn,
aspect="placement",
finding=(
f"Decoupling on {net} is {nearest:.1f} mm from {ref}.{pin_no} "
f"(limit {limit:g} mm)."
),
why=f"layout_rules max_distance_mm={limit:g}.",
status="ERROR",
recommendation="Place the decoupling capacitor closer to the supply pin.",
source="placement_check",
rule_id="PS-PLC-001",
net=net,
pins=[pin_no],
source_page=rule.get("source_page"),
)]
def _in_poly(x: float, y: float, poly: list[tuple[float, float]]) -> bool:
n = len(poly)
inside = False
j = n - 1
for i in range(n):
xi, yi = poly[i]
xj, yj = poly[j]
if (yi > y) != (yj > y) and x < (xj - xi) * (y - yi) / (yj - yi) + xi:
inside = not inside
j = i
return inside
def _thermal_via_finding(ref, comp, cons, rule, layout: LayoutGraph) -> list[Finding]:
min_n = rule.get("min_via_count")
if min_n is None:
return []
fp = layout.footprints.get(ref)
if not fp or len(fp.courtyard) < 3:
return []
n = sum(1 for v in layout.vias if _in_poly(v.x, v.y, fp.courtyard))
if n >= int(min_n):
return []
pin = str(rule.get("pin") or "").strip()
return [Finding(
designator=ref,
mpn=comp.mpn or cons.mpn,
aspect="placement",
finding=(
f"{n} thermal vias in courtyard of {ref} "
f"(min_via_count {int(min_n)})."
),
why=f"layout_rules min_via_count={int(min_n)}.",
status="ERROR",
recommendation="Add vias in the thermal pad courtyard.",
source="placement_check",
rule_id="PS-PLC-002",
pins=[pin] if pin else [],
source_page=rule.get("source_page"),
)]