Gate PCB SI not_reviewed to board ICs, not the shared library.
Emmaforo listed 20 stale 1.5–1.7 MPNs (LAN8720A, W25Q, …) as not reviewed while the four BOM ICs were already extracted and reviewed.
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@@ -23,7 +23,9 @@ from backend.periscopex.finding_engine import apply_decisions
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from backend.periscopex.functional_groups import build_placement_plan
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from backend.periscopex.graph import build_graph
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from backend.periscopex.layout_rules import needs_layout_rules_refresh
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from backend.periscopex.models import ComponentConstraints, DesignGraph, LayoutGraph, ValidationReport
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from backend.periscopex.models import (
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ComponentConstraints, ComponentType, DesignGraph, LayoutGraph, ValidationReport,
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)
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from backend.periscopex.pcb_checks import assign_pcb_finding_ids, run_pcb_checks
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from backend.periscopex.pcb_inventory import build_pcb_inventory
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from backend.services import projects as proj_svc
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@@ -104,6 +106,50 @@ def _load_constraints_map(
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return result
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def si_extract_needed_skips(
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graph: DesignGraph,
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cmap: dict,
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scan_ver: str,
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) -> list[dict]:
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"""Stale SI extracts for *board* ICs only — not the shared library dump.
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``cmap`` includes every ``library/extracted`` JSON. Warning those MPNs
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as ``not_reviewed`` on an unrelated project (Emmaforo vs LAN8720A) is
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a false banner.
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"""
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board_mpns: set[str] = set()
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refs_by_mpn: dict[str, list[str]] = {}
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for ref, comp in graph.components.items():
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if comp.component_type != ComponentType.IC:
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continue
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mpn = (comp.mpn or comp.value or "").strip()
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if not mpn:
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continue
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board_mpns.add(mpn)
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refs_by_mpn.setdefault(mpn, []).append(ref)
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out: list[dict] = []
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for mpn, cons in sorted(cmap.items()):
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if mpn not in board_mpns:
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continue
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payload = {
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"model_version": cons.model_version,
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"layout_rules": cons.layout_rules,
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}
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if not needs_layout_rules_refresh(payload, min_scan_version=scan_ver):
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continue
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refs = ",".join(sorted(refs_by_mpn.get(mpn, []))) or mpn
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out.append({
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"designator": refs,
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"reason": (
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f"SI layout_rules empty at model_version="
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f"{cons.model_version}; re-run schematic review "
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f"to re-extract pintable {scan_ver} "
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"(PCB does not re-read the PDF)."
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),
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})
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return out
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def _publish(project_id: str, event: str, data: dict) -> None:
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broker.publish(project_id, event, data)
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@@ -222,29 +268,11 @@ async def run_pcb_pipeline(
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_step(project_id, "checks", "running")
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findings = run_pcb_checks(graph, cmap, layout, plan, zrep)
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si_skip: list[dict] = []
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scan_ver = app_settings.get_default_model_version()
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for mpn, cons in sorted(cmap.items()):
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payload = {
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"model_version": cons.model_version,
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"layout_rules": cons.layout_rules,
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}
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if needs_layout_rules_refresh(
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payload, min_scan_version=scan_ver,
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):
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si_skip.append({
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"designator": mpn,
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"reason": (
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f"SI layout_rules empty at model_version="
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f"{cons.model_version}; re-run schematic review "
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f"to re-extract pintable {scan_ver} "
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"(PCB does not re-read the PDF)."
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),
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})
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if si_skip:
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sipath = ws.local_path("si_extract_needed.json")
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sipath.write_text(json.dumps(si_skip, indent=2) + "\n")
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ws._upload_file("si_extract_needed.json")
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si_skip = si_extract_needed_skips(graph, cmap, scan_ver)
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sipath = ws.local_path("si_extract_needed.json")
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sipath.write_text(json.dumps(si_skip, indent=2) + "\n")
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ws._upload_file("si_extract_needed.json")
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_step(
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project_id, "checks", "complete",
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f"{len(findings)} deterministic findings"
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