micheleandClaude Sonnet 5
25b09cf48a
- AS4C32M16SA-7TCNTR (TSOP-54) and AS4C32M16SB-7BIN (TFBGA-54) 512Mb SDRAM symbols/footprints, imported via UltraLibrarian/SnapEDA sources (see MANIFEST.csv for full provenance). - Fix Lattice LFE5U-45F-8BG381 symbol's Value/manf# grade suffix. - Import 3 castellated breakout footprints (QFP48/QFP64/SSOP8, 1.27mm castellation pitch) from coddingtonbear/kicad-castellated-breakouts into footprints/other/castellated_breakouts.pretty/, plus the upstream reference board projects under reference/ for future consultation. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01T5pjBJQ7tf9pwsSs8rG2sm
34 lines
688 B
Prolog
34 lines
688 B
Prolog
update=22/05/2015 07:44:53
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version=1
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last_client=kicad
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[general]
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version=1
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RootSch=
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BoardNm=
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[pcbnew]
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version=1
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LastNetListRead=
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UseCmpFile=1
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PadDrill=0.600000000000
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PadDrillOvalY=0.600000000000
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PadSizeH=1.500000000000
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PadSizeV=1.500000000000
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PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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ModuleTextSizeThickness=0.150000000000
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SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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