2239 lines
104 KiB
Plaintext
Executable File
2239 lines
104 KiB
Plaintext
Executable File
#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp
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:ivl_version "13.0 (stable)" "(v13_0)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision - 12;
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi";
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S_0x104fb9b40 .scope package, "$unit" "$unit" 2 1;
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.timescale 0 0;
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S_0x104fb35a0 .scope module, "tb" "tb" 3 3;
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.timescale -9 -12;
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P_0x82ac74000 .param/l "ACC_WIDTH" 0 3 9, +C4<00000000000000000000000000100000>;
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P_0x82ac74040 .param/l "DATA_WIDTH" 0 3 5, +C4<00000000000000000000000000001000>;
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P_0x82ac74080 .param/l "N_INPUTS" 0 3 6, +C4<00000000000000000000000100000000>;
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P_0x82ac740c0 .param/l "N_NEURONS" 0 3 7, +C4<00000000000000000000000000000100>;
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P_0x82ac74100 .param/l "PARALLEL" 0 3 8, +C4<00000000000000000000000000001000>;
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v0x82acfec60_0 .var/s "bias_bus", 31 0;
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v0x82acfed00_0 .net "busy", 0 0, L_0x82aca0780; 1 drivers
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v0x82acfeda0_0 .var "clk", 0 0;
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v0x82acfee40_0 .net "done", 0 0, L_0x82aca06e0; 1 drivers
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v0x82acfeee0_0 .var/i "errors", 31 0;
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v0x82acfef80_0 .var/i "expected", 31 0;
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v0x82acff020_0 .var/i "i", 31 0;
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v0x82acff0c0_0 .var "rst", 0 0;
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v0x82acff160_0 .var "start", 0 0;
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v0x82acff200_0 .var/s "weights_bus", 8191 0;
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v0x82acff2a0_0 .var/s "x_bus", 2047 0;
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v0x82acff340_0 .net/s "y_bus", 31 0, L_0x82ad055e0; 1 drivers
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S_0x104fb3720 .scope module, "dut" "layer" 3 38, 4 1 0, S_0x104fb35a0;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "start";
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.port_info 3 /INPUT 2048 "x_bus";
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.port_info 4 /INPUT 8192 "weights_bus";
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.port_info 5 /INPUT 32 "bias_bus";
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.port_info 6 /OUTPUT 32 "y_bus";
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.port_info 7 /OUTPUT 1 "busy";
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.port_info 8 /OUTPUT 1 "done";
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P_0x82ac74140 .param/l "ACC_WIDTH" 0 4 6, +C4<00000000000000000000000000100000>;
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P_0x82ac74180 .param/l "DATA_WIDTH" 0 4 2, +C4<00000000000000000000000000001000>;
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P_0x82ac741c0 .param/l "N_INPUTS" 0 4 3, +C4<00000000000000000000000100000000>;
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P_0x82ac74200 .param/l "N_NEURONS" 0 4 4, +C4<00000000000000000000000000000100>;
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P_0x82ac74240 .param/l "PARALLEL" 0 4 5, +C4<00000000000000000000000000001000>;
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v0x82acfe580_0 .net/s "bias_bus", 31 0, v0x82acfec60_0; 1 drivers
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v0x82acfe620_0 .net "busy", 0 0, L_0x82aca0780; alias, 1 drivers
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v0x82acfe6c0_0 .net "clk", 0 0, v0x82acfeda0_0; 1 drivers
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v0x82acfe760_0 .net "done", 0 0, L_0x82aca06e0; alias, 1 drivers
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v0x82acfe800_0 .net "neuron_busy", 3 0, L_0x82ad05680; 1 drivers
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v0x82acfe8a0_0 .net "neuron_done", 3 0, L_0x82ad05720; 1 drivers
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v0x82acfe940_0 .net "rst", 0 0, v0x82acff0c0_0; 1 drivers
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v0x82acfe9e0_0 .net "start", 0 0, v0x82acff160_0; 1 drivers
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v0x82acfea80_0 .net/s "weights_bus", 8191 0, v0x82acff200_0; 1 drivers
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v0x82acfeb20_0 .net/s "x_bus", 2047 0, v0x82acff2a0_0; 1 drivers
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v0x82acfebc0_0 .net/s "y_bus", 31 0, L_0x82ad055e0; alias, 1 drivers
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L_0x82b0f2440 .part v0x82acff200_0, 0, 2048;
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L_0x82b0f24e0 .part v0x82acfec60_0, 0, 8;
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L_0x82b0f3ca0 .part v0x82acff200_0, 2048, 2048;
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L_0x82b0f3d40 .part v0x82acfec60_0, 8, 8;
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L_0x82b169540 .part v0x82acff200_0, 4096, 2048;
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L_0x82b1695e0 .part v0x82acfec60_0, 16, 8;
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L_0x82b16ada0 .part v0x82acff200_0, 6144, 2048;
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L_0x82b16ae40 .part v0x82acfec60_0, 24, 8;
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L_0x82ad055e0 .concat8 [ 8 8 8 8], v0x82ace08c0_0, v0x82ace5220_0, v0x82acf5b80_0, v0x82acfe4e0_0;
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L_0x82ad05680 .concat8 [ 1 1 1 1], v0x82ace01e0_0, v0x82ace4b40_0, v0x82acf54a0_0, v0x82acfde00_0;
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L_0x82ad05720 .concat8 [ 1 1 1 1], v0x82ace0320_0, v0x82ace4c80_0, v0x82acf55e0_0, v0x82acfdf40_0;
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L_0x82aca0780 .reduce/or L_0x82ad05680;
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L_0x82aca06e0 .reduce/and L_0x82ad05720;
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S_0x104fadf70 .scope generate, "GEN_NEURON[0]" "GEN_NEURON[0]" 4 34, 4 34 0, S_0x104fb3720;
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.timescale 0 0;
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P_0x82ac366c0 .param/l "n" 1 4 34, +C4<00>;
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S_0x104fae0f0 .scope module, "u_neuron" "neuron_parallel" 4 41, 5 1 0, S_0x104fadf70;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "start";
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.port_info 3 /INPUT 2048 "x_bus";
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.port_info 4 /INPUT 2048 "w_bus";
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.port_info 5 /INPUT 8 "bias";
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.port_info 6 /OUTPUT 8 "y";
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.port_info 7 /OUTPUT 1 "busy";
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.port_info 8 /OUTPUT 1 "done";
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P_0x104fa8bf0 .param/l "ACC_WIDTH" 0 5 5, +C4<00000000000000000000000000100000>;
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P_0x104fa8c30 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000001000>;
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P_0x104fa8c70 .param/l "GROUPS" 1 5 20, +C4<00000000000000000000000000100000>;
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P_0x104fa8cb0 .param/l "GROUP_INDEX_WIDTH" 1 5 21, +C4<00000000000000000000000000000101>;
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P_0x104fa8cf0 .param/l "N_INPUTS" 0 5 3, +C4<00000000000000000000000100000000>;
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P_0x104fa8d30 .param/l "PARALLEL" 0 5 4, +C4<00000000000000000000000000001000>;
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v0x82acdb660_0 .net *"_ivl_0", 31 0, L_0x82acff3e0; 1 drivers
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v0x82acdb700_0 .net *"_ivl_11", 31 0, L_0x82acff520; 1 drivers
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v0x82acdb7a0_0 .net *"_ivl_14", 31 0, L_0x82acff5c0; 1 drivers
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L_0x82a8540e8 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
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v0x82acdb840_0 .net *"_ivl_17", 26 0, L_0x82a8540e8; 1 drivers
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L_0x82a854130 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
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v0x82acdb8e0_0 .net/2u *"_ivl_18", 31 0, L_0x82a854130; 1 drivers
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v0x82acdb980_0 .net *"_ivl_21", 31 0, L_0x82acff660; 1 drivers
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L_0x82a854178 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
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v0x82acdba20_0 .net/2u *"_ivl_22", 31 0, L_0x82a854178; 1 drivers
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v0x82acdbac0_0 .net *"_ivl_25", 31 0, L_0x82acff700; 1 drivers
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v0x82acdbb60_0 .net *"_ivl_29", 0 0, L_0x82b0f2300; 1 drivers
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L_0x82a854010 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
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v0x82acdbc00_0 .net *"_ivl_3", 26 0, L_0x82a854010; 1 drivers
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v0x82acdbca0_0 .net *"_ivl_31", 23 0, L_0x82b0f23a0; 1 drivers
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L_0x82a854058 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
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v0x82acdbd40_0 .net/2u *"_ivl_4", 31 0, L_0x82a854058; 1 drivers
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v0x82acdbde0_0 .net *"_ivl_7", 31 0, L_0x82acff480; 1 drivers
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L_0x82a8540a0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
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v0x82acdbe80_0 .net/2u *"_ivl_8", 31 0, L_0x82a8540a0; 1 drivers
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v0x82acdbf20_0 .var/s "acc", 31 0;
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v0x82ace0000_0 .net/s "acc_next", 31 0, L_0x82b095360; 1 drivers
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v0x82ace00a0_0 .net/s "bias", 7 0, L_0x82b0f24e0; 1 drivers
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v0x82ace0140_0 .net/s "bias_ext", 31 0, L_0x82ad00be0; 1 drivers
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v0x82ace01e0_0 .var "busy", 0 0;
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v0x82ace0280_0 .net "clk", 0 0, v0x82acfeda0_0; alias, 1 drivers
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v0x82ace0320_0 .var "done", 0 0;
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v0x82ace03c0_0 .net/s "final_acc", 31 0, L_0x82b095400; 1 drivers
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v0x82ace0460_0 .var "group_index", 4 0;
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v0x82ace0500_0 .net "rst", 0 0, v0x82acff0c0_0; alias, 1 drivers
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v0x82ace05a0_0 .net "start", 0 0, v0x82acff160_0; alias, 1 drivers
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v0x82ace0640_0 .net/s "w_bus", 2047 0, L_0x82b0f2440; 1 drivers
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v0x82ace06e0_0 .net/s "w_group", 63 0, L_0x82b0f0dc0; 1 drivers
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v0x82ace0780_0 .net/s "x_bus", 2047 0, v0x82acff2a0_0; alias, 1 drivers
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v0x82ace0820_0 .net/s "x_group", 63 0, L_0x82b0f0d20; 1 drivers
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v0x82ace08c0_0 .var/s "y", 7 0;
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E_0x82acd5540 .event posedge, v0x82ace0280_0;
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L_0x82acff3e0 .concat [ 5 27 0 0], v0x82ace0460_0, L_0x82a854010;
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L_0x82acff480 .arith/mult 32, L_0x82acff3e0, L_0x82a854058;
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L_0x82acff520 .arith/mult 32, L_0x82acff480, L_0x82a8540a0;
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L_0x82b0f0d20 .part/v v0x82acff2a0_0, L_0x82acff520, 64;
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L_0x82acff5c0 .concat [ 5 27 0 0], v0x82ace0460_0, L_0x82a8540e8;
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L_0x82acff660 .arith/mult 32, L_0x82acff5c0, L_0x82a854130;
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L_0x82acff700 .arith/mult 32, L_0x82acff660, L_0x82a854178;
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L_0x82b0f0dc0 .part/v L_0x82b0f2440, L_0x82acff700, 64;
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L_0x82b0f2300 .part L_0x82b0f24e0, 7, 1;
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L_0x82b0f23a0 .repeat 24, 24, L_0x82b0f2300;
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L_0x82ad00be0 .concat [ 8 24 0 0], L_0x82b0f24e0, L_0x82b0f23a0;
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L_0x82b095400 .arith/sum 32, L_0x82b095360, L_0x82ad00be0;
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S_0x104fa8d70 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0x104fae0f0;
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.timescale 0 0;
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.port_info 0 /INPUT 64 "x_bus";
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.port_info 1 /INPUT 64 "w_bus";
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.port_info 2 /INPUT 32 "acc_in";
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.port_info 3 /OUTPUT 32 "acc_out";
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P_0x104fb9cc0 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000100000>;
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P_0x104fb9d00 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000001000>;
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P_0x104fb9d40 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>;
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v0x82acdb200_0 .net/s "acc_in", 31 0, v0x82acdbf20_0; 1 drivers
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v0x82acdb2a0_0 .net/s "acc_out", 31 0, L_0x82b095360; alias, 1 drivers
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v0x82acdb340_0 .var/i "j", 31 0;
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v0x82acdb3e0 .array "products", 7 0;
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v0x82acdb3e0_0 .net/s v0x82acdb3e0 0, 31 0, L_0x82b094dc0; 1 drivers
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v0x82acdb3e0_1 .net/s v0x82acdb3e0 1, 31 0, L_0x82b094e60; 1 drivers
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v0x82acdb3e0_2 .net/s v0x82acdb3e0 2, 31 0, L_0x82b094fa0; 1 drivers
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v0x82acdb3e0_3 .net/s v0x82acdb3e0 3, 31 0, L_0x82b095040; 1 drivers
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v0x82acdb3e0_4 .net/s v0x82acdb3e0 4, 31 0, L_0x82b0950e0; 1 drivers
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v0x82acdb3e0_5 .net/s v0x82acdb3e0 5, 31 0, L_0x82b095180; 1 drivers
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v0x82acdb3e0_6 .net/s v0x82acdb3e0 6, 31 0, L_0x82b095220; 1 drivers
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v0x82acdb3e0_7 .net/s v0x82acdb3e0 7, 31 0, L_0x82b0952c0; 1 drivers
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v0x82acdb480_0 .var/s "sum", 31 0;
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v0x82acdb520_0 .net/s "w_bus", 63 0, L_0x82b0f0dc0; alias, 1 drivers
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v0x82acdb5c0_0 .net/s "x_bus", 63 0, L_0x82b0f0d20; alias, 1 drivers
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E_0x82acd5580/0 .event anyedge, v0x82acdb480_0, v0x82acd8320_0, v0x82acd8960_0, v0x82acd8fa0_0;
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E_0x82acd5580/1 .event anyedge, v0x82acd95e0_0, v0x82acd9c20_0, v0x82acda260_0, v0x82acda8a0_0;
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E_0x82acd5580/2 .event anyedge, v0x82acdaee0_0;
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E_0x82acd5580 .event/or E_0x82acd5580/0, E_0x82acd5580/1, E_0x82acd5580/2;
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L_0x82b0f0fa0 .part L_0x82b0f0d20, 0, 8;
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L_0x82b0f1040 .part L_0x82b0f0dc0, 0, 8;
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L_0x82b0f1220 .part L_0x82b0f0d20, 8, 8;
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L_0x82b0f12c0 .part L_0x82b0f0dc0, 8, 8;
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L_0x82b0f14a0 .part L_0x82b0f0d20, 16, 8;
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L_0x82b0f1540 .part L_0x82b0f0dc0, 16, 8;
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L_0x82b0f1720 .part L_0x82b0f0d20, 24, 8;
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L_0x82b0f17c0 .part L_0x82b0f0dc0, 24, 8;
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L_0x82b0f19a0 .part L_0x82b0f0d20, 32, 8;
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L_0x82b0f1a40 .part L_0x82b0f0dc0, 32, 8;
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L_0x82b0f1c20 .part L_0x82b0f0d20, 40, 8;
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L_0x82b0f1cc0 .part L_0x82b0f0dc0, 40, 8;
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L_0x82b0f1ea0 .part L_0x82b0f0d20, 48, 8;
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L_0x82b0f1f40 .part L_0x82b0f0dc0, 48, 8;
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L_0x82b0f2120 .part L_0x82b0f0d20, 56, 8;
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L_0x82b0f21c0 .part L_0x82b0f0dc0, 56, 8;
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L_0x82b095360 .arith/sum 32, v0x82acdbf20_0, v0x82acdb480_0;
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S_0x104fab300 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0x104fa8d70;
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.timescale 0 0;
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P_0x82ac36700 .param/l "i" 1 6 17, +C4<00>;
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S_0x104fab480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x104fab300;
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.timescale 0 0;
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.port_info 0 /INPUT 8 "x";
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.port_info 1 /INPUT 8 "w";
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.port_info 2 /INPUT 32 "acc_in";
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.port_info 3 /OUTPUT 32 "acc_out";
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P_0x104fb69d0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
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P_0x104fb6a10 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
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P_0x104fb6a50 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
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v0x82acd8000_0 .net/s *"_ivl_0", 15 0, L_0x82acff7a0; 1 drivers
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v0x82acd80a0_0 .net/s *"_ivl_2", 15 0, L_0x82acff840; 1 drivers
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v0x82acd8140_0 .net *"_ivl_7", 0 0, L_0x82b0f0e60; 1 drivers
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v0x82acd81e0_0 .net *"_ivl_9", 15 0, L_0x82b0f0f00; 1 drivers
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L_0x82a8541c0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
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v0x82acd8280_0 .net/s "acc_in", 31 0, L_0x82a8541c0; 1 drivers
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v0x82acd8320_0 .net/s "acc_out", 31 0, L_0x82b094dc0; alias, 1 drivers
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v0x82acd83c0_0 .net/s "product", 15 0, L_0x82acff8e0; 1 drivers
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v0x82acd8460_0 .net/s "product_ext", 31 0, L_0x82acff980; 1 drivers
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v0x82acd8500_0 .net/s "w", 7 0, L_0x82b0f1040; 1 drivers
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v0x82acd85a0_0 .net/s "x", 7 0, L_0x82b0f0fa0; 1 drivers
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L_0x82acff7a0 .extend/s 16, L_0x82b0f0fa0;
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L_0x82acff840 .extend/s 16, L_0x82b0f1040;
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L_0x82acff8e0 .arith/mult 16, L_0x82acff7a0, L_0x82acff840;
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L_0x82b0f0e60 .part L_0x82acff8e0, 15, 1;
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L_0x82b0f0f00 .repeat 16, 16, L_0x82b0f0e60;
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L_0x82acff980 .concat [ 16 16 0 0], L_0x82acff8e0, L_0x82b0f0f00;
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L_0x82b094dc0 .arith/sum 32, L_0x82a8541c0, L_0x82acff980;
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S_0x104fb20c0 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0x104fa8d70;
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.timescale 0 0;
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P_0x82ac36740 .param/l "i" 1 6 17, +C4<01>;
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S_0x104fb2240 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x104fb20c0;
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.timescale 0 0;
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.port_info 0 /INPUT 8 "x";
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.port_info 1 /INPUT 8 "w";
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.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x104fb7750 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x104fb7790 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fb77d0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acd8640_0 .net/s *"_ivl_0", 15 0, L_0x82acffa20; 1 drivers
|
|
v0x82acd86e0_0 .net/s *"_ivl_2", 15 0, L_0x82acffac0; 1 drivers
|
|
v0x82acd8780_0 .net *"_ivl_7", 0 0, L_0x82b0f10e0; 1 drivers
|
|
v0x82acd8820_0 .net *"_ivl_9", 15 0, L_0x82b0f1180; 1 drivers
|
|
L_0x82a854208 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acd88c0_0 .net/s "acc_in", 31 0, L_0x82a854208; 1 drivers
|
|
v0x82acd8960_0 .net/s "acc_out", 31 0, L_0x82b094e60; alias, 1 drivers
|
|
v0x82acd8a00_0 .net/s "product", 15 0, L_0x82acffb60; 1 drivers
|
|
v0x82acd8aa0_0 .net/s "product_ext", 31 0, L_0x82acffc00; 1 drivers
|
|
v0x82acd8b40_0 .net/s "w", 7 0, L_0x82b0f12c0; 1 drivers
|
|
v0x82acd8be0_0 .net/s "x", 7 0, L_0x82b0f1220; 1 drivers
|
|
L_0x82acffa20 .extend/s 16, L_0x82b0f1220;
|
|
L_0x82acffac0 .extend/s 16, L_0x82b0f12c0;
|
|
L_0x82acffb60 .arith/mult 16, L_0x82acffa20, L_0x82acffac0;
|
|
L_0x82b0f10e0 .part L_0x82acffb60, 15, 1;
|
|
L_0x82b0f1180 .repeat 16, 16, L_0x82b0f10e0;
|
|
L_0x82acffc00 .concat [ 16 16 0 0], L_0x82acffb60, L_0x82b0f1180;
|
|
L_0x82b094e60 .arith/sum 32, L_0x82a854208, L_0x82acffc00;
|
|
S_0x104fbdba0 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0x104fa8d70;
|
|
.timescale 0 0;
|
|
P_0x82ac36780 .param/l "i" 1 6 17, +C4<010>;
|
|
S_0x82acdc000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x104fbdba0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x104fb79a0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x104fb79e0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fb7a20 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acd8c80_0 .net/s *"_ivl_0", 15 0, L_0x82acffca0; 1 drivers
|
|
v0x82acd8d20_0 .net/s *"_ivl_2", 15 0, L_0x82acffd40; 1 drivers
|
|
v0x82acd8dc0_0 .net *"_ivl_7", 0 0, L_0x82b0f1360; 1 drivers
|
|
v0x82acd8e60_0 .net *"_ivl_9", 15 0, L_0x82b0f1400; 1 drivers
|
|
L_0x82a854250 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acd8f00_0 .net/s "acc_in", 31 0, L_0x82a854250; 1 drivers
|
|
v0x82acd8fa0_0 .net/s "acc_out", 31 0, L_0x82b094fa0; alias, 1 drivers
|
|
v0x82acd9040_0 .net/s "product", 15 0, L_0x82acffde0; 1 drivers
|
|
v0x82acd90e0_0 .net/s "product_ext", 31 0, L_0x82acffe80; 1 drivers
|
|
v0x82acd9180_0 .net/s "w", 7 0, L_0x82b0f1540; 1 drivers
|
|
v0x82acd9220_0 .net/s "x", 7 0, L_0x82b0f14a0; 1 drivers
|
|
L_0x82acffca0 .extend/s 16, L_0x82b0f14a0;
|
|
L_0x82acffd40 .extend/s 16, L_0x82b0f1540;
|
|
L_0x82acffde0 .arith/mult 16, L_0x82acffca0, L_0x82acffd40;
|
|
L_0x82b0f1360 .part L_0x82acffde0, 15, 1;
|
|
L_0x82b0f1400 .repeat 16, 16, L_0x82b0f1360;
|
|
L_0x82acffe80 .concat [ 16 16 0 0], L_0x82acffde0, L_0x82b0f1400;
|
|
L_0x82b094fa0 .arith/sum 32, L_0x82a854250, L_0x82acffe80;
|
|
S_0x82acdc180 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0x104fa8d70;
|
|
.timescale 0 0;
|
|
P_0x82ac367c0 .param/l "i" 1 6 17, +C4<011>;
|
|
S_0x82acdc300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdc180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x104fbae40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x104fbae80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fbaec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acd92c0_0 .net/s *"_ivl_0", 15 0, L_0x82acfff20; 1 drivers
|
|
v0x82acd9360_0 .net/s *"_ivl_2", 15 0, L_0x82ad00000; 1 drivers
|
|
v0x82acd9400_0 .net *"_ivl_7", 0 0, L_0x82b0f15e0; 1 drivers
|
|
v0x82acd94a0_0 .net *"_ivl_9", 15 0, L_0x82b0f1680; 1 drivers
|
|
L_0x82a854298 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acd9540_0 .net/s "acc_in", 31 0, L_0x82a854298; 1 drivers
|
|
v0x82acd95e0_0 .net/s "acc_out", 31 0, L_0x82b095040; alias, 1 drivers
|
|
v0x82acd9680_0 .net/s "product", 15 0, L_0x82ad000a0; 1 drivers
|
|
v0x82acd9720_0 .net/s "product_ext", 31 0, L_0x82ad00140; 1 drivers
|
|
v0x82acd97c0_0 .net/s "w", 7 0, L_0x82b0f17c0; 1 drivers
|
|
v0x82acd9860_0 .net/s "x", 7 0, L_0x82b0f1720; 1 drivers
|
|
L_0x82acfff20 .extend/s 16, L_0x82b0f1720;
|
|
L_0x82ad00000 .extend/s 16, L_0x82b0f17c0;
|
|
L_0x82ad000a0 .arith/mult 16, L_0x82acfff20, L_0x82ad00000;
|
|
L_0x82b0f15e0 .part L_0x82ad000a0, 15, 1;
|
|
L_0x82b0f1680 .repeat 16, 16, L_0x82b0f15e0;
|
|
L_0x82ad00140 .concat [ 16 16 0 0], L_0x82ad000a0, L_0x82b0f1680;
|
|
L_0x82b095040 .arith/sum 32, L_0x82a854298, L_0x82ad00140;
|
|
S_0x82acdc480 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0x104fa8d70;
|
|
.timescale 0 0;
|
|
P_0x82ac36840 .param/l "i" 1 6 17, +C4<0100>;
|
|
S_0x82acdc600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdc480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x104fbac40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x104fbac80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fbacc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acd9900_0 .net/s *"_ivl_0", 15 0, L_0x82ad001e0; 1 drivers
|
|
v0x82acd99a0_0 .net/s *"_ivl_2", 15 0, L_0x82ad00280; 1 drivers
|
|
v0x82acd9a40_0 .net *"_ivl_7", 0 0, L_0x82b0f1860; 1 drivers
|
|
v0x82acd9ae0_0 .net *"_ivl_9", 15 0, L_0x82b0f1900; 1 drivers
|
|
L_0x82a8542e0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acd9b80_0 .net/s "acc_in", 31 0, L_0x82a8542e0; 1 drivers
|
|
v0x82acd9c20_0 .net/s "acc_out", 31 0, L_0x82b0950e0; alias, 1 drivers
|
|
v0x82acd9cc0_0 .net/s "product", 15 0, L_0x82ad00320; 1 drivers
|
|
v0x82acd9d60_0 .net/s "product_ext", 31 0, L_0x82ad003c0; 1 drivers
|
|
v0x82acd9e00_0 .net/s "w", 7 0, L_0x82b0f1a40; 1 drivers
|
|
v0x82acd9ea0_0 .net/s "x", 7 0, L_0x82b0f19a0; 1 drivers
|
|
L_0x82ad001e0 .extend/s 16, L_0x82b0f19a0;
|
|
L_0x82ad00280 .extend/s 16, L_0x82b0f1a40;
|
|
L_0x82ad00320 .arith/mult 16, L_0x82ad001e0, L_0x82ad00280;
|
|
L_0x82b0f1860 .part L_0x82ad00320, 15, 1;
|
|
L_0x82b0f1900 .repeat 16, 16, L_0x82b0f1860;
|
|
L_0x82ad003c0 .concat [ 16 16 0 0], L_0x82ad00320, L_0x82b0f1900;
|
|
L_0x82b0950e0 .arith/sum 32, L_0x82a8542e0, L_0x82ad003c0;
|
|
S_0x82acdc780 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0x104fa8d70;
|
|
.timescale 0 0;
|
|
P_0x82ac36880 .param/l "i" 1 6 17, +C4<0101>;
|
|
S_0x82acdc900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdc780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154000 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154040 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154080 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acd9f40_0 .net/s *"_ivl_0", 15 0, L_0x82ad00460; 1 drivers
|
|
v0x82acd9fe0_0 .net/s *"_ivl_2", 15 0, L_0x82ad00500; 1 drivers
|
|
v0x82acda080_0 .net *"_ivl_7", 0 0, L_0x82b0f1ae0; 1 drivers
|
|
v0x82acda120_0 .net *"_ivl_9", 15 0, L_0x82b0f1b80; 1 drivers
|
|
L_0x82a854328 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acda1c0_0 .net/s "acc_in", 31 0, L_0x82a854328; 1 drivers
|
|
v0x82acda260_0 .net/s "acc_out", 31 0, L_0x82b095180; alias, 1 drivers
|
|
v0x82acda300_0 .net/s "product", 15 0, L_0x82ad005a0; 1 drivers
|
|
v0x82acda3a0_0 .net/s "product_ext", 31 0, L_0x82ad00640; 1 drivers
|
|
v0x82acda440_0 .net/s "w", 7 0, L_0x82b0f1cc0; 1 drivers
|
|
v0x82acda4e0_0 .net/s "x", 7 0, L_0x82b0f1c20; 1 drivers
|
|
L_0x82ad00460 .extend/s 16, L_0x82b0f1c20;
|
|
L_0x82ad00500 .extend/s 16, L_0x82b0f1cc0;
|
|
L_0x82ad005a0 .arith/mult 16, L_0x82ad00460, L_0x82ad00500;
|
|
L_0x82b0f1ae0 .part L_0x82ad005a0, 15, 1;
|
|
L_0x82b0f1b80 .repeat 16, 16, L_0x82b0f1ae0;
|
|
L_0x82ad00640 .concat [ 16 16 0 0], L_0x82ad005a0, L_0x82b0f1b80;
|
|
L_0x82b095180 .arith/sum 32, L_0x82a854328, L_0x82ad00640;
|
|
S_0x82acdca80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0x104fa8d70;
|
|
.timescale 0 0;
|
|
P_0x82ac368c0 .param/l "i" 1 6 17, +C4<0110>;
|
|
S_0x82acdcc00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdca80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b1540c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154100 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154140 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acda580_0 .net/s *"_ivl_0", 15 0, L_0x82ad006e0; 1 drivers
|
|
v0x82acda620_0 .net/s *"_ivl_2", 15 0, L_0x82ad00780; 1 drivers
|
|
v0x82acda6c0_0 .net *"_ivl_7", 0 0, L_0x82b0f1d60; 1 drivers
|
|
v0x82acda760_0 .net *"_ivl_9", 15 0, L_0x82b0f1e00; 1 drivers
|
|
L_0x82a854370 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acda800_0 .net/s "acc_in", 31 0, L_0x82a854370; 1 drivers
|
|
v0x82acda8a0_0 .net/s "acc_out", 31 0, L_0x82b095220; alias, 1 drivers
|
|
v0x82acda940_0 .net/s "product", 15 0, L_0x82ad00820; 1 drivers
|
|
v0x82acda9e0_0 .net/s "product_ext", 31 0, L_0x82ad008c0; 1 drivers
|
|
v0x82acdaa80_0 .net/s "w", 7 0, L_0x82b0f1f40; 1 drivers
|
|
v0x82acdab20_0 .net/s "x", 7 0, L_0x82b0f1ea0; 1 drivers
|
|
L_0x82ad006e0 .extend/s 16, L_0x82b0f1ea0;
|
|
L_0x82ad00780 .extend/s 16, L_0x82b0f1f40;
|
|
L_0x82ad00820 .arith/mult 16, L_0x82ad006e0, L_0x82ad00780;
|
|
L_0x82b0f1d60 .part L_0x82ad00820, 15, 1;
|
|
L_0x82b0f1e00 .repeat 16, 16, L_0x82b0f1d60;
|
|
L_0x82ad008c0 .concat [ 16 16 0 0], L_0x82ad00820, L_0x82b0f1e00;
|
|
L_0x82b095220 .arith/sum 32, L_0x82a854370, L_0x82ad008c0;
|
|
S_0x82acdcd80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0x104fa8d70;
|
|
.timescale 0 0;
|
|
P_0x82ac36900 .param/l "i" 1 6 17, +C4<0111>;
|
|
S_0x82acdcf00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdcd80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154180 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b1541c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154200 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acdabc0_0 .net/s *"_ivl_0", 15 0, L_0x82ad00960; 1 drivers
|
|
v0x82acdac60_0 .net/s *"_ivl_2", 15 0, L_0x82ad00a00; 1 drivers
|
|
v0x82acdad00_0 .net *"_ivl_7", 0 0, L_0x82b0f1fe0; 1 drivers
|
|
v0x82acdada0_0 .net *"_ivl_9", 15 0, L_0x82b0f2080; 1 drivers
|
|
L_0x82a8543b8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acdae40_0 .net/s "acc_in", 31 0, L_0x82a8543b8; 1 drivers
|
|
v0x82acdaee0_0 .net/s "acc_out", 31 0, L_0x82b0952c0; alias, 1 drivers
|
|
v0x82acdaf80_0 .net/s "product", 15 0, L_0x82ad00aa0; 1 drivers
|
|
v0x82acdb020_0 .net/s "product_ext", 31 0, L_0x82ad00b40; 1 drivers
|
|
v0x82acdb0c0_0 .net/s "w", 7 0, L_0x82b0f21c0; 1 drivers
|
|
v0x82acdb160_0 .net/s "x", 7 0, L_0x82b0f2120; 1 drivers
|
|
L_0x82ad00960 .extend/s 16, L_0x82b0f2120;
|
|
L_0x82ad00a00 .extend/s 16, L_0x82b0f21c0;
|
|
L_0x82ad00aa0 .arith/mult 16, L_0x82ad00960, L_0x82ad00a00;
|
|
L_0x82b0f1fe0 .part L_0x82ad00aa0, 15, 1;
|
|
L_0x82b0f2080 .repeat 16, 16, L_0x82b0f1fe0;
|
|
L_0x82ad00b40 .concat [ 16 16 0 0], L_0x82ad00aa0, L_0x82b0f2080;
|
|
L_0x82b0952c0 .arith/sum 32, L_0x82a8543b8, L_0x82ad00b40;
|
|
S_0x82acdd080 .scope generate, "GEN_NEURON[1]" "GEN_NEURON[1]" 4 34, 4 34 0, S_0x104fb3720;
|
|
.timescale 0 0;
|
|
P_0x82ac36980 .param/l "n" 1 4 34, +C4<01>;
|
|
S_0x82acdd200 .scope module, "u_neuron" "neuron_parallel" 4 41, 5 1 0, S_0x82acdd080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 2048 "x_bus";
|
|
.port_info 4 /INPUT 2048 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x104fbefa0 .param/l "ACC_WIDTH" 0 5 5, +C4<00000000000000000000000000100000>;
|
|
P_0x104fbefe0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fbf020 .param/l "GROUPS" 1 5 20, +C4<00000000000000000000000000100000>;
|
|
P_0x104fbf060 .param/l "GROUP_INDEX_WIDTH" 1 5 21, +C4<00000000000000000000000000000101>;
|
|
P_0x104fbf0a0 .param/l "N_INPUTS" 0 5 3, +C4<00000000000000000000000100000000>;
|
|
P_0x104fbf0e0 .param/l "PARALLEL" 0 5 4, +C4<00000000000000000000000000001000>;
|
|
v0x82ace4000_0 .net *"_ivl_0", 31 0, L_0x82ad00c80; 1 drivers
|
|
v0x82ace40a0_0 .net *"_ivl_11", 31 0, L_0x82ad00dc0; 1 drivers
|
|
v0x82ace4140_0 .net *"_ivl_14", 31 0, L_0x82ad00e60; 1 drivers
|
|
L_0x82a8544d8 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace41e0_0 .net *"_ivl_17", 26 0, L_0x82a8544d8; 1 drivers
|
|
L_0x82a854520 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace4280_0 .net/2u *"_ivl_18", 31 0, L_0x82a854520; 1 drivers
|
|
v0x82ace4320_0 .net *"_ivl_21", 31 0, L_0x82ad00f00; 1 drivers
|
|
L_0x82a854568 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace43c0_0 .net/2u *"_ivl_22", 31 0, L_0x82a854568; 1 drivers
|
|
v0x82ace4460_0 .net *"_ivl_25", 31 0, L_0x82ad00fa0; 1 drivers
|
|
v0x82ace4500_0 .net *"_ivl_29", 0 0, L_0x82b0f3b60; 1 drivers
|
|
L_0x82a854400 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace45a0_0 .net *"_ivl_3", 26 0, L_0x82a854400; 1 drivers
|
|
v0x82ace4640_0 .net *"_ivl_31", 23 0, L_0x82b0f3c00; 1 drivers
|
|
L_0x82a854448 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace46e0_0 .net/2u *"_ivl_4", 31 0, L_0x82a854448; 1 drivers
|
|
v0x82ace4780_0 .net *"_ivl_7", 31 0, L_0x82ad00d20; 1 drivers
|
|
L_0x82a854490 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace4820_0 .net/2u *"_ivl_8", 31 0, L_0x82a854490; 1 drivers
|
|
v0x82ace48c0_0 .var/s "acc", 31 0;
|
|
v0x82ace4960_0 .net/s "acc_next", 31 0, L_0x82b0959a0; 1 drivers
|
|
v0x82ace4a00_0 .net/s "bias", 7 0, L_0x82b0f3d40; 1 drivers
|
|
v0x82ace4aa0_0 .net/s "bias_ext", 31 0, L_0x82ad02440; 1 drivers
|
|
v0x82ace4b40_0 .var "busy", 0 0;
|
|
v0x82ace4be0_0 .net "clk", 0 0, v0x82acfeda0_0; alias, 1 drivers
|
|
v0x82ace4c80_0 .var "done", 0 0;
|
|
v0x82ace4d20_0 .net/s "final_acc", 31 0, L_0x82b095a40; 1 drivers
|
|
v0x82ace4dc0_0 .var "group_index", 4 0;
|
|
v0x82ace4e60_0 .net "rst", 0 0, v0x82acff0c0_0; alias, 1 drivers
|
|
v0x82ace4f00_0 .net "start", 0 0, v0x82acff160_0; alias, 1 drivers
|
|
v0x82ace4fa0_0 .net/s "w_bus", 2047 0, L_0x82b0f3ca0; 1 drivers
|
|
v0x82ace5040_0 .net/s "w_group", 63 0, L_0x82b0f2620; 1 drivers
|
|
v0x82ace50e0_0 .net/s "x_bus", 2047 0, v0x82acff2a0_0; alias, 1 drivers
|
|
v0x82ace5180_0 .net/s "x_group", 63 0, L_0x82b0f2580; 1 drivers
|
|
v0x82ace5220_0 .var/s "y", 7 0;
|
|
L_0x82ad00c80 .concat [ 5 27 0 0], v0x82ace4dc0_0, L_0x82a854400;
|
|
L_0x82ad00d20 .arith/mult 32, L_0x82ad00c80, L_0x82a854448;
|
|
L_0x82ad00dc0 .arith/mult 32, L_0x82ad00d20, L_0x82a854490;
|
|
L_0x82b0f2580 .part/v v0x82acff2a0_0, L_0x82ad00dc0, 64;
|
|
L_0x82ad00e60 .concat [ 5 27 0 0], v0x82ace4dc0_0, L_0x82a8544d8;
|
|
L_0x82ad00f00 .arith/mult 32, L_0x82ad00e60, L_0x82a854520;
|
|
L_0x82ad00fa0 .arith/mult 32, L_0x82ad00f00, L_0x82a854568;
|
|
L_0x82b0f2620 .part/v L_0x82b0f3ca0, L_0x82ad00fa0, 64;
|
|
L_0x82b0f3b60 .part L_0x82b0f3d40, 7, 1;
|
|
L_0x82b0f3c00 .repeat 24, 24, L_0x82b0f3b60;
|
|
L_0x82ad02440 .concat [ 8 24 0 0], L_0x82b0f3d40, L_0x82b0f3c00;
|
|
L_0x82b095a40 .arith/sum 32, L_0x82b0959a0, L_0x82ad02440;
|
|
S_0x82acdd380 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0x82acdd200;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154240 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154280 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b1542c0 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>;
|
|
v0x82ace3b60_0 .net/s "acc_in", 31 0, v0x82ace48c0_0; 1 drivers
|
|
v0x82ace3c00_0 .net/s "acc_out", 31 0, L_0x82b0959a0; alias, 1 drivers
|
|
v0x82ace3ca0_0 .var/i "j", 31 0;
|
|
v0x82ace3d40 .array "products", 7 0;
|
|
v0x82ace3d40_0 .net/s v0x82ace3d40 0, 31 0, L_0x82b0954a0; 1 drivers
|
|
v0x82ace3d40_1 .net/s v0x82ace3d40 1, 31 0, L_0x82b095540; 1 drivers
|
|
v0x82ace3d40_2 .net/s v0x82ace3d40 2, 31 0, L_0x82b0955e0; 1 drivers
|
|
v0x82ace3d40_3 .net/s v0x82ace3d40 3, 31 0, L_0x82b095680; 1 drivers
|
|
v0x82ace3d40_4 .net/s v0x82ace3d40 4, 31 0, L_0x82b095720; 1 drivers
|
|
v0x82ace3d40_5 .net/s v0x82ace3d40 5, 31 0, L_0x82b0957c0; 1 drivers
|
|
v0x82ace3d40_6 .net/s v0x82ace3d40 6, 31 0, L_0x82b095860; 1 drivers
|
|
v0x82ace3d40_7 .net/s v0x82ace3d40 7, 31 0, L_0x82b095900; 1 drivers
|
|
v0x82ace3de0_0 .var/s "sum", 31 0;
|
|
v0x82ace3e80_0 .net/s "w_bus", 63 0, L_0x82b0f2620; alias, 1 drivers
|
|
v0x82ace3f20_0 .net/s "x_bus", 63 0, L_0x82b0f2580; alias, 1 drivers
|
|
E_0x82acd57c0/0 .event anyedge, v0x82ace3de0_0, v0x82ace0c80_0, v0x82ace12c0_0, v0x82ace1900_0;
|
|
E_0x82acd57c0/1 .event anyedge, v0x82ace1f40_0, v0x82ace2580_0, v0x82ace2bc0_0, v0x82ace3200_0;
|
|
E_0x82acd57c0/2 .event anyedge, v0x82ace3840_0;
|
|
E_0x82acd57c0 .event/or E_0x82acd57c0/0, E_0x82acd57c0/1, E_0x82acd57c0/2;
|
|
L_0x82b0f2800 .part L_0x82b0f2580, 0, 8;
|
|
L_0x82b0f28a0 .part L_0x82b0f2620, 0, 8;
|
|
L_0x82b0f2a80 .part L_0x82b0f2580, 8, 8;
|
|
L_0x82b0f2b20 .part L_0x82b0f2620, 8, 8;
|
|
L_0x82b0f2d00 .part L_0x82b0f2580, 16, 8;
|
|
L_0x82b0f2da0 .part L_0x82b0f2620, 16, 8;
|
|
L_0x82b0f2f80 .part L_0x82b0f2580, 24, 8;
|
|
L_0x82b0f3020 .part L_0x82b0f2620, 24, 8;
|
|
L_0x82b0f3200 .part L_0x82b0f2580, 32, 8;
|
|
L_0x82b0f32a0 .part L_0x82b0f2620, 32, 8;
|
|
L_0x82b0f3480 .part L_0x82b0f2580, 40, 8;
|
|
L_0x82b0f3520 .part L_0x82b0f2620, 40, 8;
|
|
L_0x82b0f3700 .part L_0x82b0f2580, 48, 8;
|
|
L_0x82b0f37a0 .part L_0x82b0f2620, 48, 8;
|
|
L_0x82b0f3980 .part L_0x82b0f2580, 56, 8;
|
|
L_0x82b0f3a20 .part L_0x82b0f2620, 56, 8;
|
|
L_0x82b0959a0 .arith/sum 32, v0x82ace48c0_0, v0x82ace3de0_0;
|
|
S_0x82acdd500 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac369c0 .param/l "i" 1 6 17, +C4<00>;
|
|
S_0x82acdd680 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdd500;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154300 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154340 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154380 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace0960_0 .net/s *"_ivl_0", 15 0, L_0x82ad01040; 1 drivers
|
|
v0x82ace0a00_0 .net/s *"_ivl_2", 15 0, L_0x82ad010e0; 1 drivers
|
|
v0x82ace0aa0_0 .net *"_ivl_7", 0 0, L_0x82b0f26c0; 1 drivers
|
|
v0x82ace0b40_0 .net *"_ivl_9", 15 0, L_0x82b0f2760; 1 drivers
|
|
L_0x82a8545b0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace0be0_0 .net/s "acc_in", 31 0, L_0x82a8545b0; 1 drivers
|
|
v0x82ace0c80_0 .net/s "acc_out", 31 0, L_0x82b0954a0; alias, 1 drivers
|
|
v0x82ace0d20_0 .net/s "product", 15 0, L_0x82ad01180; 1 drivers
|
|
v0x82ace0dc0_0 .net/s "product_ext", 31 0, L_0x82ad01220; 1 drivers
|
|
v0x82ace0e60_0 .net/s "w", 7 0, L_0x82b0f28a0; 1 drivers
|
|
v0x82ace0f00_0 .net/s "x", 7 0, L_0x82b0f2800; 1 drivers
|
|
L_0x82ad01040 .extend/s 16, L_0x82b0f2800;
|
|
L_0x82ad010e0 .extend/s 16, L_0x82b0f28a0;
|
|
L_0x82ad01180 .arith/mult 16, L_0x82ad01040, L_0x82ad010e0;
|
|
L_0x82b0f26c0 .part L_0x82ad01180, 15, 1;
|
|
L_0x82b0f2760 .repeat 16, 16, L_0x82b0f26c0;
|
|
L_0x82ad01220 .concat [ 16 16 0 0], L_0x82ad01180, L_0x82b0f2760;
|
|
L_0x82b0954a0 .arith/sum 32, L_0x82a8545b0, L_0x82ad01220;
|
|
S_0x82acdd800 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36a00 .param/l "i" 1 6 17, +C4<01>;
|
|
S_0x82acdd980 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdd800;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b1543c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154400 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154440 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace0fa0_0 .net/s *"_ivl_0", 15 0, L_0x82ad012c0; 1 drivers
|
|
v0x82ace1040_0 .net/s *"_ivl_2", 15 0, L_0x82ad01360; 1 drivers
|
|
v0x82ace10e0_0 .net *"_ivl_7", 0 0, L_0x82b0f2940; 1 drivers
|
|
v0x82ace1180_0 .net *"_ivl_9", 15 0, L_0x82b0f29e0; 1 drivers
|
|
L_0x82a8545f8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace1220_0 .net/s "acc_in", 31 0, L_0x82a8545f8; 1 drivers
|
|
v0x82ace12c0_0 .net/s "acc_out", 31 0, L_0x82b095540; alias, 1 drivers
|
|
v0x82ace1360_0 .net/s "product", 15 0, L_0x82ad01400; 1 drivers
|
|
v0x82ace1400_0 .net/s "product_ext", 31 0, L_0x82ad014a0; 1 drivers
|
|
v0x82ace14a0_0 .net/s "w", 7 0, L_0x82b0f2b20; 1 drivers
|
|
v0x82ace1540_0 .net/s "x", 7 0, L_0x82b0f2a80; 1 drivers
|
|
L_0x82ad012c0 .extend/s 16, L_0x82b0f2a80;
|
|
L_0x82ad01360 .extend/s 16, L_0x82b0f2b20;
|
|
L_0x82ad01400 .arith/mult 16, L_0x82ad012c0, L_0x82ad01360;
|
|
L_0x82b0f2940 .part L_0x82ad01400, 15, 1;
|
|
L_0x82b0f29e0 .repeat 16, 16, L_0x82b0f2940;
|
|
L_0x82ad014a0 .concat [ 16 16 0 0], L_0x82ad01400, L_0x82b0f29e0;
|
|
L_0x82b095540 .arith/sum 32, L_0x82a8545f8, L_0x82ad014a0;
|
|
S_0x82acddb00 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36a40 .param/l "i" 1 6 17, +C4<010>;
|
|
S_0x82acddc80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acddb00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154480 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b1544c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154500 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace15e0_0 .net/s *"_ivl_0", 15 0, L_0x82ad01540; 1 drivers
|
|
v0x82ace1680_0 .net/s *"_ivl_2", 15 0, L_0x82ad015e0; 1 drivers
|
|
v0x82ace1720_0 .net *"_ivl_7", 0 0, L_0x82b0f2bc0; 1 drivers
|
|
v0x82ace17c0_0 .net *"_ivl_9", 15 0, L_0x82b0f2c60; 1 drivers
|
|
L_0x82a854640 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace1860_0 .net/s "acc_in", 31 0, L_0x82a854640; 1 drivers
|
|
v0x82ace1900_0 .net/s "acc_out", 31 0, L_0x82b0955e0; alias, 1 drivers
|
|
v0x82ace19a0_0 .net/s "product", 15 0, L_0x82ad01680; 1 drivers
|
|
v0x82ace1a40_0 .net/s "product_ext", 31 0, L_0x82ad01720; 1 drivers
|
|
v0x82ace1ae0_0 .net/s "w", 7 0, L_0x82b0f2da0; 1 drivers
|
|
v0x82ace1b80_0 .net/s "x", 7 0, L_0x82b0f2d00; 1 drivers
|
|
L_0x82ad01540 .extend/s 16, L_0x82b0f2d00;
|
|
L_0x82ad015e0 .extend/s 16, L_0x82b0f2da0;
|
|
L_0x82ad01680 .arith/mult 16, L_0x82ad01540, L_0x82ad015e0;
|
|
L_0x82b0f2bc0 .part L_0x82ad01680, 15, 1;
|
|
L_0x82b0f2c60 .repeat 16, 16, L_0x82b0f2bc0;
|
|
L_0x82ad01720 .concat [ 16 16 0 0], L_0x82ad01680, L_0x82b0f2c60;
|
|
L_0x82b0955e0 .arith/sum 32, L_0x82a854640, L_0x82ad01720;
|
|
S_0x82acdde00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36a80 .param/l "i" 1 6 17, +C4<011>;
|
|
S_0x82acddf80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdde00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154540 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154580 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b1545c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace1c20_0 .net/s *"_ivl_0", 15 0, L_0x82ad017c0; 1 drivers
|
|
v0x82ace1cc0_0 .net/s *"_ivl_2", 15 0, L_0x82ad01860; 1 drivers
|
|
v0x82ace1d60_0 .net *"_ivl_7", 0 0, L_0x82b0f2e40; 1 drivers
|
|
v0x82ace1e00_0 .net *"_ivl_9", 15 0, L_0x82b0f2ee0; 1 drivers
|
|
L_0x82a854688 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace1ea0_0 .net/s "acc_in", 31 0, L_0x82a854688; 1 drivers
|
|
v0x82ace1f40_0 .net/s "acc_out", 31 0, L_0x82b095680; alias, 1 drivers
|
|
v0x82ace1fe0_0 .net/s "product", 15 0, L_0x82ad01900; 1 drivers
|
|
v0x82ace2080_0 .net/s "product_ext", 31 0, L_0x82ad019a0; 1 drivers
|
|
v0x82ace2120_0 .net/s "w", 7 0, L_0x82b0f3020; 1 drivers
|
|
v0x82ace21c0_0 .net/s "x", 7 0, L_0x82b0f2f80; 1 drivers
|
|
L_0x82ad017c0 .extend/s 16, L_0x82b0f2f80;
|
|
L_0x82ad01860 .extend/s 16, L_0x82b0f3020;
|
|
L_0x82ad01900 .arith/mult 16, L_0x82ad017c0, L_0x82ad01860;
|
|
L_0x82b0f2e40 .part L_0x82ad01900, 15, 1;
|
|
L_0x82b0f2ee0 .repeat 16, 16, L_0x82b0f2e40;
|
|
L_0x82ad019a0 .concat [ 16 16 0 0], L_0x82ad01900, L_0x82b0f2ee0;
|
|
L_0x82b095680 .arith/sum 32, L_0x82a854688, L_0x82ad019a0;
|
|
S_0x82acde100 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36b00 .param/l "i" 1 6 17, +C4<0100>;
|
|
S_0x82acde280 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acde100;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154600 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154640 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154680 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace2260_0 .net/s *"_ivl_0", 15 0, L_0x82ad01a40; 1 drivers
|
|
v0x82ace2300_0 .net/s *"_ivl_2", 15 0, L_0x82ad01ae0; 1 drivers
|
|
v0x82ace23a0_0 .net *"_ivl_7", 0 0, L_0x82b0f30c0; 1 drivers
|
|
v0x82ace2440_0 .net *"_ivl_9", 15 0, L_0x82b0f3160; 1 drivers
|
|
L_0x82a8546d0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace24e0_0 .net/s "acc_in", 31 0, L_0x82a8546d0; 1 drivers
|
|
v0x82ace2580_0 .net/s "acc_out", 31 0, L_0x82b095720; alias, 1 drivers
|
|
v0x82ace2620_0 .net/s "product", 15 0, L_0x82ad01b80; 1 drivers
|
|
v0x82ace26c0_0 .net/s "product_ext", 31 0, L_0x82ad01c20; 1 drivers
|
|
v0x82ace2760_0 .net/s "w", 7 0, L_0x82b0f32a0; 1 drivers
|
|
v0x82ace2800_0 .net/s "x", 7 0, L_0x82b0f3200; 1 drivers
|
|
L_0x82ad01a40 .extend/s 16, L_0x82b0f3200;
|
|
L_0x82ad01ae0 .extend/s 16, L_0x82b0f32a0;
|
|
L_0x82ad01b80 .arith/mult 16, L_0x82ad01a40, L_0x82ad01ae0;
|
|
L_0x82b0f30c0 .part L_0x82ad01b80, 15, 1;
|
|
L_0x82b0f3160 .repeat 16, 16, L_0x82b0f30c0;
|
|
L_0x82ad01c20 .concat [ 16 16 0 0], L_0x82ad01b80, L_0x82b0f3160;
|
|
L_0x82b095720 .arith/sum 32, L_0x82a8546d0, L_0x82ad01c20;
|
|
S_0x82acde400 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36b40 .param/l "i" 1 6 17, +C4<0101>;
|
|
S_0x82acde580 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acde400;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b1546c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154700 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154740 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace28a0_0 .net/s *"_ivl_0", 15 0, L_0x82ad01cc0; 1 drivers
|
|
v0x82ace2940_0 .net/s *"_ivl_2", 15 0, L_0x82ad01d60; 1 drivers
|
|
v0x82ace29e0_0 .net *"_ivl_7", 0 0, L_0x82b0f3340; 1 drivers
|
|
v0x82ace2a80_0 .net *"_ivl_9", 15 0, L_0x82b0f33e0; 1 drivers
|
|
L_0x82a854718 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace2b20_0 .net/s "acc_in", 31 0, L_0x82a854718; 1 drivers
|
|
v0x82ace2bc0_0 .net/s "acc_out", 31 0, L_0x82b0957c0; alias, 1 drivers
|
|
v0x82ace2c60_0 .net/s "product", 15 0, L_0x82ad01e00; 1 drivers
|
|
v0x82ace2d00_0 .net/s "product_ext", 31 0, L_0x82ad01ea0; 1 drivers
|
|
v0x82ace2da0_0 .net/s "w", 7 0, L_0x82b0f3520; 1 drivers
|
|
v0x82ace2e40_0 .net/s "x", 7 0, L_0x82b0f3480; 1 drivers
|
|
L_0x82ad01cc0 .extend/s 16, L_0x82b0f3480;
|
|
L_0x82ad01d60 .extend/s 16, L_0x82b0f3520;
|
|
L_0x82ad01e00 .arith/mult 16, L_0x82ad01cc0, L_0x82ad01d60;
|
|
L_0x82b0f3340 .part L_0x82ad01e00, 15, 1;
|
|
L_0x82b0f33e0 .repeat 16, 16, L_0x82b0f3340;
|
|
L_0x82ad01ea0 .concat [ 16 16 0 0], L_0x82ad01e00, L_0x82b0f33e0;
|
|
L_0x82b0957c0 .arith/sum 32, L_0x82a854718, L_0x82ad01ea0;
|
|
S_0x82acde700 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36b80 .param/l "i" 1 6 17, +C4<0110>;
|
|
S_0x82acde880 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acde700;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154780 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b1547c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154800 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace2ee0_0 .net/s *"_ivl_0", 15 0, L_0x82ad01f40; 1 drivers
|
|
v0x82ace2f80_0 .net/s *"_ivl_2", 15 0, L_0x82ad01fe0; 1 drivers
|
|
v0x82ace3020_0 .net *"_ivl_7", 0 0, L_0x82b0f35c0; 1 drivers
|
|
v0x82ace30c0_0 .net *"_ivl_9", 15 0, L_0x82b0f3660; 1 drivers
|
|
L_0x82a854760 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace3160_0 .net/s "acc_in", 31 0, L_0x82a854760; 1 drivers
|
|
v0x82ace3200_0 .net/s "acc_out", 31 0, L_0x82b095860; alias, 1 drivers
|
|
v0x82ace32a0_0 .net/s "product", 15 0, L_0x82ad02080; 1 drivers
|
|
v0x82ace3340_0 .net/s "product_ext", 31 0, L_0x82ad02120; 1 drivers
|
|
v0x82ace33e0_0 .net/s "w", 7 0, L_0x82b0f37a0; 1 drivers
|
|
v0x82ace3480_0 .net/s "x", 7 0, L_0x82b0f3700; 1 drivers
|
|
L_0x82ad01f40 .extend/s 16, L_0x82b0f3700;
|
|
L_0x82ad01fe0 .extend/s 16, L_0x82b0f37a0;
|
|
L_0x82ad02080 .arith/mult 16, L_0x82ad01f40, L_0x82ad01fe0;
|
|
L_0x82b0f35c0 .part L_0x82ad02080, 15, 1;
|
|
L_0x82b0f3660 .repeat 16, 16, L_0x82b0f35c0;
|
|
L_0x82ad02120 .concat [ 16 16 0 0], L_0x82ad02080, L_0x82b0f3660;
|
|
L_0x82b095860 .arith/sum 32, L_0x82a854760, L_0x82ad02120;
|
|
S_0x82acdea00 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0x82acdd380;
|
|
.timescale 0 0;
|
|
P_0x82ac36bc0 .param/l "i" 1 6 17, +C4<0111>;
|
|
S_0x82acdeb80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154840 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154880 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b1548c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace3520_0 .net/s *"_ivl_0", 15 0, L_0x82ad021c0; 1 drivers
|
|
v0x82ace35c0_0 .net/s *"_ivl_2", 15 0, L_0x82ad02260; 1 drivers
|
|
v0x82ace3660_0 .net *"_ivl_7", 0 0, L_0x82b0f3840; 1 drivers
|
|
v0x82ace3700_0 .net *"_ivl_9", 15 0, L_0x82b0f38e0; 1 drivers
|
|
L_0x82a8547a8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace37a0_0 .net/s "acc_in", 31 0, L_0x82a8547a8; 1 drivers
|
|
v0x82ace3840_0 .net/s "acc_out", 31 0, L_0x82b095900; alias, 1 drivers
|
|
v0x82ace38e0_0 .net/s "product", 15 0, L_0x82ad02300; 1 drivers
|
|
v0x82ace3980_0 .net/s "product_ext", 31 0, L_0x82ad023a0; 1 drivers
|
|
v0x82ace3a20_0 .net/s "w", 7 0, L_0x82b0f3a20; 1 drivers
|
|
v0x82ace3ac0_0 .net/s "x", 7 0, L_0x82b0f3980; 1 drivers
|
|
L_0x82ad021c0 .extend/s 16, L_0x82b0f3980;
|
|
L_0x82ad02260 .extend/s 16, L_0x82b0f3a20;
|
|
L_0x82ad02300 .arith/mult 16, L_0x82ad021c0, L_0x82ad02260;
|
|
L_0x82b0f3840 .part L_0x82ad02300, 15, 1;
|
|
L_0x82b0f38e0 .repeat 16, 16, L_0x82b0f3840;
|
|
L_0x82ad023a0 .concat [ 16 16 0 0], L_0x82ad02300, L_0x82b0f38e0;
|
|
L_0x82b095900 .arith/sum 32, L_0x82a8547a8, L_0x82ad023a0;
|
|
S_0x82acded00 .scope generate, "GEN_NEURON[2]" "GEN_NEURON[2]" 4 34, 4 34 0, S_0x104fb3720;
|
|
.timescale 0 0;
|
|
P_0x82ac36c40 .param/l "n" 1 4 34, +C4<010>;
|
|
S_0x82acdee80 .scope module, "u_neuron" "neuron_parallel" 4 41, 5 1 0, S_0x82acded00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 2048 "x_bus";
|
|
.port_info 4 /INPUT 2048 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x104fbf120 .param/l "ACC_WIDTH" 0 5 5, +C4<00000000000000000000000000100000>;
|
|
P_0x104fbf160 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fbf1a0 .param/l "GROUPS" 1 5 20, +C4<00000000000000000000000000100000>;
|
|
P_0x104fbf1e0 .param/l "GROUP_INDEX_WIDTH" 1 5 21, +C4<00000000000000000000000000000101>;
|
|
P_0x104fbf220 .param/l "N_INPUTS" 0 5 3, +C4<00000000000000000000000100000000>;
|
|
P_0x104fbf260 .param/l "PARALLEL" 0 5 4, +C4<00000000000000000000000000001000>;
|
|
v0x82acf4960_0 .net *"_ivl_0", 31 0, L_0x82ad024e0; 1 drivers
|
|
v0x82acf4a00_0 .net *"_ivl_11", 31 0, L_0x82ad02620; 1 drivers
|
|
v0x82acf4aa0_0 .net *"_ivl_14", 31 0, L_0x82ad026c0; 1 drivers
|
|
L_0x82a8548c8 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf4b40_0 .net *"_ivl_17", 26 0, L_0x82a8548c8; 1 drivers
|
|
L_0x82a854910 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf4be0_0 .net/2u *"_ivl_18", 31 0, L_0x82a854910; 1 drivers
|
|
v0x82acf4c80_0 .net *"_ivl_21", 31 0, L_0x82ad02760; 1 drivers
|
|
L_0x82a854958 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf4d20_0 .net/2u *"_ivl_22", 31 0, L_0x82a854958; 1 drivers
|
|
v0x82acf4dc0_0 .net *"_ivl_25", 31 0, L_0x82ad02800; 1 drivers
|
|
v0x82acf4e60_0 .net *"_ivl_29", 0 0, L_0x82b169400; 1 drivers
|
|
L_0x82a8547f0 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf4f00_0 .net *"_ivl_3", 26 0, L_0x82a8547f0; 1 drivers
|
|
v0x82acf4fa0_0 .net *"_ivl_31", 23 0, L_0x82b1694a0; 1 drivers
|
|
L_0x82a854838 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf5040_0 .net/2u *"_ivl_4", 31 0, L_0x82a854838; 1 drivers
|
|
v0x82acf50e0_0 .net *"_ivl_7", 31 0, L_0x82ad02580; 1 drivers
|
|
L_0x82a854880 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf5180_0 .net/2u *"_ivl_8", 31 0, L_0x82a854880; 1 drivers
|
|
v0x82acf5220_0 .var/s "acc", 31 0;
|
|
v0x82acf52c0_0 .net/s "acc_next", 31 0, L_0x82b095fe0; 1 drivers
|
|
v0x82acf5360_0 .net/s "bias", 7 0, L_0x82b1695e0; 1 drivers
|
|
v0x82acf5400_0 .net/s "bias_ext", 31 0, L_0x82ad03ca0; 1 drivers
|
|
v0x82acf54a0_0 .var "busy", 0 0;
|
|
v0x82acf5540_0 .net "clk", 0 0, v0x82acfeda0_0; alias, 1 drivers
|
|
v0x82acf55e0_0 .var "done", 0 0;
|
|
v0x82acf5680_0 .net/s "final_acc", 31 0, L_0x82b096080; 1 drivers
|
|
v0x82acf5720_0 .var "group_index", 4 0;
|
|
v0x82acf57c0_0 .net "rst", 0 0, v0x82acff0c0_0; alias, 1 drivers
|
|
v0x82acf5860_0 .net "start", 0 0, v0x82acff160_0; alias, 1 drivers
|
|
v0x82acf5900_0 .net/s "w_bus", 2047 0, L_0x82b169540; 1 drivers
|
|
v0x82acf59a0_0 .net/s "w_group", 63 0, L_0x82b0f3e80; 1 drivers
|
|
v0x82acf5a40_0 .net/s "x_bus", 2047 0, v0x82acff2a0_0; alias, 1 drivers
|
|
v0x82acf5ae0_0 .net/s "x_group", 63 0, L_0x82b0f3de0; 1 drivers
|
|
v0x82acf5b80_0 .var/s "y", 7 0;
|
|
L_0x82ad024e0 .concat [ 5 27 0 0], v0x82acf5720_0, L_0x82a8547f0;
|
|
L_0x82ad02580 .arith/mult 32, L_0x82ad024e0, L_0x82a854838;
|
|
L_0x82ad02620 .arith/mult 32, L_0x82ad02580, L_0x82a854880;
|
|
L_0x82b0f3de0 .part/v v0x82acff2a0_0, L_0x82ad02620, 64;
|
|
L_0x82ad026c0 .concat [ 5 27 0 0], v0x82acf5720_0, L_0x82a8548c8;
|
|
L_0x82ad02760 .arith/mult 32, L_0x82ad026c0, L_0x82a854910;
|
|
L_0x82ad02800 .arith/mult 32, L_0x82ad02760, L_0x82a854958;
|
|
L_0x82b0f3e80 .part/v L_0x82b169540, L_0x82ad02800, 64;
|
|
L_0x82b169400 .part L_0x82b1695e0, 7, 1;
|
|
L_0x82b1694a0 .repeat 24, 24, L_0x82b169400;
|
|
L_0x82ad03ca0 .concat [ 8 24 0 0], L_0x82b1695e0, L_0x82b1694a0;
|
|
L_0x82b096080 .arith/sum 32, L_0x82b095fe0, L_0x82ad03ca0;
|
|
S_0x82acdf000 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0x82acdee80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154900 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154940 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154980 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>;
|
|
v0x82acf4500_0 .net/s "acc_in", 31 0, v0x82acf5220_0; 1 drivers
|
|
v0x82acf45a0_0 .net/s "acc_out", 31 0, L_0x82b095fe0; alias, 1 drivers
|
|
v0x82acf4640_0 .var/i "j", 31 0;
|
|
v0x82acf46e0 .array "products", 7 0;
|
|
v0x82acf46e0_0 .net/s v0x82acf46e0 0, 31 0, L_0x82b095ae0; 1 drivers
|
|
v0x82acf46e0_1 .net/s v0x82acf46e0 1, 31 0, L_0x82b095b80; 1 drivers
|
|
v0x82acf46e0_2 .net/s v0x82acf46e0 2, 31 0, L_0x82b095c20; 1 drivers
|
|
v0x82acf46e0_3 .net/s v0x82acf46e0 3, 31 0, L_0x82b095cc0; 1 drivers
|
|
v0x82acf46e0_4 .net/s v0x82acf46e0 4, 31 0, L_0x82b095d60; 1 drivers
|
|
v0x82acf46e0_5 .net/s v0x82acf46e0 5, 31 0, L_0x82b095e00; 1 drivers
|
|
v0x82acf46e0_6 .net/s v0x82acf46e0 6, 31 0, L_0x82b095ea0; 1 drivers
|
|
v0x82acf46e0_7 .net/s v0x82acf46e0 7, 31 0, L_0x82b095f40; 1 drivers
|
|
v0x82acf4780_0 .var/s "sum", 31 0;
|
|
v0x82acf4820_0 .net/s "w_bus", 63 0, L_0x82b0f3e80; alias, 1 drivers
|
|
v0x82acf48c0_0 .net/s "x_bus", 63 0, L_0x82b0f3de0; alias, 1 drivers
|
|
E_0x82acd5a00/0 .event anyedge, v0x82acf4780_0, v0x82ace55e0_0, v0x82ace5c20_0, v0x82ace6260_0;
|
|
E_0x82acd5a00/1 .event anyedge, v0x82ace68a0_0, v0x82ace6ee0_0, v0x82ace7520_0, v0x82ace7b60_0;
|
|
E_0x82acd5a00/2 .event anyedge, v0x82acf41e0_0;
|
|
E_0x82acd5a00 .event/or E_0x82acd5a00/0, E_0x82acd5a00/1, E_0x82acd5a00/2;
|
|
L_0x82b1680a0 .part L_0x82b0f3de0, 0, 8;
|
|
L_0x82b168140 .part L_0x82b0f3e80, 0, 8;
|
|
L_0x82b168320 .part L_0x82b0f3de0, 8, 8;
|
|
L_0x82b1683c0 .part L_0x82b0f3e80, 8, 8;
|
|
L_0x82b1685a0 .part L_0x82b0f3de0, 16, 8;
|
|
L_0x82b168640 .part L_0x82b0f3e80, 16, 8;
|
|
L_0x82b168820 .part L_0x82b0f3de0, 24, 8;
|
|
L_0x82b1688c0 .part L_0x82b0f3e80, 24, 8;
|
|
L_0x82b168aa0 .part L_0x82b0f3de0, 32, 8;
|
|
L_0x82b168b40 .part L_0x82b0f3e80, 32, 8;
|
|
L_0x82b168d20 .part L_0x82b0f3de0, 40, 8;
|
|
L_0x82b168dc0 .part L_0x82b0f3e80, 40, 8;
|
|
L_0x82b168fa0 .part L_0x82b0f3de0, 48, 8;
|
|
L_0x82b169040 .part L_0x82b0f3e80, 48, 8;
|
|
L_0x82b169220 .part L_0x82b0f3de0, 56, 8;
|
|
L_0x82b1692c0 .part L_0x82b0f3e80, 56, 8;
|
|
L_0x82b095fe0 .arith/sum 32, v0x82acf5220_0, v0x82acf4780_0;
|
|
S_0x82acdf180 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36c80 .param/l "i" 1 6 17, +C4<00>;
|
|
S_0x82acdf300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdf180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b1549c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154a00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154a40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace52c0_0 .net/s *"_ivl_0", 15 0, L_0x82ad028a0; 1 drivers
|
|
v0x82ace5360_0 .net/s *"_ivl_2", 15 0, L_0x82ad02940; 1 drivers
|
|
v0x82ace5400_0 .net *"_ivl_7", 0 0, L_0x82b0f3f20; 1 drivers
|
|
v0x82ace54a0_0 .net *"_ivl_9", 15 0, L_0x82b168000; 1 drivers
|
|
L_0x82a8549a0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace5540_0 .net/s "acc_in", 31 0, L_0x82a8549a0; 1 drivers
|
|
v0x82ace55e0_0 .net/s "acc_out", 31 0, L_0x82b095ae0; alias, 1 drivers
|
|
v0x82ace5680_0 .net/s "product", 15 0, L_0x82ad029e0; 1 drivers
|
|
v0x82ace5720_0 .net/s "product_ext", 31 0, L_0x82ad02a80; 1 drivers
|
|
v0x82ace57c0_0 .net/s "w", 7 0, L_0x82b168140; 1 drivers
|
|
v0x82ace5860_0 .net/s "x", 7 0, L_0x82b1680a0; 1 drivers
|
|
L_0x82ad028a0 .extend/s 16, L_0x82b1680a0;
|
|
L_0x82ad02940 .extend/s 16, L_0x82b168140;
|
|
L_0x82ad029e0 .arith/mult 16, L_0x82ad028a0, L_0x82ad02940;
|
|
L_0x82b0f3f20 .part L_0x82ad029e0, 15, 1;
|
|
L_0x82b168000 .repeat 16, 16, L_0x82b0f3f20;
|
|
L_0x82ad02a80 .concat [ 16 16 0 0], L_0x82ad029e0, L_0x82b168000;
|
|
L_0x82b095ae0 .arith/sum 32, L_0x82a8549a0, L_0x82ad02a80;
|
|
S_0x82acdf480 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36cc0 .param/l "i" 1 6 17, +C4<01>;
|
|
S_0x82acdf600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdf480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154a80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154ac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154b00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace5900_0 .net/s *"_ivl_0", 15 0, L_0x82ad02b20; 1 drivers
|
|
v0x82ace59a0_0 .net/s *"_ivl_2", 15 0, L_0x82ad02bc0; 1 drivers
|
|
v0x82ace5a40_0 .net *"_ivl_7", 0 0, L_0x82b1681e0; 1 drivers
|
|
v0x82ace5ae0_0 .net *"_ivl_9", 15 0, L_0x82b168280; 1 drivers
|
|
L_0x82a8549e8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace5b80_0 .net/s "acc_in", 31 0, L_0x82a8549e8; 1 drivers
|
|
v0x82ace5c20_0 .net/s "acc_out", 31 0, L_0x82b095b80; alias, 1 drivers
|
|
v0x82ace5cc0_0 .net/s "product", 15 0, L_0x82ad02c60; 1 drivers
|
|
v0x82ace5d60_0 .net/s "product_ext", 31 0, L_0x82ad02d00; 1 drivers
|
|
v0x82ace5e00_0 .net/s "w", 7 0, L_0x82b1683c0; 1 drivers
|
|
v0x82ace5ea0_0 .net/s "x", 7 0, L_0x82b168320; 1 drivers
|
|
L_0x82ad02b20 .extend/s 16, L_0x82b168320;
|
|
L_0x82ad02bc0 .extend/s 16, L_0x82b1683c0;
|
|
L_0x82ad02c60 .arith/mult 16, L_0x82ad02b20, L_0x82ad02bc0;
|
|
L_0x82b1681e0 .part L_0x82ad02c60, 15, 1;
|
|
L_0x82b168280 .repeat 16, 16, L_0x82b1681e0;
|
|
L_0x82ad02d00 .concat [ 16 16 0 0], L_0x82ad02c60, L_0x82b168280;
|
|
L_0x82b095b80 .arith/sum 32, L_0x82a8549e8, L_0x82ad02d00;
|
|
S_0x82acdf780 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36d00 .param/l "i" 1 6 17, +C4<010>;
|
|
S_0x82acdf900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdf780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154b40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154b80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154bc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace5f40_0 .net/s *"_ivl_0", 15 0, L_0x82ad02da0; 1 drivers
|
|
v0x82ace5fe0_0 .net/s *"_ivl_2", 15 0, L_0x82ad02e40; 1 drivers
|
|
v0x82ace6080_0 .net *"_ivl_7", 0 0, L_0x82b168460; 1 drivers
|
|
v0x82ace6120_0 .net *"_ivl_9", 15 0, L_0x82b168500; 1 drivers
|
|
L_0x82a854a30 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace61c0_0 .net/s "acc_in", 31 0, L_0x82a854a30; 1 drivers
|
|
v0x82ace6260_0 .net/s "acc_out", 31 0, L_0x82b095c20; alias, 1 drivers
|
|
v0x82ace6300_0 .net/s "product", 15 0, L_0x82ad02ee0; 1 drivers
|
|
v0x82ace63a0_0 .net/s "product_ext", 31 0, L_0x82ad02f80; 1 drivers
|
|
v0x82ace6440_0 .net/s "w", 7 0, L_0x82b168640; 1 drivers
|
|
v0x82ace64e0_0 .net/s "x", 7 0, L_0x82b1685a0; 1 drivers
|
|
L_0x82ad02da0 .extend/s 16, L_0x82b1685a0;
|
|
L_0x82ad02e40 .extend/s 16, L_0x82b168640;
|
|
L_0x82ad02ee0 .arith/mult 16, L_0x82ad02da0, L_0x82ad02e40;
|
|
L_0x82b168460 .part L_0x82ad02ee0, 15, 1;
|
|
L_0x82b168500 .repeat 16, 16, L_0x82b168460;
|
|
L_0x82ad02f80 .concat [ 16 16 0 0], L_0x82ad02ee0, L_0x82b168500;
|
|
L_0x82b095c20 .arith/sum 32, L_0x82a854a30, L_0x82ad02f80;
|
|
S_0x82acdfa80 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36d40 .param/l "i" 1 6 17, +C4<011>;
|
|
S_0x82acdfc00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdfa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154c00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154c40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154c80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace6580_0 .net/s *"_ivl_0", 15 0, L_0x82ad03020; 1 drivers
|
|
v0x82ace6620_0 .net/s *"_ivl_2", 15 0, L_0x82ad030c0; 1 drivers
|
|
v0x82ace66c0_0 .net *"_ivl_7", 0 0, L_0x82b1686e0; 1 drivers
|
|
v0x82ace6760_0 .net *"_ivl_9", 15 0, L_0x82b168780; 1 drivers
|
|
L_0x82a854a78 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace6800_0 .net/s "acc_in", 31 0, L_0x82a854a78; 1 drivers
|
|
v0x82ace68a0_0 .net/s "acc_out", 31 0, L_0x82b095cc0; alias, 1 drivers
|
|
v0x82ace6940_0 .net/s "product", 15 0, L_0x82ad03160; 1 drivers
|
|
v0x82ace69e0_0 .net/s "product_ext", 31 0, L_0x82ad03200; 1 drivers
|
|
v0x82ace6a80_0 .net/s "w", 7 0, L_0x82b1688c0; 1 drivers
|
|
v0x82ace6b20_0 .net/s "x", 7 0, L_0x82b168820; 1 drivers
|
|
L_0x82ad03020 .extend/s 16, L_0x82b168820;
|
|
L_0x82ad030c0 .extend/s 16, L_0x82b1688c0;
|
|
L_0x82ad03160 .arith/mult 16, L_0x82ad03020, L_0x82ad030c0;
|
|
L_0x82b1686e0 .part L_0x82ad03160, 15, 1;
|
|
L_0x82b168780 .repeat 16, 16, L_0x82b1686e0;
|
|
L_0x82ad03200 .concat [ 16 16 0 0], L_0x82ad03160, L_0x82b168780;
|
|
L_0x82b095cc0 .arith/sum 32, L_0x82a854a78, L_0x82ad03200;
|
|
S_0x82acdfd80 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36dc0 .param/l "i" 1 6 17, +C4<0100>;
|
|
S_0x82ace8000 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acdfd80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154cc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154d00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154d40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace6bc0_0 .net/s *"_ivl_0", 15 0, L_0x82ad032a0; 1 drivers
|
|
v0x82ace6c60_0 .net/s *"_ivl_2", 15 0, L_0x82ad03340; 1 drivers
|
|
v0x82ace6d00_0 .net *"_ivl_7", 0 0, L_0x82b168960; 1 drivers
|
|
v0x82ace6da0_0 .net *"_ivl_9", 15 0, L_0x82b168a00; 1 drivers
|
|
L_0x82a854ac0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace6e40_0 .net/s "acc_in", 31 0, L_0x82a854ac0; 1 drivers
|
|
v0x82ace6ee0_0 .net/s "acc_out", 31 0, L_0x82b095d60; alias, 1 drivers
|
|
v0x82ace6f80_0 .net/s "product", 15 0, L_0x82ad033e0; 1 drivers
|
|
v0x82ace7020_0 .net/s "product_ext", 31 0, L_0x82ad03480; 1 drivers
|
|
v0x82ace70c0_0 .net/s "w", 7 0, L_0x82b168b40; 1 drivers
|
|
v0x82ace7160_0 .net/s "x", 7 0, L_0x82b168aa0; 1 drivers
|
|
L_0x82ad032a0 .extend/s 16, L_0x82b168aa0;
|
|
L_0x82ad03340 .extend/s 16, L_0x82b168b40;
|
|
L_0x82ad033e0 .arith/mult 16, L_0x82ad032a0, L_0x82ad03340;
|
|
L_0x82b168960 .part L_0x82ad033e0, 15, 1;
|
|
L_0x82b168a00 .repeat 16, 16, L_0x82b168960;
|
|
L_0x82ad03480 .concat [ 16 16 0 0], L_0x82ad033e0, L_0x82b168a00;
|
|
L_0x82b095d60 .arith/sum 32, L_0x82a854ac0, L_0x82ad03480;
|
|
S_0x82ace8180 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36e00 .param/l "i" 1 6 17, +C4<0101>;
|
|
S_0x82ace8300 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace8180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154d80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154dc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154e00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace7200_0 .net/s *"_ivl_0", 15 0, L_0x82ad03520; 1 drivers
|
|
v0x82ace72a0_0 .net/s *"_ivl_2", 15 0, L_0x82ad035c0; 1 drivers
|
|
v0x82ace7340_0 .net *"_ivl_7", 0 0, L_0x82b168be0; 1 drivers
|
|
v0x82ace73e0_0 .net *"_ivl_9", 15 0, L_0x82b168c80; 1 drivers
|
|
L_0x82a854b08 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace7480_0 .net/s "acc_in", 31 0, L_0x82a854b08; 1 drivers
|
|
v0x82ace7520_0 .net/s "acc_out", 31 0, L_0x82b095e00; alias, 1 drivers
|
|
v0x82ace75c0_0 .net/s "product", 15 0, L_0x82ad03660; 1 drivers
|
|
v0x82ace7660_0 .net/s "product_ext", 31 0, L_0x82ad03700; 1 drivers
|
|
v0x82ace7700_0 .net/s "w", 7 0, L_0x82b168dc0; 1 drivers
|
|
v0x82ace77a0_0 .net/s "x", 7 0, L_0x82b168d20; 1 drivers
|
|
L_0x82ad03520 .extend/s 16, L_0x82b168d20;
|
|
L_0x82ad035c0 .extend/s 16, L_0x82b168dc0;
|
|
L_0x82ad03660 .arith/mult 16, L_0x82ad03520, L_0x82ad035c0;
|
|
L_0x82b168be0 .part L_0x82ad03660, 15, 1;
|
|
L_0x82b168c80 .repeat 16, 16, L_0x82b168be0;
|
|
L_0x82ad03700 .concat [ 16 16 0 0], L_0x82ad03660, L_0x82b168c80;
|
|
L_0x82b095e00 .arith/sum 32, L_0x82a854b08, L_0x82ad03700;
|
|
S_0x82ace8480 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36e40 .param/l "i" 1 6 17, +C4<0110>;
|
|
S_0x82ace8600 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace8480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154e40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154e80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154ec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace7840_0 .net/s *"_ivl_0", 15 0, L_0x82ad037a0; 1 drivers
|
|
v0x82ace78e0_0 .net/s *"_ivl_2", 15 0, L_0x82ad03840; 1 drivers
|
|
v0x82ace7980_0 .net *"_ivl_7", 0 0, L_0x82b168e60; 1 drivers
|
|
v0x82ace7a20_0 .net *"_ivl_9", 15 0, L_0x82b168f00; 1 drivers
|
|
L_0x82a854b50 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82ace7ac0_0 .net/s "acc_in", 31 0, L_0x82a854b50; 1 drivers
|
|
v0x82ace7b60_0 .net/s "acc_out", 31 0, L_0x82b095ea0; alias, 1 drivers
|
|
v0x82ace7c00_0 .net/s "product", 15 0, L_0x82ad038e0; 1 drivers
|
|
v0x82ace7ca0_0 .net/s "product_ext", 31 0, L_0x82ad03980; 1 drivers
|
|
v0x82ace7d40_0 .net/s "w", 7 0, L_0x82b169040; 1 drivers
|
|
v0x82ace7de0_0 .net/s "x", 7 0, L_0x82b168fa0; 1 drivers
|
|
L_0x82ad037a0 .extend/s 16, L_0x82b168fa0;
|
|
L_0x82ad03840 .extend/s 16, L_0x82b169040;
|
|
L_0x82ad038e0 .arith/mult 16, L_0x82ad037a0, L_0x82ad03840;
|
|
L_0x82b168e60 .part L_0x82ad038e0, 15, 1;
|
|
L_0x82b168f00 .repeat 16, 16, L_0x82b168e60;
|
|
L_0x82ad03980 .concat [ 16 16 0 0], L_0x82ad038e0, L_0x82b168f00;
|
|
L_0x82b095ea0 .arith/sum 32, L_0x82a854b50, L_0x82ad03980;
|
|
S_0x82ace8780 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0x82acdf000;
|
|
.timescale 0 0;
|
|
P_0x82ac36e80 .param/l "i" 1 6 17, +C4<0111>;
|
|
S_0x82ace8900 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace8780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154f00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b154f40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b154f80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82ace7e80_0 .net/s *"_ivl_0", 15 0, L_0x82ad03a20; 1 drivers
|
|
v0x82ace7f20_0 .net/s *"_ivl_2", 15 0, L_0x82ad03ac0; 1 drivers
|
|
v0x82acf4000_0 .net *"_ivl_7", 0 0, L_0x82b1690e0; 1 drivers
|
|
v0x82acf40a0_0 .net *"_ivl_9", 15 0, L_0x82b169180; 1 drivers
|
|
L_0x82a854b98 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf4140_0 .net/s "acc_in", 31 0, L_0x82a854b98; 1 drivers
|
|
v0x82acf41e0_0 .net/s "acc_out", 31 0, L_0x82b095f40; alias, 1 drivers
|
|
v0x82acf4280_0 .net/s "product", 15 0, L_0x82ad03b60; 1 drivers
|
|
v0x82acf4320_0 .net/s "product_ext", 31 0, L_0x82ad03c00; 1 drivers
|
|
v0x82acf43c0_0 .net/s "w", 7 0, L_0x82b1692c0; 1 drivers
|
|
v0x82acf4460_0 .net/s "x", 7 0, L_0x82b169220; 1 drivers
|
|
L_0x82ad03a20 .extend/s 16, L_0x82b169220;
|
|
L_0x82ad03ac0 .extend/s 16, L_0x82b1692c0;
|
|
L_0x82ad03b60 .arith/mult 16, L_0x82ad03a20, L_0x82ad03ac0;
|
|
L_0x82b1690e0 .part L_0x82ad03b60, 15, 1;
|
|
L_0x82b169180 .repeat 16, 16, L_0x82b1690e0;
|
|
L_0x82ad03c00 .concat [ 16 16 0 0], L_0x82ad03b60, L_0x82b169180;
|
|
L_0x82b095f40 .arith/sum 32, L_0x82a854b98, L_0x82ad03c00;
|
|
S_0x82ace8a80 .scope generate, "GEN_NEURON[3]" "GEN_NEURON[3]" 4 34, 4 34 0, S_0x104fb3720;
|
|
.timescale 0 0;
|
|
P_0x82ac36f00 .param/l "n" 1 4 34, +C4<011>;
|
|
S_0x82ace8c00 .scope module, "u_neuron" "neuron_parallel" 4 41, 5 1 0, S_0x82ace8a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 2048 "x_bus";
|
|
.port_info 4 /INPUT 2048 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x104fc04a0 .param/l "ACC_WIDTH" 0 5 5, +C4<00000000000000000000000000100000>;
|
|
P_0x104fc04e0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000001000>;
|
|
P_0x104fc0520 .param/l "GROUPS" 1 5 20, +C4<00000000000000000000000000100000>;
|
|
P_0x104fc0560 .param/l "GROUP_INDEX_WIDTH" 1 5 21, +C4<00000000000000000000000000000101>;
|
|
P_0x104fc05a0 .param/l "N_INPUTS" 0 5 3, +C4<00000000000000000000000100000000>;
|
|
P_0x104fc05e0 .param/l "PARALLEL" 0 5 4, +C4<00000000000000000000000000001000>;
|
|
v0x82acfd2c0_0 .net *"_ivl_0", 31 0, L_0x82ad03d40; 1 drivers
|
|
v0x82acfd360_0 .net *"_ivl_11", 31 0, L_0x82ad03e80; 1 drivers
|
|
v0x82acfd400_0 .net *"_ivl_14", 31 0, L_0x82ad03f20; 1 drivers
|
|
L_0x82a854cb8 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfd4a0_0 .net *"_ivl_17", 26 0, L_0x82a854cb8; 1 drivers
|
|
L_0x82a854d00 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfd540_0 .net/2u *"_ivl_18", 31 0, L_0x82a854d00; 1 drivers
|
|
v0x82acfd5e0_0 .net *"_ivl_21", 31 0, L_0x82ad04000; 1 drivers
|
|
L_0x82a854d48 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfd680_0 .net/2u *"_ivl_22", 31 0, L_0x82a854d48; 1 drivers
|
|
v0x82acfd720_0 .net *"_ivl_25", 31 0, L_0x82ad040a0; 1 drivers
|
|
v0x82acfd7c0_0 .net *"_ivl_29", 0 0, L_0x82b16ac60; 1 drivers
|
|
L_0x82a854be0 .functor BUFT 1, C4<000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfd860_0 .net *"_ivl_3", 26 0, L_0x82a854be0; 1 drivers
|
|
v0x82acfd900_0 .net *"_ivl_31", 23 0, L_0x82b16ad00; 1 drivers
|
|
L_0x82a854c28 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfd9a0_0 .net/2u *"_ivl_4", 31 0, L_0x82a854c28; 1 drivers
|
|
v0x82acfda40_0 .net *"_ivl_7", 31 0, L_0x82ad03de0; 1 drivers
|
|
L_0x82a854c70 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfdae0_0 .net/2u *"_ivl_8", 31 0, L_0x82a854c70; 1 drivers
|
|
v0x82acfdb80_0 .var/s "acc", 31 0;
|
|
v0x82acfdc20_0 .net/s "acc_next", 31 0, L_0x82b096620; 1 drivers
|
|
v0x82acfdcc0_0 .net/s "bias", 7 0, L_0x82b16ae40; 1 drivers
|
|
v0x82acfdd60_0 .net/s "bias_ext", 31 0, L_0x82ad05540; 1 drivers
|
|
v0x82acfde00_0 .var "busy", 0 0;
|
|
v0x82acfdea0_0 .net "clk", 0 0, v0x82acfeda0_0; alias, 1 drivers
|
|
v0x82acfdf40_0 .var "done", 0 0;
|
|
v0x82acfdfe0_0 .net/s "final_acc", 31 0, L_0x82b0966c0; 1 drivers
|
|
v0x82acfe080_0 .var "group_index", 4 0;
|
|
v0x82acfe120_0 .net "rst", 0 0, v0x82acff0c0_0; alias, 1 drivers
|
|
v0x82acfe1c0_0 .net "start", 0 0, v0x82acff160_0; alias, 1 drivers
|
|
v0x82acfe260_0 .net/s "w_bus", 2047 0, L_0x82b16ada0; 1 drivers
|
|
v0x82acfe300_0 .net/s "w_group", 63 0, L_0x82b169720; 1 drivers
|
|
v0x82acfe3a0_0 .net/s "x_bus", 2047 0, v0x82acff2a0_0; alias, 1 drivers
|
|
v0x82acfe440_0 .net/s "x_group", 63 0, L_0x82b169680; 1 drivers
|
|
v0x82acfe4e0_0 .var/s "y", 7 0;
|
|
L_0x82ad03d40 .concat [ 5 27 0 0], v0x82acfe080_0, L_0x82a854be0;
|
|
L_0x82ad03de0 .arith/mult 32, L_0x82ad03d40, L_0x82a854c28;
|
|
L_0x82ad03e80 .arith/mult 32, L_0x82ad03de0, L_0x82a854c70;
|
|
L_0x82b169680 .part/v v0x82acff2a0_0, L_0x82ad03e80, 64;
|
|
L_0x82ad03f20 .concat [ 5 27 0 0], v0x82acfe080_0, L_0x82a854cb8;
|
|
L_0x82ad04000 .arith/mult 32, L_0x82ad03f20, L_0x82a854d00;
|
|
L_0x82ad040a0 .arith/mult 32, L_0x82ad04000, L_0x82a854d48;
|
|
L_0x82b169720 .part/v L_0x82b16ada0, L_0x82ad040a0, 64;
|
|
L_0x82b16ac60 .part L_0x82b16ae40, 7, 1;
|
|
L_0x82b16ad00 .repeat 24, 24, L_0x82b16ac60;
|
|
L_0x82ad05540 .concat [ 8 24 0 0], L_0x82b16ae40, L_0x82b16ad00;
|
|
L_0x82b0966c0 .arith/sum 32, L_0x82b096620, L_0x82ad05540;
|
|
S_0x82ace8d80 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0x82ace8c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b154fc0 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155000 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155040 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>;
|
|
v0x82acfce60_0 .net/s "acc_in", 31 0, v0x82acfdb80_0; 1 drivers
|
|
v0x82acfcf00_0 .net/s "acc_out", 31 0, L_0x82b096620; alias, 1 drivers
|
|
v0x82acfcfa0_0 .var/i "j", 31 0;
|
|
v0x82acfd040 .array "products", 7 0;
|
|
v0x82acfd040_0 .net/s v0x82acfd040 0, 31 0, L_0x82b096120; 1 drivers
|
|
v0x82acfd040_1 .net/s v0x82acfd040 1, 31 0, L_0x82b0961c0; 1 drivers
|
|
v0x82acfd040_2 .net/s v0x82acfd040 2, 31 0, L_0x82b096260; 1 drivers
|
|
v0x82acfd040_3 .net/s v0x82acfd040 3, 31 0, L_0x82b096300; 1 drivers
|
|
v0x82acfd040_4 .net/s v0x82acfd040 4, 31 0, L_0x82b0963a0; 1 drivers
|
|
v0x82acfd040_5 .net/s v0x82acfd040 5, 31 0, L_0x82b096440; 1 drivers
|
|
v0x82acfd040_6 .net/s v0x82acfd040 6, 31 0, L_0x82b0964e0; 1 drivers
|
|
v0x82acfd040_7 .net/s v0x82acfd040 7, 31 0, L_0x82b096580; 1 drivers
|
|
v0x82acfd0e0_0 .var/s "sum", 31 0;
|
|
v0x82acfd180_0 .net/s "w_bus", 63 0, L_0x82b169720; alias, 1 drivers
|
|
v0x82acfd220_0 .net/s "x_bus", 63 0, L_0x82b169680; alias, 1 drivers
|
|
E_0x82acd5c40/0 .event anyedge, v0x82acfd0e0_0, v0x82acf5f40_0, v0x82acf6580_0, v0x82acf6bc0_0;
|
|
E_0x82acd5c40/1 .event anyedge, v0x82acf7200_0, v0x82acf7840_0, v0x82acf7e80_0, v0x82acfc500_0;
|
|
E_0x82acd5c40/2 .event anyedge, v0x82acfcb40_0;
|
|
E_0x82acd5c40 .event/or E_0x82acd5c40/0, E_0x82acd5c40/1, E_0x82acd5c40/2;
|
|
L_0x82b169900 .part L_0x82b169680, 0, 8;
|
|
L_0x82b1699a0 .part L_0x82b169720, 0, 8;
|
|
L_0x82b169b80 .part L_0x82b169680, 8, 8;
|
|
L_0x82b169c20 .part L_0x82b169720, 8, 8;
|
|
L_0x82b169e00 .part L_0x82b169680, 16, 8;
|
|
L_0x82b169ea0 .part L_0x82b169720, 16, 8;
|
|
L_0x82b16a080 .part L_0x82b169680, 24, 8;
|
|
L_0x82b16a120 .part L_0x82b169720, 24, 8;
|
|
L_0x82b16a300 .part L_0x82b169680, 32, 8;
|
|
L_0x82b16a3a0 .part L_0x82b169720, 32, 8;
|
|
L_0x82b16a580 .part L_0x82b169680, 40, 8;
|
|
L_0x82b16a620 .part L_0x82b169720, 40, 8;
|
|
L_0x82b16a800 .part L_0x82b169680, 48, 8;
|
|
L_0x82b16a8a0 .part L_0x82b169720, 48, 8;
|
|
L_0x82b16aa80 .part L_0x82b169680, 56, 8;
|
|
L_0x82b16ab20 .part L_0x82b169720, 56, 8;
|
|
L_0x82b096620 .arith/sum 32, v0x82acfdb80_0, v0x82acfd0e0_0;
|
|
S_0x82ace8f00 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac36f40 .param/l "i" 1 6 17, +C4<00>;
|
|
S_0x82ace9080 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace8f00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b155080 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b1550c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155100 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acf5c20_0 .net/s *"_ivl_0", 15 0, L_0x82ad04140; 1 drivers
|
|
v0x82acf5cc0_0 .net/s *"_ivl_2", 15 0, L_0x82ad041e0; 1 drivers
|
|
v0x82acf5d60_0 .net *"_ivl_7", 0 0, L_0x82b1697c0; 1 drivers
|
|
v0x82acf5e00_0 .net *"_ivl_9", 15 0, L_0x82b169860; 1 drivers
|
|
L_0x82a854d90 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf5ea0_0 .net/s "acc_in", 31 0, L_0x82a854d90; 1 drivers
|
|
v0x82acf5f40_0 .net/s "acc_out", 31 0, L_0x82b096120; alias, 1 drivers
|
|
v0x82acf5fe0_0 .net/s "product", 15 0, L_0x82ad04280; 1 drivers
|
|
v0x82acf6080_0 .net/s "product_ext", 31 0, L_0x82ad04320; 1 drivers
|
|
v0x82acf6120_0 .net/s "w", 7 0, L_0x82b1699a0; 1 drivers
|
|
v0x82acf61c0_0 .net/s "x", 7 0, L_0x82b169900; 1 drivers
|
|
L_0x82ad04140 .extend/s 16, L_0x82b169900;
|
|
L_0x82ad041e0 .extend/s 16, L_0x82b1699a0;
|
|
L_0x82ad04280 .arith/mult 16, L_0x82ad04140, L_0x82ad041e0;
|
|
L_0x82b1697c0 .part L_0x82ad04280, 15, 1;
|
|
L_0x82b169860 .repeat 16, 16, L_0x82b1697c0;
|
|
L_0x82ad04320 .concat [ 16 16 0 0], L_0x82ad04280, L_0x82b169860;
|
|
L_0x82b096120 .arith/sum 32, L_0x82a854d90, L_0x82ad04320;
|
|
S_0x82ace9200 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac36f80 .param/l "i" 1 6 17, +C4<01>;
|
|
S_0x82ace9380 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace9200;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b155140 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155180 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b1551c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acf6260_0 .net/s *"_ivl_0", 15 0, L_0x82ad043c0; 1 drivers
|
|
v0x82acf6300_0 .net/s *"_ivl_2", 15 0, L_0x82ad04460; 1 drivers
|
|
v0x82acf63a0_0 .net *"_ivl_7", 0 0, L_0x82b169a40; 1 drivers
|
|
v0x82acf6440_0 .net *"_ivl_9", 15 0, L_0x82b169ae0; 1 drivers
|
|
L_0x82a854dd8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf64e0_0 .net/s "acc_in", 31 0, L_0x82a854dd8; 1 drivers
|
|
v0x82acf6580_0 .net/s "acc_out", 31 0, L_0x82b0961c0; alias, 1 drivers
|
|
v0x82acf6620_0 .net/s "product", 15 0, L_0x82ad04500; 1 drivers
|
|
v0x82acf66c0_0 .net/s "product_ext", 31 0, L_0x82ad045a0; 1 drivers
|
|
v0x82acf6760_0 .net/s "w", 7 0, L_0x82b169c20; 1 drivers
|
|
v0x82acf6800_0 .net/s "x", 7 0, L_0x82b169b80; 1 drivers
|
|
L_0x82ad043c0 .extend/s 16, L_0x82b169b80;
|
|
L_0x82ad04460 .extend/s 16, L_0x82b169c20;
|
|
L_0x82ad04500 .arith/mult 16, L_0x82ad043c0, L_0x82ad04460;
|
|
L_0x82b169a40 .part L_0x82ad04500, 15, 1;
|
|
L_0x82b169ae0 .repeat 16, 16, L_0x82b169a40;
|
|
L_0x82ad045a0 .concat [ 16 16 0 0], L_0x82ad04500, L_0x82b169ae0;
|
|
L_0x82b0961c0 .arith/sum 32, L_0x82a854dd8, L_0x82ad045a0;
|
|
S_0x82ace9500 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac36fc0 .param/l "i" 1 6 17, +C4<010>;
|
|
S_0x82ace9680 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace9500;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b155200 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155240 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155280 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acf68a0_0 .net/s *"_ivl_0", 15 0, L_0x82ad04640; 1 drivers
|
|
v0x82acf6940_0 .net/s *"_ivl_2", 15 0, L_0x82ad046e0; 1 drivers
|
|
v0x82acf69e0_0 .net *"_ivl_7", 0 0, L_0x82b169cc0; 1 drivers
|
|
v0x82acf6a80_0 .net *"_ivl_9", 15 0, L_0x82b169d60; 1 drivers
|
|
L_0x82a854e20 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf6b20_0 .net/s "acc_in", 31 0, L_0x82a854e20; 1 drivers
|
|
v0x82acf6bc0_0 .net/s "acc_out", 31 0, L_0x82b096260; alias, 1 drivers
|
|
v0x82acf6c60_0 .net/s "product", 15 0, L_0x82ad04780; 1 drivers
|
|
v0x82acf6d00_0 .net/s "product_ext", 31 0, L_0x82ad04820; 1 drivers
|
|
v0x82acf6da0_0 .net/s "w", 7 0, L_0x82b169ea0; 1 drivers
|
|
v0x82acf6e40_0 .net/s "x", 7 0, L_0x82b169e00; 1 drivers
|
|
L_0x82ad04640 .extend/s 16, L_0x82b169e00;
|
|
L_0x82ad046e0 .extend/s 16, L_0x82b169ea0;
|
|
L_0x82ad04780 .arith/mult 16, L_0x82ad04640, L_0x82ad046e0;
|
|
L_0x82b169cc0 .part L_0x82ad04780, 15, 1;
|
|
L_0x82b169d60 .repeat 16, 16, L_0x82b169cc0;
|
|
L_0x82ad04820 .concat [ 16 16 0 0], L_0x82ad04780, L_0x82b169d60;
|
|
L_0x82b096260 .arith/sum 32, L_0x82a854e20, L_0x82ad04820;
|
|
S_0x82ace9800 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac37000 .param/l "i" 1 6 17, +C4<011>;
|
|
S_0x82ace9980 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace9800;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b1552c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155300 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155340 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acf6ee0_0 .net/s *"_ivl_0", 15 0, L_0x82ad048c0; 1 drivers
|
|
v0x82acf6f80_0 .net/s *"_ivl_2", 15 0, L_0x82ad04960; 1 drivers
|
|
v0x82acf7020_0 .net *"_ivl_7", 0 0, L_0x82b169f40; 1 drivers
|
|
v0x82acf70c0_0 .net *"_ivl_9", 15 0, L_0x82b169fe0; 1 drivers
|
|
L_0x82a854e68 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf7160_0 .net/s "acc_in", 31 0, L_0x82a854e68; 1 drivers
|
|
v0x82acf7200_0 .net/s "acc_out", 31 0, L_0x82b096300; alias, 1 drivers
|
|
v0x82acf72a0_0 .net/s "product", 15 0, L_0x82ad04a00; 1 drivers
|
|
v0x82acf7340_0 .net/s "product_ext", 31 0, L_0x82ad04aa0; 1 drivers
|
|
v0x82acf73e0_0 .net/s "w", 7 0, L_0x82b16a120; 1 drivers
|
|
v0x82acf7480_0 .net/s "x", 7 0, L_0x82b16a080; 1 drivers
|
|
L_0x82ad048c0 .extend/s 16, L_0x82b16a080;
|
|
L_0x82ad04960 .extend/s 16, L_0x82b16a120;
|
|
L_0x82ad04a00 .arith/mult 16, L_0x82ad048c0, L_0x82ad04960;
|
|
L_0x82b169f40 .part L_0x82ad04a00, 15, 1;
|
|
L_0x82b169fe0 .repeat 16, 16, L_0x82b169f40;
|
|
L_0x82ad04aa0 .concat [ 16 16 0 0], L_0x82ad04a00, L_0x82b169fe0;
|
|
L_0x82b096300 .arith/sum 32, L_0x82a854e68, L_0x82ad04aa0;
|
|
S_0x82ace9b00 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac37080 .param/l "i" 1 6 17, +C4<0100>;
|
|
S_0x82ace9c80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace9b00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b155380 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b1553c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155400 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acf7520_0 .net/s *"_ivl_0", 15 0, L_0x82ad04b40; 1 drivers
|
|
v0x82acf75c0_0 .net/s *"_ivl_2", 15 0, L_0x82ad04be0; 1 drivers
|
|
v0x82acf7660_0 .net *"_ivl_7", 0 0, L_0x82b16a1c0; 1 drivers
|
|
v0x82acf7700_0 .net *"_ivl_9", 15 0, L_0x82b16a260; 1 drivers
|
|
L_0x82a854eb0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf77a0_0 .net/s "acc_in", 31 0, L_0x82a854eb0; 1 drivers
|
|
v0x82acf7840_0 .net/s "acc_out", 31 0, L_0x82b0963a0; alias, 1 drivers
|
|
v0x82acf78e0_0 .net/s "product", 15 0, L_0x82ad04c80; 1 drivers
|
|
v0x82acf7980_0 .net/s "product_ext", 31 0, L_0x82ad04d20; 1 drivers
|
|
v0x82acf7a20_0 .net/s "w", 7 0, L_0x82b16a3a0; 1 drivers
|
|
v0x82acf7ac0_0 .net/s "x", 7 0, L_0x82b16a300; 1 drivers
|
|
L_0x82ad04b40 .extend/s 16, L_0x82b16a300;
|
|
L_0x82ad04be0 .extend/s 16, L_0x82b16a3a0;
|
|
L_0x82ad04c80 .arith/mult 16, L_0x82ad04b40, L_0x82ad04be0;
|
|
L_0x82b16a1c0 .part L_0x82ad04c80, 15, 1;
|
|
L_0x82b16a260 .repeat 16, 16, L_0x82b16a1c0;
|
|
L_0x82ad04d20 .concat [ 16 16 0 0], L_0x82ad04c80, L_0x82b16a260;
|
|
L_0x82b0963a0 .arith/sum 32, L_0x82a854eb0, L_0x82ad04d20;
|
|
S_0x82ace9e00 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac370c0 .param/l "i" 1 6 17, +C4<0101>;
|
|
S_0x82ace9f80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82ace9e00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b155440 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155480 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b1554c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acf7b60_0 .net/s *"_ivl_0", 15 0, L_0x82ad04dc0; 1 drivers
|
|
v0x82acf7c00_0 .net/s *"_ivl_2", 15 0, L_0x82ad04e60; 1 drivers
|
|
v0x82acf7ca0_0 .net *"_ivl_7", 0 0, L_0x82b16a440; 1 drivers
|
|
v0x82acf7d40_0 .net *"_ivl_9", 15 0, L_0x82b16a4e0; 1 drivers
|
|
L_0x82a854ef8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acf7de0_0 .net/s "acc_in", 31 0, L_0x82a854ef8; 1 drivers
|
|
v0x82acf7e80_0 .net/s "acc_out", 31 0, L_0x82b096440; alias, 1 drivers
|
|
v0x82acf7f20_0 .net/s "product", 15 0, L_0x82ad04f00; 1 drivers
|
|
v0x82acfc000_0 .net/s "product_ext", 31 0, L_0x82ad04fa0; 1 drivers
|
|
v0x82acfc0a0_0 .net/s "w", 7 0, L_0x82b16a620; 1 drivers
|
|
v0x82acfc140_0 .net/s "x", 7 0, L_0x82b16a580; 1 drivers
|
|
L_0x82ad04dc0 .extend/s 16, L_0x82b16a580;
|
|
L_0x82ad04e60 .extend/s 16, L_0x82b16a620;
|
|
L_0x82ad04f00 .arith/mult 16, L_0x82ad04dc0, L_0x82ad04e60;
|
|
L_0x82b16a440 .part L_0x82ad04f00, 15, 1;
|
|
L_0x82b16a4e0 .repeat 16, 16, L_0x82b16a440;
|
|
L_0x82ad04fa0 .concat [ 16 16 0 0], L_0x82ad04f00, L_0x82b16a4e0;
|
|
L_0x82b096440 .arith/sum 32, L_0x82a854ef8, L_0x82ad04fa0;
|
|
S_0x82acea100 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac37100 .param/l "i" 1 6 17, +C4<0110>;
|
|
S_0x82acea280 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acea100;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b155500 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155540 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155580 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acfc1e0_0 .net/s *"_ivl_0", 15 0, L_0x82ad05040; 1 drivers
|
|
v0x82acfc280_0 .net/s *"_ivl_2", 15 0, L_0x82ad050e0; 1 drivers
|
|
v0x82acfc320_0 .net *"_ivl_7", 0 0, L_0x82b16a6c0; 1 drivers
|
|
v0x82acfc3c0_0 .net *"_ivl_9", 15 0, L_0x82b16a760; 1 drivers
|
|
L_0x82a854f40 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfc460_0 .net/s "acc_in", 31 0, L_0x82a854f40; 1 drivers
|
|
v0x82acfc500_0 .net/s "acc_out", 31 0, L_0x82b0964e0; alias, 1 drivers
|
|
v0x82acfc5a0_0 .net/s "product", 15 0, L_0x82ad05180; 1 drivers
|
|
v0x82acfc640_0 .net/s "product_ext", 31 0, L_0x82ad05220; 1 drivers
|
|
v0x82acfc6e0_0 .net/s "w", 7 0, L_0x82b16a8a0; 1 drivers
|
|
v0x82acfc780_0 .net/s "x", 7 0, L_0x82b16a800; 1 drivers
|
|
L_0x82ad05040 .extend/s 16, L_0x82b16a800;
|
|
L_0x82ad050e0 .extend/s 16, L_0x82b16a8a0;
|
|
L_0x82ad05180 .arith/mult 16, L_0x82ad05040, L_0x82ad050e0;
|
|
L_0x82b16a6c0 .part L_0x82ad05180, 15, 1;
|
|
L_0x82b16a760 .repeat 16, 16, L_0x82b16a6c0;
|
|
L_0x82ad05220 .concat [ 16 16 0 0], L_0x82ad05180, L_0x82b16a760;
|
|
L_0x82b0964e0 .arith/sum 32, L_0x82a854f40, L_0x82ad05220;
|
|
S_0x82acea400 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0x82ace8d80;
|
|
.timescale 0 0;
|
|
P_0x82ac37140 .param/l "i" 1 6 17, +C4<0111>;
|
|
S_0x82acea580 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x82acea400;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x82b1555c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x82b155600 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x82b155640 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x82acfc820_0 .net/s *"_ivl_0", 15 0, L_0x82ad052c0; 1 drivers
|
|
v0x82acfc8c0_0 .net/s *"_ivl_2", 15 0, L_0x82ad05360; 1 drivers
|
|
v0x82acfc960_0 .net *"_ivl_7", 0 0, L_0x82b16a940; 1 drivers
|
|
v0x82acfca00_0 .net *"_ivl_9", 15 0, L_0x82b16a9e0; 1 drivers
|
|
L_0x82a854f88 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x82acfcaa0_0 .net/s "acc_in", 31 0, L_0x82a854f88; 1 drivers
|
|
v0x82acfcb40_0 .net/s "acc_out", 31 0, L_0x82b096580; alias, 1 drivers
|
|
v0x82acfcbe0_0 .net/s "product", 15 0, L_0x82ad05400; 1 drivers
|
|
v0x82acfcc80_0 .net/s "product_ext", 31 0, L_0x82ad054a0; 1 drivers
|
|
v0x82acfcd20_0 .net/s "w", 7 0, L_0x82b16ab20; 1 drivers
|
|
v0x82acfcdc0_0 .net/s "x", 7 0, L_0x82b16aa80; 1 drivers
|
|
L_0x82ad052c0 .extend/s 16, L_0x82b16aa80;
|
|
L_0x82ad05360 .extend/s 16, L_0x82b16ab20;
|
|
L_0x82ad05400 .arith/mult 16, L_0x82ad052c0, L_0x82ad05360;
|
|
L_0x82b16a940 .part L_0x82ad05400, 15, 1;
|
|
L_0x82b16a9e0 .repeat 16, 16, L_0x82b16a940;
|
|
L_0x82ad054a0 .concat [ 16 16 0 0], L_0x82ad05400, L_0x82b16a9e0;
|
|
L_0x82b096580 .arith/sum 32, L_0x82a854f88, L_0x82ad054a0;
|
|
S_0x82acea700 .scope task, "run_layer" "run_layer" 3 55, 3 55 0, S_0x104fb35a0;
|
|
.timescale -9 -12;
|
|
E_0x82acd5e80 .event anyedge, v0x82acfe760_0;
|
|
TD_tb.run_layer ;
|
|
%wait E_0x82acd5540;
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x82acff160_0, 0, 1;
|
|
%wait E_0x82acd5540;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x82acff160_0, 0, 1;
|
|
T_0.0 ;
|
|
%load/vec4 v0x82acfee40_0;
|
|
%pad/u 32;
|
|
%pushi/vec4 1, 0, 32;
|
|
%cmp/e;
|
|
%flag_get/vec4 4;
|
|
%cmpi/ne 1, 0, 1;
|
|
%jmp/0xz T_0.1, 6;
|
|
%wait E_0x82acd5e80;
|
|
%jmp T_0.0;
|
|
T_0.1 ;
|
|
%wait E_0x82acd5540;
|
|
%end;
|
|
.scope S_0x104fa8d70;
|
|
T_1 ;
|
|
%wait E_0x82acd5580;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acdb480_0, 0, 32;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acdb340_0, 0, 32;
|
|
T_1.0 ; Top of for-loop
|
|
%load/vec4 v0x82acdb340_0;
|
|
%cmpi/s 8, 0, 32;
|
|
%jmp/0xz T_1.1, 5;
|
|
%load/vec4 v0x82acdb480_0;
|
|
%ix/getv/s 4, v0x82acdb340_0;
|
|
%load/vec4a v0x82acdb3e0, 4;
|
|
%add;
|
|
%store/vec4 v0x82acdb480_0, 0, 32;
|
|
T_1.2 ; for-loop step statement
|
|
%load/vec4 v0x82acdb340_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acdb340_0, 0, 32;
|
|
%jmp T_1.0;
|
|
T_1.1 ; for-loop exit label
|
|
%jmp T_1;
|
|
.thread T_1, $push;
|
|
.scope S_0x104fae0f0;
|
|
T_2 ;
|
|
%wait E_0x82acd5540;
|
|
%load/vec4 v0x82ace0500_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.0, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82ace0460_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82acdbf20_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82ace08c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace01e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace0320_0, 0;
|
|
%jmp T_2.1;
|
|
T_2.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace0320_0, 0;
|
|
%load/vec4 v0x82ace05a0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_2.4, 9;
|
|
%load/vec4 v0x82ace01e0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_2.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.2, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82ace0460_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82acdbf20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82ace01e0_0, 0;
|
|
%jmp T_2.3;
|
|
T_2.2 ;
|
|
%load/vec4 v0x82ace01e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.5, 8;
|
|
%load/vec4 v0x82ace0460_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_2.7, 4;
|
|
%load/vec4 v0x82ace03c0_0;
|
|
%assign/vec4 v0x82acdbf20_0, 0;
|
|
%load/vec4 v0x82ace03c0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_2.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82ace08c0_0, 0;
|
|
%jmp T_2.10;
|
|
T_2.9 ;
|
|
%load/vec4 v0x82ace03c0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_2.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x82ace08c0_0, 0;
|
|
%jmp T_2.12;
|
|
T_2.11 ;
|
|
%load/vec4 v0x82ace03c0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x82ace08c0_0, 0;
|
|
T_2.12 ;
|
|
T_2.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace01e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82ace0320_0, 0;
|
|
%jmp T_2.8;
|
|
T_2.7 ;
|
|
%load/vec4 v0x82ace0000_0;
|
|
%assign/vec4 v0x82acdbf20_0, 0;
|
|
%load/vec4 v0x82ace0460_0;
|
|
%addi 1, 0, 5;
|
|
%assign/vec4 v0x82ace0460_0, 0;
|
|
T_2.8 ;
|
|
T_2.5 ;
|
|
T_2.3 ;
|
|
T_2.1 ;
|
|
%jmp T_2;
|
|
.thread T_2;
|
|
.scope S_0x82acdd380;
|
|
T_3 ;
|
|
%wait E_0x82acd57c0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82ace3de0_0, 0, 32;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82ace3ca0_0, 0, 32;
|
|
T_3.0 ; Top of for-loop
|
|
%load/vec4 v0x82ace3ca0_0;
|
|
%cmpi/s 8, 0, 32;
|
|
%jmp/0xz T_3.1, 5;
|
|
%load/vec4 v0x82ace3de0_0;
|
|
%ix/getv/s 4, v0x82ace3ca0_0;
|
|
%load/vec4a v0x82ace3d40, 4;
|
|
%add;
|
|
%store/vec4 v0x82ace3de0_0, 0, 32;
|
|
T_3.2 ; for-loop step statement
|
|
%load/vec4 v0x82ace3ca0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82ace3ca0_0, 0, 32;
|
|
%jmp T_3.0;
|
|
T_3.1 ; for-loop exit label
|
|
%jmp T_3;
|
|
.thread T_3, $push;
|
|
.scope S_0x82acdd200;
|
|
T_4 ;
|
|
%wait E_0x82acd5540;
|
|
%load/vec4 v0x82ace4e60_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.0, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82ace4dc0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82ace48c0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82ace5220_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace4b40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace4c80_0, 0;
|
|
%jmp T_4.1;
|
|
T_4.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace4c80_0, 0;
|
|
%load/vec4 v0x82ace4f00_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_4.4, 9;
|
|
%load/vec4 v0x82ace4b40_0;
|
|
%nor/r;
|
|
%and;
|
|
T_4.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.2, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82ace4dc0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82ace48c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82ace4b40_0, 0;
|
|
%jmp T_4.3;
|
|
T_4.2 ;
|
|
%load/vec4 v0x82ace4b40_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.5, 8;
|
|
%load/vec4 v0x82ace4dc0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_4.7, 4;
|
|
%load/vec4 v0x82ace4d20_0;
|
|
%assign/vec4 v0x82ace48c0_0, 0;
|
|
%load/vec4 v0x82ace4d20_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_4.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82ace5220_0, 0;
|
|
%jmp T_4.10;
|
|
T_4.9 ;
|
|
%load/vec4 v0x82ace4d20_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_4.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x82ace5220_0, 0;
|
|
%jmp T_4.12;
|
|
T_4.11 ;
|
|
%load/vec4 v0x82ace4d20_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x82ace5220_0, 0;
|
|
T_4.12 ;
|
|
T_4.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82ace4b40_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82ace4c80_0, 0;
|
|
%jmp T_4.8;
|
|
T_4.7 ;
|
|
%load/vec4 v0x82ace4960_0;
|
|
%assign/vec4 v0x82ace48c0_0, 0;
|
|
%load/vec4 v0x82ace4dc0_0;
|
|
%addi 1, 0, 5;
|
|
%assign/vec4 v0x82ace4dc0_0, 0;
|
|
T_4.8 ;
|
|
T_4.5 ;
|
|
T_4.3 ;
|
|
T_4.1 ;
|
|
%jmp T_4;
|
|
.thread T_4;
|
|
.scope S_0x82acdf000;
|
|
T_5 ;
|
|
%wait E_0x82acd5a00;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acf4780_0, 0, 32;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acf4640_0, 0, 32;
|
|
T_5.0 ; Top of for-loop
|
|
%load/vec4 v0x82acf4640_0;
|
|
%cmpi/s 8, 0, 32;
|
|
%jmp/0xz T_5.1, 5;
|
|
%load/vec4 v0x82acf4780_0;
|
|
%ix/getv/s 4, v0x82acf4640_0;
|
|
%load/vec4a v0x82acf46e0, 4;
|
|
%add;
|
|
%store/vec4 v0x82acf4780_0, 0, 32;
|
|
T_5.2 ; for-loop step statement
|
|
%load/vec4 v0x82acf4640_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acf4640_0, 0, 32;
|
|
%jmp T_5.0;
|
|
T_5.1 ; for-loop exit label
|
|
%jmp T_5;
|
|
.thread T_5, $push;
|
|
.scope S_0x82acdee80;
|
|
T_6 ;
|
|
%wait E_0x82acd5540;
|
|
%load/vec4 v0x82acf57c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.0, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82acf5720_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82acf5220_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82acf5b80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acf54a0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acf55e0_0, 0;
|
|
%jmp T_6.1;
|
|
T_6.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acf55e0_0, 0;
|
|
%load/vec4 v0x82acf5860_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_6.4, 9;
|
|
%load/vec4 v0x82acf54a0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_6.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.2, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82acf5720_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82acf5220_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82acf54a0_0, 0;
|
|
%jmp T_6.3;
|
|
T_6.2 ;
|
|
%load/vec4 v0x82acf54a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.5, 8;
|
|
%load/vec4 v0x82acf5720_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_6.7, 4;
|
|
%load/vec4 v0x82acf5680_0;
|
|
%assign/vec4 v0x82acf5220_0, 0;
|
|
%load/vec4 v0x82acf5680_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_6.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82acf5b80_0, 0;
|
|
%jmp T_6.10;
|
|
T_6.9 ;
|
|
%load/vec4 v0x82acf5680_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_6.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x82acf5b80_0, 0;
|
|
%jmp T_6.12;
|
|
T_6.11 ;
|
|
%load/vec4 v0x82acf5680_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x82acf5b80_0, 0;
|
|
T_6.12 ;
|
|
T_6.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acf54a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82acf55e0_0, 0;
|
|
%jmp T_6.8;
|
|
T_6.7 ;
|
|
%load/vec4 v0x82acf52c0_0;
|
|
%assign/vec4 v0x82acf5220_0, 0;
|
|
%load/vec4 v0x82acf5720_0;
|
|
%addi 1, 0, 5;
|
|
%assign/vec4 v0x82acf5720_0, 0;
|
|
T_6.8 ;
|
|
T_6.5 ;
|
|
T_6.3 ;
|
|
T_6.1 ;
|
|
%jmp T_6;
|
|
.thread T_6;
|
|
.scope S_0x82ace8d80;
|
|
T_7 ;
|
|
%wait E_0x82acd5c40;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acfd0e0_0, 0, 32;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acfcfa0_0, 0, 32;
|
|
T_7.0 ; Top of for-loop
|
|
%load/vec4 v0x82acfcfa0_0;
|
|
%cmpi/s 8, 0, 32;
|
|
%jmp/0xz T_7.1, 5;
|
|
%load/vec4 v0x82acfd0e0_0;
|
|
%ix/getv/s 4, v0x82acfcfa0_0;
|
|
%load/vec4a v0x82acfd040, 4;
|
|
%add;
|
|
%store/vec4 v0x82acfd0e0_0, 0, 32;
|
|
T_7.2 ; for-loop step statement
|
|
%load/vec4 v0x82acfcfa0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfcfa0_0, 0, 32;
|
|
%jmp T_7.0;
|
|
T_7.1 ; for-loop exit label
|
|
%jmp T_7;
|
|
.thread T_7, $push;
|
|
.scope S_0x82ace8c00;
|
|
T_8 ;
|
|
%wait E_0x82acd5540;
|
|
%load/vec4 v0x82acfe120_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.0, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82acfe080_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82acfdb80_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82acfe4e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acfde00_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acfdf40_0, 0;
|
|
%jmp T_8.1;
|
|
T_8.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acfdf40_0, 0;
|
|
%load/vec4 v0x82acfe1c0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_8.4, 9;
|
|
%load/vec4 v0x82acfde00_0;
|
|
%nor/r;
|
|
%and;
|
|
T_8.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.2, 8;
|
|
%pushi/vec4 0, 0, 5;
|
|
%assign/vec4 v0x82acfe080_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x82acfdb80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82acfde00_0, 0;
|
|
%jmp T_8.3;
|
|
T_8.2 ;
|
|
%load/vec4 v0x82acfde00_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.5, 8;
|
|
%load/vec4 v0x82acfe080_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_8.7, 4;
|
|
%load/vec4 v0x82acfdfe0_0;
|
|
%assign/vec4 v0x82acfdb80_0, 0;
|
|
%load/vec4 v0x82acfdfe0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_8.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x82acfe4e0_0, 0;
|
|
%jmp T_8.10;
|
|
T_8.9 ;
|
|
%load/vec4 v0x82acfdfe0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_8.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x82acfe4e0_0, 0;
|
|
%jmp T_8.12;
|
|
T_8.11 ;
|
|
%load/vec4 v0x82acfdfe0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x82acfe4e0_0, 0;
|
|
T_8.12 ;
|
|
T_8.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x82acfde00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x82acfdf40_0, 0;
|
|
%jmp T_8.8;
|
|
T_8.7 ;
|
|
%load/vec4 v0x82acfdc20_0;
|
|
%assign/vec4 v0x82acfdb80_0, 0;
|
|
%load/vec4 v0x82acfe080_0;
|
|
%addi 1, 0, 5;
|
|
%assign/vec4 v0x82acfe080_0, 0;
|
|
T_8.8 ;
|
|
T_8.5 ;
|
|
T_8.3 ;
|
|
T_8.1 ;
|
|
%jmp T_8;
|
|
.thread T_8;
|
|
.scope S_0x104fb35a0;
|
|
T_9 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x82acfeda0_0, 0, 1;
|
|
T_9.0 ;
|
|
%delay 5000, 0;
|
|
%load/vec4 v0x82acfeda0_0;
|
|
%inv;
|
|
%store/vec4 v0x82acfeda0_0, 0, 1;
|
|
%jmp T_9.0;
|
|
T_9.1 ;
|
|
%end;
|
|
.thread T_9;
|
|
.scope S_0x104fb35a0;
|
|
T_10 ;
|
|
%vpi_call/w 3 71 "$dumpfile", "sim/parametric.vcd" {0 0 0};
|
|
%vpi_call/w 3 72 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x104fb35a0 {0 0 0};
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x82acff0c0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x82acff160_0, 0, 1;
|
|
%pushi/vec4 0, 0, 2048;
|
|
%store/vec4 v0x82acff2a0_0, 0, 2048;
|
|
%pushi/vec4 0, 0, 8192;
|
|
%store/vec4 v0x82acff200_0, 0, 8192;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acfec60_0, 0, 32;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
%pushi/vec4 2, 0, 32;
|
|
T_10.0 %dup/vec4;
|
|
%cmpi/s 0, 0, 32;
|
|
%jmp/1xz T_10.1, 5;
|
|
%jmp/1 T_10.1, 4;
|
|
%subi 1, 0, 32;
|
|
%wait E_0x82acd5540;
|
|
%jmp T_10.0;
|
|
T_10.1 ;
|
|
%pop/vec4 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x82acff0c0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
T_10.2 ; Top of for-loop
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 256, 0, 32;
|
|
%jmp/0xz T_10.3, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%load/vec4 v0x82acff020_0;
|
|
%muli 8, 0, 32;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x82acff2a0_0, 4, 8;
|
|
T_10.4 ; for-loop step statement
|
|
%load/vec4 v0x82acff020_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
%jmp T_10.2;
|
|
T_10.3 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
T_10.5 ; Top of for-loop
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 256, 0, 32;
|
|
%jmp/0xz T_10.6, 5;
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%flag_mov 8, 5;
|
|
%jmp/0 T_10.8, 8;
|
|
%pushi/vec4 1, 0, 8;
|
|
%jmp/1 T_10.9, 8;
|
|
T_10.8 ; End of true expr.
|
|
%pushi/vec4 0, 0, 8;
|
|
%jmp/0 T_10.9, 8;
|
|
; End of false expr.
|
|
%blend;
|
|
T_10.9;
|
|
%pushi/vec4 0, 0, 32;
|
|
%load/vec4 v0x82acff020_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x82acff200_0, 4, 8;
|
|
T_10.7 ; for-loop step statement
|
|
%load/vec4 v0x82acff020_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
%jmp T_10.5;
|
|
T_10.6 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
T_10.10 ; Top of for-loop
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 256, 0, 32;
|
|
%jmp/0xz T_10.11, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%pushi/vec4 2048, 0, 32;
|
|
%load/vec4 v0x82acff020_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x82acff200_0, 4, 8;
|
|
T_10.12 ; for-loop step statement
|
|
%load/vec4 v0x82acff020_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
%jmp T_10.10;
|
|
T_10.11 ; for-loop exit label
|
|
%pushi/vec4 10, 0, 8;
|
|
%ix/load 4, 8, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x82acfec60_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
T_10.13 ; Top of for-loop
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 256, 0, 32;
|
|
%jmp/0xz T_10.14, 5;
|
|
%pushi/vec4 255, 0, 8;
|
|
%pushi/vec4 4096, 0, 32;
|
|
%load/vec4 v0x82acff020_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x82acff200_0, 4, 8;
|
|
T_10.15 ; for-loop step statement
|
|
%load/vec4 v0x82acff020_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
%jmp T_10.13;
|
|
T_10.14 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
T_10.16 ; Top of for-loop
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 256, 0, 32;
|
|
%jmp/0xz T_10.17, 5;
|
|
%load/vec4 v0x82acff020_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%flag_mov 8, 5;
|
|
%jmp/0 T_10.19, 8;
|
|
%pushi/vec4 4, 0, 8;
|
|
%jmp/1 T_10.20, 8;
|
|
T_10.19 ; End of true expr.
|
|
%pushi/vec4 0, 0, 8;
|
|
%jmp/0 T_10.20, 8;
|
|
; End of false expr.
|
|
%blend;
|
|
T_10.20;
|
|
%pushi/vec4 6144, 0, 32;
|
|
%load/vec4 v0x82acff020_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x82acff200_0, 4, 8;
|
|
T_10.18 ; for-loop step statement
|
|
%load/vec4 v0x82acff020_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acff020_0, 0, 32;
|
|
%jmp T_10.16;
|
|
T_10.17 ; for-loop exit label
|
|
%vpi_call/w 3 153 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 3 154 "$display", "========================================" {0 0 0};
|
|
%vpi_call/w 3 155 "$display", "INT8 / INT32 PARAMETRIC LAYER TEST" {0 0 0};
|
|
%vpi_call/w 3 156 "$display", "N_INPUTS = %0d", P_0x82ac74080 {0 0 0};
|
|
%vpi_call/w 3 157 "$display", "N_NEURONS = %0d", P_0x82ac740c0 {0 0 0};
|
|
%vpi_call/w 3 158 "$display", "PARALLEL = %0d", P_0x82ac74100 {0 0 0};
|
|
%vpi_call/w 3 159 "$display", "DATA_WIDTH = %0d", P_0x82ac74040 {0 0 0};
|
|
%vpi_call/w 3 160 "$display", "ACC_WIDTH = %0d", P_0x82ac74000 {0 0 0};
|
|
%vpi_call/w 3 161 "$display", "========================================" {0 0 0};
|
|
%fork TD_tb.run_layer, S_0x82acea700;
|
|
%join;
|
|
%pushi/vec4 32, 0, 32;
|
|
%store/vec4 v0x82acfef80_0, 0, 32;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 0, 2;
|
|
%pad/s 32;
|
|
%load/vec4 v0x82acfef80_0;
|
|
%cmp/ne;
|
|
%jmp/0xz T_10.21, 6;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 0, 2;
|
|
%vpi_call/w 3 171 "$display", "FAIL N0: got %0d expected %0d", S<0,vec4,s8>, v0x82acfef80_0 {1 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
%jmp T_10.22;
|
|
T_10.21 ;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 0, 2;
|
|
%vpi_call/w 3 177 "$display", "PASS N0: %0d", S<0,vec4,s8> {1 0 0};
|
|
T_10.22 ;
|
|
%pushi/vec4 10, 0, 32;
|
|
%store/vec4 v0x82acfef80_0, 0, 32;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 8, 5;
|
|
%pad/s 32;
|
|
%load/vec4 v0x82acfef80_0;
|
|
%cmp/ne;
|
|
%jmp/0xz T_10.23, 6;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 8, 5;
|
|
%vpi_call/w 3 187 "$display", "FAIL N1: got %0d expected %0d", S<0,vec4,s8>, v0x82acfef80_0 {1 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
%jmp T_10.24;
|
|
T_10.23 ;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 8, 5;
|
|
%vpi_call/w 3 193 "$display", "PASS N1: %0d", S<0,vec4,s8> {1 0 0};
|
|
T_10.24 ;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x82acfef80_0, 0, 32;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 16, 6;
|
|
%pad/s 32;
|
|
%cmpi/ne 0, 0, 32;
|
|
%jmp/0xz T_10.25, 6;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 16, 6;
|
|
%vpi_call/w 3 205 "$display", "FAIL N2: got %0d expected 0", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
%jmp T_10.26;
|
|
T_10.25 ;
|
|
%vpi_call/w 3 210 "$display", "PASS N2: 0 (ReLU)" {0 0 0};
|
|
T_10.26 ;
|
|
%pushi/vec4 127, 0, 32;
|
|
%store/vec4 v0x82acfef80_0, 0, 32;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 24, 6;
|
|
%pad/s 32;
|
|
%load/vec4 v0x82acfef80_0;
|
|
%cmp/ne;
|
|
%jmp/0xz T_10.27, 6;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 24, 6;
|
|
%vpi_call/w 3 224 "$display", "FAIL N3: got %0d expected %0d", S<0,vec4,s8>, v0x82acfef80_0 {1 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
%jmp T_10.28;
|
|
T_10.27 ;
|
|
%load/vec4 v0x82acff340_0;
|
|
%parti/s 8, 24, 6;
|
|
%vpi_call/w 3 230 "$display", "PASS N3: %0d (saturation)", S<0,vec4,s8> {1 0 0};
|
|
T_10.28 ;
|
|
%load/vec4 v0x82acfed00_0;
|
|
%pad/u 32;
|
|
%cmpi/ne 0, 0, 32;
|
|
%jmp/0xz T_10.29, 6;
|
|
%vpi_call/w 3 235 "$display", "FAIL: busy still active" {0 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
T_10.29 ;
|
|
%load/vec4 v0x82acfee40_0;
|
|
%pad/u 32;
|
|
%cmpi/ne 1, 0, 32;
|
|
%jmp/0xz T_10.31, 6;
|
|
%vpi_call/w 3 240 "$display", "FAIL: done not asserted" {0 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x82acfeee0_0, 0, 32;
|
|
T_10.31 ;
|
|
%vpi_call/w 3 244 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 3 245 "$display", "========================================" {0 0 0};
|
|
%load/vec4 v0x82acfeee0_0;
|
|
%cmpi/e 0, 0, 32;
|
|
%jmp/0xz T_10.33, 4;
|
|
%vpi_call/w 3 248 "$display", "INT8 PARAMETRIC TEST PASSED" {0 0 0};
|
|
%jmp T_10.34;
|
|
T_10.33 ;
|
|
%vpi_call/w 3 250 "$display", "INT8 PARAMETRIC TEST FAILED: %0d errors", v0x82acfeee0_0 {0 0 0};
|
|
T_10.34 ;
|
|
%vpi_call/w 3 252 "$display", "========================================" {0 0 0};
|
|
%vpi_call/w 3 253 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 3 255 "$finish" {0 0 0};
|
|
%end;
|
|
.thread T_10;
|
|
# The file index is used to find the file name in the following table.
|
|
:file_names 8;
|
|
"N/A";
|
|
"<interactive>";
|
|
"-";
|
|
"sim/parametric_tb.v";
|
|
"rtl/layer.v";
|
|
"rtl/neuron_parallel.v";
|
|
"rtl/mac8.v";
|
|
"rtl/mac_unit.v";
|