micheleandClaude Sonnet 5
4b5cd4e558
Both testbenches instantiated their DUTs with a FRAC_BITS parameter and
Q8.8 fixed-point 16-bit values, which no longer exist in rtl/neuron_parallel.v
(now plain INT8, DATA_WIDTH=8, hardcoded +127 saturation, ReLU-only clamp).
This made both tests fail elaboration ("parameter FRAC_BITS not found").
Rewrote both benches with integer INT8 stimuli and expectations matching
the current core (no RTL changes): neuron_parallel_tb covers a mixed
vector, ReLU, positive saturation, and mixed values with a boundary
negative bias; layer_tb covers 8 neurons exercising scale, ReLU,
saturation, bias-only, and a sparse weight pattern across groups.
Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01WQV3vS9TXaGDJ5cRfnfidt
6746 lines
331 KiB
Plaintext
Executable File
6746 lines
331 KiB
Plaintext
Executable File
#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp
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:ivl_version "13.0 (stable)" "(v13_0)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision - 12;
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi";
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S_0x102e30650 .scope package, "$unit" "$unit" 2 1;
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.timescale 0 0;
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S_0x102e26840 .scope module, "memory_interface" "memory_interface" 3 1;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "req";
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.port_info 3 /INPUT 1 "wr";
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.port_info 4 /INPUT 22 "addr";
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.port_info 5 /INPUT 16 "wdata";
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.port_info 6 /INPUT 1 "lb_n";
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.port_info 7 /INPUT 1 "ub_n";
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.port_info 8 /OUTPUT 16 "rdata";
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.port_info 9 /OUTPUT 1 "ready";
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.port_info 10 /OUTPUT 1 "mem_req";
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.port_info 11 /OUTPUT 1 "mem_wr";
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.port_info 12 /OUTPUT 22 "mem_addr";
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.port_info 13 /OUTPUT 16 "mem_wdata";
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.port_info 14 /OUTPUT 1 "mem_lb_n";
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.port_info 15 /OUTPUT 1 "mem_ub_n";
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.port_info 16 /INPUT 16 "mem_rdata";
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.port_info 17 /INPUT 1 "mem_ready";
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P_0x84acc8000 .param/l "ADDR_WIDTH" 0 3 2, +C4<00000000000000000000000000010110>;
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P_0x84acc8040 .param/l "DATA_WIDTH" 0 3 3, +C4<00000000000000000000000000010000>;
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P_0x84acc8080 .param/l "STATE_IDLE" 1 3 28, C4<00>;
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P_0x84acc80c0 .param/l "STATE_WAIT" 1 3 29, C4<01>;
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o0x84a844010 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b0c4c80_0 .net "addr", 21 0, o0x84a844010; 0 drivers
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o0x84a844040 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c4d20_0 .net "clk", 0 0, o0x84a844040; 0 drivers
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o0x84a844070 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c4dc0_0 .net "lb_n", 0 0, o0x84a844070; 0 drivers
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v0x84b0c4e60_0 .var "mem_addr", 21 0;
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v0x84b0c4f00_0 .var "mem_lb_n", 0 0;
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o0x84a844100 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b0c4fa0_0 .net "mem_rdata", 15 0, o0x84a844100; 0 drivers
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o0x84a844130 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c5040_0 .net "mem_ready", 0 0, o0x84a844130; 0 drivers
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v0x84b0c50e0_0 .var "mem_req", 0 0;
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v0x84b0c5180_0 .var "mem_ub_n", 0 0;
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v0x84b0c5220_0 .var "mem_wdata", 15 0;
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v0x84b0c52c0_0 .var "mem_wr", 0 0;
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v0x84b0c5360_0 .var "rdata", 15 0;
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v0x84b0c5400_0 .var "ready", 0 0;
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o0x84a844280 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c54a0_0 .net "req", 0 0, o0x84a844280; 0 drivers
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o0x84a8442b0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c5540_0 .net "rst", 0 0, o0x84a8442b0; 0 drivers
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v0x84b0c55e0_0 .var "state", 1 0;
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o0x84a844310 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c5680_0 .net "ub_n", 0 0, o0x84a844310; 0 drivers
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o0x84a844340 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b0c5720_0 .net "wdata", 15 0, o0x84a844340; 0 drivers
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o0x84a844370 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c57c0_0 .net "wr", 0 0, o0x84a844370; 0 drivers
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E_0x84ae46340 .event posedge, v0x84b0c4d20_0;
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S_0x102e314f0 .scope module, "memory_model" "memory_model" 4 1;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "req";
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.port_info 3 /INPUT 1 "wr";
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.port_info 4 /INPUT 22 "addr";
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.port_info 5 /INPUT 16 "wdata";
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.port_info 6 /OUTPUT 16 "rdata";
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.port_info 7 /OUTPUT 1 "ready";
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P_0x84acc8100 .param/l "ADDR_WIDTH" 0 4 2, +C4<00000000000000000000000000010110>;
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P_0x84acc8140 .param/l "DATA_WIDTH" 0 4 3, +C4<00000000000000000000000000010000>;
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P_0x84acc8180 .param/l "DEPTH" 0 4 4, +C4<00000000000000000001000000000000>;
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P_0x84acc81c0 .param/l "READ_LATENCY" 0 4 5, +C4<00000000000000000000000000000010>;
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o0x84a844700 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b0c5860_0 .net "addr", 21 0, o0x84a844700; 0 drivers
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v0x84b0c5900_0 .var "busy", 0 0;
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o0x84a844760 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c59a0_0 .net "clk", 0 0, o0x84a844760; 0 drivers
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v0x84b0c5a40_0 .var/i "delay_count", 31 0;
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v0x84b0c5ae0_0 .var/i "i", 31 0;
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v0x84b0c5b80 .array "mem", 4095 0, 15 0;
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v0x84b0c5c20_0 .var "pending_addr", 21 0;
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v0x84b0c5cc0_0 .var "pending_wdata", 15 0;
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v0x84b0c5d60_0 .var "pending_wr", 0 0;
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v0x84b0c5e00_0 .var "rdata", 15 0;
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v0x84b0c5ea0_0 .var "ready", 0 0;
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o0x84a8448e0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c5f40_0 .net "req", 0 0, o0x84a8448e0; 0 drivers
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o0x84a844910 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c5fe0_0 .net "rst", 0 0, o0x84a844910; 0 drivers
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o0x84a844940 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b0c6080_0 .net "wdata", 15 0, o0x84a844940; 0 drivers
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o0x84a844970 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b0c6120_0 .net "wr", 0 0, o0x84a844970; 0 drivers
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E_0x84ae46380 .event posedge, v0x84b0c59a0_0;
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S_0x102e269c0 .scope module, "neuron_memory" "neuron_memory" 5 3;
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.timescale -9 -12;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "start";
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.port_info 3 /OUTPUT 1 "mem_req";
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.port_info 4 /OUTPUT 1 "mem_wr";
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.port_info 5 /OUTPUT 22 "mem_addr";
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.port_info 6 /OUTPUT 8 "mem_wdata";
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.port_info 7 /INPUT 8 "mem_rdata";
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.port_info 8 /INPUT 1 "mem_ready";
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.port_info 9 /INPUT 22 "x_base";
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.port_info 10 /INPUT 22 "w_base";
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.port_info 11 /INPUT 22 "bias_addr";
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.port_info 12 /OUTPUT 8 "y";
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.port_info 13 /OUTPUT 1 "busy";
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.port_info 14 /OUTPUT 1 "done";
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P_0x102e2fd50 .param/l "ACC_WIDTH" 0 5 8, +C4<00000000000000000000000000100000>;
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P_0x102e2fd90 .param/l "ADDR_WIDTH" 0 5 4, +C4<00000000000000000000000000010110>;
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P_0x102e2fdd0 .param/l "DATA_WIDTH" 0 5 5, +C4<00000000000000000000000000001000>;
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P_0x102e2fe10 .param/l "N_INPUTS" 0 5 6, +C4<00000000000000000000000000100000>;
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P_0x102e2fe50 .param/l "PARALLEL" 0 5 7, +C4<00000000000000000000000000001000>;
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P_0x102e2fe90 .param/l "STATE_IDLE" 1 5 49, C4<0000>;
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P_0x102e2fed0 .param/l "STATE_READ_BIAS" 1 5 52, C4<0011>;
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P_0x102e2ff10 .param/l "STATE_READ_W" 1 5 51, C4<0010>;
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P_0x102e2ff50 .param/l "STATE_READ_X" 1 5 50, C4<0001>;
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P_0x102e2ff90 .param/l "STATE_START_N" 1 5 53, C4<0100>;
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P_0x102e2ffd0 .param/l "STATE_WAIT_N" 1 5 54, C4<0101>;
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L_0x84ac3ee60 .functor BUFZ 1, v0x84b154e60_0, C4<0>, C4<0>, C4<0>;
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L_0x84ac3eed0 .functor BUFZ 1, v0x84b155040_0, C4<0>, C4<0>, C4<0>;
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L_0x84ac3ef40 .functor BUFZ 22, v0x84b15e120_0, C4<0000000000000000000000>, C4<0000000000000000000000>, C4<0000000000000000000000>;
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L_0x84ac3efb0 .functor BUFZ 8, v0x84b15e800_0, C4<00000000>, C4<00000000>, C4<00000000>;
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v0x84b15de00_0 .net *"_ivl_131", 0 0, L_0x84ae38c80; 1 drivers
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L_0x84a878010 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
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v0x84b15dea0_0 .net/2u *"_ivl_132", 7 0, L_0x84a878010; 1 drivers
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v0x84b15df40_0 .net *"_ivl_134", 15 0, L_0x84b192080; 1 drivers
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L_0x84a878058 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
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v0x84b15dfe0_0 .net/2u *"_ivl_136", 7 0, L_0x84a878058; 1 drivers
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v0x84b15e080_0 .net *"_ivl_138", 15 0, L_0x84b192120; 1 drivers
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v0x84b15e120_0 .var "access_addr", 21 0;
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v0x84b15e1c0_0 .net "access_mem_addr", 21 0, v0x84b154be0_0; 1 drivers
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v0x84b15e260_0 .net "access_mem_lb_n", 0 0, v0x84b154c80_0; 1 drivers
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v0x84b15e300_0 .net "access_mem_rdata", 15 0, L_0x84b12a3a0; 1 drivers
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v0x84b15e3a0_0 .net "access_mem_req", 0 0, v0x84b154e60_0; 1 drivers
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v0x84b15e440_0 .net "access_mem_ub_n", 0 0, v0x84b154f00_0; 1 drivers
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v0x84b15e4e0_0 .net "access_mem_wdata", 15 0, v0x84b154fa0_0; 1 drivers
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v0x84b15e580_0 .net "access_mem_wr", 0 0, v0x84b155040_0; 1 drivers
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v0x84b15e620_0 .net/s "access_rdata", 7 0, v0x84b1550e0_0; 1 drivers
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v0x84b15e6c0_0 .net "access_ready", 0 0, v0x84b155180_0; 1 drivers
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v0x84b15e760_0 .var "access_req", 0 0;
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v0x84b15e800_0 .var/s "access_wdata", 7 0;
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v0x84b15e8a0_0 .var "access_wr", 0 0;
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o0x84a848120 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b15e940_0 .net "bias_addr", 21 0, o0x84a848120; 0 drivers
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v0x84b15e9e0_0 .var/s "bias_reg", 7 0;
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v0x84b15ea80_0 .var "busy", 0 0;
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o0x84a845780 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b15eb20_0 .net "clk", 0 0, o0x84a845780; 0 drivers
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v0x84b15ebc0_0 .var "done", 0 0;
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v0x84b15ec60_0 .var "index", 5 0;
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v0x84b15ed00_0 .net "mem_addr", 21 0, L_0x84ac3ef40; 1 drivers
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o0x84a848210 .functor BUFZ 8, c4<zzzzzzzz>; HiZ drive
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v0x84b15eda0_0 .net/s "mem_rdata", 7 0, o0x84a848210; 0 drivers
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o0x84a845840 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b15ee40_0 .net "mem_ready", 0 0, o0x84a845840; 0 drivers
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v0x84b15eee0_0 .net "mem_req", 0 0, L_0x84ac3ee60; 1 drivers
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v0x84b15ef80_0 .net/s "mem_wdata", 7 0, L_0x84ac3efb0; 1 drivers
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v0x84b15f020_0 .net "mem_wr", 0 0, L_0x84ac3eed0; 1 drivers
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v0x84b15f0c0_0 .net "neuron_busy", 0 0, v0x84b15d680_0; 1 drivers
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v0x84b15f160_0 .net "neuron_done", 0 0, v0x84b15d7c0_0; 1 drivers
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v0x84b15f200_0 .var "neuron_start", 0 0;
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v0x84b15f2a0_0 .net/s "neuron_y", 7 0, v0x84b15dd60_0; 1 drivers
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o0x84a8459c0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b15f340_0 .net "rst", 0 0, o0x84a8459c0; 0 drivers
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o0x84a8482d0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x84b15f3e0_0 .net "start", 0 0, o0x84a8482d0; 0 drivers
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v0x84b15f480_0 .var "state", 3 0;
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o0x84a848330 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b15f520_0 .net "w_base", 21 0, o0x84a848330; 0 drivers
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v0x84b15f5c0_0 .net/s "w_bus", 255 0, L_0x84b191fe0; 1 drivers
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v0x84b15f660 .array/s "w_mem", 31 0, 7 0;
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o0x84a848960 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x84b15f700_0 .net "x_base", 21 0, o0x84a848960; 0 drivers
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v0x84b15f7a0_0 .net/s "x_bus", 255 0, L_0x84b191f40; 1 drivers
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v0x84b15f840 .array/s "x_mem", 31 0, 7 0;
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v0x84b15f8e0_0 .var/s "y", 7 0;
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v0x84b15f840_0 .array/port v0x84b15f840, 0;
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v0x84b15f840_1 .array/port v0x84b15f840, 1;
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v0x84b15f840_2 .array/port v0x84b15f840, 2;
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v0x84b15f840_3 .array/port v0x84b15f840, 3;
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LS_0x84b191f40_0_0 .concat8 [ 8 8 8 8], v0x84b15f840_0, v0x84b15f840_1, v0x84b15f840_2, v0x84b15f840_3;
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v0x84b15f840_4 .array/port v0x84b15f840, 4;
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v0x84b15f840_5 .array/port v0x84b15f840, 5;
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v0x84b15f840_6 .array/port v0x84b15f840, 6;
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v0x84b15f840_7 .array/port v0x84b15f840, 7;
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LS_0x84b191f40_0_4 .concat8 [ 8 8 8 8], v0x84b15f840_4, v0x84b15f840_5, v0x84b15f840_6, v0x84b15f840_7;
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v0x84b15f840_8 .array/port v0x84b15f840, 8;
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v0x84b15f840_9 .array/port v0x84b15f840, 9;
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v0x84b15f840_10 .array/port v0x84b15f840, 10;
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v0x84b15f840_11 .array/port v0x84b15f840, 11;
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LS_0x84b191f40_0_8 .concat8 [ 8 8 8 8], v0x84b15f840_8, v0x84b15f840_9, v0x84b15f840_10, v0x84b15f840_11;
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v0x84b15f840_12 .array/port v0x84b15f840, 12;
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v0x84b15f840_13 .array/port v0x84b15f840, 13;
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v0x84b15f840_14 .array/port v0x84b15f840, 14;
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v0x84b15f840_15 .array/port v0x84b15f840, 15;
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LS_0x84b191f40_0_12 .concat8 [ 8 8 8 8], v0x84b15f840_12, v0x84b15f840_13, v0x84b15f840_14, v0x84b15f840_15;
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v0x84b15f840_16 .array/port v0x84b15f840, 16;
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v0x84b15f840_17 .array/port v0x84b15f840, 17;
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v0x84b15f840_18 .array/port v0x84b15f840, 18;
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v0x84b15f840_19 .array/port v0x84b15f840, 19;
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LS_0x84b191f40_0_16 .concat8 [ 8 8 8 8], v0x84b15f840_16, v0x84b15f840_17, v0x84b15f840_18, v0x84b15f840_19;
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v0x84b15f840_20 .array/port v0x84b15f840, 20;
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v0x84b15f840_21 .array/port v0x84b15f840, 21;
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v0x84b15f840_22 .array/port v0x84b15f840, 22;
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v0x84b15f840_23 .array/port v0x84b15f840, 23;
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LS_0x84b191f40_0_20 .concat8 [ 8 8 8 8], v0x84b15f840_20, v0x84b15f840_21, v0x84b15f840_22, v0x84b15f840_23;
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v0x84b15f840_24 .array/port v0x84b15f840, 24;
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v0x84b15f840_25 .array/port v0x84b15f840, 25;
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v0x84b15f840_26 .array/port v0x84b15f840, 26;
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v0x84b15f840_27 .array/port v0x84b15f840, 27;
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LS_0x84b191f40_0_24 .concat8 [ 8 8 8 8], v0x84b15f840_24, v0x84b15f840_25, v0x84b15f840_26, v0x84b15f840_27;
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v0x84b15f840_28 .array/port v0x84b15f840, 28;
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v0x84b15f840_29 .array/port v0x84b15f840, 29;
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v0x84b15f840_30 .array/port v0x84b15f840, 30;
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v0x84b15f840_31 .array/port v0x84b15f840, 31;
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LS_0x84b191f40_0_28 .concat8 [ 8 8 8 8], v0x84b15f840_28, v0x84b15f840_29, v0x84b15f840_30, v0x84b15f840_31;
|
|
LS_0x84b191f40_1_0 .concat8 [ 32 32 32 32], LS_0x84b191f40_0_0, LS_0x84b191f40_0_4, LS_0x84b191f40_0_8, LS_0x84b191f40_0_12;
|
|
LS_0x84b191f40_1_4 .concat8 [ 32 32 32 32], LS_0x84b191f40_0_16, LS_0x84b191f40_0_20, LS_0x84b191f40_0_24, LS_0x84b191f40_0_28;
|
|
L_0x84b191f40 .concat8 [ 128 128 0 0], LS_0x84b191f40_1_0, LS_0x84b191f40_1_4;
|
|
v0x84b15f660_0 .array/port v0x84b15f660, 0;
|
|
v0x84b15f660_1 .array/port v0x84b15f660, 1;
|
|
v0x84b15f660_2 .array/port v0x84b15f660, 2;
|
|
v0x84b15f660_3 .array/port v0x84b15f660, 3;
|
|
LS_0x84b191fe0_0_0 .concat8 [ 8 8 8 8], v0x84b15f660_0, v0x84b15f660_1, v0x84b15f660_2, v0x84b15f660_3;
|
|
v0x84b15f660_4 .array/port v0x84b15f660, 4;
|
|
v0x84b15f660_5 .array/port v0x84b15f660, 5;
|
|
v0x84b15f660_6 .array/port v0x84b15f660, 6;
|
|
v0x84b15f660_7 .array/port v0x84b15f660, 7;
|
|
LS_0x84b191fe0_0_4 .concat8 [ 8 8 8 8], v0x84b15f660_4, v0x84b15f660_5, v0x84b15f660_6, v0x84b15f660_7;
|
|
v0x84b15f660_8 .array/port v0x84b15f660, 8;
|
|
v0x84b15f660_9 .array/port v0x84b15f660, 9;
|
|
v0x84b15f660_10 .array/port v0x84b15f660, 10;
|
|
v0x84b15f660_11 .array/port v0x84b15f660, 11;
|
|
LS_0x84b191fe0_0_8 .concat8 [ 8 8 8 8], v0x84b15f660_8, v0x84b15f660_9, v0x84b15f660_10, v0x84b15f660_11;
|
|
v0x84b15f660_12 .array/port v0x84b15f660, 12;
|
|
v0x84b15f660_13 .array/port v0x84b15f660, 13;
|
|
v0x84b15f660_14 .array/port v0x84b15f660, 14;
|
|
v0x84b15f660_15 .array/port v0x84b15f660, 15;
|
|
LS_0x84b191fe0_0_12 .concat8 [ 8 8 8 8], v0x84b15f660_12, v0x84b15f660_13, v0x84b15f660_14, v0x84b15f660_15;
|
|
v0x84b15f660_16 .array/port v0x84b15f660, 16;
|
|
v0x84b15f660_17 .array/port v0x84b15f660, 17;
|
|
v0x84b15f660_18 .array/port v0x84b15f660, 18;
|
|
v0x84b15f660_19 .array/port v0x84b15f660, 19;
|
|
LS_0x84b191fe0_0_16 .concat8 [ 8 8 8 8], v0x84b15f660_16, v0x84b15f660_17, v0x84b15f660_18, v0x84b15f660_19;
|
|
v0x84b15f660_20 .array/port v0x84b15f660, 20;
|
|
v0x84b15f660_21 .array/port v0x84b15f660, 21;
|
|
v0x84b15f660_22 .array/port v0x84b15f660, 22;
|
|
v0x84b15f660_23 .array/port v0x84b15f660, 23;
|
|
LS_0x84b191fe0_0_20 .concat8 [ 8 8 8 8], v0x84b15f660_20, v0x84b15f660_21, v0x84b15f660_22, v0x84b15f660_23;
|
|
v0x84b15f660_24 .array/port v0x84b15f660, 24;
|
|
v0x84b15f660_25 .array/port v0x84b15f660, 25;
|
|
v0x84b15f660_26 .array/port v0x84b15f660, 26;
|
|
v0x84b15f660_27 .array/port v0x84b15f660, 27;
|
|
LS_0x84b191fe0_0_24 .concat8 [ 8 8 8 8], v0x84b15f660_24, v0x84b15f660_25, v0x84b15f660_26, v0x84b15f660_27;
|
|
v0x84b15f660_28 .array/port v0x84b15f660, 28;
|
|
v0x84b15f660_29 .array/port v0x84b15f660, 29;
|
|
v0x84b15f660_30 .array/port v0x84b15f660, 30;
|
|
v0x84b15f660_31 .array/port v0x84b15f660, 31;
|
|
LS_0x84b191fe0_0_28 .concat8 [ 8 8 8 8], v0x84b15f660_28, v0x84b15f660_29, v0x84b15f660_30, v0x84b15f660_31;
|
|
LS_0x84b191fe0_1_0 .concat8 [ 32 32 32 32], LS_0x84b191fe0_0_0, LS_0x84b191fe0_0_4, LS_0x84b191fe0_0_8, LS_0x84b191fe0_0_12;
|
|
LS_0x84b191fe0_1_4 .concat8 [ 32 32 32 32], LS_0x84b191fe0_0_16, LS_0x84b191fe0_0_20, LS_0x84b191fe0_0_24, LS_0x84b191fe0_0_28;
|
|
L_0x84b191fe0 .concat8 [ 128 128 0 0], LS_0x84b191fe0_1_0, LS_0x84b191fe0_1_4;
|
|
L_0x84ae38c80 .part v0x84b15e120_0, 0, 1;
|
|
L_0x84b192080 .concat [ 8 8 0 0], L_0x84a878010, o0x84a848210;
|
|
L_0x84b192120 .concat [ 8 8 0 0], o0x84a848210, L_0x84a878058;
|
|
L_0x84b12a3a0 .functor MUXZ 16, L_0x84b192120, L_0x84b192080, L_0x84ae38c80, C4<>;
|
|
S_0x102e246e0 .scope generate, "GEN_BUS[0]" "GEN_BUS[0]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150340 .param/l "i" 1 5 79, +C4<00>;
|
|
v0x84b0c61c0_0 .net *"_ivl_2", 7 0, v0x84b15f840_0; 1 drivers
|
|
v0x84b0c6260_0 .net *"_ivl_5", 7 0, v0x84b15f660_0; 1 drivers
|
|
S_0x102e24860 .scope generate, "GEN_BUS[1]" "GEN_BUS[1]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150380 .param/l "i" 1 5 79, +C4<01>;
|
|
v0x84b0c6300_0 .net *"_ivl_2", 7 0, v0x84b15f840_1; 1 drivers
|
|
v0x84b0c63a0_0 .net *"_ivl_5", 7 0, v0x84b15f660_1; 1 drivers
|
|
S_0x102e23bb0 .scope generate, "GEN_BUS[2]" "GEN_BUS[2]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1503c0 .param/l "i" 1 5 79, +C4<010>;
|
|
v0x84b0c6440_0 .net *"_ivl_2", 7 0, v0x84b15f840_2; 1 drivers
|
|
v0x84b0c64e0_0 .net *"_ivl_5", 7 0, v0x84b15f660_2; 1 drivers
|
|
S_0x102e23d30 .scope generate, "GEN_BUS[3]" "GEN_BUS[3]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150400 .param/l "i" 1 5 79, +C4<011>;
|
|
v0x84b0c6580_0 .net *"_ivl_2", 7 0, v0x84b15f840_3; 1 drivers
|
|
v0x84b0c6620_0 .net *"_ivl_5", 7 0, v0x84b15f660_3; 1 drivers
|
|
S_0x102e213b0 .scope generate, "GEN_BUS[4]" "GEN_BUS[4]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150440 .param/l "i" 1 5 79, +C4<0100>;
|
|
v0x84b0c66c0_0 .net *"_ivl_2", 7 0, v0x84b15f840_4; 1 drivers
|
|
v0x84b0c6760_0 .net *"_ivl_5", 7 0, v0x84b15f660_4; 1 drivers
|
|
S_0x102e21530 .scope generate, "GEN_BUS[5]" "GEN_BUS[5]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150480 .param/l "i" 1 5 79, +C4<0101>;
|
|
v0x84b0c6800_0 .net *"_ivl_2", 7 0, v0x84b15f840_5; 1 drivers
|
|
v0x84b0c68a0_0 .net *"_ivl_5", 7 0, v0x84b15f660_5; 1 drivers
|
|
S_0x102e22170 .scope generate, "GEN_BUS[6]" "GEN_BUS[6]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1504c0 .param/l "i" 1 5 79, +C4<0110>;
|
|
v0x84b0c6940_0 .net *"_ivl_2", 7 0, v0x84b15f840_6; 1 drivers
|
|
v0x84b0c69e0_0 .net *"_ivl_5", 7 0, v0x84b15f660_6; 1 drivers
|
|
S_0x102e222f0 .scope generate, "GEN_BUS[7]" "GEN_BUS[7]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150500 .param/l "i" 1 5 79, +C4<0111>;
|
|
v0x84b0c6a80_0 .net *"_ivl_2", 7 0, v0x84b15f840_7; 1 drivers
|
|
v0x84b0c6b20_0 .net *"_ivl_5", 7 0, v0x84b15f660_7; 1 drivers
|
|
S_0x102e1f770 .scope generate, "GEN_BUS[8]" "GEN_BUS[8]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150540 .param/l "i" 1 5 79, +C4<01000>;
|
|
v0x84b0c6bc0_0 .net *"_ivl_2", 7 0, v0x84b15f840_8; 1 drivers
|
|
v0x84b0c6c60_0 .net *"_ivl_5", 7 0, v0x84b15f660_8; 1 drivers
|
|
S_0x102e1f8f0 .scope generate, "GEN_BUS[9]" "GEN_BUS[9]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150580 .param/l "i" 1 5 79, +C4<01001>;
|
|
v0x84b0c6d00_0 .net *"_ivl_2", 7 0, v0x84b15f840_9; 1 drivers
|
|
v0x84b0c6da0_0 .net *"_ivl_5", 7 0, v0x84b15f660_9; 1 drivers
|
|
S_0x84ae7c000 .scope generate, "GEN_BUS[10]" "GEN_BUS[10]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1505c0 .param/l "i" 1 5 79, +C4<01010>;
|
|
v0x84b0c6e40_0 .net *"_ivl_2", 7 0, v0x84b15f840_10; 1 drivers
|
|
v0x84b0c6ee0_0 .net *"_ivl_5", 7 0, v0x84b15f660_10; 1 drivers
|
|
S_0x84ae7c180 .scope generate, "GEN_BUS[11]" "GEN_BUS[11]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150600 .param/l "i" 1 5 79, +C4<01011>;
|
|
v0x84b0c6f80_0 .net *"_ivl_2", 7 0, v0x84b15f840_11; 1 drivers
|
|
v0x84b0c7020_0 .net *"_ivl_5", 7 0, v0x84b15f660_11; 1 drivers
|
|
S_0x84ae7c300 .scope generate, "GEN_BUS[12]" "GEN_BUS[12]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150640 .param/l "i" 1 5 79, +C4<01100>;
|
|
v0x84b0c70c0_0 .net *"_ivl_2", 7 0, v0x84b15f840_12; 1 drivers
|
|
v0x84b0c7160_0 .net *"_ivl_5", 7 0, v0x84b15f660_12; 1 drivers
|
|
S_0x84ae7c480 .scope generate, "GEN_BUS[13]" "GEN_BUS[13]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150680 .param/l "i" 1 5 79, +C4<01101>;
|
|
v0x84b0c7200_0 .net *"_ivl_2", 7 0, v0x84b15f840_13; 1 drivers
|
|
v0x84b0c72a0_0 .net *"_ivl_5", 7 0, v0x84b15f660_13; 1 drivers
|
|
S_0x84ae7c600 .scope generate, "GEN_BUS[14]" "GEN_BUS[14]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1506c0 .param/l "i" 1 5 79, +C4<01110>;
|
|
v0x84b0c7340_0 .net *"_ivl_2", 7 0, v0x84b15f840_14; 1 drivers
|
|
v0x84b0c73e0_0 .net *"_ivl_5", 7 0, v0x84b15f660_14; 1 drivers
|
|
S_0x84ae7c780 .scope generate, "GEN_BUS[15]" "GEN_BUS[15]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150700 .param/l "i" 1 5 79, +C4<01111>;
|
|
v0x84b0c7480_0 .net *"_ivl_2", 7 0, v0x84b15f840_15; 1 drivers
|
|
v0x84b0c7520_0 .net *"_ivl_5", 7 0, v0x84b15f660_15; 1 drivers
|
|
S_0x84ae7c900 .scope generate, "GEN_BUS[16]" "GEN_BUS[16]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150740 .param/l "i" 1 5 79, +C4<010000>;
|
|
v0x84b0c75c0_0 .net *"_ivl_2", 7 0, v0x84b15f840_16; 1 drivers
|
|
v0x84b0c7660_0 .net *"_ivl_5", 7 0, v0x84b15f660_16; 1 drivers
|
|
S_0x84ae7ca80 .scope generate, "GEN_BUS[17]" "GEN_BUS[17]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150780 .param/l "i" 1 5 79, +C4<010001>;
|
|
v0x84b0c7700_0 .net *"_ivl_2", 7 0, v0x84b15f840_17; 1 drivers
|
|
v0x84b0c77a0_0 .net *"_ivl_5", 7 0, v0x84b15f660_17; 1 drivers
|
|
S_0x84ae7cc00 .scope generate, "GEN_BUS[18]" "GEN_BUS[18]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1507c0 .param/l "i" 1 5 79, +C4<010010>;
|
|
v0x84b0c7840_0 .net *"_ivl_2", 7 0, v0x84b15f840_18; 1 drivers
|
|
v0x84b0c78e0_0 .net *"_ivl_5", 7 0, v0x84b15f660_18; 1 drivers
|
|
S_0x84ae7cd80 .scope generate, "GEN_BUS[19]" "GEN_BUS[19]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150800 .param/l "i" 1 5 79, +C4<010011>;
|
|
v0x84b0c7980_0 .net *"_ivl_2", 7 0, v0x84b15f840_19; 1 drivers
|
|
v0x84b0c7a20_0 .net *"_ivl_5", 7 0, v0x84b15f660_19; 1 drivers
|
|
S_0x84ae7cf00 .scope generate, "GEN_BUS[20]" "GEN_BUS[20]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150840 .param/l "i" 1 5 79, +C4<010100>;
|
|
v0x84b0c7ac0_0 .net *"_ivl_2", 7 0, v0x84b15f840_20; 1 drivers
|
|
v0x84b0c7b60_0 .net *"_ivl_5", 7 0, v0x84b15f660_20; 1 drivers
|
|
S_0x84ae7d080 .scope generate, "GEN_BUS[21]" "GEN_BUS[21]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150880 .param/l "i" 1 5 79, +C4<010101>;
|
|
v0x84b0c7c00_0 .net *"_ivl_2", 7 0, v0x84b15f840_21; 1 drivers
|
|
v0x84b0c7ca0_0 .net *"_ivl_5", 7 0, v0x84b15f660_21; 1 drivers
|
|
S_0x84ae7d200 .scope generate, "GEN_BUS[22]" "GEN_BUS[22]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1508c0 .param/l "i" 1 5 79, +C4<010110>;
|
|
v0x84b0c7d40_0 .net *"_ivl_2", 7 0, v0x84b15f840_22; 1 drivers
|
|
v0x84b0c7de0_0 .net *"_ivl_5", 7 0, v0x84b15f660_22; 1 drivers
|
|
S_0x84ae7d380 .scope generate, "GEN_BUS[23]" "GEN_BUS[23]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150900 .param/l "i" 1 5 79, +C4<010111>;
|
|
v0x84b0c7e80_0 .net *"_ivl_2", 7 0, v0x84b15f840_23; 1 drivers
|
|
v0x84b0c7f20_0 .net *"_ivl_5", 7 0, v0x84b15f660_23; 1 drivers
|
|
S_0x84ae7d500 .scope generate, "GEN_BUS[24]" "GEN_BUS[24]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150940 .param/l "i" 1 5 79, +C4<011000>;
|
|
v0x84b154000_0 .net *"_ivl_2", 7 0, v0x84b15f840_24; 1 drivers
|
|
v0x84b1540a0_0 .net *"_ivl_5", 7 0, v0x84b15f660_24; 1 drivers
|
|
S_0x84ae7d680 .scope generate, "GEN_BUS[25]" "GEN_BUS[25]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150980 .param/l "i" 1 5 79, +C4<011001>;
|
|
v0x84b154140_0 .net *"_ivl_2", 7 0, v0x84b15f840_25; 1 drivers
|
|
v0x84b1541e0_0 .net *"_ivl_5", 7 0, v0x84b15f660_25; 1 drivers
|
|
S_0x84ae7d800 .scope generate, "GEN_BUS[26]" "GEN_BUS[26]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b1509c0 .param/l "i" 1 5 79, +C4<011010>;
|
|
v0x84b154280_0 .net *"_ivl_2", 7 0, v0x84b15f840_26; 1 drivers
|
|
v0x84b154320_0 .net *"_ivl_5", 7 0, v0x84b15f660_26; 1 drivers
|
|
S_0x84ae7d980 .scope generate, "GEN_BUS[27]" "GEN_BUS[27]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150a00 .param/l "i" 1 5 79, +C4<011011>;
|
|
v0x84b1543c0_0 .net *"_ivl_2", 7 0, v0x84b15f840_27; 1 drivers
|
|
v0x84b154460_0 .net *"_ivl_5", 7 0, v0x84b15f660_27; 1 drivers
|
|
S_0x84ae7db00 .scope generate, "GEN_BUS[28]" "GEN_BUS[28]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150a40 .param/l "i" 1 5 79, +C4<011100>;
|
|
v0x84b154500_0 .net *"_ivl_2", 7 0, v0x84b15f840_28; 1 drivers
|
|
v0x84b1545a0_0 .net *"_ivl_5", 7 0, v0x84b15f660_28; 1 drivers
|
|
S_0x84ae7dc80 .scope generate, "GEN_BUS[29]" "GEN_BUS[29]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150a80 .param/l "i" 1 5 79, +C4<011101>;
|
|
v0x84b154640_0 .net *"_ivl_2", 7 0, v0x84b15f840_29; 1 drivers
|
|
v0x84b1546e0_0 .net *"_ivl_5", 7 0, v0x84b15f660_29; 1 drivers
|
|
S_0x84ae7de00 .scope generate, "GEN_BUS[30]" "GEN_BUS[30]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150ac0 .param/l "i" 1 5 79, +C4<011110>;
|
|
v0x84b154780_0 .net *"_ivl_2", 7 0, v0x84b15f840_30; 1 drivers
|
|
v0x84b154820_0 .net *"_ivl_5", 7 0, v0x84b15f660_30; 1 drivers
|
|
S_0x84ae7df80 .scope generate, "GEN_BUS[31]" "GEN_BUS[31]" 5 79, 5 79 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
P_0x84b150b00 .param/l "i" 1 5 79, +C4<011111>;
|
|
v0x84b1548c0_0 .net *"_ivl_2", 7 0, v0x84b15f840_31; 1 drivers
|
|
v0x84b154960_0 .net *"_ivl_5", 7 0, v0x84b15f660_31; 1 drivers
|
|
S_0x84ae7e100 .scope module, "u_mem" "int8_memory_access" 5 142, 6 1 0, S_0x102e269c0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "req";
|
|
.port_info 3 /INPUT 1 "wr";
|
|
.port_info 4 /INPUT 22 "addr";
|
|
.port_info 5 /INPUT 8 "wdata";
|
|
.port_info 6 /OUTPUT 8 "rdata";
|
|
.port_info 7 /OUTPUT 1 "ready";
|
|
.port_info 8 /OUTPUT 1 "mem_req";
|
|
.port_info 9 /OUTPUT 1 "mem_wr";
|
|
.port_info 10 /OUTPUT 22 "mem_addr";
|
|
.port_info 11 /OUTPUT 16 "mem_wdata";
|
|
.port_info 12 /OUTPUT 1 "mem_lb_n";
|
|
.port_info 13 /OUTPUT 1 "mem_ub_n";
|
|
.port_info 14 /INPUT 16 "mem_rdata";
|
|
.port_info 15 /INPUT 1 "mem_ready";
|
|
P_0x102e33f80 .param/l "ADDR_WIDTH" 0 6 2, +C4<00000000000000000000000000010110>;
|
|
P_0x102e33fc0 .param/l "STATE_IDLE" 1 6 40, C4<00>;
|
|
P_0x102e34000 .param/l "STATE_WAIT" 1 6 41, C4<01>;
|
|
v0x84b154a00_0 .net "addr", 21 0, v0x84b15e120_0; 1 drivers
|
|
v0x84b154aa0_0 .var "addr_reg", 21 0;
|
|
v0x84b154b40_0 .net "clk", 0 0, o0x84a845780; alias, 0 drivers
|
|
v0x84b154be0_0 .var "mem_addr", 21 0;
|
|
v0x84b154c80_0 .var "mem_lb_n", 0 0;
|
|
v0x84b154d20_0 .net "mem_rdata", 15 0, L_0x84b12a3a0; alias, 1 drivers
|
|
v0x84b154dc0_0 .net "mem_ready", 0 0, o0x84a845840; alias, 0 drivers
|
|
v0x84b154e60_0 .var "mem_req", 0 0;
|
|
v0x84b154f00_0 .var "mem_ub_n", 0 0;
|
|
v0x84b154fa0_0 .var "mem_wdata", 15 0;
|
|
v0x84b155040_0 .var "mem_wr", 0 0;
|
|
v0x84b1550e0_0 .var/s "rdata", 7 0;
|
|
v0x84b155180_0 .var "ready", 0 0;
|
|
v0x84b155220_0 .net "req", 0 0, v0x84b15e760_0; 1 drivers
|
|
v0x84b1552c0_0 .net "rst", 0 0, o0x84a8459c0; alias, 0 drivers
|
|
v0x84b155360_0 .var "state", 1 0;
|
|
v0x84b155400_0 .net/s "wdata", 7 0, v0x84b15e800_0; 1 drivers
|
|
v0x84b1554a0_0 .net "wr", 0 0, v0x84b15e8a0_0; 1 drivers
|
|
E_0x84ae463c0 .event posedge, v0x84b154b40_0;
|
|
S_0x84ae7e280 .scope module, "u_neuron" "neuron_parallel" 5 203, 7 1 0, S_0x102e269c0;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84ae7e400 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae7e440 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84ae7e480 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84ae7e4c0 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84ae7e500 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae7e540 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b15cb40_0 .net *"_ivl_0", 31 0, L_0x84b1921c0; 1 drivers
|
|
v0x84b15cbe0_0 .net *"_ivl_11", 31 0, L_0x84b192300; 1 drivers
|
|
v0x84b15cc80_0 .net *"_ivl_14", 31 0, L_0x84b1923a0; 1 drivers
|
|
L_0x84a878178 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15cd20_0 .net *"_ivl_17", 29 0, L_0x84a878178; 1 drivers
|
|
L_0x84a8781c0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15cdc0_0 .net/2u *"_ivl_18", 31 0, L_0x84a8781c0; 1 drivers
|
|
v0x84b15ce60_0 .net *"_ivl_21", 31 0, L_0x84b192440; 1 drivers
|
|
L_0x84a878208 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15cf00_0 .net/2u *"_ivl_22", 31 0, L_0x84a878208; 1 drivers
|
|
v0x84b15cfa0_0 .net *"_ivl_25", 31 0, L_0x84b1924e0; 1 drivers
|
|
v0x84b15d040_0 .net *"_ivl_29", 0 0, L_0x84ae3a4e0; 1 drivers
|
|
L_0x84a8780a0 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15d0e0_0 .net *"_ivl_3", 29 0, L_0x84a8780a0; 1 drivers
|
|
v0x84b15d180_0 .net *"_ivl_31", 23 0, L_0x84ae3a580; 1 drivers
|
|
L_0x84a8780e8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15d220_0 .net/2u *"_ivl_4", 31 0, L_0x84a8780e8; 1 drivers
|
|
v0x84b15d2c0_0 .net *"_ivl_7", 31 0, L_0x84b192260; 1 drivers
|
|
L_0x84a878130 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15d360_0 .net/2u *"_ivl_8", 31 0, L_0x84a878130; 1 drivers
|
|
v0x84b15d400_0 .var/s "acc", 31 0;
|
|
v0x84b15d4a0_0 .net/s "acc_next", 31 0, L_0x84ac8a4e0; 1 drivers
|
|
v0x84b15d540_0 .net/s "bias", 7 0, v0x84b15e9e0_0; 1 drivers
|
|
v0x84b15d5e0_0 .net/s "bias_ext", 31 0, L_0x84b193a20; 1 drivers
|
|
v0x84b15d680_0 .var "busy", 0 0;
|
|
v0x84b15d720_0 .net "clk", 0 0, o0x84a845780; alias, 0 drivers
|
|
v0x84b15d7c0_0 .var "done", 0 0;
|
|
v0x84b15d860_0 .net/s "final_acc", 31 0, L_0x84ac8a580; 1 drivers
|
|
v0x84b15d900_0 .var "group_index", 1 0;
|
|
v0x84b15d9a0_0 .net "rst", 0 0, o0x84a8459c0; alias, 0 drivers
|
|
v0x84b15da40_0 .net "start", 0 0, v0x84b15f200_0; 1 drivers
|
|
v0x84b15dae0_0 .net/s "w_bus", 255 0, L_0x84b191fe0; alias, 1 drivers
|
|
v0x84b15db80_0 .net/s "w_group", 63 0, L_0x84ae39040; 1 drivers
|
|
v0x84b15dc20_0 .net/s "x_bus", 255 0, L_0x84b191f40; alias, 1 drivers
|
|
v0x84b15dcc0_0 .net/s "x_group", 63 0, L_0x84ae38fa0; 1 drivers
|
|
v0x84b15dd60_0 .var/s "y", 7 0;
|
|
L_0x84b1921c0 .concat [ 2 30 0 0], v0x84b15d900_0, L_0x84a8780a0;
|
|
L_0x84b192260 .arith/mult 32, L_0x84b1921c0, L_0x84a8780e8;
|
|
L_0x84b192300 .arith/mult 32, L_0x84b192260, L_0x84a878130;
|
|
L_0x84ae38fa0 .part/v L_0x84b191f40, L_0x84b192300, 64;
|
|
L_0x84b1923a0 .concat [ 2 30 0 0], v0x84b15d900_0, L_0x84a878178;
|
|
L_0x84b192440 .arith/mult 32, L_0x84b1923a0, L_0x84a8781c0;
|
|
L_0x84b1924e0 .arith/mult 32, L_0x84b192440, L_0x84a878208;
|
|
L_0x84ae39040 .part/v L_0x84b191fe0, L_0x84b1924e0, 64;
|
|
L_0x84ae3a4e0 .part v0x84b15e9e0_0, 7, 1;
|
|
L_0x84ae3a580 .repeat 24, 24, L_0x84ae3a4e0;
|
|
L_0x84b193a20 .concat [ 8 24 0 0], v0x84b15e9e0_0, L_0x84ae3a580;
|
|
L_0x84ac8a580 .arith/sum 32, L_0x84ac8a4e0, L_0x84b193a20;
|
|
S_0x84ae7e580 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84ae7e280;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8200 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8240 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8280 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc82c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b15c780_0 .net/s "acc_in", 31 0, v0x84b15d400_0; 1 drivers
|
|
v0x84b15c820_0 .net/s "acc_out", 31 0, L_0x84ac8a4e0; alias, 1 drivers
|
|
v0x84b15c8c0 .array "products", 7 0;
|
|
v0x84b15c8c0_0 .net/s v0x84b15c8c0 0, 31 0, L_0x84ac89e00; 1 drivers
|
|
v0x84b15c8c0_1 .net/s v0x84b15c8c0 1, 31 0, L_0x84ac89c20; 1 drivers
|
|
v0x84b15c8c0_2 .net/s v0x84b15c8c0 2, 31 0, L_0x84ac89ae0; 1 drivers
|
|
v0x84b15c8c0_3 .net/s v0x84b15c8c0 3, 31 0, L_0x84ac89cc0; 1 drivers
|
|
v0x84b15c8c0_4 .net/s v0x84b15c8c0 4, 31 0, L_0x84ac89d60; 1 drivers
|
|
v0x84b15c8c0_5 .net/s v0x84b15c8c0 5, 31 0, L_0x84ac89ea0; 1 drivers
|
|
v0x84b15c8c0_6 .net/s v0x84b15c8c0 6, 31 0, L_0x84ac89f40; 1 drivers
|
|
v0x84b15c8c0_7 .net/s v0x84b15c8c0 7, 31 0, L_0x84ac89fe0; 1 drivers
|
|
v0x84b15c960 .array "tree", 31 0;
|
|
v0x84b15c960_0 .net/s v0x84b15c960 0, 31 0, L_0x84ac3f020; 1 drivers
|
|
v0x84b15c960_1 .net/s v0x84b15c960 1, 31 0, L_0x84ac3f090; 1 drivers
|
|
v0x84b15c960_2 .net/s v0x84b15c960 2, 31 0, L_0x84ac3f100; 1 drivers
|
|
v0x84b15c960_3 .net/s v0x84b15c960 3, 31 0, L_0x84ac3f170; 1 drivers
|
|
v0x84b15c960_4 .net/s v0x84b15c960 4, 31 0, L_0x84ac3f1e0; 1 drivers
|
|
v0x84b15c960_5 .net/s v0x84b15c960 5, 31 0, L_0x84ac3f250; 1 drivers
|
|
v0x84b15c960_6 .net/s v0x84b15c960 6, 31 0, L_0x84ac3f2c0; 1 drivers
|
|
v0x84b15c960_7 .net/s v0x84b15c960 7, 31 0, L_0x84ac3f330; 1 drivers
|
|
v0x84b15c960_8 .net/s v0x84b15c960 8, 31 0, L_0x84ac8a080; 1 drivers
|
|
v0x84b15c960_9 .net/s v0x84b15c960 9, 31 0, L_0x84ac8a120; 1 drivers
|
|
v0x84b15c960_10 .net/s v0x84b15c960 10, 31 0, L_0x84ac8a1c0; 1 drivers
|
|
v0x84b15c960_11 .net/s v0x84b15c960 11, 31 0, L_0x84ac8a260; 1 drivers
|
|
o0x84a847520 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_12 .net/s v0x84b15c960 12, 31 0, o0x84a847520; 0 drivers
|
|
o0x84a847550 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_13 .net/s v0x84b15c960 13, 31 0, o0x84a847550; 0 drivers
|
|
o0x84a847580 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_14 .net/s v0x84b15c960 14, 31 0, o0x84a847580; 0 drivers
|
|
o0x84a8475b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_15 .net/s v0x84b15c960 15, 31 0, o0x84a8475b0; 0 drivers
|
|
v0x84b15c960_16 .net/s v0x84b15c960 16, 31 0, L_0x84ac8a300; 1 drivers
|
|
v0x84b15c960_17 .net/s v0x84b15c960 17, 31 0, L_0x84ac8a3a0; 1 drivers
|
|
o0x84a847640 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_18 .net/s v0x84b15c960 18, 31 0, o0x84a847640; 0 drivers
|
|
o0x84a847670 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_19 .net/s v0x84b15c960 19, 31 0, o0x84a847670; 0 drivers
|
|
o0x84a8476a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_20 .net/s v0x84b15c960 20, 31 0, o0x84a8476a0; 0 drivers
|
|
o0x84a8476d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_21 .net/s v0x84b15c960 21, 31 0, o0x84a8476d0; 0 drivers
|
|
o0x84a847700 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_22 .net/s v0x84b15c960 22, 31 0, o0x84a847700; 0 drivers
|
|
o0x84a847730 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_23 .net/s v0x84b15c960 23, 31 0, o0x84a847730; 0 drivers
|
|
v0x84b15c960_24 .net/s v0x84b15c960 24, 31 0, L_0x84ac8a440; 1 drivers
|
|
o0x84a847790 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_25 .net/s v0x84b15c960 25, 31 0, o0x84a847790; 0 drivers
|
|
o0x84a8477c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_26 .net/s v0x84b15c960 26, 31 0, o0x84a8477c0; 0 drivers
|
|
o0x84a8477f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_27 .net/s v0x84b15c960 27, 31 0, o0x84a8477f0; 0 drivers
|
|
o0x84a847820 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_28 .net/s v0x84b15c960 28, 31 0, o0x84a847820; 0 drivers
|
|
o0x84a847850 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_29 .net/s v0x84b15c960 29, 31 0, o0x84a847850; 0 drivers
|
|
o0x84a847880 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_30 .net/s v0x84b15c960 30, 31 0, o0x84a847880; 0 drivers
|
|
o0x84a8478b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15c960_31 .net/s v0x84b15c960 31, 31 0, o0x84a8478b0; 0 drivers
|
|
v0x84b15ca00_0 .net/s "w_bus", 63 0, L_0x84ae39040; alias, 1 drivers
|
|
v0x84b15caa0_0 .net/s "x_bus", 63 0, L_0x84ae38fa0; alias, 1 drivers
|
|
L_0x84ae39220 .part L_0x84ae38fa0, 0, 8;
|
|
L_0x84ae392c0 .part L_0x84ae39040, 0, 8;
|
|
L_0x84ae394a0 .part L_0x84ae38fa0, 8, 8;
|
|
L_0x84ae39540 .part L_0x84ae39040, 8, 8;
|
|
L_0x84ae39720 .part L_0x84ae38fa0, 16, 8;
|
|
L_0x84ae397c0 .part L_0x84ae39040, 16, 8;
|
|
L_0x84ae399a0 .part L_0x84ae38fa0, 24, 8;
|
|
L_0x84ae39a40 .part L_0x84ae39040, 24, 8;
|
|
L_0x84ae39c20 .part L_0x84ae38fa0, 32, 8;
|
|
L_0x84ae39cc0 .part L_0x84ae39040, 32, 8;
|
|
L_0x84ae39ea0 .part L_0x84ae38fa0, 40, 8;
|
|
L_0x84ae39f40 .part L_0x84ae39040, 40, 8;
|
|
L_0x84ae3a120 .part L_0x84ae38fa0, 48, 8;
|
|
L_0x84ae3a1c0 .part L_0x84ae39040, 48, 8;
|
|
L_0x84ae3a3a0 .part L_0x84ae38fa0, 56, 8;
|
|
L_0x84ae3a440 .part L_0x84ae39040, 56, 8;
|
|
L_0x84ac8a4e0 .arith/sum 32, v0x84b15d400_0, L_0x84ac8a440;
|
|
S_0x84ae7e700 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150b40 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84ae7e880 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7e700;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x102e18c20 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x102e18c60 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x102e18ca0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b155540_0 .net/s *"_ivl_0", 15 0, L_0x84b192580; 1 drivers
|
|
v0x84b1555e0_0 .net/s *"_ivl_2", 15 0, L_0x84b192620; 1 drivers
|
|
v0x84b155680_0 .net *"_ivl_7", 0 0, L_0x84ae390e0; 1 drivers
|
|
v0x84b155720_0 .net *"_ivl_9", 15 0, L_0x84ae39180; 1 drivers
|
|
L_0x84a878250 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1557c0_0 .net/s "acc_in", 31 0, L_0x84a878250; 1 drivers
|
|
v0x84b155860_0 .net/s "acc_out", 31 0, L_0x84ac89e00; alias, 1 drivers
|
|
v0x84b155900_0 .net/s "product", 15 0, L_0x84b1926c0; 1 drivers
|
|
v0x84b1559a0_0 .net/s "product_ext", 31 0, L_0x84b192760; 1 drivers
|
|
v0x84b155a40_0 .net/s "w", 7 0, L_0x84ae392c0; 1 drivers
|
|
v0x84b155ae0_0 .net/s "x", 7 0, L_0x84ae39220; 1 drivers
|
|
L_0x84b192580 .extend/s 16, L_0x84ae39220;
|
|
L_0x84b192620 .extend/s 16, L_0x84ae392c0;
|
|
L_0x84b1926c0 .arith/mult 16, L_0x84b192580, L_0x84b192620;
|
|
L_0x84ae390e0 .part L_0x84b1926c0, 15, 1;
|
|
L_0x84ae39180 .repeat 16, 16, L_0x84ae390e0;
|
|
L_0x84b192760 .concat [ 16 16 0 0], L_0x84b1926c0, L_0x84ae39180;
|
|
L_0x84ac89e00 .arith/sum 32, L_0x84a878250, L_0x84b192760;
|
|
S_0x84ae7ea00 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150b80 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84ae7eb80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7ea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x102e304d0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x102e30510 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x102e30550 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b155b80_0 .net/s *"_ivl_0", 15 0, L_0x84b192800; 1 drivers
|
|
v0x84b155c20_0 .net/s *"_ivl_2", 15 0, L_0x84b1928a0; 1 drivers
|
|
v0x84b155cc0_0 .net *"_ivl_7", 0 0, L_0x84ae39360; 1 drivers
|
|
v0x84b155d60_0 .net *"_ivl_9", 15 0, L_0x84ae39400; 1 drivers
|
|
L_0x84a878298 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b155e00_0 .net/s "acc_in", 31 0, L_0x84a878298; 1 drivers
|
|
v0x84b155ea0_0 .net/s "acc_out", 31 0, L_0x84ac89c20; alias, 1 drivers
|
|
v0x84b155f40_0 .net/s "product", 15 0, L_0x84b192940; 1 drivers
|
|
v0x84b155fe0_0 .net/s "product_ext", 31 0, L_0x84b1929e0; 1 drivers
|
|
v0x84b156080_0 .net/s "w", 7 0, L_0x84ae39540; 1 drivers
|
|
v0x84b156120_0 .net/s "x", 7 0, L_0x84ae394a0; 1 drivers
|
|
L_0x84b192800 .extend/s 16, L_0x84ae394a0;
|
|
L_0x84b1928a0 .extend/s 16, L_0x84ae39540;
|
|
L_0x84b192940 .arith/mult 16, L_0x84b192800, L_0x84b1928a0;
|
|
L_0x84ae39360 .part L_0x84b192940, 15, 1;
|
|
L_0x84ae39400 .repeat 16, 16, L_0x84ae39360;
|
|
L_0x84b1929e0 .concat [ 16 16 0 0], L_0x84b192940, L_0x84ae39400;
|
|
L_0x84ac89c20 .arith/sum 32, L_0x84a878298, L_0x84b1929e0;
|
|
S_0x84ae7ed00 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150bc0 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84ae7ee80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7ed00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x102e26340 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x102e26380 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x102e263c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b1561c0_0 .net/s *"_ivl_0", 15 0, L_0x84b192a80; 1 drivers
|
|
v0x84b156260_0 .net/s *"_ivl_2", 15 0, L_0x84b192b20; 1 drivers
|
|
v0x84b156300_0 .net *"_ivl_7", 0 0, L_0x84ae395e0; 1 drivers
|
|
v0x84b1563a0_0 .net *"_ivl_9", 15 0, L_0x84ae39680; 1 drivers
|
|
L_0x84a8782e0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b156440_0 .net/s "acc_in", 31 0, L_0x84a8782e0; 1 drivers
|
|
v0x84b1564e0_0 .net/s "acc_out", 31 0, L_0x84ac89ae0; alias, 1 drivers
|
|
v0x84b156580_0 .net/s "product", 15 0, L_0x84b192bc0; 1 drivers
|
|
v0x84b156620_0 .net/s "product_ext", 31 0, L_0x84b192c60; 1 drivers
|
|
v0x84b1566c0_0 .net/s "w", 7 0, L_0x84ae397c0; 1 drivers
|
|
v0x84b156760_0 .net/s "x", 7 0, L_0x84ae39720; 1 drivers
|
|
L_0x84b192a80 .extend/s 16, L_0x84ae39720;
|
|
L_0x84b192b20 .extend/s 16, L_0x84ae397c0;
|
|
L_0x84b192bc0 .arith/mult 16, L_0x84b192a80, L_0x84b192b20;
|
|
L_0x84ae395e0 .part L_0x84b192bc0, 15, 1;
|
|
L_0x84ae39680 .repeat 16, 16, L_0x84ae395e0;
|
|
L_0x84b192c60 .concat [ 16 16 0 0], L_0x84b192bc0, L_0x84ae39680;
|
|
L_0x84ac89ae0 .arith/sum 32, L_0x84a8782e0, L_0x84b192c60;
|
|
S_0x84ae7f000 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150c00 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84ae7f180 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7f000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158000 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158040 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158080 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b156800_0 .net/s *"_ivl_0", 15 0, L_0x84b192d00; 1 drivers
|
|
v0x84b1568a0_0 .net/s *"_ivl_2", 15 0, L_0x84b192da0; 1 drivers
|
|
v0x84b156940_0 .net *"_ivl_7", 0 0, L_0x84ae39860; 1 drivers
|
|
v0x84b1569e0_0 .net *"_ivl_9", 15 0, L_0x84ae39900; 1 drivers
|
|
L_0x84a878328 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b156a80_0 .net/s "acc_in", 31 0, L_0x84a878328; 1 drivers
|
|
v0x84b156b20_0 .net/s "acc_out", 31 0, L_0x84ac89cc0; alias, 1 drivers
|
|
v0x84b156bc0_0 .net/s "product", 15 0, L_0x84b192e40; 1 drivers
|
|
v0x84b156c60_0 .net/s "product_ext", 31 0, L_0x84b192ee0; 1 drivers
|
|
v0x84b156d00_0 .net/s "w", 7 0, L_0x84ae39a40; 1 drivers
|
|
v0x84b156da0_0 .net/s "x", 7 0, L_0x84ae399a0; 1 drivers
|
|
L_0x84b192d00 .extend/s 16, L_0x84ae399a0;
|
|
L_0x84b192da0 .extend/s 16, L_0x84ae39a40;
|
|
L_0x84b192e40 .arith/mult 16, L_0x84b192d00, L_0x84b192da0;
|
|
L_0x84ae39860 .part L_0x84b192e40, 15, 1;
|
|
L_0x84ae39900 .repeat 16, 16, L_0x84ae39860;
|
|
L_0x84b192ee0 .concat [ 16 16 0 0], L_0x84b192e40, L_0x84ae39900;
|
|
L_0x84ac89cc0 .arith/sum 32, L_0x84a878328, L_0x84b192ee0;
|
|
S_0x84ae7f300 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150c40 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84ae7f480 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7f300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1580c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158100 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158140 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b156e40_0 .net/s *"_ivl_0", 15 0, L_0x84b192f80; 1 drivers
|
|
v0x84b156ee0_0 .net/s *"_ivl_2", 15 0, L_0x84b193020; 1 drivers
|
|
v0x84b156f80_0 .net *"_ivl_7", 0 0, L_0x84ae39ae0; 1 drivers
|
|
v0x84b157020_0 .net *"_ivl_9", 15 0, L_0x84ae39b80; 1 drivers
|
|
L_0x84a878370 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1570c0_0 .net/s "acc_in", 31 0, L_0x84a878370; 1 drivers
|
|
v0x84b157160_0 .net/s "acc_out", 31 0, L_0x84ac89d60; alias, 1 drivers
|
|
v0x84b157200_0 .net/s "product", 15 0, L_0x84b1930c0; 1 drivers
|
|
v0x84b1572a0_0 .net/s "product_ext", 31 0, L_0x84b193160; 1 drivers
|
|
v0x84b157340_0 .net/s "w", 7 0, L_0x84ae39cc0; 1 drivers
|
|
v0x84b1573e0_0 .net/s "x", 7 0, L_0x84ae39c20; 1 drivers
|
|
L_0x84b192f80 .extend/s 16, L_0x84ae39c20;
|
|
L_0x84b193020 .extend/s 16, L_0x84ae39cc0;
|
|
L_0x84b1930c0 .arith/mult 16, L_0x84b192f80, L_0x84b193020;
|
|
L_0x84ae39ae0 .part L_0x84b1930c0, 15, 1;
|
|
L_0x84ae39b80 .repeat 16, 16, L_0x84ae39ae0;
|
|
L_0x84b193160 .concat [ 16 16 0 0], L_0x84b1930c0, L_0x84ae39b80;
|
|
L_0x84ac89d60 .arith/sum 32, L_0x84a878370, L_0x84b193160;
|
|
S_0x84ae7f600 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150c80 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84ae7f780 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7f600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158180 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1581c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158200 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b157480_0 .net/s *"_ivl_0", 15 0, L_0x84b193200; 1 drivers
|
|
v0x84b157520_0 .net/s *"_ivl_2", 15 0, L_0x84b1932a0; 1 drivers
|
|
v0x84b1575c0_0 .net *"_ivl_7", 0 0, L_0x84ae39d60; 1 drivers
|
|
v0x84b157660_0 .net *"_ivl_9", 15 0, L_0x84ae39e00; 1 drivers
|
|
L_0x84a8783b8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b157700_0 .net/s "acc_in", 31 0, L_0x84a8783b8; 1 drivers
|
|
v0x84b1577a0_0 .net/s "acc_out", 31 0, L_0x84ac89ea0; alias, 1 drivers
|
|
v0x84b157840_0 .net/s "product", 15 0, L_0x84b193340; 1 drivers
|
|
v0x84b1578e0_0 .net/s "product_ext", 31 0, L_0x84b1933e0; 1 drivers
|
|
v0x84b157980_0 .net/s "w", 7 0, L_0x84ae39f40; 1 drivers
|
|
v0x84b157a20_0 .net/s "x", 7 0, L_0x84ae39ea0; 1 drivers
|
|
L_0x84b193200 .extend/s 16, L_0x84ae39ea0;
|
|
L_0x84b1932a0 .extend/s 16, L_0x84ae39f40;
|
|
L_0x84b193340 .arith/mult 16, L_0x84b193200, L_0x84b1932a0;
|
|
L_0x84ae39d60 .part L_0x84b193340, 15, 1;
|
|
L_0x84ae39e00 .repeat 16, 16, L_0x84ae39d60;
|
|
L_0x84b1933e0 .concat [ 16 16 0 0], L_0x84b193340, L_0x84ae39e00;
|
|
L_0x84ac89ea0 .arith/sum 32, L_0x84a8783b8, L_0x84b1933e0;
|
|
S_0x84ae7f900 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150cc0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84ae7fa80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7f900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158240 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158280 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b1582c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b157ac0_0 .net/s *"_ivl_0", 15 0, L_0x84b193480; 1 drivers
|
|
v0x84b157b60_0 .net/s *"_ivl_2", 15 0, L_0x84b193520; 1 drivers
|
|
v0x84b157c00_0 .net *"_ivl_7", 0 0, L_0x84ae39fe0; 1 drivers
|
|
v0x84b157ca0_0 .net *"_ivl_9", 15 0, L_0x84ae3a080; 1 drivers
|
|
L_0x84a878400 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b157d40_0 .net/s "acc_in", 31 0, L_0x84a878400; 1 drivers
|
|
v0x84b157de0_0 .net/s "acc_out", 31 0, L_0x84ac89f40; alias, 1 drivers
|
|
v0x84b157e80_0 .net/s "product", 15 0, L_0x84b1935c0; 1 drivers
|
|
v0x84b157f20_0 .net/s "product_ext", 31 0, L_0x84b193660; 1 drivers
|
|
v0x84b15c000_0 .net/s "w", 7 0, L_0x84ae3a1c0; 1 drivers
|
|
v0x84b15c0a0_0 .net/s "x", 7 0, L_0x84ae3a120; 1 drivers
|
|
L_0x84b193480 .extend/s 16, L_0x84ae3a120;
|
|
L_0x84b193520 .extend/s 16, L_0x84ae3a1c0;
|
|
L_0x84b1935c0 .arith/mult 16, L_0x84b193480, L_0x84b193520;
|
|
L_0x84ae39fe0 .part L_0x84b1935c0, 15, 1;
|
|
L_0x84ae3a080 .repeat 16, 16, L_0x84ae39fe0;
|
|
L_0x84b193660 .concat [ 16 16 0 0], L_0x84b1935c0, L_0x84ae3a080;
|
|
L_0x84ac89f40 .arith/sum 32, L_0x84a878400, L_0x84b193660;
|
|
S_0x84ae7fc00 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150d00 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84ae7fd80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae7fc00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158300 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158340 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158380 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b15c140_0 .net/s *"_ivl_0", 15 0, L_0x84b193700; 1 drivers
|
|
v0x84b15c1e0_0 .net/s *"_ivl_2", 15 0, L_0x84b1937a0; 1 drivers
|
|
v0x84b15c280_0 .net *"_ivl_7", 0 0, L_0x84ae3a260; 1 drivers
|
|
v0x84b15c320_0 .net *"_ivl_9", 15 0, L_0x84ae3a300; 1 drivers
|
|
L_0x84a878448 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b15c3c0_0 .net/s "acc_in", 31 0, L_0x84a878448; 1 drivers
|
|
v0x84b15c460_0 .net/s "acc_out", 31 0, L_0x84ac89fe0; alias, 1 drivers
|
|
v0x84b15c500_0 .net/s "product", 15 0, L_0x84b193840; 1 drivers
|
|
v0x84b15c5a0_0 .net/s "product_ext", 31 0, L_0x84b1938e0; 1 drivers
|
|
v0x84b15c640_0 .net/s "w", 7 0, L_0x84ae3a440; 1 drivers
|
|
v0x84b15c6e0_0 .net/s "x", 7 0, L_0x84ae3a3a0; 1 drivers
|
|
L_0x84b193700 .extend/s 16, L_0x84ae3a3a0;
|
|
L_0x84b1937a0 .extend/s 16, L_0x84ae3a440;
|
|
L_0x84b193840 .arith/mult 16, L_0x84b193700, L_0x84b1937a0;
|
|
L_0x84ae3a260 .part L_0x84b193840, 15, 1;
|
|
L_0x84ae3a300 .repeat 16, 16, L_0x84ae3a260;
|
|
L_0x84b1938e0 .concat [ 16 16 0 0], L_0x84b193840, L_0x84ae3a300;
|
|
L_0x84ac89fe0 .arith/sum 32, L_0x84a878448, L_0x84b1938e0;
|
|
S_0x84ae84000 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150d40 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84ac3f020 .functor BUFZ 32, L_0x84ac89e00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84180 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150d80 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84ac3f090 .functor BUFZ 32, L_0x84ac89c20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84300 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150dc0 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84ac3f100 .functor BUFZ 32, L_0x84ac89ae0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84480 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150e00 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84ac3f170 .functor BUFZ 32, L_0x84ac89cc0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84600 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150e40 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84ac3f1e0 .functor BUFZ 32, L_0x84ac89d60, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84780 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150e80 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84ac3f250 .functor BUFZ 32, L_0x84ac89ea0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84900 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150ec0 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84ac3f2c0 .functor BUFZ 32, L_0x84ac89f40, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84a80 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150f00 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84ac3f330 .functor BUFZ 32, L_0x84ac89fe0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae84c00 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b150f40 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84ae84d80 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae84c00;
|
|
.timescale 0 0;
|
|
P_0x84b150f80 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8a080 .arith/sum 32, L_0x84ac3f020, L_0x84ac3f090;
|
|
S_0x84ae84f00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae84c00;
|
|
.timescale 0 0;
|
|
P_0x84b150fc0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84ac8a120 .arith/sum 32, L_0x84ac3f100, L_0x84ac3f170;
|
|
S_0x84ae85080 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84ae84c00;
|
|
.timescale 0 0;
|
|
P_0x84b151000 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84ac8a1c0 .arith/sum 32, L_0x84ac3f1e0, L_0x84ac3f250;
|
|
S_0x84ae85200 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84ae84c00;
|
|
.timescale 0 0;
|
|
P_0x84b151040 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84ac8a260 .arith/sum 32, L_0x84ac3f2c0, L_0x84ac3f330;
|
|
S_0x84ae85380 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b151080 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84ae85500 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae85380;
|
|
.timescale 0 0;
|
|
P_0x84b1510c0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8a300 .arith/sum 32, L_0x84ac8a080, L_0x84ac8a120;
|
|
S_0x84ae85680 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae85380;
|
|
.timescale 0 0;
|
|
P_0x84b151100 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84ac8a3a0 .arith/sum 32, L_0x84ac8a1c0, L_0x84ac8a260;
|
|
S_0x84ae85800 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84ae7e580;
|
|
.timescale 0 0;
|
|
P_0x84b151140 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84ae85980 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae85800;
|
|
.timescale 0 0;
|
|
P_0x84b151180 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8a440 .arith/sum 32, L_0x84ac8a300, L_0x84ac8a3a0;
|
|
S_0x102e24c70 .scope module, "psram_controller" "psram_controller" 10 1;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "mem_req";
|
|
.port_info 3 /INPUT 1 "mem_wr";
|
|
.port_info 4 /INPUT 22 "mem_addr";
|
|
.port_info 5 /INPUT 16 "mem_wdata";
|
|
.port_info 6 /INPUT 1 "mem_lb_n";
|
|
.port_info 7 /INPUT 1 "mem_ub_n";
|
|
.port_info 8 /OUTPUT 16 "mem_rdata";
|
|
.port_info 9 /OUTPUT 1 "mem_ready";
|
|
.port_info 10 /OUTPUT 22 "psram_a";
|
|
.port_info 11 /INOUT 16 "psram_dq";
|
|
.port_info 12 /OUTPUT 1 "psram_ce_n";
|
|
.port_info 13 /OUTPUT 1 "psram_oe_n";
|
|
.port_info 14 /OUTPUT 1 "psram_we_n";
|
|
.port_info 15 /OUTPUT 1 "psram_lb_n";
|
|
.port_info 16 /OUTPUT 1 "psram_ub_n";
|
|
.port_info 17 /OUTPUT 1 "psram_zz_n";
|
|
P_0x102e301d0 .param/l "ACCESS_CYCLES" 1 10 43, +C4<00000000000000000000000000000110>;
|
|
P_0x102e30210 .param/l "ADDR_WIDTH" 0 10 2, +C4<00000000000000000000000000010110>;
|
|
P_0x102e30250 .param/l "CLK_FREQ_MHZ" 0 10 4, +C4<00000000000000000000000001010000>;
|
|
P_0x102e30290 .param/l "COUNTER_WIDTH" 1 10 49, +C4<00000000000000000000000000001110>;
|
|
P_0x102e302d0 .param/l "DATA_WIDTH" 0 10 3, +C4<00000000000000000000000000010000>;
|
|
P_0x102e30310 .param/l "INIT_CYCLES" 1 10 46, +C4<00000000000000000010111011100000>;
|
|
P_0x102e30350 .param/l "STATE_IDLE" 1 10 58, C4<001>;
|
|
P_0x102e30390 .param/l "STATE_INIT" 1 10 57, C4<000>;
|
|
P_0x102e303d0 .param/l "STATE_READ" 1 10 59, C4<010>;
|
|
P_0x102e30410 .param/l "STATE_WRITE" 1 10 60, C4<011>;
|
|
P_0x102e30450 .param/l "STATE_WRITE_WAIT" 1 10 61, C4<100>;
|
|
o0x84a849290 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
|
|
; Elide local net with no drivers, v0x84b15f980_0 name=_ivl_0
|
|
v0x84b15fa20_0 .var "address_reg", 21 0;
|
|
o0x84a8492f0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x84b15fac0_0 .net "clk", 0 0, o0x84a8492f0; 0 drivers
|
|
v0x84b15fb60_0 .var "counter", 13 0;
|
|
v0x84b15fc00_0 .var "dq_oe", 0 0;
|
|
v0x84b15fca0_0 .var "dq_out", 15 0;
|
|
v0x84b15fd40_0 .var "lb_reg", 0 0;
|
|
o0x84a8493e0 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b15fde0_0 .net "mem_addr", 21 0, o0x84a8493e0; 0 drivers
|
|
o0x84a849410 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x84b15fe80_0 .net "mem_lb_n", 0 0, o0x84a849410; 0 drivers
|
|
v0x84b15ff20_0 .var "mem_rdata", 15 0;
|
|
v0x84b160000_0 .var "mem_ready", 0 0;
|
|
o0x84a8494a0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x84b1600a0_0 .net "mem_req", 0 0, o0x84a8494a0; 0 drivers
|
|
o0x84a8494d0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x84b160140_0 .net "mem_ub_n", 0 0, o0x84a8494d0; 0 drivers
|
|
o0x84a849500 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1601e0_0 .net "mem_wdata", 15 0, o0x84a849500; 0 drivers
|
|
o0x84a849530 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x84b160280_0 .net "mem_wr", 0 0, o0x84a849530; 0 drivers
|
|
v0x84b160320_0 .var "psram_a", 21 0;
|
|
v0x84b1603c0_0 .var "psram_ce_n", 0 0;
|
|
v0x84b160460_0 .net "psram_dq", 15 0, L_0x84b12a440; 1 drivers
|
|
v0x84b160500_0 .var "psram_lb_n", 0 0;
|
|
v0x84b1605a0_0 .var "psram_oe_n", 0 0;
|
|
v0x84b160640_0 .var "psram_ub_n", 0 0;
|
|
v0x84b1606e0_0 .var "psram_we_n", 0 0;
|
|
v0x84b160780_0 .var "psram_zz_n", 0 0;
|
|
o0x84a8496e0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x84b160820_0 .net "rst", 0 0, o0x84a8496e0; 0 drivers
|
|
v0x84b1608c0_0 .var "state", 2 0;
|
|
v0x84b160960_0 .var "ub_reg", 0 0;
|
|
v0x84b160a00_0 .var "wdata_reg", 15 0;
|
|
v0x84b160aa0_0 .var "wr_reg", 0 0;
|
|
E_0x84ae46640 .event posedge, v0x84b15fac0_0;
|
|
L_0x84b12a440 .functor MUXZ 16, o0x84a849290, v0x84b15fca0_0, v0x84b15fc00_0, C4<>;
|
|
S_0x102e24df0 .scope module, "tb" "tb" 11 3;
|
|
.timescale -9 -12;
|
|
P_0x84b131f40 .param/l "ACC_WIDTH" 0 11 9, +C4<00000000000000000000000000100000>;
|
|
P_0x84b131f80 .param/l "DATA_WIDTH" 0 11 5, +C4<00000000000000000000000000001000>;
|
|
P_0x84b131fc0 .param/l "N_INPUTS" 0 11 6, +C4<00000000000000000000000000100000>;
|
|
P_0x84b132000 .param/l "N_NEURONS" 0 11 7, +C4<00000000000000000000000000001000>;
|
|
P_0x84b132040 .param/l "PARALLEL" 0 11 8, +C4<00000000000000000000000000001000>;
|
|
v0x84b191860_0 .var/s "bias_bus", 63 0;
|
|
v0x84b191900_0 .net "busy", 0 0, L_0x84aee9d60; 1 drivers
|
|
v0x84b1919a0_0 .var "clk", 0 0;
|
|
v0x84b191a40_0 .net "done", 0 0, L_0x84aee9e00; 1 drivers
|
|
v0x84b191ae0_0 .var/i "errors", 31 0;
|
|
v0x84b191b80_0 .var/i "i", 31 0;
|
|
v0x84b191c20_0 .var "rst", 0 0;
|
|
v0x84b191cc0_0 .var "start", 0 0;
|
|
v0x84b191d60_0 .var/s "weights_bus", 2047 0;
|
|
v0x84b191e00_0 .var/s "x_bus", 255 0;
|
|
v0x84b191ea0_0 .net/s "y_bus", 63 0, L_0x84b1a43c0; 1 drivers
|
|
S_0x84ae85b00 .scope module, "dut" "layer" 11 38, 12 1 0, S_0x102e24df0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 2048 "weights_bus";
|
|
.port_info 5 /INPUT 64 "bias_bus";
|
|
.port_info 6 /OUTPUT 64 "y_bus";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84b130a00 .param/l "ACC_WIDTH" 0 12 6, +C4<00000000000000000000000000100000>;
|
|
P_0x84b130a40 .param/l "DATA_WIDTH" 0 12 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b130a80 .param/l "N_INPUTS" 0 12 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b130ac0 .param/l "N_NEURONS" 0 12 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84b130b00 .param/l "PARALLEL" 0 12 5, +C4<00000000000000000000000000001000>;
|
|
v0x84b191180_0 .net/s "bias_bus", 63 0, v0x84b191860_0; 1 drivers
|
|
v0x84b191220_0 .net "busy", 0 0, L_0x84aee9d60; alias, 1 drivers
|
|
v0x84b1912c0_0 .net "clk", 0 0, v0x84b1919a0_0; 1 drivers
|
|
v0x84b191360_0 .net "done", 0 0, L_0x84aee9e00; alias, 1 drivers
|
|
v0x84b191400_0 .net "neuron_busy", 7 0, L_0x84b1a4500; 1 drivers
|
|
v0x84b1914a0_0 .net "neuron_done", 7 0, L_0x84b1a45a0; 1 drivers
|
|
v0x84b191540_0 .net "rst", 0 0, v0x84b191c20_0; 1 drivers
|
|
v0x84b1915e0_0 .net "start", 0 0, v0x84b191cc0_0; 1 drivers
|
|
v0x84b191680_0 .net/s "weights_bus", 2047 0, v0x84b191d60_0; 1 drivers
|
|
v0x84b191720_0 .net/s "x_bus", 255 0, v0x84b191e00_0; 1 drivers
|
|
v0x84b1917c0_0 .net/s "y_bus", 63 0, L_0x84b1a43c0; alias, 1 drivers
|
|
L_0x84ae3bca0 .part v0x84b191d60_0, 0, 256;
|
|
L_0x84ae3bd40 .part v0x84b191860_0, 0, 8;
|
|
L_0x84aeccd20 .part v0x84b191d60_0, 256, 256;
|
|
L_0x84aeccdc0 .part v0x84b191860_0, 8, 8;
|
|
L_0x84aece4e0 .part v0x84b191d60_0, 512, 256;
|
|
L_0x84aece580 .part v0x84b191860_0, 16, 8;
|
|
L_0x84aecfca0 .part v0x84b191d60_0, 768, 256;
|
|
L_0x84aecfd40 .part v0x84b191860_0, 24, 8;
|
|
L_0x84aee14a0 .part v0x84b191d60_0, 1024, 256;
|
|
L_0x84aee1540 .part v0x84b191860_0, 32, 8;
|
|
L_0x84aee2c60 .part v0x84b191d60_0, 1280, 256;
|
|
L_0x84aee2d00 .part v0x84b191860_0, 40, 8;
|
|
L_0x84aee8460 .part v0x84b191d60_0, 1536, 256;
|
|
L_0x84aee8500 .part v0x84b191860_0, 48, 8;
|
|
L_0x84aee9c20 .part v0x84b191d60_0, 1792, 256;
|
|
L_0x84aee9cc0 .part v0x84b191860_0, 56, 8;
|
|
LS_0x84b1a43c0_0_0 .concat8 [ 8 8 8 8], v0x84b169360_0, v0x84b16dc20_0, v0x84b1724e0_0, v0x84b176da0_0;
|
|
LS_0x84b1a43c0_0_4 .concat8 [ 8 8 8 8], v0x84b17f660_0, v0x84b183f20_0, v0x84b18c820_0, v0x84b1910e0_0;
|
|
L_0x84b1a43c0 .concat8 [ 32 32 0 0], LS_0x84b1a43c0_0_0, LS_0x84b1a43c0_0_4;
|
|
LS_0x84b1a4500_0_0 .concat8 [ 1 1 1 1], v0x84b168c80_0, v0x84b16d540_0, v0x84b171e00_0, v0x84b1766c0_0;
|
|
LS_0x84b1a4500_0_4 .concat8 [ 1 1 1 1], v0x84b17ef80_0, v0x84b183840_0, v0x84b18c140_0, v0x84b190a00_0;
|
|
L_0x84b1a4500 .concat8 [ 4 4 0 0], LS_0x84b1a4500_0_0, LS_0x84b1a4500_0_4;
|
|
LS_0x84b1a45a0_0_0 .concat8 [ 1 1 1 1], v0x84b168dc0_0, v0x84b16d680_0, v0x84b171f40_0, v0x84b176800_0;
|
|
LS_0x84b1a45a0_0_4 .concat8 [ 1 1 1 1], v0x84b17f0c0_0, v0x84b183980_0, v0x84b18c280_0, v0x84b190b40_0;
|
|
L_0x84b1a45a0 .concat8 [ 4 4 0 0], LS_0x84b1a45a0_0_0, LS_0x84b1a45a0_0_4;
|
|
L_0x84aee9d60 .reduce/or L_0x84b1a4500;
|
|
L_0x84aee9e00 .reduce/and L_0x84b1a45a0;
|
|
S_0x84ae85c80 .scope generate, "GEN_NEURON[0]" "GEN_NEURON[0]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b1511c0 .param/l "n" 1 12 34, +C4<00>;
|
|
S_0x84ae85e00 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84ae85c80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84ae85f80 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae85fc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84ae86000 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84ae86040 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84ae86080 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae860c0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b168140_0 .net *"_ivl_0", 31 0, L_0x84b193ac0; 1 drivers
|
|
v0x84b1681e0_0 .net *"_ivl_11", 31 0, L_0x84b193c00; 1 drivers
|
|
v0x84b168280_0 .net *"_ivl_14", 31 0, L_0x84b193ca0; 1 drivers
|
|
L_0x84a878568 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b168320_0 .net *"_ivl_17", 29 0, L_0x84a878568; 1 drivers
|
|
L_0x84a8785b0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1683c0_0 .net/2u *"_ivl_18", 31 0, L_0x84a8785b0; 1 drivers
|
|
v0x84b168460_0 .net *"_ivl_21", 31 0, L_0x84b193d40; 1 drivers
|
|
L_0x84a8785f8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b168500_0 .net/2u *"_ivl_22", 31 0, L_0x84a8785f8; 1 drivers
|
|
v0x84b1685a0_0 .net *"_ivl_25", 31 0, L_0x84b193de0; 1 drivers
|
|
v0x84b168640_0 .net *"_ivl_29", 0 0, L_0x84ae3bb60; 1 drivers
|
|
L_0x84a878490 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1686e0_0 .net *"_ivl_3", 29 0, L_0x84a878490; 1 drivers
|
|
v0x84b168780_0 .net *"_ivl_31", 23 0, L_0x84ae3bc00; 1 drivers
|
|
L_0x84a8784d8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b168820_0 .net/2u *"_ivl_4", 31 0, L_0x84a8784d8; 1 drivers
|
|
v0x84b1688c0_0 .net *"_ivl_7", 31 0, L_0x84b193b60; 1 drivers
|
|
L_0x84a878520 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b168960_0 .net/2u *"_ivl_8", 31 0, L_0x84a878520; 1 drivers
|
|
v0x84b168a00_0 .var/s "acc", 31 0;
|
|
v0x84b168aa0_0 .net/s "acc_next", 31 0, L_0x84ac8af80; 1 drivers
|
|
v0x84b168b40_0 .net/s "bias", 7 0, L_0x84ae3bd40; 1 drivers
|
|
v0x84b168be0_0 .net/s "bias_ext", 31 0, L_0x84b195360; 1 drivers
|
|
v0x84b168c80_0 .var "busy", 0 0;
|
|
v0x84b168d20_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b168dc0_0 .var "done", 0 0;
|
|
v0x84b168e60_0 .net/s "final_acc", 31 0, L_0x84ac8b020; 1 drivers
|
|
v0x84b168f00_0 .var "group_index", 1 0;
|
|
v0x84b168fa0_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b169040_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b1690e0_0 .net/s "w_bus", 255 0, L_0x84ae3bca0; 1 drivers
|
|
v0x84b169180_0 .net/s "w_group", 63 0, L_0x84ae3a6c0; 1 drivers
|
|
v0x84b169220_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b1692c0_0 .net/s "x_group", 63 0, L_0x84ae3a620; 1 drivers
|
|
v0x84b169360_0 .var/s "y", 7 0;
|
|
E_0x84ae46680 .event posedge, v0x84b168d20_0;
|
|
L_0x84b193ac0 .concat [ 2 30 0 0], v0x84b168f00_0, L_0x84a878490;
|
|
L_0x84b193b60 .arith/mult 32, L_0x84b193ac0, L_0x84a8784d8;
|
|
L_0x84b193c00 .arith/mult 32, L_0x84b193b60, L_0x84a878520;
|
|
L_0x84ae3a620 .part/v v0x84b191e00_0, L_0x84b193c00, 64;
|
|
L_0x84b193ca0 .concat [ 2 30 0 0], v0x84b168f00_0, L_0x84a878568;
|
|
L_0x84b193d40 .arith/mult 32, L_0x84b193ca0, L_0x84a8785b0;
|
|
L_0x84b193de0 .arith/mult 32, L_0x84b193d40, L_0x84a8785f8;
|
|
L_0x84ae3a6c0 .part/v L_0x84ae3bca0, L_0x84b193de0, 64;
|
|
L_0x84ae3bb60 .part L_0x84ae3bd40, 7, 1;
|
|
L_0x84ae3bc00 .repeat 24, 24, L_0x84ae3bb60;
|
|
L_0x84b195360 .concat [ 8 24 0 0], L_0x84ae3bd40, L_0x84ae3bc00;
|
|
L_0x84ac8b020 .arith/sum 32, L_0x84ac8af80, L_0x84b195360;
|
|
S_0x84ae86100 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84ae85e00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8300 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8340 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8380 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc83c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b163d40_0 .net/s "acc_in", 31 0, v0x84b168a00_0; 1 drivers
|
|
v0x84b163de0_0 .net/s "acc_out", 31 0, L_0x84ac8af80; alias, 1 drivers
|
|
v0x84b163e80 .array "products", 7 0;
|
|
v0x84b163e80_0 .net/s v0x84b163e80 0, 31 0, L_0x84ac8a620; 1 drivers
|
|
v0x84b163e80_1 .net/s v0x84b163e80 1, 31 0, L_0x84ac8a6c0; 1 drivers
|
|
v0x84b163e80_2 .net/s v0x84b163e80 2, 31 0, L_0x84ac8a760; 1 drivers
|
|
v0x84b163e80_3 .net/s v0x84b163e80 3, 31 0, L_0x84ac8a800; 1 drivers
|
|
v0x84b163e80_4 .net/s v0x84b163e80 4, 31 0, L_0x84ac8a8a0; 1 drivers
|
|
v0x84b163e80_5 .net/s v0x84b163e80 5, 31 0, L_0x84ac8a940; 1 drivers
|
|
v0x84b163e80_6 .net/s v0x84b163e80 6, 31 0, L_0x84ac8a9e0; 1 drivers
|
|
v0x84b163e80_7 .net/s v0x84b163e80 7, 31 0, L_0x84ac8aa80; 1 drivers
|
|
v0x84b163f20 .array "tree", 31 0;
|
|
v0x84b163f20_0 .net/s v0x84b163f20 0, 31 0, L_0x84ac3f3a0; 1 drivers
|
|
v0x84b163f20_1 .net/s v0x84b163f20 1, 31 0, L_0x84ac3f410; 1 drivers
|
|
v0x84b163f20_2 .net/s v0x84b163f20 2, 31 0, L_0x84ac3f480; 1 drivers
|
|
v0x84b163f20_3 .net/s v0x84b163f20 3, 31 0, L_0x84ac3f4f0; 1 drivers
|
|
v0x84b163f20_4 .net/s v0x84b163f20 4, 31 0, L_0x84ac3f560; 1 drivers
|
|
v0x84b163f20_5 .net/s v0x84b163f20 5, 31 0, L_0x84ac3f5d0; 1 drivers
|
|
v0x84b163f20_6 .net/s v0x84b163f20 6, 31 0, L_0x84ac3f640; 1 drivers
|
|
v0x84b163f20_7 .net/s v0x84b163f20 7, 31 0, L_0x84ac3f6b0; 1 drivers
|
|
v0x84b163f20_8 .net/s v0x84b163f20 8, 31 0, L_0x84ac8ab20; 1 drivers
|
|
v0x84b163f20_9 .net/s v0x84b163f20 9, 31 0, L_0x84ac8abc0; 1 drivers
|
|
v0x84b163f20_10 .net/s v0x84b163f20 10, 31 0, L_0x84ac8ac60; 1 drivers
|
|
v0x84b163f20_11 .net/s v0x84b163f20 11, 31 0, L_0x84ac8ad00; 1 drivers
|
|
o0x84a84b2d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_12 .net/s v0x84b163f20 12, 31 0, o0x84a84b2d0; 0 drivers
|
|
o0x84a84b300 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_13 .net/s v0x84b163f20 13, 31 0, o0x84a84b300; 0 drivers
|
|
o0x84a84b330 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_14 .net/s v0x84b163f20 14, 31 0, o0x84a84b330; 0 drivers
|
|
o0x84a84b360 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_15 .net/s v0x84b163f20 15, 31 0, o0x84a84b360; 0 drivers
|
|
v0x84b163f20_16 .net/s v0x84b163f20 16, 31 0, L_0x84ac8ada0; 1 drivers
|
|
v0x84b163f20_17 .net/s v0x84b163f20 17, 31 0, L_0x84ac8ae40; 1 drivers
|
|
o0x84a84b3f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_18 .net/s v0x84b163f20 18, 31 0, o0x84a84b3f0; 0 drivers
|
|
o0x84a84b420 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_19 .net/s v0x84b163f20 19, 31 0, o0x84a84b420; 0 drivers
|
|
o0x84a84b450 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_20 .net/s v0x84b163f20 20, 31 0, o0x84a84b450; 0 drivers
|
|
o0x84a84b480 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_21 .net/s v0x84b163f20 21, 31 0, o0x84a84b480; 0 drivers
|
|
o0x84a84b4b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_22 .net/s v0x84b163f20 22, 31 0, o0x84a84b4b0; 0 drivers
|
|
o0x84a84b4e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_23 .net/s v0x84b163f20 23, 31 0, o0x84a84b4e0; 0 drivers
|
|
v0x84b163f20_24 .net/s v0x84b163f20 24, 31 0, L_0x84ac8aee0; 1 drivers
|
|
o0x84a84b540 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_25 .net/s v0x84b163f20 25, 31 0, o0x84a84b540; 0 drivers
|
|
o0x84a84b570 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_26 .net/s v0x84b163f20 26, 31 0, o0x84a84b570; 0 drivers
|
|
o0x84a84b5a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_27 .net/s v0x84b163f20 27, 31 0, o0x84a84b5a0; 0 drivers
|
|
o0x84a84b5d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_28 .net/s v0x84b163f20 28, 31 0, o0x84a84b5d0; 0 drivers
|
|
o0x84a84b600 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_29 .net/s v0x84b163f20 29, 31 0, o0x84a84b600; 0 drivers
|
|
o0x84a84b630 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_30 .net/s v0x84b163f20 30, 31 0, o0x84a84b630; 0 drivers
|
|
o0x84a84b660 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b163f20_31 .net/s v0x84b163f20 31, 31 0, o0x84a84b660; 0 drivers
|
|
v0x84b168000_0 .net/s "w_bus", 63 0, L_0x84ae3a6c0; alias, 1 drivers
|
|
v0x84b1680a0_0 .net/s "x_bus", 63 0, L_0x84ae3a620; alias, 1 drivers
|
|
L_0x84ae3a8a0 .part L_0x84ae3a620, 0, 8;
|
|
L_0x84ae3a940 .part L_0x84ae3a6c0, 0, 8;
|
|
L_0x84ae3ab20 .part L_0x84ae3a620, 8, 8;
|
|
L_0x84ae3abc0 .part L_0x84ae3a6c0, 8, 8;
|
|
L_0x84ae3ada0 .part L_0x84ae3a620, 16, 8;
|
|
L_0x84ae3ae40 .part L_0x84ae3a6c0, 16, 8;
|
|
L_0x84ae3b020 .part L_0x84ae3a620, 24, 8;
|
|
L_0x84ae3b0c0 .part L_0x84ae3a6c0, 24, 8;
|
|
L_0x84ae3b2a0 .part L_0x84ae3a620, 32, 8;
|
|
L_0x84ae3b340 .part L_0x84ae3a6c0, 32, 8;
|
|
L_0x84ae3b520 .part L_0x84ae3a620, 40, 8;
|
|
L_0x84ae3b5c0 .part L_0x84ae3a6c0, 40, 8;
|
|
L_0x84ae3b7a0 .part L_0x84ae3a620, 48, 8;
|
|
L_0x84ae3b840 .part L_0x84ae3a6c0, 48, 8;
|
|
L_0x84ae3ba20 .part L_0x84ae3a620, 56, 8;
|
|
L_0x84ae3bac0 .part L_0x84ae3a6c0, 56, 8;
|
|
L_0x84ac8af80 .arith/sum 32, v0x84b168a00_0, L_0x84ac8aee0;
|
|
S_0x84ae86280 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151200 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84ae86400 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae86280;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1583c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158400 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158440 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b160b40_0 .net/s *"_ivl_0", 15 0, L_0x84b193e80; 1 drivers
|
|
v0x84b160be0_0 .net/s *"_ivl_2", 15 0, L_0x84b193f20; 1 drivers
|
|
v0x84b160c80_0 .net *"_ivl_7", 0 0, L_0x84ae3a760; 1 drivers
|
|
v0x84b160d20_0 .net *"_ivl_9", 15 0, L_0x84ae3a800; 1 drivers
|
|
L_0x84a878640 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b160dc0_0 .net/s "acc_in", 31 0, L_0x84a878640; 1 drivers
|
|
v0x84b160e60_0 .net/s "acc_out", 31 0, L_0x84ac8a620; alias, 1 drivers
|
|
v0x84b160f00_0 .net/s "product", 15 0, L_0x84b194000; 1 drivers
|
|
v0x84b160fa0_0 .net/s "product_ext", 31 0, L_0x84b1940a0; 1 drivers
|
|
v0x84b161040_0 .net/s "w", 7 0, L_0x84ae3a940; 1 drivers
|
|
v0x84b1610e0_0 .net/s "x", 7 0, L_0x84ae3a8a0; 1 drivers
|
|
L_0x84b193e80 .extend/s 16, L_0x84ae3a8a0;
|
|
L_0x84b193f20 .extend/s 16, L_0x84ae3a940;
|
|
L_0x84b194000 .arith/mult 16, L_0x84b193e80, L_0x84b193f20;
|
|
L_0x84ae3a760 .part L_0x84b194000, 15, 1;
|
|
L_0x84ae3a800 .repeat 16, 16, L_0x84ae3a760;
|
|
L_0x84b1940a0 .concat [ 16 16 0 0], L_0x84b194000, L_0x84ae3a800;
|
|
L_0x84ac8a620 .arith/sum 32, L_0x84a878640, L_0x84b1940a0;
|
|
S_0x84ae86580 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151240 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84ae86700 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae86580;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158480 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1584c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158500 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b161180_0 .net/s *"_ivl_0", 15 0, L_0x84b194140; 1 drivers
|
|
v0x84b161220_0 .net/s *"_ivl_2", 15 0, L_0x84b1941e0; 1 drivers
|
|
v0x84b1612c0_0 .net *"_ivl_7", 0 0, L_0x84ae3a9e0; 1 drivers
|
|
v0x84b161360_0 .net *"_ivl_9", 15 0, L_0x84ae3aa80; 1 drivers
|
|
L_0x84a878688 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b161400_0 .net/s "acc_in", 31 0, L_0x84a878688; 1 drivers
|
|
v0x84b1614a0_0 .net/s "acc_out", 31 0, L_0x84ac8a6c0; alias, 1 drivers
|
|
v0x84b161540_0 .net/s "product", 15 0, L_0x84b194280; 1 drivers
|
|
v0x84b1615e0_0 .net/s "product_ext", 31 0, L_0x84b194320; 1 drivers
|
|
v0x84b161680_0 .net/s "w", 7 0, L_0x84ae3abc0; 1 drivers
|
|
v0x84b161720_0 .net/s "x", 7 0, L_0x84ae3ab20; 1 drivers
|
|
L_0x84b194140 .extend/s 16, L_0x84ae3ab20;
|
|
L_0x84b1941e0 .extend/s 16, L_0x84ae3abc0;
|
|
L_0x84b194280 .arith/mult 16, L_0x84b194140, L_0x84b1941e0;
|
|
L_0x84ae3a9e0 .part L_0x84b194280, 15, 1;
|
|
L_0x84ae3aa80 .repeat 16, 16, L_0x84ae3a9e0;
|
|
L_0x84b194320 .concat [ 16 16 0 0], L_0x84b194280, L_0x84ae3aa80;
|
|
L_0x84ac8a6c0 .arith/sum 32, L_0x84a878688, L_0x84b194320;
|
|
S_0x84ae86880 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151280 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84ae86a00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae86880;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158540 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158580 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b1585c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b1617c0_0 .net/s *"_ivl_0", 15 0, L_0x84b1943c0; 1 drivers
|
|
v0x84b161860_0 .net/s *"_ivl_2", 15 0, L_0x84b194460; 1 drivers
|
|
v0x84b161900_0 .net *"_ivl_7", 0 0, L_0x84ae3ac60; 1 drivers
|
|
v0x84b1619a0_0 .net *"_ivl_9", 15 0, L_0x84ae3ad00; 1 drivers
|
|
L_0x84a8786d0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b161a40_0 .net/s "acc_in", 31 0, L_0x84a8786d0; 1 drivers
|
|
v0x84b161ae0_0 .net/s "acc_out", 31 0, L_0x84ac8a760; alias, 1 drivers
|
|
v0x84b161b80_0 .net/s "product", 15 0, L_0x84b194500; 1 drivers
|
|
v0x84b161c20_0 .net/s "product_ext", 31 0, L_0x84b1945a0; 1 drivers
|
|
v0x84b161cc0_0 .net/s "w", 7 0, L_0x84ae3ae40; 1 drivers
|
|
v0x84b161d60_0 .net/s "x", 7 0, L_0x84ae3ada0; 1 drivers
|
|
L_0x84b1943c0 .extend/s 16, L_0x84ae3ada0;
|
|
L_0x84b194460 .extend/s 16, L_0x84ae3ae40;
|
|
L_0x84b194500 .arith/mult 16, L_0x84b1943c0, L_0x84b194460;
|
|
L_0x84ae3ac60 .part L_0x84b194500, 15, 1;
|
|
L_0x84ae3ad00 .repeat 16, 16, L_0x84ae3ac60;
|
|
L_0x84b1945a0 .concat [ 16 16 0 0], L_0x84b194500, L_0x84ae3ad00;
|
|
L_0x84ac8a760 .arith/sum 32, L_0x84a8786d0, L_0x84b1945a0;
|
|
S_0x84ae86b80 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b1512c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84ae86d00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae86b80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158600 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158640 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158680 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b161e00_0 .net/s *"_ivl_0", 15 0, L_0x84b194640; 1 drivers
|
|
v0x84b161ea0_0 .net/s *"_ivl_2", 15 0, L_0x84b1946e0; 1 drivers
|
|
v0x84b161f40_0 .net *"_ivl_7", 0 0, L_0x84ae3aee0; 1 drivers
|
|
v0x84b161fe0_0 .net *"_ivl_9", 15 0, L_0x84ae3af80; 1 drivers
|
|
L_0x84a878718 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b162080_0 .net/s "acc_in", 31 0, L_0x84a878718; 1 drivers
|
|
v0x84b162120_0 .net/s "acc_out", 31 0, L_0x84ac8a800; alias, 1 drivers
|
|
v0x84b1621c0_0 .net/s "product", 15 0, L_0x84b194780; 1 drivers
|
|
v0x84b162260_0 .net/s "product_ext", 31 0, L_0x84b194820; 1 drivers
|
|
v0x84b162300_0 .net/s "w", 7 0, L_0x84ae3b0c0; 1 drivers
|
|
v0x84b1623a0_0 .net/s "x", 7 0, L_0x84ae3b020; 1 drivers
|
|
L_0x84b194640 .extend/s 16, L_0x84ae3b020;
|
|
L_0x84b1946e0 .extend/s 16, L_0x84ae3b0c0;
|
|
L_0x84b194780 .arith/mult 16, L_0x84b194640, L_0x84b1946e0;
|
|
L_0x84ae3aee0 .part L_0x84b194780, 15, 1;
|
|
L_0x84ae3af80 .repeat 16, 16, L_0x84ae3aee0;
|
|
L_0x84b194820 .concat [ 16 16 0 0], L_0x84b194780, L_0x84ae3af80;
|
|
L_0x84ac8a800 .arith/sum 32, L_0x84a878718, L_0x84b194820;
|
|
S_0x84ae86e80 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151300 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84ae87000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae86e80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1586c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158700 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158740 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b162440_0 .net/s *"_ivl_0", 15 0, L_0x84b1948c0; 1 drivers
|
|
v0x84b1624e0_0 .net/s *"_ivl_2", 15 0, L_0x84b194960; 1 drivers
|
|
v0x84b162580_0 .net *"_ivl_7", 0 0, L_0x84ae3b160; 1 drivers
|
|
v0x84b162620_0 .net *"_ivl_9", 15 0, L_0x84ae3b200; 1 drivers
|
|
L_0x84a878760 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1626c0_0 .net/s "acc_in", 31 0, L_0x84a878760; 1 drivers
|
|
v0x84b162760_0 .net/s "acc_out", 31 0, L_0x84ac8a8a0; alias, 1 drivers
|
|
v0x84b162800_0 .net/s "product", 15 0, L_0x84b194a00; 1 drivers
|
|
v0x84b1628a0_0 .net/s "product_ext", 31 0, L_0x84b194aa0; 1 drivers
|
|
v0x84b162940_0 .net/s "w", 7 0, L_0x84ae3b340; 1 drivers
|
|
v0x84b1629e0_0 .net/s "x", 7 0, L_0x84ae3b2a0; 1 drivers
|
|
L_0x84b1948c0 .extend/s 16, L_0x84ae3b2a0;
|
|
L_0x84b194960 .extend/s 16, L_0x84ae3b340;
|
|
L_0x84b194a00 .arith/mult 16, L_0x84b1948c0, L_0x84b194960;
|
|
L_0x84ae3b160 .part L_0x84b194a00, 15, 1;
|
|
L_0x84ae3b200 .repeat 16, 16, L_0x84ae3b160;
|
|
L_0x84b194aa0 .concat [ 16 16 0 0], L_0x84b194a00, L_0x84ae3b200;
|
|
L_0x84ac8a8a0 .arith/sum 32, L_0x84a878760, L_0x84b194aa0;
|
|
S_0x84ae87180 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151340 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84ae87300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae87180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158780 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1587c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158800 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b162a80_0 .net/s *"_ivl_0", 15 0, L_0x84b194b40; 1 drivers
|
|
v0x84b162b20_0 .net/s *"_ivl_2", 15 0, L_0x84b194be0; 1 drivers
|
|
v0x84b162bc0_0 .net *"_ivl_7", 0 0, L_0x84ae3b3e0; 1 drivers
|
|
v0x84b162c60_0 .net *"_ivl_9", 15 0, L_0x84ae3b480; 1 drivers
|
|
L_0x84a8787a8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b162d00_0 .net/s "acc_in", 31 0, L_0x84a8787a8; 1 drivers
|
|
v0x84b162da0_0 .net/s "acc_out", 31 0, L_0x84ac8a940; alias, 1 drivers
|
|
v0x84b162e40_0 .net/s "product", 15 0, L_0x84b194c80; 1 drivers
|
|
v0x84b162ee0_0 .net/s "product_ext", 31 0, L_0x84b194d20; 1 drivers
|
|
v0x84b162f80_0 .net/s "w", 7 0, L_0x84ae3b5c0; 1 drivers
|
|
v0x84b163020_0 .net/s "x", 7 0, L_0x84ae3b520; 1 drivers
|
|
L_0x84b194b40 .extend/s 16, L_0x84ae3b520;
|
|
L_0x84b194be0 .extend/s 16, L_0x84ae3b5c0;
|
|
L_0x84b194c80 .arith/mult 16, L_0x84b194b40, L_0x84b194be0;
|
|
L_0x84ae3b3e0 .part L_0x84b194c80, 15, 1;
|
|
L_0x84ae3b480 .repeat 16, 16, L_0x84ae3b3e0;
|
|
L_0x84b194d20 .concat [ 16 16 0 0], L_0x84b194c80, L_0x84ae3b480;
|
|
L_0x84ac8a940 .arith/sum 32, L_0x84a8787a8, L_0x84b194d20;
|
|
S_0x84ae87480 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151380 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84ae87600 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae87480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158840 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158880 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b1588c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b1630c0_0 .net/s *"_ivl_0", 15 0, L_0x84b194dc0; 1 drivers
|
|
v0x84b163160_0 .net/s *"_ivl_2", 15 0, L_0x84b194e60; 1 drivers
|
|
v0x84b163200_0 .net *"_ivl_7", 0 0, L_0x84ae3b660; 1 drivers
|
|
v0x84b1632a0_0 .net *"_ivl_9", 15 0, L_0x84ae3b700; 1 drivers
|
|
L_0x84a8787f0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b163340_0 .net/s "acc_in", 31 0, L_0x84a8787f0; 1 drivers
|
|
v0x84b1633e0_0 .net/s "acc_out", 31 0, L_0x84ac8a9e0; alias, 1 drivers
|
|
v0x84b163480_0 .net/s "product", 15 0, L_0x84b194f00; 1 drivers
|
|
v0x84b163520_0 .net/s "product_ext", 31 0, L_0x84b194fa0; 1 drivers
|
|
v0x84b1635c0_0 .net/s "w", 7 0, L_0x84ae3b840; 1 drivers
|
|
v0x84b163660_0 .net/s "x", 7 0, L_0x84ae3b7a0; 1 drivers
|
|
L_0x84b194dc0 .extend/s 16, L_0x84ae3b7a0;
|
|
L_0x84b194e60 .extend/s 16, L_0x84ae3b840;
|
|
L_0x84b194f00 .arith/mult 16, L_0x84b194dc0, L_0x84b194e60;
|
|
L_0x84ae3b660 .part L_0x84b194f00, 15, 1;
|
|
L_0x84ae3b700 .repeat 16, 16, L_0x84ae3b660;
|
|
L_0x84b194fa0 .concat [ 16 16 0 0], L_0x84b194f00, L_0x84ae3b700;
|
|
L_0x84ac8a9e0 .arith/sum 32, L_0x84a8787f0, L_0x84b194fa0;
|
|
S_0x84ae87780 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b1513c0 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84ae87900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae87780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158900 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158940 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158980 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b163700_0 .net/s *"_ivl_0", 15 0, L_0x84b195040; 1 drivers
|
|
v0x84b1637a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1950e0; 1 drivers
|
|
v0x84b163840_0 .net *"_ivl_7", 0 0, L_0x84ae3b8e0; 1 drivers
|
|
v0x84b1638e0_0 .net *"_ivl_9", 15 0, L_0x84ae3b980; 1 drivers
|
|
L_0x84a878838 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b163980_0 .net/s "acc_in", 31 0, L_0x84a878838; 1 drivers
|
|
v0x84b163a20_0 .net/s "acc_out", 31 0, L_0x84ac8aa80; alias, 1 drivers
|
|
v0x84b163ac0_0 .net/s "product", 15 0, L_0x84b195180; 1 drivers
|
|
v0x84b163b60_0 .net/s "product_ext", 31 0, L_0x84b195220; 1 drivers
|
|
v0x84b163c00_0 .net/s "w", 7 0, L_0x84ae3bac0; 1 drivers
|
|
v0x84b163ca0_0 .net/s "x", 7 0, L_0x84ae3ba20; 1 drivers
|
|
L_0x84b195040 .extend/s 16, L_0x84ae3ba20;
|
|
L_0x84b1950e0 .extend/s 16, L_0x84ae3bac0;
|
|
L_0x84b195180 .arith/mult 16, L_0x84b195040, L_0x84b1950e0;
|
|
L_0x84ae3b8e0 .part L_0x84b195180, 15, 1;
|
|
L_0x84ae3b980 .repeat 16, 16, L_0x84ae3b8e0;
|
|
L_0x84b195220 .concat [ 16 16 0 0], L_0x84b195180, L_0x84ae3b980;
|
|
L_0x84ac8aa80 .arith/sum 32, L_0x84a878838, L_0x84b195220;
|
|
S_0x84ae87a80 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151400 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84ac3f3a0 .functor BUFZ 32, L_0x84ac8a620, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae87c00 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151440 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84ac3f410 .functor BUFZ 32, L_0x84ac8a6c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae87d80 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151480 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84ac3f480 .functor BUFZ 32, L_0x84ac8a760, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae88000 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b1514c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84ac3f4f0 .functor BUFZ 32, L_0x84ac8a800, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae88180 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151500 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84ac3f560 .functor BUFZ 32, L_0x84ac8a8a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae88300 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151540 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84ac3f5d0 .functor BUFZ 32, L_0x84ac8a940, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae88480 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151580 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84ac3f640 .functor BUFZ 32, L_0x84ac8a9e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae88600 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b1515c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84ac3f6b0 .functor BUFZ 32, L_0x84ac8aa80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae88780 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151600 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84ae88900 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae88780;
|
|
.timescale 0 0;
|
|
P_0x84b151640 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8ab20 .arith/sum 32, L_0x84ac3f3a0, L_0x84ac3f410;
|
|
S_0x84ae88a80 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae88780;
|
|
.timescale 0 0;
|
|
P_0x84b151680 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84ac8abc0 .arith/sum 32, L_0x84ac3f480, L_0x84ac3f4f0;
|
|
S_0x84ae88c00 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84ae88780;
|
|
.timescale 0 0;
|
|
P_0x84b1516c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84ac8ac60 .arith/sum 32, L_0x84ac3f560, L_0x84ac3f5d0;
|
|
S_0x84ae88d80 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84ae88780;
|
|
.timescale 0 0;
|
|
P_0x84b151700 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84ac8ad00 .arith/sum 32, L_0x84ac3f640, L_0x84ac3f6b0;
|
|
S_0x84ae88f00 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151740 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84ae89080 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae88f00;
|
|
.timescale 0 0;
|
|
P_0x84b151780 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8ada0 .arith/sum 32, L_0x84ac8ab20, L_0x84ac8abc0;
|
|
S_0x84ae89200 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae88f00;
|
|
.timescale 0 0;
|
|
P_0x84b1517c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84ac8ae40 .arith/sum 32, L_0x84ac8ac60, L_0x84ac8ad00;
|
|
S_0x84ae89380 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84ae86100;
|
|
.timescale 0 0;
|
|
P_0x84b151800 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84ae89500 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae89380;
|
|
.timescale 0 0;
|
|
P_0x84b151840 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8aee0 .arith/sum 32, L_0x84ac8ada0, L_0x84ac8ae40;
|
|
S_0x84ae89680 .scope generate, "GEN_NEURON[1]" "GEN_NEURON[1]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b151880 .param/l "n" 1 12 34, +C4<01>;
|
|
S_0x84ae89800 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84ae89680;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84ae89980 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae899c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84ae89a00 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84ae89a40 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84ae89a80 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae89ac0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b16ca00_0 .net *"_ivl_0", 31 0, L_0x84b195400; 1 drivers
|
|
v0x84b16caa0_0 .net *"_ivl_11", 31 0, L_0x84b195540; 1 drivers
|
|
v0x84b16cb40_0 .net *"_ivl_14", 31 0, L_0x84b1955e0; 1 drivers
|
|
L_0x84a878958 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16cbe0_0 .net *"_ivl_17", 29 0, L_0x84a878958; 1 drivers
|
|
L_0x84a8789a0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16cc80_0 .net/2u *"_ivl_18", 31 0, L_0x84a8789a0; 1 drivers
|
|
v0x84b16cd20_0 .net *"_ivl_21", 31 0, L_0x84b195680; 1 drivers
|
|
L_0x84a8789e8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16cdc0_0 .net/2u *"_ivl_22", 31 0, L_0x84a8789e8; 1 drivers
|
|
v0x84b16ce60_0 .net *"_ivl_25", 31 0, L_0x84b195720; 1 drivers
|
|
v0x84b16cf00_0 .net *"_ivl_29", 0 0, L_0x84aeccbe0; 1 drivers
|
|
L_0x84a878880 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16cfa0_0 .net *"_ivl_3", 29 0, L_0x84a878880; 1 drivers
|
|
v0x84b16d040_0 .net *"_ivl_31", 23 0, L_0x84aeccc80; 1 drivers
|
|
L_0x84a8788c8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16d0e0_0 .net/2u *"_ivl_4", 31 0, L_0x84a8788c8; 1 drivers
|
|
v0x84b16d180_0 .net *"_ivl_7", 31 0, L_0x84b1954a0; 1 drivers
|
|
L_0x84a878910 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16d220_0 .net/2u *"_ivl_8", 31 0, L_0x84a878910; 1 drivers
|
|
v0x84b16d2c0_0 .var/s "acc", 31 0;
|
|
v0x84b16d360_0 .net/s "acc_next", 31 0, L_0x84ac8ba20; 1 drivers
|
|
v0x84b16d400_0 .net/s "bias", 7 0, L_0x84aeccdc0; 1 drivers
|
|
v0x84b16d4a0_0 .net/s "bias_ext", 31 0, L_0x84b196c60; 1 drivers
|
|
v0x84b16d540_0 .var "busy", 0 0;
|
|
v0x84b16d5e0_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b16d680_0 .var "done", 0 0;
|
|
v0x84b16d720_0 .net/s "final_acc", 31 0, L_0x84ac8bac0; 1 drivers
|
|
v0x84b16d7c0_0 .var "group_index", 1 0;
|
|
v0x84b16d860_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b16d900_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b16d9a0_0 .net/s "w_bus", 255 0, L_0x84aeccd20; 1 drivers
|
|
v0x84b16da40_0 .net/s "w_group", 63 0, L_0x84ae3be80; 1 drivers
|
|
v0x84b16dae0_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b16db80_0 .net/s "x_group", 63 0, L_0x84ae3bde0; 1 drivers
|
|
v0x84b16dc20_0 .var/s "y", 7 0;
|
|
L_0x84b195400 .concat [ 2 30 0 0], v0x84b16d7c0_0, L_0x84a878880;
|
|
L_0x84b1954a0 .arith/mult 32, L_0x84b195400, L_0x84a8788c8;
|
|
L_0x84b195540 .arith/mult 32, L_0x84b1954a0, L_0x84a878910;
|
|
L_0x84ae3bde0 .part/v v0x84b191e00_0, L_0x84b195540, 64;
|
|
L_0x84b1955e0 .concat [ 2 30 0 0], v0x84b16d7c0_0, L_0x84a878958;
|
|
L_0x84b195680 .arith/mult 32, L_0x84b1955e0, L_0x84a8789a0;
|
|
L_0x84b195720 .arith/mult 32, L_0x84b195680, L_0x84a8789e8;
|
|
L_0x84ae3be80 .part/v L_0x84aeccd20, L_0x84b195720, 64;
|
|
L_0x84aeccbe0 .part L_0x84aeccdc0, 7, 1;
|
|
L_0x84aeccc80 .repeat 24, 24, L_0x84aeccbe0;
|
|
L_0x84b196c60 .concat [ 8 24 0 0], L_0x84aeccdc0, L_0x84aeccc80;
|
|
L_0x84ac8bac0 .arith/sum 32, L_0x84ac8ba20, L_0x84b196c60;
|
|
S_0x84ae89b00 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84ae89800;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8400 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8440 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8480 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc84c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b16c640_0 .net/s "acc_in", 31 0, v0x84b16d2c0_0; 1 drivers
|
|
v0x84b16c6e0_0 .net/s "acc_out", 31 0, L_0x84ac8ba20; alias, 1 drivers
|
|
v0x84b16c780 .array "products", 7 0;
|
|
v0x84b16c780_0 .net/s v0x84b16c780 0, 31 0, L_0x84ac8b0c0; 1 drivers
|
|
v0x84b16c780_1 .net/s v0x84b16c780 1, 31 0, L_0x84ac8b160; 1 drivers
|
|
v0x84b16c780_2 .net/s v0x84b16c780 2, 31 0, L_0x84ac8b200; 1 drivers
|
|
v0x84b16c780_3 .net/s v0x84b16c780 3, 31 0, L_0x84ac8b2a0; 1 drivers
|
|
v0x84b16c780_4 .net/s v0x84b16c780 4, 31 0, L_0x84ac8b340; 1 drivers
|
|
v0x84b16c780_5 .net/s v0x84b16c780 5, 31 0, L_0x84ac8b3e0; 1 drivers
|
|
v0x84b16c780_6 .net/s v0x84b16c780 6, 31 0, L_0x84ac8b480; 1 drivers
|
|
v0x84b16c780_7 .net/s v0x84b16c780 7, 31 0, L_0x84ac8b520; 1 drivers
|
|
v0x84b16c820 .array "tree", 31 0;
|
|
v0x84b16c820_0 .net/s v0x84b16c820 0, 31 0, L_0x84ac3f720; 1 drivers
|
|
v0x84b16c820_1 .net/s v0x84b16c820 1, 31 0, L_0x84ac3f790; 1 drivers
|
|
v0x84b16c820_2 .net/s v0x84b16c820 2, 31 0, L_0x84ac3f800; 1 drivers
|
|
v0x84b16c820_3 .net/s v0x84b16c820 3, 31 0, L_0x84ac3f870; 1 drivers
|
|
v0x84b16c820_4 .net/s v0x84b16c820 4, 31 0, L_0x84ac3f8e0; 1 drivers
|
|
v0x84b16c820_5 .net/s v0x84b16c820 5, 31 0, L_0x84ac3f950; 1 drivers
|
|
v0x84b16c820_6 .net/s v0x84b16c820 6, 31 0, L_0x84ac3f9c0; 1 drivers
|
|
v0x84b16c820_7 .net/s v0x84b16c820 7, 31 0, L_0x84ac3fa30; 1 drivers
|
|
v0x84b16c820_8 .net/s v0x84b16c820 8, 31 0, L_0x84ac8b5c0; 1 drivers
|
|
v0x84b16c820_9 .net/s v0x84b16c820 9, 31 0, L_0x84ac8b660; 1 drivers
|
|
v0x84b16c820_10 .net/s v0x84b16c820 10, 31 0, L_0x84ac8b700; 1 drivers
|
|
v0x84b16c820_11 .net/s v0x84b16c820 11, 31 0, L_0x84ac8b7a0; 1 drivers
|
|
o0x84a84d5e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_12 .net/s v0x84b16c820 12, 31 0, o0x84a84d5e0; 0 drivers
|
|
o0x84a84d610 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_13 .net/s v0x84b16c820 13, 31 0, o0x84a84d610; 0 drivers
|
|
o0x84a84d640 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_14 .net/s v0x84b16c820 14, 31 0, o0x84a84d640; 0 drivers
|
|
o0x84a84d670 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_15 .net/s v0x84b16c820 15, 31 0, o0x84a84d670; 0 drivers
|
|
v0x84b16c820_16 .net/s v0x84b16c820 16, 31 0, L_0x84ac8b840; 1 drivers
|
|
v0x84b16c820_17 .net/s v0x84b16c820 17, 31 0, L_0x84ac8b8e0; 1 drivers
|
|
o0x84a84d700 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_18 .net/s v0x84b16c820 18, 31 0, o0x84a84d700; 0 drivers
|
|
o0x84a84d730 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_19 .net/s v0x84b16c820 19, 31 0, o0x84a84d730; 0 drivers
|
|
o0x84a84d760 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_20 .net/s v0x84b16c820 20, 31 0, o0x84a84d760; 0 drivers
|
|
o0x84a84d790 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_21 .net/s v0x84b16c820 21, 31 0, o0x84a84d790; 0 drivers
|
|
o0x84a84d7c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_22 .net/s v0x84b16c820 22, 31 0, o0x84a84d7c0; 0 drivers
|
|
o0x84a84d7f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_23 .net/s v0x84b16c820 23, 31 0, o0x84a84d7f0; 0 drivers
|
|
v0x84b16c820_24 .net/s v0x84b16c820 24, 31 0, L_0x84ac8b980; 1 drivers
|
|
o0x84a84d850 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_25 .net/s v0x84b16c820 25, 31 0, o0x84a84d850; 0 drivers
|
|
o0x84a84d880 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_26 .net/s v0x84b16c820 26, 31 0, o0x84a84d880; 0 drivers
|
|
o0x84a84d8b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_27 .net/s v0x84b16c820 27, 31 0, o0x84a84d8b0; 0 drivers
|
|
o0x84a84d8e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_28 .net/s v0x84b16c820 28, 31 0, o0x84a84d8e0; 0 drivers
|
|
o0x84a84d910 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_29 .net/s v0x84b16c820 29, 31 0, o0x84a84d910; 0 drivers
|
|
o0x84a84d940 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_30 .net/s v0x84b16c820 30, 31 0, o0x84a84d940; 0 drivers
|
|
o0x84a84d970 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b16c820_31 .net/s v0x84b16c820 31, 31 0, o0x84a84d970; 0 drivers
|
|
v0x84b16c8c0_0 .net/s "w_bus", 63 0, L_0x84ae3be80; alias, 1 drivers
|
|
v0x84b16c960_0 .net/s "x_bus", 63 0, L_0x84ae3bde0; alias, 1 drivers
|
|
L_0x84ae04780 .part L_0x84ae3bde0, 0, 8;
|
|
L_0x84adec500 .part L_0x84ae3be80, 0, 8;
|
|
L_0x84ad8fd40 .part L_0x84ae3bde0, 8, 8;
|
|
L_0x84ad5b7a0 .part L_0x84ae3be80, 8, 8;
|
|
L_0x84ad5b520 .part L_0x84ae3bde0, 16, 8;
|
|
L_0x84ad5b480 .part L_0x84ae3be80, 16, 8;
|
|
L_0x84aecc0a0 .part L_0x84ae3bde0, 24, 8;
|
|
L_0x84aecc140 .part L_0x84ae3be80, 24, 8;
|
|
L_0x84aecc320 .part L_0x84ae3bde0, 32, 8;
|
|
L_0x84aecc3c0 .part L_0x84ae3be80, 32, 8;
|
|
L_0x84aecc5a0 .part L_0x84ae3bde0, 40, 8;
|
|
L_0x84aecc640 .part L_0x84ae3be80, 40, 8;
|
|
L_0x84aecc820 .part L_0x84ae3bde0, 48, 8;
|
|
L_0x84aecc8c0 .part L_0x84ae3be80, 48, 8;
|
|
L_0x84aeccaa0 .part L_0x84ae3bde0, 56, 8;
|
|
L_0x84aeccb40 .part L_0x84ae3be80, 56, 8;
|
|
L_0x84ac8ba20 .arith/sum 32, v0x84b16d2c0_0, L_0x84ac8b980;
|
|
S_0x84ae89c80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b1518c0 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84ae89e00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae89c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1589c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158a00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158a40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b169400_0 .net/s *"_ivl_0", 15 0, L_0x84b1957c0; 1 drivers
|
|
v0x84b1694a0_0 .net/s *"_ivl_2", 15 0, L_0x84b195860; 1 drivers
|
|
v0x84b169540_0 .net *"_ivl_7", 0 0, L_0x84ae3bf20; 1 drivers
|
|
v0x84b1695e0_0 .net *"_ivl_9", 15 0, L_0x84ae20a00; 1 drivers
|
|
L_0x84a878a30 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b169680_0 .net/s "acc_in", 31 0, L_0x84a878a30; 1 drivers
|
|
v0x84b169720_0 .net/s "acc_out", 31 0, L_0x84ac8b0c0; alias, 1 drivers
|
|
v0x84b1697c0_0 .net/s "product", 15 0, L_0x84b195900; 1 drivers
|
|
v0x84b169860_0 .net/s "product_ext", 31 0, L_0x84b1959a0; 1 drivers
|
|
v0x84b169900_0 .net/s "w", 7 0, L_0x84adec500; 1 drivers
|
|
v0x84b1699a0_0 .net/s "x", 7 0, L_0x84ae04780; 1 drivers
|
|
L_0x84b1957c0 .extend/s 16, L_0x84ae04780;
|
|
L_0x84b195860 .extend/s 16, L_0x84adec500;
|
|
L_0x84b195900 .arith/mult 16, L_0x84b1957c0, L_0x84b195860;
|
|
L_0x84ae3bf20 .part L_0x84b195900, 15, 1;
|
|
L_0x84ae20a00 .repeat 16, 16, L_0x84ae3bf20;
|
|
L_0x84b1959a0 .concat [ 16 16 0 0], L_0x84b195900, L_0x84ae20a00;
|
|
L_0x84ac8b0c0 .arith/sum 32, L_0x84a878a30, L_0x84b1959a0;
|
|
S_0x84ae89f80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151900 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84ae8a100 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae89f80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158a80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158ac0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158b00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b169a40_0 .net/s *"_ivl_0", 15 0, L_0x84b195a40; 1 drivers
|
|
v0x84b169ae0_0 .net/s *"_ivl_2", 15 0, L_0x84b195ae0; 1 drivers
|
|
v0x84b169b80_0 .net *"_ivl_7", 0 0, L_0x84add8280; 1 drivers
|
|
v0x84b169c20_0 .net *"_ivl_9", 15 0, L_0x84adc0000; 1 drivers
|
|
L_0x84a878a78 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b169cc0_0 .net/s "acc_in", 31 0, L_0x84a878a78; 1 drivers
|
|
v0x84b169d60_0 .net/s "acc_out", 31 0, L_0x84ac8b160; alias, 1 drivers
|
|
v0x84b169e00_0 .net/s "product", 15 0, L_0x84b195b80; 1 drivers
|
|
v0x84b169ea0_0 .net/s "product_ext", 31 0, L_0x84b195c20; 1 drivers
|
|
v0x84b169f40_0 .net/s "w", 7 0, L_0x84ad5b7a0; 1 drivers
|
|
v0x84b169fe0_0 .net/s "x", 7 0, L_0x84ad8fd40; 1 drivers
|
|
L_0x84b195a40 .extend/s 16, L_0x84ad8fd40;
|
|
L_0x84b195ae0 .extend/s 16, L_0x84ad5b7a0;
|
|
L_0x84b195b80 .arith/mult 16, L_0x84b195a40, L_0x84b195ae0;
|
|
L_0x84add8280 .part L_0x84b195b80, 15, 1;
|
|
L_0x84adc0000 .repeat 16, 16, L_0x84add8280;
|
|
L_0x84b195c20 .concat [ 16 16 0 0], L_0x84b195b80, L_0x84adc0000;
|
|
L_0x84ac8b160 .arith/sum 32, L_0x84a878a78, L_0x84b195c20;
|
|
S_0x84ae8a280 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151940 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84ae8a400 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae8a280;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158b40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158b80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158bc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16a080_0 .net/s *"_ivl_0", 15 0, L_0x84b195cc0; 1 drivers
|
|
v0x84b16a120_0 .net/s *"_ivl_2", 15 0, L_0x84b195d60; 1 drivers
|
|
v0x84b16a1c0_0 .net *"_ivl_7", 0 0, L_0x84ad5b840; 1 drivers
|
|
v0x84b16a260_0 .net *"_ivl_9", 15 0, L_0x84ad5b980; 1 drivers
|
|
L_0x84a878ac0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16a300_0 .net/s "acc_in", 31 0, L_0x84a878ac0; 1 drivers
|
|
v0x84b16a3a0_0 .net/s "acc_out", 31 0, L_0x84ac8b200; alias, 1 drivers
|
|
v0x84b16a440_0 .net/s "product", 15 0, L_0x84b195e00; 1 drivers
|
|
v0x84b16a4e0_0 .net/s "product_ext", 31 0, L_0x84b195ea0; 1 drivers
|
|
v0x84b16a580_0 .net/s "w", 7 0, L_0x84ad5b480; 1 drivers
|
|
v0x84b16a620_0 .net/s "x", 7 0, L_0x84ad5b520; 1 drivers
|
|
L_0x84b195cc0 .extend/s 16, L_0x84ad5b520;
|
|
L_0x84b195d60 .extend/s 16, L_0x84ad5b480;
|
|
L_0x84b195e00 .arith/mult 16, L_0x84b195cc0, L_0x84b195d60;
|
|
L_0x84ad5b840 .part L_0x84b195e00, 15, 1;
|
|
L_0x84ad5b980 .repeat 16, 16, L_0x84ad5b840;
|
|
L_0x84b195ea0 .concat [ 16 16 0 0], L_0x84b195e00, L_0x84ad5b980;
|
|
L_0x84ac8b200 .arith/sum 32, L_0x84a878ac0, L_0x84b195ea0;
|
|
S_0x84ae8a580 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151980 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84ae8a700 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae8a580;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158c00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158c40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158c80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16a6c0_0 .net/s *"_ivl_0", 15 0, L_0x84b195f40; 1 drivers
|
|
v0x84b16a760_0 .net/s *"_ivl_2", 15 0, L_0x84b195fe0; 1 drivers
|
|
v0x84b16a800_0 .net *"_ivl_7", 0 0, L_0x84ad5b5c0; 1 drivers
|
|
v0x84b16a8a0_0 .net *"_ivl_9", 15 0, L_0x84aecc000; 1 drivers
|
|
L_0x84a878b08 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16a940_0 .net/s "acc_in", 31 0, L_0x84a878b08; 1 drivers
|
|
v0x84b16a9e0_0 .net/s "acc_out", 31 0, L_0x84ac8b2a0; alias, 1 drivers
|
|
v0x84b16aa80_0 .net/s "product", 15 0, L_0x84b196080; 1 drivers
|
|
v0x84b16ab20_0 .net/s "product_ext", 31 0, L_0x84b196120; 1 drivers
|
|
v0x84b16abc0_0 .net/s "w", 7 0, L_0x84aecc140; 1 drivers
|
|
v0x84b16ac60_0 .net/s "x", 7 0, L_0x84aecc0a0; 1 drivers
|
|
L_0x84b195f40 .extend/s 16, L_0x84aecc0a0;
|
|
L_0x84b195fe0 .extend/s 16, L_0x84aecc140;
|
|
L_0x84b196080 .arith/mult 16, L_0x84b195f40, L_0x84b195fe0;
|
|
L_0x84ad5b5c0 .part L_0x84b196080, 15, 1;
|
|
L_0x84aecc000 .repeat 16, 16, L_0x84ad5b5c0;
|
|
L_0x84b196120 .concat [ 16 16 0 0], L_0x84b196080, L_0x84aecc000;
|
|
L_0x84ac8b2a0 .arith/sum 32, L_0x84a878b08, L_0x84b196120;
|
|
S_0x84ae8a880 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b1519c0 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84ae8aa00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae8a880;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158cc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158d00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158d40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16ad00_0 .net/s *"_ivl_0", 15 0, L_0x84b1961c0; 1 drivers
|
|
v0x84b16ada0_0 .net/s *"_ivl_2", 15 0, L_0x84b196260; 1 drivers
|
|
v0x84b16ae40_0 .net *"_ivl_7", 0 0, L_0x84aecc1e0; 1 drivers
|
|
v0x84b16aee0_0 .net *"_ivl_9", 15 0, L_0x84aecc280; 1 drivers
|
|
L_0x84a878b50 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16af80_0 .net/s "acc_in", 31 0, L_0x84a878b50; 1 drivers
|
|
v0x84b16b020_0 .net/s "acc_out", 31 0, L_0x84ac8b340; alias, 1 drivers
|
|
v0x84b16b0c0_0 .net/s "product", 15 0, L_0x84b196300; 1 drivers
|
|
v0x84b16b160_0 .net/s "product_ext", 31 0, L_0x84b1963a0; 1 drivers
|
|
v0x84b16b200_0 .net/s "w", 7 0, L_0x84aecc3c0; 1 drivers
|
|
v0x84b16b2a0_0 .net/s "x", 7 0, L_0x84aecc320; 1 drivers
|
|
L_0x84b1961c0 .extend/s 16, L_0x84aecc320;
|
|
L_0x84b196260 .extend/s 16, L_0x84aecc3c0;
|
|
L_0x84b196300 .arith/mult 16, L_0x84b1961c0, L_0x84b196260;
|
|
L_0x84aecc1e0 .part L_0x84b196300, 15, 1;
|
|
L_0x84aecc280 .repeat 16, 16, L_0x84aecc1e0;
|
|
L_0x84b1963a0 .concat [ 16 16 0 0], L_0x84b196300, L_0x84aecc280;
|
|
L_0x84ac8b340 .arith/sum 32, L_0x84a878b50, L_0x84b1963a0;
|
|
S_0x84ae8ab80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151a00 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84ae8ad00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae8ab80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158d80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158dc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158e00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16b340_0 .net/s *"_ivl_0", 15 0, L_0x84b196440; 1 drivers
|
|
v0x84b16b3e0_0 .net/s *"_ivl_2", 15 0, L_0x84b1964e0; 1 drivers
|
|
v0x84b16b480_0 .net *"_ivl_7", 0 0, L_0x84aecc460; 1 drivers
|
|
v0x84b16b520_0 .net *"_ivl_9", 15 0, L_0x84aecc500; 1 drivers
|
|
L_0x84a878b98 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16b5c0_0 .net/s "acc_in", 31 0, L_0x84a878b98; 1 drivers
|
|
v0x84b16b660_0 .net/s "acc_out", 31 0, L_0x84ac8b3e0; alias, 1 drivers
|
|
v0x84b16b700_0 .net/s "product", 15 0, L_0x84b196580; 1 drivers
|
|
v0x84b16b7a0_0 .net/s "product_ext", 31 0, L_0x84b196620; 1 drivers
|
|
v0x84b16b840_0 .net/s "w", 7 0, L_0x84aecc640; 1 drivers
|
|
v0x84b16b8e0_0 .net/s "x", 7 0, L_0x84aecc5a0; 1 drivers
|
|
L_0x84b196440 .extend/s 16, L_0x84aecc5a0;
|
|
L_0x84b1964e0 .extend/s 16, L_0x84aecc640;
|
|
L_0x84b196580 .arith/mult 16, L_0x84b196440, L_0x84b1964e0;
|
|
L_0x84aecc460 .part L_0x84b196580, 15, 1;
|
|
L_0x84aecc500 .repeat 16, 16, L_0x84aecc460;
|
|
L_0x84b196620 .concat [ 16 16 0 0], L_0x84b196580, L_0x84aecc500;
|
|
L_0x84ac8b3e0 .arith/sum 32, L_0x84a878b98, L_0x84b196620;
|
|
S_0x84ae8ae80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151a40 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84ae8b000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae8ae80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158e40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158e80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158ec0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16b980_0 .net/s *"_ivl_0", 15 0, L_0x84b1966c0; 1 drivers
|
|
v0x84b16ba20_0 .net/s *"_ivl_2", 15 0, L_0x84b196760; 1 drivers
|
|
v0x84b16bac0_0 .net *"_ivl_7", 0 0, L_0x84aecc6e0; 1 drivers
|
|
v0x84b16bb60_0 .net *"_ivl_9", 15 0, L_0x84aecc780; 1 drivers
|
|
L_0x84a878be0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16bc00_0 .net/s "acc_in", 31 0, L_0x84a878be0; 1 drivers
|
|
v0x84b16bca0_0 .net/s "acc_out", 31 0, L_0x84ac8b480; alias, 1 drivers
|
|
v0x84b16bd40_0 .net/s "product", 15 0, L_0x84b196800; 1 drivers
|
|
v0x84b16bde0_0 .net/s "product_ext", 31 0, L_0x84b1968a0; 1 drivers
|
|
v0x84b16be80_0 .net/s "w", 7 0, L_0x84aecc8c0; 1 drivers
|
|
v0x84b16bf20_0 .net/s "x", 7 0, L_0x84aecc820; 1 drivers
|
|
L_0x84b1966c0 .extend/s 16, L_0x84aecc820;
|
|
L_0x84b196760 .extend/s 16, L_0x84aecc8c0;
|
|
L_0x84b196800 .arith/mult 16, L_0x84b1966c0, L_0x84b196760;
|
|
L_0x84aecc6e0 .part L_0x84b196800, 15, 1;
|
|
L_0x84aecc780 .repeat 16, 16, L_0x84aecc6e0;
|
|
L_0x84b1968a0 .concat [ 16 16 0 0], L_0x84b196800, L_0x84aecc780;
|
|
L_0x84ac8b480 .arith/sum 32, L_0x84a878be0, L_0x84b1968a0;
|
|
S_0x84ae8b180 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151a80 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84ae8b300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae8b180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158f00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b158f40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b158f80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16c000_0 .net/s *"_ivl_0", 15 0, L_0x84b196940; 1 drivers
|
|
v0x84b16c0a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1969e0; 1 drivers
|
|
v0x84b16c140_0 .net *"_ivl_7", 0 0, L_0x84aecc960; 1 drivers
|
|
v0x84b16c1e0_0 .net *"_ivl_9", 15 0, L_0x84aecca00; 1 drivers
|
|
L_0x84a878c28 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16c280_0 .net/s "acc_in", 31 0, L_0x84a878c28; 1 drivers
|
|
v0x84b16c320_0 .net/s "acc_out", 31 0, L_0x84ac8b520; alias, 1 drivers
|
|
v0x84b16c3c0_0 .net/s "product", 15 0, L_0x84b196a80; 1 drivers
|
|
v0x84b16c460_0 .net/s "product_ext", 31 0, L_0x84b196b20; 1 drivers
|
|
v0x84b16c500_0 .net/s "w", 7 0, L_0x84aeccb40; 1 drivers
|
|
v0x84b16c5a0_0 .net/s "x", 7 0, L_0x84aeccaa0; 1 drivers
|
|
L_0x84b196940 .extend/s 16, L_0x84aeccaa0;
|
|
L_0x84b1969e0 .extend/s 16, L_0x84aeccb40;
|
|
L_0x84b196a80 .arith/mult 16, L_0x84b196940, L_0x84b1969e0;
|
|
L_0x84aecc960 .part L_0x84b196a80, 15, 1;
|
|
L_0x84aecca00 .repeat 16, 16, L_0x84aecc960;
|
|
L_0x84b196b20 .concat [ 16 16 0 0], L_0x84b196a80, L_0x84aecca00;
|
|
L_0x84ac8b520 .arith/sum 32, L_0x84a878c28, L_0x84b196b20;
|
|
S_0x84ae8b480 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151ac0 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84ac3f720 .functor BUFZ 32, L_0x84ac8b0c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae8b600 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151b00 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84ac3f790 .functor BUFZ 32, L_0x84ac8b160, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae8b780 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151b40 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84ac3f800 .functor BUFZ 32, L_0x84ac8b200, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae8b900 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151b80 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84ac3f870 .functor BUFZ 32, L_0x84ac8b2a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae8ba80 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151bc0 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84ac3f8e0 .functor BUFZ 32, L_0x84ac8b340, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae8bc00 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151c00 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84ac3f950 .functor BUFZ 32, L_0x84ac8b3e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae8bd80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151c40 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84ac3f9c0 .functor BUFZ 32, L_0x84ac8b480, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae94000 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151c80 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84ac3fa30 .functor BUFZ 32, L_0x84ac8b520, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae94180 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151cc0 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84ae94300 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae94180;
|
|
.timescale 0 0;
|
|
P_0x84b151d00 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8b5c0 .arith/sum 32, L_0x84ac3f720, L_0x84ac3f790;
|
|
S_0x84ae94480 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae94180;
|
|
.timescale 0 0;
|
|
P_0x84b151d40 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84ac8b660 .arith/sum 32, L_0x84ac3f800, L_0x84ac3f870;
|
|
S_0x84ae94600 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84ae94180;
|
|
.timescale 0 0;
|
|
P_0x84b151d80 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84ac8b700 .arith/sum 32, L_0x84ac3f8e0, L_0x84ac3f950;
|
|
S_0x84ae94780 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84ae94180;
|
|
.timescale 0 0;
|
|
P_0x84b151dc0 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84ac8b7a0 .arith/sum 32, L_0x84ac3f9c0, L_0x84ac3fa30;
|
|
S_0x84ae94900 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151e00 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84ae94a80 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae94900;
|
|
.timescale 0 0;
|
|
P_0x84b151e40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8b840 .arith/sum 32, L_0x84ac8b5c0, L_0x84ac8b660;
|
|
S_0x84ae94c00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae94900;
|
|
.timescale 0 0;
|
|
P_0x84b151e80 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84ac8b8e0 .arith/sum 32, L_0x84ac8b700, L_0x84ac8b7a0;
|
|
S_0x84ae94d80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84ae89b00;
|
|
.timescale 0 0;
|
|
P_0x84b151ec0 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84ae94f00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae94d80;
|
|
.timescale 0 0;
|
|
P_0x84b151f00 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84ac8b980 .arith/sum 32, L_0x84ac8b840, L_0x84ac8b8e0;
|
|
S_0x84ae95080 .scope generate, "GEN_NEURON[2]" "GEN_NEURON[2]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b151f40 .param/l "n" 1 12 34, +C4<010>;
|
|
S_0x84ae95200 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84ae95080;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84ae95380 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae953c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84ae95400 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84ae95440 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84ae95480 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae954c0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b1712c0_0 .net *"_ivl_0", 31 0, L_0x84b196d00; 1 drivers
|
|
v0x84b171360_0 .net *"_ivl_11", 31 0, L_0x84b196e40; 1 drivers
|
|
v0x84b171400_0 .net *"_ivl_14", 31 0, L_0x84b196ee0; 1 drivers
|
|
L_0x84a878d48 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1714a0_0 .net *"_ivl_17", 29 0, L_0x84a878d48; 1 drivers
|
|
L_0x84a878d90 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b171540_0 .net/2u *"_ivl_18", 31 0, L_0x84a878d90; 1 drivers
|
|
v0x84b1715e0_0 .net *"_ivl_21", 31 0, L_0x84b196f80; 1 drivers
|
|
L_0x84a878dd8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b171680_0 .net/2u *"_ivl_22", 31 0, L_0x84a878dd8; 1 drivers
|
|
v0x84b171720_0 .net *"_ivl_25", 31 0, L_0x84b197020; 1 drivers
|
|
v0x84b1717c0_0 .net *"_ivl_29", 0 0, L_0x84aece3a0; 1 drivers
|
|
L_0x84a878c70 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b171860_0 .net *"_ivl_3", 29 0, L_0x84a878c70; 1 drivers
|
|
v0x84b171900_0 .net *"_ivl_31", 23 0, L_0x84aece440; 1 drivers
|
|
L_0x84a878cb8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1719a0_0 .net/2u *"_ivl_4", 31 0, L_0x84a878cb8; 1 drivers
|
|
v0x84b171a40_0 .net *"_ivl_7", 31 0, L_0x84b196da0; 1 drivers
|
|
L_0x84a878d00 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b171ae0_0 .net/2u *"_ivl_8", 31 0, L_0x84a878d00; 1 drivers
|
|
v0x84b171b80_0 .var/s "acc", 31 0;
|
|
v0x84b171c20_0 .net/s "acc_next", 31 0, L_0x84aed0500; 1 drivers
|
|
v0x84b171cc0_0 .net/s "bias", 7 0, L_0x84aece580; 1 drivers
|
|
v0x84b171d60_0 .net/s "bias_ext", 31 0, L_0x84b1985a0; 1 drivers
|
|
v0x84b171e00_0 .var "busy", 0 0;
|
|
v0x84b171ea0_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b171f40_0 .var "done", 0 0;
|
|
v0x84b171fe0_0 .net/s "final_acc", 31 0, L_0x84aed05a0; 1 drivers
|
|
v0x84b172080_0 .var "group_index", 1 0;
|
|
v0x84b172120_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b1721c0_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b172260_0 .net/s "w_bus", 255 0, L_0x84aece4e0; 1 drivers
|
|
v0x84b172300_0 .net/s "w_group", 63 0, L_0x84aeccf00; 1 drivers
|
|
v0x84b1723a0_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b172440_0 .net/s "x_group", 63 0, L_0x84aecce60; 1 drivers
|
|
v0x84b1724e0_0 .var/s "y", 7 0;
|
|
L_0x84b196d00 .concat [ 2 30 0 0], v0x84b172080_0, L_0x84a878c70;
|
|
L_0x84b196da0 .arith/mult 32, L_0x84b196d00, L_0x84a878cb8;
|
|
L_0x84b196e40 .arith/mult 32, L_0x84b196da0, L_0x84a878d00;
|
|
L_0x84aecce60 .part/v v0x84b191e00_0, L_0x84b196e40, 64;
|
|
L_0x84b196ee0 .concat [ 2 30 0 0], v0x84b172080_0, L_0x84a878d48;
|
|
L_0x84b196f80 .arith/mult 32, L_0x84b196ee0, L_0x84a878d90;
|
|
L_0x84b197020 .arith/mult 32, L_0x84b196f80, L_0x84a878dd8;
|
|
L_0x84aeccf00 .part/v L_0x84aece4e0, L_0x84b197020, 64;
|
|
L_0x84aece3a0 .part L_0x84aece580, 7, 1;
|
|
L_0x84aece440 .repeat 24, 24, L_0x84aece3a0;
|
|
L_0x84b1985a0 .concat [ 8 24 0 0], L_0x84aece580, L_0x84aece440;
|
|
L_0x84aed05a0 .arith/sum 32, L_0x84aed0500, L_0x84b1985a0;
|
|
S_0x84ae95500 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84ae95200;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8500 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8540 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8580 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc85c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b170f00_0 .net/s "acc_in", 31 0, v0x84b171b80_0; 1 drivers
|
|
v0x84b170fa0_0 .net/s "acc_out", 31 0, L_0x84aed0500; alias, 1 drivers
|
|
v0x84b171040 .array "products", 7 0;
|
|
v0x84b171040_0 .net/s v0x84b171040 0, 31 0, L_0x84ac8bb60; 1 drivers
|
|
v0x84b171040_1 .net/s v0x84b171040 1, 31 0, L_0x84ac8bc00; 1 drivers
|
|
v0x84b171040_2 .net/s v0x84b171040 2, 31 0, L_0x84ac8bca0; 1 drivers
|
|
v0x84b171040_3 .net/s v0x84b171040 3, 31 0, L_0x84ac8bd40; 1 drivers
|
|
v0x84b171040_4 .net/s v0x84b171040 4, 31 0, L_0x84ac8bde0; 1 drivers
|
|
v0x84b171040_5 .net/s v0x84b171040 5, 31 0, L_0x84ac8be80; 1 drivers
|
|
v0x84b171040_6 .net/s v0x84b171040 6, 31 0, L_0x84ac8bf20; 1 drivers
|
|
v0x84b171040_7 .net/s v0x84b171040 7, 31 0, L_0x84aed0000; 1 drivers
|
|
v0x84b1710e0 .array "tree", 31 0;
|
|
v0x84b1710e0_0 .net/s v0x84b1710e0 0, 31 0, L_0x84ac3faa0; 1 drivers
|
|
v0x84b1710e0_1 .net/s v0x84b1710e0 1, 31 0, L_0x84ac3fb10; 1 drivers
|
|
v0x84b1710e0_2 .net/s v0x84b1710e0 2, 31 0, L_0x84ac3fb80; 1 drivers
|
|
v0x84b1710e0_3 .net/s v0x84b1710e0 3, 31 0, L_0x84ac3fbf0; 1 drivers
|
|
v0x84b1710e0_4 .net/s v0x84b1710e0 4, 31 0, L_0x84ac3fc60; 1 drivers
|
|
v0x84b1710e0_5 .net/s v0x84b1710e0 5, 31 0, L_0x84ac3fcd0; 1 drivers
|
|
v0x84b1710e0_6 .net/s v0x84b1710e0 6, 31 0, L_0x84ac3fd40; 1 drivers
|
|
v0x84b1710e0_7 .net/s v0x84b1710e0 7, 31 0, L_0x84ac3fdb0; 1 drivers
|
|
v0x84b1710e0_8 .net/s v0x84b1710e0 8, 31 0, L_0x84aed00a0; 1 drivers
|
|
v0x84b1710e0_9 .net/s v0x84b1710e0 9, 31 0, L_0x84aed0140; 1 drivers
|
|
v0x84b1710e0_10 .net/s v0x84b1710e0 10, 31 0, L_0x84aed01e0; 1 drivers
|
|
v0x84b1710e0_11 .net/s v0x84b1710e0 11, 31 0, L_0x84aed0280; 1 drivers
|
|
o0x84a84f830 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_12 .net/s v0x84b1710e0 12, 31 0, o0x84a84f830; 0 drivers
|
|
o0x84a84f860 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_13 .net/s v0x84b1710e0 13, 31 0, o0x84a84f860; 0 drivers
|
|
o0x84a84f890 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_14 .net/s v0x84b1710e0 14, 31 0, o0x84a84f890; 0 drivers
|
|
o0x84a84f8c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_15 .net/s v0x84b1710e0 15, 31 0, o0x84a84f8c0; 0 drivers
|
|
v0x84b1710e0_16 .net/s v0x84b1710e0 16, 31 0, L_0x84aed0320; 1 drivers
|
|
v0x84b1710e0_17 .net/s v0x84b1710e0 17, 31 0, L_0x84aed03c0; 1 drivers
|
|
o0x84a84f950 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_18 .net/s v0x84b1710e0 18, 31 0, o0x84a84f950; 0 drivers
|
|
o0x84a84f980 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_19 .net/s v0x84b1710e0 19, 31 0, o0x84a84f980; 0 drivers
|
|
o0x84a84f9b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_20 .net/s v0x84b1710e0 20, 31 0, o0x84a84f9b0; 0 drivers
|
|
o0x84a84f9e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_21 .net/s v0x84b1710e0 21, 31 0, o0x84a84f9e0; 0 drivers
|
|
o0x84a84fa10 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_22 .net/s v0x84b1710e0 22, 31 0, o0x84a84fa10; 0 drivers
|
|
o0x84a84fa40 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_23 .net/s v0x84b1710e0 23, 31 0, o0x84a84fa40; 0 drivers
|
|
v0x84b1710e0_24 .net/s v0x84b1710e0 24, 31 0, L_0x84aed0460; 1 drivers
|
|
o0x84a84faa0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_25 .net/s v0x84b1710e0 25, 31 0, o0x84a84faa0; 0 drivers
|
|
o0x84a84fad0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_26 .net/s v0x84b1710e0 26, 31 0, o0x84a84fad0; 0 drivers
|
|
o0x84a84fb00 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_27 .net/s v0x84b1710e0 27, 31 0, o0x84a84fb00; 0 drivers
|
|
o0x84a84fb30 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_28 .net/s v0x84b1710e0 28, 31 0, o0x84a84fb30; 0 drivers
|
|
o0x84a84fb60 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_29 .net/s v0x84b1710e0 29, 31 0, o0x84a84fb60; 0 drivers
|
|
o0x84a84fb90 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_30 .net/s v0x84b1710e0 30, 31 0, o0x84a84fb90; 0 drivers
|
|
o0x84a84fbc0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1710e0_31 .net/s v0x84b1710e0 31, 31 0, o0x84a84fbc0; 0 drivers
|
|
v0x84b171180_0 .net/s "w_bus", 63 0, L_0x84aeccf00; alias, 1 drivers
|
|
v0x84b171220_0 .net/s "x_bus", 63 0, L_0x84aecce60; alias, 1 drivers
|
|
L_0x84aecd0e0 .part L_0x84aecce60, 0, 8;
|
|
L_0x84aecd180 .part L_0x84aeccf00, 0, 8;
|
|
L_0x84aecd360 .part L_0x84aecce60, 8, 8;
|
|
L_0x84aecd400 .part L_0x84aeccf00, 8, 8;
|
|
L_0x84aecd5e0 .part L_0x84aecce60, 16, 8;
|
|
L_0x84aecd680 .part L_0x84aeccf00, 16, 8;
|
|
L_0x84aecd860 .part L_0x84aecce60, 24, 8;
|
|
L_0x84aecd900 .part L_0x84aeccf00, 24, 8;
|
|
L_0x84aecdae0 .part L_0x84aecce60, 32, 8;
|
|
L_0x84aecdb80 .part L_0x84aeccf00, 32, 8;
|
|
L_0x84aecdd60 .part L_0x84aecce60, 40, 8;
|
|
L_0x84aecde00 .part L_0x84aeccf00, 40, 8;
|
|
L_0x84aecdfe0 .part L_0x84aecce60, 48, 8;
|
|
L_0x84aece080 .part L_0x84aeccf00, 48, 8;
|
|
L_0x84aece260 .part L_0x84aecce60, 56, 8;
|
|
L_0x84aece300 .part L_0x84aeccf00, 56, 8;
|
|
L_0x84aed0500 .arith/sum 32, v0x84b171b80_0, L_0x84aed0460;
|
|
S_0x84ae95680 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b151f80 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84ae95800 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae95680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b158fc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159000 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159040 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16dcc0_0 .net/s *"_ivl_0", 15 0, L_0x84b1970c0; 1 drivers
|
|
v0x84b16dd60_0 .net/s *"_ivl_2", 15 0, L_0x84b197160; 1 drivers
|
|
v0x84b16de00_0 .net *"_ivl_7", 0 0, L_0x84aeccfa0; 1 drivers
|
|
v0x84b16dea0_0 .net *"_ivl_9", 15 0, L_0x84aecd040; 1 drivers
|
|
L_0x84a878e20 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16df40_0 .net/s "acc_in", 31 0, L_0x84a878e20; 1 drivers
|
|
v0x84b16dfe0_0 .net/s "acc_out", 31 0, L_0x84ac8bb60; alias, 1 drivers
|
|
v0x84b16e080_0 .net/s "product", 15 0, L_0x84b197200; 1 drivers
|
|
v0x84b16e120_0 .net/s "product_ext", 31 0, L_0x84b1972a0; 1 drivers
|
|
v0x84b16e1c0_0 .net/s "w", 7 0, L_0x84aecd180; 1 drivers
|
|
v0x84b16e260_0 .net/s "x", 7 0, L_0x84aecd0e0; 1 drivers
|
|
L_0x84b1970c0 .extend/s 16, L_0x84aecd0e0;
|
|
L_0x84b197160 .extend/s 16, L_0x84aecd180;
|
|
L_0x84b197200 .arith/mult 16, L_0x84b1970c0, L_0x84b197160;
|
|
L_0x84aeccfa0 .part L_0x84b197200, 15, 1;
|
|
L_0x84aecd040 .repeat 16, 16, L_0x84aeccfa0;
|
|
L_0x84b1972a0 .concat [ 16 16 0 0], L_0x84b197200, L_0x84aecd040;
|
|
L_0x84ac8bb60 .arith/sum 32, L_0x84a878e20, L_0x84b1972a0;
|
|
S_0x84ae95980 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b151fc0 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84ae95b00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae95980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159080 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1590c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159100 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16e300_0 .net/s *"_ivl_0", 15 0, L_0x84b197340; 1 drivers
|
|
v0x84b16e3a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1973e0; 1 drivers
|
|
v0x84b16e440_0 .net *"_ivl_7", 0 0, L_0x84aecd220; 1 drivers
|
|
v0x84b16e4e0_0 .net *"_ivl_9", 15 0, L_0x84aecd2c0; 1 drivers
|
|
L_0x84a878e68 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16e580_0 .net/s "acc_in", 31 0, L_0x84a878e68; 1 drivers
|
|
v0x84b16e620_0 .net/s "acc_out", 31 0, L_0x84ac8bc00; alias, 1 drivers
|
|
v0x84b16e6c0_0 .net/s "product", 15 0, L_0x84b197480; 1 drivers
|
|
v0x84b16e760_0 .net/s "product_ext", 31 0, L_0x84b197520; 1 drivers
|
|
v0x84b16e800_0 .net/s "w", 7 0, L_0x84aecd400; 1 drivers
|
|
v0x84b16e8a0_0 .net/s "x", 7 0, L_0x84aecd360; 1 drivers
|
|
L_0x84b197340 .extend/s 16, L_0x84aecd360;
|
|
L_0x84b1973e0 .extend/s 16, L_0x84aecd400;
|
|
L_0x84b197480 .arith/mult 16, L_0x84b197340, L_0x84b1973e0;
|
|
L_0x84aecd220 .part L_0x84b197480, 15, 1;
|
|
L_0x84aecd2c0 .repeat 16, 16, L_0x84aecd220;
|
|
L_0x84b197520 .concat [ 16 16 0 0], L_0x84b197480, L_0x84aecd2c0;
|
|
L_0x84ac8bc00 .arith/sum 32, L_0x84a878e68, L_0x84b197520;
|
|
S_0x84ae95c80 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152000 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84ae95e00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae95c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159140 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159180 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b1591c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16e940_0 .net/s *"_ivl_0", 15 0, L_0x84b1975c0; 1 drivers
|
|
v0x84b16e9e0_0 .net/s *"_ivl_2", 15 0, L_0x84b197660; 1 drivers
|
|
v0x84b16ea80_0 .net *"_ivl_7", 0 0, L_0x84aecd4a0; 1 drivers
|
|
v0x84b16eb20_0 .net *"_ivl_9", 15 0, L_0x84aecd540; 1 drivers
|
|
L_0x84a878eb0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16ebc0_0 .net/s "acc_in", 31 0, L_0x84a878eb0; 1 drivers
|
|
v0x84b16ec60_0 .net/s "acc_out", 31 0, L_0x84ac8bca0; alias, 1 drivers
|
|
v0x84b16ed00_0 .net/s "product", 15 0, L_0x84b197700; 1 drivers
|
|
v0x84b16eda0_0 .net/s "product_ext", 31 0, L_0x84b1977a0; 1 drivers
|
|
v0x84b16ee40_0 .net/s "w", 7 0, L_0x84aecd680; 1 drivers
|
|
v0x84b16eee0_0 .net/s "x", 7 0, L_0x84aecd5e0; 1 drivers
|
|
L_0x84b1975c0 .extend/s 16, L_0x84aecd5e0;
|
|
L_0x84b197660 .extend/s 16, L_0x84aecd680;
|
|
L_0x84b197700 .arith/mult 16, L_0x84b1975c0, L_0x84b197660;
|
|
L_0x84aecd4a0 .part L_0x84b197700, 15, 1;
|
|
L_0x84aecd540 .repeat 16, 16, L_0x84aecd4a0;
|
|
L_0x84b1977a0 .concat [ 16 16 0 0], L_0x84b197700, L_0x84aecd540;
|
|
L_0x84ac8bca0 .arith/sum 32, L_0x84a878eb0, L_0x84b1977a0;
|
|
S_0x84ae95f80 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152040 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84ae96100 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae95f80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159200 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159240 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159280 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16ef80_0 .net/s *"_ivl_0", 15 0, L_0x84b197840; 1 drivers
|
|
v0x84b16f020_0 .net/s *"_ivl_2", 15 0, L_0x84b1978e0; 1 drivers
|
|
v0x84b16f0c0_0 .net *"_ivl_7", 0 0, L_0x84aecd720; 1 drivers
|
|
v0x84b16f160_0 .net *"_ivl_9", 15 0, L_0x84aecd7c0; 1 drivers
|
|
L_0x84a878ef8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16f200_0 .net/s "acc_in", 31 0, L_0x84a878ef8; 1 drivers
|
|
v0x84b16f2a0_0 .net/s "acc_out", 31 0, L_0x84ac8bd40; alias, 1 drivers
|
|
v0x84b16f340_0 .net/s "product", 15 0, L_0x84b197980; 1 drivers
|
|
v0x84b16f3e0_0 .net/s "product_ext", 31 0, L_0x84b197a20; 1 drivers
|
|
v0x84b16f480_0 .net/s "w", 7 0, L_0x84aecd900; 1 drivers
|
|
v0x84b16f520_0 .net/s "x", 7 0, L_0x84aecd860; 1 drivers
|
|
L_0x84b197840 .extend/s 16, L_0x84aecd860;
|
|
L_0x84b1978e0 .extend/s 16, L_0x84aecd900;
|
|
L_0x84b197980 .arith/mult 16, L_0x84b197840, L_0x84b1978e0;
|
|
L_0x84aecd720 .part L_0x84b197980, 15, 1;
|
|
L_0x84aecd7c0 .repeat 16, 16, L_0x84aecd720;
|
|
L_0x84b197a20 .concat [ 16 16 0 0], L_0x84b197980, L_0x84aecd7c0;
|
|
L_0x84ac8bd40 .arith/sum 32, L_0x84a878ef8, L_0x84b197a20;
|
|
S_0x84ae96280 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152080 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84ae96400 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae96280;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1592c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159300 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159340 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16f5c0_0 .net/s *"_ivl_0", 15 0, L_0x84b197ac0; 1 drivers
|
|
v0x84b16f660_0 .net/s *"_ivl_2", 15 0, L_0x84b197b60; 1 drivers
|
|
v0x84b16f700_0 .net *"_ivl_7", 0 0, L_0x84aecd9a0; 1 drivers
|
|
v0x84b16f7a0_0 .net *"_ivl_9", 15 0, L_0x84aecda40; 1 drivers
|
|
L_0x84a878f40 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16f840_0 .net/s "acc_in", 31 0, L_0x84a878f40; 1 drivers
|
|
v0x84b16f8e0_0 .net/s "acc_out", 31 0, L_0x84ac8bde0; alias, 1 drivers
|
|
v0x84b16f980_0 .net/s "product", 15 0, L_0x84b197c00; 1 drivers
|
|
v0x84b16fa20_0 .net/s "product_ext", 31 0, L_0x84b197ca0; 1 drivers
|
|
v0x84b16fac0_0 .net/s "w", 7 0, L_0x84aecdb80; 1 drivers
|
|
v0x84b16fb60_0 .net/s "x", 7 0, L_0x84aecdae0; 1 drivers
|
|
L_0x84b197ac0 .extend/s 16, L_0x84aecdae0;
|
|
L_0x84b197b60 .extend/s 16, L_0x84aecdb80;
|
|
L_0x84b197c00 .arith/mult 16, L_0x84b197ac0, L_0x84b197b60;
|
|
L_0x84aecd9a0 .part L_0x84b197c00, 15, 1;
|
|
L_0x84aecda40 .repeat 16, 16, L_0x84aecd9a0;
|
|
L_0x84b197ca0 .concat [ 16 16 0 0], L_0x84b197c00, L_0x84aecda40;
|
|
L_0x84ac8bde0 .arith/sum 32, L_0x84a878f40, L_0x84b197ca0;
|
|
S_0x84ae96580 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b1520c0 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84ae96700 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae96580;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159380 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1593c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159400 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b16fc00_0 .net/s *"_ivl_0", 15 0, L_0x84b197d40; 1 drivers
|
|
v0x84b16fca0_0 .net/s *"_ivl_2", 15 0, L_0x84b197de0; 1 drivers
|
|
v0x84b16fd40_0 .net *"_ivl_7", 0 0, L_0x84aecdc20; 1 drivers
|
|
v0x84b16fde0_0 .net *"_ivl_9", 15 0, L_0x84aecdcc0; 1 drivers
|
|
L_0x84a878f88 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b16fe80_0 .net/s "acc_in", 31 0, L_0x84a878f88; 1 drivers
|
|
v0x84b16ff20_0 .net/s "acc_out", 31 0, L_0x84ac8be80; alias, 1 drivers
|
|
v0x84b170000_0 .net/s "product", 15 0, L_0x84b197e80; 1 drivers
|
|
v0x84b1700a0_0 .net/s "product_ext", 31 0, L_0x84b197f20; 1 drivers
|
|
v0x84b170140_0 .net/s "w", 7 0, L_0x84aecde00; 1 drivers
|
|
v0x84b1701e0_0 .net/s "x", 7 0, L_0x84aecdd60; 1 drivers
|
|
L_0x84b197d40 .extend/s 16, L_0x84aecdd60;
|
|
L_0x84b197de0 .extend/s 16, L_0x84aecde00;
|
|
L_0x84b197e80 .arith/mult 16, L_0x84b197d40, L_0x84b197de0;
|
|
L_0x84aecdc20 .part L_0x84b197e80, 15, 1;
|
|
L_0x84aecdcc0 .repeat 16, 16, L_0x84aecdc20;
|
|
L_0x84b197f20 .concat [ 16 16 0 0], L_0x84b197e80, L_0x84aecdcc0;
|
|
L_0x84ac8be80 .arith/sum 32, L_0x84a878f88, L_0x84b197f20;
|
|
S_0x84ae96880 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152100 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84ae96a00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae96880;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159440 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159480 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b1594c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b170280_0 .net/s *"_ivl_0", 15 0, L_0x84b198000; 1 drivers
|
|
v0x84b170320_0 .net/s *"_ivl_2", 15 0, L_0x84b1980a0; 1 drivers
|
|
v0x84b1703c0_0 .net *"_ivl_7", 0 0, L_0x84aecdea0; 1 drivers
|
|
v0x84b170460_0 .net *"_ivl_9", 15 0, L_0x84aecdf40; 1 drivers
|
|
L_0x84a878fd0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b170500_0 .net/s "acc_in", 31 0, L_0x84a878fd0; 1 drivers
|
|
v0x84b1705a0_0 .net/s "acc_out", 31 0, L_0x84ac8bf20; alias, 1 drivers
|
|
v0x84b170640_0 .net/s "product", 15 0, L_0x84b198140; 1 drivers
|
|
v0x84b1706e0_0 .net/s "product_ext", 31 0, L_0x84b1981e0; 1 drivers
|
|
v0x84b170780_0 .net/s "w", 7 0, L_0x84aece080; 1 drivers
|
|
v0x84b170820_0 .net/s "x", 7 0, L_0x84aecdfe0; 1 drivers
|
|
L_0x84b198000 .extend/s 16, L_0x84aecdfe0;
|
|
L_0x84b1980a0 .extend/s 16, L_0x84aece080;
|
|
L_0x84b198140 .arith/mult 16, L_0x84b198000, L_0x84b1980a0;
|
|
L_0x84aecdea0 .part L_0x84b198140, 15, 1;
|
|
L_0x84aecdf40 .repeat 16, 16, L_0x84aecdea0;
|
|
L_0x84b1981e0 .concat [ 16 16 0 0], L_0x84b198140, L_0x84aecdf40;
|
|
L_0x84ac8bf20 .arith/sum 32, L_0x84a878fd0, L_0x84b1981e0;
|
|
S_0x84ae96b80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152140 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84ae96d00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae96b80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159500 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159540 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159580 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b1708c0_0 .net/s *"_ivl_0", 15 0, L_0x84b198280; 1 drivers
|
|
v0x84b170960_0 .net/s *"_ivl_2", 15 0, L_0x84b198320; 1 drivers
|
|
v0x84b170a00_0 .net *"_ivl_7", 0 0, L_0x84aece120; 1 drivers
|
|
v0x84b170aa0_0 .net *"_ivl_9", 15 0, L_0x84aece1c0; 1 drivers
|
|
L_0x84a879018 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b170b40_0 .net/s "acc_in", 31 0, L_0x84a879018; 1 drivers
|
|
v0x84b170be0_0 .net/s "acc_out", 31 0, L_0x84aed0000; alias, 1 drivers
|
|
v0x84b170c80_0 .net/s "product", 15 0, L_0x84b1983c0; 1 drivers
|
|
v0x84b170d20_0 .net/s "product_ext", 31 0, L_0x84b198460; 1 drivers
|
|
v0x84b170dc0_0 .net/s "w", 7 0, L_0x84aece300; 1 drivers
|
|
v0x84b170e60_0 .net/s "x", 7 0, L_0x84aece260; 1 drivers
|
|
L_0x84b198280 .extend/s 16, L_0x84aece260;
|
|
L_0x84b198320 .extend/s 16, L_0x84aece300;
|
|
L_0x84b1983c0 .arith/mult 16, L_0x84b198280, L_0x84b198320;
|
|
L_0x84aece120 .part L_0x84b1983c0, 15, 1;
|
|
L_0x84aece1c0 .repeat 16, 16, L_0x84aece120;
|
|
L_0x84b198460 .concat [ 16 16 0 0], L_0x84b1983c0, L_0x84aece1c0;
|
|
L_0x84aed0000 .arith/sum 32, L_0x84a879018, L_0x84b198460;
|
|
S_0x84ae96e80 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152180 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84ac3faa0 .functor BUFZ 32, L_0x84ac8bb60, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97000 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b1521c0 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84ac3fb10 .functor BUFZ 32, L_0x84ac8bc00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97180 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152200 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84ac3fb80 .functor BUFZ 32, L_0x84ac8bca0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97300 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152240 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84ac3fbf0 .functor BUFZ 32, L_0x84ac8bd40, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97480 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152280 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84ac3fc60 .functor BUFZ 32, L_0x84ac8bde0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97600 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b1522c0 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84ac3fcd0 .functor BUFZ 32, L_0x84ac8be80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97780 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152300 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84ac3fd40 .functor BUFZ 32, L_0x84ac8bf20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97900 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152340 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84ac3fdb0 .functor BUFZ 32, L_0x84aed0000, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae97a80 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152380 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84ae97c00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae97a80;
|
|
.timescale 0 0;
|
|
P_0x84b1523c0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed00a0 .arith/sum 32, L_0x84ac3faa0, L_0x84ac3fb10;
|
|
S_0x84ae97d80 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae97a80;
|
|
.timescale 0 0;
|
|
P_0x84b152400 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed0140 .arith/sum 32, L_0x84ac3fb80, L_0x84ac3fbf0;
|
|
S_0x84ae9c000 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84ae97a80;
|
|
.timescale 0 0;
|
|
P_0x84b152440 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84aed01e0 .arith/sum 32, L_0x84ac3fc60, L_0x84ac3fcd0;
|
|
S_0x84ae9c180 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84ae97a80;
|
|
.timescale 0 0;
|
|
P_0x84b152480 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84aed0280 .arith/sum 32, L_0x84ac3fd40, L_0x84ac3fdb0;
|
|
S_0x84ae9c300 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b1524c0 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84ae9c480 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae9c300;
|
|
.timescale 0 0;
|
|
P_0x84b152500 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed0320 .arith/sum 32, L_0x84aed00a0, L_0x84aed0140;
|
|
S_0x84ae9c600 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae9c300;
|
|
.timescale 0 0;
|
|
P_0x84b152540 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed03c0 .arith/sum 32, L_0x84aed01e0, L_0x84aed0280;
|
|
S_0x84ae9c780 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84ae95500;
|
|
.timescale 0 0;
|
|
P_0x84b152580 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84ae9c900 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae9c780;
|
|
.timescale 0 0;
|
|
P_0x84b1525c0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed0460 .arith/sum 32, L_0x84aed0320, L_0x84aed03c0;
|
|
S_0x84ae9ca80 .scope generate, "GEN_NEURON[3]" "GEN_NEURON[3]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b152600 .param/l "n" 1 12 34, +C4<011>;
|
|
S_0x84ae9cc00 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84ae9ca80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84ae9cd80 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae9cdc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84ae9ce00 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84ae9ce40 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84ae9ce80 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84ae9cec0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b175b80_0 .net *"_ivl_0", 31 0, L_0x84b198640; 1 drivers
|
|
v0x84b175c20_0 .net *"_ivl_11", 31 0, L_0x84b198780; 1 drivers
|
|
v0x84b175cc0_0 .net *"_ivl_14", 31 0, L_0x84b198820; 1 drivers
|
|
L_0x84a879138 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b175d60_0 .net *"_ivl_17", 29 0, L_0x84a879138; 1 drivers
|
|
L_0x84a879180 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b175e00_0 .net/2u *"_ivl_18", 31 0, L_0x84a879180; 1 drivers
|
|
v0x84b175ea0_0 .net *"_ivl_21", 31 0, L_0x84b1988c0; 1 drivers
|
|
L_0x84a8791c8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b175f40_0 .net/2u *"_ivl_22", 31 0, L_0x84a8791c8; 1 drivers
|
|
v0x84b175fe0_0 .net *"_ivl_25", 31 0, L_0x84b198960; 1 drivers
|
|
v0x84b176080_0 .net *"_ivl_29", 0 0, L_0x84aecfb60; 1 drivers
|
|
L_0x84a879060 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b176120_0 .net *"_ivl_3", 29 0, L_0x84a879060; 1 drivers
|
|
v0x84b1761c0_0 .net *"_ivl_31", 23 0, L_0x84aecfc00; 1 drivers
|
|
L_0x84a8790a8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b176260_0 .net/2u *"_ivl_4", 31 0, L_0x84a8790a8; 1 drivers
|
|
v0x84b176300_0 .net *"_ivl_7", 31 0, L_0x84b1986e0; 1 drivers
|
|
L_0x84a8790f0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1763a0_0 .net/2u *"_ivl_8", 31 0, L_0x84a8790f0; 1 drivers
|
|
v0x84b176440_0 .var/s "acc", 31 0;
|
|
v0x84b1764e0_0 .net/s "acc_next", 31 0, L_0x84aed0fa0; 1 drivers
|
|
v0x84b176580_0 .net/s "bias", 7 0, L_0x84aecfd40; 1 drivers
|
|
v0x84b176620_0 .net/s "bias_ext", 31 0, L_0x84b199ea0; 1 drivers
|
|
v0x84b1766c0_0 .var "busy", 0 0;
|
|
v0x84b176760_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b176800_0 .var "done", 0 0;
|
|
v0x84b1768a0_0 .net/s "final_acc", 31 0, L_0x84aed1040; 1 drivers
|
|
v0x84b176940_0 .var "group_index", 1 0;
|
|
v0x84b1769e0_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b176a80_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b176b20_0 .net/s "w_bus", 255 0, L_0x84aecfca0; 1 drivers
|
|
v0x84b176bc0_0 .net/s "w_group", 63 0, L_0x84aece6c0; 1 drivers
|
|
v0x84b176c60_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b176d00_0 .net/s "x_group", 63 0, L_0x84aece620; 1 drivers
|
|
v0x84b176da0_0 .var/s "y", 7 0;
|
|
L_0x84b198640 .concat [ 2 30 0 0], v0x84b176940_0, L_0x84a879060;
|
|
L_0x84b1986e0 .arith/mult 32, L_0x84b198640, L_0x84a8790a8;
|
|
L_0x84b198780 .arith/mult 32, L_0x84b1986e0, L_0x84a8790f0;
|
|
L_0x84aece620 .part/v v0x84b191e00_0, L_0x84b198780, 64;
|
|
L_0x84b198820 .concat [ 2 30 0 0], v0x84b176940_0, L_0x84a879138;
|
|
L_0x84b1988c0 .arith/mult 32, L_0x84b198820, L_0x84a879180;
|
|
L_0x84b198960 .arith/mult 32, L_0x84b1988c0, L_0x84a8791c8;
|
|
L_0x84aece6c0 .part/v L_0x84aecfca0, L_0x84b198960, 64;
|
|
L_0x84aecfb60 .part L_0x84aecfd40, 7, 1;
|
|
L_0x84aecfc00 .repeat 24, 24, L_0x84aecfb60;
|
|
L_0x84b199ea0 .concat [ 8 24 0 0], L_0x84aecfd40, L_0x84aecfc00;
|
|
L_0x84aed1040 .arith/sum 32, L_0x84aed0fa0, L_0x84b199ea0;
|
|
S_0x84ae9cf00 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84ae9cc00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8600 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8640 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8680 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc86c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b1757c0_0 .net/s "acc_in", 31 0, v0x84b176440_0; 1 drivers
|
|
v0x84b175860_0 .net/s "acc_out", 31 0, L_0x84aed0fa0; alias, 1 drivers
|
|
v0x84b175900 .array "products", 7 0;
|
|
v0x84b175900_0 .net/s v0x84b175900 0, 31 0, L_0x84aed0640; 1 drivers
|
|
v0x84b175900_1 .net/s v0x84b175900 1, 31 0, L_0x84aed06e0; 1 drivers
|
|
v0x84b175900_2 .net/s v0x84b175900 2, 31 0, L_0x84aed0780; 1 drivers
|
|
v0x84b175900_3 .net/s v0x84b175900 3, 31 0, L_0x84aed0820; 1 drivers
|
|
v0x84b175900_4 .net/s v0x84b175900 4, 31 0, L_0x84aed08c0; 1 drivers
|
|
v0x84b175900_5 .net/s v0x84b175900 5, 31 0, L_0x84aed0960; 1 drivers
|
|
v0x84b175900_6 .net/s v0x84b175900 6, 31 0, L_0x84aed0a00; 1 drivers
|
|
v0x84b175900_7 .net/s v0x84b175900 7, 31 0, L_0x84aed0aa0; 1 drivers
|
|
v0x84b1759a0 .array "tree", 31 0;
|
|
v0x84b1759a0_0 .net/s v0x84b1759a0 0, 31 0, L_0x84ac3fe20; 1 drivers
|
|
v0x84b1759a0_1 .net/s v0x84b1759a0 1, 31 0, L_0x84ac3fe90; 1 drivers
|
|
v0x84b1759a0_2 .net/s v0x84b1759a0 2, 31 0, L_0x84ac3ff00; 1 drivers
|
|
v0x84b1759a0_3 .net/s v0x84b1759a0 3, 31 0, L_0x84ac3ff70; 1 drivers
|
|
v0x84b1759a0_4 .net/s v0x84b1759a0 4, 31 0, L_0x84aed8000; 1 drivers
|
|
v0x84b1759a0_5 .net/s v0x84b1759a0 5, 31 0, L_0x84aedc000; 1 drivers
|
|
v0x84b1759a0_6 .net/s v0x84b1759a0 6, 31 0, L_0x84aedc070; 1 drivers
|
|
v0x84b1759a0_7 .net/s v0x84b1759a0 7, 31 0, L_0x84aedc0e0; 1 drivers
|
|
v0x84b1759a0_8 .net/s v0x84b1759a0 8, 31 0, L_0x84aed0b40; 1 drivers
|
|
v0x84b1759a0_9 .net/s v0x84b1759a0 9, 31 0, L_0x84aed0be0; 1 drivers
|
|
v0x84b1759a0_10 .net/s v0x84b1759a0 10, 31 0, L_0x84aed0c80; 1 drivers
|
|
v0x84b1759a0_11 .net/s v0x84b1759a0 11, 31 0, L_0x84aed0d20; 1 drivers
|
|
o0x84a851a80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_12 .net/s v0x84b1759a0 12, 31 0, o0x84a851a80; 0 drivers
|
|
o0x84a851ab0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_13 .net/s v0x84b1759a0 13, 31 0, o0x84a851ab0; 0 drivers
|
|
o0x84a851ae0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_14 .net/s v0x84b1759a0 14, 31 0, o0x84a851ae0; 0 drivers
|
|
o0x84a851b10 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_15 .net/s v0x84b1759a0 15, 31 0, o0x84a851b10; 0 drivers
|
|
v0x84b1759a0_16 .net/s v0x84b1759a0 16, 31 0, L_0x84aed0dc0; 1 drivers
|
|
v0x84b1759a0_17 .net/s v0x84b1759a0 17, 31 0, L_0x84aed0e60; 1 drivers
|
|
o0x84a851ba0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_18 .net/s v0x84b1759a0 18, 31 0, o0x84a851ba0; 0 drivers
|
|
o0x84a851bd0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_19 .net/s v0x84b1759a0 19, 31 0, o0x84a851bd0; 0 drivers
|
|
o0x84a851c00 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_20 .net/s v0x84b1759a0 20, 31 0, o0x84a851c00; 0 drivers
|
|
o0x84a851c30 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_21 .net/s v0x84b1759a0 21, 31 0, o0x84a851c30; 0 drivers
|
|
o0x84a851c60 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_22 .net/s v0x84b1759a0 22, 31 0, o0x84a851c60; 0 drivers
|
|
o0x84a851c90 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_23 .net/s v0x84b1759a0 23, 31 0, o0x84a851c90; 0 drivers
|
|
v0x84b1759a0_24 .net/s v0x84b1759a0 24, 31 0, L_0x84aed0f00; 1 drivers
|
|
o0x84a851cf0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_25 .net/s v0x84b1759a0 25, 31 0, o0x84a851cf0; 0 drivers
|
|
o0x84a851d20 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_26 .net/s v0x84b1759a0 26, 31 0, o0x84a851d20; 0 drivers
|
|
o0x84a851d50 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_27 .net/s v0x84b1759a0 27, 31 0, o0x84a851d50; 0 drivers
|
|
o0x84a851d80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_28 .net/s v0x84b1759a0 28, 31 0, o0x84a851d80; 0 drivers
|
|
o0x84a851db0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_29 .net/s v0x84b1759a0 29, 31 0, o0x84a851db0; 0 drivers
|
|
o0x84a851de0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_30 .net/s v0x84b1759a0 30, 31 0, o0x84a851de0; 0 drivers
|
|
o0x84a851e10 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1759a0_31 .net/s v0x84b1759a0 31, 31 0, o0x84a851e10; 0 drivers
|
|
v0x84b175a40_0 .net/s "w_bus", 63 0, L_0x84aece6c0; alias, 1 drivers
|
|
v0x84b175ae0_0 .net/s "x_bus", 63 0, L_0x84aece620; alias, 1 drivers
|
|
L_0x84aece8a0 .part L_0x84aece620, 0, 8;
|
|
L_0x84aece940 .part L_0x84aece6c0, 0, 8;
|
|
L_0x84aeceb20 .part L_0x84aece620, 8, 8;
|
|
L_0x84aecebc0 .part L_0x84aece6c0, 8, 8;
|
|
L_0x84aeceda0 .part L_0x84aece620, 16, 8;
|
|
L_0x84aecee40 .part L_0x84aece6c0, 16, 8;
|
|
L_0x84aecf020 .part L_0x84aece620, 24, 8;
|
|
L_0x84aecf0c0 .part L_0x84aece6c0, 24, 8;
|
|
L_0x84aecf2a0 .part L_0x84aece620, 32, 8;
|
|
L_0x84aecf340 .part L_0x84aece6c0, 32, 8;
|
|
L_0x84aecf520 .part L_0x84aece620, 40, 8;
|
|
L_0x84aecf5c0 .part L_0x84aece6c0, 40, 8;
|
|
L_0x84aecf7a0 .part L_0x84aece620, 48, 8;
|
|
L_0x84aecf840 .part L_0x84aece6c0, 48, 8;
|
|
L_0x84aecfa20 .part L_0x84aece620, 56, 8;
|
|
L_0x84aecfac0 .part L_0x84aece6c0, 56, 8;
|
|
L_0x84aed0fa0 .arith/sum 32, v0x84b176440_0, L_0x84aed0f00;
|
|
S_0x84ae9d080 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152640 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84ae9d200 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9d080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1595c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159600 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159640 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b172580_0 .net/s *"_ivl_0", 15 0, L_0x84b198a00; 1 drivers
|
|
v0x84b172620_0 .net/s *"_ivl_2", 15 0, L_0x84b198aa0; 1 drivers
|
|
v0x84b1726c0_0 .net *"_ivl_7", 0 0, L_0x84aece760; 1 drivers
|
|
v0x84b172760_0 .net *"_ivl_9", 15 0, L_0x84aece800; 1 drivers
|
|
L_0x84a879210 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b172800_0 .net/s "acc_in", 31 0, L_0x84a879210; 1 drivers
|
|
v0x84b1728a0_0 .net/s "acc_out", 31 0, L_0x84aed0640; alias, 1 drivers
|
|
v0x84b172940_0 .net/s "product", 15 0, L_0x84b198b40; 1 drivers
|
|
v0x84b1729e0_0 .net/s "product_ext", 31 0, L_0x84b198be0; 1 drivers
|
|
v0x84b172a80_0 .net/s "w", 7 0, L_0x84aece940; 1 drivers
|
|
v0x84b172b20_0 .net/s "x", 7 0, L_0x84aece8a0; 1 drivers
|
|
L_0x84b198a00 .extend/s 16, L_0x84aece8a0;
|
|
L_0x84b198aa0 .extend/s 16, L_0x84aece940;
|
|
L_0x84b198b40 .arith/mult 16, L_0x84b198a00, L_0x84b198aa0;
|
|
L_0x84aece760 .part L_0x84b198b40, 15, 1;
|
|
L_0x84aece800 .repeat 16, 16, L_0x84aece760;
|
|
L_0x84b198be0 .concat [ 16 16 0 0], L_0x84b198b40, L_0x84aece800;
|
|
L_0x84aed0640 .arith/sum 32, L_0x84a879210, L_0x84b198be0;
|
|
S_0x84ae9d380 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152680 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84ae9d500 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9d380;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159680 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1596c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159700 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b172bc0_0 .net/s *"_ivl_0", 15 0, L_0x84b198c80; 1 drivers
|
|
v0x84b172c60_0 .net/s *"_ivl_2", 15 0, L_0x84b198d20; 1 drivers
|
|
v0x84b172d00_0 .net *"_ivl_7", 0 0, L_0x84aece9e0; 1 drivers
|
|
v0x84b172da0_0 .net *"_ivl_9", 15 0, L_0x84aecea80; 1 drivers
|
|
L_0x84a879258 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b172e40_0 .net/s "acc_in", 31 0, L_0x84a879258; 1 drivers
|
|
v0x84b172ee0_0 .net/s "acc_out", 31 0, L_0x84aed06e0; alias, 1 drivers
|
|
v0x84b172f80_0 .net/s "product", 15 0, L_0x84b198dc0; 1 drivers
|
|
v0x84b173020_0 .net/s "product_ext", 31 0, L_0x84b198e60; 1 drivers
|
|
v0x84b1730c0_0 .net/s "w", 7 0, L_0x84aecebc0; 1 drivers
|
|
v0x84b173160_0 .net/s "x", 7 0, L_0x84aeceb20; 1 drivers
|
|
L_0x84b198c80 .extend/s 16, L_0x84aeceb20;
|
|
L_0x84b198d20 .extend/s 16, L_0x84aecebc0;
|
|
L_0x84b198dc0 .arith/mult 16, L_0x84b198c80, L_0x84b198d20;
|
|
L_0x84aece9e0 .part L_0x84b198dc0, 15, 1;
|
|
L_0x84aecea80 .repeat 16, 16, L_0x84aece9e0;
|
|
L_0x84b198e60 .concat [ 16 16 0 0], L_0x84b198dc0, L_0x84aecea80;
|
|
L_0x84aed06e0 .arith/sum 32, L_0x84a879258, L_0x84b198e60;
|
|
S_0x84ae9d680 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b1526c0 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84ae9d800 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9d680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159740 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159780 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b1597c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b173200_0 .net/s *"_ivl_0", 15 0, L_0x84b198f00; 1 drivers
|
|
v0x84b1732a0_0 .net/s *"_ivl_2", 15 0, L_0x84b198fa0; 1 drivers
|
|
v0x84b173340_0 .net *"_ivl_7", 0 0, L_0x84aecec60; 1 drivers
|
|
v0x84b1733e0_0 .net *"_ivl_9", 15 0, L_0x84aeced00; 1 drivers
|
|
L_0x84a8792a0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b173480_0 .net/s "acc_in", 31 0, L_0x84a8792a0; 1 drivers
|
|
v0x84b173520_0 .net/s "acc_out", 31 0, L_0x84aed0780; alias, 1 drivers
|
|
v0x84b1735c0_0 .net/s "product", 15 0, L_0x84b199040; 1 drivers
|
|
v0x84b173660_0 .net/s "product_ext", 31 0, L_0x84b1990e0; 1 drivers
|
|
v0x84b173700_0 .net/s "w", 7 0, L_0x84aecee40; 1 drivers
|
|
v0x84b1737a0_0 .net/s "x", 7 0, L_0x84aeceda0; 1 drivers
|
|
L_0x84b198f00 .extend/s 16, L_0x84aeceda0;
|
|
L_0x84b198fa0 .extend/s 16, L_0x84aecee40;
|
|
L_0x84b199040 .arith/mult 16, L_0x84b198f00, L_0x84b198fa0;
|
|
L_0x84aecec60 .part L_0x84b199040, 15, 1;
|
|
L_0x84aeced00 .repeat 16, 16, L_0x84aecec60;
|
|
L_0x84b1990e0 .concat [ 16 16 0 0], L_0x84b199040, L_0x84aeced00;
|
|
L_0x84aed0780 .arith/sum 32, L_0x84a8792a0, L_0x84b1990e0;
|
|
S_0x84ae9d980 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152700 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84ae9db00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9d980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159800 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159840 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159880 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b173840_0 .net/s *"_ivl_0", 15 0, L_0x84b199180; 1 drivers
|
|
v0x84b1738e0_0 .net/s *"_ivl_2", 15 0, L_0x84b199220; 1 drivers
|
|
v0x84b173980_0 .net *"_ivl_7", 0 0, L_0x84aeceee0; 1 drivers
|
|
v0x84b173a20_0 .net *"_ivl_9", 15 0, L_0x84aecef80; 1 drivers
|
|
L_0x84a8792e8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b173ac0_0 .net/s "acc_in", 31 0, L_0x84a8792e8; 1 drivers
|
|
v0x84b173b60_0 .net/s "acc_out", 31 0, L_0x84aed0820; alias, 1 drivers
|
|
v0x84b173c00_0 .net/s "product", 15 0, L_0x84b1992c0; 1 drivers
|
|
v0x84b173ca0_0 .net/s "product_ext", 31 0, L_0x84b199360; 1 drivers
|
|
v0x84b173d40_0 .net/s "w", 7 0, L_0x84aecf0c0; 1 drivers
|
|
v0x84b173de0_0 .net/s "x", 7 0, L_0x84aecf020; 1 drivers
|
|
L_0x84b199180 .extend/s 16, L_0x84aecf020;
|
|
L_0x84b199220 .extend/s 16, L_0x84aecf0c0;
|
|
L_0x84b1992c0 .arith/mult 16, L_0x84b199180, L_0x84b199220;
|
|
L_0x84aeceee0 .part L_0x84b1992c0, 15, 1;
|
|
L_0x84aecef80 .repeat 16, 16, L_0x84aeceee0;
|
|
L_0x84b199360 .concat [ 16 16 0 0], L_0x84b1992c0, L_0x84aecef80;
|
|
L_0x84aed0820 .arith/sum 32, L_0x84a8792e8, L_0x84b199360;
|
|
S_0x84ae9dc80 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152740 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84ae9de00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9dc80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b1598c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159900 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159940 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b173e80_0 .net/s *"_ivl_0", 15 0, L_0x84b199400; 1 drivers
|
|
v0x84b173f20_0 .net/s *"_ivl_2", 15 0, L_0x84b1994a0; 1 drivers
|
|
v0x84b174000_0 .net *"_ivl_7", 0 0, L_0x84aecf160; 1 drivers
|
|
v0x84b1740a0_0 .net *"_ivl_9", 15 0, L_0x84aecf200; 1 drivers
|
|
L_0x84a879330 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b174140_0 .net/s "acc_in", 31 0, L_0x84a879330; 1 drivers
|
|
v0x84b1741e0_0 .net/s "acc_out", 31 0, L_0x84aed08c0; alias, 1 drivers
|
|
v0x84b174280_0 .net/s "product", 15 0, L_0x84b199540; 1 drivers
|
|
v0x84b174320_0 .net/s "product_ext", 31 0, L_0x84b1995e0; 1 drivers
|
|
v0x84b1743c0_0 .net/s "w", 7 0, L_0x84aecf340; 1 drivers
|
|
v0x84b174460_0 .net/s "x", 7 0, L_0x84aecf2a0; 1 drivers
|
|
L_0x84b199400 .extend/s 16, L_0x84aecf2a0;
|
|
L_0x84b1994a0 .extend/s 16, L_0x84aecf340;
|
|
L_0x84b199540 .arith/mult 16, L_0x84b199400, L_0x84b1994a0;
|
|
L_0x84aecf160 .part L_0x84b199540, 15, 1;
|
|
L_0x84aecf200 .repeat 16, 16, L_0x84aecf160;
|
|
L_0x84b1995e0 .concat [ 16 16 0 0], L_0x84b199540, L_0x84aecf200;
|
|
L_0x84aed08c0 .arith/sum 32, L_0x84a879330, L_0x84b1995e0;
|
|
S_0x84ae9df80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152780 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84ae9e100 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9df80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159980 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b1599c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159a00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b174500_0 .net/s *"_ivl_0", 15 0, L_0x84b199680; 1 drivers
|
|
v0x84b1745a0_0 .net/s *"_ivl_2", 15 0, L_0x84b199720; 1 drivers
|
|
v0x84b174640_0 .net *"_ivl_7", 0 0, L_0x84aecf3e0; 1 drivers
|
|
v0x84b1746e0_0 .net *"_ivl_9", 15 0, L_0x84aecf480; 1 drivers
|
|
L_0x84a879378 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b174780_0 .net/s "acc_in", 31 0, L_0x84a879378; 1 drivers
|
|
v0x84b174820_0 .net/s "acc_out", 31 0, L_0x84aed0960; alias, 1 drivers
|
|
v0x84b1748c0_0 .net/s "product", 15 0, L_0x84b1997c0; 1 drivers
|
|
v0x84b174960_0 .net/s "product_ext", 31 0, L_0x84b199860; 1 drivers
|
|
v0x84b174a00_0 .net/s "w", 7 0, L_0x84aecf5c0; 1 drivers
|
|
v0x84b174aa0_0 .net/s "x", 7 0, L_0x84aecf520; 1 drivers
|
|
L_0x84b199680 .extend/s 16, L_0x84aecf520;
|
|
L_0x84b199720 .extend/s 16, L_0x84aecf5c0;
|
|
L_0x84b1997c0 .arith/mult 16, L_0x84b199680, L_0x84b199720;
|
|
L_0x84aecf3e0 .part L_0x84b1997c0, 15, 1;
|
|
L_0x84aecf480 .repeat 16, 16, L_0x84aecf3e0;
|
|
L_0x84b199860 .concat [ 16 16 0 0], L_0x84b1997c0, L_0x84aecf480;
|
|
L_0x84aed0960 .arith/sum 32, L_0x84a879378, L_0x84b199860;
|
|
S_0x84ae9e280 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b1527c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84ae9e400 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9e280;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159a40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159a80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159ac0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b174b40_0 .net/s *"_ivl_0", 15 0, L_0x84b199900; 1 drivers
|
|
v0x84b174be0_0 .net/s *"_ivl_2", 15 0, L_0x84b1999a0; 1 drivers
|
|
v0x84b174c80_0 .net *"_ivl_7", 0 0, L_0x84aecf660; 1 drivers
|
|
v0x84b174d20_0 .net *"_ivl_9", 15 0, L_0x84aecf700; 1 drivers
|
|
L_0x84a8793c0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b174dc0_0 .net/s "acc_in", 31 0, L_0x84a8793c0; 1 drivers
|
|
v0x84b174e60_0 .net/s "acc_out", 31 0, L_0x84aed0a00; alias, 1 drivers
|
|
v0x84b174f00_0 .net/s "product", 15 0, L_0x84b199a40; 1 drivers
|
|
v0x84b174fa0_0 .net/s "product_ext", 31 0, L_0x84b199ae0; 1 drivers
|
|
v0x84b175040_0 .net/s "w", 7 0, L_0x84aecf840; 1 drivers
|
|
v0x84b1750e0_0 .net/s "x", 7 0, L_0x84aecf7a0; 1 drivers
|
|
L_0x84b199900 .extend/s 16, L_0x84aecf7a0;
|
|
L_0x84b1999a0 .extend/s 16, L_0x84aecf840;
|
|
L_0x84b199a40 .arith/mult 16, L_0x84b199900, L_0x84b1999a0;
|
|
L_0x84aecf660 .part L_0x84b199a40, 15, 1;
|
|
L_0x84aecf700 .repeat 16, 16, L_0x84aecf660;
|
|
L_0x84b199ae0 .concat [ 16 16 0 0], L_0x84b199a40, L_0x84aecf700;
|
|
L_0x84aed0a00 .arith/sum 32, L_0x84a8793c0, L_0x84b199ae0;
|
|
S_0x84ae9e580 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152800 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84ae9e700 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84ae9e580;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159b00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159b40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159b80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b175180_0 .net/s *"_ivl_0", 15 0, L_0x84b199b80; 1 drivers
|
|
v0x84b175220_0 .net/s *"_ivl_2", 15 0, L_0x84b199c20; 1 drivers
|
|
v0x84b1752c0_0 .net *"_ivl_7", 0 0, L_0x84aecf8e0; 1 drivers
|
|
v0x84b175360_0 .net *"_ivl_9", 15 0, L_0x84aecf980; 1 drivers
|
|
L_0x84a879408 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b175400_0 .net/s "acc_in", 31 0, L_0x84a879408; 1 drivers
|
|
v0x84b1754a0_0 .net/s "acc_out", 31 0, L_0x84aed0aa0; alias, 1 drivers
|
|
v0x84b175540_0 .net/s "product", 15 0, L_0x84b199cc0; 1 drivers
|
|
v0x84b1755e0_0 .net/s "product_ext", 31 0, L_0x84b199d60; 1 drivers
|
|
v0x84b175680_0 .net/s "w", 7 0, L_0x84aecfac0; 1 drivers
|
|
v0x84b175720_0 .net/s "x", 7 0, L_0x84aecfa20; 1 drivers
|
|
L_0x84b199b80 .extend/s 16, L_0x84aecfa20;
|
|
L_0x84b199c20 .extend/s 16, L_0x84aecfac0;
|
|
L_0x84b199cc0 .arith/mult 16, L_0x84b199b80, L_0x84b199c20;
|
|
L_0x84aecf8e0 .part L_0x84b199cc0, 15, 1;
|
|
L_0x84aecf980 .repeat 16, 16, L_0x84aecf8e0;
|
|
L_0x84b199d60 .concat [ 16 16 0 0], L_0x84b199cc0, L_0x84aecf980;
|
|
L_0x84aed0aa0 .arith/sum 32, L_0x84a879408, L_0x84b199d60;
|
|
S_0x84ae9e880 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152840 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84ac3fe20 .functor BUFZ 32, L_0x84aed0640, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9ea00 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152880 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84ac3fe90 .functor BUFZ 32, L_0x84aed06e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9eb80 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b1528c0 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84ac3ff00 .functor BUFZ 32, L_0x84aed0780, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9ed00 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152900 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84ac3ff70 .functor BUFZ 32, L_0x84aed0820, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9ee80 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152940 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84aed8000 .functor BUFZ 32, L_0x84aed08c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9f000 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152980 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84aedc000 .functor BUFZ 32, L_0x84aed0960, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9f180 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b1529c0 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84aedc070 .functor BUFZ 32, L_0x84aed0a00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9f300 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152a00 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84aedc0e0 .functor BUFZ 32, L_0x84aed0aa0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84ae9f480 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152a40 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84ae9f600 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae9f480;
|
|
.timescale 0 0;
|
|
P_0x84b152a80 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed0b40 .arith/sum 32, L_0x84ac3fe20, L_0x84ac3fe90;
|
|
S_0x84ae9f780 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae9f480;
|
|
.timescale 0 0;
|
|
P_0x84b152ac0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed0be0 .arith/sum 32, L_0x84ac3ff00, L_0x84ac3ff70;
|
|
S_0x84ae9f900 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84ae9f480;
|
|
.timescale 0 0;
|
|
P_0x84b152b00 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84aed0c80 .arith/sum 32, L_0x84aed8000, L_0x84aedc000;
|
|
S_0x84ae9fa80 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84ae9f480;
|
|
.timescale 0 0;
|
|
P_0x84b152b40 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84aed0d20 .arith/sum 32, L_0x84aedc070, L_0x84aedc0e0;
|
|
S_0x84ae9fc00 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152b80 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84ae9fd80 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84ae9fc00;
|
|
.timescale 0 0;
|
|
P_0x84b152bc0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed0dc0 .arith/sum 32, L_0x84aed0b40, L_0x84aed0be0;
|
|
S_0x84aea0000 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84ae9fc00;
|
|
.timescale 0 0;
|
|
P_0x84b152c00 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed0e60 .arith/sum 32, L_0x84aed0c80, L_0x84aed0d20;
|
|
S_0x84aea0180 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84ae9cf00;
|
|
.timescale 0 0;
|
|
P_0x84b152c40 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84aea0300 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea0180;
|
|
.timescale 0 0;
|
|
P_0x84b152c80 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed0f00 .arith/sum 32, L_0x84aed0dc0, L_0x84aed0e60;
|
|
S_0x84aea0480 .scope generate, "GEN_NEURON[4]" "GEN_NEURON[4]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b152cc0 .param/l "n" 1 12 34, +C4<0100>;
|
|
S_0x84aea0600 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84aea0480;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84aea0780 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84aea07c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84aea0800 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84aea0840 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84aea0880 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84aea08c0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b17e440_0 .net *"_ivl_0", 31 0, L_0x84b199f40; 1 drivers
|
|
v0x84b17e4e0_0 .net *"_ivl_11", 31 0, L_0x84b19a080; 1 drivers
|
|
v0x84b17e580_0 .net *"_ivl_14", 31 0, L_0x84b19a120; 1 drivers
|
|
L_0x84a879528 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17e620_0 .net *"_ivl_17", 29 0, L_0x84a879528; 1 drivers
|
|
L_0x84a879570 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17e6c0_0 .net/2u *"_ivl_18", 31 0, L_0x84a879570; 1 drivers
|
|
v0x84b17e760_0 .net *"_ivl_21", 31 0, L_0x84b19a1c0; 1 drivers
|
|
L_0x84a8795b8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17e800_0 .net/2u *"_ivl_22", 31 0, L_0x84a8795b8; 1 drivers
|
|
v0x84b17e8a0_0 .net *"_ivl_25", 31 0, L_0x84b19a260; 1 drivers
|
|
v0x84b17e940_0 .net *"_ivl_29", 0 0, L_0x84aee1360; 1 drivers
|
|
L_0x84a879450 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17e9e0_0 .net *"_ivl_3", 29 0, L_0x84a879450; 1 drivers
|
|
v0x84b17ea80_0 .net *"_ivl_31", 23 0, L_0x84aee1400; 1 drivers
|
|
L_0x84a879498 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17eb20_0 .net/2u *"_ivl_4", 31 0, L_0x84a879498; 1 drivers
|
|
v0x84b17ebc0_0 .net *"_ivl_7", 31 0, L_0x84b199fe0; 1 drivers
|
|
L_0x84a8794e0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17ec60_0 .net/2u *"_ivl_8", 31 0, L_0x84a8794e0; 1 drivers
|
|
v0x84b17ed00_0 .var/s "acc", 31 0;
|
|
v0x84b17eda0_0 .net/s "acc_next", 31 0, L_0x84aed1a40; 1 drivers
|
|
v0x84b17ee40_0 .net/s "bias", 7 0, L_0x84aee1540; 1 drivers
|
|
v0x84b17eee0_0 .net/s "bias_ext", 31 0, L_0x84b19b7a0; 1 drivers
|
|
v0x84b17ef80_0 .var "busy", 0 0;
|
|
v0x84b17f020_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b17f0c0_0 .var "done", 0 0;
|
|
v0x84b17f160_0 .net/s "final_acc", 31 0, L_0x84aed1ae0; 1 drivers
|
|
v0x84b17f200_0 .var "group_index", 1 0;
|
|
v0x84b17f2a0_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b17f340_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b17f3e0_0 .net/s "w_bus", 255 0, L_0x84aee14a0; 1 drivers
|
|
v0x84b17f480_0 .net/s "w_group", 63 0, L_0x84aecfe80; 1 drivers
|
|
v0x84b17f520_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b17f5c0_0 .net/s "x_group", 63 0, L_0x84aecfde0; 1 drivers
|
|
v0x84b17f660_0 .var/s "y", 7 0;
|
|
L_0x84b199f40 .concat [ 2 30 0 0], v0x84b17f200_0, L_0x84a879450;
|
|
L_0x84b199fe0 .arith/mult 32, L_0x84b199f40, L_0x84a879498;
|
|
L_0x84b19a080 .arith/mult 32, L_0x84b199fe0, L_0x84a8794e0;
|
|
L_0x84aecfde0 .part/v v0x84b191e00_0, L_0x84b19a080, 64;
|
|
L_0x84b19a120 .concat [ 2 30 0 0], v0x84b17f200_0, L_0x84a879528;
|
|
L_0x84b19a1c0 .arith/mult 32, L_0x84b19a120, L_0x84a879570;
|
|
L_0x84b19a260 .arith/mult 32, L_0x84b19a1c0, L_0x84a8795b8;
|
|
L_0x84aecfe80 .part/v L_0x84aee14a0, L_0x84b19a260, 64;
|
|
L_0x84aee1360 .part L_0x84aee1540, 7, 1;
|
|
L_0x84aee1400 .repeat 24, 24, L_0x84aee1360;
|
|
L_0x84b19b7a0 .concat [ 8 24 0 0], L_0x84aee1540, L_0x84aee1400;
|
|
L_0x84aed1ae0 .arith/sum 32, L_0x84aed1a40, L_0x84b19b7a0;
|
|
S_0x84aea0900 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84aea0600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8700 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8740 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8780 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc87c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b17e080_0 .net/s "acc_in", 31 0, v0x84b17ed00_0; 1 drivers
|
|
v0x84b17e120_0 .net/s "acc_out", 31 0, L_0x84aed1a40; alias, 1 drivers
|
|
v0x84b17e1c0 .array "products", 7 0;
|
|
v0x84b17e1c0_0 .net/s v0x84b17e1c0 0, 31 0, L_0x84aed10e0; 1 drivers
|
|
v0x84b17e1c0_1 .net/s v0x84b17e1c0 1, 31 0, L_0x84aed1180; 1 drivers
|
|
v0x84b17e1c0_2 .net/s v0x84b17e1c0 2, 31 0, L_0x84aed1220; 1 drivers
|
|
v0x84b17e1c0_3 .net/s v0x84b17e1c0 3, 31 0, L_0x84aed12c0; 1 drivers
|
|
v0x84b17e1c0_4 .net/s v0x84b17e1c0 4, 31 0, L_0x84aed1360; 1 drivers
|
|
v0x84b17e1c0_5 .net/s v0x84b17e1c0 5, 31 0, L_0x84aed1400; 1 drivers
|
|
v0x84b17e1c0_6 .net/s v0x84b17e1c0 6, 31 0, L_0x84aed14a0; 1 drivers
|
|
v0x84b17e1c0_7 .net/s v0x84b17e1c0 7, 31 0, L_0x84aed1540; 1 drivers
|
|
v0x84b17e260 .array "tree", 31 0;
|
|
v0x84b17e260_0 .net/s v0x84b17e260 0, 31 0, L_0x84aedc150; 1 drivers
|
|
v0x84b17e260_1 .net/s v0x84b17e260 1, 31 0, L_0x84aedc1c0; 1 drivers
|
|
v0x84b17e260_2 .net/s v0x84b17e260 2, 31 0, L_0x84aedc230; 1 drivers
|
|
v0x84b17e260_3 .net/s v0x84b17e260 3, 31 0, L_0x84aedc2a0; 1 drivers
|
|
v0x84b17e260_4 .net/s v0x84b17e260 4, 31 0, L_0x84aedc310; 1 drivers
|
|
v0x84b17e260_5 .net/s v0x84b17e260 5, 31 0, L_0x84aedc380; 1 drivers
|
|
v0x84b17e260_6 .net/s v0x84b17e260 6, 31 0, L_0x84aedc3f0; 1 drivers
|
|
v0x84b17e260_7 .net/s v0x84b17e260 7, 31 0, L_0x84aedc460; 1 drivers
|
|
v0x84b17e260_8 .net/s v0x84b17e260 8, 31 0, L_0x84aed15e0; 1 drivers
|
|
v0x84b17e260_9 .net/s v0x84b17e260 9, 31 0, L_0x84aed1680; 1 drivers
|
|
v0x84b17e260_10 .net/s v0x84b17e260 10, 31 0, L_0x84aed1720; 1 drivers
|
|
v0x84b17e260_11 .net/s v0x84b17e260 11, 31 0, L_0x84aed17c0; 1 drivers
|
|
o0x84a853cd0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_12 .net/s v0x84b17e260 12, 31 0, o0x84a853cd0; 0 drivers
|
|
o0x84a853d00 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_13 .net/s v0x84b17e260 13, 31 0, o0x84a853d00; 0 drivers
|
|
o0x84a853d30 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_14 .net/s v0x84b17e260 14, 31 0, o0x84a853d30; 0 drivers
|
|
o0x84a853d60 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_15 .net/s v0x84b17e260 15, 31 0, o0x84a853d60; 0 drivers
|
|
v0x84b17e260_16 .net/s v0x84b17e260 16, 31 0, L_0x84aed1860; 1 drivers
|
|
v0x84b17e260_17 .net/s v0x84b17e260 17, 31 0, L_0x84aed1900; 1 drivers
|
|
o0x84a853df0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_18 .net/s v0x84b17e260 18, 31 0, o0x84a853df0; 0 drivers
|
|
o0x84a853e20 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_19 .net/s v0x84b17e260 19, 31 0, o0x84a853e20; 0 drivers
|
|
o0x84a853e50 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_20 .net/s v0x84b17e260 20, 31 0, o0x84a853e50; 0 drivers
|
|
o0x84a853e80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_21 .net/s v0x84b17e260 21, 31 0, o0x84a853e80; 0 drivers
|
|
o0x84a853eb0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_22 .net/s v0x84b17e260 22, 31 0, o0x84a853eb0; 0 drivers
|
|
o0x84a853ee0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_23 .net/s v0x84b17e260 23, 31 0, o0x84a853ee0; 0 drivers
|
|
v0x84b17e260_24 .net/s v0x84b17e260 24, 31 0, L_0x84aed19a0; 1 drivers
|
|
o0x84a853f40 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_25 .net/s v0x84b17e260 25, 31 0, o0x84a853f40; 0 drivers
|
|
o0x84a853f70 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_26 .net/s v0x84b17e260 26, 31 0, o0x84a853f70; 0 drivers
|
|
o0x84a853fa0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_27 .net/s v0x84b17e260 27, 31 0, o0x84a853fa0; 0 drivers
|
|
o0x84a853fd0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_28 .net/s v0x84b17e260 28, 31 0, o0x84a853fd0; 0 drivers
|
|
o0x84a854000 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_29 .net/s v0x84b17e260 29, 31 0, o0x84a854000; 0 drivers
|
|
o0x84a854030 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_30 .net/s v0x84b17e260 30, 31 0, o0x84a854030; 0 drivers
|
|
o0x84a854060 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b17e260_31 .net/s v0x84b17e260 31, 31 0, o0x84a854060; 0 drivers
|
|
v0x84b17e300_0 .net/s "w_bus", 63 0, L_0x84aecfe80; alias, 1 drivers
|
|
v0x84b17e3a0_0 .net/s "x_bus", 63 0, L_0x84aecfde0; alias, 1 drivers
|
|
L_0x84aee00a0 .part L_0x84aecfde0, 0, 8;
|
|
L_0x84aee0140 .part L_0x84aecfe80, 0, 8;
|
|
L_0x84aee0320 .part L_0x84aecfde0, 8, 8;
|
|
L_0x84aee03c0 .part L_0x84aecfe80, 8, 8;
|
|
L_0x84aee05a0 .part L_0x84aecfde0, 16, 8;
|
|
L_0x84aee0640 .part L_0x84aecfe80, 16, 8;
|
|
L_0x84aee0820 .part L_0x84aecfde0, 24, 8;
|
|
L_0x84aee08c0 .part L_0x84aecfe80, 24, 8;
|
|
L_0x84aee0aa0 .part L_0x84aecfde0, 32, 8;
|
|
L_0x84aee0b40 .part L_0x84aecfe80, 32, 8;
|
|
L_0x84aee0d20 .part L_0x84aecfde0, 40, 8;
|
|
L_0x84aee0dc0 .part L_0x84aecfe80, 40, 8;
|
|
L_0x84aee0fa0 .part L_0x84aecfde0, 48, 8;
|
|
L_0x84aee1040 .part L_0x84aecfe80, 48, 8;
|
|
L_0x84aee1220 .part L_0x84aecfde0, 56, 8;
|
|
L_0x84aee12c0 .part L_0x84aecfe80, 56, 8;
|
|
L_0x84aed1a40 .arith/sum 32, v0x84b17ed00_0, L_0x84aed19a0;
|
|
S_0x84aea0a80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152d00 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84aea0c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea0a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159bc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159c00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159c40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b176e40_0 .net/s *"_ivl_0", 15 0, L_0x84b19a300; 1 drivers
|
|
v0x84b176ee0_0 .net/s *"_ivl_2", 15 0, L_0x84b19a3a0; 1 drivers
|
|
v0x84b176f80_0 .net *"_ivl_7", 0 0, L_0x84aecff20; 1 drivers
|
|
v0x84b177020_0 .net *"_ivl_9", 15 0, L_0x84aee0000; 1 drivers
|
|
L_0x84a879600 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1770c0_0 .net/s "acc_in", 31 0, L_0x84a879600; 1 drivers
|
|
v0x84b177160_0 .net/s "acc_out", 31 0, L_0x84aed10e0; alias, 1 drivers
|
|
v0x84b177200_0 .net/s "product", 15 0, L_0x84b19a440; 1 drivers
|
|
v0x84b1772a0_0 .net/s "product_ext", 31 0, L_0x84b19a4e0; 1 drivers
|
|
v0x84b177340_0 .net/s "w", 7 0, L_0x84aee0140; 1 drivers
|
|
v0x84b1773e0_0 .net/s "x", 7 0, L_0x84aee00a0; 1 drivers
|
|
L_0x84b19a300 .extend/s 16, L_0x84aee00a0;
|
|
L_0x84b19a3a0 .extend/s 16, L_0x84aee0140;
|
|
L_0x84b19a440 .arith/mult 16, L_0x84b19a300, L_0x84b19a3a0;
|
|
L_0x84aecff20 .part L_0x84b19a440, 15, 1;
|
|
L_0x84aee0000 .repeat 16, 16, L_0x84aecff20;
|
|
L_0x84b19a4e0 .concat [ 16 16 0 0], L_0x84b19a440, L_0x84aee0000;
|
|
L_0x84aed10e0 .arith/sum 32, L_0x84a879600, L_0x84b19a4e0;
|
|
S_0x84aea0d80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152d40 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84aea0f00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea0d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159c80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159cc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159d00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b177480_0 .net/s *"_ivl_0", 15 0, L_0x84b19a580; 1 drivers
|
|
v0x84b177520_0 .net/s *"_ivl_2", 15 0, L_0x84b19a620; 1 drivers
|
|
v0x84b1775c0_0 .net *"_ivl_7", 0 0, L_0x84aee01e0; 1 drivers
|
|
v0x84b177660_0 .net *"_ivl_9", 15 0, L_0x84aee0280; 1 drivers
|
|
L_0x84a879648 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b177700_0 .net/s "acc_in", 31 0, L_0x84a879648; 1 drivers
|
|
v0x84b1777a0_0 .net/s "acc_out", 31 0, L_0x84aed1180; alias, 1 drivers
|
|
v0x84b177840_0 .net/s "product", 15 0, L_0x84b19a6c0; 1 drivers
|
|
v0x84b1778e0_0 .net/s "product_ext", 31 0, L_0x84b19a760; 1 drivers
|
|
v0x84b177980_0 .net/s "w", 7 0, L_0x84aee03c0; 1 drivers
|
|
v0x84b177a20_0 .net/s "x", 7 0, L_0x84aee0320; 1 drivers
|
|
L_0x84b19a580 .extend/s 16, L_0x84aee0320;
|
|
L_0x84b19a620 .extend/s 16, L_0x84aee03c0;
|
|
L_0x84b19a6c0 .arith/mult 16, L_0x84b19a580, L_0x84b19a620;
|
|
L_0x84aee01e0 .part L_0x84b19a6c0, 15, 1;
|
|
L_0x84aee0280 .repeat 16, 16, L_0x84aee01e0;
|
|
L_0x84b19a760 .concat [ 16 16 0 0], L_0x84b19a6c0, L_0x84aee0280;
|
|
L_0x84aed1180 .arith/sum 32, L_0x84a879648, L_0x84b19a760;
|
|
S_0x84aea1080 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152d80 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84aea1200 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea1080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159d40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159d80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159dc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b177ac0_0 .net/s *"_ivl_0", 15 0, L_0x84b19a800; 1 drivers
|
|
v0x84b177b60_0 .net/s *"_ivl_2", 15 0, L_0x84b19a8a0; 1 drivers
|
|
v0x84b177c00_0 .net *"_ivl_7", 0 0, L_0x84aee0460; 1 drivers
|
|
v0x84b177ca0_0 .net *"_ivl_9", 15 0, L_0x84aee0500; 1 drivers
|
|
L_0x84a879690 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b177d40_0 .net/s "acc_in", 31 0, L_0x84a879690; 1 drivers
|
|
v0x84b177de0_0 .net/s "acc_out", 31 0, L_0x84aed1220; alias, 1 drivers
|
|
v0x84b177e80_0 .net/s "product", 15 0, L_0x84b19a940; 1 drivers
|
|
v0x84b177f20_0 .net/s "product_ext", 31 0, L_0x84b19a9e0; 1 drivers
|
|
v0x84b17c000_0 .net/s "w", 7 0, L_0x84aee0640; 1 drivers
|
|
v0x84b17c0a0_0 .net/s "x", 7 0, L_0x84aee05a0; 1 drivers
|
|
L_0x84b19a800 .extend/s 16, L_0x84aee05a0;
|
|
L_0x84b19a8a0 .extend/s 16, L_0x84aee0640;
|
|
L_0x84b19a940 .arith/mult 16, L_0x84b19a800, L_0x84b19a8a0;
|
|
L_0x84aee0460 .part L_0x84b19a940, 15, 1;
|
|
L_0x84aee0500 .repeat 16, 16, L_0x84aee0460;
|
|
L_0x84b19a9e0 .concat [ 16 16 0 0], L_0x84b19a940, L_0x84aee0500;
|
|
L_0x84aed1220 .arith/sum 32, L_0x84a879690, L_0x84b19a9e0;
|
|
S_0x84aea1380 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152dc0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84aea1500 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea1380;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159e00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159e40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159e80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17c140_0 .net/s *"_ivl_0", 15 0, L_0x84b19aa80; 1 drivers
|
|
v0x84b17c1e0_0 .net/s *"_ivl_2", 15 0, L_0x84b19ab20; 1 drivers
|
|
v0x84b17c280_0 .net *"_ivl_7", 0 0, L_0x84aee06e0; 1 drivers
|
|
v0x84b17c320_0 .net *"_ivl_9", 15 0, L_0x84aee0780; 1 drivers
|
|
L_0x84a8796d8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17c3c0_0 .net/s "acc_in", 31 0, L_0x84a8796d8; 1 drivers
|
|
v0x84b17c460_0 .net/s "acc_out", 31 0, L_0x84aed12c0; alias, 1 drivers
|
|
v0x84b17c500_0 .net/s "product", 15 0, L_0x84b19abc0; 1 drivers
|
|
v0x84b17c5a0_0 .net/s "product_ext", 31 0, L_0x84b19ac60; 1 drivers
|
|
v0x84b17c640_0 .net/s "w", 7 0, L_0x84aee08c0; 1 drivers
|
|
v0x84b17c6e0_0 .net/s "x", 7 0, L_0x84aee0820; 1 drivers
|
|
L_0x84b19aa80 .extend/s 16, L_0x84aee0820;
|
|
L_0x84b19ab20 .extend/s 16, L_0x84aee08c0;
|
|
L_0x84b19abc0 .arith/mult 16, L_0x84b19aa80, L_0x84b19ab20;
|
|
L_0x84aee06e0 .part L_0x84b19abc0, 15, 1;
|
|
L_0x84aee0780 .repeat 16, 16, L_0x84aee06e0;
|
|
L_0x84b19ac60 .concat [ 16 16 0 0], L_0x84b19abc0, L_0x84aee0780;
|
|
L_0x84aed12c0 .arith/sum 32, L_0x84a8796d8, L_0x84b19ac60;
|
|
S_0x84aea1680 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152e00 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84aea1800 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea1680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159ec0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159f00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b159f40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17c780_0 .net/s *"_ivl_0", 15 0, L_0x84b19ad00; 1 drivers
|
|
v0x84b17c820_0 .net/s *"_ivl_2", 15 0, L_0x84b19ada0; 1 drivers
|
|
v0x84b17c8c0_0 .net *"_ivl_7", 0 0, L_0x84aee0960; 1 drivers
|
|
v0x84b17c960_0 .net *"_ivl_9", 15 0, L_0x84aee0a00; 1 drivers
|
|
L_0x84a879720 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17ca00_0 .net/s "acc_in", 31 0, L_0x84a879720; 1 drivers
|
|
v0x84b17caa0_0 .net/s "acc_out", 31 0, L_0x84aed1360; alias, 1 drivers
|
|
v0x84b17cb40_0 .net/s "product", 15 0, L_0x84b19ae40; 1 drivers
|
|
v0x84b17cbe0_0 .net/s "product_ext", 31 0, L_0x84b19aee0; 1 drivers
|
|
v0x84b17cc80_0 .net/s "w", 7 0, L_0x84aee0b40; 1 drivers
|
|
v0x84b17cd20_0 .net/s "x", 7 0, L_0x84aee0aa0; 1 drivers
|
|
L_0x84b19ad00 .extend/s 16, L_0x84aee0aa0;
|
|
L_0x84b19ada0 .extend/s 16, L_0x84aee0b40;
|
|
L_0x84b19ae40 .arith/mult 16, L_0x84b19ad00, L_0x84b19ada0;
|
|
L_0x84aee0960 .part L_0x84b19ae40, 15, 1;
|
|
L_0x84aee0a00 .repeat 16, 16, L_0x84aee0960;
|
|
L_0x84b19aee0 .concat [ 16 16 0 0], L_0x84b19ae40, L_0x84aee0a00;
|
|
L_0x84aed1360 .arith/sum 32, L_0x84a879720, L_0x84b19aee0;
|
|
S_0x84aea1980 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152e40 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84aea1b00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea1980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b159f80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b159fc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a000 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17cdc0_0 .net/s *"_ivl_0", 15 0, L_0x84b19af80; 1 drivers
|
|
v0x84b17ce60_0 .net/s *"_ivl_2", 15 0, L_0x84b19b020; 1 drivers
|
|
v0x84b17cf00_0 .net *"_ivl_7", 0 0, L_0x84aee0be0; 1 drivers
|
|
v0x84b17cfa0_0 .net *"_ivl_9", 15 0, L_0x84aee0c80; 1 drivers
|
|
L_0x84a879768 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17d040_0 .net/s "acc_in", 31 0, L_0x84a879768; 1 drivers
|
|
v0x84b17d0e0_0 .net/s "acc_out", 31 0, L_0x84aed1400; alias, 1 drivers
|
|
v0x84b17d180_0 .net/s "product", 15 0, L_0x84b19b0c0; 1 drivers
|
|
v0x84b17d220_0 .net/s "product_ext", 31 0, L_0x84b19b160; 1 drivers
|
|
v0x84b17d2c0_0 .net/s "w", 7 0, L_0x84aee0dc0; 1 drivers
|
|
v0x84b17d360_0 .net/s "x", 7 0, L_0x84aee0d20; 1 drivers
|
|
L_0x84b19af80 .extend/s 16, L_0x84aee0d20;
|
|
L_0x84b19b020 .extend/s 16, L_0x84aee0dc0;
|
|
L_0x84b19b0c0 .arith/mult 16, L_0x84b19af80, L_0x84b19b020;
|
|
L_0x84aee0be0 .part L_0x84b19b0c0, 15, 1;
|
|
L_0x84aee0c80 .repeat 16, 16, L_0x84aee0be0;
|
|
L_0x84b19b160 .concat [ 16 16 0 0], L_0x84b19b0c0, L_0x84aee0c80;
|
|
L_0x84aed1400 .arith/sum 32, L_0x84a879768, L_0x84b19b160;
|
|
S_0x84aea1c80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152e80 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84aea1e00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea1c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a040 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a080 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a0c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17d400_0 .net/s *"_ivl_0", 15 0, L_0x84b19b200; 1 drivers
|
|
v0x84b17d4a0_0 .net/s *"_ivl_2", 15 0, L_0x84b19b2a0; 1 drivers
|
|
v0x84b17d540_0 .net *"_ivl_7", 0 0, L_0x84aee0e60; 1 drivers
|
|
v0x84b17d5e0_0 .net *"_ivl_9", 15 0, L_0x84aee0f00; 1 drivers
|
|
L_0x84a8797b0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17d680_0 .net/s "acc_in", 31 0, L_0x84a8797b0; 1 drivers
|
|
v0x84b17d720_0 .net/s "acc_out", 31 0, L_0x84aed14a0; alias, 1 drivers
|
|
v0x84b17d7c0_0 .net/s "product", 15 0, L_0x84b19b340; 1 drivers
|
|
v0x84b17d860_0 .net/s "product_ext", 31 0, L_0x84b19b3e0; 1 drivers
|
|
v0x84b17d900_0 .net/s "w", 7 0, L_0x84aee1040; 1 drivers
|
|
v0x84b17d9a0_0 .net/s "x", 7 0, L_0x84aee0fa0; 1 drivers
|
|
L_0x84b19b200 .extend/s 16, L_0x84aee0fa0;
|
|
L_0x84b19b2a0 .extend/s 16, L_0x84aee1040;
|
|
L_0x84b19b340 .arith/mult 16, L_0x84b19b200, L_0x84b19b2a0;
|
|
L_0x84aee0e60 .part L_0x84b19b340, 15, 1;
|
|
L_0x84aee0f00 .repeat 16, 16, L_0x84aee0e60;
|
|
L_0x84b19b3e0 .concat [ 16 16 0 0], L_0x84b19b340, L_0x84aee0f00;
|
|
L_0x84aed14a0 .arith/sum 32, L_0x84a8797b0, L_0x84b19b3e0;
|
|
S_0x84aea1f80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152ec0 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84aea2100 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea1f80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a100 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a140 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a180 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17da40_0 .net/s *"_ivl_0", 15 0, L_0x84b19b480; 1 drivers
|
|
v0x84b17dae0_0 .net/s *"_ivl_2", 15 0, L_0x84b19b520; 1 drivers
|
|
v0x84b17db80_0 .net *"_ivl_7", 0 0, L_0x84aee10e0; 1 drivers
|
|
v0x84b17dc20_0 .net *"_ivl_9", 15 0, L_0x84aee1180; 1 drivers
|
|
L_0x84a8797f8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17dcc0_0 .net/s "acc_in", 31 0, L_0x84a8797f8; 1 drivers
|
|
v0x84b17dd60_0 .net/s "acc_out", 31 0, L_0x84aed1540; alias, 1 drivers
|
|
v0x84b17de00_0 .net/s "product", 15 0, L_0x84b19b5c0; 1 drivers
|
|
v0x84b17dea0_0 .net/s "product_ext", 31 0, L_0x84b19b660; 1 drivers
|
|
v0x84b17df40_0 .net/s "w", 7 0, L_0x84aee12c0; 1 drivers
|
|
v0x84b17dfe0_0 .net/s "x", 7 0, L_0x84aee1220; 1 drivers
|
|
L_0x84b19b480 .extend/s 16, L_0x84aee1220;
|
|
L_0x84b19b520 .extend/s 16, L_0x84aee12c0;
|
|
L_0x84b19b5c0 .arith/mult 16, L_0x84b19b480, L_0x84b19b520;
|
|
L_0x84aee10e0 .part L_0x84b19b5c0, 15, 1;
|
|
L_0x84aee1180 .repeat 16, 16, L_0x84aee10e0;
|
|
L_0x84b19b660 .concat [ 16 16 0 0], L_0x84b19b5c0, L_0x84aee1180;
|
|
L_0x84aed1540 .arith/sum 32, L_0x84a8797f8, L_0x84b19b660;
|
|
S_0x84aea2280 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152f00 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84aedc150 .functor BUFZ 32, L_0x84aed10e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2400 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152f40 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84aedc1c0 .functor BUFZ 32, L_0x84aed1180, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2580 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152f80 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84aedc230 .functor BUFZ 32, L_0x84aed1220, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2700 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b152fc0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84aedc2a0 .functor BUFZ 32, L_0x84aed12c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2880 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b153000 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84aedc310 .functor BUFZ 32, L_0x84aed1360, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2a00 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b153040 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84aedc380 .functor BUFZ 32, L_0x84aed1400, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2b80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b153080 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84aedc3f0 .functor BUFZ 32, L_0x84aed14a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2d00 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b1530c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84aedc460 .functor BUFZ 32, L_0x84aed1540, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea2e80 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b153100 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84aea3000 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea2e80;
|
|
.timescale 0 0;
|
|
P_0x84b153140 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed15e0 .arith/sum 32, L_0x84aedc150, L_0x84aedc1c0;
|
|
S_0x84aea3180 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aea2e80;
|
|
.timescale 0 0;
|
|
P_0x84b153180 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed1680 .arith/sum 32, L_0x84aedc230, L_0x84aedc2a0;
|
|
S_0x84aea3300 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84aea2e80;
|
|
.timescale 0 0;
|
|
P_0x84b1531c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84aed1720 .arith/sum 32, L_0x84aedc310, L_0x84aedc380;
|
|
S_0x84aea3480 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84aea2e80;
|
|
.timescale 0 0;
|
|
P_0x84b153200 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84aed17c0 .arith/sum 32, L_0x84aedc3f0, L_0x84aedc460;
|
|
S_0x84aea3600 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b153240 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84aea3780 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea3600;
|
|
.timescale 0 0;
|
|
P_0x84b153280 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed1860 .arith/sum 32, L_0x84aed15e0, L_0x84aed1680;
|
|
S_0x84aea3900 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aea3600;
|
|
.timescale 0 0;
|
|
P_0x84b1532c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed1900 .arith/sum 32, L_0x84aed1720, L_0x84aed17c0;
|
|
S_0x84aea3a80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84aea0900;
|
|
.timescale 0 0;
|
|
P_0x84b153300 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84aea3c00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea3a80;
|
|
.timescale 0 0;
|
|
P_0x84b153340 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed19a0 .arith/sum 32, L_0x84aed1860, L_0x84aed1900;
|
|
S_0x84aea3d80 .scope generate, "GEN_NEURON[5]" "GEN_NEURON[5]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b153380 .param/l "n" 1 12 34, +C4<0101>;
|
|
S_0x84aea4000 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84aea3d80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84aea4180 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84aea41c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84aea4200 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84aea4240 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84aea4280 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84aea42c0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b182d00_0 .net *"_ivl_0", 31 0, L_0x84b19b840; 1 drivers
|
|
v0x84b182da0_0 .net *"_ivl_11", 31 0, L_0x84b19b980; 1 drivers
|
|
v0x84b182e40_0 .net *"_ivl_14", 31 0, L_0x84b19ba20; 1 drivers
|
|
L_0x84a879918 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b182ee0_0 .net *"_ivl_17", 29 0, L_0x84a879918; 1 drivers
|
|
L_0x84a879960 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b182f80_0 .net/2u *"_ivl_18", 31 0, L_0x84a879960; 1 drivers
|
|
v0x84b183020_0 .net *"_ivl_21", 31 0, L_0x84b19bac0; 1 drivers
|
|
L_0x84a8799a8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1830c0_0 .net/2u *"_ivl_22", 31 0, L_0x84a8799a8; 1 drivers
|
|
v0x84b183160_0 .net *"_ivl_25", 31 0, L_0x84b19bb60; 1 drivers
|
|
v0x84b183200_0 .net *"_ivl_29", 0 0, L_0x84aee2b20; 1 drivers
|
|
L_0x84a879840 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1832a0_0 .net *"_ivl_3", 29 0, L_0x84a879840; 1 drivers
|
|
v0x84b183340_0 .net *"_ivl_31", 23 0, L_0x84aee2bc0; 1 drivers
|
|
L_0x84a879888 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1833e0_0 .net/2u *"_ivl_4", 31 0, L_0x84a879888; 1 drivers
|
|
v0x84b183480_0 .net *"_ivl_7", 31 0, L_0x84b19b8e0; 1 drivers
|
|
L_0x84a8798d0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b183520_0 .net/2u *"_ivl_8", 31 0, L_0x84a8798d0; 1 drivers
|
|
v0x84b1835c0_0 .var/s "acc", 31 0;
|
|
v0x84b183660_0 .net/s "acc_next", 31 0, L_0x84aed24e0; 1 drivers
|
|
v0x84b183700_0 .net/s "bias", 7 0, L_0x84aee2d00; 1 drivers
|
|
v0x84b1837a0_0 .net/s "bias_ext", 31 0, L_0x84b1a10e0; 1 drivers
|
|
v0x84b183840_0 .var "busy", 0 0;
|
|
v0x84b1838e0_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b183980_0 .var "done", 0 0;
|
|
v0x84b183a20_0 .net/s "final_acc", 31 0, L_0x84aed2580; 1 drivers
|
|
v0x84b183ac0_0 .var "group_index", 1 0;
|
|
v0x84b183b60_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b183c00_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b183ca0_0 .net/s "w_bus", 255 0, L_0x84aee2c60; 1 drivers
|
|
v0x84b183d40_0 .net/s "w_group", 63 0, L_0x84aee1680; 1 drivers
|
|
v0x84b183de0_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b183e80_0 .net/s "x_group", 63 0, L_0x84aee15e0; 1 drivers
|
|
v0x84b183f20_0 .var/s "y", 7 0;
|
|
L_0x84b19b840 .concat [ 2 30 0 0], v0x84b183ac0_0, L_0x84a879840;
|
|
L_0x84b19b8e0 .arith/mult 32, L_0x84b19b840, L_0x84a879888;
|
|
L_0x84b19b980 .arith/mult 32, L_0x84b19b8e0, L_0x84a8798d0;
|
|
L_0x84aee15e0 .part/v v0x84b191e00_0, L_0x84b19b980, 64;
|
|
L_0x84b19ba20 .concat [ 2 30 0 0], v0x84b183ac0_0, L_0x84a879918;
|
|
L_0x84b19bac0 .arith/mult 32, L_0x84b19ba20, L_0x84a879960;
|
|
L_0x84b19bb60 .arith/mult 32, L_0x84b19bac0, L_0x84a8799a8;
|
|
L_0x84aee1680 .part/v L_0x84aee2c60, L_0x84b19bb60, 64;
|
|
L_0x84aee2b20 .part L_0x84aee2d00, 7, 1;
|
|
L_0x84aee2bc0 .repeat 24, 24, L_0x84aee2b20;
|
|
L_0x84b1a10e0 .concat [ 8 24 0 0], L_0x84aee2d00, L_0x84aee2bc0;
|
|
L_0x84aed2580 .arith/sum 32, L_0x84aed24e0, L_0x84b1a10e0;
|
|
S_0x84aea4300 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84aea4000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8800 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8840 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8880 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc88c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b182940_0 .net/s "acc_in", 31 0, v0x84b1835c0_0; 1 drivers
|
|
v0x84b1829e0_0 .net/s "acc_out", 31 0, L_0x84aed24e0; alias, 1 drivers
|
|
v0x84b182a80 .array "products", 7 0;
|
|
v0x84b182a80_0 .net/s v0x84b182a80 0, 31 0, L_0x84aed1b80; 1 drivers
|
|
v0x84b182a80_1 .net/s v0x84b182a80 1, 31 0, L_0x84aed1c20; 1 drivers
|
|
v0x84b182a80_2 .net/s v0x84b182a80 2, 31 0, L_0x84aed1cc0; 1 drivers
|
|
v0x84b182a80_3 .net/s v0x84b182a80 3, 31 0, L_0x84aed1d60; 1 drivers
|
|
v0x84b182a80_4 .net/s v0x84b182a80 4, 31 0, L_0x84aed1e00; 1 drivers
|
|
v0x84b182a80_5 .net/s v0x84b182a80 5, 31 0, L_0x84aed1ea0; 1 drivers
|
|
v0x84b182a80_6 .net/s v0x84b182a80 6, 31 0, L_0x84aed1f40; 1 drivers
|
|
v0x84b182a80_7 .net/s v0x84b182a80 7, 31 0, L_0x84aed1fe0; 1 drivers
|
|
v0x84b182b20 .array "tree", 31 0;
|
|
v0x84b182b20_0 .net/s v0x84b182b20 0, 31 0, L_0x84aedc4d0; 1 drivers
|
|
v0x84b182b20_1 .net/s v0x84b182b20 1, 31 0, L_0x84aedc540; 1 drivers
|
|
v0x84b182b20_2 .net/s v0x84b182b20 2, 31 0, L_0x84aedc5b0; 1 drivers
|
|
v0x84b182b20_3 .net/s v0x84b182b20 3, 31 0, L_0x84aedc620; 1 drivers
|
|
v0x84b182b20_4 .net/s v0x84b182b20 4, 31 0, L_0x84aedc690; 1 drivers
|
|
v0x84b182b20_5 .net/s v0x84b182b20 5, 31 0, L_0x84aedc700; 1 drivers
|
|
v0x84b182b20_6 .net/s v0x84b182b20 6, 31 0, L_0x84aedc770; 1 drivers
|
|
v0x84b182b20_7 .net/s v0x84b182b20 7, 31 0, L_0x84aedc7e0; 1 drivers
|
|
v0x84b182b20_8 .net/s v0x84b182b20 8, 31 0, L_0x84aed2080; 1 drivers
|
|
v0x84b182b20_9 .net/s v0x84b182b20 9, 31 0, L_0x84aed2120; 1 drivers
|
|
v0x84b182b20_10 .net/s v0x84b182b20 10, 31 0, L_0x84aed21c0; 1 drivers
|
|
v0x84b182b20_11 .net/s v0x84b182b20 11, 31 0, L_0x84aed2260; 1 drivers
|
|
o0x84a855f20 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_12 .net/s v0x84b182b20 12, 31 0, o0x84a855f20; 0 drivers
|
|
o0x84a855f50 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_13 .net/s v0x84b182b20 13, 31 0, o0x84a855f50; 0 drivers
|
|
o0x84a855f80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_14 .net/s v0x84b182b20 14, 31 0, o0x84a855f80; 0 drivers
|
|
o0x84a855fb0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_15 .net/s v0x84b182b20 15, 31 0, o0x84a855fb0; 0 drivers
|
|
v0x84b182b20_16 .net/s v0x84b182b20 16, 31 0, L_0x84aed2300; 1 drivers
|
|
v0x84b182b20_17 .net/s v0x84b182b20 17, 31 0, L_0x84aed23a0; 1 drivers
|
|
o0x84a856040 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_18 .net/s v0x84b182b20 18, 31 0, o0x84a856040; 0 drivers
|
|
o0x84a856070 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_19 .net/s v0x84b182b20 19, 31 0, o0x84a856070; 0 drivers
|
|
o0x84a8560a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_20 .net/s v0x84b182b20 20, 31 0, o0x84a8560a0; 0 drivers
|
|
o0x84a8560d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_21 .net/s v0x84b182b20 21, 31 0, o0x84a8560d0; 0 drivers
|
|
o0x84a856100 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_22 .net/s v0x84b182b20 22, 31 0, o0x84a856100; 0 drivers
|
|
o0x84a856130 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_23 .net/s v0x84b182b20 23, 31 0, o0x84a856130; 0 drivers
|
|
v0x84b182b20_24 .net/s v0x84b182b20 24, 31 0, L_0x84aed2440; 1 drivers
|
|
o0x84a856190 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_25 .net/s v0x84b182b20 25, 31 0, o0x84a856190; 0 drivers
|
|
o0x84a8561c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_26 .net/s v0x84b182b20 26, 31 0, o0x84a8561c0; 0 drivers
|
|
o0x84a8561f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_27 .net/s v0x84b182b20 27, 31 0, o0x84a8561f0; 0 drivers
|
|
o0x84a856220 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_28 .net/s v0x84b182b20 28, 31 0, o0x84a856220; 0 drivers
|
|
o0x84a856250 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_29 .net/s v0x84b182b20 29, 31 0, o0x84a856250; 0 drivers
|
|
o0x84a856280 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_30 .net/s v0x84b182b20 30, 31 0, o0x84a856280; 0 drivers
|
|
o0x84a8562b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b182b20_31 .net/s v0x84b182b20 31, 31 0, o0x84a8562b0; 0 drivers
|
|
v0x84b182bc0_0 .net/s "w_bus", 63 0, L_0x84aee1680; alias, 1 drivers
|
|
v0x84b182c60_0 .net/s "x_bus", 63 0, L_0x84aee15e0; alias, 1 drivers
|
|
L_0x84aee1860 .part L_0x84aee15e0, 0, 8;
|
|
L_0x84aee1900 .part L_0x84aee1680, 0, 8;
|
|
L_0x84aee1ae0 .part L_0x84aee15e0, 8, 8;
|
|
L_0x84aee1b80 .part L_0x84aee1680, 8, 8;
|
|
L_0x84aee1d60 .part L_0x84aee15e0, 16, 8;
|
|
L_0x84aee1e00 .part L_0x84aee1680, 16, 8;
|
|
L_0x84aee1fe0 .part L_0x84aee15e0, 24, 8;
|
|
L_0x84aee2080 .part L_0x84aee1680, 24, 8;
|
|
L_0x84aee2260 .part L_0x84aee15e0, 32, 8;
|
|
L_0x84aee2300 .part L_0x84aee1680, 32, 8;
|
|
L_0x84aee24e0 .part L_0x84aee15e0, 40, 8;
|
|
L_0x84aee2580 .part L_0x84aee1680, 40, 8;
|
|
L_0x84aee2760 .part L_0x84aee15e0, 48, 8;
|
|
L_0x84aee2800 .part L_0x84aee1680, 48, 8;
|
|
L_0x84aee29e0 .part L_0x84aee15e0, 56, 8;
|
|
L_0x84aee2a80 .part L_0x84aee1680, 56, 8;
|
|
L_0x84aed24e0 .arith/sum 32, v0x84b1835c0_0, L_0x84aed2440;
|
|
S_0x84aea4480 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b1533c0 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84aea4600 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea4480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a1c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a200 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a240 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17f700_0 .net/s *"_ivl_0", 15 0, L_0x84b19bc00; 1 drivers
|
|
v0x84b17f7a0_0 .net/s *"_ivl_2", 15 0, L_0x84b19bca0; 1 drivers
|
|
v0x84b17f840_0 .net *"_ivl_7", 0 0, L_0x84aee1720; 1 drivers
|
|
v0x84b17f8e0_0 .net *"_ivl_9", 15 0, L_0x84aee17c0; 1 drivers
|
|
L_0x84a8799f0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b17f980_0 .net/s "acc_in", 31 0, L_0x84a8799f0; 1 drivers
|
|
v0x84b17fa20_0 .net/s "acc_out", 31 0, L_0x84aed1b80; alias, 1 drivers
|
|
v0x84b17fac0_0 .net/s "product", 15 0, L_0x84b19bd40; 1 drivers
|
|
v0x84b17fb60_0 .net/s "product_ext", 31 0, L_0x84b19bde0; 1 drivers
|
|
v0x84b17fc00_0 .net/s "w", 7 0, L_0x84aee1900; 1 drivers
|
|
v0x84b17fca0_0 .net/s "x", 7 0, L_0x84aee1860; 1 drivers
|
|
L_0x84b19bc00 .extend/s 16, L_0x84aee1860;
|
|
L_0x84b19bca0 .extend/s 16, L_0x84aee1900;
|
|
L_0x84b19bd40 .arith/mult 16, L_0x84b19bc00, L_0x84b19bca0;
|
|
L_0x84aee1720 .part L_0x84b19bd40, 15, 1;
|
|
L_0x84aee17c0 .repeat 16, 16, L_0x84aee1720;
|
|
L_0x84b19bde0 .concat [ 16 16 0 0], L_0x84b19bd40, L_0x84aee17c0;
|
|
L_0x84aed1b80 .arith/sum 32, L_0x84a8799f0, L_0x84b19bde0;
|
|
S_0x84aea4780 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153400 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84aea4900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea4780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a280 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a2c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a300 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b17fd40_0 .net/s *"_ivl_0", 15 0, L_0x84b19be80; 1 drivers
|
|
v0x84b17fde0_0 .net/s *"_ivl_2", 15 0, L_0x84b19bf20; 1 drivers
|
|
v0x84b17fe80_0 .net *"_ivl_7", 0 0, L_0x84aee19a0; 1 drivers
|
|
v0x84b17ff20_0 .net *"_ivl_9", 15 0, L_0x84aee1a40; 1 drivers
|
|
L_0x84a879a38 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b180000_0 .net/s "acc_in", 31 0, L_0x84a879a38; 1 drivers
|
|
v0x84b1800a0_0 .net/s "acc_out", 31 0, L_0x84aed1c20; alias, 1 drivers
|
|
v0x84b180140_0 .net/s "product", 15 0, L_0x84b1a0000; 1 drivers
|
|
v0x84b1801e0_0 .net/s "product_ext", 31 0, L_0x84b1a00a0; 1 drivers
|
|
v0x84b180280_0 .net/s "w", 7 0, L_0x84aee1b80; 1 drivers
|
|
v0x84b180320_0 .net/s "x", 7 0, L_0x84aee1ae0; 1 drivers
|
|
L_0x84b19be80 .extend/s 16, L_0x84aee1ae0;
|
|
L_0x84b19bf20 .extend/s 16, L_0x84aee1b80;
|
|
L_0x84b1a0000 .arith/mult 16, L_0x84b19be80, L_0x84b19bf20;
|
|
L_0x84aee19a0 .part L_0x84b1a0000, 15, 1;
|
|
L_0x84aee1a40 .repeat 16, 16, L_0x84aee19a0;
|
|
L_0x84b1a00a0 .concat [ 16 16 0 0], L_0x84b1a0000, L_0x84aee1a40;
|
|
L_0x84aed1c20 .arith/sum 32, L_0x84a879a38, L_0x84b1a00a0;
|
|
S_0x84aea4a80 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153440 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84aea4c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea4a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a340 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a380 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a3c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b1803c0_0 .net/s *"_ivl_0", 15 0, L_0x84b1a0140; 1 drivers
|
|
v0x84b180460_0 .net/s *"_ivl_2", 15 0, L_0x84b1a01e0; 1 drivers
|
|
v0x84b180500_0 .net *"_ivl_7", 0 0, L_0x84aee1c20; 1 drivers
|
|
v0x84b1805a0_0 .net *"_ivl_9", 15 0, L_0x84aee1cc0; 1 drivers
|
|
L_0x84a879a80 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b180640_0 .net/s "acc_in", 31 0, L_0x84a879a80; 1 drivers
|
|
v0x84b1806e0_0 .net/s "acc_out", 31 0, L_0x84aed1cc0; alias, 1 drivers
|
|
v0x84b180780_0 .net/s "product", 15 0, L_0x84b1a0280; 1 drivers
|
|
v0x84b180820_0 .net/s "product_ext", 31 0, L_0x84b1a0320; 1 drivers
|
|
v0x84b1808c0_0 .net/s "w", 7 0, L_0x84aee1e00; 1 drivers
|
|
v0x84b180960_0 .net/s "x", 7 0, L_0x84aee1d60; 1 drivers
|
|
L_0x84b1a0140 .extend/s 16, L_0x84aee1d60;
|
|
L_0x84b1a01e0 .extend/s 16, L_0x84aee1e00;
|
|
L_0x84b1a0280 .arith/mult 16, L_0x84b1a0140, L_0x84b1a01e0;
|
|
L_0x84aee1c20 .part L_0x84b1a0280, 15, 1;
|
|
L_0x84aee1cc0 .repeat 16, 16, L_0x84aee1c20;
|
|
L_0x84b1a0320 .concat [ 16 16 0 0], L_0x84b1a0280, L_0x84aee1cc0;
|
|
L_0x84aed1cc0 .arith/sum 32, L_0x84a879a80, L_0x84b1a0320;
|
|
S_0x84aea4d80 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153480 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84aea4f00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea4d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a400 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a440 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a480 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b180a00_0 .net/s *"_ivl_0", 15 0, L_0x84b1a03c0; 1 drivers
|
|
v0x84b180aa0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a0460; 1 drivers
|
|
v0x84b180b40_0 .net *"_ivl_7", 0 0, L_0x84aee1ea0; 1 drivers
|
|
v0x84b180be0_0 .net *"_ivl_9", 15 0, L_0x84aee1f40; 1 drivers
|
|
L_0x84a879ac8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b180c80_0 .net/s "acc_in", 31 0, L_0x84a879ac8; 1 drivers
|
|
v0x84b180d20_0 .net/s "acc_out", 31 0, L_0x84aed1d60; alias, 1 drivers
|
|
v0x84b180dc0_0 .net/s "product", 15 0, L_0x84b1a0500; 1 drivers
|
|
v0x84b180e60_0 .net/s "product_ext", 31 0, L_0x84b1a05a0; 1 drivers
|
|
v0x84b180f00_0 .net/s "w", 7 0, L_0x84aee2080; 1 drivers
|
|
v0x84b180fa0_0 .net/s "x", 7 0, L_0x84aee1fe0; 1 drivers
|
|
L_0x84b1a03c0 .extend/s 16, L_0x84aee1fe0;
|
|
L_0x84b1a0460 .extend/s 16, L_0x84aee2080;
|
|
L_0x84b1a0500 .arith/mult 16, L_0x84b1a03c0, L_0x84b1a0460;
|
|
L_0x84aee1ea0 .part L_0x84b1a0500, 15, 1;
|
|
L_0x84aee1f40 .repeat 16, 16, L_0x84aee1ea0;
|
|
L_0x84b1a05a0 .concat [ 16 16 0 0], L_0x84b1a0500, L_0x84aee1f40;
|
|
L_0x84aed1d60 .arith/sum 32, L_0x84a879ac8, L_0x84b1a05a0;
|
|
S_0x84aea5080 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b1534c0 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84aea5200 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea5080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a4c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a500 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a540 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b181040_0 .net/s *"_ivl_0", 15 0, L_0x84b1a0640; 1 drivers
|
|
v0x84b1810e0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a06e0; 1 drivers
|
|
v0x84b181180_0 .net *"_ivl_7", 0 0, L_0x84aee2120; 1 drivers
|
|
v0x84b181220_0 .net *"_ivl_9", 15 0, L_0x84aee21c0; 1 drivers
|
|
L_0x84a879b10 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1812c0_0 .net/s "acc_in", 31 0, L_0x84a879b10; 1 drivers
|
|
v0x84b181360_0 .net/s "acc_out", 31 0, L_0x84aed1e00; alias, 1 drivers
|
|
v0x84b181400_0 .net/s "product", 15 0, L_0x84b1a0780; 1 drivers
|
|
v0x84b1814a0_0 .net/s "product_ext", 31 0, L_0x84b1a0820; 1 drivers
|
|
v0x84b181540_0 .net/s "w", 7 0, L_0x84aee2300; 1 drivers
|
|
v0x84b1815e0_0 .net/s "x", 7 0, L_0x84aee2260; 1 drivers
|
|
L_0x84b1a0640 .extend/s 16, L_0x84aee2260;
|
|
L_0x84b1a06e0 .extend/s 16, L_0x84aee2300;
|
|
L_0x84b1a0780 .arith/mult 16, L_0x84b1a0640, L_0x84b1a06e0;
|
|
L_0x84aee2120 .part L_0x84b1a0780, 15, 1;
|
|
L_0x84aee21c0 .repeat 16, 16, L_0x84aee2120;
|
|
L_0x84b1a0820 .concat [ 16 16 0 0], L_0x84b1a0780, L_0x84aee21c0;
|
|
L_0x84aed1e00 .arith/sum 32, L_0x84a879b10, L_0x84b1a0820;
|
|
S_0x84aea5380 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153500 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84aea5500 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea5380;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a580 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a5c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a600 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b181680_0 .net/s *"_ivl_0", 15 0, L_0x84b1a08c0; 1 drivers
|
|
v0x84b181720_0 .net/s *"_ivl_2", 15 0, L_0x84b1a0960; 1 drivers
|
|
v0x84b1817c0_0 .net *"_ivl_7", 0 0, L_0x84aee23a0; 1 drivers
|
|
v0x84b181860_0 .net *"_ivl_9", 15 0, L_0x84aee2440; 1 drivers
|
|
L_0x84a879b58 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b181900_0 .net/s "acc_in", 31 0, L_0x84a879b58; 1 drivers
|
|
v0x84b1819a0_0 .net/s "acc_out", 31 0, L_0x84aed1ea0; alias, 1 drivers
|
|
v0x84b181a40_0 .net/s "product", 15 0, L_0x84b1a0a00; 1 drivers
|
|
v0x84b181ae0_0 .net/s "product_ext", 31 0, L_0x84b1a0aa0; 1 drivers
|
|
v0x84b181b80_0 .net/s "w", 7 0, L_0x84aee2580; 1 drivers
|
|
v0x84b181c20_0 .net/s "x", 7 0, L_0x84aee24e0; 1 drivers
|
|
L_0x84b1a08c0 .extend/s 16, L_0x84aee24e0;
|
|
L_0x84b1a0960 .extend/s 16, L_0x84aee2580;
|
|
L_0x84b1a0a00 .arith/mult 16, L_0x84b1a08c0, L_0x84b1a0960;
|
|
L_0x84aee23a0 .part L_0x84b1a0a00, 15, 1;
|
|
L_0x84aee2440 .repeat 16, 16, L_0x84aee23a0;
|
|
L_0x84b1a0aa0 .concat [ 16 16 0 0], L_0x84b1a0a00, L_0x84aee2440;
|
|
L_0x84aed1ea0 .arith/sum 32, L_0x84a879b58, L_0x84b1a0aa0;
|
|
S_0x84aea5680 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153540 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84aea5800 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea5680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a640 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a680 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a6c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b181cc0_0 .net/s *"_ivl_0", 15 0, L_0x84b1a0b40; 1 drivers
|
|
v0x84b181d60_0 .net/s *"_ivl_2", 15 0, L_0x84b1a0be0; 1 drivers
|
|
v0x84b181e00_0 .net *"_ivl_7", 0 0, L_0x84aee2620; 1 drivers
|
|
v0x84b181ea0_0 .net *"_ivl_9", 15 0, L_0x84aee26c0; 1 drivers
|
|
L_0x84a879ba0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b181f40_0 .net/s "acc_in", 31 0, L_0x84a879ba0; 1 drivers
|
|
v0x84b181fe0_0 .net/s "acc_out", 31 0, L_0x84aed1f40; alias, 1 drivers
|
|
v0x84b182080_0 .net/s "product", 15 0, L_0x84b1a0c80; 1 drivers
|
|
v0x84b182120_0 .net/s "product_ext", 31 0, L_0x84b1a0d20; 1 drivers
|
|
v0x84b1821c0_0 .net/s "w", 7 0, L_0x84aee2800; 1 drivers
|
|
v0x84b182260_0 .net/s "x", 7 0, L_0x84aee2760; 1 drivers
|
|
L_0x84b1a0b40 .extend/s 16, L_0x84aee2760;
|
|
L_0x84b1a0be0 .extend/s 16, L_0x84aee2800;
|
|
L_0x84b1a0c80 .arith/mult 16, L_0x84b1a0b40, L_0x84b1a0be0;
|
|
L_0x84aee2620 .part L_0x84b1a0c80, 15, 1;
|
|
L_0x84aee26c0 .repeat 16, 16, L_0x84aee2620;
|
|
L_0x84b1a0d20 .concat [ 16 16 0 0], L_0x84b1a0c80, L_0x84aee26c0;
|
|
L_0x84aed1f40 .arith/sum 32, L_0x84a879ba0, L_0x84b1a0d20;
|
|
S_0x84aea5980 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153580 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84aea5b00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea5980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a700 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a740 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a780 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b182300_0 .net/s *"_ivl_0", 15 0, L_0x84b1a0dc0; 1 drivers
|
|
v0x84b1823a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a0e60; 1 drivers
|
|
v0x84b182440_0 .net *"_ivl_7", 0 0, L_0x84aee28a0; 1 drivers
|
|
v0x84b1824e0_0 .net *"_ivl_9", 15 0, L_0x84aee2940; 1 drivers
|
|
L_0x84a879be8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b182580_0 .net/s "acc_in", 31 0, L_0x84a879be8; 1 drivers
|
|
v0x84b182620_0 .net/s "acc_out", 31 0, L_0x84aed1fe0; alias, 1 drivers
|
|
v0x84b1826c0_0 .net/s "product", 15 0, L_0x84b1a0f00; 1 drivers
|
|
v0x84b182760_0 .net/s "product_ext", 31 0, L_0x84b1a0fa0; 1 drivers
|
|
v0x84b182800_0 .net/s "w", 7 0, L_0x84aee2a80; 1 drivers
|
|
v0x84b1828a0_0 .net/s "x", 7 0, L_0x84aee29e0; 1 drivers
|
|
L_0x84b1a0dc0 .extend/s 16, L_0x84aee29e0;
|
|
L_0x84b1a0e60 .extend/s 16, L_0x84aee2a80;
|
|
L_0x84b1a0f00 .arith/mult 16, L_0x84b1a0dc0, L_0x84b1a0e60;
|
|
L_0x84aee28a0 .part L_0x84b1a0f00, 15, 1;
|
|
L_0x84aee2940 .repeat 16, 16, L_0x84aee28a0;
|
|
L_0x84b1a0fa0 .concat [ 16 16 0 0], L_0x84b1a0f00, L_0x84aee2940;
|
|
L_0x84aed1fe0 .arith/sum 32, L_0x84a879be8, L_0x84b1a0fa0;
|
|
S_0x84aea5c80 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b1535c0 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84aedc4d0 .functor BUFZ 32, L_0x84aed1b80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea5e00 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153600 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84aedc540 .functor BUFZ 32, L_0x84aed1c20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea5f80 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153640 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84aedc5b0 .functor BUFZ 32, L_0x84aed1cc0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea6100 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153680 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84aedc620 .functor BUFZ 32, L_0x84aed1d60, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea6280 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b1536c0 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84aedc690 .functor BUFZ 32, L_0x84aed1e00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea6400 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153700 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84aedc700 .functor BUFZ 32, L_0x84aed1ea0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea6580 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153740 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84aedc770 .functor BUFZ 32, L_0x84aed1f40, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea6700 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153780 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84aedc7e0 .functor BUFZ 32, L_0x84aed1fe0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aea6880 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b1537c0 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84aea6a00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea6880;
|
|
.timescale 0 0;
|
|
P_0x84b153800 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed2080 .arith/sum 32, L_0x84aedc4d0, L_0x84aedc540;
|
|
S_0x84aea6b80 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aea6880;
|
|
.timescale 0 0;
|
|
P_0x84b153840 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed2120 .arith/sum 32, L_0x84aedc5b0, L_0x84aedc620;
|
|
S_0x84aea6d00 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84aea6880;
|
|
.timescale 0 0;
|
|
P_0x84b153880 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84aed21c0 .arith/sum 32, L_0x84aedc690, L_0x84aedc700;
|
|
S_0x84aea6e80 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84aea6880;
|
|
.timescale 0 0;
|
|
P_0x84b1538c0 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84aed2260 .arith/sum 32, L_0x84aedc770, L_0x84aedc7e0;
|
|
S_0x84aea7000 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b153900 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84aea7180 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea7000;
|
|
.timescale 0 0;
|
|
P_0x84b153940 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed2300 .arith/sum 32, L_0x84aed2080, L_0x84aed2120;
|
|
S_0x84aea7300 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aea7000;
|
|
.timescale 0 0;
|
|
P_0x84b153980 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed23a0 .arith/sum 32, L_0x84aed21c0, L_0x84aed2260;
|
|
S_0x84aea7480 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84aea4300;
|
|
.timescale 0 0;
|
|
P_0x84b1539c0 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84aea7600 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aea7480;
|
|
.timescale 0 0;
|
|
P_0x84b153a00 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed2440 .arith/sum 32, L_0x84aed2300, L_0x84aed23a0;
|
|
S_0x84aea7780 .scope generate, "GEN_NEURON[6]" "GEN_NEURON[6]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b153a40 .param/l "n" 1 12 34, +C4<0110>;
|
|
S_0x84aea7900 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84aea7780;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84aea7a80 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84aea7ac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84aea7b00 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84aea7b40 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84aea7b80 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84aea7bc0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b1875c0_0 .net *"_ivl_0", 31 0, L_0x84b1a1180; 1 drivers
|
|
v0x84b187660_0 .net *"_ivl_11", 31 0, L_0x84b1a12c0; 1 drivers
|
|
v0x84b187700_0 .net *"_ivl_14", 31 0, L_0x84b1a1360; 1 drivers
|
|
L_0x84a879d08 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1877a0_0 .net *"_ivl_17", 29 0, L_0x84a879d08; 1 drivers
|
|
L_0x84a879d50 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b187840_0 .net/2u *"_ivl_18", 31 0, L_0x84a879d50; 1 drivers
|
|
v0x84b1878e0_0 .net *"_ivl_21", 31 0, L_0x84b1a1400; 1 drivers
|
|
L_0x84a879d98 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b187980_0 .net/2u *"_ivl_22", 31 0, L_0x84a879d98; 1 drivers
|
|
v0x84b187a20_0 .net *"_ivl_25", 31 0, L_0x84b1a14a0; 1 drivers
|
|
v0x84b187ac0_0 .net *"_ivl_29", 0 0, L_0x84aee8320; 1 drivers
|
|
L_0x84a879c30 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b187b60_0 .net *"_ivl_3", 29 0, L_0x84a879c30; 1 drivers
|
|
v0x84b187c00_0 .net *"_ivl_31", 23 0, L_0x84aee83c0; 1 drivers
|
|
L_0x84a879c78 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b187ca0_0 .net/2u *"_ivl_4", 31 0, L_0x84a879c78; 1 drivers
|
|
v0x84b187d40_0 .net *"_ivl_7", 31 0, L_0x84b1a1220; 1 drivers
|
|
L_0x84a879cc0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b187de0_0 .net/2u *"_ivl_8", 31 0, L_0x84a879cc0; 1 drivers
|
|
v0x84b187e80_0 .var/s "acc", 31 0;
|
|
v0x84b187f20_0 .net/s "acc_next", 31 0, L_0x84aed2f80; 1 drivers
|
|
v0x84b18c000_0 .net/s "bias", 7 0, L_0x84aee8500; 1 drivers
|
|
v0x84b18c0a0_0 .net/s "bias_ext", 31 0, L_0x84b1a29e0; 1 drivers
|
|
v0x84b18c140_0 .var "busy", 0 0;
|
|
v0x84b18c1e0_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b18c280_0 .var "done", 0 0;
|
|
v0x84b18c320_0 .net/s "final_acc", 31 0, L_0x84aed3020; 1 drivers
|
|
v0x84b18c3c0_0 .var "group_index", 1 0;
|
|
v0x84b18c460_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b18c500_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b18c5a0_0 .net/s "w_bus", 255 0, L_0x84aee8460; 1 drivers
|
|
v0x84b18c640_0 .net/s "w_group", 63 0, L_0x84aee2e40; 1 drivers
|
|
v0x84b18c6e0_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b18c780_0 .net/s "x_group", 63 0, L_0x84aee2da0; 1 drivers
|
|
v0x84b18c820_0 .var/s "y", 7 0;
|
|
L_0x84b1a1180 .concat [ 2 30 0 0], v0x84b18c3c0_0, L_0x84a879c30;
|
|
L_0x84b1a1220 .arith/mult 32, L_0x84b1a1180, L_0x84a879c78;
|
|
L_0x84b1a12c0 .arith/mult 32, L_0x84b1a1220, L_0x84a879cc0;
|
|
L_0x84aee2da0 .part/v v0x84b191e00_0, L_0x84b1a12c0, 64;
|
|
L_0x84b1a1360 .concat [ 2 30 0 0], v0x84b18c3c0_0, L_0x84a879d08;
|
|
L_0x84b1a1400 .arith/mult 32, L_0x84b1a1360, L_0x84a879d50;
|
|
L_0x84b1a14a0 .arith/mult 32, L_0x84b1a1400, L_0x84a879d98;
|
|
L_0x84aee2e40 .part/v L_0x84aee8460, L_0x84b1a14a0, 64;
|
|
L_0x84aee8320 .part L_0x84aee8500, 7, 1;
|
|
L_0x84aee83c0 .repeat 24, 24, L_0x84aee8320;
|
|
L_0x84b1a29e0 .concat [ 8 24 0 0], L_0x84aee8500, L_0x84aee83c0;
|
|
L_0x84aed3020 .arith/sum 32, L_0x84aed2f80, L_0x84b1a29e0;
|
|
S_0x84aea7c00 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84aea7900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8900 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8940 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8980 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc89c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b187200_0 .net/s "acc_in", 31 0, v0x84b187e80_0; 1 drivers
|
|
v0x84b1872a0_0 .net/s "acc_out", 31 0, L_0x84aed2f80; alias, 1 drivers
|
|
v0x84b187340 .array "products", 7 0;
|
|
v0x84b187340_0 .net/s v0x84b187340 0, 31 0, L_0x84aed2620; 1 drivers
|
|
v0x84b187340_1 .net/s v0x84b187340 1, 31 0, L_0x84aed26c0; 1 drivers
|
|
v0x84b187340_2 .net/s v0x84b187340 2, 31 0, L_0x84aed2760; 1 drivers
|
|
v0x84b187340_3 .net/s v0x84b187340 3, 31 0, L_0x84aed2800; 1 drivers
|
|
v0x84b187340_4 .net/s v0x84b187340 4, 31 0, L_0x84aed28a0; 1 drivers
|
|
v0x84b187340_5 .net/s v0x84b187340 5, 31 0, L_0x84aed2940; 1 drivers
|
|
v0x84b187340_6 .net/s v0x84b187340 6, 31 0, L_0x84aed29e0; 1 drivers
|
|
v0x84b187340_7 .net/s v0x84b187340 7, 31 0, L_0x84aed2a80; 1 drivers
|
|
v0x84b1873e0 .array "tree", 31 0;
|
|
v0x84b1873e0_0 .net/s v0x84b1873e0 0, 31 0, L_0x84aedc850; 1 drivers
|
|
v0x84b1873e0_1 .net/s v0x84b1873e0 1, 31 0, L_0x84aedc8c0; 1 drivers
|
|
v0x84b1873e0_2 .net/s v0x84b1873e0 2, 31 0, L_0x84aedc930; 1 drivers
|
|
v0x84b1873e0_3 .net/s v0x84b1873e0 3, 31 0, L_0x84aedc9a0; 1 drivers
|
|
v0x84b1873e0_4 .net/s v0x84b1873e0 4, 31 0, L_0x84aedca10; 1 drivers
|
|
v0x84b1873e0_5 .net/s v0x84b1873e0 5, 31 0, L_0x84aedca80; 1 drivers
|
|
v0x84b1873e0_6 .net/s v0x84b1873e0 6, 31 0, L_0x84aedcaf0; 1 drivers
|
|
v0x84b1873e0_7 .net/s v0x84b1873e0 7, 31 0, L_0x84aedcb60; 1 drivers
|
|
v0x84b1873e0_8 .net/s v0x84b1873e0 8, 31 0, L_0x84aed2b20; 1 drivers
|
|
v0x84b1873e0_9 .net/s v0x84b1873e0 9, 31 0, L_0x84aed2bc0; 1 drivers
|
|
v0x84b1873e0_10 .net/s v0x84b1873e0 10, 31 0, L_0x84aed2c60; 1 drivers
|
|
v0x84b1873e0_11 .net/s v0x84b1873e0 11, 31 0, L_0x84aed2d00; 1 drivers
|
|
o0x84a858170 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_12 .net/s v0x84b1873e0 12, 31 0, o0x84a858170; 0 drivers
|
|
o0x84a8581a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_13 .net/s v0x84b1873e0 13, 31 0, o0x84a8581a0; 0 drivers
|
|
o0x84a8581d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_14 .net/s v0x84b1873e0 14, 31 0, o0x84a8581d0; 0 drivers
|
|
o0x84a858200 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_15 .net/s v0x84b1873e0 15, 31 0, o0x84a858200; 0 drivers
|
|
v0x84b1873e0_16 .net/s v0x84b1873e0 16, 31 0, L_0x84aed2da0; 1 drivers
|
|
v0x84b1873e0_17 .net/s v0x84b1873e0 17, 31 0, L_0x84aed2e40; 1 drivers
|
|
o0x84a858290 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_18 .net/s v0x84b1873e0 18, 31 0, o0x84a858290; 0 drivers
|
|
o0x84a8582c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_19 .net/s v0x84b1873e0 19, 31 0, o0x84a8582c0; 0 drivers
|
|
o0x84a8582f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_20 .net/s v0x84b1873e0 20, 31 0, o0x84a8582f0; 0 drivers
|
|
o0x84a858320 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_21 .net/s v0x84b1873e0 21, 31 0, o0x84a858320; 0 drivers
|
|
o0x84a858350 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_22 .net/s v0x84b1873e0 22, 31 0, o0x84a858350; 0 drivers
|
|
o0x84a858380 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_23 .net/s v0x84b1873e0 23, 31 0, o0x84a858380; 0 drivers
|
|
v0x84b1873e0_24 .net/s v0x84b1873e0 24, 31 0, L_0x84aed2ee0; 1 drivers
|
|
o0x84a8583e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_25 .net/s v0x84b1873e0 25, 31 0, o0x84a8583e0; 0 drivers
|
|
o0x84a858410 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_26 .net/s v0x84b1873e0 26, 31 0, o0x84a858410; 0 drivers
|
|
o0x84a858440 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_27 .net/s v0x84b1873e0 27, 31 0, o0x84a858440; 0 drivers
|
|
o0x84a858470 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_28 .net/s v0x84b1873e0 28, 31 0, o0x84a858470; 0 drivers
|
|
o0x84a8584a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_29 .net/s v0x84b1873e0 29, 31 0, o0x84a8584a0; 0 drivers
|
|
o0x84a8584d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_30 .net/s v0x84b1873e0 30, 31 0, o0x84a8584d0; 0 drivers
|
|
o0x84a858500 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b1873e0_31 .net/s v0x84b1873e0 31, 31 0, o0x84a858500; 0 drivers
|
|
v0x84b187480_0 .net/s "w_bus", 63 0, L_0x84aee2e40; alias, 1 drivers
|
|
v0x84b187520_0 .net/s "x_bus", 63 0, L_0x84aee2da0; alias, 1 drivers
|
|
L_0x84aee3020 .part L_0x84aee2da0, 0, 8;
|
|
L_0x84aee30c0 .part L_0x84aee2e40, 0, 8;
|
|
L_0x84aee32a0 .part L_0x84aee2da0, 8, 8;
|
|
L_0x84aee3340 .part L_0x84aee2e40, 8, 8;
|
|
L_0x84aee3520 .part L_0x84aee2da0, 16, 8;
|
|
L_0x84aee35c0 .part L_0x84aee2e40, 16, 8;
|
|
L_0x84aee37a0 .part L_0x84aee2da0, 24, 8;
|
|
L_0x84aee3840 .part L_0x84aee2e40, 24, 8;
|
|
L_0x84aee3a20 .part L_0x84aee2da0, 32, 8;
|
|
L_0x84aee3ac0 .part L_0x84aee2e40, 32, 8;
|
|
L_0x84aee3ca0 .part L_0x84aee2da0, 40, 8;
|
|
L_0x84aee3d40 .part L_0x84aee2e40, 40, 8;
|
|
L_0x84aee3f20 .part L_0x84aee2da0, 48, 8;
|
|
L_0x84aee8000 .part L_0x84aee2e40, 48, 8;
|
|
L_0x84aee81e0 .part L_0x84aee2da0, 56, 8;
|
|
L_0x84aee8280 .part L_0x84aee2e40, 56, 8;
|
|
L_0x84aed2f80 .arith/sum 32, v0x84b187e80_0, L_0x84aed2ee0;
|
|
S_0x84aea7d80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153a80 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84aeb0000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aea7d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a7c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a800 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a840 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b184000_0 .net/s *"_ivl_0", 15 0, L_0x84b1a1540; 1 drivers
|
|
v0x84b1840a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a15e0; 1 drivers
|
|
v0x84b184140_0 .net *"_ivl_7", 0 0, L_0x84aee2ee0; 1 drivers
|
|
v0x84b1841e0_0 .net *"_ivl_9", 15 0, L_0x84aee2f80; 1 drivers
|
|
L_0x84a879de0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b184280_0 .net/s "acc_in", 31 0, L_0x84a879de0; 1 drivers
|
|
v0x84b184320_0 .net/s "acc_out", 31 0, L_0x84aed2620; alias, 1 drivers
|
|
v0x84b1843c0_0 .net/s "product", 15 0, L_0x84b1a1680; 1 drivers
|
|
v0x84b184460_0 .net/s "product_ext", 31 0, L_0x84b1a1720; 1 drivers
|
|
v0x84b184500_0 .net/s "w", 7 0, L_0x84aee30c0; 1 drivers
|
|
v0x84b1845a0_0 .net/s "x", 7 0, L_0x84aee3020; 1 drivers
|
|
L_0x84b1a1540 .extend/s 16, L_0x84aee3020;
|
|
L_0x84b1a15e0 .extend/s 16, L_0x84aee30c0;
|
|
L_0x84b1a1680 .arith/mult 16, L_0x84b1a1540, L_0x84b1a15e0;
|
|
L_0x84aee2ee0 .part L_0x84b1a1680, 15, 1;
|
|
L_0x84aee2f80 .repeat 16, 16, L_0x84aee2ee0;
|
|
L_0x84b1a1720 .concat [ 16 16 0 0], L_0x84b1a1680, L_0x84aee2f80;
|
|
L_0x84aed2620 .arith/sum 32, L_0x84a879de0, L_0x84b1a1720;
|
|
S_0x84aeb0180 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153ac0 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84aeb0300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb0180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a880 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a8c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a900 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b184640_0 .net/s *"_ivl_0", 15 0, L_0x84b1a17c0; 1 drivers
|
|
v0x84b1846e0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a1860; 1 drivers
|
|
v0x84b184780_0 .net *"_ivl_7", 0 0, L_0x84aee3160; 1 drivers
|
|
v0x84b184820_0 .net *"_ivl_9", 15 0, L_0x84aee3200; 1 drivers
|
|
L_0x84a879e28 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1848c0_0 .net/s "acc_in", 31 0, L_0x84a879e28; 1 drivers
|
|
v0x84b184960_0 .net/s "acc_out", 31 0, L_0x84aed26c0; alias, 1 drivers
|
|
v0x84b184a00_0 .net/s "product", 15 0, L_0x84b1a1900; 1 drivers
|
|
v0x84b184aa0_0 .net/s "product_ext", 31 0, L_0x84b1a19a0; 1 drivers
|
|
v0x84b184b40_0 .net/s "w", 7 0, L_0x84aee3340; 1 drivers
|
|
v0x84b184be0_0 .net/s "x", 7 0, L_0x84aee32a0; 1 drivers
|
|
L_0x84b1a17c0 .extend/s 16, L_0x84aee32a0;
|
|
L_0x84b1a1860 .extend/s 16, L_0x84aee3340;
|
|
L_0x84b1a1900 .arith/mult 16, L_0x84b1a17c0, L_0x84b1a1860;
|
|
L_0x84aee3160 .part L_0x84b1a1900, 15, 1;
|
|
L_0x84aee3200 .repeat 16, 16, L_0x84aee3160;
|
|
L_0x84b1a19a0 .concat [ 16 16 0 0], L_0x84b1a1900, L_0x84aee3200;
|
|
L_0x84aed26c0 .arith/sum 32, L_0x84a879e28, L_0x84b1a19a0;
|
|
S_0x84aeb0480 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153b00 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84aeb0600 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb0480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15a940 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15a980 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15a9c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b184c80_0 .net/s *"_ivl_0", 15 0, L_0x84b1a1a40; 1 drivers
|
|
v0x84b184d20_0 .net/s *"_ivl_2", 15 0, L_0x84b1a1ae0; 1 drivers
|
|
v0x84b184dc0_0 .net *"_ivl_7", 0 0, L_0x84aee33e0; 1 drivers
|
|
v0x84b184e60_0 .net *"_ivl_9", 15 0, L_0x84aee3480; 1 drivers
|
|
L_0x84a879e70 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b184f00_0 .net/s "acc_in", 31 0, L_0x84a879e70; 1 drivers
|
|
v0x84b184fa0_0 .net/s "acc_out", 31 0, L_0x84aed2760; alias, 1 drivers
|
|
v0x84b185040_0 .net/s "product", 15 0, L_0x84b1a1b80; 1 drivers
|
|
v0x84b1850e0_0 .net/s "product_ext", 31 0, L_0x84b1a1c20; 1 drivers
|
|
v0x84b185180_0 .net/s "w", 7 0, L_0x84aee35c0; 1 drivers
|
|
v0x84b185220_0 .net/s "x", 7 0, L_0x84aee3520; 1 drivers
|
|
L_0x84b1a1a40 .extend/s 16, L_0x84aee3520;
|
|
L_0x84b1a1ae0 .extend/s 16, L_0x84aee35c0;
|
|
L_0x84b1a1b80 .arith/mult 16, L_0x84b1a1a40, L_0x84b1a1ae0;
|
|
L_0x84aee33e0 .part L_0x84b1a1b80, 15, 1;
|
|
L_0x84aee3480 .repeat 16, 16, L_0x84aee33e0;
|
|
L_0x84b1a1c20 .concat [ 16 16 0 0], L_0x84b1a1b80, L_0x84aee3480;
|
|
L_0x84aed2760 .arith/sum 32, L_0x84a879e70, L_0x84b1a1c20;
|
|
S_0x84aeb0780 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153b40 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84aeb0900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb0780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15aa00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15aa40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15aa80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b1852c0_0 .net/s *"_ivl_0", 15 0, L_0x84b1a1cc0; 1 drivers
|
|
v0x84b185360_0 .net/s *"_ivl_2", 15 0, L_0x84b1a1d60; 1 drivers
|
|
v0x84b185400_0 .net *"_ivl_7", 0 0, L_0x84aee3660; 1 drivers
|
|
v0x84b1854a0_0 .net *"_ivl_9", 15 0, L_0x84aee3700; 1 drivers
|
|
L_0x84a879eb8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b185540_0 .net/s "acc_in", 31 0, L_0x84a879eb8; 1 drivers
|
|
v0x84b1855e0_0 .net/s "acc_out", 31 0, L_0x84aed2800; alias, 1 drivers
|
|
v0x84b185680_0 .net/s "product", 15 0, L_0x84b1a1e00; 1 drivers
|
|
v0x84b185720_0 .net/s "product_ext", 31 0, L_0x84b1a1ea0; 1 drivers
|
|
v0x84b1857c0_0 .net/s "w", 7 0, L_0x84aee3840; 1 drivers
|
|
v0x84b185860_0 .net/s "x", 7 0, L_0x84aee37a0; 1 drivers
|
|
L_0x84b1a1cc0 .extend/s 16, L_0x84aee37a0;
|
|
L_0x84b1a1d60 .extend/s 16, L_0x84aee3840;
|
|
L_0x84b1a1e00 .arith/mult 16, L_0x84b1a1cc0, L_0x84b1a1d60;
|
|
L_0x84aee3660 .part L_0x84b1a1e00, 15, 1;
|
|
L_0x84aee3700 .repeat 16, 16, L_0x84aee3660;
|
|
L_0x84b1a1ea0 .concat [ 16 16 0 0], L_0x84b1a1e00, L_0x84aee3700;
|
|
L_0x84aed2800 .arith/sum 32, L_0x84a879eb8, L_0x84b1a1ea0;
|
|
S_0x84aeb0a80 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153b80 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84aeb0c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb0a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15aac0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15ab00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15ab40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b185900_0 .net/s *"_ivl_0", 15 0, L_0x84b1a1f40; 1 drivers
|
|
v0x84b1859a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a1fe0; 1 drivers
|
|
v0x84b185a40_0 .net *"_ivl_7", 0 0, L_0x84aee38e0; 1 drivers
|
|
v0x84b185ae0_0 .net *"_ivl_9", 15 0, L_0x84aee3980; 1 drivers
|
|
L_0x84a879f00 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b185b80_0 .net/s "acc_in", 31 0, L_0x84a879f00; 1 drivers
|
|
v0x84b185c20_0 .net/s "acc_out", 31 0, L_0x84aed28a0; alias, 1 drivers
|
|
v0x84b185cc0_0 .net/s "product", 15 0, L_0x84b1a2080; 1 drivers
|
|
v0x84b185d60_0 .net/s "product_ext", 31 0, L_0x84b1a2120; 1 drivers
|
|
v0x84b185e00_0 .net/s "w", 7 0, L_0x84aee3ac0; 1 drivers
|
|
v0x84b185ea0_0 .net/s "x", 7 0, L_0x84aee3a20; 1 drivers
|
|
L_0x84b1a1f40 .extend/s 16, L_0x84aee3a20;
|
|
L_0x84b1a1fe0 .extend/s 16, L_0x84aee3ac0;
|
|
L_0x84b1a2080 .arith/mult 16, L_0x84b1a1f40, L_0x84b1a1fe0;
|
|
L_0x84aee38e0 .part L_0x84b1a2080, 15, 1;
|
|
L_0x84aee3980 .repeat 16, 16, L_0x84aee38e0;
|
|
L_0x84b1a2120 .concat [ 16 16 0 0], L_0x84b1a2080, L_0x84aee3980;
|
|
L_0x84aed28a0 .arith/sum 32, L_0x84a879f00, L_0x84b1a2120;
|
|
S_0x84aeb0d80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153bc0 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84aeb0f00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb0d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15ab80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15abc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15ac00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b185f40_0 .net/s *"_ivl_0", 15 0, L_0x84b1a21c0; 1 drivers
|
|
v0x84b185fe0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a2260; 1 drivers
|
|
v0x84b186080_0 .net *"_ivl_7", 0 0, L_0x84aee3b60; 1 drivers
|
|
v0x84b186120_0 .net *"_ivl_9", 15 0, L_0x84aee3c00; 1 drivers
|
|
L_0x84a879f48 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1861c0_0 .net/s "acc_in", 31 0, L_0x84a879f48; 1 drivers
|
|
v0x84b186260_0 .net/s "acc_out", 31 0, L_0x84aed2940; alias, 1 drivers
|
|
v0x84b186300_0 .net/s "product", 15 0, L_0x84b1a2300; 1 drivers
|
|
v0x84b1863a0_0 .net/s "product_ext", 31 0, L_0x84b1a23a0; 1 drivers
|
|
v0x84b186440_0 .net/s "w", 7 0, L_0x84aee3d40; 1 drivers
|
|
v0x84b1864e0_0 .net/s "x", 7 0, L_0x84aee3ca0; 1 drivers
|
|
L_0x84b1a21c0 .extend/s 16, L_0x84aee3ca0;
|
|
L_0x84b1a2260 .extend/s 16, L_0x84aee3d40;
|
|
L_0x84b1a2300 .arith/mult 16, L_0x84b1a21c0, L_0x84b1a2260;
|
|
L_0x84aee3b60 .part L_0x84b1a2300, 15, 1;
|
|
L_0x84aee3c00 .repeat 16, 16, L_0x84aee3b60;
|
|
L_0x84b1a23a0 .concat [ 16 16 0 0], L_0x84b1a2300, L_0x84aee3c00;
|
|
L_0x84aed2940 .arith/sum 32, L_0x84a879f48, L_0x84b1a23a0;
|
|
S_0x84aeb1080 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153c00 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84aeb1200 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb1080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15ac40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15ac80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15acc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b186580_0 .net/s *"_ivl_0", 15 0, L_0x84b1a2440; 1 drivers
|
|
v0x84b186620_0 .net/s *"_ivl_2", 15 0, L_0x84b1a24e0; 1 drivers
|
|
v0x84b1866c0_0 .net *"_ivl_7", 0 0, L_0x84aee3de0; 1 drivers
|
|
v0x84b186760_0 .net *"_ivl_9", 15 0, L_0x84aee3e80; 1 drivers
|
|
L_0x84a879f90 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b186800_0 .net/s "acc_in", 31 0, L_0x84a879f90; 1 drivers
|
|
v0x84b1868a0_0 .net/s "acc_out", 31 0, L_0x84aed29e0; alias, 1 drivers
|
|
v0x84b186940_0 .net/s "product", 15 0, L_0x84b1a2580; 1 drivers
|
|
v0x84b1869e0_0 .net/s "product_ext", 31 0, L_0x84b1a2620; 1 drivers
|
|
v0x84b186a80_0 .net/s "w", 7 0, L_0x84aee8000; 1 drivers
|
|
v0x84b186b20_0 .net/s "x", 7 0, L_0x84aee3f20; 1 drivers
|
|
L_0x84b1a2440 .extend/s 16, L_0x84aee3f20;
|
|
L_0x84b1a24e0 .extend/s 16, L_0x84aee8000;
|
|
L_0x84b1a2580 .arith/mult 16, L_0x84b1a2440, L_0x84b1a24e0;
|
|
L_0x84aee3de0 .part L_0x84b1a2580, 15, 1;
|
|
L_0x84aee3e80 .repeat 16, 16, L_0x84aee3de0;
|
|
L_0x84b1a2620 .concat [ 16 16 0 0], L_0x84b1a2580, L_0x84aee3e80;
|
|
L_0x84aed29e0 .arith/sum 32, L_0x84a879f90, L_0x84b1a2620;
|
|
S_0x84aeb1380 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153c40 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84aeb1500 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb1380;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15ad00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15ad40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15ad80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b186bc0_0 .net/s *"_ivl_0", 15 0, L_0x84b1a26c0; 1 drivers
|
|
v0x84b186c60_0 .net/s *"_ivl_2", 15 0, L_0x84b1a2760; 1 drivers
|
|
v0x84b186d00_0 .net *"_ivl_7", 0 0, L_0x84aee80a0; 1 drivers
|
|
v0x84b186da0_0 .net *"_ivl_9", 15 0, L_0x84aee8140; 1 drivers
|
|
L_0x84a879fd8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b186e40_0 .net/s "acc_in", 31 0, L_0x84a879fd8; 1 drivers
|
|
v0x84b186ee0_0 .net/s "acc_out", 31 0, L_0x84aed2a80; alias, 1 drivers
|
|
v0x84b186f80_0 .net/s "product", 15 0, L_0x84b1a2800; 1 drivers
|
|
v0x84b187020_0 .net/s "product_ext", 31 0, L_0x84b1a28a0; 1 drivers
|
|
v0x84b1870c0_0 .net/s "w", 7 0, L_0x84aee8280; 1 drivers
|
|
v0x84b187160_0 .net/s "x", 7 0, L_0x84aee81e0; 1 drivers
|
|
L_0x84b1a26c0 .extend/s 16, L_0x84aee81e0;
|
|
L_0x84b1a2760 .extend/s 16, L_0x84aee8280;
|
|
L_0x84b1a2800 .arith/mult 16, L_0x84b1a26c0, L_0x84b1a2760;
|
|
L_0x84aee80a0 .part L_0x84b1a2800, 15, 1;
|
|
L_0x84aee8140 .repeat 16, 16, L_0x84aee80a0;
|
|
L_0x84b1a28a0 .concat [ 16 16 0 0], L_0x84b1a2800, L_0x84aee8140;
|
|
L_0x84aed2a80 .arith/sum 32, L_0x84a879fd8, L_0x84b1a28a0;
|
|
S_0x84aeb1680 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153c80 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84aedc850 .functor BUFZ 32, L_0x84aed2620, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb1800 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153cc0 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84aedc8c0 .functor BUFZ 32, L_0x84aed26c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb1980 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153d00 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84aedc930 .functor BUFZ 32, L_0x84aed2760, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb1b00 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153d40 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84aedc9a0 .functor BUFZ 32, L_0x84aed2800, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb1c80 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153d80 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84aedca10 .functor BUFZ 32, L_0x84aed28a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb1e00 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153dc0 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84aedca80 .functor BUFZ 32, L_0x84aed2940, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb1f80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153e00 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84aedcaf0 .functor BUFZ 32, L_0x84aed29e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb2100 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153e40 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84aedcb60 .functor BUFZ 32, L_0x84aed2a80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb2280 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153e80 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84aeb2400 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aeb2280;
|
|
.timescale 0 0;
|
|
P_0x84b153ec0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed2b20 .arith/sum 32, L_0x84aedc850, L_0x84aedc8c0;
|
|
S_0x84aeb2580 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aeb2280;
|
|
.timescale 0 0;
|
|
P_0x84b153f00 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed2bc0 .arith/sum 32, L_0x84aedc930, L_0x84aedc9a0;
|
|
S_0x84aeb2700 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84aeb2280;
|
|
.timescale 0 0;
|
|
P_0x84b153f40 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84aed2c60 .arith/sum 32, L_0x84aedca10, L_0x84aedca80;
|
|
S_0x84aeb2880 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84aeb2280;
|
|
.timescale 0 0;
|
|
P_0x84b153f80 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84aed2d00 .arith/sum 32, L_0x84aedcaf0, L_0x84aedcb60;
|
|
S_0x84aeb2a00 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b153fc0 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84aeb2b80 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aeb2a00;
|
|
.timescale 0 0;
|
|
P_0x84b188000 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed2da0 .arith/sum 32, L_0x84aed2b20, L_0x84aed2bc0;
|
|
S_0x84aeb2d00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aeb2a00;
|
|
.timescale 0 0;
|
|
P_0x84b188040 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed2e40 .arith/sum 32, L_0x84aed2c60, L_0x84aed2d00;
|
|
S_0x84aeb2e80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84aea7c00;
|
|
.timescale 0 0;
|
|
P_0x84b188080 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84aeb3000 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aeb2e80;
|
|
.timescale 0 0;
|
|
P_0x84b1880c0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed2ee0 .arith/sum 32, L_0x84aed2da0, L_0x84aed2e40;
|
|
S_0x84aeb3180 .scope generate, "GEN_NEURON[7]" "GEN_NEURON[7]" 12 34, 12 34 0, S_0x84ae85b00;
|
|
.timescale 0 0;
|
|
P_0x84b188100 .param/l "n" 1 12 34, +C4<0111>;
|
|
S_0x84aeb3300 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x84aeb3180;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x84aeb3480 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x84aeb34c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84aeb3500 .param/l "GROUPS" 1 7 20, +C4<00000000000000000000000000000100>;
|
|
P_0x84aeb3540 .param/l "GROUP_INDEX_WIDTH" 1 7 21, +C4<00000000000000000000000000000010>;
|
|
P_0x84aeb3580 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84aeb35c0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x84b18fe80_0 .net *"_ivl_0", 31 0, L_0x84b1a2a80; 1 drivers
|
|
v0x84b18ff20_0 .net *"_ivl_11", 31 0, L_0x84b1a2bc0; 1 drivers
|
|
v0x84b190000_0 .net *"_ivl_14", 31 0, L_0x84b1a2c60; 1 drivers
|
|
L_0x84a87a0f8 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1900a0_0 .net *"_ivl_17", 29 0, L_0x84a87a0f8; 1 drivers
|
|
L_0x84a87a140 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b190140_0 .net/2u *"_ivl_18", 31 0, L_0x84a87a140; 1 drivers
|
|
v0x84b1901e0_0 .net *"_ivl_21", 31 0, L_0x84b1a2d00; 1 drivers
|
|
L_0x84a87a188 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b190280_0 .net/2u *"_ivl_22", 31 0, L_0x84a87a188; 1 drivers
|
|
v0x84b190320_0 .net *"_ivl_25", 31 0, L_0x84b1a2da0; 1 drivers
|
|
v0x84b1903c0_0 .net *"_ivl_29", 0 0, L_0x84aee9ae0; 1 drivers
|
|
L_0x84a87a020 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b190460_0 .net *"_ivl_3", 29 0, L_0x84a87a020; 1 drivers
|
|
v0x84b190500_0 .net *"_ivl_31", 23 0, L_0x84aee9b80; 1 drivers
|
|
L_0x84a87a068 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1905a0_0 .net/2u *"_ivl_4", 31 0, L_0x84a87a068; 1 drivers
|
|
v0x84b190640_0 .net *"_ivl_7", 31 0, L_0x84b1a2b20; 1 drivers
|
|
L_0x84a87a0b0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b1906e0_0 .net/2u *"_ivl_8", 31 0, L_0x84a87a0b0; 1 drivers
|
|
v0x84b190780_0 .var/s "acc", 31 0;
|
|
v0x84b190820_0 .net/s "acc_next", 31 0, L_0x84aed3a20; 1 drivers
|
|
v0x84b1908c0_0 .net/s "bias", 7 0, L_0x84aee9cc0; 1 drivers
|
|
v0x84b190960_0 .net/s "bias_ext", 31 0, L_0x84b1a4320; 1 drivers
|
|
v0x84b190a00_0 .var "busy", 0 0;
|
|
v0x84b190aa0_0 .net "clk", 0 0, v0x84b1919a0_0; alias, 1 drivers
|
|
v0x84b190b40_0 .var "done", 0 0;
|
|
v0x84b190be0_0 .net/s "final_acc", 31 0, L_0x84aed3ac0; 1 drivers
|
|
v0x84b190c80_0 .var "group_index", 1 0;
|
|
v0x84b190d20_0 .net "rst", 0 0, v0x84b191c20_0; alias, 1 drivers
|
|
v0x84b190dc0_0 .net "start", 0 0, v0x84b191cc0_0; alias, 1 drivers
|
|
v0x84b190e60_0 .net/s "w_bus", 255 0, L_0x84aee9c20; 1 drivers
|
|
v0x84b190f00_0 .net/s "w_group", 63 0, L_0x84aee8640; 1 drivers
|
|
v0x84b190fa0_0 .net/s "x_bus", 255 0, v0x84b191e00_0; alias, 1 drivers
|
|
v0x84b191040_0 .net/s "x_group", 63 0, L_0x84aee85a0; 1 drivers
|
|
v0x84b1910e0_0 .var/s "y", 7 0;
|
|
L_0x84b1a2a80 .concat [ 2 30 0 0], v0x84b190c80_0, L_0x84a87a020;
|
|
L_0x84b1a2b20 .arith/mult 32, L_0x84b1a2a80, L_0x84a87a068;
|
|
L_0x84b1a2bc0 .arith/mult 32, L_0x84b1a2b20, L_0x84a87a0b0;
|
|
L_0x84aee85a0 .part/v v0x84b191e00_0, L_0x84b1a2bc0, 64;
|
|
L_0x84b1a2c60 .concat [ 2 30 0 0], v0x84b190c80_0, L_0x84a87a0f8;
|
|
L_0x84b1a2d00 .arith/mult 32, L_0x84b1a2c60, L_0x84a87a140;
|
|
L_0x84b1a2da0 .arith/mult 32, L_0x84b1a2d00, L_0x84a87a188;
|
|
L_0x84aee8640 .part/v L_0x84aee9c20, L_0x84b1a2da0, 64;
|
|
L_0x84aee9ae0 .part L_0x84aee9cc0, 7, 1;
|
|
L_0x84aee9b80 .repeat 24, 24, L_0x84aee9ae0;
|
|
L_0x84b1a4320 .concat [ 8 24 0 0], L_0x84aee9cc0, L_0x84aee9b80;
|
|
L_0x84aed3ac0 .arith/sum 32, L_0x84aed3a20, L_0x84b1a4320;
|
|
S_0x84aeb3600 .scope module, "u_mac8" "mac8" 7 52, 8 1 0, S_0x84aeb3300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84acc8a00 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84acc8a40 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8a80 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x84acc8ac0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x84b18fac0_0 .net/s "acc_in", 31 0, v0x84b190780_0; 1 drivers
|
|
v0x84b18fb60_0 .net/s "acc_out", 31 0, L_0x84aed3a20; alias, 1 drivers
|
|
v0x84b18fc00 .array "products", 7 0;
|
|
v0x84b18fc00_0 .net/s v0x84b18fc00 0, 31 0, L_0x84aed30c0; 1 drivers
|
|
v0x84b18fc00_1 .net/s v0x84b18fc00 1, 31 0, L_0x84aed3160; 1 drivers
|
|
v0x84b18fc00_2 .net/s v0x84b18fc00 2, 31 0, L_0x84aed3200; 1 drivers
|
|
v0x84b18fc00_3 .net/s v0x84b18fc00 3, 31 0, L_0x84aed32a0; 1 drivers
|
|
v0x84b18fc00_4 .net/s v0x84b18fc00 4, 31 0, L_0x84aed3340; 1 drivers
|
|
v0x84b18fc00_5 .net/s v0x84b18fc00 5, 31 0, L_0x84aed33e0; 1 drivers
|
|
v0x84b18fc00_6 .net/s v0x84b18fc00 6, 31 0, L_0x84aed3480; 1 drivers
|
|
v0x84b18fc00_7 .net/s v0x84b18fc00 7, 31 0, L_0x84aed3520; 1 drivers
|
|
v0x84b18fca0 .array "tree", 31 0;
|
|
v0x84b18fca0_0 .net/s v0x84b18fca0 0, 31 0, L_0x84aedcbd0; 1 drivers
|
|
v0x84b18fca0_1 .net/s v0x84b18fca0 1, 31 0, L_0x84aedcc40; 1 drivers
|
|
v0x84b18fca0_2 .net/s v0x84b18fca0 2, 31 0, L_0x84aedccb0; 1 drivers
|
|
v0x84b18fca0_3 .net/s v0x84b18fca0 3, 31 0, L_0x84aedcd20; 1 drivers
|
|
v0x84b18fca0_4 .net/s v0x84b18fca0 4, 31 0, L_0x84aedcd90; 1 drivers
|
|
v0x84b18fca0_5 .net/s v0x84b18fca0 5, 31 0, L_0x84aedce00; 1 drivers
|
|
v0x84b18fca0_6 .net/s v0x84b18fca0 6, 31 0, L_0x84aedce70; 1 drivers
|
|
v0x84b18fca0_7 .net/s v0x84b18fca0 7, 31 0, L_0x84aedcee0; 1 drivers
|
|
v0x84b18fca0_8 .net/s v0x84b18fca0 8, 31 0, L_0x84aed35c0; 1 drivers
|
|
v0x84b18fca0_9 .net/s v0x84b18fca0 9, 31 0, L_0x84aed3660; 1 drivers
|
|
v0x84b18fca0_10 .net/s v0x84b18fca0 10, 31 0, L_0x84aed3700; 1 drivers
|
|
v0x84b18fca0_11 .net/s v0x84b18fca0 11, 31 0, L_0x84aed37a0; 1 drivers
|
|
o0x84a85a3c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_12 .net/s v0x84b18fca0 12, 31 0, o0x84a85a3c0; 0 drivers
|
|
o0x84a85a3f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_13 .net/s v0x84b18fca0 13, 31 0, o0x84a85a3f0; 0 drivers
|
|
o0x84a85a420 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_14 .net/s v0x84b18fca0 14, 31 0, o0x84a85a420; 0 drivers
|
|
o0x84a85a450 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_15 .net/s v0x84b18fca0 15, 31 0, o0x84a85a450; 0 drivers
|
|
v0x84b18fca0_16 .net/s v0x84b18fca0 16, 31 0, L_0x84aed3840; 1 drivers
|
|
v0x84b18fca0_17 .net/s v0x84b18fca0 17, 31 0, L_0x84aed38e0; 1 drivers
|
|
o0x84a85a4e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_18 .net/s v0x84b18fca0 18, 31 0, o0x84a85a4e0; 0 drivers
|
|
o0x84a85a510 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_19 .net/s v0x84b18fca0 19, 31 0, o0x84a85a510; 0 drivers
|
|
o0x84a85a540 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_20 .net/s v0x84b18fca0 20, 31 0, o0x84a85a540; 0 drivers
|
|
o0x84a85a570 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_21 .net/s v0x84b18fca0 21, 31 0, o0x84a85a570; 0 drivers
|
|
o0x84a85a5a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_22 .net/s v0x84b18fca0 22, 31 0, o0x84a85a5a0; 0 drivers
|
|
o0x84a85a5d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_23 .net/s v0x84b18fca0 23, 31 0, o0x84a85a5d0; 0 drivers
|
|
v0x84b18fca0_24 .net/s v0x84b18fca0 24, 31 0, L_0x84aed3980; 1 drivers
|
|
o0x84a85a630 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_25 .net/s v0x84b18fca0 25, 31 0, o0x84a85a630; 0 drivers
|
|
o0x84a85a660 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_26 .net/s v0x84b18fca0 26, 31 0, o0x84a85a660; 0 drivers
|
|
o0x84a85a690 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_27 .net/s v0x84b18fca0 27, 31 0, o0x84a85a690; 0 drivers
|
|
o0x84a85a6c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_28 .net/s v0x84b18fca0 28, 31 0, o0x84a85a6c0; 0 drivers
|
|
o0x84a85a6f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_29 .net/s v0x84b18fca0 29, 31 0, o0x84a85a6f0; 0 drivers
|
|
o0x84a85a720 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_30 .net/s v0x84b18fca0 30, 31 0, o0x84a85a720; 0 drivers
|
|
o0x84a85a750 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x84b18fca0_31 .net/s v0x84b18fca0 31, 31 0, o0x84a85a750; 0 drivers
|
|
v0x84b18fd40_0 .net/s "w_bus", 63 0, L_0x84aee8640; alias, 1 drivers
|
|
v0x84b18fde0_0 .net/s "x_bus", 63 0, L_0x84aee85a0; alias, 1 drivers
|
|
L_0x84aee8820 .part L_0x84aee85a0, 0, 8;
|
|
L_0x84aee88c0 .part L_0x84aee8640, 0, 8;
|
|
L_0x84aee8aa0 .part L_0x84aee85a0, 8, 8;
|
|
L_0x84aee8b40 .part L_0x84aee8640, 8, 8;
|
|
L_0x84aee8d20 .part L_0x84aee85a0, 16, 8;
|
|
L_0x84aee8dc0 .part L_0x84aee8640, 16, 8;
|
|
L_0x84aee8fa0 .part L_0x84aee85a0, 24, 8;
|
|
L_0x84aee9040 .part L_0x84aee8640, 24, 8;
|
|
L_0x84aee9220 .part L_0x84aee85a0, 32, 8;
|
|
L_0x84aee92c0 .part L_0x84aee8640, 32, 8;
|
|
L_0x84aee94a0 .part L_0x84aee85a0, 40, 8;
|
|
L_0x84aee9540 .part L_0x84aee8640, 40, 8;
|
|
L_0x84aee9720 .part L_0x84aee85a0, 48, 8;
|
|
L_0x84aee97c0 .part L_0x84aee8640, 48, 8;
|
|
L_0x84aee99a0 .part L_0x84aee85a0, 56, 8;
|
|
L_0x84aee9a40 .part L_0x84aee8640, 56, 8;
|
|
L_0x84aed3a20 .arith/sum 32, v0x84b190780_0, L_0x84aed3980;
|
|
S_0x84aeb3780 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188140 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x84aeb3900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb3780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15adc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15ae00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15ae40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18c8c0_0 .net/s *"_ivl_0", 15 0, L_0x84b1a2e40; 1 drivers
|
|
v0x84b18c960_0 .net/s *"_ivl_2", 15 0, L_0x84b1a2ee0; 1 drivers
|
|
v0x84b18ca00_0 .net *"_ivl_7", 0 0, L_0x84aee86e0; 1 drivers
|
|
v0x84b18caa0_0 .net *"_ivl_9", 15 0, L_0x84aee8780; 1 drivers
|
|
L_0x84a87a1d0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18cb40_0 .net/s "acc_in", 31 0, L_0x84a87a1d0; 1 drivers
|
|
v0x84b18cbe0_0 .net/s "acc_out", 31 0, L_0x84aed30c0; alias, 1 drivers
|
|
v0x84b18cc80_0 .net/s "product", 15 0, L_0x84b1a2f80; 1 drivers
|
|
v0x84b18cd20_0 .net/s "product_ext", 31 0, L_0x84b1a3020; 1 drivers
|
|
v0x84b18cdc0_0 .net/s "w", 7 0, L_0x84aee88c0; 1 drivers
|
|
v0x84b18ce60_0 .net/s "x", 7 0, L_0x84aee8820; 1 drivers
|
|
L_0x84b1a2e40 .extend/s 16, L_0x84aee8820;
|
|
L_0x84b1a2ee0 .extend/s 16, L_0x84aee88c0;
|
|
L_0x84b1a2f80 .arith/mult 16, L_0x84b1a2e40, L_0x84b1a2ee0;
|
|
L_0x84aee86e0 .part L_0x84b1a2f80, 15, 1;
|
|
L_0x84aee8780 .repeat 16, 16, L_0x84aee86e0;
|
|
L_0x84b1a3020 .concat [ 16 16 0 0], L_0x84b1a2f80, L_0x84aee8780;
|
|
L_0x84aed30c0 .arith/sum 32, L_0x84a87a1d0, L_0x84b1a3020;
|
|
S_0x84aeb3a80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188180 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x84aeb3c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb3a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15ae80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15aec0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15af00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18cf00_0 .net/s *"_ivl_0", 15 0, L_0x84b1a30c0; 1 drivers
|
|
v0x84b18cfa0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a3160; 1 drivers
|
|
v0x84b18d040_0 .net *"_ivl_7", 0 0, L_0x84aee8960; 1 drivers
|
|
v0x84b18d0e0_0 .net *"_ivl_9", 15 0, L_0x84aee8a00; 1 drivers
|
|
L_0x84a87a218 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18d180_0 .net/s "acc_in", 31 0, L_0x84a87a218; 1 drivers
|
|
v0x84b18d220_0 .net/s "acc_out", 31 0, L_0x84aed3160; alias, 1 drivers
|
|
v0x84b18d2c0_0 .net/s "product", 15 0, L_0x84b1a3200; 1 drivers
|
|
v0x84b18d360_0 .net/s "product_ext", 31 0, L_0x84b1a32a0; 1 drivers
|
|
v0x84b18d400_0 .net/s "w", 7 0, L_0x84aee8b40; 1 drivers
|
|
v0x84b18d4a0_0 .net/s "x", 7 0, L_0x84aee8aa0; 1 drivers
|
|
L_0x84b1a30c0 .extend/s 16, L_0x84aee8aa0;
|
|
L_0x84b1a3160 .extend/s 16, L_0x84aee8b40;
|
|
L_0x84b1a3200 .arith/mult 16, L_0x84b1a30c0, L_0x84b1a3160;
|
|
L_0x84aee8960 .part L_0x84b1a3200, 15, 1;
|
|
L_0x84aee8a00 .repeat 16, 16, L_0x84aee8960;
|
|
L_0x84b1a32a0 .concat [ 16 16 0 0], L_0x84b1a3200, L_0x84aee8a00;
|
|
L_0x84aed3160 .arith/sum 32, L_0x84a87a218, L_0x84b1a32a0;
|
|
S_0x84aeb3d80 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b1881c0 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x84aeb8000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb3d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15af40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15af80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15afc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18d540_0 .net/s *"_ivl_0", 15 0, L_0x84b1a3340; 1 drivers
|
|
v0x84b18d5e0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a33e0; 1 drivers
|
|
v0x84b18d680_0 .net *"_ivl_7", 0 0, L_0x84aee8be0; 1 drivers
|
|
v0x84b18d720_0 .net *"_ivl_9", 15 0, L_0x84aee8c80; 1 drivers
|
|
L_0x84a87a260 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18d7c0_0 .net/s "acc_in", 31 0, L_0x84a87a260; 1 drivers
|
|
v0x84b18d860_0 .net/s "acc_out", 31 0, L_0x84aed3200; alias, 1 drivers
|
|
v0x84b18d900_0 .net/s "product", 15 0, L_0x84b1a3480; 1 drivers
|
|
v0x84b18d9a0_0 .net/s "product_ext", 31 0, L_0x84b1a3520; 1 drivers
|
|
v0x84b18da40_0 .net/s "w", 7 0, L_0x84aee8dc0; 1 drivers
|
|
v0x84b18dae0_0 .net/s "x", 7 0, L_0x84aee8d20; 1 drivers
|
|
L_0x84b1a3340 .extend/s 16, L_0x84aee8d20;
|
|
L_0x84b1a33e0 .extend/s 16, L_0x84aee8dc0;
|
|
L_0x84b1a3480 .arith/mult 16, L_0x84b1a3340, L_0x84b1a33e0;
|
|
L_0x84aee8be0 .part L_0x84b1a3480, 15, 1;
|
|
L_0x84aee8c80 .repeat 16, 16, L_0x84aee8be0;
|
|
L_0x84b1a3520 .concat [ 16 16 0 0], L_0x84b1a3480, L_0x84aee8c80;
|
|
L_0x84aed3200 .arith/sum 32, L_0x84a87a260, L_0x84b1a3520;
|
|
S_0x84aeb8180 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188200 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x84aeb8300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb8180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15b000 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15b040 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15b080 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18db80_0 .net/s *"_ivl_0", 15 0, L_0x84b1a35c0; 1 drivers
|
|
v0x84b18dc20_0 .net/s *"_ivl_2", 15 0, L_0x84b1a3660; 1 drivers
|
|
v0x84b18dcc0_0 .net *"_ivl_7", 0 0, L_0x84aee8e60; 1 drivers
|
|
v0x84b18dd60_0 .net *"_ivl_9", 15 0, L_0x84aee8f00; 1 drivers
|
|
L_0x84a87a2a8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18de00_0 .net/s "acc_in", 31 0, L_0x84a87a2a8; 1 drivers
|
|
v0x84b18dea0_0 .net/s "acc_out", 31 0, L_0x84aed32a0; alias, 1 drivers
|
|
v0x84b18df40_0 .net/s "product", 15 0, L_0x84b1a3700; 1 drivers
|
|
v0x84b18dfe0_0 .net/s "product_ext", 31 0, L_0x84b1a37a0; 1 drivers
|
|
v0x84b18e080_0 .net/s "w", 7 0, L_0x84aee9040; 1 drivers
|
|
v0x84b18e120_0 .net/s "x", 7 0, L_0x84aee8fa0; 1 drivers
|
|
L_0x84b1a35c0 .extend/s 16, L_0x84aee8fa0;
|
|
L_0x84b1a3660 .extend/s 16, L_0x84aee9040;
|
|
L_0x84b1a3700 .arith/mult 16, L_0x84b1a35c0, L_0x84b1a3660;
|
|
L_0x84aee8e60 .part L_0x84b1a3700, 15, 1;
|
|
L_0x84aee8f00 .repeat 16, 16, L_0x84aee8e60;
|
|
L_0x84b1a37a0 .concat [ 16 16 0 0], L_0x84b1a3700, L_0x84aee8f00;
|
|
L_0x84aed32a0 .arith/sum 32, L_0x84a87a2a8, L_0x84b1a37a0;
|
|
S_0x84aeb8480 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188240 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x84aeb8600 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb8480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15b0c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15b100 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15b140 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18e1c0_0 .net/s *"_ivl_0", 15 0, L_0x84b1a3840; 1 drivers
|
|
v0x84b18e260_0 .net/s *"_ivl_2", 15 0, L_0x84b1a38e0; 1 drivers
|
|
v0x84b18e300_0 .net *"_ivl_7", 0 0, L_0x84aee90e0; 1 drivers
|
|
v0x84b18e3a0_0 .net *"_ivl_9", 15 0, L_0x84aee9180; 1 drivers
|
|
L_0x84a87a2f0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18e440_0 .net/s "acc_in", 31 0, L_0x84a87a2f0; 1 drivers
|
|
v0x84b18e4e0_0 .net/s "acc_out", 31 0, L_0x84aed3340; alias, 1 drivers
|
|
v0x84b18e580_0 .net/s "product", 15 0, L_0x84b1a3980; 1 drivers
|
|
v0x84b18e620_0 .net/s "product_ext", 31 0, L_0x84b1a3a20; 1 drivers
|
|
v0x84b18e6c0_0 .net/s "w", 7 0, L_0x84aee92c0; 1 drivers
|
|
v0x84b18e760_0 .net/s "x", 7 0, L_0x84aee9220; 1 drivers
|
|
L_0x84b1a3840 .extend/s 16, L_0x84aee9220;
|
|
L_0x84b1a38e0 .extend/s 16, L_0x84aee92c0;
|
|
L_0x84b1a3980 .arith/mult 16, L_0x84b1a3840, L_0x84b1a38e0;
|
|
L_0x84aee90e0 .part L_0x84b1a3980, 15, 1;
|
|
L_0x84aee9180 .repeat 16, 16, L_0x84aee90e0;
|
|
L_0x84b1a3a20 .concat [ 16 16 0 0], L_0x84b1a3980, L_0x84aee9180;
|
|
L_0x84aed3340 .arith/sum 32, L_0x84a87a2f0, L_0x84b1a3a20;
|
|
S_0x84aeb8780 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188280 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x84aeb8900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb8780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15b180 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15b1c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15b200 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18e800_0 .net/s *"_ivl_0", 15 0, L_0x84b1a3ac0; 1 drivers
|
|
v0x84b18e8a0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a3b60; 1 drivers
|
|
v0x84b18e940_0 .net *"_ivl_7", 0 0, L_0x84aee9360; 1 drivers
|
|
v0x84b18e9e0_0 .net *"_ivl_9", 15 0, L_0x84aee9400; 1 drivers
|
|
L_0x84a87a338 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18ea80_0 .net/s "acc_in", 31 0, L_0x84a87a338; 1 drivers
|
|
v0x84b18eb20_0 .net/s "acc_out", 31 0, L_0x84aed33e0; alias, 1 drivers
|
|
v0x84b18ebc0_0 .net/s "product", 15 0, L_0x84b1a3c00; 1 drivers
|
|
v0x84b18ec60_0 .net/s "product_ext", 31 0, L_0x84b1a3ca0; 1 drivers
|
|
v0x84b18ed00_0 .net/s "w", 7 0, L_0x84aee9540; 1 drivers
|
|
v0x84b18eda0_0 .net/s "x", 7 0, L_0x84aee94a0; 1 drivers
|
|
L_0x84b1a3ac0 .extend/s 16, L_0x84aee94a0;
|
|
L_0x84b1a3b60 .extend/s 16, L_0x84aee9540;
|
|
L_0x84b1a3c00 .arith/mult 16, L_0x84b1a3ac0, L_0x84b1a3b60;
|
|
L_0x84aee9360 .part L_0x84b1a3c00, 15, 1;
|
|
L_0x84aee9400 .repeat 16, 16, L_0x84aee9360;
|
|
L_0x84b1a3ca0 .concat [ 16 16 0 0], L_0x84b1a3c00, L_0x84aee9400;
|
|
L_0x84aed33e0 .arith/sum 32, L_0x84a87a338, L_0x84b1a3ca0;
|
|
S_0x84aeb8a80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b1882c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x84aeb8c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb8a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15b240 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15b280 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15b2c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18ee40_0 .net/s *"_ivl_0", 15 0, L_0x84b1a3d40; 1 drivers
|
|
v0x84b18eee0_0 .net/s *"_ivl_2", 15 0, L_0x84b1a3de0; 1 drivers
|
|
v0x84b18ef80_0 .net *"_ivl_7", 0 0, L_0x84aee95e0; 1 drivers
|
|
v0x84b18f020_0 .net *"_ivl_9", 15 0, L_0x84aee9680; 1 drivers
|
|
L_0x84a87a380 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18f0c0_0 .net/s "acc_in", 31 0, L_0x84a87a380; 1 drivers
|
|
v0x84b18f160_0 .net/s "acc_out", 31 0, L_0x84aed3480; alias, 1 drivers
|
|
v0x84b18f200_0 .net/s "product", 15 0, L_0x84b1a3e80; 1 drivers
|
|
v0x84b18f2a0_0 .net/s "product_ext", 31 0, L_0x84b1a3f20; 1 drivers
|
|
v0x84b18f340_0 .net/s "w", 7 0, L_0x84aee97c0; 1 drivers
|
|
v0x84b18f3e0_0 .net/s "x", 7 0, L_0x84aee9720; 1 drivers
|
|
L_0x84b1a3d40 .extend/s 16, L_0x84aee9720;
|
|
L_0x84b1a3de0 .extend/s 16, L_0x84aee97c0;
|
|
L_0x84b1a3e80 .arith/mult 16, L_0x84b1a3d40, L_0x84b1a3de0;
|
|
L_0x84aee95e0 .part L_0x84b1a3e80, 15, 1;
|
|
L_0x84aee9680 .repeat 16, 16, L_0x84aee95e0;
|
|
L_0x84b1a3f20 .concat [ 16 16 0 0], L_0x84b1a3e80, L_0x84aee9680;
|
|
L_0x84aed3480 .arith/sum 32, L_0x84a87a380, L_0x84b1a3f20;
|
|
S_0x84aeb8d80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188300 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x84aeb8f00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x84aeb8d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x84b15b300 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x84b15b340 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x84b15b380 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x84b18f480_0 .net/s *"_ivl_0", 15 0, L_0x84b1a4000; 1 drivers
|
|
v0x84b18f520_0 .net/s *"_ivl_2", 15 0, L_0x84b1a40a0; 1 drivers
|
|
v0x84b18f5c0_0 .net *"_ivl_7", 0 0, L_0x84aee9860; 1 drivers
|
|
v0x84b18f660_0 .net *"_ivl_9", 15 0, L_0x84aee9900; 1 drivers
|
|
L_0x84a87a3c8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x84b18f700_0 .net/s "acc_in", 31 0, L_0x84a87a3c8; 1 drivers
|
|
v0x84b18f7a0_0 .net/s "acc_out", 31 0, L_0x84aed3520; alias, 1 drivers
|
|
v0x84b18f840_0 .net/s "product", 15 0, L_0x84b1a4140; 1 drivers
|
|
v0x84b18f8e0_0 .net/s "product_ext", 31 0, L_0x84b1a41e0; 1 drivers
|
|
v0x84b18f980_0 .net/s "w", 7 0, L_0x84aee9a40; 1 drivers
|
|
v0x84b18fa20_0 .net/s "x", 7 0, L_0x84aee99a0; 1 drivers
|
|
L_0x84b1a4000 .extend/s 16, L_0x84aee99a0;
|
|
L_0x84b1a40a0 .extend/s 16, L_0x84aee9a40;
|
|
L_0x84b1a4140 .arith/mult 16, L_0x84b1a4000, L_0x84b1a40a0;
|
|
L_0x84aee9860 .part L_0x84b1a4140, 15, 1;
|
|
L_0x84aee9900 .repeat 16, 16, L_0x84aee9860;
|
|
L_0x84b1a41e0 .concat [ 16 16 0 0], L_0x84b1a4140, L_0x84aee9900;
|
|
L_0x84aed3520 .arith/sum 32, L_0x84a87a3c8, L_0x84b1a41e0;
|
|
S_0x84aeb9080 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188340 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x84aedcbd0 .functor BUFZ 32, L_0x84aed30c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9200 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188380 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x84aedcc40 .functor BUFZ 32, L_0x84aed3160, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9380 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b1883c0 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x84aedccb0 .functor BUFZ 32, L_0x84aed3200, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9500 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188400 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x84aedcd20 .functor BUFZ 32, L_0x84aed32a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9680 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188440 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x84aedcd90 .functor BUFZ 32, L_0x84aed3340, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9800 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188480 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x84aedce00 .functor BUFZ 32, L_0x84aed33e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9980 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b1884c0 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x84aedce70 .functor BUFZ 32, L_0x84aed3480, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9b00 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188500 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x84aedcee0 .functor BUFZ 32, L_0x84aed3520, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x84aeb9c80 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188540 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x84aeb9e00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aeb9c80;
|
|
.timescale 0 0;
|
|
P_0x84b188580 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed35c0 .arith/sum 32, L_0x84aedcbd0, L_0x84aedcc40;
|
|
S_0x84aeb9f80 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aeb9c80;
|
|
.timescale 0 0;
|
|
P_0x84b1885c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed3660 .arith/sum 32, L_0x84aedccb0, L_0x84aedcd20;
|
|
S_0x84aeba100 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x84aeb9c80;
|
|
.timescale 0 0;
|
|
P_0x84b188600 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x84aed3700 .arith/sum 32, L_0x84aedcd90, L_0x84aedce00;
|
|
S_0x84aeba280 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x84aeb9c80;
|
|
.timescale 0 0;
|
|
P_0x84b188640 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x84aed37a0 .arith/sum 32, L_0x84aedce70, L_0x84aedcee0;
|
|
S_0x84aeba400 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188680 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x84aeba580 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aeba400;
|
|
.timescale 0 0;
|
|
P_0x84b1886c0 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed3840 .arith/sum 32, L_0x84aed35c0, L_0x84aed3660;
|
|
S_0x84aeba700 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x84aeba400;
|
|
.timescale 0 0;
|
|
P_0x84b188700 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x84aed38e0 .arith/sum 32, L_0x84aed3700, L_0x84aed37a0;
|
|
S_0x84aeba880 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x84aeb3600;
|
|
.timescale 0 0;
|
|
P_0x84b188740 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x84aebaa00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x84aeba880;
|
|
.timescale 0 0;
|
|
P_0x84b188780 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x84aed3980 .arith/sum 32, L_0x84aed3840, L_0x84aed38e0;
|
|
S_0x84aebab80 .scope task, "run_layer" "run_layer" 11 55, 11 55 0, S_0x102e24df0;
|
|
.timescale -9 -12;
|
|
E_0x84ae47900 .event anyedge, v0x84b191360_0;
|
|
TD_tb.run_layer ;
|
|
%wait E_0x84ae46680;
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x84b191cc0_0, 0, 1;
|
|
%wait E_0x84ae46680;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x84b191cc0_0, 0, 1;
|
|
T_0.0 ;
|
|
%load/vec4 v0x84b191a40_0;
|
|
%pad/u 32;
|
|
%pushi/vec4 1, 0, 32;
|
|
%cmp/e;
|
|
%flag_get/vec4 4;
|
|
%cmpi/ne 1, 0, 1;
|
|
%jmp/0xz T_0.1, 6;
|
|
%wait E_0x84ae47900;
|
|
%jmp T_0.0;
|
|
T_0.1 ;
|
|
%wait E_0x84ae46680;
|
|
%end;
|
|
.scope S_0x102e26840;
|
|
T_1 ;
|
|
%wait E_0x84ae46340;
|
|
%load/vec4 v0x84b0c5540_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b0c55e0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b0c5360_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5400_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b0c4f00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b0c5180_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c50e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c52c0_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b0c4e60_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b0c5220_0, 0;
|
|
%jmp T_1.1;
|
|
T_1.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5400_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c50e0_0, 0;
|
|
%load/vec4 v0x84b0c55e0_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_1.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_1.3, 6;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b0c55e0_0, 0;
|
|
%jmp T_1.5;
|
|
T_1.2 ;
|
|
%load/vec4 v0x84b0c54a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.6, 8;
|
|
%load/vec4 v0x84b0c57c0_0;
|
|
%assign/vec4 v0x84b0c52c0_0, 0;
|
|
%load/vec4 v0x84b0c4c80_0;
|
|
%assign/vec4 v0x84b0c4e60_0, 0;
|
|
%load/vec4 v0x84b0c5720_0;
|
|
%assign/vec4 v0x84b0c5220_0, 0;
|
|
%load/vec4 v0x84b0c4dc0_0;
|
|
%assign/vec4 v0x84b0c4f00_0, 0;
|
|
%load/vec4 v0x84b0c5680_0;
|
|
%assign/vec4 v0x84b0c5180_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b0c50e0_0, 0;
|
|
%pushi/vec4 1, 0, 2;
|
|
%assign/vec4 v0x84b0c55e0_0, 0;
|
|
T_1.6 ;
|
|
%jmp T_1.5;
|
|
T_1.3 ;
|
|
%load/vec4 v0x84b0c5040_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.8, 8;
|
|
%load/vec4 v0x84b0c52c0_0;
|
|
%nor/r;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.10, 8;
|
|
%load/vec4 v0x84b0c4fa0_0;
|
|
%assign/vec4 v0x84b0c5360_0, 0;
|
|
T_1.10 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b0c5400_0, 0;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b0c55e0_0, 0;
|
|
T_1.8 ;
|
|
%jmp T_1.5;
|
|
T_1.5 ;
|
|
%pop/vec4 1;
|
|
T_1.1 ;
|
|
%jmp T_1;
|
|
.thread T_1;
|
|
.scope S_0x102e314f0;
|
|
T_2 ;
|
|
%wait E_0x84ae46380;
|
|
%load/vec4 v0x84b0c5fe0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.0, 8;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b0c5e00_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5ea0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5900_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5d60_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b0c5c20_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b0c5cc0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b0c5a40_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b0c5ae0_0, 0, 32;
|
|
T_2.2 ; Top of for-loop
|
|
%load/vec4 v0x84b0c5ae0_0;
|
|
%cmpi/s 4096, 0, 32;
|
|
%jmp/0xz T_2.3, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%ix/getv/s 3, v0x84b0c5ae0_0;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x84b0c5b80, 0, 4;
|
|
T_2.4 ; for-loop step statement
|
|
%load/vec4 v0x84b0c5ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b0c5ae0_0, 0, 32;
|
|
%jmp T_2.2;
|
|
T_2.3 ; for-loop exit label
|
|
%jmp T_2.1;
|
|
T_2.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5ea0_0, 0;
|
|
%load/vec4 v0x84b0c5900_0;
|
|
%nor/r;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.5, 8;
|
|
%load/vec4 v0x84b0c5f40_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.7, 8;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b0c5900_0, 0;
|
|
%load/vec4 v0x84b0c6120_0;
|
|
%assign/vec4 v0x84b0c5d60_0, 0;
|
|
%load/vec4 v0x84b0c5860_0;
|
|
%assign/vec4 v0x84b0c5c20_0, 0;
|
|
%load/vec4 v0x84b0c6080_0;
|
|
%assign/vec4 v0x84b0c5cc0_0, 0;
|
|
%pushi/vec4 2, 0, 32;
|
|
%assign/vec4 v0x84b0c5a40_0, 0;
|
|
T_2.7 ;
|
|
%jmp T_2.6;
|
|
T_2.5 ;
|
|
%load/vec4 v0x84b0c5a40_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_2.9, 5;
|
|
%load/vec4 v0x84b0c5a40_0;
|
|
%subi 1, 0, 32;
|
|
%assign/vec4 v0x84b0c5a40_0, 0;
|
|
%jmp T_2.10;
|
|
T_2.9 ;
|
|
%load/vec4 v0x84b0c5d60_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.11, 8;
|
|
%load/vec4 v0x84b0c5c20_0;
|
|
%pad/u 32;
|
|
%cmpi/u 4096, 0, 32;
|
|
%jmp/0xz T_2.13, 5;
|
|
%load/vec4 v0x84b0c5cc0_0;
|
|
%ix/getv 3, v0x84b0c5c20_0;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x84b0c5b80, 0, 4;
|
|
T_2.13 ;
|
|
%jmp T_2.12;
|
|
T_2.11 ;
|
|
%load/vec4 v0x84b0c5c20_0;
|
|
%pad/u 32;
|
|
%cmpi/u 4096, 0, 32;
|
|
%jmp/0xz T_2.15, 5;
|
|
%ix/getv 4, v0x84b0c5c20_0;
|
|
%load/vec4a v0x84b0c5b80, 4;
|
|
%assign/vec4 v0x84b0c5e00_0, 0;
|
|
%jmp T_2.16;
|
|
T_2.15 ;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b0c5e00_0, 0;
|
|
T_2.16 ;
|
|
T_2.12 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b0c5ea0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b0c5900_0, 0;
|
|
T_2.10 ;
|
|
T_2.6 ;
|
|
T_2.1 ;
|
|
%jmp T_2;
|
|
.thread T_2;
|
|
.scope S_0x84ae7e100;
|
|
T_3 ;
|
|
%wait E_0x84ae463c0;
|
|
%load/vec4 v0x84b1552c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b155360_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b154aa0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b1550e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b155180_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b154e60_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b155040_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b154be0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b154fa0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154c80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154f00_0, 0;
|
|
%jmp T_3.1;
|
|
T_3.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b155180_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b154e60_0, 0;
|
|
%load/vec4 v0x84b155360_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_3.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_3.3, 6;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b155360_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b154e60_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154c80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154f00_0, 0;
|
|
%jmp T_3.5;
|
|
T_3.2 ;
|
|
%load/vec4 v0x84b155220_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.6, 8;
|
|
%load/vec4 v0x84b154a00_0;
|
|
%assign/vec4 v0x84b154aa0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154e60_0, 0;
|
|
%load/vec4 v0x84b1554a0_0;
|
|
%assign/vec4 v0x84b155040_0, 0;
|
|
%load/vec4 v0x84b154a00_0;
|
|
%ix/load 4, 1, 0;
|
|
%flag_set/imm 4, 0;
|
|
%shiftr 4;
|
|
%assign/vec4 v0x84b154be0_0, 0;
|
|
%load/vec4 v0x84b154a00_0;
|
|
%parti/s 1, 0, 2;
|
|
%cmpi/e 0, 0, 1;
|
|
%jmp/0xz T_3.8, 4;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b154c80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154f00_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%load/vec4 v0x84b155400_0;
|
|
%concat/vec4; draw_concat_vec4
|
|
%assign/vec4 v0x84b154fa0_0, 0;
|
|
%jmp T_3.9;
|
|
T_3.8 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b154c80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b154f00_0, 0;
|
|
%load/vec4 v0x84b155400_0;
|
|
%concati/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b154fa0_0, 0;
|
|
T_3.9 ;
|
|
%pushi/vec4 1, 0, 2;
|
|
%assign/vec4 v0x84b155360_0, 0;
|
|
T_3.6 ;
|
|
%jmp T_3.5;
|
|
T_3.3 ;
|
|
%load/vec4 v0x84b154dc0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.10, 8;
|
|
%load/vec4 v0x84b154aa0_0;
|
|
%parti/s 1, 0, 2;
|
|
%cmpi/e 0, 0, 1;
|
|
%jmp/0xz T_3.12, 4;
|
|
%load/vec4 v0x84b154d20_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b1550e0_0, 0;
|
|
%jmp T_3.13;
|
|
T_3.12 ;
|
|
%load/vec4 v0x84b154d20_0;
|
|
%parti/s 8, 8, 5;
|
|
%assign/vec4 v0x84b1550e0_0, 0;
|
|
T_3.13 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b155180_0, 0;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b155360_0, 0;
|
|
T_3.10 ;
|
|
%jmp T_3.5;
|
|
T_3.5 ;
|
|
%pop/vec4 1;
|
|
T_3.1 ;
|
|
%jmp T_3;
|
|
.thread T_3;
|
|
.scope S_0x84ae7e280;
|
|
T_4 ;
|
|
%wait E_0x84ae463c0;
|
|
%load/vec4 v0x84b15d9a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b15d900_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b15d400_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b15dd60_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15d680_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15d7c0_0, 0;
|
|
%jmp T_4.1;
|
|
T_4.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15d7c0_0, 0;
|
|
%load/vec4 v0x84b15da40_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_4.4, 9;
|
|
%load/vec4 v0x84b15d680_0;
|
|
%nor/r;
|
|
%and;
|
|
T_4.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b15d900_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b15d400_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15d680_0, 0;
|
|
%jmp T_4.3;
|
|
T_4.2 ;
|
|
%load/vec4 v0x84b15d680_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.5, 8;
|
|
%load/vec4 v0x84b15d900_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_4.7, 4;
|
|
%load/vec4 v0x84b15d860_0;
|
|
%assign/vec4 v0x84b15d400_0, 0;
|
|
%load/vec4 v0x84b15d860_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_4.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b15dd60_0, 0;
|
|
%jmp T_4.10;
|
|
T_4.9 ;
|
|
%load/vec4 v0x84b15d860_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_4.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b15dd60_0, 0;
|
|
%jmp T_4.12;
|
|
T_4.11 ;
|
|
%load/vec4 v0x84b15d860_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b15dd60_0, 0;
|
|
T_4.12 ;
|
|
T_4.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15d680_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15d7c0_0, 0;
|
|
%jmp T_4.8;
|
|
T_4.7 ;
|
|
%load/vec4 v0x84b15d4a0_0;
|
|
%assign/vec4 v0x84b15d400_0, 0;
|
|
%load/vec4 v0x84b15d900_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b15d900_0, 0;
|
|
T_4.8 ;
|
|
T_4.5 ;
|
|
T_4.3 ;
|
|
T_4.1 ;
|
|
%jmp T_4;
|
|
.thread T_4;
|
|
.scope S_0x102e269c0;
|
|
T_5 ;
|
|
%wait E_0x84ae463c0;
|
|
%load/vec4 v0x84b15f340_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.0, 8;
|
|
%pushi/vec4 0, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
%pushi/vec4 0, 0, 6;
|
|
%assign/vec4 v0x84b15ec60_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b15e9e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15e8a0_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b15e120_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b15e800_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15f200_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b15f8e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15ea80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15ebc0_0, 0;
|
|
%jmp T_5.1;
|
|
T_5.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15f200_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15ebc0_0, 0;
|
|
%load/vec4 v0x84b15f480_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.3, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 2, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.4, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 3, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.5, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 4, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.6, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 5, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.7, 6;
|
|
%pushi/vec4 0, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15ea80_0, 0;
|
|
%jmp T_5.9;
|
|
T_5.2 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15ea80_0, 0;
|
|
%load/vec4 v0x84b15f3e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.10, 8;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15ea80_0, 0;
|
|
%pushi/vec4 0, 0, 6;
|
|
%assign/vec4 v0x84b15ec60_0, 0;
|
|
%load/vec4 v0x84b15f700_0;
|
|
%assign/vec4 v0x84b15e120_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15e8a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
%pushi/vec4 1, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
T_5.10 ;
|
|
%jmp T_5.9;
|
|
T_5.3 ;
|
|
%load/vec4 v0x84b15e6c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.12, 8;
|
|
%load/vec4 v0x84b15e620_0;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%pad/u 7;
|
|
%ix/vec4 3;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x84b15f840, 0, 4;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_5.14, 4;
|
|
%pushi/vec4 0, 0, 6;
|
|
%assign/vec4 v0x84b15ec60_0, 0;
|
|
%load/vec4 v0x84b15f520_0;
|
|
%assign/vec4 v0x84b15e120_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15e8a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
%pushi/vec4 2, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
%jmp T_5.15;
|
|
T_5.14 ;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%addi 1, 0, 6;
|
|
%assign/vec4 v0x84b15ec60_0, 0;
|
|
%load/vec4 v0x84b15f700_0;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%pad/u 22;
|
|
%add;
|
|
%addi 1, 0, 22;
|
|
%assign/vec4 v0x84b15e120_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
T_5.15 ;
|
|
T_5.12 ;
|
|
%jmp T_5.9;
|
|
T_5.4 ;
|
|
%load/vec4 v0x84b15e6c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.16, 8;
|
|
%load/vec4 v0x84b15e620_0;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%pad/u 7;
|
|
%ix/vec4 3;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x84b15f660, 0, 4;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_5.18, 4;
|
|
%load/vec4 v0x84b15e940_0;
|
|
%assign/vec4 v0x84b15e120_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15e8a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
%pushi/vec4 3, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
%jmp T_5.19;
|
|
T_5.18 ;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%addi 1, 0, 6;
|
|
%assign/vec4 v0x84b15ec60_0, 0;
|
|
%load/vec4 v0x84b15f520_0;
|
|
%load/vec4 v0x84b15ec60_0;
|
|
%pad/u 22;
|
|
%add;
|
|
%addi 1, 0, 22;
|
|
%assign/vec4 v0x84b15e120_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15e760_0, 0;
|
|
T_5.19 ;
|
|
T_5.16 ;
|
|
%jmp T_5.9;
|
|
T_5.5 ;
|
|
%load/vec4 v0x84b15e6c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.20, 8;
|
|
%load/vec4 v0x84b15e620_0;
|
|
%assign/vec4 v0x84b15e9e0_0, 0;
|
|
%pushi/vec4 4, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
T_5.20 ;
|
|
%jmp T_5.9;
|
|
T_5.6 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15f200_0, 0;
|
|
%pushi/vec4 5, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
%jmp T_5.9;
|
|
T_5.7 ;
|
|
%load/vec4 v0x84b15f160_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.22, 8;
|
|
%load/vec4 v0x84b15f2a0_0;
|
|
%assign/vec4 v0x84b15f8e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15ea80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15ebc0_0, 0;
|
|
%pushi/vec4 0, 0, 4;
|
|
%assign/vec4 v0x84b15f480_0, 0;
|
|
T_5.22 ;
|
|
%jmp T_5.9;
|
|
T_5.9 ;
|
|
%pop/vec4 1;
|
|
T_5.1 ;
|
|
%jmp T_5;
|
|
.thread T_5;
|
|
.scope S_0x102e24c70;
|
|
T_6 ;
|
|
%wait E_0x84ae46640;
|
|
%load/vec4 v0x84b160820_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b15fa20_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b160a00_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b160aa0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15fd40_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160960_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b15ff20_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b160000_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x84b160320_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x84b15fca0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%jmp T_6.1;
|
|
T_6.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b160000_0, 0;
|
|
%load/vec4 v0x84b1608c0_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.3, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 2, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.4, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 3, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.5, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 4, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.6, 6;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15fd40_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160960_0, 0;
|
|
%jmp T_6.8;
|
|
T_6.2 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%load/vec4 v0x84b15fb60_0;
|
|
%pad/u 32;
|
|
%cmpi/e 11999, 0, 32;
|
|
%jmp/0xz T_6.9, 4;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
%pushi/vec4 1, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%jmp T_6.10;
|
|
T_6.9 ;
|
|
%load/vec4 v0x84b15fb60_0;
|
|
%addi 1, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
T_6.10 ;
|
|
%jmp T_6.8;
|
|
T_6.3 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%load/vec4 v0x84b1600a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.11, 8;
|
|
%load/vec4 v0x84b15fde0_0;
|
|
%assign/vec4 v0x84b15fa20_0, 0;
|
|
%load/vec4 v0x84b1601e0_0;
|
|
%assign/vec4 v0x84b160a00_0, 0;
|
|
%load/vec4 v0x84b160280_0;
|
|
%assign/vec4 v0x84b160aa0_0, 0;
|
|
%load/vec4 v0x84b15fe80_0;
|
|
%assign/vec4 v0x84b15fd40_0, 0;
|
|
%load/vec4 v0x84b160140_0;
|
|
%assign/vec4 v0x84b160960_0, 0;
|
|
%load/vec4 v0x84b15fde0_0;
|
|
%assign/vec4 v0x84b160320_0, 0;
|
|
%load/vec4 v0x84b15fe80_0;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%load/vec4 v0x84b160140_0;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
%load/vec4 v0x84b160280_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.13, 8;
|
|
%load/vec4 v0x84b1601e0_0;
|
|
%assign/vec4 v0x84b15fca0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 3, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%jmp T_6.14;
|
|
T_6.13 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 2, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
T_6.14 ;
|
|
T_6.11 ;
|
|
%jmp T_6.8;
|
|
T_6.4 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%load/vec4 v0x84b15fd40_0;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%load/vec4 v0x84b160960_0;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%load/vec4 v0x84b15fb60_0;
|
|
%pad/u 32;
|
|
%cmpi/e 5, 0, 32;
|
|
%jmp/0xz T_6.15, 4;
|
|
%load/vec4 v0x84b160460_0;
|
|
%assign/vec4 v0x84b15ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
%pushi/vec4 1, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%jmp T_6.16;
|
|
T_6.15 ;
|
|
%load/vec4 v0x84b15fb60_0;
|
|
%addi 1, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
T_6.16 ;
|
|
%jmp T_6.8;
|
|
T_6.5 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%load/vec4 v0x84b15fd40_0;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%load/vec4 v0x84b160960_0;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%load/vec4 v0x84b15fb60_0;
|
|
%pad/u 32;
|
|
%cmpi/e 5, 0, 32;
|
|
%jmp/0xz T_6.17, 4;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
%pushi/vec4 4, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%jmp T_6.18;
|
|
T_6.17 ;
|
|
%load/vec4 v0x84b15fb60_0;
|
|
%addi 1, 0, 14;
|
|
%assign/vec4 v0x84b15fb60_0, 0;
|
|
T_6.18 ;
|
|
%jmp T_6.8;
|
|
T_6.6 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1605a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1606e0_0, 0;
|
|
%load/vec4 v0x84b15fd40_0;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%load/vec4 v0x84b160960_0;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160780_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b15fc00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1603c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160640_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b160000_0, 0;
|
|
%pushi/vec4 1, 0, 3;
|
|
%assign/vec4 v0x84b1608c0_0, 0;
|
|
%jmp T_6.8;
|
|
T_6.8 ;
|
|
%pop/vec4 1;
|
|
T_6.1 ;
|
|
%jmp T_6;
|
|
.thread T_6;
|
|
.scope S_0x84ae85e00;
|
|
T_7 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b168fa0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b168f00_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b168a00_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b169360_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b168c80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b168dc0_0, 0;
|
|
%jmp T_7.1;
|
|
T_7.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b168dc0_0, 0;
|
|
%load/vec4 v0x84b169040_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_7.4, 9;
|
|
%load/vec4 v0x84b168c80_0;
|
|
%nor/r;
|
|
%and;
|
|
T_7.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b168f00_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b168a00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b168c80_0, 0;
|
|
%jmp T_7.3;
|
|
T_7.2 ;
|
|
%load/vec4 v0x84b168c80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.5, 8;
|
|
%load/vec4 v0x84b168f00_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_7.7, 4;
|
|
%load/vec4 v0x84b168e60_0;
|
|
%assign/vec4 v0x84b168a00_0, 0;
|
|
%load/vec4 v0x84b168e60_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_7.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b169360_0, 0;
|
|
%jmp T_7.10;
|
|
T_7.9 ;
|
|
%load/vec4 v0x84b168e60_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_7.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b169360_0, 0;
|
|
%jmp T_7.12;
|
|
T_7.11 ;
|
|
%load/vec4 v0x84b168e60_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b169360_0, 0;
|
|
T_7.12 ;
|
|
T_7.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b168c80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b168dc0_0, 0;
|
|
%jmp T_7.8;
|
|
T_7.7 ;
|
|
%load/vec4 v0x84b168aa0_0;
|
|
%assign/vec4 v0x84b168a00_0, 0;
|
|
%load/vec4 v0x84b168f00_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b168f00_0, 0;
|
|
T_7.8 ;
|
|
T_7.5 ;
|
|
T_7.3 ;
|
|
T_7.1 ;
|
|
%jmp T_7;
|
|
.thread T_7;
|
|
.scope S_0x84ae89800;
|
|
T_8 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b16d860_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b16d7c0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b16d2c0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b16dc20_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b16d540_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b16d680_0, 0;
|
|
%jmp T_8.1;
|
|
T_8.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b16d680_0, 0;
|
|
%load/vec4 v0x84b16d900_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_8.4, 9;
|
|
%load/vec4 v0x84b16d540_0;
|
|
%nor/r;
|
|
%and;
|
|
T_8.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b16d7c0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b16d2c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b16d540_0, 0;
|
|
%jmp T_8.3;
|
|
T_8.2 ;
|
|
%load/vec4 v0x84b16d540_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.5, 8;
|
|
%load/vec4 v0x84b16d7c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_8.7, 4;
|
|
%load/vec4 v0x84b16d720_0;
|
|
%assign/vec4 v0x84b16d2c0_0, 0;
|
|
%load/vec4 v0x84b16d720_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_8.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b16dc20_0, 0;
|
|
%jmp T_8.10;
|
|
T_8.9 ;
|
|
%load/vec4 v0x84b16d720_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_8.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b16dc20_0, 0;
|
|
%jmp T_8.12;
|
|
T_8.11 ;
|
|
%load/vec4 v0x84b16d720_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b16dc20_0, 0;
|
|
T_8.12 ;
|
|
T_8.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b16d540_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b16d680_0, 0;
|
|
%jmp T_8.8;
|
|
T_8.7 ;
|
|
%load/vec4 v0x84b16d360_0;
|
|
%assign/vec4 v0x84b16d2c0_0, 0;
|
|
%load/vec4 v0x84b16d7c0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b16d7c0_0, 0;
|
|
T_8.8 ;
|
|
T_8.5 ;
|
|
T_8.3 ;
|
|
T_8.1 ;
|
|
%jmp T_8;
|
|
.thread T_8;
|
|
.scope S_0x84ae95200;
|
|
T_9 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b172120_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b172080_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b171b80_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b1724e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b171e00_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b171f40_0, 0;
|
|
%jmp T_9.1;
|
|
T_9.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b171f40_0, 0;
|
|
%load/vec4 v0x84b1721c0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_9.4, 9;
|
|
%load/vec4 v0x84b171e00_0;
|
|
%nor/r;
|
|
%and;
|
|
T_9.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b172080_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b171b80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b171e00_0, 0;
|
|
%jmp T_9.3;
|
|
T_9.2 ;
|
|
%load/vec4 v0x84b171e00_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.5, 8;
|
|
%load/vec4 v0x84b172080_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_9.7, 4;
|
|
%load/vec4 v0x84b171fe0_0;
|
|
%assign/vec4 v0x84b171b80_0, 0;
|
|
%load/vec4 v0x84b171fe0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_9.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b1724e0_0, 0;
|
|
%jmp T_9.10;
|
|
T_9.9 ;
|
|
%load/vec4 v0x84b171fe0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_9.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b1724e0_0, 0;
|
|
%jmp T_9.12;
|
|
T_9.11 ;
|
|
%load/vec4 v0x84b171fe0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b1724e0_0, 0;
|
|
T_9.12 ;
|
|
T_9.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b171e00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b171f40_0, 0;
|
|
%jmp T_9.8;
|
|
T_9.7 ;
|
|
%load/vec4 v0x84b171c20_0;
|
|
%assign/vec4 v0x84b171b80_0, 0;
|
|
%load/vec4 v0x84b172080_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b172080_0, 0;
|
|
T_9.8 ;
|
|
T_9.5 ;
|
|
T_9.3 ;
|
|
T_9.1 ;
|
|
%jmp T_9;
|
|
.thread T_9;
|
|
.scope S_0x84ae9cc00;
|
|
T_10 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b1769e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b176940_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b176440_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b176da0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1766c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b176800_0, 0;
|
|
%jmp T_10.1;
|
|
T_10.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b176800_0, 0;
|
|
%load/vec4 v0x84b176a80_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_10.4, 9;
|
|
%load/vec4 v0x84b1766c0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_10.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b176940_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b176440_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b1766c0_0, 0;
|
|
%jmp T_10.3;
|
|
T_10.2 ;
|
|
%load/vec4 v0x84b1766c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.5, 8;
|
|
%load/vec4 v0x84b176940_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_10.7, 4;
|
|
%load/vec4 v0x84b1768a0_0;
|
|
%assign/vec4 v0x84b176440_0, 0;
|
|
%load/vec4 v0x84b1768a0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_10.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b176da0_0, 0;
|
|
%jmp T_10.10;
|
|
T_10.9 ;
|
|
%load/vec4 v0x84b1768a0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_10.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b176da0_0, 0;
|
|
%jmp T_10.12;
|
|
T_10.11 ;
|
|
%load/vec4 v0x84b1768a0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b176da0_0, 0;
|
|
T_10.12 ;
|
|
T_10.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b1766c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b176800_0, 0;
|
|
%jmp T_10.8;
|
|
T_10.7 ;
|
|
%load/vec4 v0x84b1764e0_0;
|
|
%assign/vec4 v0x84b176440_0, 0;
|
|
%load/vec4 v0x84b176940_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b176940_0, 0;
|
|
T_10.8 ;
|
|
T_10.5 ;
|
|
T_10.3 ;
|
|
T_10.1 ;
|
|
%jmp T_10;
|
|
.thread T_10;
|
|
.scope S_0x84aea0600;
|
|
T_11 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b17f2a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_11.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b17f200_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b17ed00_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b17f660_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b17ef80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b17f0c0_0, 0;
|
|
%jmp T_11.1;
|
|
T_11.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b17f0c0_0, 0;
|
|
%load/vec4 v0x84b17f340_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_11.4, 9;
|
|
%load/vec4 v0x84b17ef80_0;
|
|
%nor/r;
|
|
%and;
|
|
T_11.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_11.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b17f200_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b17ed00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b17ef80_0, 0;
|
|
%jmp T_11.3;
|
|
T_11.2 ;
|
|
%load/vec4 v0x84b17ef80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_11.5, 8;
|
|
%load/vec4 v0x84b17f200_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_11.7, 4;
|
|
%load/vec4 v0x84b17f160_0;
|
|
%assign/vec4 v0x84b17ed00_0, 0;
|
|
%load/vec4 v0x84b17f160_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_11.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b17f660_0, 0;
|
|
%jmp T_11.10;
|
|
T_11.9 ;
|
|
%load/vec4 v0x84b17f160_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_11.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b17f660_0, 0;
|
|
%jmp T_11.12;
|
|
T_11.11 ;
|
|
%load/vec4 v0x84b17f160_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b17f660_0, 0;
|
|
T_11.12 ;
|
|
T_11.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b17ef80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b17f0c0_0, 0;
|
|
%jmp T_11.8;
|
|
T_11.7 ;
|
|
%load/vec4 v0x84b17eda0_0;
|
|
%assign/vec4 v0x84b17ed00_0, 0;
|
|
%load/vec4 v0x84b17f200_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b17f200_0, 0;
|
|
T_11.8 ;
|
|
T_11.5 ;
|
|
T_11.3 ;
|
|
T_11.1 ;
|
|
%jmp T_11;
|
|
.thread T_11;
|
|
.scope S_0x84aea4000;
|
|
T_12 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b183b60_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b183ac0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b1835c0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b183f20_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b183840_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b183980_0, 0;
|
|
%jmp T_12.1;
|
|
T_12.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b183980_0, 0;
|
|
%load/vec4 v0x84b183c00_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_12.4, 9;
|
|
%load/vec4 v0x84b183840_0;
|
|
%nor/r;
|
|
%and;
|
|
T_12.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b183ac0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b1835c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b183840_0, 0;
|
|
%jmp T_12.3;
|
|
T_12.2 ;
|
|
%load/vec4 v0x84b183840_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.5, 8;
|
|
%load/vec4 v0x84b183ac0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_12.7, 4;
|
|
%load/vec4 v0x84b183a20_0;
|
|
%assign/vec4 v0x84b1835c0_0, 0;
|
|
%load/vec4 v0x84b183a20_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_12.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b183f20_0, 0;
|
|
%jmp T_12.10;
|
|
T_12.9 ;
|
|
%load/vec4 v0x84b183a20_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_12.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b183f20_0, 0;
|
|
%jmp T_12.12;
|
|
T_12.11 ;
|
|
%load/vec4 v0x84b183a20_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b183f20_0, 0;
|
|
T_12.12 ;
|
|
T_12.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b183840_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b183980_0, 0;
|
|
%jmp T_12.8;
|
|
T_12.7 ;
|
|
%load/vec4 v0x84b183660_0;
|
|
%assign/vec4 v0x84b1835c0_0, 0;
|
|
%load/vec4 v0x84b183ac0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b183ac0_0, 0;
|
|
T_12.8 ;
|
|
T_12.5 ;
|
|
T_12.3 ;
|
|
T_12.1 ;
|
|
%jmp T_12;
|
|
.thread T_12;
|
|
.scope S_0x84aea7900;
|
|
T_13 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b18c460_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_13.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b18c3c0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b187e80_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b18c820_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b18c140_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b18c280_0, 0;
|
|
%jmp T_13.1;
|
|
T_13.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b18c280_0, 0;
|
|
%load/vec4 v0x84b18c500_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_13.4, 9;
|
|
%load/vec4 v0x84b18c140_0;
|
|
%nor/r;
|
|
%and;
|
|
T_13.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_13.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b18c3c0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b187e80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b18c140_0, 0;
|
|
%jmp T_13.3;
|
|
T_13.2 ;
|
|
%load/vec4 v0x84b18c140_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_13.5, 8;
|
|
%load/vec4 v0x84b18c3c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_13.7, 4;
|
|
%load/vec4 v0x84b18c320_0;
|
|
%assign/vec4 v0x84b187e80_0, 0;
|
|
%load/vec4 v0x84b18c320_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_13.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b18c820_0, 0;
|
|
%jmp T_13.10;
|
|
T_13.9 ;
|
|
%load/vec4 v0x84b18c320_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_13.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b18c820_0, 0;
|
|
%jmp T_13.12;
|
|
T_13.11 ;
|
|
%load/vec4 v0x84b18c320_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b18c820_0, 0;
|
|
T_13.12 ;
|
|
T_13.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b18c140_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b18c280_0, 0;
|
|
%jmp T_13.8;
|
|
T_13.7 ;
|
|
%load/vec4 v0x84b187f20_0;
|
|
%assign/vec4 v0x84b187e80_0, 0;
|
|
%load/vec4 v0x84b18c3c0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b18c3c0_0, 0;
|
|
T_13.8 ;
|
|
T_13.5 ;
|
|
T_13.3 ;
|
|
T_13.1 ;
|
|
%jmp T_13;
|
|
.thread T_13;
|
|
.scope S_0x84aeb3300;
|
|
T_14 ;
|
|
%wait E_0x84ae46680;
|
|
%load/vec4 v0x84b190d20_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b190c80_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b190780_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b1910e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b190a00_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b190b40_0, 0;
|
|
%jmp T_14.1;
|
|
T_14.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b190b40_0, 0;
|
|
%load/vec4 v0x84b190dc0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_14.4, 9;
|
|
%load/vec4 v0x84b190a00_0;
|
|
%nor/r;
|
|
%and;
|
|
T_14.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x84b190c80_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x84b190780_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b190a00_0, 0;
|
|
%jmp T_14.3;
|
|
T_14.2 ;
|
|
%load/vec4 v0x84b190a00_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.5, 8;
|
|
%load/vec4 v0x84b190c80_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_14.7, 4;
|
|
%load/vec4 v0x84b190be0_0;
|
|
%assign/vec4 v0x84b190780_0, 0;
|
|
%load/vec4 v0x84b190be0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_14.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x84b1910e0_0, 0;
|
|
%jmp T_14.10;
|
|
T_14.9 ;
|
|
%load/vec4 v0x84b190be0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_14.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x84b1910e0_0, 0;
|
|
%jmp T_14.12;
|
|
T_14.11 ;
|
|
%load/vec4 v0x84b190be0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x84b1910e0_0, 0;
|
|
T_14.12 ;
|
|
T_14.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x84b190a00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x84b190b40_0, 0;
|
|
%jmp T_14.8;
|
|
T_14.7 ;
|
|
%load/vec4 v0x84b190820_0;
|
|
%assign/vec4 v0x84b190780_0, 0;
|
|
%load/vec4 v0x84b190c80_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x84b190c80_0, 0;
|
|
T_14.8 ;
|
|
T_14.5 ;
|
|
T_14.3 ;
|
|
T_14.1 ;
|
|
%jmp T_14;
|
|
.thread T_14;
|
|
.scope S_0x102e24df0;
|
|
T_15 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x84b1919a0_0, 0, 1;
|
|
T_15.0 ;
|
|
%delay 5000, 0;
|
|
%load/vec4 v0x84b1919a0_0;
|
|
%inv;
|
|
%store/vec4 v0x84b1919a0_0, 0, 1;
|
|
%jmp T_15.0;
|
|
T_15.1 ;
|
|
%end;
|
|
.thread T_15;
|
|
.scope S_0x102e24df0;
|
|
T_16 ;
|
|
%vpi_call/w 11 71 "$dumpfile", "sim/layer.vcd" {0 0 0};
|
|
%vpi_call/w 11 72 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x102e24df0 {0 0 0};
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x84b191c20_0, 0, 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x84b191cc0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 256;
|
|
%store/vec4 v0x84b191e00_0, 0, 256;
|
|
%pushi/vec4 0, 0, 2048;
|
|
%store/vec4 v0x84b191d60_0, 0, 2048;
|
|
%pushi/vec4 0, 0, 64;
|
|
%store/vec4 v0x84b191860_0, 0, 64;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
%pushi/vec4 2, 0, 32;
|
|
T_16.0 %dup/vec4;
|
|
%cmpi/s 0, 0, 32;
|
|
%jmp/1xz T_16.1, 5;
|
|
%jmp/1 T_16.1, 4;
|
|
%subi 1, 0, 32;
|
|
%wait E_0x84ae46680;
|
|
%jmp T_16.0;
|
|
T_16.1 ;
|
|
%pop/vec4 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x84b191c20_0, 0, 1;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.2 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.3, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191e00_0, 4, 8;
|
|
T_16.4 ; for-loop step statement
|
|
%load/vec4 v0x84b191b80_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.2;
|
|
T_16.3 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.5 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.6, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191d60_0, 4, 8;
|
|
T_16.7 ; for-loop step statement
|
|
%load/vec4 v0x84b191b80_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.5;
|
|
T_16.6 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 8;
|
|
%ix/load 4, 0, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x84b191860_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.8 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.9, 5;
|
|
%pushi/vec4 3, 0, 8;
|
|
%pushi/vec4 256, 0, 32;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191d60_0, 4, 8;
|
|
T_16.10 ; for-loop step statement
|
|
%load/vec4 v0x84b191b80_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.8;
|
|
T_16.9 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.11 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.12, 5;
|
|
%pushi/vec4 255, 0, 8;
|
|
%pushi/vec4 512, 0, 32;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191d60_0, 4, 8;
|
|
T_16.13 ; for-loop step statement
|
|
%load/vec4 v0x84b191b80_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.11;
|
|
T_16.12 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.14 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.15, 5;
|
|
%pushi/vec4 8, 0, 8;
|
|
%pushi/vec4 768, 0, 32;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191d60_0, 4, 8;
|
|
T_16.16 ; for-loop step statement
|
|
%load/vec4 v0x84b191b80_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.14;
|
|
T_16.15 ; for-loop exit label
|
|
%pushi/vec4 5, 0, 8;
|
|
%ix/load 4, 32, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x84b191860_0, 4, 8;
|
|
%pushi/vec4 251, 0, 8;
|
|
%ix/load 4, 40, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x84b191860_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.17 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.18, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%pushi/vec4 1536, 0, 32;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191d60_0, 4, 8;
|
|
T_16.19 ; for-loop step statement
|
|
%load/vec4 v0x84b191b80_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.17;
|
|
T_16.18 ; for-loop exit label
|
|
%pushi/vec4 246, 0, 8;
|
|
%ix/load 4, 48, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x84b191860_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
T_16.20 ; Top of for-loop
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.21, 5;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%cmpi/s 16, 0, 32;
|
|
%flag_mov 8, 5;
|
|
%jmp/0 T_16.23, 8;
|
|
%pushi/vec4 1, 0, 8;
|
|
%jmp/1 T_16.24, 8;
|
|
T_16.23 ; End of true expr.
|
|
%pushi/vec4 0, 0, 8;
|
|
%jmp/0 T_16.24, 8;
|
|
; End of false expr.
|
|
%blend;
|
|
T_16.24;
|
|
%pushi/vec4 1792, 0, 32;
|
|
%load/vec4 v0x84b191b80_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x84b191d60_0, 4, 8;
|
|
T_16.22 ; for-loop step statement
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|
%load/vec4 v0x84b191b80_0;
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|
%addi 1, 0, 32;
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|
%store/vec4 v0x84b191b80_0, 0, 32;
|
|
%jmp T_16.20;
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|
T_16.21 ; for-loop exit label
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|
%pushi/vec4 5, 0, 8;
|
|
%ix/load 4, 56, 0;
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|
%flag_set/imm 4, 0;
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|
%store/vec4 v0x84b191860_0, 4, 8;
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|
%vpi_call/w 11 192 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 11 193 "$display", "==============================" {0 0 0};
|
|
%vpi_call/w 11 194 "$display", "LAYER TEST (INT8)" {0 0 0};
|
|
%vpi_call/w 11 195 "$display", "==============================" {0 0 0};
|
|
%fork TD_tb.run_layer, S_0x84aebab80;
|
|
%join;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 0, 2;
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|
%vpi_call/w 11 199 "$display", "Neuron 0 = %5d expected = 32", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 8, 5;
|
|
%vpi_call/w 11 200 "$display", "Neuron 1 = %5d expected = 96", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 16, 6;
|
|
%vpi_call/w 11 201 "$display", "Neuron 2 = %5d expected = 0", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 24, 6;
|
|
%vpi_call/w 11 202 "$display", "Neuron 3 = %5d expected = 127", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 32, 7;
|
|
%vpi_call/w 11 203 "$display", "Neuron 4 = %5d expected = 5", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 40, 7;
|
|
%vpi_call/w 11 204 "$display", "Neuron 5 = %5d expected = 0", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 48, 7;
|
|
%vpi_call/w 11 205 "$display", "Neuron 6 = %5d expected = 22", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 56, 7;
|
|
%vpi_call/w 11 206 "$display", "Neuron 7 = %5d expected = 21", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 0, 2;
|
|
%cmpi/ne 32, 0, 8;
|
|
%jmp/0xz T_16.25, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.25 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 8, 5;
|
|
%cmpi/ne 96, 0, 8;
|
|
%jmp/0xz T_16.27, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.27 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 16, 6;
|
|
%cmpi/ne 0, 0, 8;
|
|
%jmp/0xz T_16.29, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.29 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 24, 6;
|
|
%cmpi/ne 127, 0, 8;
|
|
%jmp/0xz T_16.31, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.31 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 32, 7;
|
|
%cmpi/ne 5, 0, 8;
|
|
%jmp/0xz T_16.33, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.33 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 40, 7;
|
|
%cmpi/ne 0, 0, 8;
|
|
%jmp/0xz T_16.35, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.35 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 48, 7;
|
|
%cmpi/ne 22, 0, 8;
|
|
%jmp/0xz T_16.37, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.37 ;
|
|
%load/vec4 v0x84b191ea0_0;
|
|
%parti/s 8, 56, 7;
|
|
%cmpi/ne 21, 0, 8;
|
|
%jmp/0xz T_16.39, 6;
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x84b191ae0_0, 0, 32;
|
|
T_16.39 ;
|
|
%vpi_call/w 11 217 "$display", "busy = %0d", v0x84b191900_0 {0 0 0};
|
|
%vpi_call/w 11 218 "$display", "done = %0d", v0x84b191a40_0 {0 0 0};
|
|
%vpi_call/w 11 220 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 11 221 "$display", "==============================" {0 0 0};
|
|
%load/vec4 v0x84b191ae0_0;
|
|
%cmpi/e 0, 0, 32;
|
|
%jmp/0xz T_16.41, 4;
|
|
%vpi_call/w 11 224 "$display", "PASS - ALL 8 NEURONS" {0 0 0};
|
|
%jmp T_16.42;
|
|
T_16.41 ;
|
|
%vpi_call/w 11 226 "$display", "FAIL - %0d ERRORS", v0x84b191ae0_0 {0 0 0};
|
|
T_16.42 ;
|
|
%vpi_call/w 11 228 "$display", "==============================" {0 0 0};
|
|
%vpi_call/w 11 229 "$display", "LAYER TEST FINISHED" {0 0 0};
|
|
%vpi_call/w 11 230 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 11 232 "$finish" {0 0 0};
|
|
%end;
|
|
.thread T_16;
|
|
# The file index is used to find the file name in the following table.
|
|
:file_names 13;
|
|
"N/A";
|
|
"<interactive>";
|
|
"-";
|
|
"rtl/memory_interface.v";
|
|
"rtl/memory_model.v";
|
|
"rtl/neuron_memory.v";
|
|
"rtl/int8_memory_access.v";
|
|
"rtl/neuron_parallel.v";
|
|
"rtl/mac8.v";
|
|
"rtl/mac_unit.v";
|
|
"rtl/psram_controller.v";
|
|
"sim/layer_tb.v";
|
|
"rtl/layer.v";
|