FPGA-Neural/benchmark_results/fpga_benchmark.csv at 8e014d8d49d91cd7182aa61e76bff8bcf0462b31

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michele cfd5e98a0e feat: add FPGA-Neural benchmark tooling + same-tier ECP5 P2/P4/P8 results

tools/fpga_benchmark.py: parametric Yosys + nextpnr-ecp5 benchmark
harness for the LFE5U-45F-8BG381 (speed grade -8, 80 MHz target),
sweeping PARALLEL over the neuron layer and parsing Fmax/LUT4/DFF/DSP
utilization out of the nextpnr report into JSON/CSV.

synth/ecp5/p2, p4, p8: real synthesis+PnR results backing the
same-price-tier FPGA comparison (P2: 87.88 MHz PASS, P4: 75.01 MHz
FAIL, P8: 147.62 MHz PASS -- non-monotonic, dominated by placement
noise since the whole design uses <2% of the device's LUT4 fabric at
every setting, and P8 notably maps to 0 DSP blocks vs 8/16 for P2/P4).

synth/ecp5/top.v: benchmark harness top-level, reworked to generate
deterministic non-constant X/weights/bias via `keep`-attributed
generate blocks so Yosys can't constant-fold the datapath away.

Also adds .gitignore for Python's __pycache__/*.pyc.

2026-09-02 19:48:03 +02:00

541 B

Raw Blame History

1	target_id	fpga	family	parallel	n_inputs	n_neurons	status	mac_per_cycle	groups_per_neuron	total_mac	cycles_per_layer	cost_eur	build_time_s	error
2	ecp5_45f	LFE5U-45F-8BG381	ECP5	8	256	4	FAIL	32	32	32	32	35.0		nextpnr placement/routing failed
3	ecp5_45f	LFE5U-45F-8BG381	ECP5	4	256	4	FAIL	16	64	16	64	35.0		nextpnr placement/routing failed
4	ecp5_45f	LFE5U-45F-8BG381	ECP5	2	256	4	PASS	8	128	8	128	35.0	1.504363291998743

541 B Raw Blame History

541 B

Raw Blame History