micheleandClaude Sonnet 5
9b5d1055b8
Adds tools/neural_sim/, a NumPy-based reference implementation of the FPGA-Neural V2 numeric model (INT8 in/weight, 32-bit wraparound accumulation, ReLU+saturate out), derived directly from hardware/v2/rtl/neural_processor.v (not assumed) and reusing tools/validation/mac_oracle.py's own pre-existing, hand-verified two's-complement primitives rather than duplicating them. Provides: neuron/layer/network models, a logical memory model of the real V2 SDRAM map (weights/activations/results), deterministic test-vector generators (simple/signed/extremes/zero/random/D-Stress 256x128) with JSON golden-vector export, an FPGA-vs-Python bit-exact comparison utility, four example networks, a CLI (`python -m tools.neural_sim ...`), and a 96-test pytest suite (all passing) covering signed-arithmetic edge cases (including a direct 32-bit wraparound proof), scalar-vs-vectorized neuron cross-checks, layer/memory/vector/comparison tests. This is a golden functional reference (bit-exact numeric result), explicitly NOT a cycle-accurate FPGA simulator -- see tools/neural_sim/README.md for the full scope statement. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_013xXuuRUWZScuo1DeYJxs3v
61 lines
2.3 KiB
Python
61 lines
2.3 KiB
Python
"""
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Small example networks for experimentation (B12). Every example uses
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operations the real V2 accelerator actually implements (INT8 in/INT8
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weight/INT32-wraparound-accumulate/ReLU-saturate-out, P_IN=8 tiles) --
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none invent unsupported functionality. The 2-layer example is
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FPGA-compatible at the computational level via the real dependency-
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graph mechanism (each layer-2 neuron's producer_ids/required fields
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would gate it on all 4 layer-1 neurons completing first), but this
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simulator does not yet model the SPI job-construction/address-wiring
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needed to actually run it end-to-end on hardware (see network.py's
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own scope note).
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"""
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from __future__ import annotations
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import numpy as np
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from .layer import FCLayer
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from .network import Network
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def example_8_to_1() -> Network:
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"""8 inputs -> 1 neuron, ReLU. Hand-picked, easy-to-verify weights."""
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weights = [[1, 2, 3, 4, -1, -2, -3, -4]]
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return Network([FCLayer(weights, activation="relu")])
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def example_8_to_4() -> Network:
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"""8 inputs -> 4 neurons, ReLU. Fixed-seed weights for reproducibility."""
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rng = np.random.default_rng(1)
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weights = rng.integers(-20, 21, size=(4, 8), dtype=np.int64)
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return Network([FCLayer(weights, activation="relu")])
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def example_8_to_16() -> Network:
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"""8 inputs -> 16 neurons, ReLU. Fixed-seed weights."""
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rng = np.random.default_rng(2)
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weights = rng.integers(-20, 21, size=(16, 8), dtype=np.int64)
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return Network([FCLayer(weights, activation="relu")])
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def example_8_8_1() -> Network:
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"""8 -> 8 -> 1, both layers ReLU. Fixed-seed weights. The hidden
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layer is 8 wide (not, say, 4) because every layer boundary must
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stay a multiple of P_IN=8 -- the real hardware always tiles in
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groups of 8, so a hidden width that doesn't divide evenly would not
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be a layer this simulator's own FCLayer (or the real accelerator)
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can actually tile. See module docstring for the FPGA-compatibility
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scope note re: multi-layer chaining."""
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rng = np.random.default_rng(3)
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w1 = rng.integers(-15, 16, size=(8, 8), dtype=np.int64)
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w2 = rng.integers(-15, 16, size=(1, 8), dtype=np.int64)
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return Network([FCLayer(w1, activation="relu"), FCLayer(w2, activation="relu")])
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ALL_EXAMPLES = {
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"8to1": example_8_to_1,
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"8to4": example_8_to_4,
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"8to16": example_8_to_16,
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"8_8_1": example_8_8_1,
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}
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