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FPGA-Neural
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481b5d223fbdcb060c2a62fbcbd6bc67ceb5dba6
FPGA-Neural
/
hardware
/
v2
/
constraints
T
History
michele
ee708775c7
Revert "feat: integrate flash
#1
(neural-network data) RTL into V2 top-level"
...
This reverts commit
59901a4905
.
2026-09-07 19:02:44 +02:00
..
v2_board_top.lpf
Revert "feat: integrate flash
#1
(neural-network data) RTL into V2 top-level"
2026-09-07 19:02:44 +02:00
v2_unified.lpf
V2.0.0 hardware freeze - single SDRAM
2026-09-06 13:39:55 +02:00
