3917 lines
192 KiB
Plaintext
Executable File
3917 lines
192 KiB
Plaintext
Executable File
#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp
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:ivl_version "13.0 (stable)" "(v13_0)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision + 0;
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi";
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S_0x102e61f00 .scope package, "$unit" "$unit" 2 1;
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.timescale 0 0;
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S_0x102e63dc0 .scope module, "tb" "tb" 3 1;
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.timescale 0 0;
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P_0x102e63ae0 .param/l "ACC_WIDTH" 0 3 8, +C4<00000000000000000000000000101000>;
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P_0x102e63b20 .param/l "DATA_WIDTH" 0 3 3, +C4<00000000000000000000000000010000>;
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P_0x102e63b60 .param/l "FRAC_BITS" 0 3 4, +C4<00000000000000000000000000001000>;
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P_0x102e63ba0 .param/l "N_INPUTS" 0 3 5, +C4<00000000000000000000000001000000>;
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P_0x102e63be0 .param/l "N_NEURONS" 0 3 6, +C4<00000000000000000000000000001000>;
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P_0x102e63c20 .param/l "PARALLEL" 0 3 7, +C4<00000000000000000000000000001000>;
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v0x8d2d17700_0 .var/s "bias_bus", 127 0;
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v0x8d2d177a0_0 .net "busy", 0 0, L_0x8d323ce60; 1 drivers
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v0x8d2d17840_0 .var "clk", 0 0;
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v0x8d2d178e0_0 .net "done", 0 0, L_0x8d323cf00; 1 drivers
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v0x8d2d17980_0 .var/i "errors", 31 0;
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v0x8d2d17a20_0 .var/i "i", 31 0;
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v0x8d2d17ac0_0 .var "rst", 0 0;
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v0x8d2d17b60_0 .var "start", 0 0;
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v0x8d2d17c00_0 .var/s "weights_bus", 8191 0;
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v0x8d2d17ca0_0 .var/s "x_bus", 1023 0;
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v0x8d2d17d40_0 .net/s "y_bus", 127 0, L_0x8d3239040; 1 drivers
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S_0x102e5b4b0 .scope module, "dut" "layer" 3 39, 4 1 0, S_0x102e63dc0;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "start";
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.port_info 3 /INPUT 1024 "x_bus";
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.port_info 4 /INPUT 8192 "weights_bus";
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.port_info 5 /INPUT 128 "bias_bus";
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.port_info 6 /OUTPUT 128 "y_bus";
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.port_info 7 /OUTPUT 1 "busy";
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.port_info 8 /OUTPUT 1 "done";
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P_0x102e5b630 .param/l "ACC_WIDTH" 0 4 7, +C4<00000000000000000000000000101000>;
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P_0x102e5b670 .param/l "DATA_WIDTH" 0 4 2, +C4<00000000000000000000000000010000>;
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P_0x102e5b6b0 .param/l "FRAC_BITS" 0 4 3, +C4<00000000000000000000000000001000>;
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P_0x102e5b6f0 .param/l "N_INPUTS" 0 4 4, +C4<00000000000000000000000001000000>;
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P_0x102e5b730 .param/l "N_NEURONS" 0 4 5, +C4<00000000000000000000000000001000>;
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P_0x102e5b770 .param/l "PARALLEL" 0 4 6, +C4<00000000000000000000000000001000>;
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v0x8d2d16ee0_0 .net/s "bias_bus", 127 0, v0x8d2d17700_0; 1 drivers
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v0x8d2d16f80_0 .net "busy", 0 0, L_0x8d323ce60; alias, 1 drivers
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v0x8d2d17020_0 .net "clk", 0 0, v0x8d2d17840_0; 1 drivers
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v0x8d2d170c0_0 .net "done", 0 0, L_0x8d323cf00; alias, 1 drivers
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v0x8d2d17160_0 .net "neuron_busy", 7 0, L_0x8d32390e0; 1 drivers
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v0x8d2d17200_0 .net "neuron_done", 7 0, L_0x8d3239180; 1 drivers
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v0x8d2d172a0_0 .net "rst", 0 0, v0x8d2d17ac0_0; 1 drivers
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v0x8d2d17340_0 .net "start", 0 0, v0x8d2d17b60_0; 1 drivers
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v0x8d2d173e0_0 .net/s "weights_bus", 8191 0, v0x8d2d17c00_0; 1 drivers
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v0x8d2d17480_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; 1 drivers
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v0x8d2d17520_0 .net/s "y_bus", 127 0, L_0x8d3239040; alias, 1 drivers
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L_0x8d321c500 .part v0x8d2d17c00_0, 0, 1024;
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L_0x8d321c5a0 .part v0x8d2d17700_0, 0, 16;
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L_0x8d321d860 .part v0x8d2d17c00_0, 1024, 1024;
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L_0x8d321d900 .part v0x8d2d17700_0, 16, 16;
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L_0x8d321ebc0 .part v0x8d2d17c00_0, 2048, 1024;
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L_0x8d321ec60 .part v0x8d2d17700_0, 32, 16;
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L_0x8d321ff20 .part v0x8d2d17c00_0, 3072, 1024;
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L_0x8d322c000 .part v0x8d2d17700_0, 48, 16;
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L_0x8d322d2c0 .part v0x8d2d17c00_0, 4096, 1024;
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L_0x8d322d360 .part v0x8d2d17700_0, 64, 16;
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L_0x8d322e620 .part v0x8d2d17c00_0, 5120, 1024;
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L_0x8d322e6c0 .part v0x8d2d17700_0, 80, 16;
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L_0x8d322f980 .part v0x8d2d17c00_0, 6144, 1024;
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L_0x8d322fa20 .part v0x8d2d17700_0, 96, 16;
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L_0x8d323cd20 .part v0x8d2d17c00_0, 7168, 1024;
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L_0x8d323cdc0 .part v0x8d2d17700_0, 112, 16;
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LS_0x8d3239040_0_0 .concat8 [ 16 16 16 16], v0x8d2cedd60_0, v0x8d2cf3200_0, v0x8d2cfc6e0_0, v0x8d2d01b80_0;
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LS_0x8d3239040_0_4 .concat8 [ 16 16 16 16], v0x8d2d07020_0, v0x8d2d0c500_0, v0x8d2d119a0_0, v0x8d2d16e40_0;
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L_0x8d3239040 .concat8 [ 64 64 0 0], LS_0x8d3239040_0_0, LS_0x8d3239040_0_4;
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LS_0x8d32390e0_0_0 .concat8 [ 1 1 1 1], v0x8d2ced5e0_0, v0x8d2cf2a80_0, v0x8d2cf7f20_0, v0x8d2d01400_0;
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LS_0x8d32390e0_0_4 .concat8 [ 1 1 1 1], v0x8d2d068a0_0, v0x8d2d0bd40_0, v0x8d2d11220_0, v0x8d2d166c0_0;
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L_0x8d32390e0 .concat8 [ 4 4 0 0], LS_0x8d32390e0_0_0, LS_0x8d32390e0_0_4;
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LS_0x8d3239180_0_0 .concat8 [ 1 1 1 1], v0x8d2ced720_0, v0x8d2cf2bc0_0, v0x8d2cfc0a0_0, v0x8d2d01540_0;
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LS_0x8d3239180_0_4 .concat8 [ 1 1 1 1], v0x8d2d069e0_0, v0x8d2d0be80_0, v0x8d2d11360_0, v0x8d2d16800_0;
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L_0x8d3239180 .concat8 [ 4 4 0 0], LS_0x8d3239180_0_0, LS_0x8d3239180_0_4;
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L_0x8d323ce60 .reduce/or L_0x8d32390e0;
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L_0x8d323cf00 .reduce/and L_0x8d3239180;
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S_0x102e57820 .scope generate, "GEN_NEURON[0]" "GEN_NEURON[0]" 4 35, 4 35 0, S_0x102e5b4b0;
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.timescale 0 0;
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P_0x8d2c3b0c0 .param/l "n" 1 4 35, +C4<00>;
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S_0x102e579a0 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x102e57820;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "start";
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.port_info 3 /INPUT 1024 "x_bus";
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.port_info 4 /INPUT 1024 "w_bus";
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.port_info 5 /INPUT 16 "bias";
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.port_info 6 /OUTPUT 16 "y";
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.port_info 7 /OUTPUT 1 "busy";
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.port_info 8 /OUTPUT 1 "done";
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P_0x102e50910 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
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P_0x102e50950 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
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P_0x102e50990 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
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P_0x102e509d0 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
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P_0x102e50a10 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
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P_0x102e50a50 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
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P_0x102e50a90 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
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L_0x8d307c150 .functor BUFZ 16, L_0x8d321c5a0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
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v0x8d2cec780_0 .net *"_ivl_0", 31 0, L_0x8d30c3e80; 1 drivers
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v0x8d2cec820_0 .net *"_ivl_11", 31 0, L_0x8d2d17e80; 1 drivers
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v0x8d2cec8c0_0 .net *"_ivl_14", 31 0, L_0x8d30c3f20; 1 drivers
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L_0x8d28540e8 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
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v0x8d2cec960_0 .net *"_ivl_17", 28 0, L_0x8d28540e8; 1 drivers
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L_0x8d2854130 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
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v0x8d2ceca00_0 .net/2u *"_ivl_18", 31 0, L_0x8d2854130; 1 drivers
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v0x8d2cecaa0_0 .net *"_ivl_21", 31 0, L_0x8d2d17f20; 1 drivers
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L_0x8d2854178 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
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v0x8d2cecb40_0 .net/2u *"_ivl_22", 31 0, L_0x8d2854178; 1 drivers
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v0x8d2cecbe0_0 .net *"_ivl_25", 31 0, L_0x8d2d18000; 1 drivers
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L_0x8d2854010 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
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v0x8d2cecc80_0 .net *"_ivl_3", 28 0, L_0x8d2854010; 1 drivers
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v0x8d2cecd20_0 .net *"_ivl_31", 0 0, L_0x8d321c320; 1 drivers
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v0x8d2cecdc0_0 .net *"_ivl_33", 23 0, L_0x8d2d194a0; 1 drivers
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v0x8d2cece60_0 .net *"_ivl_36", 39 0, L_0x8d3194fa0; 1 drivers
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v0x8d2cecf00_0 .net *"_ivl_38", 31 0, L_0x8d321c3c0; 1 drivers
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L_0x8d2854058 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
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v0x8d2cecfa0_0 .net/2u *"_ivl_4", 31 0, L_0x8d2854058; 1 drivers
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L_0x8d2854400 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
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v0x8d2ced040_0 .net *"_ivl_40", 7 0, L_0x8d2854400; 1 drivers
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v0x8d2ced0e0_0 .net *"_ivl_46", 31 0, L_0x8d321c460; 1 drivers
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v0x8d2ced180_0 .net *"_ivl_7", 31 0, L_0x8d2d17de0; 1 drivers
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L_0x8d28540a0 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
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v0x8d2ced220_0 .net/2u *"_ivl_8", 31 0, L_0x8d28540a0; 1 drivers
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v0x8d2ced2c0_0 .var/s "acc", 39 0;
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v0x8d2ced360_0 .net/s "acc_next", 39 0, L_0x8d3194e60; 1 drivers
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v0x8d2ced400_0 .net/s "bias", 15 0, L_0x8d321c5a0; 1 drivers
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v0x8d2ced4a0_0 .net/s "bias_ext", 39 0, L_0x8d3194f00; 1 drivers
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v0x8d2ced540_0 .net/s "bias_ext_small", 15 0, L_0x8d307c150; 1 drivers
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v0x8d2ced5e0_0 .var "busy", 0 0;
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v0x8d2ced680_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
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v0x8d2ced720_0 .var "done", 0 0;
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v0x8d2ced7c0_0 .net/s "final_acc", 39 0, L_0x8d3195040; 1 drivers
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v0x8d2ced860_0 .net/s "final_value", 39 0, L_0x8d2d19540; 1 drivers
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v0x8d2ced900_0 .var "group_index", 2 0;
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v0x8d2ced9a0_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
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v0x8d2ceda40_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
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v0x8d2cedae0_0 .net/s "w_bus", 1023 0, L_0x8d321c500; 1 drivers
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v0x8d2cedb80_0 .net/s "w_group", 127 0, L_0x8d318b5c0; 1 drivers
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v0x8d2cedc20_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
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v0x8d2cedcc0_0 .net/s "x_group", 127 0, L_0x8d318b8e0; 1 drivers
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v0x8d2cedd60_0 .var/s "y", 15 0;
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E_0x8d2ce4340 .event posedge, v0x8d2ced680_0;
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L_0x8d30c3e80 .concat [ 3 29 0 0], v0x8d2ced900_0, L_0x8d2854010;
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L_0x8d2d17de0 .arith/mult 32, L_0x8d30c3e80, L_0x8d2854058;
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L_0x8d2d17e80 .arith/mult 32, L_0x8d2d17de0, L_0x8d28540a0;
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L_0x8d318b8e0 .part/v v0x8d2d17ca0_0, L_0x8d2d17e80, 128;
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L_0x8d30c3f20 .concat [ 3 29 0 0], v0x8d2ced900_0, L_0x8d28540e8;
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L_0x8d2d17f20 .arith/mult 32, L_0x8d30c3f20, L_0x8d2854130;
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L_0x8d2d18000 .arith/mult 32, L_0x8d2d17f20, L_0x8d2854178;
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L_0x8d318b5c0 .part/v L_0x8d321c500, L_0x8d2d18000, 128;
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L_0x8d321c320 .part L_0x8d307c150, 15, 1;
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L_0x8d2d194a0 .repeat 24, 24, L_0x8d321c320;
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L_0x8d3194f00 .concat [ 16 24 0 0], L_0x8d307c150, L_0x8d2d194a0;
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L_0x8d321c3c0 .part L_0x8d3194f00, 0, 32;
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L_0x8d3194fa0 .concat [ 8 32 0 0], L_0x8d2854400, L_0x8d321c3c0;
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L_0x8d3195040 .arith/sum 40, L_0x8d3194e60, L_0x8d3194fa0;
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L_0x8d321c460 .part L_0x8d3195040, 8, 32;
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L_0x8d2d19540 .extend/s 40, L_0x8d321c460;
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S_0x102e52fe0 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x102e579a0;
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.timescale 0 0;
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.port_info 0 /INPUT 128 "x_bus";
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.port_info 1 /INPUT 128 "w_bus";
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.port_info 2 /INPUT 40 "acc_in";
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.port_info 3 /OUTPUT 40 "acc_out";
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P_0x8d30a0600 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
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P_0x8d30a0640 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
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v0x8d2c9bb60_0 .net/s "acc_in", 39 0, v0x8d2ced2c0_0; 1 drivers
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v0x8d2c9bc00_0 .net/s "acc_out", 39 0, L_0x8d3194e60; alias, 1 drivers
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v0x8d2c9bca0_0 .net/s "m0", 39 0, L_0x8d31940a0; 1 drivers
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v0x8d2c9bd40_0 .net/s "m1", 39 0, L_0x8d31941e0; 1 drivers
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v0x8d2c9bde0_0 .net/s "m2", 39 0, L_0x8d3194320; 1 drivers
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v0x8d2c9be80_0 .net/s "m3", 39 0, L_0x8d3194460; 1 drivers
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v0x8d2c9bf20_0 .net/s "m4", 39 0, L_0x8d31945a0; 1 drivers
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v0x8d2cec000_0 .net/s "m5", 39 0, L_0x8d31946e0; 1 drivers
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v0x8d2cec0a0_0 .net/s "m6", 39 0, L_0x8d3194820; 1 drivers
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v0x8d2cec140_0 .net/s "m7", 39 0, L_0x8d3194960; 1 drivers
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v0x8d2cec1e0_0 .net/s "s0", 39 0, L_0x8d3194a00; 1 drivers
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v0x8d2cec280_0 .net/s "s1", 39 0, L_0x8d3194aa0; 1 drivers
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v0x8d2cec320_0 .net/s "s2", 39 0, L_0x8d3194b40; 1 drivers
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v0x8d2cec3c0_0 .net/s "s3", 39 0, L_0x8d3194be0; 1 drivers
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v0x8d2cec460_0 .net/s "s4", 39 0, L_0x8d3194c80; 1 drivers
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v0x8d2cec500_0 .net/s "s5", 39 0, L_0x8d3194d20; 1 drivers
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v0x8d2cec5a0_0 .net/s "sum", 39 0, L_0x8d3194dc0; 1 drivers
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v0x8d2cec640_0 .net/s "w_bus", 127 0, L_0x8d318b5c0; alias, 1 drivers
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v0x8d2cec6e0_0 .net/s "x_bus", 127 0, L_0x8d318b8e0; alias, 1 drivers
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L_0x8d318ba20 .part L_0x8d318b8e0, 0, 16;
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L_0x8d318bac0 .part L_0x8d318b5c0, 0, 16;
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L_0x8d318bc00 .part L_0x8d318b8e0, 16, 16;
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L_0x8d318bca0 .part L_0x8d318b5c0, 16, 16;
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L_0x8d318bde0 .part L_0x8d318b8e0, 32, 16;
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L_0x8d318be80 .part L_0x8d318b5c0, 32, 16;
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L_0x8d3064460 .part L_0x8d318b8e0, 48, 16;
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L_0x8d3064500 .part L_0x8d318b5c0, 48, 16;
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L_0x8d317b7a0 .part L_0x8d318b8e0, 64, 16;
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L_0x8d316f980 .part L_0x8d318b5c0, 64, 16;
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L_0x8d313fd40 .part L_0x8d318b8e0, 80, 16;
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L_0x8d3137f20 .part L_0x8d318b5c0, 80, 16;
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L_0x8d321c000 .part L_0x8d318b8e0, 96, 16;
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L_0x8d321c0a0 .part L_0x8d318b5c0, 96, 16;
|
|
L_0x8d321c1e0 .part L_0x8d318b8e0, 112, 16;
|
|
L_0x8d321c280 .part L_0x8d318b5c0, 112, 16;
|
|
L_0x8d3194a00 .arith/sum 40, L_0x8d31940a0, L_0x8d31941e0;
|
|
L_0x8d3194aa0 .arith/sum 40, L_0x8d3194320, L_0x8d3194460;
|
|
L_0x8d3194b40 .arith/sum 40, L_0x8d31945a0, L_0x8d31946e0;
|
|
L_0x8d3194be0 .arith/sum 40, L_0x8d3194820, L_0x8d3194960;
|
|
L_0x8d3194c80 .arith/sum 40, L_0x8d3194a00, L_0x8d3194aa0;
|
|
L_0x8d3194d20 .arith/sum 40, L_0x8d3194b40, L_0x8d3194be0;
|
|
L_0x8d3194dc0 .arith/sum 40, L_0x8d3194c80, L_0x8d3194d20;
|
|
L_0x8d3194e60 .arith/sum 40, v0x8d2ced2c0_0, L_0x8d3194dc0;
|
|
S_0x102e53160 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c0c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c100 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c140 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c98960_0 .net/s *"_ivl_0", 31 0, L_0x8d2d180a0; 1 drivers
|
|
v0x8d2c98a00_0 .net/s *"_ivl_2", 31 0, L_0x8d2d18140; 1 drivers
|
|
v0x8d2c98aa0_0 .net *"_ivl_7", 0 0, L_0x8d318b980; 1 drivers
|
|
v0x8d2c98b40_0 .net *"_ivl_9", 7 0, L_0x8d2d18280; 1 drivers
|
|
L_0x8d28541c0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c98be0_0 .net/s "acc_in", 39 0, L_0x8d28541c0; 1 drivers
|
|
v0x8d2c98c80_0 .net/s "acc_out", 39 0, L_0x8d31940a0; alias, 1 drivers
|
|
v0x8d2c98d20_0 .net/s "product", 31 0, L_0x8d2d181e0; 1 drivers
|
|
v0x8d2c98dc0_0 .net/s "product_ext", 39 0, L_0x8d3194000; 1 drivers
|
|
v0x8d2c98e60_0 .net/s "w", 15 0, L_0x8d318bac0; 1 drivers
|
|
v0x8d2c98f00_0 .net/s "x", 15 0, L_0x8d318ba20; 1 drivers
|
|
L_0x8d2d180a0 .extend/s 32, L_0x8d318ba20;
|
|
L_0x8d2d18140 .extend/s 32, L_0x8d318bac0;
|
|
L_0x8d2d181e0 .arith/mult 32, L_0x8d2d180a0, L_0x8d2d18140;
|
|
L_0x8d318b980 .part L_0x8d2d181e0, 31, 1;
|
|
L_0x8d2d18280 .repeat 8, 8, L_0x8d318b980;
|
|
L_0x8d3194000 .concat [ 32 8 0 0], L_0x8d2d181e0, L_0x8d2d18280;
|
|
L_0x8d31940a0 .arith/sum 40, L_0x8d28541c0, L_0x8d3194000;
|
|
S_0x102e5aa50 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c180 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c1c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c200 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c98fa0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d18320; 1 drivers
|
|
v0x8d2c99040_0 .net/s *"_ivl_2", 31 0, L_0x8d2d183c0; 1 drivers
|
|
v0x8d2c990e0_0 .net *"_ivl_7", 0 0, L_0x8d318bb60; 1 drivers
|
|
v0x8d2c99180_0 .net *"_ivl_9", 7 0, L_0x8d2d18500; 1 drivers
|
|
L_0x8d2854208 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c99220_0 .net/s "acc_in", 39 0, L_0x8d2854208; 1 drivers
|
|
v0x8d2c992c0_0 .net/s "acc_out", 39 0, L_0x8d31941e0; alias, 1 drivers
|
|
v0x8d2c99360_0 .net/s "product", 31 0, L_0x8d2d18460; 1 drivers
|
|
v0x8d2c99400_0 .net/s "product_ext", 39 0, L_0x8d3194140; 1 drivers
|
|
v0x8d2c994a0_0 .net/s "w", 15 0, L_0x8d318bca0; 1 drivers
|
|
v0x8d2c99540_0 .net/s "x", 15 0, L_0x8d318bc00; 1 drivers
|
|
L_0x8d2d18320 .extend/s 32, L_0x8d318bc00;
|
|
L_0x8d2d183c0 .extend/s 32, L_0x8d318bca0;
|
|
L_0x8d2d18460 .arith/mult 32, L_0x8d2d18320, L_0x8d2d183c0;
|
|
L_0x8d318bb60 .part L_0x8d2d18460, 31, 1;
|
|
L_0x8d2d18500 .repeat 8, 8, L_0x8d318bb60;
|
|
L_0x8d3194140 .concat [ 32 8 0 0], L_0x8d2d18460, L_0x8d2d18500;
|
|
L_0x8d31941e0 .arith/sum 40, L_0x8d2854208, L_0x8d3194140;
|
|
S_0x102e5abd0 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c240 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c280 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c2c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c995e0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d185a0; 1 drivers
|
|
v0x8d2c99680_0 .net/s *"_ivl_2", 31 0, L_0x8d2d18640; 1 drivers
|
|
v0x8d2c99720_0 .net *"_ivl_7", 0 0, L_0x8d318bd40; 1 drivers
|
|
v0x8d2c997c0_0 .net *"_ivl_9", 7 0, L_0x8d2d18780; 1 drivers
|
|
L_0x8d2854250 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c99860_0 .net/s "acc_in", 39 0, L_0x8d2854250; 1 drivers
|
|
v0x8d2c99900_0 .net/s "acc_out", 39 0, L_0x8d3194320; alias, 1 drivers
|
|
v0x8d2c999a0_0 .net/s "product", 31 0, L_0x8d2d186e0; 1 drivers
|
|
v0x8d2c99a40_0 .net/s "product_ext", 39 0, L_0x8d3194280; 1 drivers
|
|
v0x8d2c99ae0_0 .net/s "w", 15 0, L_0x8d318be80; 1 drivers
|
|
v0x8d2c99b80_0 .net/s "x", 15 0, L_0x8d318bde0; 1 drivers
|
|
L_0x8d2d185a0 .extend/s 32, L_0x8d318bde0;
|
|
L_0x8d2d18640 .extend/s 32, L_0x8d318be80;
|
|
L_0x8d2d186e0 .arith/mult 32, L_0x8d2d185a0, L_0x8d2d18640;
|
|
L_0x8d318bd40 .part L_0x8d2d186e0, 31, 1;
|
|
L_0x8d2d18780 .repeat 8, 8, L_0x8d318bd40;
|
|
L_0x8d3194280 .concat [ 32 8 0 0], L_0x8d2d186e0, L_0x8d2d18780;
|
|
L_0x8d3194320 .arith/sum 40, L_0x8d2854250, L_0x8d3194280;
|
|
S_0x102e65950 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c300 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c340 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c380 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c99c20_0 .net/s *"_ivl_0", 31 0, L_0x8d2d18820; 1 drivers
|
|
v0x8d2c99cc0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d188c0; 1 drivers
|
|
v0x8d2c99d60_0 .net *"_ivl_7", 0 0, L_0x8d318bf20; 1 drivers
|
|
v0x8d2c99e00_0 .net *"_ivl_9", 7 0, L_0x8d2d18a00; 1 drivers
|
|
L_0x8d2854298 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c99ea0_0 .net/s "acc_in", 39 0, L_0x8d2854298; 1 drivers
|
|
v0x8d2c99f40_0 .net/s "acc_out", 39 0, L_0x8d3194460; alias, 1 drivers
|
|
v0x8d2c99fe0_0 .net/s "product", 31 0, L_0x8d2d18960; 1 drivers
|
|
v0x8d2c9a080_0 .net/s "product_ext", 39 0, L_0x8d31943c0; 1 drivers
|
|
v0x8d2c9a120_0 .net/s "w", 15 0, L_0x8d3064500; 1 drivers
|
|
v0x8d2c9a1c0_0 .net/s "x", 15 0, L_0x8d3064460; 1 drivers
|
|
L_0x8d2d18820 .extend/s 32, L_0x8d3064460;
|
|
L_0x8d2d188c0 .extend/s 32, L_0x8d3064500;
|
|
L_0x8d2d18960 .arith/mult 32, L_0x8d2d18820, L_0x8d2d188c0;
|
|
L_0x8d318bf20 .part L_0x8d2d18960, 31, 1;
|
|
L_0x8d2d18a00 .repeat 8, 8, L_0x8d318bf20;
|
|
L_0x8d31943c0 .concat [ 32 8 0 0], L_0x8d2d18960, L_0x8d2d18a00;
|
|
L_0x8d3194460 .arith/sum 40, L_0x8d2854298, L_0x8d31943c0;
|
|
S_0x8d31fc000 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c3c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c400 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c440 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c9a260_0 .net/s *"_ivl_0", 31 0, L_0x8d2d18aa0; 1 drivers
|
|
v0x8d2c9a300_0 .net/s *"_ivl_2", 31 0, L_0x8d2d18b40; 1 drivers
|
|
v0x8d2c9a3a0_0 .net *"_ivl_7", 0 0, L_0x8d3064640; 1 drivers
|
|
v0x8d2c9a440_0 .net *"_ivl_9", 7 0, L_0x8d2d18c80; 1 drivers
|
|
L_0x8d28542e0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c9a4e0_0 .net/s "acc_in", 39 0, L_0x8d28542e0; 1 drivers
|
|
v0x8d2c9a580_0 .net/s "acc_out", 39 0, L_0x8d31945a0; alias, 1 drivers
|
|
v0x8d2c9a620_0 .net/s "product", 31 0, L_0x8d2d18be0; 1 drivers
|
|
v0x8d2c9a6c0_0 .net/s "product_ext", 39 0, L_0x8d3194500; 1 drivers
|
|
v0x8d2c9a760_0 .net/s "w", 15 0, L_0x8d316f980; 1 drivers
|
|
v0x8d2c9a800_0 .net/s "x", 15 0, L_0x8d317b7a0; 1 drivers
|
|
L_0x8d2d18aa0 .extend/s 32, L_0x8d317b7a0;
|
|
L_0x8d2d18b40 .extend/s 32, L_0x8d316f980;
|
|
L_0x8d2d18be0 .arith/mult 32, L_0x8d2d18aa0, L_0x8d2d18b40;
|
|
L_0x8d3064640 .part L_0x8d2d18be0, 31, 1;
|
|
L_0x8d2d18c80 .repeat 8, 8, L_0x8d3064640;
|
|
L_0x8d3194500 .concat [ 32 8 0 0], L_0x8d2d18be0, L_0x8d2d18c80;
|
|
L_0x8d31945a0 .arith/sum 40, L_0x8d28542e0, L_0x8d3194500;
|
|
S_0x8d31fc180 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c480 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c4c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c500 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c9a8a0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d18d20; 1 drivers
|
|
v0x8d2c9a940_0 .net/s *"_ivl_2", 31 0, L_0x8d2d18dc0; 1 drivers
|
|
v0x8d2c9a9e0_0 .net *"_ivl_7", 0 0, L_0x8d315fb60; 1 drivers
|
|
v0x8d2c9aa80_0 .net *"_ivl_9", 7 0, L_0x8d2d18f00; 1 drivers
|
|
L_0x8d2854328 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c9ab20_0 .net/s "acc_in", 39 0, L_0x8d2854328; 1 drivers
|
|
v0x8d2c9abc0_0 .net/s "acc_out", 39 0, L_0x8d31946e0; alias, 1 drivers
|
|
v0x8d2c9ac60_0 .net/s "product", 31 0, L_0x8d2d18e60; 1 drivers
|
|
v0x8d2c9ad00_0 .net/s "product_ext", 39 0, L_0x8d3194640; 1 drivers
|
|
v0x8d2c9ada0_0 .net/s "w", 15 0, L_0x8d3137f20; 1 drivers
|
|
v0x8d2c9ae40_0 .net/s "x", 15 0, L_0x8d313fd40; 1 drivers
|
|
L_0x8d2d18d20 .extend/s 32, L_0x8d313fd40;
|
|
L_0x8d2d18dc0 .extend/s 32, L_0x8d3137f20;
|
|
L_0x8d2d18e60 .arith/mult 32, L_0x8d2d18d20, L_0x8d2d18dc0;
|
|
L_0x8d315fb60 .part L_0x8d2d18e60, 31, 1;
|
|
L_0x8d2d18f00 .repeat 8, 8, L_0x8d315fb60;
|
|
L_0x8d3194640 .concat [ 32 8 0 0], L_0x8d2d18e60, L_0x8d2d18f00;
|
|
L_0x8d31946e0 .arith/sum 40, L_0x8d2854328, L_0x8d3194640;
|
|
S_0x8d31fc300 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c540 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c580 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c5c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c9aee0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d18fa0; 1 drivers
|
|
v0x8d2c9af80_0 .net/s *"_ivl_2", 31 0, L_0x8d2d19040; 1 drivers
|
|
v0x8d2c9b020_0 .net *"_ivl_7", 0 0, L_0x8d3134140; 1 drivers
|
|
v0x8d2c9b0c0_0 .net *"_ivl_9", 7 0, L_0x8d2d19180; 1 drivers
|
|
L_0x8d2854370 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c9b160_0 .net/s "acc_in", 39 0, L_0x8d2854370; 1 drivers
|
|
v0x8d2c9b200_0 .net/s "acc_out", 39 0, L_0x8d3194820; alias, 1 drivers
|
|
v0x8d2c9b2a0_0 .net/s "product", 31 0, L_0x8d2d190e0; 1 drivers
|
|
v0x8d2c9b340_0 .net/s "product_ext", 39 0, L_0x8d3194780; 1 drivers
|
|
v0x8d2c9b3e0_0 .net/s "w", 15 0, L_0x8d321c0a0; 1 drivers
|
|
v0x8d2c9b480_0 .net/s "x", 15 0, L_0x8d321c000; 1 drivers
|
|
L_0x8d2d18fa0 .extend/s 32, L_0x8d321c000;
|
|
L_0x8d2d19040 .extend/s 32, L_0x8d321c0a0;
|
|
L_0x8d2d190e0 .arith/mult 32, L_0x8d2d18fa0, L_0x8d2d19040;
|
|
L_0x8d3134140 .part L_0x8d2d190e0, 31, 1;
|
|
L_0x8d2d19180 .repeat 8, 8, L_0x8d3134140;
|
|
L_0x8d3194780 .concat [ 32 8 0 0], L_0x8d2d190e0, L_0x8d2d19180;
|
|
L_0x8d3194820 .arith/sum 40, L_0x8d2854370, L_0x8d3194780;
|
|
S_0x8d31fc480 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x102e52fe0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c600 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c640 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c680 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2c9b520_0 .net/s *"_ivl_0", 31 0, L_0x8d2d19220; 1 drivers
|
|
v0x8d2c9b5c0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d192c0; 1 drivers
|
|
v0x8d2c9b660_0 .net *"_ivl_7", 0 0, L_0x8d321c140; 1 drivers
|
|
v0x8d2c9b700_0 .net *"_ivl_9", 7 0, L_0x8d2d19400; 1 drivers
|
|
L_0x8d28543b8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2c9b7a0_0 .net/s "acc_in", 39 0, L_0x8d28543b8; 1 drivers
|
|
v0x8d2c9b840_0 .net/s "acc_out", 39 0, L_0x8d3194960; alias, 1 drivers
|
|
v0x8d2c9b8e0_0 .net/s "product", 31 0, L_0x8d2d19360; 1 drivers
|
|
v0x8d2c9b980_0 .net/s "product_ext", 39 0, L_0x8d31948c0; 1 drivers
|
|
v0x8d2c9ba20_0 .net/s "w", 15 0, L_0x8d321c280; 1 drivers
|
|
v0x8d2c9bac0_0 .net/s "x", 15 0, L_0x8d321c1e0; 1 drivers
|
|
L_0x8d2d19220 .extend/s 32, L_0x8d321c1e0;
|
|
L_0x8d2d192c0 .extend/s 32, L_0x8d321c280;
|
|
L_0x8d2d19360 .arith/mult 32, L_0x8d2d19220, L_0x8d2d192c0;
|
|
L_0x8d321c140 .part L_0x8d2d19360, 31, 1;
|
|
L_0x8d2d19400 .repeat 8, 8, L_0x8d321c140;
|
|
L_0x8d31948c0 .concat [ 32 8 0 0], L_0x8d2d19360, L_0x8d2d19400;
|
|
L_0x8d3194960 .arith/sum 40, L_0x8d28543b8, L_0x8d31948c0;
|
|
S_0x8d31fc600 .scope generate, "GEN_NEURON[1]" "GEN_NEURON[1]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b100 .param/l "n" 1 4 35, +C4<01>;
|
|
S_0x8d31fc780 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d31fc600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e662f0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e66330 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e66370 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e663b0 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e663f0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e66430 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e66470 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c1c0 .functor BUFZ 16, L_0x8d321d900, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2cf1c20_0 .net *"_ivl_0", 31 0, L_0x8d31950e0; 1 drivers
|
|
v0x8d2cf1cc0_0 .net *"_ivl_11", 31 0, L_0x8d2d19680; 1 drivers
|
|
v0x8d2cf1d60_0 .net *"_ivl_14", 31 0, L_0x8d3195180; 1 drivers
|
|
L_0x8d2854520 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf1e00_0 .net *"_ivl_17", 28 0, L_0x8d2854520; 1 drivers
|
|
L_0x8d2854568 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf1ea0_0 .net/2u *"_ivl_18", 31 0, L_0x8d2854568; 1 drivers
|
|
v0x8d2cf1f40_0 .net *"_ivl_21", 31 0, L_0x8d2d19720; 1 drivers
|
|
L_0x8d28545b0 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf1fe0_0 .net/2u *"_ivl_22", 31 0, L_0x8d28545b0; 1 drivers
|
|
v0x8d2cf2080_0 .net *"_ivl_25", 31 0, L_0x8d2d197c0; 1 drivers
|
|
L_0x8d2854448 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf2120_0 .net *"_ivl_3", 28 0, L_0x8d2854448; 1 drivers
|
|
v0x8d2cf21c0_0 .net *"_ivl_31", 0 0, L_0x8d321d680; 1 drivers
|
|
v0x8d2cf2260_0 .net *"_ivl_33", 23 0, L_0x8d2d1ac60; 1 drivers
|
|
v0x8d2cf2300_0 .net *"_ivl_36", 39 0, L_0x8d31961c0; 1 drivers
|
|
v0x8d2cf23a0_0 .net *"_ivl_38", 31 0, L_0x8d321d720; 1 drivers
|
|
L_0x8d2854490 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf2440_0 .net/2u *"_ivl_4", 31 0, L_0x8d2854490; 1 drivers
|
|
L_0x8d2854838 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf24e0_0 .net *"_ivl_40", 7 0, L_0x8d2854838; 1 drivers
|
|
v0x8d2cf2580_0 .net *"_ivl_46", 31 0, L_0x8d321d7c0; 1 drivers
|
|
v0x8d2cf2620_0 .net *"_ivl_7", 31 0, L_0x8d2d195e0; 1 drivers
|
|
L_0x8d28544d8 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf26c0_0 .net/2u *"_ivl_8", 31 0, L_0x8d28544d8; 1 drivers
|
|
v0x8d2cf2760_0 .var/s "acc", 39 0;
|
|
v0x8d2cf2800_0 .net/s "acc_next", 39 0, L_0x8d3196080; 1 drivers
|
|
v0x8d2cf28a0_0 .net/s "bias", 15 0, L_0x8d321d900; 1 drivers
|
|
v0x8d2cf2940_0 .net/s "bias_ext", 39 0, L_0x8d3196120; 1 drivers
|
|
v0x8d2cf29e0_0 .net/s "bias_ext_small", 15 0, L_0x8d307c1c0; 1 drivers
|
|
v0x8d2cf2a80_0 .var "busy", 0 0;
|
|
v0x8d2cf2b20_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2cf2bc0_0 .var "done", 0 0;
|
|
v0x8d2cf2c60_0 .net/s "final_acc", 39 0, L_0x8d3196260; 1 drivers
|
|
v0x8d2cf2d00_0 .net/s "final_value", 39 0, L_0x8d2d1ad00; 1 drivers
|
|
v0x8d2cf2da0_0 .var "group_index", 2 0;
|
|
v0x8d2cf2e40_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2cf2ee0_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2cf2f80_0 .net/s "w_bus", 1023 0, L_0x8d321d860; 1 drivers
|
|
v0x8d2cf3020_0 .net/s "w_group", 127 0, L_0x8d321c6e0; 1 drivers
|
|
v0x8d2cf30c0_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2cf3160_0 .net/s "x_group", 127 0, L_0x8d321c640; 1 drivers
|
|
v0x8d2cf3200_0 .var/s "y", 15 0;
|
|
L_0x8d31950e0 .concat [ 3 29 0 0], v0x8d2cf2da0_0, L_0x8d2854448;
|
|
L_0x8d2d195e0 .arith/mult 32, L_0x8d31950e0, L_0x8d2854490;
|
|
L_0x8d2d19680 .arith/mult 32, L_0x8d2d195e0, L_0x8d28544d8;
|
|
L_0x8d321c640 .part/v v0x8d2d17ca0_0, L_0x8d2d19680, 128;
|
|
L_0x8d3195180 .concat [ 3 29 0 0], v0x8d2cf2da0_0, L_0x8d2854520;
|
|
L_0x8d2d19720 .arith/mult 32, L_0x8d3195180, L_0x8d2854568;
|
|
L_0x8d2d197c0 .arith/mult 32, L_0x8d2d19720, L_0x8d28545b0;
|
|
L_0x8d321c6e0 .part/v L_0x8d321d860, L_0x8d2d197c0, 128;
|
|
L_0x8d321d680 .part L_0x8d307c1c0, 15, 1;
|
|
L_0x8d2d1ac60 .repeat 24, 24, L_0x8d321d680;
|
|
L_0x8d3196120 .concat [ 16 24 0 0], L_0x8d307c1c0, L_0x8d2d1ac60;
|
|
L_0x8d321d720 .part L_0x8d3196120, 0, 32;
|
|
L_0x8d31961c0 .concat [ 8 32 0 0], L_0x8d2854838, L_0x8d321d720;
|
|
L_0x8d3196260 .arith/sum 40, L_0x8d3196080, L_0x8d31961c0;
|
|
L_0x8d321d7c0 .part L_0x8d3196260, 8, 32;
|
|
L_0x8d2d1ad00 .extend/s 40, L_0x8d321d7c0;
|
|
S_0x8d31fc900 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d31fc780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0680 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a06c0 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2cf1040_0 .net/s "acc_in", 39 0, v0x8d2cf2760_0; 1 drivers
|
|
v0x8d2cf10e0_0 .net/s "acc_out", 39 0, L_0x8d3196080; alias, 1 drivers
|
|
v0x8d2cf1180_0 .net/s "m0", 39 0, L_0x8d31952c0; 1 drivers
|
|
v0x8d2cf1220_0 .net/s "m1", 39 0, L_0x8d3195400; 1 drivers
|
|
v0x8d2cf12c0_0 .net/s "m2", 39 0, L_0x8d3195540; 1 drivers
|
|
v0x8d2cf1360_0 .net/s "m3", 39 0, L_0x8d3195680; 1 drivers
|
|
v0x8d2cf1400_0 .net/s "m4", 39 0, L_0x8d31957c0; 1 drivers
|
|
v0x8d2cf14a0_0 .net/s "m5", 39 0, L_0x8d3195900; 1 drivers
|
|
v0x8d2cf1540_0 .net/s "m6", 39 0, L_0x8d3195a40; 1 drivers
|
|
v0x8d2cf15e0_0 .net/s "m7", 39 0, L_0x8d3195b80; 1 drivers
|
|
v0x8d2cf1680_0 .net/s "s0", 39 0, L_0x8d3195c20; 1 drivers
|
|
v0x8d2cf1720_0 .net/s "s1", 39 0, L_0x8d3195cc0; 1 drivers
|
|
v0x8d2cf17c0_0 .net/s "s2", 39 0, L_0x8d3195d60; 1 drivers
|
|
v0x8d2cf1860_0 .net/s "s3", 39 0, L_0x8d3195e00; 1 drivers
|
|
v0x8d2cf1900_0 .net/s "s4", 39 0, L_0x8d3195ea0; 1 drivers
|
|
v0x8d2cf19a0_0 .net/s "s5", 39 0, L_0x8d3195f40; 1 drivers
|
|
v0x8d2cf1a40_0 .net/s "sum", 39 0, L_0x8d3195fe0; 1 drivers
|
|
v0x8d2cf1ae0_0 .net/s "w_bus", 127 0, L_0x8d321c6e0; alias, 1 drivers
|
|
v0x8d2cf1b80_0 .net/s "x_bus", 127 0, L_0x8d321c640; alias, 1 drivers
|
|
L_0x8d321c820 .part L_0x8d321c640, 0, 16;
|
|
L_0x8d321c8c0 .part L_0x8d321c6e0, 0, 16;
|
|
L_0x8d321ca00 .part L_0x8d321c640, 16, 16;
|
|
L_0x8d321caa0 .part L_0x8d321c6e0, 16, 16;
|
|
L_0x8d321cbe0 .part L_0x8d321c640, 32, 16;
|
|
L_0x8d321cc80 .part L_0x8d321c6e0, 32, 16;
|
|
L_0x8d321cdc0 .part L_0x8d321c640, 48, 16;
|
|
L_0x8d321ce60 .part L_0x8d321c6e0, 48, 16;
|
|
L_0x8d321cfa0 .part L_0x8d321c640, 64, 16;
|
|
L_0x8d321d040 .part L_0x8d321c6e0, 64, 16;
|
|
L_0x8d321d180 .part L_0x8d321c640, 80, 16;
|
|
L_0x8d321d220 .part L_0x8d321c6e0, 80, 16;
|
|
L_0x8d321d360 .part L_0x8d321c640, 96, 16;
|
|
L_0x8d321d400 .part L_0x8d321c6e0, 96, 16;
|
|
L_0x8d321d540 .part L_0x8d321c640, 112, 16;
|
|
L_0x8d321d5e0 .part L_0x8d321c6e0, 112, 16;
|
|
L_0x8d3195c20 .arith/sum 40, L_0x8d31952c0, L_0x8d3195400;
|
|
L_0x8d3195cc0 .arith/sum 40, L_0x8d3195540, L_0x8d3195680;
|
|
L_0x8d3195d60 .arith/sum 40, L_0x8d31957c0, L_0x8d3195900;
|
|
L_0x8d3195e00 .arith/sum 40, L_0x8d3195a40, L_0x8d3195b80;
|
|
L_0x8d3195ea0 .arith/sum 40, L_0x8d3195c20, L_0x8d3195cc0;
|
|
L_0x8d3195f40 .arith/sum 40, L_0x8d3195d60, L_0x8d3195e00;
|
|
L_0x8d3195fe0 .arith/sum 40, L_0x8d3195ea0, L_0x8d3195f40;
|
|
L_0x8d3196080 .arith/sum 40, v0x8d2cf2760_0, L_0x8d3195fe0;
|
|
S_0x8d31fca80 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c6c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c700 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c740 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cede00_0 .net/s *"_ivl_0", 31 0, L_0x8d2d19860; 1 drivers
|
|
v0x8d2cedea0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d19900; 1 drivers
|
|
v0x8d2cedf40_0 .net *"_ivl_7", 0 0, L_0x8d321c780; 1 drivers
|
|
v0x8d2cedfe0_0 .net *"_ivl_9", 7 0, L_0x8d2d19a40; 1 drivers
|
|
L_0x8d28545f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cee080_0 .net/s "acc_in", 39 0, L_0x8d28545f8; 1 drivers
|
|
v0x8d2cee120_0 .net/s "acc_out", 39 0, L_0x8d31952c0; alias, 1 drivers
|
|
v0x8d2cee1c0_0 .net/s "product", 31 0, L_0x8d2d199a0; 1 drivers
|
|
v0x8d2cee260_0 .net/s "product_ext", 39 0, L_0x8d3195220; 1 drivers
|
|
v0x8d2cee300_0 .net/s "w", 15 0, L_0x8d321c8c0; 1 drivers
|
|
v0x8d2cee3a0_0 .net/s "x", 15 0, L_0x8d321c820; 1 drivers
|
|
L_0x8d2d19860 .extend/s 32, L_0x8d321c820;
|
|
L_0x8d2d19900 .extend/s 32, L_0x8d321c8c0;
|
|
L_0x8d2d199a0 .arith/mult 32, L_0x8d2d19860, L_0x8d2d19900;
|
|
L_0x8d321c780 .part L_0x8d2d199a0, 31, 1;
|
|
L_0x8d2d19a40 .repeat 8, 8, L_0x8d321c780;
|
|
L_0x8d3195220 .concat [ 32 8 0 0], L_0x8d2d199a0, L_0x8d2d19a40;
|
|
L_0x8d31952c0 .arith/sum 40, L_0x8d28545f8, L_0x8d3195220;
|
|
S_0x8d31fcc00 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c780 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c7c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c800 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cee440_0 .net/s *"_ivl_0", 31 0, L_0x8d2d19ae0; 1 drivers
|
|
v0x8d2cee4e0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d19b80; 1 drivers
|
|
v0x8d2cee580_0 .net *"_ivl_7", 0 0, L_0x8d321c960; 1 drivers
|
|
v0x8d2cee620_0 .net *"_ivl_9", 7 0, L_0x8d2d19cc0; 1 drivers
|
|
L_0x8d2854640 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cee6c0_0 .net/s "acc_in", 39 0, L_0x8d2854640; 1 drivers
|
|
v0x8d2cee760_0 .net/s "acc_out", 39 0, L_0x8d3195400; alias, 1 drivers
|
|
v0x8d2cee800_0 .net/s "product", 31 0, L_0x8d2d19c20; 1 drivers
|
|
v0x8d2cee8a0_0 .net/s "product_ext", 39 0, L_0x8d3195360; 1 drivers
|
|
v0x8d2cee940_0 .net/s "w", 15 0, L_0x8d321caa0; 1 drivers
|
|
v0x8d2cee9e0_0 .net/s "x", 15 0, L_0x8d321ca00; 1 drivers
|
|
L_0x8d2d19ae0 .extend/s 32, L_0x8d321ca00;
|
|
L_0x8d2d19b80 .extend/s 32, L_0x8d321caa0;
|
|
L_0x8d2d19c20 .arith/mult 32, L_0x8d2d19ae0, L_0x8d2d19b80;
|
|
L_0x8d321c960 .part L_0x8d2d19c20, 31, 1;
|
|
L_0x8d2d19cc0 .repeat 8, 8, L_0x8d321c960;
|
|
L_0x8d3195360 .concat [ 32 8 0 0], L_0x8d2d19c20, L_0x8d2d19cc0;
|
|
L_0x8d3195400 .arith/sum 40, L_0x8d2854640, L_0x8d3195360;
|
|
S_0x8d31fcd80 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c840 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c880 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c8c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2ceea80_0 .net/s *"_ivl_0", 31 0, L_0x8d2d19d60; 1 drivers
|
|
v0x8d2ceeb20_0 .net/s *"_ivl_2", 31 0, L_0x8d2d19e00; 1 drivers
|
|
v0x8d2ceebc0_0 .net *"_ivl_7", 0 0, L_0x8d321cb40; 1 drivers
|
|
v0x8d2ceec60_0 .net *"_ivl_9", 7 0, L_0x8d2d19f40; 1 drivers
|
|
L_0x8d2854688 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2ceed00_0 .net/s "acc_in", 39 0, L_0x8d2854688; 1 drivers
|
|
v0x8d2ceeda0_0 .net/s "acc_out", 39 0, L_0x8d3195540; alias, 1 drivers
|
|
v0x8d2ceee40_0 .net/s "product", 31 0, L_0x8d2d19ea0; 1 drivers
|
|
v0x8d2ceeee0_0 .net/s "product_ext", 39 0, L_0x8d31954a0; 1 drivers
|
|
v0x8d2ceef80_0 .net/s "w", 15 0, L_0x8d321cc80; 1 drivers
|
|
v0x8d2cef020_0 .net/s "x", 15 0, L_0x8d321cbe0; 1 drivers
|
|
L_0x8d2d19d60 .extend/s 32, L_0x8d321cbe0;
|
|
L_0x8d2d19e00 .extend/s 32, L_0x8d321cc80;
|
|
L_0x8d2d19ea0 .arith/mult 32, L_0x8d2d19d60, L_0x8d2d19e00;
|
|
L_0x8d321cb40 .part L_0x8d2d19ea0, 31, 1;
|
|
L_0x8d2d19f40 .repeat 8, 8, L_0x8d321cb40;
|
|
L_0x8d31954a0 .concat [ 32 8 0 0], L_0x8d2d19ea0, L_0x8d2d19f40;
|
|
L_0x8d3195540 .arith/sum 40, L_0x8d2854688, L_0x8d31954a0;
|
|
S_0x8d31fcf00 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c900 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306c940 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306c980 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cef0c0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d19fe0; 1 drivers
|
|
v0x8d2cef160_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1a080; 1 drivers
|
|
v0x8d2cef200_0 .net *"_ivl_7", 0 0, L_0x8d321cd20; 1 drivers
|
|
v0x8d2cef2a0_0 .net *"_ivl_9", 7 0, L_0x8d2d1a1c0; 1 drivers
|
|
L_0x8d28546d0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cef340_0 .net/s "acc_in", 39 0, L_0x8d28546d0; 1 drivers
|
|
v0x8d2cef3e0_0 .net/s "acc_out", 39 0, L_0x8d3195680; alias, 1 drivers
|
|
v0x8d2cef480_0 .net/s "product", 31 0, L_0x8d2d1a120; 1 drivers
|
|
v0x8d2cef520_0 .net/s "product_ext", 39 0, L_0x8d31955e0; 1 drivers
|
|
v0x8d2cef5c0_0 .net/s "w", 15 0, L_0x8d321ce60; 1 drivers
|
|
v0x8d2cef660_0 .net/s "x", 15 0, L_0x8d321cdc0; 1 drivers
|
|
L_0x8d2d19fe0 .extend/s 32, L_0x8d321cdc0;
|
|
L_0x8d2d1a080 .extend/s 32, L_0x8d321ce60;
|
|
L_0x8d2d1a120 .arith/mult 32, L_0x8d2d19fe0, L_0x8d2d1a080;
|
|
L_0x8d321cd20 .part L_0x8d2d1a120, 31, 1;
|
|
L_0x8d2d1a1c0 .repeat 8, 8, L_0x8d321cd20;
|
|
L_0x8d31955e0 .concat [ 32 8 0 0], L_0x8d2d1a120, L_0x8d2d1a1c0;
|
|
L_0x8d3195680 .arith/sum 40, L_0x8d28546d0, L_0x8d31955e0;
|
|
S_0x8d31fd080 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306c9c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ca00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ca40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cef700_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1a260; 1 drivers
|
|
v0x8d2cef7a0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1a300; 1 drivers
|
|
v0x8d2cef840_0 .net *"_ivl_7", 0 0, L_0x8d321cf00; 1 drivers
|
|
v0x8d2cef8e0_0 .net *"_ivl_9", 7 0, L_0x8d2d1a440; 1 drivers
|
|
L_0x8d2854718 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cef980_0 .net/s "acc_in", 39 0, L_0x8d2854718; 1 drivers
|
|
v0x8d2cefa20_0 .net/s "acc_out", 39 0, L_0x8d31957c0; alias, 1 drivers
|
|
v0x8d2cefac0_0 .net/s "product", 31 0, L_0x8d2d1a3a0; 1 drivers
|
|
v0x8d2cefb60_0 .net/s "product_ext", 39 0, L_0x8d3195720; 1 drivers
|
|
v0x8d2cefc00_0 .net/s "w", 15 0, L_0x8d321d040; 1 drivers
|
|
v0x8d2cefca0_0 .net/s "x", 15 0, L_0x8d321cfa0; 1 drivers
|
|
L_0x8d2d1a260 .extend/s 32, L_0x8d321cfa0;
|
|
L_0x8d2d1a300 .extend/s 32, L_0x8d321d040;
|
|
L_0x8d2d1a3a0 .arith/mult 32, L_0x8d2d1a260, L_0x8d2d1a300;
|
|
L_0x8d321cf00 .part L_0x8d2d1a3a0, 31, 1;
|
|
L_0x8d2d1a440 .repeat 8, 8, L_0x8d321cf00;
|
|
L_0x8d3195720 .concat [ 32 8 0 0], L_0x8d2d1a3a0, L_0x8d2d1a440;
|
|
L_0x8d31957c0 .arith/sum 40, L_0x8d2854718, L_0x8d3195720;
|
|
S_0x8d31fd200 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ca80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306cac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306cb00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cefd40_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1a4e0; 1 drivers
|
|
v0x8d2cefde0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1a580; 1 drivers
|
|
v0x8d2cefe80_0 .net *"_ivl_7", 0 0, L_0x8d321d0e0; 1 drivers
|
|
v0x8d2ceff20_0 .net *"_ivl_9", 7 0, L_0x8d2d1a6c0; 1 drivers
|
|
L_0x8d2854760 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf0000_0 .net/s "acc_in", 39 0, L_0x8d2854760; 1 drivers
|
|
v0x8d2cf00a0_0 .net/s "acc_out", 39 0, L_0x8d3195900; alias, 1 drivers
|
|
v0x8d2cf0140_0 .net/s "product", 31 0, L_0x8d2d1a620; 1 drivers
|
|
v0x8d2cf01e0_0 .net/s "product_ext", 39 0, L_0x8d3195860; 1 drivers
|
|
v0x8d2cf0280_0 .net/s "w", 15 0, L_0x8d321d220; 1 drivers
|
|
v0x8d2cf0320_0 .net/s "x", 15 0, L_0x8d321d180; 1 drivers
|
|
L_0x8d2d1a4e0 .extend/s 32, L_0x8d321d180;
|
|
L_0x8d2d1a580 .extend/s 32, L_0x8d321d220;
|
|
L_0x8d2d1a620 .arith/mult 32, L_0x8d2d1a4e0, L_0x8d2d1a580;
|
|
L_0x8d321d0e0 .part L_0x8d2d1a620, 31, 1;
|
|
L_0x8d2d1a6c0 .repeat 8, 8, L_0x8d321d0e0;
|
|
L_0x8d3195860 .concat [ 32 8 0 0], L_0x8d2d1a620, L_0x8d2d1a6c0;
|
|
L_0x8d3195900 .arith/sum 40, L_0x8d2854760, L_0x8d3195860;
|
|
S_0x8d31fd380 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306cb40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306cb80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306cbc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf03c0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1a760; 1 drivers
|
|
v0x8d2cf0460_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1a800; 1 drivers
|
|
v0x8d2cf0500_0 .net *"_ivl_7", 0 0, L_0x8d321d2c0; 1 drivers
|
|
v0x8d2cf05a0_0 .net *"_ivl_9", 7 0, L_0x8d2d1a940; 1 drivers
|
|
L_0x8d28547a8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf0640_0 .net/s "acc_in", 39 0, L_0x8d28547a8; 1 drivers
|
|
v0x8d2cf06e0_0 .net/s "acc_out", 39 0, L_0x8d3195a40; alias, 1 drivers
|
|
v0x8d2cf0780_0 .net/s "product", 31 0, L_0x8d2d1a8a0; 1 drivers
|
|
v0x8d2cf0820_0 .net/s "product_ext", 39 0, L_0x8d31959a0; 1 drivers
|
|
v0x8d2cf08c0_0 .net/s "w", 15 0, L_0x8d321d400; 1 drivers
|
|
v0x8d2cf0960_0 .net/s "x", 15 0, L_0x8d321d360; 1 drivers
|
|
L_0x8d2d1a760 .extend/s 32, L_0x8d321d360;
|
|
L_0x8d2d1a800 .extend/s 32, L_0x8d321d400;
|
|
L_0x8d2d1a8a0 .arith/mult 32, L_0x8d2d1a760, L_0x8d2d1a800;
|
|
L_0x8d321d2c0 .part L_0x8d2d1a8a0, 31, 1;
|
|
L_0x8d2d1a940 .repeat 8, 8, L_0x8d321d2c0;
|
|
L_0x8d31959a0 .concat [ 32 8 0 0], L_0x8d2d1a8a0, L_0x8d2d1a940;
|
|
L_0x8d3195a40 .arith/sum 40, L_0x8d28547a8, L_0x8d31959a0;
|
|
S_0x8d31fd500 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d31fc900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306cc00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306cc40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306cc80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf0a00_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1a9e0; 1 drivers
|
|
v0x8d2cf0aa0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1aa80; 1 drivers
|
|
v0x8d2cf0b40_0 .net *"_ivl_7", 0 0, L_0x8d321d4a0; 1 drivers
|
|
v0x8d2cf0be0_0 .net *"_ivl_9", 7 0, L_0x8d2d1abc0; 1 drivers
|
|
L_0x8d28547f0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf0c80_0 .net/s "acc_in", 39 0, L_0x8d28547f0; 1 drivers
|
|
v0x8d2cf0d20_0 .net/s "acc_out", 39 0, L_0x8d3195b80; alias, 1 drivers
|
|
v0x8d2cf0dc0_0 .net/s "product", 31 0, L_0x8d2d1ab20; 1 drivers
|
|
v0x8d2cf0e60_0 .net/s "product_ext", 39 0, L_0x8d3195ae0; 1 drivers
|
|
v0x8d2cf0f00_0 .net/s "w", 15 0, L_0x8d321d5e0; 1 drivers
|
|
v0x8d2cf0fa0_0 .net/s "x", 15 0, L_0x8d321d540; 1 drivers
|
|
L_0x8d2d1a9e0 .extend/s 32, L_0x8d321d540;
|
|
L_0x8d2d1aa80 .extend/s 32, L_0x8d321d5e0;
|
|
L_0x8d2d1ab20 .arith/mult 32, L_0x8d2d1a9e0, L_0x8d2d1aa80;
|
|
L_0x8d321d4a0 .part L_0x8d2d1ab20, 31, 1;
|
|
L_0x8d2d1abc0 .repeat 8, 8, L_0x8d321d4a0;
|
|
L_0x8d3195ae0 .concat [ 32 8 0 0], L_0x8d2d1ab20, L_0x8d2d1abc0;
|
|
L_0x8d3195b80 .arith/sum 40, L_0x8d28547f0, L_0x8d3195ae0;
|
|
S_0x8d31fd680 .scope generate, "GEN_NEURON[2]" "GEN_NEURON[2]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b140 .param/l "n" 1 4 35, +C4<010>;
|
|
S_0x8d31fd800 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d31fd680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e666b0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e666f0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e66730 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e66770 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e667b0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e667f0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e66830 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c230 .functor BUFZ 16, L_0x8d321ec60, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2cf70c0_0 .net *"_ivl_0", 31 0, L_0x8d3196300; 1 drivers
|
|
v0x8d2cf7160_0 .net *"_ivl_11", 31 0, L_0x8d2d1ae40; 1 drivers
|
|
v0x8d2cf7200_0 .net *"_ivl_14", 31 0, L_0x8d31963a0; 1 drivers
|
|
L_0x8d2854958 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf72a0_0 .net *"_ivl_17", 28 0, L_0x8d2854958; 1 drivers
|
|
L_0x8d28549a0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf7340_0 .net/2u *"_ivl_18", 31 0, L_0x8d28549a0; 1 drivers
|
|
v0x8d2cf73e0_0 .net *"_ivl_21", 31 0, L_0x8d2d1aee0; 1 drivers
|
|
L_0x8d28549e8 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf7480_0 .net/2u *"_ivl_22", 31 0, L_0x8d28549e8; 1 drivers
|
|
v0x8d2cf7520_0 .net *"_ivl_25", 31 0, L_0x8d2d1af80; 1 drivers
|
|
L_0x8d2854880 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf75c0_0 .net *"_ivl_3", 28 0, L_0x8d2854880; 1 drivers
|
|
v0x8d2cf7660_0 .net *"_ivl_31", 0 0, L_0x8d321e9e0; 1 drivers
|
|
v0x8d2cf7700_0 .net *"_ivl_33", 23 0, L_0x8d2d1c460; 1 drivers
|
|
v0x8d2cf77a0_0 .net *"_ivl_36", 39 0, L_0x8d31973e0; 1 drivers
|
|
v0x8d2cf7840_0 .net *"_ivl_38", 31 0, L_0x8d321ea80; 1 drivers
|
|
L_0x8d28548c8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf78e0_0 .net/2u *"_ivl_4", 31 0, L_0x8d28548c8; 1 drivers
|
|
L_0x8d2854c70 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf7980_0 .net *"_ivl_40", 7 0, L_0x8d2854c70; 1 drivers
|
|
v0x8d2cf7a20_0 .net *"_ivl_46", 31 0, L_0x8d321eb20; 1 drivers
|
|
v0x8d2cf7ac0_0 .net *"_ivl_7", 31 0, L_0x8d2d1ada0; 1 drivers
|
|
L_0x8d2854910 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf7b60_0 .net/2u *"_ivl_8", 31 0, L_0x8d2854910; 1 drivers
|
|
v0x8d2cf7c00_0 .var/s "acc", 39 0;
|
|
v0x8d2cf7ca0_0 .net/s "acc_next", 39 0, L_0x8d31972a0; 1 drivers
|
|
v0x8d2cf7d40_0 .net/s "bias", 15 0, L_0x8d321ec60; 1 drivers
|
|
v0x8d2cf7de0_0 .net/s "bias_ext", 39 0, L_0x8d3197340; 1 drivers
|
|
v0x8d2cf7e80_0 .net/s "bias_ext_small", 15 0, L_0x8d307c230; 1 drivers
|
|
v0x8d2cf7f20_0 .var "busy", 0 0;
|
|
v0x8d2cfc000_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2cfc0a0_0 .var "done", 0 0;
|
|
v0x8d2cfc140_0 .net/s "final_acc", 39 0, L_0x8d3197480; 1 drivers
|
|
v0x8d2cfc1e0_0 .net/s "final_value", 39 0, L_0x8d2d1c500; 1 drivers
|
|
v0x8d2cfc280_0 .var "group_index", 2 0;
|
|
v0x8d2cfc320_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2cfc3c0_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2cfc460_0 .net/s "w_bus", 1023 0, L_0x8d321ebc0; 1 drivers
|
|
v0x8d2cfc500_0 .net/s "w_group", 127 0, L_0x8d321da40; 1 drivers
|
|
v0x8d2cfc5a0_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2cfc640_0 .net/s "x_group", 127 0, L_0x8d321d9a0; 1 drivers
|
|
v0x8d2cfc6e0_0 .var/s "y", 15 0;
|
|
L_0x8d3196300 .concat [ 3 29 0 0], v0x8d2cfc280_0, L_0x8d2854880;
|
|
L_0x8d2d1ada0 .arith/mult 32, L_0x8d3196300, L_0x8d28548c8;
|
|
L_0x8d2d1ae40 .arith/mult 32, L_0x8d2d1ada0, L_0x8d2854910;
|
|
L_0x8d321d9a0 .part/v v0x8d2d17ca0_0, L_0x8d2d1ae40, 128;
|
|
L_0x8d31963a0 .concat [ 3 29 0 0], v0x8d2cfc280_0, L_0x8d2854958;
|
|
L_0x8d2d1aee0 .arith/mult 32, L_0x8d31963a0, L_0x8d28549a0;
|
|
L_0x8d2d1af80 .arith/mult 32, L_0x8d2d1aee0, L_0x8d28549e8;
|
|
L_0x8d321da40 .part/v L_0x8d321ebc0, L_0x8d2d1af80, 128;
|
|
L_0x8d321e9e0 .part L_0x8d307c230, 15, 1;
|
|
L_0x8d2d1c460 .repeat 24, 24, L_0x8d321e9e0;
|
|
L_0x8d3197340 .concat [ 16 24 0 0], L_0x8d307c230, L_0x8d2d1c460;
|
|
L_0x8d321ea80 .part L_0x8d3197340, 0, 32;
|
|
L_0x8d31973e0 .concat [ 8 32 0 0], L_0x8d2854c70, L_0x8d321ea80;
|
|
L_0x8d3197480 .arith/sum 40, L_0x8d31972a0, L_0x8d31973e0;
|
|
L_0x8d321eb20 .part L_0x8d3197480, 8, 32;
|
|
L_0x8d2d1c500 .extend/s 40, L_0x8d321eb20;
|
|
S_0x8d31fd980 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d31fd800;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0700 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a0740 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2cf64e0_0 .net/s "acc_in", 39 0, v0x8d2cf7c00_0; 1 drivers
|
|
v0x8d2cf6580_0 .net/s "acc_out", 39 0, L_0x8d31972a0; alias, 1 drivers
|
|
v0x8d2cf6620_0 .net/s "m0", 39 0, L_0x8d31964e0; 1 drivers
|
|
v0x8d2cf66c0_0 .net/s "m1", 39 0, L_0x8d3196620; 1 drivers
|
|
v0x8d2cf6760_0 .net/s "m2", 39 0, L_0x8d3196760; 1 drivers
|
|
v0x8d2cf6800_0 .net/s "m3", 39 0, L_0x8d31968a0; 1 drivers
|
|
v0x8d2cf68a0_0 .net/s "m4", 39 0, L_0x8d31969e0; 1 drivers
|
|
v0x8d2cf6940_0 .net/s "m5", 39 0, L_0x8d3196b20; 1 drivers
|
|
v0x8d2cf69e0_0 .net/s "m6", 39 0, L_0x8d3196c60; 1 drivers
|
|
v0x8d2cf6a80_0 .net/s "m7", 39 0, L_0x8d3196da0; 1 drivers
|
|
v0x8d2cf6b20_0 .net/s "s0", 39 0, L_0x8d3196e40; 1 drivers
|
|
v0x8d2cf6bc0_0 .net/s "s1", 39 0, L_0x8d3196ee0; 1 drivers
|
|
v0x8d2cf6c60_0 .net/s "s2", 39 0, L_0x8d3196f80; 1 drivers
|
|
v0x8d2cf6d00_0 .net/s "s3", 39 0, L_0x8d3197020; 1 drivers
|
|
v0x8d2cf6da0_0 .net/s "s4", 39 0, L_0x8d31970c0; 1 drivers
|
|
v0x8d2cf6e40_0 .net/s "s5", 39 0, L_0x8d3197160; 1 drivers
|
|
v0x8d2cf6ee0_0 .net/s "sum", 39 0, L_0x8d3197200; 1 drivers
|
|
v0x8d2cf6f80_0 .net/s "w_bus", 127 0, L_0x8d321da40; alias, 1 drivers
|
|
v0x8d2cf7020_0 .net/s "x_bus", 127 0, L_0x8d321d9a0; alias, 1 drivers
|
|
L_0x8d321db80 .part L_0x8d321d9a0, 0, 16;
|
|
L_0x8d321dc20 .part L_0x8d321da40, 0, 16;
|
|
L_0x8d321dd60 .part L_0x8d321d9a0, 16, 16;
|
|
L_0x8d321de00 .part L_0x8d321da40, 16, 16;
|
|
L_0x8d321df40 .part L_0x8d321d9a0, 32, 16;
|
|
L_0x8d321dfe0 .part L_0x8d321da40, 32, 16;
|
|
L_0x8d321e120 .part L_0x8d321d9a0, 48, 16;
|
|
L_0x8d321e1c0 .part L_0x8d321da40, 48, 16;
|
|
L_0x8d321e300 .part L_0x8d321d9a0, 64, 16;
|
|
L_0x8d321e3a0 .part L_0x8d321da40, 64, 16;
|
|
L_0x8d321e4e0 .part L_0x8d321d9a0, 80, 16;
|
|
L_0x8d321e580 .part L_0x8d321da40, 80, 16;
|
|
L_0x8d321e6c0 .part L_0x8d321d9a0, 96, 16;
|
|
L_0x8d321e760 .part L_0x8d321da40, 96, 16;
|
|
L_0x8d321e8a0 .part L_0x8d321d9a0, 112, 16;
|
|
L_0x8d321e940 .part L_0x8d321da40, 112, 16;
|
|
L_0x8d3196e40 .arith/sum 40, L_0x8d31964e0, L_0x8d3196620;
|
|
L_0x8d3196ee0 .arith/sum 40, L_0x8d3196760, L_0x8d31968a0;
|
|
L_0x8d3196f80 .arith/sum 40, L_0x8d31969e0, L_0x8d3196b20;
|
|
L_0x8d3197020 .arith/sum 40, L_0x8d3196c60, L_0x8d3196da0;
|
|
L_0x8d31970c0 .arith/sum 40, L_0x8d3196e40, L_0x8d3196ee0;
|
|
L_0x8d3197160 .arith/sum 40, L_0x8d3196f80, L_0x8d3197020;
|
|
L_0x8d3197200 .arith/sum 40, L_0x8d31970c0, L_0x8d3197160;
|
|
L_0x8d31972a0 .arith/sum 40, v0x8d2cf7c00_0, L_0x8d3197200;
|
|
S_0x8d31fdb00 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ccc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306cd00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306cd40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf32a0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1b020; 1 drivers
|
|
v0x8d2cf3340_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1b0c0; 1 drivers
|
|
v0x8d2cf33e0_0 .net *"_ivl_7", 0 0, L_0x8d321dae0; 1 drivers
|
|
v0x8d2cf3480_0 .net *"_ivl_9", 7 0, L_0x8d2d1b200; 1 drivers
|
|
L_0x8d2854a30 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf3520_0 .net/s "acc_in", 39 0, L_0x8d2854a30; 1 drivers
|
|
v0x8d2cf35c0_0 .net/s "acc_out", 39 0, L_0x8d31964e0; alias, 1 drivers
|
|
v0x8d2cf3660_0 .net/s "product", 31 0, L_0x8d2d1b160; 1 drivers
|
|
v0x8d2cf3700_0 .net/s "product_ext", 39 0, L_0x8d3196440; 1 drivers
|
|
v0x8d2cf37a0_0 .net/s "w", 15 0, L_0x8d321dc20; 1 drivers
|
|
v0x8d2cf3840_0 .net/s "x", 15 0, L_0x8d321db80; 1 drivers
|
|
L_0x8d2d1b020 .extend/s 32, L_0x8d321db80;
|
|
L_0x8d2d1b0c0 .extend/s 32, L_0x8d321dc20;
|
|
L_0x8d2d1b160 .arith/mult 32, L_0x8d2d1b020, L_0x8d2d1b0c0;
|
|
L_0x8d321dae0 .part L_0x8d2d1b160, 31, 1;
|
|
L_0x8d2d1b200 .repeat 8, 8, L_0x8d321dae0;
|
|
L_0x8d3196440 .concat [ 32 8 0 0], L_0x8d2d1b160, L_0x8d2d1b200;
|
|
L_0x8d31964e0 .arith/sum 40, L_0x8d2854a30, L_0x8d3196440;
|
|
S_0x8d31fdc80 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306cd80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306cdc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ce00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf38e0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1b2a0; 1 drivers
|
|
v0x8d2cf3980_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1b340; 1 drivers
|
|
v0x8d2cf3a20_0 .net *"_ivl_7", 0 0, L_0x8d321dcc0; 1 drivers
|
|
v0x8d2cf3ac0_0 .net *"_ivl_9", 7 0, L_0x8d2d1b480; 1 drivers
|
|
L_0x8d2854a78 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf3b60_0 .net/s "acc_in", 39 0, L_0x8d2854a78; 1 drivers
|
|
v0x8d2cf3c00_0 .net/s "acc_out", 39 0, L_0x8d3196620; alias, 1 drivers
|
|
v0x8d2cf3ca0_0 .net/s "product", 31 0, L_0x8d2d1b3e0; 1 drivers
|
|
v0x8d2cf3d40_0 .net/s "product_ext", 39 0, L_0x8d3196580; 1 drivers
|
|
v0x8d2cf3de0_0 .net/s "w", 15 0, L_0x8d321de00; 1 drivers
|
|
v0x8d2cf3e80_0 .net/s "x", 15 0, L_0x8d321dd60; 1 drivers
|
|
L_0x8d2d1b2a0 .extend/s 32, L_0x8d321dd60;
|
|
L_0x8d2d1b340 .extend/s 32, L_0x8d321de00;
|
|
L_0x8d2d1b3e0 .arith/mult 32, L_0x8d2d1b2a0, L_0x8d2d1b340;
|
|
L_0x8d321dcc0 .part L_0x8d2d1b3e0, 31, 1;
|
|
L_0x8d2d1b480 .repeat 8, 8, L_0x8d321dcc0;
|
|
L_0x8d3196580 .concat [ 32 8 0 0], L_0x8d2d1b3e0, L_0x8d2d1b480;
|
|
L_0x8d3196620 .arith/sum 40, L_0x8d2854a78, L_0x8d3196580;
|
|
S_0x8d31fde00 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ce40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ce80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306cec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf3f20_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1b520; 1 drivers
|
|
v0x8d2cf4000_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1b5c0; 1 drivers
|
|
v0x8d2cf40a0_0 .net *"_ivl_7", 0 0, L_0x8d321dea0; 1 drivers
|
|
v0x8d2cf4140_0 .net *"_ivl_9", 7 0, L_0x8d2d1b700; 1 drivers
|
|
L_0x8d2854ac0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf41e0_0 .net/s "acc_in", 39 0, L_0x8d2854ac0; 1 drivers
|
|
v0x8d2cf4280_0 .net/s "acc_out", 39 0, L_0x8d3196760; alias, 1 drivers
|
|
v0x8d2cf4320_0 .net/s "product", 31 0, L_0x8d2d1b660; 1 drivers
|
|
v0x8d2cf43c0_0 .net/s "product_ext", 39 0, L_0x8d31966c0; 1 drivers
|
|
v0x8d2cf4460_0 .net/s "w", 15 0, L_0x8d321dfe0; 1 drivers
|
|
v0x8d2cf4500_0 .net/s "x", 15 0, L_0x8d321df40; 1 drivers
|
|
L_0x8d2d1b520 .extend/s 32, L_0x8d321df40;
|
|
L_0x8d2d1b5c0 .extend/s 32, L_0x8d321dfe0;
|
|
L_0x8d2d1b660 .arith/mult 32, L_0x8d2d1b520, L_0x8d2d1b5c0;
|
|
L_0x8d321dea0 .part L_0x8d2d1b660, 31, 1;
|
|
L_0x8d2d1b700 .repeat 8, 8, L_0x8d321dea0;
|
|
L_0x8d31966c0 .concat [ 32 8 0 0], L_0x8d2d1b660, L_0x8d2d1b700;
|
|
L_0x8d3196760 .arith/sum 40, L_0x8d2854ac0, L_0x8d31966c0;
|
|
S_0x8d31fdf80 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306cf00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306cf40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306cf80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf45a0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1b7a0; 1 drivers
|
|
v0x8d2cf4640_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1b840; 1 drivers
|
|
v0x8d2cf46e0_0 .net *"_ivl_7", 0 0, L_0x8d321e080; 1 drivers
|
|
v0x8d2cf4780_0 .net *"_ivl_9", 7 0, L_0x8d2d1b980; 1 drivers
|
|
L_0x8d2854b08 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf4820_0 .net/s "acc_in", 39 0, L_0x8d2854b08; 1 drivers
|
|
v0x8d2cf48c0_0 .net/s "acc_out", 39 0, L_0x8d31968a0; alias, 1 drivers
|
|
v0x8d2cf4960_0 .net/s "product", 31 0, L_0x8d2d1b8e0; 1 drivers
|
|
v0x8d2cf4a00_0 .net/s "product_ext", 39 0, L_0x8d3196800; 1 drivers
|
|
v0x8d2cf4aa0_0 .net/s "w", 15 0, L_0x8d321e1c0; 1 drivers
|
|
v0x8d2cf4b40_0 .net/s "x", 15 0, L_0x8d321e120; 1 drivers
|
|
L_0x8d2d1b7a0 .extend/s 32, L_0x8d321e120;
|
|
L_0x8d2d1b840 .extend/s 32, L_0x8d321e1c0;
|
|
L_0x8d2d1b8e0 .arith/mult 32, L_0x8d2d1b7a0, L_0x8d2d1b840;
|
|
L_0x8d321e080 .part L_0x8d2d1b8e0, 31, 1;
|
|
L_0x8d2d1b980 .repeat 8, 8, L_0x8d321e080;
|
|
L_0x8d3196800 .concat [ 32 8 0 0], L_0x8d2d1b8e0, L_0x8d2d1b980;
|
|
L_0x8d31968a0 .arith/sum 40, L_0x8d2854b08, L_0x8d3196800;
|
|
S_0x8d31fe100 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306cfc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d000 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d040 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf4be0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1ba20; 1 drivers
|
|
v0x8d2cf4c80_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1bac0; 1 drivers
|
|
v0x8d2cf4d20_0 .net *"_ivl_7", 0 0, L_0x8d321e260; 1 drivers
|
|
v0x8d2cf4dc0_0 .net *"_ivl_9", 7 0, L_0x8d2d1bc00; 1 drivers
|
|
L_0x8d2854b50 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf4e60_0 .net/s "acc_in", 39 0, L_0x8d2854b50; 1 drivers
|
|
v0x8d2cf4f00_0 .net/s "acc_out", 39 0, L_0x8d31969e0; alias, 1 drivers
|
|
v0x8d2cf4fa0_0 .net/s "product", 31 0, L_0x8d2d1bb60; 1 drivers
|
|
v0x8d2cf5040_0 .net/s "product_ext", 39 0, L_0x8d3196940; 1 drivers
|
|
v0x8d2cf50e0_0 .net/s "w", 15 0, L_0x8d321e3a0; 1 drivers
|
|
v0x8d2cf5180_0 .net/s "x", 15 0, L_0x8d321e300; 1 drivers
|
|
L_0x8d2d1ba20 .extend/s 32, L_0x8d321e300;
|
|
L_0x8d2d1bac0 .extend/s 32, L_0x8d321e3a0;
|
|
L_0x8d2d1bb60 .arith/mult 32, L_0x8d2d1ba20, L_0x8d2d1bac0;
|
|
L_0x8d321e260 .part L_0x8d2d1bb60, 31, 1;
|
|
L_0x8d2d1bc00 .repeat 8, 8, L_0x8d321e260;
|
|
L_0x8d3196940 .concat [ 32 8 0 0], L_0x8d2d1bb60, L_0x8d2d1bc00;
|
|
L_0x8d31969e0 .arith/sum 40, L_0x8d2854b50, L_0x8d3196940;
|
|
S_0x8d31fe280 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d080 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d0c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d100 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf5220_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1bca0; 1 drivers
|
|
v0x8d2cf52c0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1bd40; 1 drivers
|
|
v0x8d2cf5360_0 .net *"_ivl_7", 0 0, L_0x8d321e440; 1 drivers
|
|
v0x8d2cf5400_0 .net *"_ivl_9", 7 0, L_0x8d2d1be80; 1 drivers
|
|
L_0x8d2854b98 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf54a0_0 .net/s "acc_in", 39 0, L_0x8d2854b98; 1 drivers
|
|
v0x8d2cf5540_0 .net/s "acc_out", 39 0, L_0x8d3196b20; alias, 1 drivers
|
|
v0x8d2cf55e0_0 .net/s "product", 31 0, L_0x8d2d1bde0; 1 drivers
|
|
v0x8d2cf5680_0 .net/s "product_ext", 39 0, L_0x8d3196a80; 1 drivers
|
|
v0x8d2cf5720_0 .net/s "w", 15 0, L_0x8d321e580; 1 drivers
|
|
v0x8d2cf57c0_0 .net/s "x", 15 0, L_0x8d321e4e0; 1 drivers
|
|
L_0x8d2d1bca0 .extend/s 32, L_0x8d321e4e0;
|
|
L_0x8d2d1bd40 .extend/s 32, L_0x8d321e580;
|
|
L_0x8d2d1bde0 .arith/mult 32, L_0x8d2d1bca0, L_0x8d2d1bd40;
|
|
L_0x8d321e440 .part L_0x8d2d1bde0, 31, 1;
|
|
L_0x8d2d1be80 .repeat 8, 8, L_0x8d321e440;
|
|
L_0x8d3196a80 .concat [ 32 8 0 0], L_0x8d2d1bde0, L_0x8d2d1be80;
|
|
L_0x8d3196b20 .arith/sum 40, L_0x8d2854b98, L_0x8d3196a80;
|
|
S_0x8d31fe400 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d140 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d180 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d1c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf5860_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1bf20; 1 drivers
|
|
v0x8d2cf5900_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1c000; 1 drivers
|
|
v0x8d2cf59a0_0 .net *"_ivl_7", 0 0, L_0x8d321e620; 1 drivers
|
|
v0x8d2cf5a40_0 .net *"_ivl_9", 7 0, L_0x8d2d1c140; 1 drivers
|
|
L_0x8d2854be0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf5ae0_0 .net/s "acc_in", 39 0, L_0x8d2854be0; 1 drivers
|
|
v0x8d2cf5b80_0 .net/s "acc_out", 39 0, L_0x8d3196c60; alias, 1 drivers
|
|
v0x8d2cf5c20_0 .net/s "product", 31 0, L_0x8d2d1c0a0; 1 drivers
|
|
v0x8d2cf5cc0_0 .net/s "product_ext", 39 0, L_0x8d3196bc0; 1 drivers
|
|
v0x8d2cf5d60_0 .net/s "w", 15 0, L_0x8d321e760; 1 drivers
|
|
v0x8d2cf5e00_0 .net/s "x", 15 0, L_0x8d321e6c0; 1 drivers
|
|
L_0x8d2d1bf20 .extend/s 32, L_0x8d321e6c0;
|
|
L_0x8d2d1c000 .extend/s 32, L_0x8d321e760;
|
|
L_0x8d2d1c0a0 .arith/mult 32, L_0x8d2d1bf20, L_0x8d2d1c000;
|
|
L_0x8d321e620 .part L_0x8d2d1c0a0, 31, 1;
|
|
L_0x8d2d1c140 .repeat 8, 8, L_0x8d321e620;
|
|
L_0x8d3196bc0 .concat [ 32 8 0 0], L_0x8d2d1c0a0, L_0x8d2d1c140;
|
|
L_0x8d3196c60 .arith/sum 40, L_0x8d2854be0, L_0x8d3196bc0;
|
|
S_0x8d31fe580 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d31fd980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d200 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d240 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d280 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cf5ea0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1c1e0; 1 drivers
|
|
v0x8d2cf5f40_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1c280; 1 drivers
|
|
v0x8d2cf5fe0_0 .net *"_ivl_7", 0 0, L_0x8d321e800; 1 drivers
|
|
v0x8d2cf6080_0 .net *"_ivl_9", 7 0, L_0x8d2d1c3c0; 1 drivers
|
|
L_0x8d2854c28 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cf6120_0 .net/s "acc_in", 39 0, L_0x8d2854c28; 1 drivers
|
|
v0x8d2cf61c0_0 .net/s "acc_out", 39 0, L_0x8d3196da0; alias, 1 drivers
|
|
v0x8d2cf6260_0 .net/s "product", 31 0, L_0x8d2d1c320; 1 drivers
|
|
v0x8d2cf6300_0 .net/s "product_ext", 39 0, L_0x8d3196d00; 1 drivers
|
|
v0x8d2cf63a0_0 .net/s "w", 15 0, L_0x8d321e940; 1 drivers
|
|
v0x8d2cf6440_0 .net/s "x", 15 0, L_0x8d321e8a0; 1 drivers
|
|
L_0x8d2d1c1e0 .extend/s 32, L_0x8d321e8a0;
|
|
L_0x8d2d1c280 .extend/s 32, L_0x8d321e940;
|
|
L_0x8d2d1c320 .arith/mult 32, L_0x8d2d1c1e0, L_0x8d2d1c280;
|
|
L_0x8d321e800 .part L_0x8d2d1c320, 31, 1;
|
|
L_0x8d2d1c3c0 .repeat 8, 8, L_0x8d321e800;
|
|
L_0x8d3196d00 .concat [ 32 8 0 0], L_0x8d2d1c320, L_0x8d2d1c3c0;
|
|
L_0x8d3196da0 .arith/sum 40, L_0x8d2854c28, L_0x8d3196d00;
|
|
S_0x8d31fe700 .scope generate, "GEN_NEURON[3]" "GEN_NEURON[3]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b180 .param/l "n" 1 4 35, +C4<011>;
|
|
S_0x8d31fe880 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d31fe700;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e66a70 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e66ab0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e66af0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e66b30 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e66b70 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e66bb0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e66bf0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c2a0 .functor BUFZ 16, L_0x8d322c000, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2d005a0_0 .net *"_ivl_0", 31 0, L_0x8d3197520; 1 drivers
|
|
v0x8d2d00640_0 .net *"_ivl_11", 31 0, L_0x8d2d1c640; 1 drivers
|
|
v0x8d2d006e0_0 .net *"_ivl_14", 31 0, L_0x8d31975c0; 1 drivers
|
|
L_0x8d2854d90 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d00780_0 .net *"_ivl_17", 28 0, L_0x8d2854d90; 1 drivers
|
|
L_0x8d2854dd8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d00820_0 .net/2u *"_ivl_18", 31 0, L_0x8d2854dd8; 1 drivers
|
|
v0x8d2d008c0_0 .net *"_ivl_21", 31 0, L_0x8d2d1c6e0; 1 drivers
|
|
L_0x8d2854e20 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d00960_0 .net/2u *"_ivl_22", 31 0, L_0x8d2854e20; 1 drivers
|
|
v0x8d2d00a00_0 .net *"_ivl_25", 31 0, L_0x8d2d1c780; 1 drivers
|
|
L_0x8d2854cb8 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d00aa0_0 .net *"_ivl_3", 28 0, L_0x8d2854cb8; 1 drivers
|
|
v0x8d2d00b40_0 .net *"_ivl_31", 0 0, L_0x8d321fd40; 1 drivers
|
|
v0x8d2d00be0_0 .net *"_ivl_33", 23 0, L_0x8d2d1dc20; 1 drivers
|
|
v0x8d2d00c80_0 .net *"_ivl_36", 39 0, L_0x8d3228640; 1 drivers
|
|
v0x8d2d00d20_0 .net *"_ivl_38", 31 0, L_0x8d321fde0; 1 drivers
|
|
L_0x8d2854d00 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d00dc0_0 .net/2u *"_ivl_4", 31 0, L_0x8d2854d00; 1 drivers
|
|
L_0x8d28550a8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d00e60_0 .net *"_ivl_40", 7 0, L_0x8d28550a8; 1 drivers
|
|
v0x8d2d00f00_0 .net *"_ivl_46", 31 0, L_0x8d321fe80; 1 drivers
|
|
v0x8d2d00fa0_0 .net *"_ivl_7", 31 0, L_0x8d2d1c5a0; 1 drivers
|
|
L_0x8d2854d48 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d01040_0 .net/2u *"_ivl_8", 31 0, L_0x8d2854d48; 1 drivers
|
|
v0x8d2d010e0_0 .var/s "acc", 39 0;
|
|
v0x8d2d01180_0 .net/s "acc_next", 39 0, L_0x8d3228500; 1 drivers
|
|
v0x8d2d01220_0 .net/s "bias", 15 0, L_0x8d322c000; 1 drivers
|
|
v0x8d2d012c0_0 .net/s "bias_ext", 39 0, L_0x8d32285a0; 1 drivers
|
|
v0x8d2d01360_0 .net/s "bias_ext_small", 15 0, L_0x8d307c2a0; 1 drivers
|
|
v0x8d2d01400_0 .var "busy", 0 0;
|
|
v0x8d2d014a0_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2d01540_0 .var "done", 0 0;
|
|
v0x8d2d015e0_0 .net/s "final_acc", 39 0, L_0x8d32286e0; 1 drivers
|
|
v0x8d2d01680_0 .net/s "final_value", 39 0, L_0x8d2d1dcc0; 1 drivers
|
|
v0x8d2d01720_0 .var "group_index", 2 0;
|
|
v0x8d2d017c0_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2d01860_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2d01900_0 .net/s "w_bus", 1023 0, L_0x8d321ff20; 1 drivers
|
|
v0x8d2d019a0_0 .net/s "w_group", 127 0, L_0x8d321eda0; 1 drivers
|
|
v0x8d2d01a40_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2d01ae0_0 .net/s "x_group", 127 0, L_0x8d321ed00; 1 drivers
|
|
v0x8d2d01b80_0 .var/s "y", 15 0;
|
|
L_0x8d3197520 .concat [ 3 29 0 0], v0x8d2d01720_0, L_0x8d2854cb8;
|
|
L_0x8d2d1c5a0 .arith/mult 32, L_0x8d3197520, L_0x8d2854d00;
|
|
L_0x8d2d1c640 .arith/mult 32, L_0x8d2d1c5a0, L_0x8d2854d48;
|
|
L_0x8d321ed00 .part/v v0x8d2d17ca0_0, L_0x8d2d1c640, 128;
|
|
L_0x8d31975c0 .concat [ 3 29 0 0], v0x8d2d01720_0, L_0x8d2854d90;
|
|
L_0x8d2d1c6e0 .arith/mult 32, L_0x8d31975c0, L_0x8d2854dd8;
|
|
L_0x8d2d1c780 .arith/mult 32, L_0x8d2d1c6e0, L_0x8d2854e20;
|
|
L_0x8d321eda0 .part/v L_0x8d321ff20, L_0x8d2d1c780, 128;
|
|
L_0x8d321fd40 .part L_0x8d307c2a0, 15, 1;
|
|
L_0x8d2d1dc20 .repeat 24, 24, L_0x8d321fd40;
|
|
L_0x8d32285a0 .concat [ 16 24 0 0], L_0x8d307c2a0, L_0x8d2d1dc20;
|
|
L_0x8d321fde0 .part L_0x8d32285a0, 0, 32;
|
|
L_0x8d3228640 .concat [ 8 32 0 0], L_0x8d28550a8, L_0x8d321fde0;
|
|
L_0x8d32286e0 .arith/sum 40, L_0x8d3228500, L_0x8d3228640;
|
|
L_0x8d321fe80 .part L_0x8d32286e0, 8, 32;
|
|
L_0x8d2d1dcc0 .extend/s 40, L_0x8d321fe80;
|
|
S_0x8d31fea00 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d31fe880;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0780 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a07c0 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2cff980_0 .net/s "acc_in", 39 0, v0x8d2d010e0_0; 1 drivers
|
|
v0x8d2cffa20_0 .net/s "acc_out", 39 0, L_0x8d3228500; alias, 1 drivers
|
|
v0x8d2cffac0_0 .net/s "m0", 39 0, L_0x8d3197700; 1 drivers
|
|
v0x8d2cffb60_0 .net/s "m1", 39 0, L_0x8d3197840; 1 drivers
|
|
v0x8d2cffc00_0 .net/s "m2", 39 0, L_0x8d3197980; 1 drivers
|
|
v0x8d2cffca0_0 .net/s "m3", 39 0, L_0x8d3197ac0; 1 drivers
|
|
v0x8d2cffd40_0 .net/s "m4", 39 0, L_0x8d3197c00; 1 drivers
|
|
v0x8d2cffde0_0 .net/s "m5", 39 0, L_0x8d3197d40; 1 drivers
|
|
v0x8d2cffe80_0 .net/s "m6", 39 0, L_0x8d3197e80; 1 drivers
|
|
v0x8d2cfff20_0 .net/s "m7", 39 0, L_0x8d3228000; 1 drivers
|
|
v0x8d2d00000_0 .net/s "s0", 39 0, L_0x8d32280a0; 1 drivers
|
|
v0x8d2d000a0_0 .net/s "s1", 39 0, L_0x8d3228140; 1 drivers
|
|
v0x8d2d00140_0 .net/s "s2", 39 0, L_0x8d32281e0; 1 drivers
|
|
v0x8d2d001e0_0 .net/s "s3", 39 0, L_0x8d3228280; 1 drivers
|
|
v0x8d2d00280_0 .net/s "s4", 39 0, L_0x8d3228320; 1 drivers
|
|
v0x8d2d00320_0 .net/s "s5", 39 0, L_0x8d32283c0; 1 drivers
|
|
v0x8d2d003c0_0 .net/s "sum", 39 0, L_0x8d3228460; 1 drivers
|
|
v0x8d2d00460_0 .net/s "w_bus", 127 0, L_0x8d321eda0; alias, 1 drivers
|
|
v0x8d2d00500_0 .net/s "x_bus", 127 0, L_0x8d321ed00; alias, 1 drivers
|
|
L_0x8d321eee0 .part L_0x8d321ed00, 0, 16;
|
|
L_0x8d321ef80 .part L_0x8d321eda0, 0, 16;
|
|
L_0x8d321f0c0 .part L_0x8d321ed00, 16, 16;
|
|
L_0x8d321f160 .part L_0x8d321eda0, 16, 16;
|
|
L_0x8d321f2a0 .part L_0x8d321ed00, 32, 16;
|
|
L_0x8d321f340 .part L_0x8d321eda0, 32, 16;
|
|
L_0x8d321f480 .part L_0x8d321ed00, 48, 16;
|
|
L_0x8d321f520 .part L_0x8d321eda0, 48, 16;
|
|
L_0x8d321f660 .part L_0x8d321ed00, 64, 16;
|
|
L_0x8d321f700 .part L_0x8d321eda0, 64, 16;
|
|
L_0x8d321f840 .part L_0x8d321ed00, 80, 16;
|
|
L_0x8d321f8e0 .part L_0x8d321eda0, 80, 16;
|
|
L_0x8d321fa20 .part L_0x8d321ed00, 96, 16;
|
|
L_0x8d321fac0 .part L_0x8d321eda0, 96, 16;
|
|
L_0x8d321fc00 .part L_0x8d321ed00, 112, 16;
|
|
L_0x8d321fca0 .part L_0x8d321eda0, 112, 16;
|
|
L_0x8d32280a0 .arith/sum 40, L_0x8d3197700, L_0x8d3197840;
|
|
L_0x8d3228140 .arith/sum 40, L_0x8d3197980, L_0x8d3197ac0;
|
|
L_0x8d32281e0 .arith/sum 40, L_0x8d3197c00, L_0x8d3197d40;
|
|
L_0x8d3228280 .arith/sum 40, L_0x8d3197e80, L_0x8d3228000;
|
|
L_0x8d3228320 .arith/sum 40, L_0x8d32280a0, L_0x8d3228140;
|
|
L_0x8d32283c0 .arith/sum 40, L_0x8d32281e0, L_0x8d3228280;
|
|
L_0x8d3228460 .arith/sum 40, L_0x8d3228320, L_0x8d32283c0;
|
|
L_0x8d3228500 .arith/sum 40, v0x8d2d010e0_0, L_0x8d3228460;
|
|
S_0x8d31feb80 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d2c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d300 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d340 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfc780_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1c820; 1 drivers
|
|
v0x8d2cfc820_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1c8c0; 1 drivers
|
|
v0x8d2cfc8c0_0 .net *"_ivl_7", 0 0, L_0x8d321ee40; 1 drivers
|
|
v0x8d2cfc960_0 .net *"_ivl_9", 7 0, L_0x8d2d1ca00; 1 drivers
|
|
L_0x8d2854e68 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfca00_0 .net/s "acc_in", 39 0, L_0x8d2854e68; 1 drivers
|
|
v0x8d2cfcaa0_0 .net/s "acc_out", 39 0, L_0x8d3197700; alias, 1 drivers
|
|
v0x8d2cfcb40_0 .net/s "product", 31 0, L_0x8d2d1c960; 1 drivers
|
|
v0x8d2cfcbe0_0 .net/s "product_ext", 39 0, L_0x8d3197660; 1 drivers
|
|
v0x8d2cfcc80_0 .net/s "w", 15 0, L_0x8d321ef80; 1 drivers
|
|
v0x8d2cfcd20_0 .net/s "x", 15 0, L_0x8d321eee0; 1 drivers
|
|
L_0x8d2d1c820 .extend/s 32, L_0x8d321eee0;
|
|
L_0x8d2d1c8c0 .extend/s 32, L_0x8d321ef80;
|
|
L_0x8d2d1c960 .arith/mult 32, L_0x8d2d1c820, L_0x8d2d1c8c0;
|
|
L_0x8d321ee40 .part L_0x8d2d1c960, 31, 1;
|
|
L_0x8d2d1ca00 .repeat 8, 8, L_0x8d321ee40;
|
|
L_0x8d3197660 .concat [ 32 8 0 0], L_0x8d2d1c960, L_0x8d2d1ca00;
|
|
L_0x8d3197700 .arith/sum 40, L_0x8d2854e68, L_0x8d3197660;
|
|
S_0x8d31fed00 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d380 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d3c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d400 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfcdc0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1caa0; 1 drivers
|
|
v0x8d2cfce60_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1cb40; 1 drivers
|
|
v0x8d2cfcf00_0 .net *"_ivl_7", 0 0, L_0x8d321f020; 1 drivers
|
|
v0x8d2cfcfa0_0 .net *"_ivl_9", 7 0, L_0x8d2d1cc80; 1 drivers
|
|
L_0x8d2854eb0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfd040_0 .net/s "acc_in", 39 0, L_0x8d2854eb0; 1 drivers
|
|
v0x8d2cfd0e0_0 .net/s "acc_out", 39 0, L_0x8d3197840; alias, 1 drivers
|
|
v0x8d2cfd180_0 .net/s "product", 31 0, L_0x8d2d1cbe0; 1 drivers
|
|
v0x8d2cfd220_0 .net/s "product_ext", 39 0, L_0x8d31977a0; 1 drivers
|
|
v0x8d2cfd2c0_0 .net/s "w", 15 0, L_0x8d321f160; 1 drivers
|
|
v0x8d2cfd360_0 .net/s "x", 15 0, L_0x8d321f0c0; 1 drivers
|
|
L_0x8d2d1caa0 .extend/s 32, L_0x8d321f0c0;
|
|
L_0x8d2d1cb40 .extend/s 32, L_0x8d321f160;
|
|
L_0x8d2d1cbe0 .arith/mult 32, L_0x8d2d1caa0, L_0x8d2d1cb40;
|
|
L_0x8d321f020 .part L_0x8d2d1cbe0, 31, 1;
|
|
L_0x8d2d1cc80 .repeat 8, 8, L_0x8d321f020;
|
|
L_0x8d31977a0 .concat [ 32 8 0 0], L_0x8d2d1cbe0, L_0x8d2d1cc80;
|
|
L_0x8d3197840 .arith/sum 40, L_0x8d2854eb0, L_0x8d31977a0;
|
|
S_0x8d31fee80 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d440 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d480 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d4c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfd400_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1cd20; 1 drivers
|
|
v0x8d2cfd4a0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1cdc0; 1 drivers
|
|
v0x8d2cfd540_0 .net *"_ivl_7", 0 0, L_0x8d321f200; 1 drivers
|
|
v0x8d2cfd5e0_0 .net *"_ivl_9", 7 0, L_0x8d2d1cf00; 1 drivers
|
|
L_0x8d2854ef8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfd680_0 .net/s "acc_in", 39 0, L_0x8d2854ef8; 1 drivers
|
|
v0x8d2cfd720_0 .net/s "acc_out", 39 0, L_0x8d3197980; alias, 1 drivers
|
|
v0x8d2cfd7c0_0 .net/s "product", 31 0, L_0x8d2d1ce60; 1 drivers
|
|
v0x8d2cfd860_0 .net/s "product_ext", 39 0, L_0x8d31978e0; 1 drivers
|
|
v0x8d2cfd900_0 .net/s "w", 15 0, L_0x8d321f340; 1 drivers
|
|
v0x8d2cfd9a0_0 .net/s "x", 15 0, L_0x8d321f2a0; 1 drivers
|
|
L_0x8d2d1cd20 .extend/s 32, L_0x8d321f2a0;
|
|
L_0x8d2d1cdc0 .extend/s 32, L_0x8d321f340;
|
|
L_0x8d2d1ce60 .arith/mult 32, L_0x8d2d1cd20, L_0x8d2d1cdc0;
|
|
L_0x8d321f200 .part L_0x8d2d1ce60, 31, 1;
|
|
L_0x8d2d1cf00 .repeat 8, 8, L_0x8d321f200;
|
|
L_0x8d31978e0 .concat [ 32 8 0 0], L_0x8d2d1ce60, L_0x8d2d1cf00;
|
|
L_0x8d3197980 .arith/sum 40, L_0x8d2854ef8, L_0x8d31978e0;
|
|
S_0x8d31ff000 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d500 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d540 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d580 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfda40_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1cfa0; 1 drivers
|
|
v0x8d2cfdae0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1d040; 1 drivers
|
|
v0x8d2cfdb80_0 .net *"_ivl_7", 0 0, L_0x8d321f3e0; 1 drivers
|
|
v0x8d2cfdc20_0 .net *"_ivl_9", 7 0, L_0x8d2d1d180; 1 drivers
|
|
L_0x8d2854f40 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfdcc0_0 .net/s "acc_in", 39 0, L_0x8d2854f40; 1 drivers
|
|
v0x8d2cfdd60_0 .net/s "acc_out", 39 0, L_0x8d3197ac0; alias, 1 drivers
|
|
v0x8d2cfde00_0 .net/s "product", 31 0, L_0x8d2d1d0e0; 1 drivers
|
|
v0x8d2cfdea0_0 .net/s "product_ext", 39 0, L_0x8d3197a20; 1 drivers
|
|
v0x8d2cfdf40_0 .net/s "w", 15 0, L_0x8d321f520; 1 drivers
|
|
v0x8d2cfdfe0_0 .net/s "x", 15 0, L_0x8d321f480; 1 drivers
|
|
L_0x8d2d1cfa0 .extend/s 32, L_0x8d321f480;
|
|
L_0x8d2d1d040 .extend/s 32, L_0x8d321f520;
|
|
L_0x8d2d1d0e0 .arith/mult 32, L_0x8d2d1cfa0, L_0x8d2d1d040;
|
|
L_0x8d321f3e0 .part L_0x8d2d1d0e0, 31, 1;
|
|
L_0x8d2d1d180 .repeat 8, 8, L_0x8d321f3e0;
|
|
L_0x8d3197a20 .concat [ 32 8 0 0], L_0x8d2d1d0e0, L_0x8d2d1d180;
|
|
L_0x8d3197ac0 .arith/sum 40, L_0x8d2854f40, L_0x8d3197a20;
|
|
S_0x8d31ff180 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d5c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d600 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d640 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfe080_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1d220; 1 drivers
|
|
v0x8d2cfe120_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1d2c0; 1 drivers
|
|
v0x8d2cfe1c0_0 .net *"_ivl_7", 0 0, L_0x8d321f5c0; 1 drivers
|
|
v0x8d2cfe260_0 .net *"_ivl_9", 7 0, L_0x8d2d1d400; 1 drivers
|
|
L_0x8d2854f88 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfe300_0 .net/s "acc_in", 39 0, L_0x8d2854f88; 1 drivers
|
|
v0x8d2cfe3a0_0 .net/s "acc_out", 39 0, L_0x8d3197c00; alias, 1 drivers
|
|
v0x8d2cfe440_0 .net/s "product", 31 0, L_0x8d2d1d360; 1 drivers
|
|
v0x8d2cfe4e0_0 .net/s "product_ext", 39 0, L_0x8d3197b60; 1 drivers
|
|
v0x8d2cfe580_0 .net/s "w", 15 0, L_0x8d321f700; 1 drivers
|
|
v0x8d2cfe620_0 .net/s "x", 15 0, L_0x8d321f660; 1 drivers
|
|
L_0x8d2d1d220 .extend/s 32, L_0x8d321f660;
|
|
L_0x8d2d1d2c0 .extend/s 32, L_0x8d321f700;
|
|
L_0x8d2d1d360 .arith/mult 32, L_0x8d2d1d220, L_0x8d2d1d2c0;
|
|
L_0x8d321f5c0 .part L_0x8d2d1d360, 31, 1;
|
|
L_0x8d2d1d400 .repeat 8, 8, L_0x8d321f5c0;
|
|
L_0x8d3197b60 .concat [ 32 8 0 0], L_0x8d2d1d360, L_0x8d2d1d400;
|
|
L_0x8d3197c00 .arith/sum 40, L_0x8d2854f88, L_0x8d3197b60;
|
|
S_0x8d31ff300 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d680 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d6c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d700 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfe6c0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1d4a0; 1 drivers
|
|
v0x8d2cfe760_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1d540; 1 drivers
|
|
v0x8d2cfe800_0 .net *"_ivl_7", 0 0, L_0x8d321f7a0; 1 drivers
|
|
v0x8d2cfe8a0_0 .net *"_ivl_9", 7 0, L_0x8d2d1d680; 1 drivers
|
|
L_0x8d2854fd0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfe940_0 .net/s "acc_in", 39 0, L_0x8d2854fd0; 1 drivers
|
|
v0x8d2cfe9e0_0 .net/s "acc_out", 39 0, L_0x8d3197d40; alias, 1 drivers
|
|
v0x8d2cfea80_0 .net/s "product", 31 0, L_0x8d2d1d5e0; 1 drivers
|
|
v0x8d2cfeb20_0 .net/s "product_ext", 39 0, L_0x8d3197ca0; 1 drivers
|
|
v0x8d2cfebc0_0 .net/s "w", 15 0, L_0x8d321f8e0; 1 drivers
|
|
v0x8d2cfec60_0 .net/s "x", 15 0, L_0x8d321f840; 1 drivers
|
|
L_0x8d2d1d4a0 .extend/s 32, L_0x8d321f840;
|
|
L_0x8d2d1d540 .extend/s 32, L_0x8d321f8e0;
|
|
L_0x8d2d1d5e0 .arith/mult 32, L_0x8d2d1d4a0, L_0x8d2d1d540;
|
|
L_0x8d321f7a0 .part L_0x8d2d1d5e0, 31, 1;
|
|
L_0x8d2d1d680 .repeat 8, 8, L_0x8d321f7a0;
|
|
L_0x8d3197ca0 .concat [ 32 8 0 0], L_0x8d2d1d5e0, L_0x8d2d1d680;
|
|
L_0x8d3197d40 .arith/sum 40, L_0x8d2854fd0, L_0x8d3197ca0;
|
|
S_0x8d31ff480 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d740 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d780 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d7c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cfed00_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1d720; 1 drivers
|
|
v0x8d2cfeda0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1d7c0; 1 drivers
|
|
v0x8d2cfee40_0 .net *"_ivl_7", 0 0, L_0x8d321f980; 1 drivers
|
|
v0x8d2cfeee0_0 .net *"_ivl_9", 7 0, L_0x8d2d1d900; 1 drivers
|
|
L_0x8d2855018 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cfef80_0 .net/s "acc_in", 39 0, L_0x8d2855018; 1 drivers
|
|
v0x8d2cff020_0 .net/s "acc_out", 39 0, L_0x8d3197e80; alias, 1 drivers
|
|
v0x8d2cff0c0_0 .net/s "product", 31 0, L_0x8d2d1d860; 1 drivers
|
|
v0x8d2cff160_0 .net/s "product_ext", 39 0, L_0x8d3197de0; 1 drivers
|
|
v0x8d2cff200_0 .net/s "w", 15 0, L_0x8d321fac0; 1 drivers
|
|
v0x8d2cff2a0_0 .net/s "x", 15 0, L_0x8d321fa20; 1 drivers
|
|
L_0x8d2d1d720 .extend/s 32, L_0x8d321fa20;
|
|
L_0x8d2d1d7c0 .extend/s 32, L_0x8d321fac0;
|
|
L_0x8d2d1d860 .arith/mult 32, L_0x8d2d1d720, L_0x8d2d1d7c0;
|
|
L_0x8d321f980 .part L_0x8d2d1d860, 31, 1;
|
|
L_0x8d2d1d900 .repeat 8, 8, L_0x8d321f980;
|
|
L_0x8d3197de0 .concat [ 32 8 0 0], L_0x8d2d1d860, L_0x8d2d1d900;
|
|
L_0x8d3197e80 .arith/sum 40, L_0x8d2855018, L_0x8d3197de0;
|
|
S_0x8d31ff600 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d31fea00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d800 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d840 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d880 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2cff340_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1d9a0; 1 drivers
|
|
v0x8d2cff3e0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1da40; 1 drivers
|
|
v0x8d2cff480_0 .net *"_ivl_7", 0 0, L_0x8d321fb60; 1 drivers
|
|
v0x8d2cff520_0 .net *"_ivl_9", 7 0, L_0x8d2d1db80; 1 drivers
|
|
L_0x8d2855060 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2cff5c0_0 .net/s "acc_in", 39 0, L_0x8d2855060; 1 drivers
|
|
v0x8d2cff660_0 .net/s "acc_out", 39 0, L_0x8d3228000; alias, 1 drivers
|
|
v0x8d2cff700_0 .net/s "product", 31 0, L_0x8d2d1dae0; 1 drivers
|
|
v0x8d2cff7a0_0 .net/s "product_ext", 39 0, L_0x8d3197f20; 1 drivers
|
|
v0x8d2cff840_0 .net/s "w", 15 0, L_0x8d321fca0; 1 drivers
|
|
v0x8d2cff8e0_0 .net/s "x", 15 0, L_0x8d321fc00; 1 drivers
|
|
L_0x8d2d1d9a0 .extend/s 32, L_0x8d321fc00;
|
|
L_0x8d2d1da40 .extend/s 32, L_0x8d321fca0;
|
|
L_0x8d2d1dae0 .arith/mult 32, L_0x8d2d1d9a0, L_0x8d2d1da40;
|
|
L_0x8d321fb60 .part L_0x8d2d1dae0, 31, 1;
|
|
L_0x8d2d1db80 .repeat 8, 8, L_0x8d321fb60;
|
|
L_0x8d3197f20 .concat [ 32 8 0 0], L_0x8d2d1dae0, L_0x8d2d1db80;
|
|
L_0x8d3228000 .arith/sum 40, L_0x8d2855060, L_0x8d3197f20;
|
|
S_0x8d31ff780 .scope generate, "GEN_NEURON[4]" "GEN_NEURON[4]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b1c0 .param/l "n" 1 4 35, +C4<0100>;
|
|
S_0x8d31ff900 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d31ff780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e66e30 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e66e70 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e66eb0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e66ef0 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e66f30 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e66f70 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e66fb0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c310 .functor BUFZ 16, L_0x8d322d360, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2d05a40_0 .net *"_ivl_0", 31 0, L_0x8d3228780; 1 drivers
|
|
v0x8d2d05ae0_0 .net *"_ivl_11", 31 0, L_0x8d2d1de00; 1 drivers
|
|
v0x8d2d05b80_0 .net *"_ivl_14", 31 0, L_0x8d3228820; 1 drivers
|
|
L_0x8d28551c8 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d05c20_0 .net *"_ivl_17", 28 0, L_0x8d28551c8; 1 drivers
|
|
L_0x8d2855210 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d05cc0_0 .net/2u *"_ivl_18", 31 0, L_0x8d2855210; 1 drivers
|
|
v0x8d2d05d60_0 .net *"_ivl_21", 31 0, L_0x8d2d1dea0; 1 drivers
|
|
L_0x8d2855258 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d05e00_0 .net/2u *"_ivl_22", 31 0, L_0x8d2855258; 1 drivers
|
|
v0x8d2d05ea0_0 .net *"_ivl_25", 31 0, L_0x8d2d1df40; 1 drivers
|
|
L_0x8d28550f0 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d05f40_0 .net *"_ivl_3", 28 0, L_0x8d28550f0; 1 drivers
|
|
v0x8d2d05fe0_0 .net *"_ivl_31", 0 0, L_0x8d322d0e0; 1 drivers
|
|
v0x8d2d06080_0 .net *"_ivl_33", 23 0, L_0x8d2d1f3e0; 1 drivers
|
|
v0x8d2d06120_0 .net *"_ivl_36", 39 0, L_0x8d3229860; 1 drivers
|
|
v0x8d2d061c0_0 .net *"_ivl_38", 31 0, L_0x8d322d180; 1 drivers
|
|
L_0x8d2855138 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d06260_0 .net/2u *"_ivl_4", 31 0, L_0x8d2855138; 1 drivers
|
|
L_0x8d28554e0 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d06300_0 .net *"_ivl_40", 7 0, L_0x8d28554e0; 1 drivers
|
|
v0x8d2d063a0_0 .net *"_ivl_46", 31 0, L_0x8d322d220; 1 drivers
|
|
v0x8d2d06440_0 .net *"_ivl_7", 31 0, L_0x8d2d1dd60; 1 drivers
|
|
L_0x8d2855180 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d064e0_0 .net/2u *"_ivl_8", 31 0, L_0x8d2855180; 1 drivers
|
|
v0x8d2d06580_0 .var/s "acc", 39 0;
|
|
v0x8d2d06620_0 .net/s "acc_next", 39 0, L_0x8d3229720; 1 drivers
|
|
v0x8d2d066c0_0 .net/s "bias", 15 0, L_0x8d322d360; 1 drivers
|
|
v0x8d2d06760_0 .net/s "bias_ext", 39 0, L_0x8d32297c0; 1 drivers
|
|
v0x8d2d06800_0 .net/s "bias_ext_small", 15 0, L_0x8d307c310; 1 drivers
|
|
v0x8d2d068a0_0 .var "busy", 0 0;
|
|
v0x8d2d06940_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2d069e0_0 .var "done", 0 0;
|
|
v0x8d2d06a80_0 .net/s "final_acc", 39 0, L_0x8d3229900; 1 drivers
|
|
v0x8d2d06b20_0 .net/s "final_value", 39 0, L_0x8d2d1f480; 1 drivers
|
|
v0x8d2d06bc0_0 .var "group_index", 2 0;
|
|
v0x8d2d06c60_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2d06d00_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2d06da0_0 .net/s "w_bus", 1023 0, L_0x8d322d2c0; 1 drivers
|
|
v0x8d2d06e40_0 .net/s "w_group", 127 0, L_0x8d322c140; 1 drivers
|
|
v0x8d2d06ee0_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2d06f80_0 .net/s "x_group", 127 0, L_0x8d322c0a0; 1 drivers
|
|
v0x8d2d07020_0 .var/s "y", 15 0;
|
|
L_0x8d3228780 .concat [ 3 29 0 0], v0x8d2d06bc0_0, L_0x8d28550f0;
|
|
L_0x8d2d1dd60 .arith/mult 32, L_0x8d3228780, L_0x8d2855138;
|
|
L_0x8d2d1de00 .arith/mult 32, L_0x8d2d1dd60, L_0x8d2855180;
|
|
L_0x8d322c0a0 .part/v v0x8d2d17ca0_0, L_0x8d2d1de00, 128;
|
|
L_0x8d3228820 .concat [ 3 29 0 0], v0x8d2d06bc0_0, L_0x8d28551c8;
|
|
L_0x8d2d1dea0 .arith/mult 32, L_0x8d3228820, L_0x8d2855210;
|
|
L_0x8d2d1df40 .arith/mult 32, L_0x8d2d1dea0, L_0x8d2855258;
|
|
L_0x8d322c140 .part/v L_0x8d322d2c0, L_0x8d2d1df40, 128;
|
|
L_0x8d322d0e0 .part L_0x8d307c310, 15, 1;
|
|
L_0x8d2d1f3e0 .repeat 24, 24, L_0x8d322d0e0;
|
|
L_0x8d32297c0 .concat [ 16 24 0 0], L_0x8d307c310, L_0x8d2d1f3e0;
|
|
L_0x8d322d180 .part L_0x8d32297c0, 0, 32;
|
|
L_0x8d3229860 .concat [ 8 32 0 0], L_0x8d28554e0, L_0x8d322d180;
|
|
L_0x8d3229900 .arith/sum 40, L_0x8d3229720, L_0x8d3229860;
|
|
L_0x8d322d220 .part L_0x8d3229900, 8, 32;
|
|
L_0x8d2d1f480 .extend/s 40, L_0x8d322d220;
|
|
S_0x8d31ffa80 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d31ff900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0800 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a0840 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2d04e60_0 .net/s "acc_in", 39 0, v0x8d2d06580_0; 1 drivers
|
|
v0x8d2d04f00_0 .net/s "acc_out", 39 0, L_0x8d3229720; alias, 1 drivers
|
|
v0x8d2d04fa0_0 .net/s "m0", 39 0, L_0x8d3228960; 1 drivers
|
|
v0x8d2d05040_0 .net/s "m1", 39 0, L_0x8d3228aa0; 1 drivers
|
|
v0x8d2d050e0_0 .net/s "m2", 39 0, L_0x8d3228be0; 1 drivers
|
|
v0x8d2d05180_0 .net/s "m3", 39 0, L_0x8d3228d20; 1 drivers
|
|
v0x8d2d05220_0 .net/s "m4", 39 0, L_0x8d3228e60; 1 drivers
|
|
v0x8d2d052c0_0 .net/s "m5", 39 0, L_0x8d3228fa0; 1 drivers
|
|
v0x8d2d05360_0 .net/s "m6", 39 0, L_0x8d32290e0; 1 drivers
|
|
v0x8d2d05400_0 .net/s "m7", 39 0, L_0x8d3229220; 1 drivers
|
|
v0x8d2d054a0_0 .net/s "s0", 39 0, L_0x8d32292c0; 1 drivers
|
|
v0x8d2d05540_0 .net/s "s1", 39 0, L_0x8d3229360; 1 drivers
|
|
v0x8d2d055e0_0 .net/s "s2", 39 0, L_0x8d3229400; 1 drivers
|
|
v0x8d2d05680_0 .net/s "s3", 39 0, L_0x8d32294a0; 1 drivers
|
|
v0x8d2d05720_0 .net/s "s4", 39 0, L_0x8d3229540; 1 drivers
|
|
v0x8d2d057c0_0 .net/s "s5", 39 0, L_0x8d32295e0; 1 drivers
|
|
v0x8d2d05860_0 .net/s "sum", 39 0, L_0x8d3229680; 1 drivers
|
|
v0x8d2d05900_0 .net/s "w_bus", 127 0, L_0x8d322c140; alias, 1 drivers
|
|
v0x8d2d059a0_0 .net/s "x_bus", 127 0, L_0x8d322c0a0; alias, 1 drivers
|
|
L_0x8d322c280 .part L_0x8d322c0a0, 0, 16;
|
|
L_0x8d322c320 .part L_0x8d322c140, 0, 16;
|
|
L_0x8d322c460 .part L_0x8d322c0a0, 16, 16;
|
|
L_0x8d322c500 .part L_0x8d322c140, 16, 16;
|
|
L_0x8d322c640 .part L_0x8d322c0a0, 32, 16;
|
|
L_0x8d322c6e0 .part L_0x8d322c140, 32, 16;
|
|
L_0x8d322c820 .part L_0x8d322c0a0, 48, 16;
|
|
L_0x8d322c8c0 .part L_0x8d322c140, 48, 16;
|
|
L_0x8d322ca00 .part L_0x8d322c0a0, 64, 16;
|
|
L_0x8d322caa0 .part L_0x8d322c140, 64, 16;
|
|
L_0x8d322cbe0 .part L_0x8d322c0a0, 80, 16;
|
|
L_0x8d322cc80 .part L_0x8d322c140, 80, 16;
|
|
L_0x8d322cdc0 .part L_0x8d322c0a0, 96, 16;
|
|
L_0x8d322ce60 .part L_0x8d322c140, 96, 16;
|
|
L_0x8d322cfa0 .part L_0x8d322c0a0, 112, 16;
|
|
L_0x8d322d040 .part L_0x8d322c140, 112, 16;
|
|
L_0x8d32292c0 .arith/sum 40, L_0x8d3228960, L_0x8d3228aa0;
|
|
L_0x8d3229360 .arith/sum 40, L_0x8d3228be0, L_0x8d3228d20;
|
|
L_0x8d3229400 .arith/sum 40, L_0x8d3228e60, L_0x8d3228fa0;
|
|
L_0x8d32294a0 .arith/sum 40, L_0x8d32290e0, L_0x8d3229220;
|
|
L_0x8d3229540 .arith/sum 40, L_0x8d32292c0, L_0x8d3229360;
|
|
L_0x8d32295e0 .arith/sum 40, L_0x8d3229400, L_0x8d32294a0;
|
|
L_0x8d3229680 .arith/sum 40, L_0x8d3229540, L_0x8d32295e0;
|
|
L_0x8d3229720 .arith/sum 40, v0x8d2d06580_0, L_0x8d3229680;
|
|
S_0x8d31ffc00 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d8c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d900 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306d940 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d01c20_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1dfe0; 1 drivers
|
|
v0x8d2d01cc0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1e080; 1 drivers
|
|
v0x8d2d01d60_0 .net *"_ivl_7", 0 0, L_0x8d322c1e0; 1 drivers
|
|
v0x8d2d01e00_0 .net *"_ivl_9", 7 0, L_0x8d2d1e1c0; 1 drivers
|
|
L_0x8d28552a0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d01ea0_0 .net/s "acc_in", 39 0, L_0x8d28552a0; 1 drivers
|
|
v0x8d2d01f40_0 .net/s "acc_out", 39 0, L_0x8d3228960; alias, 1 drivers
|
|
v0x8d2d01fe0_0 .net/s "product", 31 0, L_0x8d2d1e120; 1 drivers
|
|
v0x8d2d02080_0 .net/s "product_ext", 39 0, L_0x8d32288c0; 1 drivers
|
|
v0x8d2d02120_0 .net/s "w", 15 0, L_0x8d322c320; 1 drivers
|
|
v0x8d2d021c0_0 .net/s "x", 15 0, L_0x8d322c280; 1 drivers
|
|
L_0x8d2d1dfe0 .extend/s 32, L_0x8d322c280;
|
|
L_0x8d2d1e080 .extend/s 32, L_0x8d322c320;
|
|
L_0x8d2d1e120 .arith/mult 32, L_0x8d2d1dfe0, L_0x8d2d1e080;
|
|
L_0x8d322c1e0 .part L_0x8d2d1e120, 31, 1;
|
|
L_0x8d2d1e1c0 .repeat 8, 8, L_0x8d322c1e0;
|
|
L_0x8d32288c0 .concat [ 32 8 0 0], L_0x8d2d1e120, L_0x8d2d1e1c0;
|
|
L_0x8d3228960 .arith/sum 40, L_0x8d28552a0, L_0x8d32288c0;
|
|
S_0x8d31ffd80 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306d980 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306d9c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306da00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d02260_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1e260; 1 drivers
|
|
v0x8d2d02300_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1e300; 1 drivers
|
|
v0x8d2d023a0_0 .net *"_ivl_7", 0 0, L_0x8d322c3c0; 1 drivers
|
|
v0x8d2d02440_0 .net *"_ivl_9", 7 0, L_0x8d2d1e440; 1 drivers
|
|
L_0x8d28552e8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d024e0_0 .net/s "acc_in", 39 0, L_0x8d28552e8; 1 drivers
|
|
v0x8d2d02580_0 .net/s "acc_out", 39 0, L_0x8d3228aa0; alias, 1 drivers
|
|
v0x8d2d02620_0 .net/s "product", 31 0, L_0x8d2d1e3a0; 1 drivers
|
|
v0x8d2d026c0_0 .net/s "product_ext", 39 0, L_0x8d3228a00; 1 drivers
|
|
v0x8d2d02760_0 .net/s "w", 15 0, L_0x8d322c500; 1 drivers
|
|
v0x8d2d02800_0 .net/s "x", 15 0, L_0x8d322c460; 1 drivers
|
|
L_0x8d2d1e260 .extend/s 32, L_0x8d322c460;
|
|
L_0x8d2d1e300 .extend/s 32, L_0x8d322c500;
|
|
L_0x8d2d1e3a0 .arith/mult 32, L_0x8d2d1e260, L_0x8d2d1e300;
|
|
L_0x8d322c3c0 .part L_0x8d2d1e3a0, 31, 1;
|
|
L_0x8d2d1e440 .repeat 8, 8, L_0x8d322c3c0;
|
|
L_0x8d3228a00 .concat [ 32 8 0 0], L_0x8d2d1e3a0, L_0x8d2d1e440;
|
|
L_0x8d3228aa0 .arith/sum 40, L_0x8d28552e8, L_0x8d3228a00;
|
|
S_0x8d3208000 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306da40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306da80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306dac0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d028a0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1e4e0; 1 drivers
|
|
v0x8d2d02940_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1e580; 1 drivers
|
|
v0x8d2d029e0_0 .net *"_ivl_7", 0 0, L_0x8d322c5a0; 1 drivers
|
|
v0x8d2d02a80_0 .net *"_ivl_9", 7 0, L_0x8d2d1e6c0; 1 drivers
|
|
L_0x8d2855330 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d02b20_0 .net/s "acc_in", 39 0, L_0x8d2855330; 1 drivers
|
|
v0x8d2d02bc0_0 .net/s "acc_out", 39 0, L_0x8d3228be0; alias, 1 drivers
|
|
v0x8d2d02c60_0 .net/s "product", 31 0, L_0x8d2d1e620; 1 drivers
|
|
v0x8d2d02d00_0 .net/s "product_ext", 39 0, L_0x8d3228b40; 1 drivers
|
|
v0x8d2d02da0_0 .net/s "w", 15 0, L_0x8d322c6e0; 1 drivers
|
|
v0x8d2d02e40_0 .net/s "x", 15 0, L_0x8d322c640; 1 drivers
|
|
L_0x8d2d1e4e0 .extend/s 32, L_0x8d322c640;
|
|
L_0x8d2d1e580 .extend/s 32, L_0x8d322c6e0;
|
|
L_0x8d2d1e620 .arith/mult 32, L_0x8d2d1e4e0, L_0x8d2d1e580;
|
|
L_0x8d322c5a0 .part L_0x8d2d1e620, 31, 1;
|
|
L_0x8d2d1e6c0 .repeat 8, 8, L_0x8d322c5a0;
|
|
L_0x8d3228b40 .concat [ 32 8 0 0], L_0x8d2d1e620, L_0x8d2d1e6c0;
|
|
L_0x8d3228be0 .arith/sum 40, L_0x8d2855330, L_0x8d3228b40;
|
|
S_0x8d3208180 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306db00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306db40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306db80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d02ee0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1e760; 1 drivers
|
|
v0x8d2d02f80_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1e800; 1 drivers
|
|
v0x8d2d03020_0 .net *"_ivl_7", 0 0, L_0x8d322c780; 1 drivers
|
|
v0x8d2d030c0_0 .net *"_ivl_9", 7 0, L_0x8d2d1e940; 1 drivers
|
|
L_0x8d2855378 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d03160_0 .net/s "acc_in", 39 0, L_0x8d2855378; 1 drivers
|
|
v0x8d2d03200_0 .net/s "acc_out", 39 0, L_0x8d3228d20; alias, 1 drivers
|
|
v0x8d2d032a0_0 .net/s "product", 31 0, L_0x8d2d1e8a0; 1 drivers
|
|
v0x8d2d03340_0 .net/s "product_ext", 39 0, L_0x8d3228c80; 1 drivers
|
|
v0x8d2d033e0_0 .net/s "w", 15 0, L_0x8d322c8c0; 1 drivers
|
|
v0x8d2d03480_0 .net/s "x", 15 0, L_0x8d322c820; 1 drivers
|
|
L_0x8d2d1e760 .extend/s 32, L_0x8d322c820;
|
|
L_0x8d2d1e800 .extend/s 32, L_0x8d322c8c0;
|
|
L_0x8d2d1e8a0 .arith/mult 32, L_0x8d2d1e760, L_0x8d2d1e800;
|
|
L_0x8d322c780 .part L_0x8d2d1e8a0, 31, 1;
|
|
L_0x8d2d1e940 .repeat 8, 8, L_0x8d322c780;
|
|
L_0x8d3228c80 .concat [ 32 8 0 0], L_0x8d2d1e8a0, L_0x8d2d1e940;
|
|
L_0x8d3228d20 .arith/sum 40, L_0x8d2855378, L_0x8d3228c80;
|
|
S_0x8d3208300 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306dbc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306dc00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306dc40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d03520_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1e9e0; 1 drivers
|
|
v0x8d2d035c0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1ea80; 1 drivers
|
|
v0x8d2d03660_0 .net *"_ivl_7", 0 0, L_0x8d322c960; 1 drivers
|
|
v0x8d2d03700_0 .net *"_ivl_9", 7 0, L_0x8d2d1ebc0; 1 drivers
|
|
L_0x8d28553c0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d037a0_0 .net/s "acc_in", 39 0, L_0x8d28553c0; 1 drivers
|
|
v0x8d2d03840_0 .net/s "acc_out", 39 0, L_0x8d3228e60; alias, 1 drivers
|
|
v0x8d2d038e0_0 .net/s "product", 31 0, L_0x8d2d1eb20; 1 drivers
|
|
v0x8d2d03980_0 .net/s "product_ext", 39 0, L_0x8d3228dc0; 1 drivers
|
|
v0x8d2d03a20_0 .net/s "w", 15 0, L_0x8d322caa0; 1 drivers
|
|
v0x8d2d03ac0_0 .net/s "x", 15 0, L_0x8d322ca00; 1 drivers
|
|
L_0x8d2d1e9e0 .extend/s 32, L_0x8d322ca00;
|
|
L_0x8d2d1ea80 .extend/s 32, L_0x8d322caa0;
|
|
L_0x8d2d1eb20 .arith/mult 32, L_0x8d2d1e9e0, L_0x8d2d1ea80;
|
|
L_0x8d322c960 .part L_0x8d2d1eb20, 31, 1;
|
|
L_0x8d2d1ebc0 .repeat 8, 8, L_0x8d322c960;
|
|
L_0x8d3228dc0 .concat [ 32 8 0 0], L_0x8d2d1eb20, L_0x8d2d1ebc0;
|
|
L_0x8d3228e60 .arith/sum 40, L_0x8d28553c0, L_0x8d3228dc0;
|
|
S_0x8d3208480 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306dc80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306dcc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306dd00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d03b60_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1ec60; 1 drivers
|
|
v0x8d2d03c00_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1ed00; 1 drivers
|
|
v0x8d2d03ca0_0 .net *"_ivl_7", 0 0, L_0x8d322cb40; 1 drivers
|
|
v0x8d2d03d40_0 .net *"_ivl_9", 7 0, L_0x8d2d1ee40; 1 drivers
|
|
L_0x8d2855408 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d03de0_0 .net/s "acc_in", 39 0, L_0x8d2855408; 1 drivers
|
|
v0x8d2d03e80_0 .net/s "acc_out", 39 0, L_0x8d3228fa0; alias, 1 drivers
|
|
v0x8d2d03f20_0 .net/s "product", 31 0, L_0x8d2d1eda0; 1 drivers
|
|
v0x8d2d04000_0 .net/s "product_ext", 39 0, L_0x8d3228f00; 1 drivers
|
|
v0x8d2d040a0_0 .net/s "w", 15 0, L_0x8d322cc80; 1 drivers
|
|
v0x8d2d04140_0 .net/s "x", 15 0, L_0x8d322cbe0; 1 drivers
|
|
L_0x8d2d1ec60 .extend/s 32, L_0x8d322cbe0;
|
|
L_0x8d2d1ed00 .extend/s 32, L_0x8d322cc80;
|
|
L_0x8d2d1eda0 .arith/mult 32, L_0x8d2d1ec60, L_0x8d2d1ed00;
|
|
L_0x8d322cb40 .part L_0x8d2d1eda0, 31, 1;
|
|
L_0x8d2d1ee40 .repeat 8, 8, L_0x8d322cb40;
|
|
L_0x8d3228f00 .concat [ 32 8 0 0], L_0x8d2d1eda0, L_0x8d2d1ee40;
|
|
L_0x8d3228fa0 .arith/sum 40, L_0x8d2855408, L_0x8d3228f00;
|
|
S_0x8d3208600 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306dd40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306dd80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ddc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d041e0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1eee0; 1 drivers
|
|
v0x8d2d04280_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1ef80; 1 drivers
|
|
v0x8d2d04320_0 .net *"_ivl_7", 0 0, L_0x8d322cd20; 1 drivers
|
|
v0x8d2d043c0_0 .net *"_ivl_9", 7 0, L_0x8d2d1f0c0; 1 drivers
|
|
L_0x8d2855450 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d04460_0 .net/s "acc_in", 39 0, L_0x8d2855450; 1 drivers
|
|
v0x8d2d04500_0 .net/s "acc_out", 39 0, L_0x8d32290e0; alias, 1 drivers
|
|
v0x8d2d045a0_0 .net/s "product", 31 0, L_0x8d2d1f020; 1 drivers
|
|
v0x8d2d04640_0 .net/s "product_ext", 39 0, L_0x8d3229040; 1 drivers
|
|
v0x8d2d046e0_0 .net/s "w", 15 0, L_0x8d322ce60; 1 drivers
|
|
v0x8d2d04780_0 .net/s "x", 15 0, L_0x8d322cdc0; 1 drivers
|
|
L_0x8d2d1eee0 .extend/s 32, L_0x8d322cdc0;
|
|
L_0x8d2d1ef80 .extend/s 32, L_0x8d322ce60;
|
|
L_0x8d2d1f020 .arith/mult 32, L_0x8d2d1eee0, L_0x8d2d1ef80;
|
|
L_0x8d322cd20 .part L_0x8d2d1f020, 31, 1;
|
|
L_0x8d2d1f0c0 .repeat 8, 8, L_0x8d322cd20;
|
|
L_0x8d3229040 .concat [ 32 8 0 0], L_0x8d2d1f020, L_0x8d2d1f0c0;
|
|
L_0x8d32290e0 .arith/sum 40, L_0x8d2855450, L_0x8d3229040;
|
|
S_0x8d3208780 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d31ffa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306de00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306de40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306de80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d04820_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1f160; 1 drivers
|
|
v0x8d2d048c0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1f200; 1 drivers
|
|
v0x8d2d04960_0 .net *"_ivl_7", 0 0, L_0x8d322cf00; 1 drivers
|
|
v0x8d2d04a00_0 .net *"_ivl_9", 7 0, L_0x8d2d1f340; 1 drivers
|
|
L_0x8d2855498 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d04aa0_0 .net/s "acc_in", 39 0, L_0x8d2855498; 1 drivers
|
|
v0x8d2d04b40_0 .net/s "acc_out", 39 0, L_0x8d3229220; alias, 1 drivers
|
|
v0x8d2d04be0_0 .net/s "product", 31 0, L_0x8d2d1f2a0; 1 drivers
|
|
v0x8d2d04c80_0 .net/s "product_ext", 39 0, L_0x8d3229180; 1 drivers
|
|
v0x8d2d04d20_0 .net/s "w", 15 0, L_0x8d322d040; 1 drivers
|
|
v0x8d2d04dc0_0 .net/s "x", 15 0, L_0x8d322cfa0; 1 drivers
|
|
L_0x8d2d1f160 .extend/s 32, L_0x8d322cfa0;
|
|
L_0x8d2d1f200 .extend/s 32, L_0x8d322d040;
|
|
L_0x8d2d1f2a0 .arith/mult 32, L_0x8d2d1f160, L_0x8d2d1f200;
|
|
L_0x8d322cf00 .part L_0x8d2d1f2a0, 31, 1;
|
|
L_0x8d2d1f340 .repeat 8, 8, L_0x8d322cf00;
|
|
L_0x8d3229180 .concat [ 32 8 0 0], L_0x8d2d1f2a0, L_0x8d2d1f340;
|
|
L_0x8d3229220 .arith/sum 40, L_0x8d2855498, L_0x8d3229180;
|
|
S_0x8d3208900 .scope generate, "GEN_NEURON[5]" "GEN_NEURON[5]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b200 .param/l "n" 1 4 35, +C4<0101>;
|
|
S_0x8d3208a80 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d3208900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e671f0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e67230 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e67270 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e672b0 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e672f0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e67330 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e67370 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c380 .functor BUFZ 16, L_0x8d322e6c0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2d0aee0_0 .net *"_ivl_0", 31 0, L_0x8d32299a0; 1 drivers
|
|
v0x8d2d0af80_0 .net *"_ivl_11", 31 0, L_0x8d2d1f5c0; 1 drivers
|
|
v0x8d2d0b020_0 .net *"_ivl_14", 31 0, L_0x8d3229a40; 1 drivers
|
|
L_0x8d2855600 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b0c0_0 .net *"_ivl_17", 28 0, L_0x8d2855600; 1 drivers
|
|
L_0x8d2855648 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b160_0 .net/2u *"_ivl_18", 31 0, L_0x8d2855648; 1 drivers
|
|
v0x8d2d0b200_0 .net *"_ivl_21", 31 0, L_0x8d2d1f660; 1 drivers
|
|
L_0x8d2855690 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b2a0_0 .net/2u *"_ivl_22", 31 0, L_0x8d2855690; 1 drivers
|
|
v0x8d2d0b340_0 .net *"_ivl_25", 31 0, L_0x8d2d1f700; 1 drivers
|
|
L_0x8d2855528 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b3e0_0 .net *"_ivl_3", 28 0, L_0x8d2855528; 1 drivers
|
|
v0x8d2d0b480_0 .net *"_ivl_31", 0 0, L_0x8d322e440; 1 drivers
|
|
v0x8d2d0b520_0 .net *"_ivl_33", 23 0, L_0x8d2d20be0; 1 drivers
|
|
v0x8d2d0b5c0_0 .net *"_ivl_36", 39 0, L_0x8d322aa80; 1 drivers
|
|
v0x8d2d0b660_0 .net *"_ivl_38", 31 0, L_0x8d322e4e0; 1 drivers
|
|
L_0x8d2855570 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b700_0 .net/2u *"_ivl_4", 31 0, L_0x8d2855570; 1 drivers
|
|
L_0x8d2855918 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b7a0_0 .net *"_ivl_40", 7 0, L_0x8d2855918; 1 drivers
|
|
v0x8d2d0b840_0 .net *"_ivl_46", 31 0, L_0x8d322e580; 1 drivers
|
|
v0x8d2d0b8e0_0 .net *"_ivl_7", 31 0, L_0x8d2d1f520; 1 drivers
|
|
L_0x8d28555b8 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0b980_0 .net/2u *"_ivl_8", 31 0, L_0x8d28555b8; 1 drivers
|
|
v0x8d2d0ba20_0 .var/s "acc", 39 0;
|
|
v0x8d2d0bac0_0 .net/s "acc_next", 39 0, L_0x8d322a940; 1 drivers
|
|
v0x8d2d0bb60_0 .net/s "bias", 15 0, L_0x8d322e6c0; 1 drivers
|
|
v0x8d2d0bc00_0 .net/s "bias_ext", 39 0, L_0x8d322a9e0; 1 drivers
|
|
v0x8d2d0bca0_0 .net/s "bias_ext_small", 15 0, L_0x8d307c380; 1 drivers
|
|
v0x8d2d0bd40_0 .var "busy", 0 0;
|
|
v0x8d2d0bde0_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2d0be80_0 .var "done", 0 0;
|
|
v0x8d2d0bf20_0 .net/s "final_acc", 39 0, L_0x8d322ab20; 1 drivers
|
|
v0x8d2d0c000_0 .net/s "final_value", 39 0, L_0x8d2d20c80; 1 drivers
|
|
v0x8d2d0c0a0_0 .var "group_index", 2 0;
|
|
v0x8d2d0c140_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2d0c1e0_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2d0c280_0 .net/s "w_bus", 1023 0, L_0x8d322e620; 1 drivers
|
|
v0x8d2d0c320_0 .net/s "w_group", 127 0, L_0x8d322d4a0; 1 drivers
|
|
v0x8d2d0c3c0_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2d0c460_0 .net/s "x_group", 127 0, L_0x8d322d400; 1 drivers
|
|
v0x8d2d0c500_0 .var/s "y", 15 0;
|
|
L_0x8d32299a0 .concat [ 3 29 0 0], v0x8d2d0c0a0_0, L_0x8d2855528;
|
|
L_0x8d2d1f520 .arith/mult 32, L_0x8d32299a0, L_0x8d2855570;
|
|
L_0x8d2d1f5c0 .arith/mult 32, L_0x8d2d1f520, L_0x8d28555b8;
|
|
L_0x8d322d400 .part/v v0x8d2d17ca0_0, L_0x8d2d1f5c0, 128;
|
|
L_0x8d3229a40 .concat [ 3 29 0 0], v0x8d2d0c0a0_0, L_0x8d2855600;
|
|
L_0x8d2d1f660 .arith/mult 32, L_0x8d3229a40, L_0x8d2855648;
|
|
L_0x8d2d1f700 .arith/mult 32, L_0x8d2d1f660, L_0x8d2855690;
|
|
L_0x8d322d4a0 .part/v L_0x8d322e620, L_0x8d2d1f700, 128;
|
|
L_0x8d322e440 .part L_0x8d307c380, 15, 1;
|
|
L_0x8d2d20be0 .repeat 24, 24, L_0x8d322e440;
|
|
L_0x8d322a9e0 .concat [ 16 24 0 0], L_0x8d307c380, L_0x8d2d20be0;
|
|
L_0x8d322e4e0 .part L_0x8d322a9e0, 0, 32;
|
|
L_0x8d322aa80 .concat [ 8 32 0 0], L_0x8d2855918, L_0x8d322e4e0;
|
|
L_0x8d322ab20 .arith/sum 40, L_0x8d322a940, L_0x8d322aa80;
|
|
L_0x8d322e580 .part L_0x8d322ab20, 8, 32;
|
|
L_0x8d2d20c80 .extend/s 40, L_0x8d322e580;
|
|
S_0x8d3208c00 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d3208a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0880 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a08c0 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2d0a300_0 .net/s "acc_in", 39 0, v0x8d2d0ba20_0; 1 drivers
|
|
v0x8d2d0a3a0_0 .net/s "acc_out", 39 0, L_0x8d322a940; alias, 1 drivers
|
|
v0x8d2d0a440_0 .net/s "m0", 39 0, L_0x8d3229b80; 1 drivers
|
|
v0x8d2d0a4e0_0 .net/s "m1", 39 0, L_0x8d3229cc0; 1 drivers
|
|
v0x8d2d0a580_0 .net/s "m2", 39 0, L_0x8d3229e00; 1 drivers
|
|
v0x8d2d0a620_0 .net/s "m3", 39 0, L_0x8d3229f40; 1 drivers
|
|
v0x8d2d0a6c0_0 .net/s "m4", 39 0, L_0x8d322a080; 1 drivers
|
|
v0x8d2d0a760_0 .net/s "m5", 39 0, L_0x8d322a1c0; 1 drivers
|
|
v0x8d2d0a800_0 .net/s "m6", 39 0, L_0x8d322a300; 1 drivers
|
|
v0x8d2d0a8a0_0 .net/s "m7", 39 0, L_0x8d322a440; 1 drivers
|
|
v0x8d2d0a940_0 .net/s "s0", 39 0, L_0x8d322a4e0; 1 drivers
|
|
v0x8d2d0a9e0_0 .net/s "s1", 39 0, L_0x8d322a580; 1 drivers
|
|
v0x8d2d0aa80_0 .net/s "s2", 39 0, L_0x8d322a620; 1 drivers
|
|
v0x8d2d0ab20_0 .net/s "s3", 39 0, L_0x8d322a6c0; 1 drivers
|
|
v0x8d2d0abc0_0 .net/s "s4", 39 0, L_0x8d322a760; 1 drivers
|
|
v0x8d2d0ac60_0 .net/s "s5", 39 0, L_0x8d322a800; 1 drivers
|
|
v0x8d2d0ad00_0 .net/s "sum", 39 0, L_0x8d322a8a0; 1 drivers
|
|
v0x8d2d0ada0_0 .net/s "w_bus", 127 0, L_0x8d322d4a0; alias, 1 drivers
|
|
v0x8d2d0ae40_0 .net/s "x_bus", 127 0, L_0x8d322d400; alias, 1 drivers
|
|
L_0x8d322d5e0 .part L_0x8d322d400, 0, 16;
|
|
L_0x8d322d680 .part L_0x8d322d4a0, 0, 16;
|
|
L_0x8d322d7c0 .part L_0x8d322d400, 16, 16;
|
|
L_0x8d322d860 .part L_0x8d322d4a0, 16, 16;
|
|
L_0x8d322d9a0 .part L_0x8d322d400, 32, 16;
|
|
L_0x8d322da40 .part L_0x8d322d4a0, 32, 16;
|
|
L_0x8d322db80 .part L_0x8d322d400, 48, 16;
|
|
L_0x8d322dc20 .part L_0x8d322d4a0, 48, 16;
|
|
L_0x8d322dd60 .part L_0x8d322d400, 64, 16;
|
|
L_0x8d322de00 .part L_0x8d322d4a0, 64, 16;
|
|
L_0x8d322df40 .part L_0x8d322d400, 80, 16;
|
|
L_0x8d322dfe0 .part L_0x8d322d4a0, 80, 16;
|
|
L_0x8d322e120 .part L_0x8d322d400, 96, 16;
|
|
L_0x8d322e1c0 .part L_0x8d322d4a0, 96, 16;
|
|
L_0x8d322e300 .part L_0x8d322d400, 112, 16;
|
|
L_0x8d322e3a0 .part L_0x8d322d4a0, 112, 16;
|
|
L_0x8d322a4e0 .arith/sum 40, L_0x8d3229b80, L_0x8d3229cc0;
|
|
L_0x8d322a580 .arith/sum 40, L_0x8d3229e00, L_0x8d3229f40;
|
|
L_0x8d322a620 .arith/sum 40, L_0x8d322a080, L_0x8d322a1c0;
|
|
L_0x8d322a6c0 .arith/sum 40, L_0x8d322a300, L_0x8d322a440;
|
|
L_0x8d322a760 .arith/sum 40, L_0x8d322a4e0, L_0x8d322a580;
|
|
L_0x8d322a800 .arith/sum 40, L_0x8d322a620, L_0x8d322a6c0;
|
|
L_0x8d322a8a0 .arith/sum 40, L_0x8d322a760, L_0x8d322a800;
|
|
L_0x8d322a940 .arith/sum 40, v0x8d2d0ba20_0, L_0x8d322a8a0;
|
|
S_0x8d3208d80 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306dec0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306df00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306df40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d070c0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1f7a0; 1 drivers
|
|
v0x8d2d07160_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1f840; 1 drivers
|
|
v0x8d2d07200_0 .net *"_ivl_7", 0 0, L_0x8d322d540; 1 drivers
|
|
v0x8d2d072a0_0 .net *"_ivl_9", 7 0, L_0x8d2d1f980; 1 drivers
|
|
L_0x8d28556d8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d07340_0 .net/s "acc_in", 39 0, L_0x8d28556d8; 1 drivers
|
|
v0x8d2d073e0_0 .net/s "acc_out", 39 0, L_0x8d3229b80; alias, 1 drivers
|
|
v0x8d2d07480_0 .net/s "product", 31 0, L_0x8d2d1f8e0; 1 drivers
|
|
v0x8d2d07520_0 .net/s "product_ext", 39 0, L_0x8d3229ae0; 1 drivers
|
|
v0x8d2d075c0_0 .net/s "w", 15 0, L_0x8d322d680; 1 drivers
|
|
v0x8d2d07660_0 .net/s "x", 15 0, L_0x8d322d5e0; 1 drivers
|
|
L_0x8d2d1f7a0 .extend/s 32, L_0x8d322d5e0;
|
|
L_0x8d2d1f840 .extend/s 32, L_0x8d322d680;
|
|
L_0x8d2d1f8e0 .arith/mult 32, L_0x8d2d1f7a0, L_0x8d2d1f840;
|
|
L_0x8d322d540 .part L_0x8d2d1f8e0, 31, 1;
|
|
L_0x8d2d1f980 .repeat 8, 8, L_0x8d322d540;
|
|
L_0x8d3229ae0 .concat [ 32 8 0 0], L_0x8d2d1f8e0, L_0x8d2d1f980;
|
|
L_0x8d3229b80 .arith/sum 40, L_0x8d28556d8, L_0x8d3229ae0;
|
|
S_0x8d3208f00 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306df80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306dfc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e000 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d07700_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1fa20; 1 drivers
|
|
v0x8d2d077a0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1fac0; 1 drivers
|
|
v0x8d2d07840_0 .net *"_ivl_7", 0 0, L_0x8d322d720; 1 drivers
|
|
v0x8d2d078e0_0 .net *"_ivl_9", 7 0, L_0x8d2d1fc00; 1 drivers
|
|
L_0x8d2855720 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d07980_0 .net/s "acc_in", 39 0, L_0x8d2855720; 1 drivers
|
|
v0x8d2d07a20_0 .net/s "acc_out", 39 0, L_0x8d3229cc0; alias, 1 drivers
|
|
v0x8d2d07ac0_0 .net/s "product", 31 0, L_0x8d2d1fb60; 1 drivers
|
|
v0x8d2d07b60_0 .net/s "product_ext", 39 0, L_0x8d3229c20; 1 drivers
|
|
v0x8d2d07c00_0 .net/s "w", 15 0, L_0x8d322d860; 1 drivers
|
|
v0x8d2d07ca0_0 .net/s "x", 15 0, L_0x8d322d7c0; 1 drivers
|
|
L_0x8d2d1fa20 .extend/s 32, L_0x8d322d7c0;
|
|
L_0x8d2d1fac0 .extend/s 32, L_0x8d322d860;
|
|
L_0x8d2d1fb60 .arith/mult 32, L_0x8d2d1fa20, L_0x8d2d1fac0;
|
|
L_0x8d322d720 .part L_0x8d2d1fb60, 31, 1;
|
|
L_0x8d2d1fc00 .repeat 8, 8, L_0x8d322d720;
|
|
L_0x8d3229c20 .concat [ 32 8 0 0], L_0x8d2d1fb60, L_0x8d2d1fc00;
|
|
L_0x8d3229cc0 .arith/sum 40, L_0x8d2855720, L_0x8d3229c20;
|
|
S_0x8d3209080 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e040 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e080 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e0c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d07d40_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1fca0; 1 drivers
|
|
v0x8d2d07de0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d1fd40; 1 drivers
|
|
v0x8d2d07e80_0 .net *"_ivl_7", 0 0, L_0x8d322d900; 1 drivers
|
|
v0x8d2d07f20_0 .net *"_ivl_9", 7 0, L_0x8d2d1fe80; 1 drivers
|
|
L_0x8d2855768 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d08000_0 .net/s "acc_in", 39 0, L_0x8d2855768; 1 drivers
|
|
v0x8d2d080a0_0 .net/s "acc_out", 39 0, L_0x8d3229e00; alias, 1 drivers
|
|
v0x8d2d08140_0 .net/s "product", 31 0, L_0x8d2d1fde0; 1 drivers
|
|
v0x8d2d081e0_0 .net/s "product_ext", 39 0, L_0x8d3229d60; 1 drivers
|
|
v0x8d2d08280_0 .net/s "w", 15 0, L_0x8d322da40; 1 drivers
|
|
v0x8d2d08320_0 .net/s "x", 15 0, L_0x8d322d9a0; 1 drivers
|
|
L_0x8d2d1fca0 .extend/s 32, L_0x8d322d9a0;
|
|
L_0x8d2d1fd40 .extend/s 32, L_0x8d322da40;
|
|
L_0x8d2d1fde0 .arith/mult 32, L_0x8d2d1fca0, L_0x8d2d1fd40;
|
|
L_0x8d322d900 .part L_0x8d2d1fde0, 31, 1;
|
|
L_0x8d2d1fe80 .repeat 8, 8, L_0x8d322d900;
|
|
L_0x8d3229d60 .concat [ 32 8 0 0], L_0x8d2d1fde0, L_0x8d2d1fe80;
|
|
L_0x8d3229e00 .arith/sum 40, L_0x8d2855768, L_0x8d3229d60;
|
|
S_0x8d3209200 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e100 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e140 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e180 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d083c0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d1ff20; 1 drivers
|
|
v0x8d2d08460_0 .net/s *"_ivl_2", 31 0, L_0x8d2d20000; 1 drivers
|
|
v0x8d2d08500_0 .net *"_ivl_7", 0 0, L_0x8d322dae0; 1 drivers
|
|
v0x8d2d085a0_0 .net *"_ivl_9", 7 0, L_0x8d2d20140; 1 drivers
|
|
L_0x8d28557b0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d08640_0 .net/s "acc_in", 39 0, L_0x8d28557b0; 1 drivers
|
|
v0x8d2d086e0_0 .net/s "acc_out", 39 0, L_0x8d3229f40; alias, 1 drivers
|
|
v0x8d2d08780_0 .net/s "product", 31 0, L_0x8d2d200a0; 1 drivers
|
|
v0x8d2d08820_0 .net/s "product_ext", 39 0, L_0x8d3229ea0; 1 drivers
|
|
v0x8d2d088c0_0 .net/s "w", 15 0, L_0x8d322dc20; 1 drivers
|
|
v0x8d2d08960_0 .net/s "x", 15 0, L_0x8d322db80; 1 drivers
|
|
L_0x8d2d1ff20 .extend/s 32, L_0x8d322db80;
|
|
L_0x8d2d20000 .extend/s 32, L_0x8d322dc20;
|
|
L_0x8d2d200a0 .arith/mult 32, L_0x8d2d1ff20, L_0x8d2d20000;
|
|
L_0x8d322dae0 .part L_0x8d2d200a0, 31, 1;
|
|
L_0x8d2d20140 .repeat 8, 8, L_0x8d322dae0;
|
|
L_0x8d3229ea0 .concat [ 32 8 0 0], L_0x8d2d200a0, L_0x8d2d20140;
|
|
L_0x8d3229f40 .arith/sum 40, L_0x8d28557b0, L_0x8d3229ea0;
|
|
S_0x8d3209380 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e1c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e200 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e240 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d08a00_0 .net/s *"_ivl_0", 31 0, L_0x8d2d201e0; 1 drivers
|
|
v0x8d2d08aa0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d20280; 1 drivers
|
|
v0x8d2d08b40_0 .net *"_ivl_7", 0 0, L_0x8d322dcc0; 1 drivers
|
|
v0x8d2d08be0_0 .net *"_ivl_9", 7 0, L_0x8d2d203c0; 1 drivers
|
|
L_0x8d28557f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d08c80_0 .net/s "acc_in", 39 0, L_0x8d28557f8; 1 drivers
|
|
v0x8d2d08d20_0 .net/s "acc_out", 39 0, L_0x8d322a080; alias, 1 drivers
|
|
v0x8d2d08dc0_0 .net/s "product", 31 0, L_0x8d2d20320; 1 drivers
|
|
v0x8d2d08e60_0 .net/s "product_ext", 39 0, L_0x8d3229fe0; 1 drivers
|
|
v0x8d2d08f00_0 .net/s "w", 15 0, L_0x8d322de00; 1 drivers
|
|
v0x8d2d08fa0_0 .net/s "x", 15 0, L_0x8d322dd60; 1 drivers
|
|
L_0x8d2d201e0 .extend/s 32, L_0x8d322dd60;
|
|
L_0x8d2d20280 .extend/s 32, L_0x8d322de00;
|
|
L_0x8d2d20320 .arith/mult 32, L_0x8d2d201e0, L_0x8d2d20280;
|
|
L_0x8d322dcc0 .part L_0x8d2d20320, 31, 1;
|
|
L_0x8d2d203c0 .repeat 8, 8, L_0x8d322dcc0;
|
|
L_0x8d3229fe0 .concat [ 32 8 0 0], L_0x8d2d20320, L_0x8d2d203c0;
|
|
L_0x8d322a080 .arith/sum 40, L_0x8d28557f8, L_0x8d3229fe0;
|
|
S_0x8d3209500 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e280 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e2c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e300 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d09040_0 .net/s *"_ivl_0", 31 0, L_0x8d2d20460; 1 drivers
|
|
v0x8d2d090e0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d20500; 1 drivers
|
|
v0x8d2d09180_0 .net *"_ivl_7", 0 0, L_0x8d322dea0; 1 drivers
|
|
v0x8d2d09220_0 .net *"_ivl_9", 7 0, L_0x8d2d20640; 1 drivers
|
|
L_0x8d2855840 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d092c0_0 .net/s "acc_in", 39 0, L_0x8d2855840; 1 drivers
|
|
v0x8d2d09360_0 .net/s "acc_out", 39 0, L_0x8d322a1c0; alias, 1 drivers
|
|
v0x8d2d09400_0 .net/s "product", 31 0, L_0x8d2d205a0; 1 drivers
|
|
v0x8d2d094a0_0 .net/s "product_ext", 39 0, L_0x8d322a120; 1 drivers
|
|
v0x8d2d09540_0 .net/s "w", 15 0, L_0x8d322dfe0; 1 drivers
|
|
v0x8d2d095e0_0 .net/s "x", 15 0, L_0x8d322df40; 1 drivers
|
|
L_0x8d2d20460 .extend/s 32, L_0x8d322df40;
|
|
L_0x8d2d20500 .extend/s 32, L_0x8d322dfe0;
|
|
L_0x8d2d205a0 .arith/mult 32, L_0x8d2d20460, L_0x8d2d20500;
|
|
L_0x8d322dea0 .part L_0x8d2d205a0, 31, 1;
|
|
L_0x8d2d20640 .repeat 8, 8, L_0x8d322dea0;
|
|
L_0x8d322a120 .concat [ 32 8 0 0], L_0x8d2d205a0, L_0x8d2d20640;
|
|
L_0x8d322a1c0 .arith/sum 40, L_0x8d2855840, L_0x8d322a120;
|
|
S_0x8d3209680 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e340 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e380 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e3c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d09680_0 .net/s *"_ivl_0", 31 0, L_0x8d2d206e0; 1 drivers
|
|
v0x8d2d09720_0 .net/s *"_ivl_2", 31 0, L_0x8d2d20780; 1 drivers
|
|
v0x8d2d097c0_0 .net *"_ivl_7", 0 0, L_0x8d322e080; 1 drivers
|
|
v0x8d2d09860_0 .net *"_ivl_9", 7 0, L_0x8d2d208c0; 1 drivers
|
|
L_0x8d2855888 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d09900_0 .net/s "acc_in", 39 0, L_0x8d2855888; 1 drivers
|
|
v0x8d2d099a0_0 .net/s "acc_out", 39 0, L_0x8d322a300; alias, 1 drivers
|
|
v0x8d2d09a40_0 .net/s "product", 31 0, L_0x8d2d20820; 1 drivers
|
|
v0x8d2d09ae0_0 .net/s "product_ext", 39 0, L_0x8d322a260; 1 drivers
|
|
v0x8d2d09b80_0 .net/s "w", 15 0, L_0x8d322e1c0; 1 drivers
|
|
v0x8d2d09c20_0 .net/s "x", 15 0, L_0x8d322e120; 1 drivers
|
|
L_0x8d2d206e0 .extend/s 32, L_0x8d322e120;
|
|
L_0x8d2d20780 .extend/s 32, L_0x8d322e1c0;
|
|
L_0x8d2d20820 .arith/mult 32, L_0x8d2d206e0, L_0x8d2d20780;
|
|
L_0x8d322e080 .part L_0x8d2d20820, 31, 1;
|
|
L_0x8d2d208c0 .repeat 8, 8, L_0x8d322e080;
|
|
L_0x8d322a260 .concat [ 32 8 0 0], L_0x8d2d20820, L_0x8d2d208c0;
|
|
L_0x8d322a300 .arith/sum 40, L_0x8d2855888, L_0x8d322a260;
|
|
S_0x8d3209800 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d3208c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e400 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e440 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e480 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d09cc0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d20960; 1 drivers
|
|
v0x8d2d09d60_0 .net/s *"_ivl_2", 31 0, L_0x8d2d20a00; 1 drivers
|
|
v0x8d2d09e00_0 .net *"_ivl_7", 0 0, L_0x8d322e260; 1 drivers
|
|
v0x8d2d09ea0_0 .net *"_ivl_9", 7 0, L_0x8d2d20b40; 1 drivers
|
|
L_0x8d28558d0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d09f40_0 .net/s "acc_in", 39 0, L_0x8d28558d0; 1 drivers
|
|
v0x8d2d09fe0_0 .net/s "acc_out", 39 0, L_0x8d322a440; alias, 1 drivers
|
|
v0x8d2d0a080_0 .net/s "product", 31 0, L_0x8d2d20aa0; 1 drivers
|
|
v0x8d2d0a120_0 .net/s "product_ext", 39 0, L_0x8d322a3a0; 1 drivers
|
|
v0x8d2d0a1c0_0 .net/s "w", 15 0, L_0x8d322e3a0; 1 drivers
|
|
v0x8d2d0a260_0 .net/s "x", 15 0, L_0x8d322e300; 1 drivers
|
|
L_0x8d2d20960 .extend/s 32, L_0x8d322e300;
|
|
L_0x8d2d20a00 .extend/s 32, L_0x8d322e3a0;
|
|
L_0x8d2d20aa0 .arith/mult 32, L_0x8d2d20960, L_0x8d2d20a00;
|
|
L_0x8d322e260 .part L_0x8d2d20aa0, 31, 1;
|
|
L_0x8d2d20b40 .repeat 8, 8, L_0x8d322e260;
|
|
L_0x8d322a3a0 .concat [ 32 8 0 0], L_0x8d2d20aa0, L_0x8d2d20b40;
|
|
L_0x8d322a440 .arith/sum 40, L_0x8d28558d0, L_0x8d322a3a0;
|
|
S_0x8d3209980 .scope generate, "GEN_NEURON[6]" "GEN_NEURON[6]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b240 .param/l "n" 1 4 35, +C4<0110>;
|
|
S_0x8d3209b00 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d3209980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e673b0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e673f0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e67430 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e67470 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e674b0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e674f0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e67530 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c3f0 .functor BUFZ 16, L_0x8d322fa20, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2d103c0_0 .net *"_ivl_0", 31 0, L_0x8d322abc0; 1 drivers
|
|
v0x8d2d10460_0 .net *"_ivl_11", 31 0, L_0x8d2d20dc0; 1 drivers
|
|
v0x8d2d10500_0 .net *"_ivl_14", 31 0, L_0x8d322ac60; 1 drivers
|
|
L_0x8d2855a38 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d105a0_0 .net *"_ivl_17", 28 0, L_0x8d2855a38; 1 drivers
|
|
L_0x8d2855a80 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d10640_0 .net/2u *"_ivl_18", 31 0, L_0x8d2855a80; 1 drivers
|
|
v0x8d2d106e0_0 .net *"_ivl_21", 31 0, L_0x8d2d20e60; 1 drivers
|
|
L_0x8d2855ac8 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d10780_0 .net/2u *"_ivl_22", 31 0, L_0x8d2855ac8; 1 drivers
|
|
v0x8d2d10820_0 .net *"_ivl_25", 31 0, L_0x8d2d20f00; 1 drivers
|
|
L_0x8d2855960 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d108c0_0 .net *"_ivl_3", 28 0, L_0x8d2855960; 1 drivers
|
|
v0x8d2d10960_0 .net *"_ivl_31", 0 0, L_0x8d322f7a0; 1 drivers
|
|
v0x8d2d10a00_0 .net *"_ivl_33", 23 0, L_0x8d2d223a0; 1 drivers
|
|
v0x8d2d10aa0_0 .net *"_ivl_36", 39 0, L_0x8d322bca0; 1 drivers
|
|
v0x8d2d10b40_0 .net *"_ivl_38", 31 0, L_0x8d322f840; 1 drivers
|
|
L_0x8d28559a8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d10be0_0 .net/2u *"_ivl_4", 31 0, L_0x8d28559a8; 1 drivers
|
|
L_0x8d2855d50 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d10c80_0 .net *"_ivl_40", 7 0, L_0x8d2855d50; 1 drivers
|
|
v0x8d2d10d20_0 .net *"_ivl_46", 31 0, L_0x8d322f8e0; 1 drivers
|
|
v0x8d2d10dc0_0 .net *"_ivl_7", 31 0, L_0x8d2d20d20; 1 drivers
|
|
L_0x8d28559f0 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d10e60_0 .net/2u *"_ivl_8", 31 0, L_0x8d28559f0; 1 drivers
|
|
v0x8d2d10f00_0 .var/s "acc", 39 0;
|
|
v0x8d2d10fa0_0 .net/s "acc_next", 39 0, L_0x8d322bb60; 1 drivers
|
|
v0x8d2d11040_0 .net/s "bias", 15 0, L_0x8d322fa20; 1 drivers
|
|
v0x8d2d110e0_0 .net/s "bias_ext", 39 0, L_0x8d322bc00; 1 drivers
|
|
v0x8d2d11180_0 .net/s "bias_ext_small", 15 0, L_0x8d307c3f0; 1 drivers
|
|
v0x8d2d11220_0 .var "busy", 0 0;
|
|
v0x8d2d112c0_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2d11360_0 .var "done", 0 0;
|
|
v0x8d2d11400_0 .net/s "final_acc", 39 0, L_0x8d322bd40; 1 drivers
|
|
v0x8d2d114a0_0 .net/s "final_value", 39 0, L_0x8d2d22440; 1 drivers
|
|
v0x8d2d11540_0 .var "group_index", 2 0;
|
|
v0x8d2d115e0_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2d11680_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2d11720_0 .net/s "w_bus", 1023 0, L_0x8d322f980; 1 drivers
|
|
v0x8d2d117c0_0 .net/s "w_group", 127 0, L_0x8d322e800; 1 drivers
|
|
v0x8d2d11860_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2d11900_0 .net/s "x_group", 127 0, L_0x8d322e760; 1 drivers
|
|
v0x8d2d119a0_0 .var/s "y", 15 0;
|
|
L_0x8d322abc0 .concat [ 3 29 0 0], v0x8d2d11540_0, L_0x8d2855960;
|
|
L_0x8d2d20d20 .arith/mult 32, L_0x8d322abc0, L_0x8d28559a8;
|
|
L_0x8d2d20dc0 .arith/mult 32, L_0x8d2d20d20, L_0x8d28559f0;
|
|
L_0x8d322e760 .part/v v0x8d2d17ca0_0, L_0x8d2d20dc0, 128;
|
|
L_0x8d322ac60 .concat [ 3 29 0 0], v0x8d2d11540_0, L_0x8d2855a38;
|
|
L_0x8d2d20e60 .arith/mult 32, L_0x8d322ac60, L_0x8d2855a80;
|
|
L_0x8d2d20f00 .arith/mult 32, L_0x8d2d20e60, L_0x8d2855ac8;
|
|
L_0x8d322e800 .part/v L_0x8d322f980, L_0x8d2d20f00, 128;
|
|
L_0x8d322f7a0 .part L_0x8d307c3f0, 15, 1;
|
|
L_0x8d2d223a0 .repeat 24, 24, L_0x8d322f7a0;
|
|
L_0x8d322bc00 .concat [ 16 24 0 0], L_0x8d307c3f0, L_0x8d2d223a0;
|
|
L_0x8d322f840 .part L_0x8d322bc00, 0, 32;
|
|
L_0x8d322bca0 .concat [ 8 32 0 0], L_0x8d2855d50, L_0x8d322f840;
|
|
L_0x8d322bd40 .arith/sum 40, L_0x8d322bb60, L_0x8d322bca0;
|
|
L_0x8d322f8e0 .part L_0x8d322bd40, 8, 32;
|
|
L_0x8d2d22440 .extend/s 40, L_0x8d322f8e0;
|
|
S_0x8d3209c80 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d3209b00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0900 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a0940 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2d0f7a0_0 .net/s "acc_in", 39 0, v0x8d2d10f00_0; 1 drivers
|
|
v0x8d2d0f840_0 .net/s "acc_out", 39 0, L_0x8d322bb60; alias, 1 drivers
|
|
v0x8d2d0f8e0_0 .net/s "m0", 39 0, L_0x8d322ada0; 1 drivers
|
|
v0x8d2d0f980_0 .net/s "m1", 39 0, L_0x8d322aee0; 1 drivers
|
|
v0x8d2d0fa20_0 .net/s "m2", 39 0, L_0x8d322b020; 1 drivers
|
|
v0x8d2d0fac0_0 .net/s "m3", 39 0, L_0x8d322b160; 1 drivers
|
|
v0x8d2d0fb60_0 .net/s "m4", 39 0, L_0x8d322b2a0; 1 drivers
|
|
v0x8d2d0fc00_0 .net/s "m5", 39 0, L_0x8d322b3e0; 1 drivers
|
|
v0x8d2d0fca0_0 .net/s "m6", 39 0, L_0x8d322b520; 1 drivers
|
|
v0x8d2d0fd40_0 .net/s "m7", 39 0, L_0x8d322b660; 1 drivers
|
|
v0x8d2d0fde0_0 .net/s "s0", 39 0, L_0x8d322b700; 1 drivers
|
|
v0x8d2d0fe80_0 .net/s "s1", 39 0, L_0x8d322b7a0; 1 drivers
|
|
v0x8d2d0ff20_0 .net/s "s2", 39 0, L_0x8d322b840; 1 drivers
|
|
v0x8d2d10000_0 .net/s "s3", 39 0, L_0x8d322b8e0; 1 drivers
|
|
v0x8d2d100a0_0 .net/s "s4", 39 0, L_0x8d322b980; 1 drivers
|
|
v0x8d2d10140_0 .net/s "s5", 39 0, L_0x8d322ba20; 1 drivers
|
|
v0x8d2d101e0_0 .net/s "sum", 39 0, L_0x8d322bac0; 1 drivers
|
|
v0x8d2d10280_0 .net/s "w_bus", 127 0, L_0x8d322e800; alias, 1 drivers
|
|
v0x8d2d10320_0 .net/s "x_bus", 127 0, L_0x8d322e760; alias, 1 drivers
|
|
L_0x8d322e940 .part L_0x8d322e760, 0, 16;
|
|
L_0x8d322e9e0 .part L_0x8d322e800, 0, 16;
|
|
L_0x8d322eb20 .part L_0x8d322e760, 16, 16;
|
|
L_0x8d322ebc0 .part L_0x8d322e800, 16, 16;
|
|
L_0x8d322ed00 .part L_0x8d322e760, 32, 16;
|
|
L_0x8d322eda0 .part L_0x8d322e800, 32, 16;
|
|
L_0x8d322eee0 .part L_0x8d322e760, 48, 16;
|
|
L_0x8d322ef80 .part L_0x8d322e800, 48, 16;
|
|
L_0x8d322f0c0 .part L_0x8d322e760, 64, 16;
|
|
L_0x8d322f160 .part L_0x8d322e800, 64, 16;
|
|
L_0x8d322f2a0 .part L_0x8d322e760, 80, 16;
|
|
L_0x8d322f340 .part L_0x8d322e800, 80, 16;
|
|
L_0x8d322f480 .part L_0x8d322e760, 96, 16;
|
|
L_0x8d322f520 .part L_0x8d322e800, 96, 16;
|
|
L_0x8d322f660 .part L_0x8d322e760, 112, 16;
|
|
L_0x8d322f700 .part L_0x8d322e800, 112, 16;
|
|
L_0x8d322b700 .arith/sum 40, L_0x8d322ada0, L_0x8d322aee0;
|
|
L_0x8d322b7a0 .arith/sum 40, L_0x8d322b020, L_0x8d322b160;
|
|
L_0x8d322b840 .arith/sum 40, L_0x8d322b2a0, L_0x8d322b3e0;
|
|
L_0x8d322b8e0 .arith/sum 40, L_0x8d322b520, L_0x8d322b660;
|
|
L_0x8d322b980 .arith/sum 40, L_0x8d322b700, L_0x8d322b7a0;
|
|
L_0x8d322ba20 .arith/sum 40, L_0x8d322b840, L_0x8d322b8e0;
|
|
L_0x8d322bac0 .arith/sum 40, L_0x8d322b980, L_0x8d322ba20;
|
|
L_0x8d322bb60 .arith/sum 40, v0x8d2d10f00_0, L_0x8d322bac0;
|
|
S_0x8d3209e00 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e4c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e500 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e540 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0c5a0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d20fa0; 1 drivers
|
|
v0x8d2d0c640_0 .net/s *"_ivl_2", 31 0, L_0x8d2d21040; 1 drivers
|
|
v0x8d2d0c6e0_0 .net *"_ivl_7", 0 0, L_0x8d322e8a0; 1 drivers
|
|
v0x8d2d0c780_0 .net *"_ivl_9", 7 0, L_0x8d2d21180; 1 drivers
|
|
L_0x8d2855b10 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0c820_0 .net/s "acc_in", 39 0, L_0x8d2855b10; 1 drivers
|
|
v0x8d2d0c8c0_0 .net/s "acc_out", 39 0, L_0x8d322ada0; alias, 1 drivers
|
|
v0x8d2d0c960_0 .net/s "product", 31 0, L_0x8d2d210e0; 1 drivers
|
|
v0x8d2d0ca00_0 .net/s "product_ext", 39 0, L_0x8d322ad00; 1 drivers
|
|
v0x8d2d0caa0_0 .net/s "w", 15 0, L_0x8d322e9e0; 1 drivers
|
|
v0x8d2d0cb40_0 .net/s "x", 15 0, L_0x8d322e940; 1 drivers
|
|
L_0x8d2d20fa0 .extend/s 32, L_0x8d322e940;
|
|
L_0x8d2d21040 .extend/s 32, L_0x8d322e9e0;
|
|
L_0x8d2d210e0 .arith/mult 32, L_0x8d2d20fa0, L_0x8d2d21040;
|
|
L_0x8d322e8a0 .part L_0x8d2d210e0, 31, 1;
|
|
L_0x8d2d21180 .repeat 8, 8, L_0x8d322e8a0;
|
|
L_0x8d322ad00 .concat [ 32 8 0 0], L_0x8d2d210e0, L_0x8d2d21180;
|
|
L_0x8d322ada0 .arith/sum 40, L_0x8d2855b10, L_0x8d322ad00;
|
|
S_0x8d3209f80 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e580 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e5c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e600 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0cbe0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d21220; 1 drivers
|
|
v0x8d2d0cc80_0 .net/s *"_ivl_2", 31 0, L_0x8d2d212c0; 1 drivers
|
|
v0x8d2d0cd20_0 .net *"_ivl_7", 0 0, L_0x8d322ea80; 1 drivers
|
|
v0x8d2d0cdc0_0 .net *"_ivl_9", 7 0, L_0x8d2d21400; 1 drivers
|
|
L_0x8d2855b58 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0ce60_0 .net/s "acc_in", 39 0, L_0x8d2855b58; 1 drivers
|
|
v0x8d2d0cf00_0 .net/s "acc_out", 39 0, L_0x8d322aee0; alias, 1 drivers
|
|
v0x8d2d0cfa0_0 .net/s "product", 31 0, L_0x8d2d21360; 1 drivers
|
|
v0x8d2d0d040_0 .net/s "product_ext", 39 0, L_0x8d322ae40; 1 drivers
|
|
v0x8d2d0d0e0_0 .net/s "w", 15 0, L_0x8d322ebc0; 1 drivers
|
|
v0x8d2d0d180_0 .net/s "x", 15 0, L_0x8d322eb20; 1 drivers
|
|
L_0x8d2d21220 .extend/s 32, L_0x8d322eb20;
|
|
L_0x8d2d212c0 .extend/s 32, L_0x8d322ebc0;
|
|
L_0x8d2d21360 .arith/mult 32, L_0x8d2d21220, L_0x8d2d212c0;
|
|
L_0x8d322ea80 .part L_0x8d2d21360, 31, 1;
|
|
L_0x8d2d21400 .repeat 8, 8, L_0x8d322ea80;
|
|
L_0x8d322ae40 .concat [ 32 8 0 0], L_0x8d2d21360, L_0x8d2d21400;
|
|
L_0x8d322aee0 .arith/sum 40, L_0x8d2855b58, L_0x8d322ae40;
|
|
S_0x8d320a100 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e640 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e680 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e6c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0d220_0 .net/s *"_ivl_0", 31 0, L_0x8d2d214a0; 1 drivers
|
|
v0x8d2d0d2c0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d21540; 1 drivers
|
|
v0x8d2d0d360_0 .net *"_ivl_7", 0 0, L_0x8d322ec60; 1 drivers
|
|
v0x8d2d0d400_0 .net *"_ivl_9", 7 0, L_0x8d2d21680; 1 drivers
|
|
L_0x8d2855ba0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0d4a0_0 .net/s "acc_in", 39 0, L_0x8d2855ba0; 1 drivers
|
|
v0x8d2d0d540_0 .net/s "acc_out", 39 0, L_0x8d322b020; alias, 1 drivers
|
|
v0x8d2d0d5e0_0 .net/s "product", 31 0, L_0x8d2d215e0; 1 drivers
|
|
v0x8d2d0d680_0 .net/s "product_ext", 39 0, L_0x8d322af80; 1 drivers
|
|
v0x8d2d0d720_0 .net/s "w", 15 0, L_0x8d322eda0; 1 drivers
|
|
v0x8d2d0d7c0_0 .net/s "x", 15 0, L_0x8d322ed00; 1 drivers
|
|
L_0x8d2d214a0 .extend/s 32, L_0x8d322ed00;
|
|
L_0x8d2d21540 .extend/s 32, L_0x8d322eda0;
|
|
L_0x8d2d215e0 .arith/mult 32, L_0x8d2d214a0, L_0x8d2d21540;
|
|
L_0x8d322ec60 .part L_0x8d2d215e0, 31, 1;
|
|
L_0x8d2d21680 .repeat 8, 8, L_0x8d322ec60;
|
|
L_0x8d322af80 .concat [ 32 8 0 0], L_0x8d2d215e0, L_0x8d2d21680;
|
|
L_0x8d322b020 .arith/sum 40, L_0x8d2855ba0, L_0x8d322af80;
|
|
S_0x8d320a280 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e700 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e740 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e780 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0d860_0 .net/s *"_ivl_0", 31 0, L_0x8d2d21720; 1 drivers
|
|
v0x8d2d0d900_0 .net/s *"_ivl_2", 31 0, L_0x8d2d217c0; 1 drivers
|
|
v0x8d2d0d9a0_0 .net *"_ivl_7", 0 0, L_0x8d322ee40; 1 drivers
|
|
v0x8d2d0da40_0 .net *"_ivl_9", 7 0, L_0x8d2d21900; 1 drivers
|
|
L_0x8d2855be8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0dae0_0 .net/s "acc_in", 39 0, L_0x8d2855be8; 1 drivers
|
|
v0x8d2d0db80_0 .net/s "acc_out", 39 0, L_0x8d322b160; alias, 1 drivers
|
|
v0x8d2d0dc20_0 .net/s "product", 31 0, L_0x8d2d21860; 1 drivers
|
|
v0x8d2d0dcc0_0 .net/s "product_ext", 39 0, L_0x8d322b0c0; 1 drivers
|
|
v0x8d2d0dd60_0 .net/s "w", 15 0, L_0x8d322ef80; 1 drivers
|
|
v0x8d2d0de00_0 .net/s "x", 15 0, L_0x8d322eee0; 1 drivers
|
|
L_0x8d2d21720 .extend/s 32, L_0x8d322eee0;
|
|
L_0x8d2d217c0 .extend/s 32, L_0x8d322ef80;
|
|
L_0x8d2d21860 .arith/mult 32, L_0x8d2d21720, L_0x8d2d217c0;
|
|
L_0x8d322ee40 .part L_0x8d2d21860, 31, 1;
|
|
L_0x8d2d21900 .repeat 8, 8, L_0x8d322ee40;
|
|
L_0x8d322b0c0 .concat [ 32 8 0 0], L_0x8d2d21860, L_0x8d2d21900;
|
|
L_0x8d322b160 .arith/sum 40, L_0x8d2855be8, L_0x8d322b0c0;
|
|
S_0x8d320a400 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e7c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e800 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e840 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0dea0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d219a0; 1 drivers
|
|
v0x8d2d0df40_0 .net/s *"_ivl_2", 31 0, L_0x8d2d21a40; 1 drivers
|
|
v0x8d2d0dfe0_0 .net *"_ivl_7", 0 0, L_0x8d322f020; 1 drivers
|
|
v0x8d2d0e080_0 .net *"_ivl_9", 7 0, L_0x8d2d21b80; 1 drivers
|
|
L_0x8d2855c30 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0e120_0 .net/s "acc_in", 39 0, L_0x8d2855c30; 1 drivers
|
|
v0x8d2d0e1c0_0 .net/s "acc_out", 39 0, L_0x8d322b2a0; alias, 1 drivers
|
|
v0x8d2d0e260_0 .net/s "product", 31 0, L_0x8d2d21ae0; 1 drivers
|
|
v0x8d2d0e300_0 .net/s "product_ext", 39 0, L_0x8d322b200; 1 drivers
|
|
v0x8d2d0e3a0_0 .net/s "w", 15 0, L_0x8d322f160; 1 drivers
|
|
v0x8d2d0e440_0 .net/s "x", 15 0, L_0x8d322f0c0; 1 drivers
|
|
L_0x8d2d219a0 .extend/s 32, L_0x8d322f0c0;
|
|
L_0x8d2d21a40 .extend/s 32, L_0x8d322f160;
|
|
L_0x8d2d21ae0 .arith/mult 32, L_0x8d2d219a0, L_0x8d2d21a40;
|
|
L_0x8d322f020 .part L_0x8d2d21ae0, 31, 1;
|
|
L_0x8d2d21b80 .repeat 8, 8, L_0x8d322f020;
|
|
L_0x8d322b200 .concat [ 32 8 0 0], L_0x8d2d21ae0, L_0x8d2d21b80;
|
|
L_0x8d322b2a0 .arith/sum 40, L_0x8d2855c30, L_0x8d322b200;
|
|
S_0x8d320a580 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e880 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e8c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e900 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0e4e0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d21c20; 1 drivers
|
|
v0x8d2d0e580_0 .net/s *"_ivl_2", 31 0, L_0x8d2d21cc0; 1 drivers
|
|
v0x8d2d0e620_0 .net *"_ivl_7", 0 0, L_0x8d322f200; 1 drivers
|
|
v0x8d2d0e6c0_0 .net *"_ivl_9", 7 0, L_0x8d2d21e00; 1 drivers
|
|
L_0x8d2855c78 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0e760_0 .net/s "acc_in", 39 0, L_0x8d2855c78; 1 drivers
|
|
v0x8d2d0e800_0 .net/s "acc_out", 39 0, L_0x8d322b3e0; alias, 1 drivers
|
|
v0x8d2d0e8a0_0 .net/s "product", 31 0, L_0x8d2d21d60; 1 drivers
|
|
v0x8d2d0e940_0 .net/s "product_ext", 39 0, L_0x8d322b340; 1 drivers
|
|
v0x8d2d0e9e0_0 .net/s "w", 15 0, L_0x8d322f340; 1 drivers
|
|
v0x8d2d0ea80_0 .net/s "x", 15 0, L_0x8d322f2a0; 1 drivers
|
|
L_0x8d2d21c20 .extend/s 32, L_0x8d322f2a0;
|
|
L_0x8d2d21cc0 .extend/s 32, L_0x8d322f340;
|
|
L_0x8d2d21d60 .arith/mult 32, L_0x8d2d21c20, L_0x8d2d21cc0;
|
|
L_0x8d322f200 .part L_0x8d2d21d60, 31, 1;
|
|
L_0x8d2d21e00 .repeat 8, 8, L_0x8d322f200;
|
|
L_0x8d322b340 .concat [ 32 8 0 0], L_0x8d2d21d60, L_0x8d2d21e00;
|
|
L_0x8d322b3e0 .arith/sum 40, L_0x8d2855c78, L_0x8d322b340;
|
|
S_0x8d320a700 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306e940 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306e980 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306e9c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0eb20_0 .net/s *"_ivl_0", 31 0, L_0x8d2d21ea0; 1 drivers
|
|
v0x8d2d0ebc0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d21f40; 1 drivers
|
|
v0x8d2d0ec60_0 .net *"_ivl_7", 0 0, L_0x8d322f3e0; 1 drivers
|
|
v0x8d2d0ed00_0 .net *"_ivl_9", 7 0, L_0x8d2d22080; 1 drivers
|
|
L_0x8d2855cc0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0eda0_0 .net/s "acc_in", 39 0, L_0x8d2855cc0; 1 drivers
|
|
v0x8d2d0ee40_0 .net/s "acc_out", 39 0, L_0x8d322b520; alias, 1 drivers
|
|
v0x8d2d0eee0_0 .net/s "product", 31 0, L_0x8d2d21fe0; 1 drivers
|
|
v0x8d2d0ef80_0 .net/s "product_ext", 39 0, L_0x8d322b480; 1 drivers
|
|
v0x8d2d0f020_0 .net/s "w", 15 0, L_0x8d322f520; 1 drivers
|
|
v0x8d2d0f0c0_0 .net/s "x", 15 0, L_0x8d322f480; 1 drivers
|
|
L_0x8d2d21ea0 .extend/s 32, L_0x8d322f480;
|
|
L_0x8d2d21f40 .extend/s 32, L_0x8d322f520;
|
|
L_0x8d2d21fe0 .arith/mult 32, L_0x8d2d21ea0, L_0x8d2d21f40;
|
|
L_0x8d322f3e0 .part L_0x8d2d21fe0, 31, 1;
|
|
L_0x8d2d22080 .repeat 8, 8, L_0x8d322f3e0;
|
|
L_0x8d322b480 .concat [ 32 8 0 0], L_0x8d2d21fe0, L_0x8d2d22080;
|
|
L_0x8d322b520 .arith/sum 40, L_0x8d2855cc0, L_0x8d322b480;
|
|
S_0x8d320a880 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d3209c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ea00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ea40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ea80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d0f160_0 .net/s *"_ivl_0", 31 0, L_0x8d2d22120; 1 drivers
|
|
v0x8d2d0f200_0 .net/s *"_ivl_2", 31 0, L_0x8d2d221c0; 1 drivers
|
|
v0x8d2d0f2a0_0 .net *"_ivl_7", 0 0, L_0x8d322f5c0; 1 drivers
|
|
v0x8d2d0f340_0 .net *"_ivl_9", 7 0, L_0x8d2d22300; 1 drivers
|
|
L_0x8d2855d08 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d0f3e0_0 .net/s "acc_in", 39 0, L_0x8d2855d08; 1 drivers
|
|
v0x8d2d0f480_0 .net/s "acc_out", 39 0, L_0x8d322b660; alias, 1 drivers
|
|
v0x8d2d0f520_0 .net/s "product", 31 0, L_0x8d2d22260; 1 drivers
|
|
v0x8d2d0f5c0_0 .net/s "product_ext", 39 0, L_0x8d322b5c0; 1 drivers
|
|
v0x8d2d0f660_0 .net/s "w", 15 0, L_0x8d322f700; 1 drivers
|
|
v0x8d2d0f700_0 .net/s "x", 15 0, L_0x8d322f660; 1 drivers
|
|
L_0x8d2d22120 .extend/s 32, L_0x8d322f660;
|
|
L_0x8d2d221c0 .extend/s 32, L_0x8d322f700;
|
|
L_0x8d2d22260 .arith/mult 32, L_0x8d2d22120, L_0x8d2d221c0;
|
|
L_0x8d322f5c0 .part L_0x8d2d22260, 31, 1;
|
|
L_0x8d2d22300 .repeat 8, 8, L_0x8d322f5c0;
|
|
L_0x8d322b5c0 .concat [ 32 8 0 0], L_0x8d2d22260, L_0x8d2d22300;
|
|
L_0x8d322b660 .arith/sum 40, L_0x8d2855d08, L_0x8d322b5c0;
|
|
S_0x8d320aa00 .scope generate, "GEN_NEURON[7]" "GEN_NEURON[7]" 4 35, 4 35 0, S_0x102e5b4b0;
|
|
.timescale 0 0;
|
|
P_0x8d2c3b280 .param/l "n" 1 4 35, +C4<0111>;
|
|
S_0x8d320ab80 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x8d320aa00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 1024 "x_bus";
|
|
.port_info 4 /INPUT 1024 "w_bus";
|
|
.port_info 5 /INPUT 16 "bias";
|
|
.port_info 6 /OUTPUT 16 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x102e67570 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>;
|
|
P_0x102e675b0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>;
|
|
P_0x102e675f0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>;
|
|
P_0x102e67630 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000001000>;
|
|
P_0x102e67670 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000011>;
|
|
P_0x102e676b0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000001000000>;
|
|
P_0x102e676f0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>;
|
|
L_0x8d307c460 .functor BUFZ 16, L_0x8d323cdc0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
|
|
v0x8d2d15860_0 .net *"_ivl_0", 31 0, L_0x8d322bde0; 1 drivers
|
|
v0x8d2d15900_0 .net *"_ivl_11", 31 0, L_0x8d2d22580; 1 drivers
|
|
v0x8d2d159a0_0 .net *"_ivl_14", 31 0, L_0x8d322be80; 1 drivers
|
|
L_0x8d2855e70 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d15a40_0 .net *"_ivl_17", 28 0, L_0x8d2855e70; 1 drivers
|
|
L_0x8d2855eb8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d15ae0_0 .net/2u *"_ivl_18", 31 0, L_0x8d2855eb8; 1 drivers
|
|
v0x8d2d15b80_0 .net *"_ivl_21", 31 0, L_0x8d2d22620; 1 drivers
|
|
L_0x8d2855f00 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d15c20_0 .net/2u *"_ivl_22", 31 0, L_0x8d2855f00; 1 drivers
|
|
v0x8d2d15cc0_0 .net *"_ivl_25", 31 0, L_0x8d2d226c0; 1 drivers
|
|
L_0x8d2855d98 .functor BUFT 1, C4<00000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d15d60_0 .net *"_ivl_3", 28 0, L_0x8d2855d98; 1 drivers
|
|
v0x8d2d15e00_0 .net *"_ivl_31", 0 0, L_0x8d323cb40; 1 drivers
|
|
v0x8d2d15ea0_0 .net *"_ivl_33", 23 0, L_0x8d2d23b60; 1 drivers
|
|
v0x8d2d15f40_0 .net *"_ivl_36", 39 0, L_0x8d3238f00; 1 drivers
|
|
v0x8d2d15fe0_0 .net *"_ivl_38", 31 0, L_0x8d323cbe0; 1 drivers
|
|
L_0x8d2855de0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d16080_0 .net/2u *"_ivl_4", 31 0, L_0x8d2855de0; 1 drivers
|
|
L_0x8d2856188 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d16120_0 .net *"_ivl_40", 7 0, L_0x8d2856188; 1 drivers
|
|
v0x8d2d161c0_0 .net *"_ivl_46", 31 0, L_0x8d323cc80; 1 drivers
|
|
v0x8d2d16260_0 .net *"_ivl_7", 31 0, L_0x8d2d224e0; 1 drivers
|
|
L_0x8d2855e28 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d16300_0 .net/2u *"_ivl_8", 31 0, L_0x8d2855e28; 1 drivers
|
|
v0x8d2d163a0_0 .var/s "acc", 39 0;
|
|
v0x8d2d16440_0 .net/s "acc_next", 39 0, L_0x8d3238dc0; 1 drivers
|
|
v0x8d2d164e0_0 .net/s "bias", 15 0, L_0x8d323cdc0; 1 drivers
|
|
v0x8d2d16580_0 .net/s "bias_ext", 39 0, L_0x8d3238e60; 1 drivers
|
|
v0x8d2d16620_0 .net/s "bias_ext_small", 15 0, L_0x8d307c460; 1 drivers
|
|
v0x8d2d166c0_0 .var "busy", 0 0;
|
|
v0x8d2d16760_0 .net "clk", 0 0, v0x8d2d17840_0; alias, 1 drivers
|
|
v0x8d2d16800_0 .var "done", 0 0;
|
|
v0x8d2d168a0_0 .net/s "final_acc", 39 0, L_0x8d3238fa0; 1 drivers
|
|
v0x8d2d16940_0 .net/s "final_value", 39 0, L_0x8d2d23c00; 1 drivers
|
|
v0x8d2d169e0_0 .var "group_index", 2 0;
|
|
v0x8d2d16a80_0 .net "rst", 0 0, v0x8d2d17ac0_0; alias, 1 drivers
|
|
v0x8d2d16b20_0 .net "start", 0 0, v0x8d2d17b60_0; alias, 1 drivers
|
|
v0x8d2d16bc0_0 .net/s "w_bus", 1023 0, L_0x8d323cd20; 1 drivers
|
|
v0x8d2d16c60_0 .net/s "w_group", 127 0, L_0x8d322fb60; 1 drivers
|
|
v0x8d2d16d00_0 .net/s "x_bus", 1023 0, v0x8d2d17ca0_0; alias, 1 drivers
|
|
v0x8d2d16da0_0 .net/s "x_group", 127 0, L_0x8d322fac0; 1 drivers
|
|
v0x8d2d16e40_0 .var/s "y", 15 0;
|
|
L_0x8d322bde0 .concat [ 3 29 0 0], v0x8d2d169e0_0, L_0x8d2855d98;
|
|
L_0x8d2d224e0 .arith/mult 32, L_0x8d322bde0, L_0x8d2855de0;
|
|
L_0x8d2d22580 .arith/mult 32, L_0x8d2d224e0, L_0x8d2855e28;
|
|
L_0x8d322fac0 .part/v v0x8d2d17ca0_0, L_0x8d2d22580, 128;
|
|
L_0x8d322be80 .concat [ 3 29 0 0], v0x8d2d169e0_0, L_0x8d2855e70;
|
|
L_0x8d2d22620 .arith/mult 32, L_0x8d322be80, L_0x8d2855eb8;
|
|
L_0x8d2d226c0 .arith/mult 32, L_0x8d2d22620, L_0x8d2855f00;
|
|
L_0x8d322fb60 .part/v L_0x8d323cd20, L_0x8d2d226c0, 128;
|
|
L_0x8d323cb40 .part L_0x8d307c460, 15, 1;
|
|
L_0x8d2d23b60 .repeat 24, 24, L_0x8d323cb40;
|
|
L_0x8d3238e60 .concat [ 16 24 0 0], L_0x8d307c460, L_0x8d2d23b60;
|
|
L_0x8d323cbe0 .part L_0x8d3238e60, 0, 32;
|
|
L_0x8d3238f00 .concat [ 8 32 0 0], L_0x8d2856188, L_0x8d323cbe0;
|
|
L_0x8d3238fa0 .arith/sum 40, L_0x8d3238dc0, L_0x8d3238f00;
|
|
L_0x8d323cc80 .part L_0x8d3238fa0, 8, 32;
|
|
L_0x8d2d23c00 .extend/s 40, L_0x8d323cc80;
|
|
S_0x8d320ad00 .scope module, "u_mac8" "mac8" 5 51, 6 1 0, S_0x8d320ab80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 128 "x_bus";
|
|
.port_info 1 /INPUT 128 "w_bus";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d30a0980 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d30a09c0 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>;
|
|
v0x8d2d14c80_0 .net/s "acc_in", 39 0, v0x8d2d163a0_0; 1 drivers
|
|
v0x8d2d14d20_0 .net/s "acc_out", 39 0, L_0x8d3238dc0; alias, 1 drivers
|
|
v0x8d2d14dc0_0 .net/s "m0", 39 0, L_0x8d3238000; 1 drivers
|
|
v0x8d2d14e60_0 .net/s "m1", 39 0, L_0x8d3238140; 1 drivers
|
|
v0x8d2d14f00_0 .net/s "m2", 39 0, L_0x8d3238280; 1 drivers
|
|
v0x8d2d14fa0_0 .net/s "m3", 39 0, L_0x8d32383c0; 1 drivers
|
|
v0x8d2d15040_0 .net/s "m4", 39 0, L_0x8d3238500; 1 drivers
|
|
v0x8d2d150e0_0 .net/s "m5", 39 0, L_0x8d3238640; 1 drivers
|
|
v0x8d2d15180_0 .net/s "m6", 39 0, L_0x8d3238780; 1 drivers
|
|
v0x8d2d15220_0 .net/s "m7", 39 0, L_0x8d32388c0; 1 drivers
|
|
v0x8d2d152c0_0 .net/s "s0", 39 0, L_0x8d3238960; 1 drivers
|
|
v0x8d2d15360_0 .net/s "s1", 39 0, L_0x8d3238a00; 1 drivers
|
|
v0x8d2d15400_0 .net/s "s2", 39 0, L_0x8d3238aa0; 1 drivers
|
|
v0x8d2d154a0_0 .net/s "s3", 39 0, L_0x8d3238b40; 1 drivers
|
|
v0x8d2d15540_0 .net/s "s4", 39 0, L_0x8d3238be0; 1 drivers
|
|
v0x8d2d155e0_0 .net/s "s5", 39 0, L_0x8d3238c80; 1 drivers
|
|
v0x8d2d15680_0 .net/s "sum", 39 0, L_0x8d3238d20; 1 drivers
|
|
v0x8d2d15720_0 .net/s "w_bus", 127 0, L_0x8d322fb60; alias, 1 drivers
|
|
v0x8d2d157c0_0 .net/s "x_bus", 127 0, L_0x8d322fac0; alias, 1 drivers
|
|
L_0x8d322fca0 .part L_0x8d322fac0, 0, 16;
|
|
L_0x8d322fd40 .part L_0x8d322fb60, 0, 16;
|
|
L_0x8d322fe80 .part L_0x8d322fac0, 16, 16;
|
|
L_0x8d322ff20 .part L_0x8d322fb60, 16, 16;
|
|
L_0x8d323c0a0 .part L_0x8d322fac0, 32, 16;
|
|
L_0x8d323c140 .part L_0x8d322fb60, 32, 16;
|
|
L_0x8d323c280 .part L_0x8d322fac0, 48, 16;
|
|
L_0x8d323c320 .part L_0x8d322fb60, 48, 16;
|
|
L_0x8d323c460 .part L_0x8d322fac0, 64, 16;
|
|
L_0x8d323c500 .part L_0x8d322fb60, 64, 16;
|
|
L_0x8d323c640 .part L_0x8d322fac0, 80, 16;
|
|
L_0x8d323c6e0 .part L_0x8d322fb60, 80, 16;
|
|
L_0x8d323c820 .part L_0x8d322fac0, 96, 16;
|
|
L_0x8d323c8c0 .part L_0x8d322fb60, 96, 16;
|
|
L_0x8d323ca00 .part L_0x8d322fac0, 112, 16;
|
|
L_0x8d323caa0 .part L_0x8d322fb60, 112, 16;
|
|
L_0x8d3238960 .arith/sum 40, L_0x8d3238000, L_0x8d3238140;
|
|
L_0x8d3238a00 .arith/sum 40, L_0x8d3238280, L_0x8d32383c0;
|
|
L_0x8d3238aa0 .arith/sum 40, L_0x8d3238500, L_0x8d3238640;
|
|
L_0x8d3238b40 .arith/sum 40, L_0x8d3238780, L_0x8d32388c0;
|
|
L_0x8d3238be0 .arith/sum 40, L_0x8d3238960, L_0x8d3238a00;
|
|
L_0x8d3238c80 .arith/sum 40, L_0x8d3238aa0, L_0x8d3238b40;
|
|
L_0x8d3238d20 .arith/sum 40, L_0x8d3238be0, L_0x8d3238c80;
|
|
L_0x8d3238dc0 .arith/sum 40, v0x8d2d163a0_0, L_0x8d3238d20;
|
|
S_0x8d320ae80 .scope module, "mac0" "mac_unit" 6 33, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306eac0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306eb00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306eb40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d11a40_0 .net/s *"_ivl_0", 31 0, L_0x8d2d22760; 1 drivers
|
|
v0x8d2d11ae0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d22800; 1 drivers
|
|
v0x8d2d11b80_0 .net *"_ivl_7", 0 0, L_0x8d322fc00; 1 drivers
|
|
v0x8d2d11c20_0 .net *"_ivl_9", 7 0, L_0x8d2d22940; 1 drivers
|
|
L_0x8d2855f48 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d11cc0_0 .net/s "acc_in", 39 0, L_0x8d2855f48; 1 drivers
|
|
v0x8d2d11d60_0 .net/s "acc_out", 39 0, L_0x8d3238000; alias, 1 drivers
|
|
v0x8d2d11e00_0 .net/s "product", 31 0, L_0x8d2d228a0; 1 drivers
|
|
v0x8d2d11ea0_0 .net/s "product_ext", 39 0, L_0x8d322bf20; 1 drivers
|
|
v0x8d2d11f40_0 .net/s "w", 15 0, L_0x8d322fd40; 1 drivers
|
|
v0x8d2d11fe0_0 .net/s "x", 15 0, L_0x8d322fca0; 1 drivers
|
|
L_0x8d2d22760 .extend/s 32, L_0x8d322fca0;
|
|
L_0x8d2d22800 .extend/s 32, L_0x8d322fd40;
|
|
L_0x8d2d228a0 .arith/mult 32, L_0x8d2d22760, L_0x8d2d22800;
|
|
L_0x8d322fc00 .part L_0x8d2d228a0, 31, 1;
|
|
L_0x8d2d22940 .repeat 8, 8, L_0x8d322fc00;
|
|
L_0x8d322bf20 .concat [ 32 8 0 0], L_0x8d2d228a0, L_0x8d2d22940;
|
|
L_0x8d3238000 .arith/sum 40, L_0x8d2855f48, L_0x8d322bf20;
|
|
S_0x8d320b000 .scope module, "mac1" "mac_unit" 6 43, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306eb80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ebc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ec00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d12080_0 .net/s *"_ivl_0", 31 0, L_0x8d2d229e0; 1 drivers
|
|
v0x8d2d12120_0 .net/s *"_ivl_2", 31 0, L_0x8d2d22a80; 1 drivers
|
|
v0x8d2d121c0_0 .net *"_ivl_7", 0 0, L_0x8d322fde0; 1 drivers
|
|
v0x8d2d12260_0 .net *"_ivl_9", 7 0, L_0x8d2d22bc0; 1 drivers
|
|
L_0x8d2855f90 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d12300_0 .net/s "acc_in", 39 0, L_0x8d2855f90; 1 drivers
|
|
v0x8d2d123a0_0 .net/s "acc_out", 39 0, L_0x8d3238140; alias, 1 drivers
|
|
v0x8d2d12440_0 .net/s "product", 31 0, L_0x8d2d22b20; 1 drivers
|
|
v0x8d2d124e0_0 .net/s "product_ext", 39 0, L_0x8d32380a0; 1 drivers
|
|
v0x8d2d12580_0 .net/s "w", 15 0, L_0x8d322ff20; 1 drivers
|
|
v0x8d2d12620_0 .net/s "x", 15 0, L_0x8d322fe80; 1 drivers
|
|
L_0x8d2d229e0 .extend/s 32, L_0x8d322fe80;
|
|
L_0x8d2d22a80 .extend/s 32, L_0x8d322ff20;
|
|
L_0x8d2d22b20 .arith/mult 32, L_0x8d2d229e0, L_0x8d2d22a80;
|
|
L_0x8d322fde0 .part L_0x8d2d22b20, 31, 1;
|
|
L_0x8d2d22bc0 .repeat 8, 8, L_0x8d322fde0;
|
|
L_0x8d32380a0 .concat [ 32 8 0 0], L_0x8d2d22b20, L_0x8d2d22bc0;
|
|
L_0x8d3238140 .arith/sum 40, L_0x8d2855f90, L_0x8d32380a0;
|
|
S_0x8d320b180 .scope module, "mac2" "mac_unit" 6 53, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ec40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ec80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ecc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d126c0_0 .net/s *"_ivl_0", 31 0, L_0x8d2d22c60; 1 drivers
|
|
v0x8d2d12760_0 .net/s *"_ivl_2", 31 0, L_0x8d2d22d00; 1 drivers
|
|
v0x8d2d12800_0 .net *"_ivl_7", 0 0, L_0x8d323c000; 1 drivers
|
|
v0x8d2d128a0_0 .net *"_ivl_9", 7 0, L_0x8d2d22e40; 1 drivers
|
|
L_0x8d2855fd8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d12940_0 .net/s "acc_in", 39 0, L_0x8d2855fd8; 1 drivers
|
|
v0x8d2d129e0_0 .net/s "acc_out", 39 0, L_0x8d3238280; alias, 1 drivers
|
|
v0x8d2d12a80_0 .net/s "product", 31 0, L_0x8d2d22da0; 1 drivers
|
|
v0x8d2d12b20_0 .net/s "product_ext", 39 0, L_0x8d32381e0; 1 drivers
|
|
v0x8d2d12bc0_0 .net/s "w", 15 0, L_0x8d323c140; 1 drivers
|
|
v0x8d2d12c60_0 .net/s "x", 15 0, L_0x8d323c0a0; 1 drivers
|
|
L_0x8d2d22c60 .extend/s 32, L_0x8d323c0a0;
|
|
L_0x8d2d22d00 .extend/s 32, L_0x8d323c140;
|
|
L_0x8d2d22da0 .arith/mult 32, L_0x8d2d22c60, L_0x8d2d22d00;
|
|
L_0x8d323c000 .part L_0x8d2d22da0, 31, 1;
|
|
L_0x8d2d22e40 .repeat 8, 8, L_0x8d323c000;
|
|
L_0x8d32381e0 .concat [ 32 8 0 0], L_0x8d2d22da0, L_0x8d2d22e40;
|
|
L_0x8d3238280 .arith/sum 40, L_0x8d2855fd8, L_0x8d32381e0;
|
|
S_0x8d320b300 .scope module, "mac3" "mac_unit" 6 63, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ed00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ed40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ed80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d12d00_0 .net/s *"_ivl_0", 31 0, L_0x8d2d22ee0; 1 drivers
|
|
v0x8d2d12da0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d22f80; 1 drivers
|
|
v0x8d2d12e40_0 .net *"_ivl_7", 0 0, L_0x8d323c1e0; 1 drivers
|
|
v0x8d2d12ee0_0 .net *"_ivl_9", 7 0, L_0x8d2d230c0; 1 drivers
|
|
L_0x8d2856020 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d12f80_0 .net/s "acc_in", 39 0, L_0x8d2856020; 1 drivers
|
|
v0x8d2d13020_0 .net/s "acc_out", 39 0, L_0x8d32383c0; alias, 1 drivers
|
|
v0x8d2d130c0_0 .net/s "product", 31 0, L_0x8d2d23020; 1 drivers
|
|
v0x8d2d13160_0 .net/s "product_ext", 39 0, L_0x8d3238320; 1 drivers
|
|
v0x8d2d13200_0 .net/s "w", 15 0, L_0x8d323c320; 1 drivers
|
|
v0x8d2d132a0_0 .net/s "x", 15 0, L_0x8d323c280; 1 drivers
|
|
L_0x8d2d22ee0 .extend/s 32, L_0x8d323c280;
|
|
L_0x8d2d22f80 .extend/s 32, L_0x8d323c320;
|
|
L_0x8d2d23020 .arith/mult 32, L_0x8d2d22ee0, L_0x8d2d22f80;
|
|
L_0x8d323c1e0 .part L_0x8d2d23020, 31, 1;
|
|
L_0x8d2d230c0 .repeat 8, 8, L_0x8d323c1e0;
|
|
L_0x8d3238320 .concat [ 32 8 0 0], L_0x8d2d23020, L_0x8d2d230c0;
|
|
L_0x8d32383c0 .arith/sum 40, L_0x8d2856020, L_0x8d3238320;
|
|
S_0x8d320b480 .scope module, "mac4" "mac_unit" 6 73, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306edc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ee00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ee40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d13340_0 .net/s *"_ivl_0", 31 0, L_0x8d2d23160; 1 drivers
|
|
v0x8d2d133e0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d23200; 1 drivers
|
|
v0x8d2d13480_0 .net *"_ivl_7", 0 0, L_0x8d323c3c0; 1 drivers
|
|
v0x8d2d13520_0 .net *"_ivl_9", 7 0, L_0x8d2d23340; 1 drivers
|
|
L_0x8d2856068 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d135c0_0 .net/s "acc_in", 39 0, L_0x8d2856068; 1 drivers
|
|
v0x8d2d13660_0 .net/s "acc_out", 39 0, L_0x8d3238500; alias, 1 drivers
|
|
v0x8d2d13700_0 .net/s "product", 31 0, L_0x8d2d232a0; 1 drivers
|
|
v0x8d2d137a0_0 .net/s "product_ext", 39 0, L_0x8d3238460; 1 drivers
|
|
v0x8d2d13840_0 .net/s "w", 15 0, L_0x8d323c500; 1 drivers
|
|
v0x8d2d138e0_0 .net/s "x", 15 0, L_0x8d323c460; 1 drivers
|
|
L_0x8d2d23160 .extend/s 32, L_0x8d323c460;
|
|
L_0x8d2d23200 .extend/s 32, L_0x8d323c500;
|
|
L_0x8d2d232a0 .arith/mult 32, L_0x8d2d23160, L_0x8d2d23200;
|
|
L_0x8d323c3c0 .part L_0x8d2d232a0, 31, 1;
|
|
L_0x8d2d23340 .repeat 8, 8, L_0x8d323c3c0;
|
|
L_0x8d3238460 .concat [ 32 8 0 0], L_0x8d2d232a0, L_0x8d2d23340;
|
|
L_0x8d3238500 .arith/sum 40, L_0x8d2856068, L_0x8d3238460;
|
|
S_0x8d320b600 .scope module, "mac5" "mac_unit" 6 83, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ee80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306eec0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306ef00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d13980_0 .net/s *"_ivl_0", 31 0, L_0x8d2d233e0; 1 drivers
|
|
v0x8d2d13a20_0 .net/s *"_ivl_2", 31 0, L_0x8d2d23480; 1 drivers
|
|
v0x8d2d13ac0_0 .net *"_ivl_7", 0 0, L_0x8d323c5a0; 1 drivers
|
|
v0x8d2d13b60_0 .net *"_ivl_9", 7 0, L_0x8d2d235c0; 1 drivers
|
|
L_0x8d28560b0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d13c00_0 .net/s "acc_in", 39 0, L_0x8d28560b0; 1 drivers
|
|
v0x8d2d13ca0_0 .net/s "acc_out", 39 0, L_0x8d3238640; alias, 1 drivers
|
|
v0x8d2d13d40_0 .net/s "product", 31 0, L_0x8d2d23520; 1 drivers
|
|
v0x8d2d13de0_0 .net/s "product_ext", 39 0, L_0x8d32385a0; 1 drivers
|
|
v0x8d2d13e80_0 .net/s "w", 15 0, L_0x8d323c6e0; 1 drivers
|
|
v0x8d2d13f20_0 .net/s "x", 15 0, L_0x8d323c640; 1 drivers
|
|
L_0x8d2d233e0 .extend/s 32, L_0x8d323c640;
|
|
L_0x8d2d23480 .extend/s 32, L_0x8d323c6e0;
|
|
L_0x8d2d23520 .arith/mult 32, L_0x8d2d233e0, L_0x8d2d23480;
|
|
L_0x8d323c5a0 .part L_0x8d2d23520, 31, 1;
|
|
L_0x8d2d235c0 .repeat 8, 8, L_0x8d323c5a0;
|
|
L_0x8d32385a0 .concat [ 32 8 0 0], L_0x8d2d23520, L_0x8d2d235c0;
|
|
L_0x8d3238640 .arith/sum 40, L_0x8d28560b0, L_0x8d32385a0;
|
|
S_0x8d320b780 .scope module, "mac6" "mac_unit" 6 93, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306ef40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306ef80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306efc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d14000_0 .net/s *"_ivl_0", 31 0, L_0x8d2d23660; 1 drivers
|
|
v0x8d2d140a0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d23700; 1 drivers
|
|
v0x8d2d14140_0 .net *"_ivl_7", 0 0, L_0x8d323c780; 1 drivers
|
|
v0x8d2d141e0_0 .net *"_ivl_9", 7 0, L_0x8d2d23840; 1 drivers
|
|
L_0x8d28560f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d14280_0 .net/s "acc_in", 39 0, L_0x8d28560f8; 1 drivers
|
|
v0x8d2d14320_0 .net/s "acc_out", 39 0, L_0x8d3238780; alias, 1 drivers
|
|
v0x8d2d143c0_0 .net/s "product", 31 0, L_0x8d2d237a0; 1 drivers
|
|
v0x8d2d14460_0 .net/s "product_ext", 39 0, L_0x8d32386e0; 1 drivers
|
|
v0x8d2d14500_0 .net/s "w", 15 0, L_0x8d323c8c0; 1 drivers
|
|
v0x8d2d145a0_0 .net/s "x", 15 0, L_0x8d323c820; 1 drivers
|
|
L_0x8d2d23660 .extend/s 32, L_0x8d323c820;
|
|
L_0x8d2d23700 .extend/s 32, L_0x8d323c8c0;
|
|
L_0x8d2d237a0 .arith/mult 32, L_0x8d2d23660, L_0x8d2d23700;
|
|
L_0x8d323c780 .part L_0x8d2d237a0, 31, 1;
|
|
L_0x8d2d23840 .repeat 8, 8, L_0x8d323c780;
|
|
L_0x8d32386e0 .concat [ 32 8 0 0], L_0x8d2d237a0, L_0x8d2d23840;
|
|
L_0x8d3238780 .arith/sum 40, L_0x8d28560f8, L_0x8d32386e0;
|
|
S_0x8d320b900 .scope module, "mac7" "mac_unit" 6 103, 7 1 0, S_0x8d320ad00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 16 "x";
|
|
.port_info 1 /INPUT 16 "w";
|
|
.port_info 2 /INPUT 40 "acc_in";
|
|
.port_info 3 /OUTPUT 40 "acc_out";
|
|
P_0x8d306f000 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>;
|
|
P_0x8d306f040 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>;
|
|
P_0x8d306f080 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>;
|
|
v0x8d2d14640_0 .net/s *"_ivl_0", 31 0, L_0x8d2d238e0; 1 drivers
|
|
v0x8d2d146e0_0 .net/s *"_ivl_2", 31 0, L_0x8d2d23980; 1 drivers
|
|
v0x8d2d14780_0 .net *"_ivl_7", 0 0, L_0x8d323c960; 1 drivers
|
|
v0x8d2d14820_0 .net *"_ivl_9", 7 0, L_0x8d2d23ac0; 1 drivers
|
|
L_0x8d2856140 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x8d2d148c0_0 .net/s "acc_in", 39 0, L_0x8d2856140; 1 drivers
|
|
v0x8d2d14960_0 .net/s "acc_out", 39 0, L_0x8d32388c0; alias, 1 drivers
|
|
v0x8d2d14a00_0 .net/s "product", 31 0, L_0x8d2d23a20; 1 drivers
|
|
v0x8d2d14aa0_0 .net/s "product_ext", 39 0, L_0x8d3238820; 1 drivers
|
|
v0x8d2d14b40_0 .net/s "w", 15 0, L_0x8d323caa0; 1 drivers
|
|
v0x8d2d14be0_0 .net/s "x", 15 0, L_0x8d323ca00; 1 drivers
|
|
L_0x8d2d238e0 .extend/s 32, L_0x8d323ca00;
|
|
L_0x8d2d23980 .extend/s 32, L_0x8d323caa0;
|
|
L_0x8d2d23a20 .arith/mult 32, L_0x8d2d238e0, L_0x8d2d23980;
|
|
L_0x8d323c960 .part L_0x8d2d23a20, 31, 1;
|
|
L_0x8d2d23ac0 .repeat 8, 8, L_0x8d323c960;
|
|
L_0x8d3238820 .concat [ 32 8 0 0], L_0x8d2d23a20, L_0x8d2d23ac0;
|
|
L_0x8d32388c0 .arith/sum 40, L_0x8d2856140, L_0x8d3238820;
|
|
S_0x8d320ba80 .scope function.vec4.u16, "q8_8" "q8_8" 3 56, 3 56 0, S_0x102e63dc0;
|
|
.timescale 0 0;
|
|
; Variable q8_8 is vec4 return value of scope S_0x8d320ba80
|
|
v0x8d2d17660_0 .var/real "value", 0 0;
|
|
TD_tb.q8_8 ;
|
|
%load/real v0x8d2d17660_0;
|
|
%pushi/real 1073741824, 4074; load=256.000
|
|
%mul/wr;
|
|
%vpi_func 3 59 "$rtoi" 32, W<0,r> {0 1 0};
|
|
%pad/s 16;
|
|
%ret/vec4 0, 0, 16; Assign to q8_8 (store_vec4_to_lval)
|
|
%end;
|
|
S_0x8d320bc00 .scope task, "run_layer" "run_layer" 3 63, 3 63 0, S_0x102e63dc0;
|
|
.timescale 0 0;
|
|
E_0x8d2ce4380 .event anyedge, v0x8d2d170c0_0;
|
|
TD_tb.run_layer ;
|
|
%wait E_0x8d2ce4340;
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x8d2d17b60_0, 0, 1;
|
|
%wait E_0x8d2ce4340;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x8d2d17b60_0, 0, 1;
|
|
T_1.0 ;
|
|
%load/vec4 v0x8d2d178e0_0;
|
|
%pad/u 32;
|
|
%pushi/vec4 1, 0, 32;
|
|
%cmp/e;
|
|
%flag_get/vec4 4;
|
|
%cmpi/ne 1, 0, 1;
|
|
%jmp/0xz T_1.1, 6;
|
|
%wait E_0x8d2ce4380;
|
|
%jmp T_1.0;
|
|
T_1.1 ;
|
|
%wait E_0x8d2ce4340;
|
|
%end;
|
|
.scope S_0x102e579a0;
|
|
T_2 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2ced9a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2ced900_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2ced2c0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2cedd60_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2ced5e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2ced720_0, 0;
|
|
%jmp T_2.1;
|
|
T_2.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2ced720_0, 0;
|
|
%load/vec4 v0x8d2ceda40_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_2.4, 9;
|
|
%load/vec4 v0x8d2ced5e0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_2.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2ced900_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2ced2c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2ced5e0_0, 0;
|
|
%jmp T_2.3;
|
|
T_2.2 ;
|
|
%load/vec4 v0x8d2ced5e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.5, 8;
|
|
%load/vec4 v0x8d2ced900_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_2.7, 4;
|
|
%load/vec4 v0x8d2ced7c0_0;
|
|
%assign/vec4 v0x8d2ced2c0_0, 0;
|
|
%load/vec4 v0x8d2ced860_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_2.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2cedd60_0, 0;
|
|
%jmp T_2.10;
|
|
T_2.9 ;
|
|
%load/vec4 v0x8d2ced860_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_2.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2cedd60_0, 0;
|
|
%jmp T_2.12;
|
|
T_2.11 ;
|
|
%load/vec4 v0x8d2ced860_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2cedd60_0, 0;
|
|
T_2.12 ;
|
|
T_2.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2ced5e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2ced720_0, 0;
|
|
%jmp T_2.8;
|
|
T_2.7 ;
|
|
%load/vec4 v0x8d2ced360_0;
|
|
%assign/vec4 v0x8d2ced2c0_0, 0;
|
|
%load/vec4 v0x8d2ced900_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2ced900_0, 0;
|
|
T_2.8 ;
|
|
T_2.5 ;
|
|
T_2.3 ;
|
|
T_2.1 ;
|
|
%jmp T_2;
|
|
.thread T_2;
|
|
.scope S_0x8d31fc780;
|
|
T_3 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2cf2e40_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2cf2da0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2cf2760_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2cf3200_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cf2a80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cf2bc0_0, 0;
|
|
%jmp T_3.1;
|
|
T_3.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cf2bc0_0, 0;
|
|
%load/vec4 v0x8d2cf2ee0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_3.4, 9;
|
|
%load/vec4 v0x8d2cf2a80_0;
|
|
%nor/r;
|
|
%and;
|
|
T_3.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2cf2da0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2cf2760_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2cf2a80_0, 0;
|
|
%jmp T_3.3;
|
|
T_3.2 ;
|
|
%load/vec4 v0x8d2cf2a80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.5, 8;
|
|
%load/vec4 v0x8d2cf2da0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_3.7, 4;
|
|
%load/vec4 v0x8d2cf2c60_0;
|
|
%assign/vec4 v0x8d2cf2760_0, 0;
|
|
%load/vec4 v0x8d2cf2d00_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_3.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2cf3200_0, 0;
|
|
%jmp T_3.10;
|
|
T_3.9 ;
|
|
%load/vec4 v0x8d2cf2d00_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_3.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2cf3200_0, 0;
|
|
%jmp T_3.12;
|
|
T_3.11 ;
|
|
%load/vec4 v0x8d2cf2d00_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2cf3200_0, 0;
|
|
T_3.12 ;
|
|
T_3.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cf2a80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2cf2bc0_0, 0;
|
|
%jmp T_3.8;
|
|
T_3.7 ;
|
|
%load/vec4 v0x8d2cf2800_0;
|
|
%assign/vec4 v0x8d2cf2760_0, 0;
|
|
%load/vec4 v0x8d2cf2da0_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2cf2da0_0, 0;
|
|
T_3.8 ;
|
|
T_3.5 ;
|
|
T_3.3 ;
|
|
T_3.1 ;
|
|
%jmp T_3;
|
|
.thread T_3;
|
|
.scope S_0x8d31fd800;
|
|
T_4 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2cfc320_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2cfc280_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2cf7c00_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2cfc6e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cf7f20_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cfc0a0_0, 0;
|
|
%jmp T_4.1;
|
|
T_4.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cfc0a0_0, 0;
|
|
%load/vec4 v0x8d2cfc3c0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_4.4, 9;
|
|
%load/vec4 v0x8d2cf7f20_0;
|
|
%nor/r;
|
|
%and;
|
|
T_4.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2cfc280_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2cf7c00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2cf7f20_0, 0;
|
|
%jmp T_4.3;
|
|
T_4.2 ;
|
|
%load/vec4 v0x8d2cf7f20_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.5, 8;
|
|
%load/vec4 v0x8d2cfc280_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_4.7, 4;
|
|
%load/vec4 v0x8d2cfc140_0;
|
|
%assign/vec4 v0x8d2cf7c00_0, 0;
|
|
%load/vec4 v0x8d2cfc1e0_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_4.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2cfc6e0_0, 0;
|
|
%jmp T_4.10;
|
|
T_4.9 ;
|
|
%load/vec4 v0x8d2cfc1e0_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_4.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2cfc6e0_0, 0;
|
|
%jmp T_4.12;
|
|
T_4.11 ;
|
|
%load/vec4 v0x8d2cfc1e0_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2cfc6e0_0, 0;
|
|
T_4.12 ;
|
|
T_4.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2cf7f20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2cfc0a0_0, 0;
|
|
%jmp T_4.8;
|
|
T_4.7 ;
|
|
%load/vec4 v0x8d2cf7ca0_0;
|
|
%assign/vec4 v0x8d2cf7c00_0, 0;
|
|
%load/vec4 v0x8d2cfc280_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2cfc280_0, 0;
|
|
T_4.8 ;
|
|
T_4.5 ;
|
|
T_4.3 ;
|
|
T_4.1 ;
|
|
%jmp T_4;
|
|
.thread T_4;
|
|
.scope S_0x8d31fe880;
|
|
T_5 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2d017c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d01720_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d010e0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d01b80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d01400_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d01540_0, 0;
|
|
%jmp T_5.1;
|
|
T_5.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d01540_0, 0;
|
|
%load/vec4 v0x8d2d01860_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_5.4, 9;
|
|
%load/vec4 v0x8d2d01400_0;
|
|
%nor/r;
|
|
%and;
|
|
T_5.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d01720_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d010e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d01400_0, 0;
|
|
%jmp T_5.3;
|
|
T_5.2 ;
|
|
%load/vec4 v0x8d2d01400_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.5, 8;
|
|
%load/vec4 v0x8d2d01720_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_5.7, 4;
|
|
%load/vec4 v0x8d2d015e0_0;
|
|
%assign/vec4 v0x8d2d010e0_0, 0;
|
|
%load/vec4 v0x8d2d01680_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_5.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d01b80_0, 0;
|
|
%jmp T_5.10;
|
|
T_5.9 ;
|
|
%load/vec4 v0x8d2d01680_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_5.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2d01b80_0, 0;
|
|
%jmp T_5.12;
|
|
T_5.11 ;
|
|
%load/vec4 v0x8d2d01680_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2d01b80_0, 0;
|
|
T_5.12 ;
|
|
T_5.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d01400_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d01540_0, 0;
|
|
%jmp T_5.8;
|
|
T_5.7 ;
|
|
%load/vec4 v0x8d2d01180_0;
|
|
%assign/vec4 v0x8d2d010e0_0, 0;
|
|
%load/vec4 v0x8d2d01720_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2d01720_0, 0;
|
|
T_5.8 ;
|
|
T_5.5 ;
|
|
T_5.3 ;
|
|
T_5.1 ;
|
|
%jmp T_5;
|
|
.thread T_5;
|
|
.scope S_0x8d31ff900;
|
|
T_6 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2d06c60_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d06bc0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d06580_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d07020_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d068a0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d069e0_0, 0;
|
|
%jmp T_6.1;
|
|
T_6.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d069e0_0, 0;
|
|
%load/vec4 v0x8d2d06d00_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_6.4, 9;
|
|
%load/vec4 v0x8d2d068a0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_6.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d06bc0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d06580_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d068a0_0, 0;
|
|
%jmp T_6.3;
|
|
T_6.2 ;
|
|
%load/vec4 v0x8d2d068a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.5, 8;
|
|
%load/vec4 v0x8d2d06bc0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_6.7, 4;
|
|
%load/vec4 v0x8d2d06a80_0;
|
|
%assign/vec4 v0x8d2d06580_0, 0;
|
|
%load/vec4 v0x8d2d06b20_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_6.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d07020_0, 0;
|
|
%jmp T_6.10;
|
|
T_6.9 ;
|
|
%load/vec4 v0x8d2d06b20_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_6.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2d07020_0, 0;
|
|
%jmp T_6.12;
|
|
T_6.11 ;
|
|
%load/vec4 v0x8d2d06b20_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2d07020_0, 0;
|
|
T_6.12 ;
|
|
T_6.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d068a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d069e0_0, 0;
|
|
%jmp T_6.8;
|
|
T_6.7 ;
|
|
%load/vec4 v0x8d2d06620_0;
|
|
%assign/vec4 v0x8d2d06580_0, 0;
|
|
%load/vec4 v0x8d2d06bc0_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2d06bc0_0, 0;
|
|
T_6.8 ;
|
|
T_6.5 ;
|
|
T_6.3 ;
|
|
T_6.1 ;
|
|
%jmp T_6;
|
|
.thread T_6;
|
|
.scope S_0x8d3208a80;
|
|
T_7 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2d0c140_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d0c0a0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d0ba20_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d0c500_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d0bd40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d0be80_0, 0;
|
|
%jmp T_7.1;
|
|
T_7.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d0be80_0, 0;
|
|
%load/vec4 v0x8d2d0c1e0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_7.4, 9;
|
|
%load/vec4 v0x8d2d0bd40_0;
|
|
%nor/r;
|
|
%and;
|
|
T_7.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d0c0a0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d0ba20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d0bd40_0, 0;
|
|
%jmp T_7.3;
|
|
T_7.2 ;
|
|
%load/vec4 v0x8d2d0bd40_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.5, 8;
|
|
%load/vec4 v0x8d2d0c0a0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_7.7, 4;
|
|
%load/vec4 v0x8d2d0bf20_0;
|
|
%assign/vec4 v0x8d2d0ba20_0, 0;
|
|
%load/vec4 v0x8d2d0c000_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_7.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d0c500_0, 0;
|
|
%jmp T_7.10;
|
|
T_7.9 ;
|
|
%load/vec4 v0x8d2d0c000_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_7.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2d0c500_0, 0;
|
|
%jmp T_7.12;
|
|
T_7.11 ;
|
|
%load/vec4 v0x8d2d0c000_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2d0c500_0, 0;
|
|
T_7.12 ;
|
|
T_7.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d0bd40_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d0be80_0, 0;
|
|
%jmp T_7.8;
|
|
T_7.7 ;
|
|
%load/vec4 v0x8d2d0bac0_0;
|
|
%assign/vec4 v0x8d2d0ba20_0, 0;
|
|
%load/vec4 v0x8d2d0c0a0_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2d0c0a0_0, 0;
|
|
T_7.8 ;
|
|
T_7.5 ;
|
|
T_7.3 ;
|
|
T_7.1 ;
|
|
%jmp T_7;
|
|
.thread T_7;
|
|
.scope S_0x8d3209b00;
|
|
T_8 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2d115e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d11540_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d10f00_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d119a0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d11220_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d11360_0, 0;
|
|
%jmp T_8.1;
|
|
T_8.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d11360_0, 0;
|
|
%load/vec4 v0x8d2d11680_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_8.4, 9;
|
|
%load/vec4 v0x8d2d11220_0;
|
|
%nor/r;
|
|
%and;
|
|
T_8.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d11540_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d10f00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d11220_0, 0;
|
|
%jmp T_8.3;
|
|
T_8.2 ;
|
|
%load/vec4 v0x8d2d11220_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.5, 8;
|
|
%load/vec4 v0x8d2d11540_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_8.7, 4;
|
|
%load/vec4 v0x8d2d11400_0;
|
|
%assign/vec4 v0x8d2d10f00_0, 0;
|
|
%load/vec4 v0x8d2d114a0_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_8.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d119a0_0, 0;
|
|
%jmp T_8.10;
|
|
T_8.9 ;
|
|
%load/vec4 v0x8d2d114a0_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_8.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2d119a0_0, 0;
|
|
%jmp T_8.12;
|
|
T_8.11 ;
|
|
%load/vec4 v0x8d2d114a0_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2d119a0_0, 0;
|
|
T_8.12 ;
|
|
T_8.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d11220_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d11360_0, 0;
|
|
%jmp T_8.8;
|
|
T_8.7 ;
|
|
%load/vec4 v0x8d2d10fa0_0;
|
|
%assign/vec4 v0x8d2d10f00_0, 0;
|
|
%load/vec4 v0x8d2d11540_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2d11540_0, 0;
|
|
T_8.8 ;
|
|
T_8.5 ;
|
|
T_8.3 ;
|
|
T_8.1 ;
|
|
%jmp T_8;
|
|
.thread T_8;
|
|
.scope S_0x8d320ab80;
|
|
T_9 ;
|
|
%wait E_0x8d2ce4340;
|
|
%load/vec4 v0x8d2d16a80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d169e0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d163a0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d16e40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d166c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d16800_0, 0;
|
|
%jmp T_9.1;
|
|
T_9.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d16800_0, 0;
|
|
%load/vec4 v0x8d2d16b20_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_9.4, 9;
|
|
%load/vec4 v0x8d2d166c0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_9.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.2, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x8d2d169e0_0, 0;
|
|
%pushi/vec4 0, 0, 40;
|
|
%assign/vec4 v0x8d2d163a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d166c0_0, 0;
|
|
%jmp T_9.3;
|
|
T_9.2 ;
|
|
%load/vec4 v0x8d2d166c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.5, 8;
|
|
%load/vec4 v0x8d2d169e0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 7, 0, 32;
|
|
%jmp/0xz T_9.7, 4;
|
|
%load/vec4 v0x8d2d168a0_0;
|
|
%assign/vec4 v0x8d2d163a0_0, 0;
|
|
%load/vec4 v0x8d2d16940_0;
|
|
%cmpi/s 0, 0, 40;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_9.9, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x8d2d16e40_0, 0;
|
|
%jmp T_9.10;
|
|
T_9.9 ;
|
|
%load/vec4 v0x8d2d16940_0;
|
|
%cmpi/s 32767, 0, 40;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_9.11, 5;
|
|
%pushi/vec4 32767, 0, 16;
|
|
%assign/vec4 v0x8d2d16e40_0, 0;
|
|
%jmp T_9.12;
|
|
T_9.11 ;
|
|
%load/vec4 v0x8d2d16940_0;
|
|
%parti/s 16, 0, 2;
|
|
%assign/vec4 v0x8d2d16e40_0, 0;
|
|
T_9.12 ;
|
|
T_9.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x8d2d166c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x8d2d16800_0, 0;
|
|
%jmp T_9.8;
|
|
T_9.7 ;
|
|
%load/vec4 v0x8d2d16440_0;
|
|
%assign/vec4 v0x8d2d163a0_0, 0;
|
|
%load/vec4 v0x8d2d169e0_0;
|
|
%addi 1, 0, 3;
|
|
%assign/vec4 v0x8d2d169e0_0, 0;
|
|
T_9.8 ;
|
|
T_9.5 ;
|
|
T_9.3 ;
|
|
T_9.1 ;
|
|
%jmp T_9;
|
|
.thread T_9;
|
|
.scope S_0x102e63dc0;
|
|
T_10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x8d2d17840_0, 0, 1;
|
|
T_10.0 ;
|
|
%delay 5, 0;
|
|
%load/vec4 v0x8d2d17840_0;
|
|
%inv;
|
|
%store/vec4 v0x8d2d17840_0, 0, 1;
|
|
%jmp T_10.0;
|
|
T_10.1 ;
|
|
%end;
|
|
.thread T_10;
|
|
.scope S_0x102e63dc0;
|
|
T_11 ;
|
|
%vpi_call/w 3 79 "$dumpfile", "sim/layer.vcd" {0 0 0};
|
|
%vpi_call/w 3 80 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x102e63dc0 {0 0 0};
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x8d2d17ac0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x8d2d17b60_0, 0, 1;
|
|
%pushi/vec4 0, 0, 1024;
|
|
%store/vec4 v0x8d2d17ca0_0, 0, 1024;
|
|
%pushi/vec4 0, 0, 8192;
|
|
%store/vec4 v0x8d2d17c00_0, 0, 8192;
|
|
%pushi/vec4 0, 0, 128;
|
|
%store/vec4 v0x8d2d17700_0, 0, 128;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
%pushi/vec4 2, 0, 32;
|
|
T_11.0 %dup/vec4;
|
|
%cmpi/s 0, 0, 32;
|
|
%jmp/1xz T_11.1, 5;
|
|
%jmp/1 T_11.1, 4;
|
|
%subi 1, 0, 32;
|
|
%wait E_0x8d2ce4340;
|
|
%jmp T_11.0;
|
|
T_11.1 ;
|
|
%pop/vec4 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x8d2d17ac0_0, 0, 1;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.2 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.3, 5;
|
|
%pushi/real 1073741824, 4066; load=1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17ca0_0, 4, 16;
|
|
T_11.4 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.2;
|
|
T_11.3 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.5 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.6, 5;
|
|
%pushi/real 1073741824, 4066; load=1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%pushi/vec4 0, 0, 32;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17c00_0, 4, 16;
|
|
T_11.7 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.5;
|
|
T_11.6 ; for-loop exit label
|
|
%pushi/real 0, 4065; load=0.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%ix/load 4, 0, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x8d2d17700_0, 4, 16;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.8 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.9, 5;
|
|
%pushi/real 1073741824, 4065; load=0.500000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%pushi/vec4 1024, 0, 32;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17c00_0, 4, 16;
|
|
T_11.10 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.8;
|
|
T_11.9 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.11 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.12, 5;
|
|
%pushi/real 1073741824, 20449; load=-0.500000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%pushi/vec4 2048, 0, 32;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17c00_0, 4, 16;
|
|
T_11.13 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.11;
|
|
T_11.12 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.14 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.15, 5;
|
|
%pushi/real 1073741824, 4067; load=2.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%pushi/vec4 3072, 0, 32;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17c00_0, 4, 16;
|
|
T_11.16 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.14;
|
|
T_11.15 ; for-loop exit label
|
|
%pushi/real 1073741824, 4066; load=1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%ix/load 4, 64, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x8d2d17700_0, 4, 16;
|
|
%pushi/real 1073741824, 20450; load=-1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%ix/load 4, 80, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x8d2d17700_0, 4, 16;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.17 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.18, 5;
|
|
%pushi/real 1073741824, 4066; load=1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%pushi/vec4 6144, 0, 32;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17c00_0, 4, 16;
|
|
T_11.19 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.17;
|
|
T_11.18 ; for-loop exit label
|
|
%pushi/real 1073741824, 20450; load=-1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%ix/load 4, 96, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x8d2d17700_0, 4, 16;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
T_11.20 ; Top of for-loop
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%cmpi/s 64, 0, 32;
|
|
%jmp/0xz T_11.21, 5;
|
|
%pushi/real 1073741824, 4064; load=0.250000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%pushi/vec4 7168, 0, 32;
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%muli 16, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x8d2d17c00_0, 4, 16;
|
|
T_11.22 ; for-loop step statement
|
|
%load/vec4 v0x8d2d17a20_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17a20_0, 0, 32;
|
|
%jmp T_11.20;
|
|
T_11.21 ; for-loop exit label
|
|
%pushi/real 1073741824, 4066; load=1.00000
|
|
%store/real v0x8d2d17660_0;
|
|
%callf/vec4 TD_tb.q8_8, S_0x8d320ba80;
|
|
%ix/load 4, 112, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x8d2d17700_0, 4, 16;
|
|
%vpi_call/w 3 197 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 3 198 "$display", "==============================" {0 0 0};
|
|
%vpi_call/w 3 199 "$display", "LAYER TEST" {0 0 0};
|
|
%vpi_call/w 3 200 "$display", "==============================" {0 0 0};
|
|
%fork TD_tb.run_layer, S_0x8d320bc00;
|
|
%join;
|
|
%vpi_call/w 3 204 "$display", "Neuron 0 = %5d expected = 16384", &PV<v0x8d2d17d40_0, 0, 16> {0 0 0};
|
|
%vpi_call/w 3 205 "$display", "Neuron 1 = %5d expected = 8192", &PV<v0x8d2d17d40_0, 16, 16> {0 0 0};
|
|
%vpi_call/w 3 206 "$display", "Neuron 2 = %5d expected = 0", &PV<v0x8d2d17d40_0, 32, 16> {0 0 0};
|
|
%vpi_call/w 3 207 "$display", "Neuron 3 = %5d expected = 32767", &PV<v0x8d2d17d40_0, 48, 16> {0 0 0};
|
|
%vpi_call/w 3 208 "$display", "Neuron 4 = %5d expected = 256", &PV<v0x8d2d17d40_0, 64, 16> {0 0 0};
|
|
%vpi_call/w 3 209 "$display", "Neuron 5 = %5d expected = 0", &PV<v0x8d2d17d40_0, 80, 16> {0 0 0};
|
|
%vpi_call/w 3 210 "$display", "Neuron 6 = %5d expected = 16128", &PV<v0x8d2d17d40_0, 96, 16> {0 0 0};
|
|
%vpi_call/w 3 211 "$display", "Neuron 7 = %5d expected = 4352", &PV<v0x8d2d17d40_0, 112, 16> {0 0 0};
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 0, 2;
|
|
%cmpi/ne 16384, 0, 16;
|
|
%jmp/0xz T_11.23, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.23 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 16, 6;
|
|
%cmpi/ne 8192, 0, 16;
|
|
%jmp/0xz T_11.25, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.25 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 32, 7;
|
|
%cmpi/ne 0, 0, 16;
|
|
%jmp/0xz T_11.27, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.27 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 48, 7;
|
|
%cmpi/ne 32767, 0, 16;
|
|
%jmp/0xz T_11.29, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.29 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 64, 8;
|
|
%cmpi/ne 256, 0, 16;
|
|
%jmp/0xz T_11.31, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.31 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 80, 8;
|
|
%cmpi/ne 0, 0, 16;
|
|
%jmp/0xz T_11.33, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.33 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 96, 8;
|
|
%cmpi/ne 16128, 0, 16;
|
|
%jmp/0xz T_11.35, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.35 ;
|
|
%load/vec4 v0x8d2d17d40_0;
|
|
%parti/s 16, 112, 8;
|
|
%cmpi/ne 4352, 0, 16;
|
|
%jmp/0xz T_11.37, 6;
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x8d2d17980_0, 0, 32;
|
|
T_11.37 ;
|
|
%vpi_call/w 3 222 "$display", "busy = %0d", v0x8d2d177a0_0 {0 0 0};
|
|
%vpi_call/w 3 223 "$display", "done = %0d", v0x8d2d178e0_0 {0 0 0};
|
|
%vpi_call/w 3 225 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 3 226 "$display", "==============================" {0 0 0};
|
|
%load/vec4 v0x8d2d17980_0;
|
|
%cmpi/e 0, 0, 32;
|
|
%jmp/0xz T_11.39, 4;
|
|
%vpi_call/w 3 229 "$display", "PASS - ALL 8 NEURONS" {0 0 0};
|
|
%jmp T_11.40;
|
|
T_11.39 ;
|
|
%vpi_call/w 3 231 "$display", "FAIL - %0d ERRORS", v0x8d2d17980_0 {0 0 0};
|
|
T_11.40 ;
|
|
%vpi_call/w 3 233 "$display", "==============================" {0 0 0};
|
|
%vpi_call/w 3 234 "$display", "LAYER TEST FINISHED" {0 0 0};
|
|
%vpi_call/w 3 235 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 3 237 "$finish" {0 0 0};
|
|
%end;
|
|
.thread T_11;
|
|
# The file index is used to find the file name in the following table.
|
|
:file_names 8;
|
|
"N/A";
|
|
"<interactive>";
|
|
"-";
|
|
"sim/layer_tb.v";
|
|
"rtl/layer.v";
|
|
"rtl/neuron_parallel.v";
|
|
"rtl/mac8.v";
|
|
"rtl/mac_unit.v";
|