micheleandClaude Sonnet 5
1a6f0ba2ef
Both Phase 2 findings (docs/FPGA-NeuralNetwork-Engine.md) shared one root cause: GROUPS = N_INPUTS / PARALLEL is integer division. When N_INPUTS is not an exact multiple of PARALLEL, the remainder inputs were silently dropped from the accumulation (wrong result, no error); when PARALLEL > N_INPUTS, GROUPS = 0 and the controller's terminal condition was never met, hanging the neuron forever. Added a single elaboration-time guard to rtl/neuron_parallel.v: a `generate` block instantiates a deliberately undefined module when N_INPUTS % PARALLEL != 0, forcing a hard failure in both simulation and synthesis instead of a silent wrong answer or a deadlock. Valid configurations are unaffected (the branch is never elaborated). The validated datapath (mac8/mac_unit/accumulation/ReLU/saturation) is untouched -- this is authorized as a scoped exception to the "core is fixed, do not touch" project policy, for this guard only. - sim/neuron_parallel_guard_negative_nonmultiple_tb.v and sim/neuron_parallel_guard_negative_degenerate_tb.v: negative tests that must fail to elaborate; verified both fail with the expected "Unknown module type" error. - sim/parameter_sweep_tb.v: rewritten to valid-configs-only (the three configs that used to demonstrate truncation/hang no longer compile, by design); added PARALLEL=2 and PARALLEL=4 configs, the two best-performing values from docs/FPGA-Neural-Datapatch-Benchmark.md. - Full regression re-run after the RTL change: all existing testbenches still pass unchanged. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01WQV3vS9TXaGDJ5cRfnfidt
6746 lines
331 KiB
Plaintext
Executable File
6746 lines
331 KiB
Plaintext
Executable File
#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp
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:ivl_version "13.0 (stable)" "(v13_0)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision - 12;
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi";
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:vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi";
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S_0x103a734e0 .scope package, "$unit" "$unit" 2 1;
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.timescale 0 0;
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S_0x103a6a1f0 .scope module, "memory_interface" "memory_interface" 3 1;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "req";
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.port_info 3 /INPUT 1 "wr";
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.port_info 4 /INPUT 22 "addr";
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.port_info 5 /INPUT 16 "wdata";
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.port_info 6 /INPUT 1 "lb_n";
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.port_info 7 /INPUT 1 "ub_n";
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.port_info 8 /OUTPUT 16 "rdata";
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.port_info 9 /OUTPUT 1 "ready";
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.port_info 10 /OUTPUT 1 "mem_req";
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.port_info 11 /OUTPUT 1 "mem_wr";
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.port_info 12 /OUTPUT 22 "mem_addr";
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.port_info 13 /OUTPUT 16 "mem_wdata";
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.port_info 14 /OUTPUT 1 "mem_lb_n";
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.port_info 15 /OUTPUT 1 "mem_ub_n";
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.port_info 16 /INPUT 16 "mem_rdata";
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.port_info 17 /INPUT 1 "mem_ready";
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P_0x103a73660 .param/l "ADDR_WIDTH" 0 3 2, +C4<00000000000000000000000000010110>;
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P_0x103a736a0 .param/l "DATA_WIDTH" 0 3 3, +C4<00000000000000000000000000010000>;
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P_0x103a736e0 .param/l "STATE_IDLE" 1 3 28, C4<00>;
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P_0x103a73720 .param/l "STATE_WAIT" 1 3 29, C4<01>;
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o0x74c844010 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x74cd606e0_0 .net "addr", 21 0, o0x74c844010; 0 drivers
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o0x74c844040 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd60780_0 .net "clk", 0 0, o0x74c844040; 0 drivers
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o0x74c844070 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd60820_0 .net "lb_n", 0 0, o0x74c844070; 0 drivers
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v0x74cd608c0_0 .var "mem_addr", 21 0;
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v0x74cd60960_0 .var "mem_lb_n", 0 0;
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o0x74c844100 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
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v0x74cd60a00_0 .net "mem_rdata", 15 0, o0x74c844100; 0 drivers
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o0x74c844130 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd60aa0_0 .net "mem_ready", 0 0, o0x74c844130; 0 drivers
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v0x74cd60b40_0 .var "mem_req", 0 0;
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v0x74cd60be0_0 .var "mem_ub_n", 0 0;
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v0x74cd60c80_0 .var "mem_wdata", 15 0;
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v0x74cd60d20_0 .var "mem_wr", 0 0;
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v0x74cd60dc0_0 .var "rdata", 15 0;
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v0x74cd60e60_0 .var "ready", 0 0;
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o0x74c844280 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd60f00_0 .net "req", 0 0, o0x74c844280; 0 drivers
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o0x74c8442b0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd60fa0_0 .net "rst", 0 0, o0x74c8442b0; 0 drivers
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v0x74cd61040_0 .var "state", 1 0;
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o0x74c844310 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd610e0_0 .net "ub_n", 0 0, o0x74c844310; 0 drivers
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o0x74c844340 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
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v0x74cd61180_0 .net "wdata", 15 0, o0x74c844340; 0 drivers
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o0x74c844370 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd61220_0 .net "wr", 0 0, o0x74c844370; 0 drivers
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E_0x74ce08cc0 .event posedge, v0x74cd60780_0;
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S_0x103a6a370 .scope module, "memory_model" "memory_model" 4 1;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "req";
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.port_info 3 /INPUT 1 "wr";
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.port_info 4 /INPUT 22 "addr";
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.port_info 5 /INPUT 16 "wdata";
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.port_info 6 /OUTPUT 16 "rdata";
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.port_info 7 /OUTPUT 1 "ready";
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P_0x103a76ca0 .param/l "ADDR_WIDTH" 0 4 2, +C4<00000000000000000000000000010110>;
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P_0x103a76ce0 .param/l "DATA_WIDTH" 0 4 3, +C4<00000000000000000000000000010000>;
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P_0x103a76d20 .param/l "DEPTH" 0 4 4, +C4<00000000000000000001000000000000>;
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P_0x103a76d60 .param/l "READ_LATENCY" 0 4 5, +C4<00000000000000000000000000000010>;
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o0x74c844700 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x74cd612c0_0 .net "addr", 21 0, o0x74c844700; 0 drivers
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v0x74cd61360_0 .var "busy", 0 0;
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o0x74c844760 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd61400_0 .net "clk", 0 0, o0x74c844760; 0 drivers
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v0x74cd614a0_0 .var/i "delay_count", 31 0;
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v0x74cd61540_0 .var/i "i", 31 0;
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v0x74cd615e0 .array "mem", 4095 0, 15 0;
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v0x74cd61680_0 .var "pending_addr", 21 0;
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v0x74cd61720_0 .var "pending_wdata", 15 0;
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v0x74cd617c0_0 .var "pending_wr", 0 0;
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v0x74cd61860_0 .var "rdata", 15 0;
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v0x74cd61900_0 .var "ready", 0 0;
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o0x74c8448e0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd619a0_0 .net "req", 0 0, o0x74c8448e0; 0 drivers
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o0x74c844910 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd61a40_0 .net "rst", 0 0, o0x74c844910; 0 drivers
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o0x74c844940 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
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v0x74cd61ae0_0 .net "wdata", 15 0, o0x74c844940; 0 drivers
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o0x74c844970 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74cd61b80_0 .net "wr", 0 0, o0x74c844970; 0 drivers
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E_0x74ce08d00 .event posedge, v0x74cd61400_0;
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S_0x103a68b20 .scope module, "neuron_memory" "neuron_memory" 5 3;
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.timescale -9 -12;
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.port_info 0 /INPUT 1 "clk";
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.port_info 1 /INPUT 1 "rst";
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.port_info 2 /INPUT 1 "start";
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.port_info 3 /OUTPUT 1 "mem_req";
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.port_info 4 /OUTPUT 1 "mem_wr";
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.port_info 5 /OUTPUT 22 "mem_addr";
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.port_info 6 /OUTPUT 8 "mem_wdata";
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.port_info 7 /INPUT 8 "mem_rdata";
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.port_info 8 /INPUT 1 "mem_ready";
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.port_info 9 /INPUT 22 "x_base";
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.port_info 10 /INPUT 22 "w_base";
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.port_info 11 /INPUT 22 "bias_addr";
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.port_info 12 /OUTPUT 8 "y";
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.port_info 13 /OUTPUT 1 "busy";
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.port_info 14 /OUTPUT 1 "done";
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P_0x103a714b0 .param/l "ACC_WIDTH" 0 5 8, +C4<00000000000000000000000000100000>;
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P_0x103a714f0 .param/l "ADDR_WIDTH" 0 5 4, +C4<00000000000000000000000000010110>;
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P_0x103a71530 .param/l "DATA_WIDTH" 0 5 5, +C4<00000000000000000000000000001000>;
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P_0x103a71570 .param/l "N_INPUTS" 0 5 6, +C4<00000000000000000000000000100000>;
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P_0x103a715b0 .param/l "PARALLEL" 0 5 7, +C4<00000000000000000000000000001000>;
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P_0x103a715f0 .param/l "STATE_IDLE" 1 5 49, C4<0000>;
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P_0x103a71630 .param/l "STATE_READ_BIAS" 1 5 52, C4<0011>;
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P_0x103a71670 .param/l "STATE_READ_W" 1 5 51, C4<0010>;
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P_0x103a716b0 .param/l "STATE_READ_X" 1 5 50, C4<0001>;
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P_0x103a716f0 .param/l "STATE_START_N" 1 5 53, C4<0100>;
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P_0x103a71730 .param/l "STATE_WAIT_N" 1 5 54, C4<0101>;
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L_0x74cc45ff0 .functor BUFZ 1, v0x74ce188c0_0, C4<0>, C4<0>, C4<0>;
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L_0x74cc46060 .functor BUFZ 1, v0x74ce18aa0_0, C4<0>, C4<0>, C4<0>;
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L_0x74cc460d0 .functor BUFZ 22, v0x74ce1db80_0, C4<0000000000000000000000>, C4<0000000000000000000000>, C4<0000000000000000000000>;
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L_0x74cc46140 .functor BUFZ 8, v0x74ce1e260_0, C4<00000000>, C4<00000000>, C4<00000000>;
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v0x74ce1d860_0 .net *"_ivl_131", 0 0, L_0x74d1a0320; 1 drivers
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L_0x74c878010 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
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v0x74ce1d900_0 .net/2u *"_ivl_132", 7 0, L_0x74c878010; 1 drivers
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v0x74ce1d9a0_0 .net *"_ivl_134", 15 0, L_0x74ce79ae0; 1 drivers
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L_0x74c878058 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>;
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v0x74ce1da40_0 .net/2u *"_ivl_136", 7 0, L_0x74c878058; 1 drivers
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v0x74ce1dae0_0 .net *"_ivl_138", 15 0, L_0x74ce79b80; 1 drivers
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v0x74ce1db80_0 .var "access_addr", 21 0;
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v0x74ce1dc20_0 .net "access_mem_addr", 21 0, v0x74ce18640_0; 1 drivers
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v0x74ce1dcc0_0 .net "access_mem_lb_n", 0 0, v0x74ce186e0_0; 1 drivers
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v0x74ce1dd60_0 .net "access_mem_rdata", 15 0, L_0x74cddaa80; 1 drivers
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v0x74ce1de00_0 .net "access_mem_req", 0 0, v0x74ce188c0_0; 1 drivers
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v0x74ce1dea0_0 .net "access_mem_ub_n", 0 0, v0x74ce18960_0; 1 drivers
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v0x74ce1df40_0 .net "access_mem_wdata", 15 0, v0x74ce18a00_0; 1 drivers
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v0x74ce1dfe0_0 .net "access_mem_wr", 0 0, v0x74ce18aa0_0; 1 drivers
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v0x74ce1e080_0 .net/s "access_rdata", 7 0, v0x74ce18b40_0; 1 drivers
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v0x74ce1e120_0 .net "access_ready", 0 0, v0x74ce18be0_0; 1 drivers
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v0x74ce1e1c0_0 .var "access_req", 0 0;
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v0x74ce1e260_0 .var/s "access_wdata", 7 0;
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v0x74ce1e300_0 .var "access_wr", 0 0;
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o0x74c848120 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x74ce1e3a0_0 .net "bias_addr", 21 0, o0x74c848120; 0 drivers
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v0x74ce1e440_0 .var/s "bias_reg", 7 0;
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v0x74ce1e4e0_0 .var "busy", 0 0;
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o0x74c845780 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74ce1e580_0 .net "clk", 0 0, o0x74c845780; 0 drivers
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v0x74ce1e620_0 .var "done", 0 0;
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v0x74ce1e6c0_0 .var "index", 5 0;
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v0x74ce1e760_0 .net "mem_addr", 21 0, L_0x74cc460d0; 1 drivers
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o0x74c848210 .functor BUFZ 8, c4<zzzzzzzz>; HiZ drive
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v0x74ce1e800_0 .net/s "mem_rdata", 7 0, o0x74c848210; 0 drivers
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o0x74c845840 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74ce1e8a0_0 .net "mem_ready", 0 0, o0x74c845840; 0 drivers
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v0x74ce1e940_0 .net "mem_req", 0 0, L_0x74cc45ff0; 1 drivers
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v0x74ce1e9e0_0 .net/s "mem_wdata", 7 0, L_0x74cc46140; 1 drivers
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v0x74ce1ea80_0 .net "mem_wr", 0 0, L_0x74cc46060; 1 drivers
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v0x74ce1eb20_0 .net "neuron_busy", 0 0, v0x74ce1d0e0_0; 1 drivers
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v0x74ce1ebc0_0 .net "neuron_done", 0 0, v0x74ce1d220_0; 1 drivers
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v0x74ce1ec60_0 .var "neuron_start", 0 0;
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v0x74ce1ed00_0 .net/s "neuron_y", 7 0, v0x74ce1d7c0_0; 1 drivers
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o0x74c8459c0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74ce1eda0_0 .net "rst", 0 0, o0x74c8459c0; 0 drivers
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o0x74c8482d0 .functor BUFZ 1, c4<z>; HiZ drive
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v0x74ce1ee40_0 .net "start", 0 0, o0x74c8482d0; 0 drivers
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v0x74ce1eee0_0 .var "state", 3 0;
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o0x74c848330 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x74ce1ef80_0 .net "w_base", 21 0, o0x74c848330; 0 drivers
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v0x74ce1f020_0 .net/s "w_bus", 255 0, L_0x74ce79a40; 1 drivers
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v0x74ce1f0c0 .array/s "w_mem", 31 0, 7 0;
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o0x74c848960 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
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v0x74ce1f160_0 .net "x_base", 21 0, o0x74c848960; 0 drivers
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v0x74ce1f200_0 .net/s "x_bus", 255 0, L_0x74ce799a0; 1 drivers
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v0x74ce1f2a0 .array/s "x_mem", 31 0, 7 0;
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v0x74ce1f340_0 .var/s "y", 7 0;
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v0x74ce1f2a0_0 .array/port v0x74ce1f2a0, 0;
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v0x74ce1f2a0_1 .array/port v0x74ce1f2a0, 1;
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v0x74ce1f2a0_2 .array/port v0x74ce1f2a0, 2;
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v0x74ce1f2a0_3 .array/port v0x74ce1f2a0, 3;
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LS_0x74ce799a0_0_0 .concat8 [ 8 8 8 8], v0x74ce1f2a0_0, v0x74ce1f2a0_1, v0x74ce1f2a0_2, v0x74ce1f2a0_3;
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v0x74ce1f2a0_4 .array/port v0x74ce1f2a0, 4;
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v0x74ce1f2a0_5 .array/port v0x74ce1f2a0, 5;
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v0x74ce1f2a0_6 .array/port v0x74ce1f2a0, 6;
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v0x74ce1f2a0_7 .array/port v0x74ce1f2a0, 7;
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LS_0x74ce799a0_0_4 .concat8 [ 8 8 8 8], v0x74ce1f2a0_4, v0x74ce1f2a0_5, v0x74ce1f2a0_6, v0x74ce1f2a0_7;
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v0x74ce1f2a0_8 .array/port v0x74ce1f2a0, 8;
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v0x74ce1f2a0_9 .array/port v0x74ce1f2a0, 9;
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v0x74ce1f2a0_10 .array/port v0x74ce1f2a0, 10;
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v0x74ce1f2a0_11 .array/port v0x74ce1f2a0, 11;
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LS_0x74ce799a0_0_8 .concat8 [ 8 8 8 8], v0x74ce1f2a0_8, v0x74ce1f2a0_9, v0x74ce1f2a0_10, v0x74ce1f2a0_11;
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v0x74ce1f2a0_12 .array/port v0x74ce1f2a0, 12;
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v0x74ce1f2a0_13 .array/port v0x74ce1f2a0, 13;
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v0x74ce1f2a0_14 .array/port v0x74ce1f2a0, 14;
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v0x74ce1f2a0_15 .array/port v0x74ce1f2a0, 15;
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LS_0x74ce799a0_0_12 .concat8 [ 8 8 8 8], v0x74ce1f2a0_12, v0x74ce1f2a0_13, v0x74ce1f2a0_14, v0x74ce1f2a0_15;
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v0x74ce1f2a0_16 .array/port v0x74ce1f2a0, 16;
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v0x74ce1f2a0_17 .array/port v0x74ce1f2a0, 17;
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v0x74ce1f2a0_18 .array/port v0x74ce1f2a0, 18;
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v0x74ce1f2a0_19 .array/port v0x74ce1f2a0, 19;
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LS_0x74ce799a0_0_16 .concat8 [ 8 8 8 8], v0x74ce1f2a0_16, v0x74ce1f2a0_17, v0x74ce1f2a0_18, v0x74ce1f2a0_19;
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v0x74ce1f2a0_20 .array/port v0x74ce1f2a0, 20;
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v0x74ce1f2a0_21 .array/port v0x74ce1f2a0, 21;
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v0x74ce1f2a0_22 .array/port v0x74ce1f2a0, 22;
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v0x74ce1f2a0_23 .array/port v0x74ce1f2a0, 23;
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LS_0x74ce799a0_0_20 .concat8 [ 8 8 8 8], v0x74ce1f2a0_20, v0x74ce1f2a0_21, v0x74ce1f2a0_22, v0x74ce1f2a0_23;
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v0x74ce1f2a0_24 .array/port v0x74ce1f2a0, 24;
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v0x74ce1f2a0_25 .array/port v0x74ce1f2a0, 25;
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v0x74ce1f2a0_26 .array/port v0x74ce1f2a0, 26;
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v0x74ce1f2a0_27 .array/port v0x74ce1f2a0, 27;
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LS_0x74ce799a0_0_24 .concat8 [ 8 8 8 8], v0x74ce1f2a0_24, v0x74ce1f2a0_25, v0x74ce1f2a0_26, v0x74ce1f2a0_27;
|
|
v0x74ce1f2a0_28 .array/port v0x74ce1f2a0, 28;
|
|
v0x74ce1f2a0_29 .array/port v0x74ce1f2a0, 29;
|
|
v0x74ce1f2a0_30 .array/port v0x74ce1f2a0, 30;
|
|
v0x74ce1f2a0_31 .array/port v0x74ce1f2a0, 31;
|
|
LS_0x74ce799a0_0_28 .concat8 [ 8 8 8 8], v0x74ce1f2a0_28, v0x74ce1f2a0_29, v0x74ce1f2a0_30, v0x74ce1f2a0_31;
|
|
LS_0x74ce799a0_1_0 .concat8 [ 32 32 32 32], LS_0x74ce799a0_0_0, LS_0x74ce799a0_0_4, LS_0x74ce799a0_0_8, LS_0x74ce799a0_0_12;
|
|
LS_0x74ce799a0_1_4 .concat8 [ 32 32 32 32], LS_0x74ce799a0_0_16, LS_0x74ce799a0_0_20, LS_0x74ce799a0_0_24, LS_0x74ce799a0_0_28;
|
|
L_0x74ce799a0 .concat8 [ 128 128 0 0], LS_0x74ce799a0_1_0, LS_0x74ce799a0_1_4;
|
|
v0x74ce1f0c0_0 .array/port v0x74ce1f0c0, 0;
|
|
v0x74ce1f0c0_1 .array/port v0x74ce1f0c0, 1;
|
|
v0x74ce1f0c0_2 .array/port v0x74ce1f0c0, 2;
|
|
v0x74ce1f0c0_3 .array/port v0x74ce1f0c0, 3;
|
|
LS_0x74ce79a40_0_0 .concat8 [ 8 8 8 8], v0x74ce1f0c0_0, v0x74ce1f0c0_1, v0x74ce1f0c0_2, v0x74ce1f0c0_3;
|
|
v0x74ce1f0c0_4 .array/port v0x74ce1f0c0, 4;
|
|
v0x74ce1f0c0_5 .array/port v0x74ce1f0c0, 5;
|
|
v0x74ce1f0c0_6 .array/port v0x74ce1f0c0, 6;
|
|
v0x74ce1f0c0_7 .array/port v0x74ce1f0c0, 7;
|
|
LS_0x74ce79a40_0_4 .concat8 [ 8 8 8 8], v0x74ce1f0c0_4, v0x74ce1f0c0_5, v0x74ce1f0c0_6, v0x74ce1f0c0_7;
|
|
v0x74ce1f0c0_8 .array/port v0x74ce1f0c0, 8;
|
|
v0x74ce1f0c0_9 .array/port v0x74ce1f0c0, 9;
|
|
v0x74ce1f0c0_10 .array/port v0x74ce1f0c0, 10;
|
|
v0x74ce1f0c0_11 .array/port v0x74ce1f0c0, 11;
|
|
LS_0x74ce79a40_0_8 .concat8 [ 8 8 8 8], v0x74ce1f0c0_8, v0x74ce1f0c0_9, v0x74ce1f0c0_10, v0x74ce1f0c0_11;
|
|
v0x74ce1f0c0_12 .array/port v0x74ce1f0c0, 12;
|
|
v0x74ce1f0c0_13 .array/port v0x74ce1f0c0, 13;
|
|
v0x74ce1f0c0_14 .array/port v0x74ce1f0c0, 14;
|
|
v0x74ce1f0c0_15 .array/port v0x74ce1f0c0, 15;
|
|
LS_0x74ce79a40_0_12 .concat8 [ 8 8 8 8], v0x74ce1f0c0_12, v0x74ce1f0c0_13, v0x74ce1f0c0_14, v0x74ce1f0c0_15;
|
|
v0x74ce1f0c0_16 .array/port v0x74ce1f0c0, 16;
|
|
v0x74ce1f0c0_17 .array/port v0x74ce1f0c0, 17;
|
|
v0x74ce1f0c0_18 .array/port v0x74ce1f0c0, 18;
|
|
v0x74ce1f0c0_19 .array/port v0x74ce1f0c0, 19;
|
|
LS_0x74ce79a40_0_16 .concat8 [ 8 8 8 8], v0x74ce1f0c0_16, v0x74ce1f0c0_17, v0x74ce1f0c0_18, v0x74ce1f0c0_19;
|
|
v0x74ce1f0c0_20 .array/port v0x74ce1f0c0, 20;
|
|
v0x74ce1f0c0_21 .array/port v0x74ce1f0c0, 21;
|
|
v0x74ce1f0c0_22 .array/port v0x74ce1f0c0, 22;
|
|
v0x74ce1f0c0_23 .array/port v0x74ce1f0c0, 23;
|
|
LS_0x74ce79a40_0_20 .concat8 [ 8 8 8 8], v0x74ce1f0c0_20, v0x74ce1f0c0_21, v0x74ce1f0c0_22, v0x74ce1f0c0_23;
|
|
v0x74ce1f0c0_24 .array/port v0x74ce1f0c0, 24;
|
|
v0x74ce1f0c0_25 .array/port v0x74ce1f0c0, 25;
|
|
v0x74ce1f0c0_26 .array/port v0x74ce1f0c0, 26;
|
|
v0x74ce1f0c0_27 .array/port v0x74ce1f0c0, 27;
|
|
LS_0x74ce79a40_0_24 .concat8 [ 8 8 8 8], v0x74ce1f0c0_24, v0x74ce1f0c0_25, v0x74ce1f0c0_26, v0x74ce1f0c0_27;
|
|
v0x74ce1f0c0_28 .array/port v0x74ce1f0c0, 28;
|
|
v0x74ce1f0c0_29 .array/port v0x74ce1f0c0, 29;
|
|
v0x74ce1f0c0_30 .array/port v0x74ce1f0c0, 30;
|
|
v0x74ce1f0c0_31 .array/port v0x74ce1f0c0, 31;
|
|
LS_0x74ce79a40_0_28 .concat8 [ 8 8 8 8], v0x74ce1f0c0_28, v0x74ce1f0c0_29, v0x74ce1f0c0_30, v0x74ce1f0c0_31;
|
|
LS_0x74ce79a40_1_0 .concat8 [ 32 32 32 32], LS_0x74ce79a40_0_0, LS_0x74ce79a40_0_4, LS_0x74ce79a40_0_8, LS_0x74ce79a40_0_12;
|
|
LS_0x74ce79a40_1_4 .concat8 [ 32 32 32 32], LS_0x74ce79a40_0_16, LS_0x74ce79a40_0_20, LS_0x74ce79a40_0_24, LS_0x74ce79a40_0_28;
|
|
L_0x74ce79a40 .concat8 [ 128 128 0 0], LS_0x74ce79a40_1_0, LS_0x74ce79a40_1_4;
|
|
L_0x74d1a0320 .part v0x74ce1db80_0, 0, 1;
|
|
L_0x74ce79ae0 .concat [ 8 8 0 0], L_0x74c878010, o0x74c848210;
|
|
L_0x74ce79b80 .concat [ 8 8 0 0], o0x74c848210, L_0x74c878058;
|
|
L_0x74cddaa80 .functor MUXZ 16, L_0x74ce79b80, L_0x74ce79ae0, L_0x74d1a0320, C4<>;
|
|
S_0x103a68360 .scope generate, "GEN_BUS[0]" "GEN_BUS[0]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd500 .param/l "i" 1 5 79, +C4<00>;
|
|
v0x74cd61c20_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_0; 1 drivers
|
|
v0x74cd61cc0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_0; 1 drivers
|
|
S_0x103a675e0 .scope generate, "GEN_BUS[1]" "GEN_BUS[1]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd540 .param/l "i" 1 5 79, +C4<01>;
|
|
v0x74cd61d60_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_1; 1 drivers
|
|
v0x74cd61e00_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_1; 1 drivers
|
|
S_0x103a67760 .scope generate, "GEN_BUS[2]" "GEN_BUS[2]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd580 .param/l "i" 1 5 79, +C4<010>;
|
|
v0x74cd61ea0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_2; 1 drivers
|
|
v0x74cd61f40_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_2; 1 drivers
|
|
S_0x103a64ad0 .scope generate, "GEN_BUS[3]" "GEN_BUS[3]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd5c0 .param/l "i" 1 5 79, +C4<011>;
|
|
v0x74cd61fe0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_3; 1 drivers
|
|
v0x74cd62080_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_3; 1 drivers
|
|
S_0x103a64c50 .scope generate, "GEN_BUS[4]" "GEN_BUS[4]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd640 .param/l "i" 1 5 79, +C4<0100>;
|
|
v0x74cd62120_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_4; 1 drivers
|
|
v0x74cd621c0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_4; 1 drivers
|
|
S_0x103a65930 .scope generate, "GEN_BUS[5]" "GEN_BUS[5]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd680 .param/l "i" 1 5 79, +C4<0101>;
|
|
v0x74cd62260_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_5; 1 drivers
|
|
v0x74cd62300_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_5; 1 drivers
|
|
S_0x103a65ab0 .scope generate, "GEN_BUS[6]" "GEN_BUS[6]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd6c0 .param/l "i" 1 5 79, +C4<0110>;
|
|
v0x74cd623a0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_6; 1 drivers
|
|
v0x74cd62440_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_6; 1 drivers
|
|
S_0x103a62c80 .scope generate, "GEN_BUS[7]" "GEN_BUS[7]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd700 .param/l "i" 1 5 79, +C4<0111>;
|
|
v0x74cd624e0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_7; 1 drivers
|
|
v0x74cd62580_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_7; 1 drivers
|
|
S_0x103a62e00 .scope generate, "GEN_BUS[8]" "GEN_BUS[8]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd600 .param/l "i" 1 5 79, +C4<01000>;
|
|
v0x74cd62620_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_8; 1 drivers
|
|
v0x74cd626c0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_8; 1 drivers
|
|
S_0x74ce14000 .scope generate, "GEN_BUS[9]" "GEN_BUS[9]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd740 .param/l "i" 1 5 79, +C4<01001>;
|
|
v0x74cd62760_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_9; 1 drivers
|
|
v0x74cd62800_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_9; 1 drivers
|
|
S_0x74ce14180 .scope generate, "GEN_BUS[10]" "GEN_BUS[10]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd780 .param/l "i" 1 5 79, +C4<01010>;
|
|
v0x74cd628a0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_10; 1 drivers
|
|
v0x74cd62940_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_10; 1 drivers
|
|
S_0x74ce14300 .scope generate, "GEN_BUS[11]" "GEN_BUS[11]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd7c0 .param/l "i" 1 5 79, +C4<01011>;
|
|
v0x74cd629e0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_11; 1 drivers
|
|
v0x74cd62a80_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_11; 1 drivers
|
|
S_0x74ce14480 .scope generate, "GEN_BUS[12]" "GEN_BUS[12]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd800 .param/l "i" 1 5 79, +C4<01100>;
|
|
v0x74cd62b20_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_12; 1 drivers
|
|
v0x74cd62bc0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_12; 1 drivers
|
|
S_0x74ce14600 .scope generate, "GEN_BUS[13]" "GEN_BUS[13]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd840 .param/l "i" 1 5 79, +C4<01101>;
|
|
v0x74cd62c60_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_13; 1 drivers
|
|
v0x74cd62d00_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_13; 1 drivers
|
|
S_0x74ce14780 .scope generate, "GEN_BUS[14]" "GEN_BUS[14]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd880 .param/l "i" 1 5 79, +C4<01110>;
|
|
v0x74cd62da0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_14; 1 drivers
|
|
v0x74cd62e40_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_14; 1 drivers
|
|
S_0x74ce14900 .scope generate, "GEN_BUS[15]" "GEN_BUS[15]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd8c0 .param/l "i" 1 5 79, +C4<01111>;
|
|
v0x74cd62ee0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_15; 1 drivers
|
|
v0x74cd62f80_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_15; 1 drivers
|
|
S_0x74ce14a80 .scope generate, "GEN_BUS[16]" "GEN_BUS[16]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd900 .param/l "i" 1 5 79, +C4<010000>;
|
|
v0x74cd63020_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_16; 1 drivers
|
|
v0x74cd630c0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_16; 1 drivers
|
|
S_0x74ce14c00 .scope generate, "GEN_BUS[17]" "GEN_BUS[17]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd940 .param/l "i" 1 5 79, +C4<010001>;
|
|
v0x74cd63160_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_17; 1 drivers
|
|
v0x74cd63200_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_17; 1 drivers
|
|
S_0x74ce14d80 .scope generate, "GEN_BUS[18]" "GEN_BUS[18]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd980 .param/l "i" 1 5 79, +C4<010010>;
|
|
v0x74cd632a0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_18; 1 drivers
|
|
v0x74cd63340_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_18; 1 drivers
|
|
S_0x74ce14f00 .scope generate, "GEN_BUS[19]" "GEN_BUS[19]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcd9c0 .param/l "i" 1 5 79, +C4<010011>;
|
|
v0x74cd633e0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_19; 1 drivers
|
|
v0x74cd63480_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_19; 1 drivers
|
|
S_0x74ce15080 .scope generate, "GEN_BUS[20]" "GEN_BUS[20]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcda00 .param/l "i" 1 5 79, +C4<010100>;
|
|
v0x74cd63520_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_20; 1 drivers
|
|
v0x74cd635c0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_20; 1 drivers
|
|
S_0x74ce15200 .scope generate, "GEN_BUS[21]" "GEN_BUS[21]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcda40 .param/l "i" 1 5 79, +C4<010101>;
|
|
v0x74cd63660_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_21; 1 drivers
|
|
v0x74cd63700_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_21; 1 drivers
|
|
S_0x74ce15380 .scope generate, "GEN_BUS[22]" "GEN_BUS[22]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcda80 .param/l "i" 1 5 79, +C4<010110>;
|
|
v0x74cd637a0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_22; 1 drivers
|
|
v0x74cd63840_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_22; 1 drivers
|
|
S_0x74ce15500 .scope generate, "GEN_BUS[23]" "GEN_BUS[23]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdac0 .param/l "i" 1 5 79, +C4<010111>;
|
|
v0x74cd638e0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_23; 1 drivers
|
|
v0x74cd63980_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_23; 1 drivers
|
|
S_0x74ce15680 .scope generate, "GEN_BUS[24]" "GEN_BUS[24]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdb00 .param/l "i" 1 5 79, +C4<011000>;
|
|
v0x74cd63a20_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_24; 1 drivers
|
|
v0x74cd63ac0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_24; 1 drivers
|
|
S_0x74ce15800 .scope generate, "GEN_BUS[25]" "GEN_BUS[25]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdb40 .param/l "i" 1 5 79, +C4<011001>;
|
|
v0x74cd63b60_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_25; 1 drivers
|
|
v0x74cd63c00_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_25; 1 drivers
|
|
S_0x74ce15980 .scope generate, "GEN_BUS[26]" "GEN_BUS[26]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdb80 .param/l "i" 1 5 79, +C4<011010>;
|
|
v0x74cd63ca0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_26; 1 drivers
|
|
v0x74cd63d40_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_26; 1 drivers
|
|
S_0x74ce15b00 .scope generate, "GEN_BUS[27]" "GEN_BUS[27]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdbc0 .param/l "i" 1 5 79, +C4<011011>;
|
|
v0x74cd63de0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_27; 1 drivers
|
|
v0x74cd63e80_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_27; 1 drivers
|
|
S_0x74ce15c80 .scope generate, "GEN_BUS[28]" "GEN_BUS[28]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdc00 .param/l "i" 1 5 79, +C4<011100>;
|
|
v0x74cd63f20_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_28; 1 drivers
|
|
v0x74ce18000_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_28; 1 drivers
|
|
S_0x74ce15e00 .scope generate, "GEN_BUS[29]" "GEN_BUS[29]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdc40 .param/l "i" 1 5 79, +C4<011101>;
|
|
v0x74ce180a0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_29; 1 drivers
|
|
v0x74ce18140_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_29; 1 drivers
|
|
S_0x74ce15f80 .scope generate, "GEN_BUS[30]" "GEN_BUS[30]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdc80 .param/l "i" 1 5 79, +C4<011110>;
|
|
v0x74ce181e0_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_30; 1 drivers
|
|
v0x74ce18280_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_30; 1 drivers
|
|
S_0x74ce16100 .scope generate, "GEN_BUS[31]" "GEN_BUS[31]" 5 79, 5 79 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
P_0x74cdcdcc0 .param/l "i" 1 5 79, +C4<011111>;
|
|
v0x74ce18320_0 .net *"_ivl_2", 7 0, v0x74ce1f2a0_31; 1 drivers
|
|
v0x74ce183c0_0 .net *"_ivl_5", 7 0, v0x74ce1f0c0_31; 1 drivers
|
|
S_0x74ce16280 .scope module, "u_mem" "int8_memory_access" 5 142, 6 1 0, S_0x103a68b20;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "req";
|
|
.port_info 3 /INPUT 1 "wr";
|
|
.port_info 4 /INPUT 22 "addr";
|
|
.port_info 5 /INPUT 8 "wdata";
|
|
.port_info 6 /OUTPUT 8 "rdata";
|
|
.port_info 7 /OUTPUT 1 "ready";
|
|
.port_info 8 /OUTPUT 1 "mem_req";
|
|
.port_info 9 /OUTPUT 1 "mem_wr";
|
|
.port_info 10 /OUTPUT 22 "mem_addr";
|
|
.port_info 11 /OUTPUT 16 "mem_wdata";
|
|
.port_info 12 /OUTPUT 1 "mem_lb_n";
|
|
.port_info 13 /OUTPUT 1 "mem_ub_n";
|
|
.port_info 14 /INPUT 16 "mem_rdata";
|
|
.port_info 15 /INPUT 1 "mem_ready";
|
|
P_0x103a71c30 .param/l "ADDR_WIDTH" 0 6 2, +C4<00000000000000000000000000010110>;
|
|
P_0x103a71c70 .param/l "STATE_IDLE" 1 6 40, C4<00>;
|
|
P_0x103a71cb0 .param/l "STATE_WAIT" 1 6 41, C4<01>;
|
|
v0x74ce18460_0 .net "addr", 21 0, v0x74ce1db80_0; 1 drivers
|
|
v0x74ce18500_0 .var "addr_reg", 21 0;
|
|
v0x74ce185a0_0 .net "clk", 0 0, o0x74c845780; alias, 0 drivers
|
|
v0x74ce18640_0 .var "mem_addr", 21 0;
|
|
v0x74ce186e0_0 .var "mem_lb_n", 0 0;
|
|
v0x74ce18780_0 .net "mem_rdata", 15 0, L_0x74cddaa80; alias, 1 drivers
|
|
v0x74ce18820_0 .net "mem_ready", 0 0, o0x74c845840; alias, 0 drivers
|
|
v0x74ce188c0_0 .var "mem_req", 0 0;
|
|
v0x74ce18960_0 .var "mem_ub_n", 0 0;
|
|
v0x74ce18a00_0 .var "mem_wdata", 15 0;
|
|
v0x74ce18aa0_0 .var "mem_wr", 0 0;
|
|
v0x74ce18b40_0 .var/s "rdata", 7 0;
|
|
v0x74ce18be0_0 .var "ready", 0 0;
|
|
v0x74ce18c80_0 .net "req", 0 0, v0x74ce1e1c0_0; 1 drivers
|
|
v0x74ce18d20_0 .net "rst", 0 0, o0x74c8459c0; alias, 0 drivers
|
|
v0x74ce18dc0_0 .var "state", 1 0;
|
|
v0x74ce18e60_0 .net/s "wdata", 7 0, v0x74ce1e260_0; 1 drivers
|
|
v0x74ce18f00_0 .net "wr", 0 0, v0x74ce1e300_0; 1 drivers
|
|
E_0x74ce08d40 .event posedge, v0x74ce185a0_0;
|
|
S_0x74ce16400 .scope module, "u_neuron" "neuron_parallel" 5 203, 7 1 0, S_0x103a68b20;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a774a0 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a774e0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a77520 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a77560 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a775a0 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a775e0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce1c5a0_0 .net *"_ivl_0", 31 0, L_0x74ce79c20; 1 drivers
|
|
v0x74ce1c640_0 .net *"_ivl_11", 31 0, L_0x74ce79d60; 1 drivers
|
|
v0x74ce1c6e0_0 .net *"_ivl_14", 31 0, L_0x74ce79e00; 1 drivers
|
|
L_0x74c878178 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1c780_0 .net *"_ivl_17", 29 0, L_0x74c878178; 1 drivers
|
|
L_0x74c8781c0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1c820_0 .net/2u *"_ivl_18", 31 0, L_0x74c8781c0; 1 drivers
|
|
v0x74ce1c8c0_0 .net *"_ivl_21", 31 0, L_0x74ce79ea0; 1 drivers
|
|
L_0x74c878208 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1c960_0 .net/2u *"_ivl_22", 31 0, L_0x74c878208; 1 drivers
|
|
v0x74ce1ca00_0 .net *"_ivl_25", 31 0, L_0x74ce79f40; 1 drivers
|
|
v0x74ce1caa0_0 .net *"_ivl_29", 0 0, L_0x74d1a1900; 1 drivers
|
|
L_0x74c8780a0 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1cb40_0 .net *"_ivl_3", 29 0, L_0x74c8780a0; 1 drivers
|
|
v0x74ce1cbe0_0 .net *"_ivl_31", 23 0, L_0x74d1a19a0; 1 drivers
|
|
L_0x74c8780e8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1cc80_0 .net/2u *"_ivl_4", 31 0, L_0x74c8780e8; 1 drivers
|
|
v0x74ce1cd20_0 .net *"_ivl_7", 31 0, L_0x74ce79cc0; 1 drivers
|
|
L_0x74c878130 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1cdc0_0 .net/2u *"_ivl_8", 31 0, L_0x74c878130; 1 drivers
|
|
v0x74ce1ce60_0 .var/s "acc", 31 0;
|
|
v0x74ce1cf00_0 .net/s "acc_next", 31 0, L_0x74d096800; 1 drivers
|
|
v0x74ce1cfa0_0 .net/s "bias", 7 0, v0x74ce1e440_0; 1 drivers
|
|
v0x74ce1d040_0 .net/s "bias_ext", 31 0, L_0x74ce7b3e0; 1 drivers
|
|
v0x74ce1d0e0_0 .var "busy", 0 0;
|
|
v0x74ce1d180_0 .net "clk", 0 0, o0x74c845780; alias, 0 drivers
|
|
v0x74ce1d220_0 .var "done", 0 0;
|
|
v0x74ce1d2c0_0 .net/s "final_acc", 31 0, L_0x74d0968a0; 1 drivers
|
|
v0x74ce1d360_0 .var "group_index", 1 0;
|
|
v0x74ce1d400_0 .net "rst", 0 0, o0x74c8459c0; alias, 0 drivers
|
|
v0x74ce1d4a0_0 .net "start", 0 0, v0x74ce1ec60_0; 1 drivers
|
|
v0x74ce1d540_0 .net/s "w_bus", 255 0, L_0x74ce79a40; alias, 1 drivers
|
|
v0x74ce1d5e0_0 .net/s "w_group", 63 0, L_0x74d1a03c0; 1 drivers
|
|
v0x74ce1d680_0 .net/s "x_bus", 255 0, L_0x74ce799a0; alias, 1 drivers
|
|
v0x74ce1d720_0 .net/s "x_group", 63 0, L_0x74d1a0280; 1 drivers
|
|
v0x74ce1d7c0_0 .var/s "y", 7 0;
|
|
L_0x74ce79c20 .concat [ 2 30 0 0], v0x74ce1d360_0, L_0x74c8780a0;
|
|
L_0x74ce79cc0 .arith/mult 32, L_0x74ce79c20, L_0x74c8780e8;
|
|
L_0x74ce79d60 .arith/mult 32, L_0x74ce79cc0, L_0x74c878130;
|
|
L_0x74d1a0280 .part/v L_0x74ce799a0, L_0x74ce79d60, 64;
|
|
L_0x74ce79e00 .concat [ 2 30 0 0], v0x74ce1d360_0, L_0x74c878178;
|
|
L_0x74ce79ea0 .arith/mult 32, L_0x74ce79e00, L_0x74c8781c0;
|
|
L_0x74ce79f40 .arith/mult 32, L_0x74ce79ea0, L_0x74c878208;
|
|
L_0x74d1a03c0 .part/v L_0x74ce79a40, L_0x74ce79f40, 64;
|
|
L_0x74d1a1900 .part v0x74ce1e440_0, 7, 1;
|
|
L_0x74d1a19a0 .repeat 24, 24, L_0x74d1a1900;
|
|
L_0x74ce7b3e0 .concat [ 8 24 0 0], v0x74ce1e440_0, L_0x74d1a19a0;
|
|
L_0x74d0968a0 .arith/sum 32, L_0x74d096800, L_0x74ce7b3e0;
|
|
S_0x74ce16580 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce16400;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c0200 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c0240 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0280 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c02c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce1c1e0_0 .net/s "acc_in", 31 0, v0x74ce1ce60_0; 1 drivers
|
|
v0x74ce1c280_0 .net/s "acc_out", 31 0, L_0x74d096800; alias, 1 drivers
|
|
v0x74ce1c320 .array "products", 7 0;
|
|
v0x74ce1c320_0 .net/s v0x74ce1c320 0, 31 0, L_0x74d095e00; 1 drivers
|
|
v0x74ce1c320_1 .net/s v0x74ce1c320 1, 31 0, L_0x74d095ea0; 1 drivers
|
|
v0x74ce1c320_2 .net/s v0x74ce1c320 2, 31 0, L_0x74d095fe0; 1 drivers
|
|
v0x74ce1c320_3 .net/s v0x74ce1c320 3, 31 0, L_0x74d096080; 1 drivers
|
|
v0x74ce1c320_4 .net/s v0x74ce1c320 4, 31 0, L_0x74d096120; 1 drivers
|
|
v0x74ce1c320_5 .net/s v0x74ce1c320 5, 31 0, L_0x74d0961c0; 1 drivers
|
|
v0x74ce1c320_6 .net/s v0x74ce1c320 6, 31 0, L_0x74d096260; 1 drivers
|
|
v0x74ce1c320_7 .net/s v0x74ce1c320 7, 31 0, L_0x74d096300; 1 drivers
|
|
v0x74ce1c3c0 .array "tree", 31 0;
|
|
v0x74ce1c3c0_0 .net/s v0x74ce1c3c0 0, 31 0, L_0x74cc461b0; 1 drivers
|
|
v0x74ce1c3c0_1 .net/s v0x74ce1c3c0 1, 31 0, L_0x74cc46220; 1 drivers
|
|
v0x74ce1c3c0_2 .net/s v0x74ce1c3c0 2, 31 0, L_0x74cc46290; 1 drivers
|
|
v0x74ce1c3c0_3 .net/s v0x74ce1c3c0 3, 31 0, L_0x74cc46300; 1 drivers
|
|
v0x74ce1c3c0_4 .net/s v0x74ce1c3c0 4, 31 0, L_0x74cc46370; 1 drivers
|
|
v0x74ce1c3c0_5 .net/s v0x74ce1c3c0 5, 31 0, L_0x74cc463e0; 1 drivers
|
|
v0x74ce1c3c0_6 .net/s v0x74ce1c3c0 6, 31 0, L_0x74cc46450; 1 drivers
|
|
v0x74ce1c3c0_7 .net/s v0x74ce1c3c0 7, 31 0, L_0x74cc464c0; 1 drivers
|
|
v0x74ce1c3c0_8 .net/s v0x74ce1c3c0 8, 31 0, L_0x74d0963a0; 1 drivers
|
|
v0x74ce1c3c0_9 .net/s v0x74ce1c3c0 9, 31 0, L_0x74d096440; 1 drivers
|
|
v0x74ce1c3c0_10 .net/s v0x74ce1c3c0 10, 31 0, L_0x74d0964e0; 1 drivers
|
|
v0x74ce1c3c0_11 .net/s v0x74ce1c3c0 11, 31 0, L_0x74d096580; 1 drivers
|
|
o0x74c847520 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_12 .net/s v0x74ce1c3c0 12, 31 0, o0x74c847520; 0 drivers
|
|
o0x74c847550 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_13 .net/s v0x74ce1c3c0 13, 31 0, o0x74c847550; 0 drivers
|
|
o0x74c847580 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_14 .net/s v0x74ce1c3c0 14, 31 0, o0x74c847580; 0 drivers
|
|
o0x74c8475b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_15 .net/s v0x74ce1c3c0 15, 31 0, o0x74c8475b0; 0 drivers
|
|
v0x74ce1c3c0_16 .net/s v0x74ce1c3c0 16, 31 0, L_0x74d096620; 1 drivers
|
|
v0x74ce1c3c0_17 .net/s v0x74ce1c3c0 17, 31 0, L_0x74d0966c0; 1 drivers
|
|
o0x74c847640 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_18 .net/s v0x74ce1c3c0 18, 31 0, o0x74c847640; 0 drivers
|
|
o0x74c847670 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_19 .net/s v0x74ce1c3c0 19, 31 0, o0x74c847670; 0 drivers
|
|
o0x74c8476a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_20 .net/s v0x74ce1c3c0 20, 31 0, o0x74c8476a0; 0 drivers
|
|
o0x74c8476d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_21 .net/s v0x74ce1c3c0 21, 31 0, o0x74c8476d0; 0 drivers
|
|
o0x74c847700 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_22 .net/s v0x74ce1c3c0 22, 31 0, o0x74c847700; 0 drivers
|
|
o0x74c847730 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_23 .net/s v0x74ce1c3c0 23, 31 0, o0x74c847730; 0 drivers
|
|
v0x74ce1c3c0_24 .net/s v0x74ce1c3c0 24, 31 0, L_0x74d096760; 1 drivers
|
|
o0x74c847790 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_25 .net/s v0x74ce1c3c0 25, 31 0, o0x74c847790; 0 drivers
|
|
o0x74c8477c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_26 .net/s v0x74ce1c3c0 26, 31 0, o0x74c8477c0; 0 drivers
|
|
o0x74c8477f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_27 .net/s v0x74ce1c3c0 27, 31 0, o0x74c8477f0; 0 drivers
|
|
o0x74c847820 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_28 .net/s v0x74ce1c3c0 28, 31 0, o0x74c847820; 0 drivers
|
|
o0x74c847850 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_29 .net/s v0x74ce1c3c0 29, 31 0, o0x74c847850; 0 drivers
|
|
o0x74c847880 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_30 .net/s v0x74ce1c3c0 30, 31 0, o0x74c847880; 0 drivers
|
|
o0x74c8478b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1c3c0_31 .net/s v0x74ce1c3c0 31, 31 0, o0x74c8478b0; 0 drivers
|
|
v0x74ce1c460_0 .net/s "w_bus", 63 0, L_0x74d1a03c0; alias, 1 drivers
|
|
v0x74ce1c500_0 .net/s "x_bus", 63 0, L_0x74d1a0280; alias, 1 drivers
|
|
L_0x74d1a05a0 .part L_0x74d1a0280, 0, 8;
|
|
L_0x74d1a0640 .part L_0x74d1a03c0, 0, 8;
|
|
L_0x74d1a0820 .part L_0x74d1a0280, 8, 8;
|
|
L_0x74d1a08c0 .part L_0x74d1a03c0, 8, 8;
|
|
L_0x74d1a0aa0 .part L_0x74d1a0280, 16, 8;
|
|
L_0x74d1a0b40 .part L_0x74d1a03c0, 16, 8;
|
|
L_0x74d1a0d20 .part L_0x74d1a0280, 24, 8;
|
|
L_0x74d1a0dc0 .part L_0x74d1a03c0, 24, 8;
|
|
L_0x74d1a0fa0 .part L_0x74d1a0280, 32, 8;
|
|
L_0x74d1a1040 .part L_0x74d1a03c0, 32, 8;
|
|
L_0x74d1a1220 .part L_0x74d1a0280, 40, 8;
|
|
L_0x74d1a12c0 .part L_0x74d1a03c0, 40, 8;
|
|
L_0x74d1a14a0 .part L_0x74d1a0280, 48, 8;
|
|
L_0x74d1a1540 .part L_0x74d1a03c0, 48, 8;
|
|
L_0x74d1a1720 .part L_0x74d1a0280, 56, 8;
|
|
L_0x74d1a17c0 .part L_0x74d1a03c0, 56, 8;
|
|
L_0x74d096800 .arith/sum 32, v0x74ce1ce60_0, L_0x74d096760;
|
|
S_0x74ce16700 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdd00 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce16880 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce16700;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x103a5cb80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a5cbc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a5cc00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce18fa0_0 .net/s *"_ivl_0", 15 0, L_0x74ce79fe0; 1 drivers
|
|
v0x74ce19040_0 .net/s *"_ivl_2", 15 0, L_0x74ce7a080; 1 drivers
|
|
v0x74ce190e0_0 .net *"_ivl_7", 0 0, L_0x74d1a0460; 1 drivers
|
|
v0x74ce19180_0 .net *"_ivl_9", 15 0, L_0x74d1a0500; 1 drivers
|
|
L_0x74c878250 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce19220_0 .net/s "acc_in", 31 0, L_0x74c878250; 1 drivers
|
|
v0x74ce192c0_0 .net/s "acc_out", 31 0, L_0x74d095e00; alias, 1 drivers
|
|
v0x74ce19360_0 .net/s "product", 15 0, L_0x74ce7a120; 1 drivers
|
|
v0x74ce19400_0 .net/s "product_ext", 31 0, L_0x74ce7a1c0; 1 drivers
|
|
v0x74ce194a0_0 .net/s "w", 7 0, L_0x74d1a0640; 1 drivers
|
|
v0x74ce19540_0 .net/s "x", 7 0, L_0x74d1a05a0; 1 drivers
|
|
L_0x74ce79fe0 .extend/s 16, L_0x74d1a05a0;
|
|
L_0x74ce7a080 .extend/s 16, L_0x74d1a0640;
|
|
L_0x74ce7a120 .arith/mult 16, L_0x74ce79fe0, L_0x74ce7a080;
|
|
L_0x74d1a0460 .part L_0x74ce7a120, 15, 1;
|
|
L_0x74d1a0500 .repeat 16, 16, L_0x74d1a0460;
|
|
L_0x74ce7a1c0 .concat [ 16 16 0 0], L_0x74ce7a120, L_0x74d1a0500;
|
|
L_0x74d095e00 .arith/sum 32, L_0x74c878250, L_0x74ce7a1c0;
|
|
S_0x74ce16a00 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdd40 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce16b80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce16a00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x103a728f0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a72930 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a72970 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce195e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7a260; 1 drivers
|
|
v0x74ce19680_0 .net/s *"_ivl_2", 15 0, L_0x74ce7a300; 1 drivers
|
|
v0x74ce19720_0 .net *"_ivl_7", 0 0, L_0x74d1a06e0; 1 drivers
|
|
v0x74ce197c0_0 .net *"_ivl_9", 15 0, L_0x74d1a0780; 1 drivers
|
|
L_0x74c878298 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce19860_0 .net/s "acc_in", 31 0, L_0x74c878298; 1 drivers
|
|
v0x74ce19900_0 .net/s "acc_out", 31 0, L_0x74d095ea0; alias, 1 drivers
|
|
v0x74ce199a0_0 .net/s "product", 15 0, L_0x74ce7a3a0; 1 drivers
|
|
v0x74ce19a40_0 .net/s "product_ext", 31 0, L_0x74ce7a440; 1 drivers
|
|
v0x74ce19ae0_0 .net/s "w", 7 0, L_0x74d1a08c0; 1 drivers
|
|
v0x74ce19b80_0 .net/s "x", 7 0, L_0x74d1a0820; 1 drivers
|
|
L_0x74ce7a260 .extend/s 16, L_0x74d1a0820;
|
|
L_0x74ce7a300 .extend/s 16, L_0x74d1a08c0;
|
|
L_0x74ce7a3a0 .arith/mult 16, L_0x74ce7a260, L_0x74ce7a300;
|
|
L_0x74d1a06e0 .part L_0x74ce7a3a0, 15, 1;
|
|
L_0x74d1a0780 .repeat 16, 16, L_0x74d1a06e0;
|
|
L_0x74ce7a440 .concat [ 16 16 0 0], L_0x74ce7a3a0, L_0x74d1a0780;
|
|
L_0x74d095ea0 .arith/sum 32, L_0x74c878298, L_0x74ce7a440;
|
|
S_0x74ce16d00 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdd80 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce16e80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce16d00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x103a72410 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a72450 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a72490 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce19c20_0 .net/s *"_ivl_0", 15 0, L_0x74ce7a4e0; 1 drivers
|
|
v0x74ce19cc0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7a580; 1 drivers
|
|
v0x74ce19d60_0 .net *"_ivl_7", 0 0, L_0x74d1a0960; 1 drivers
|
|
v0x74ce19e00_0 .net *"_ivl_9", 15 0, L_0x74d1a0a00; 1 drivers
|
|
L_0x74c8782e0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce19ea0_0 .net/s "acc_in", 31 0, L_0x74c8782e0; 1 drivers
|
|
v0x74ce19f40_0 .net/s "acc_out", 31 0, L_0x74d095fe0; alias, 1 drivers
|
|
v0x74ce19fe0_0 .net/s "product", 15 0, L_0x74ce7a620; 1 drivers
|
|
v0x74ce1a080_0 .net/s "product_ext", 31 0, L_0x74ce7a6c0; 1 drivers
|
|
v0x74ce1a120_0 .net/s "w", 7 0, L_0x74d1a0b40; 1 drivers
|
|
v0x74ce1a1c0_0 .net/s "x", 7 0, L_0x74d1a0aa0; 1 drivers
|
|
L_0x74ce7a4e0 .extend/s 16, L_0x74d1a0aa0;
|
|
L_0x74ce7a580 .extend/s 16, L_0x74d1a0b40;
|
|
L_0x74ce7a620 .arith/mult 16, L_0x74ce7a4e0, L_0x74ce7a580;
|
|
L_0x74d1a0960 .part L_0x74ce7a620, 15, 1;
|
|
L_0x74d1a0a00 .repeat 16, 16, L_0x74d1a0960;
|
|
L_0x74ce7a6c0 .concat [ 16 16 0 0], L_0x74ce7a620, L_0x74d1a0a00;
|
|
L_0x74d095fe0 .arith/sum 32, L_0x74c8782e0, L_0x74ce7a6c0;
|
|
S_0x74ce17000 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcddc0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce17180 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce17000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4000 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4040 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4080 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce1a260_0 .net/s *"_ivl_0", 15 0, L_0x74ce7a760; 1 drivers
|
|
v0x74ce1a300_0 .net/s *"_ivl_2", 15 0, L_0x74ce7a800; 1 drivers
|
|
v0x74ce1a3a0_0 .net *"_ivl_7", 0 0, L_0x74d1a0be0; 1 drivers
|
|
v0x74ce1a440_0 .net *"_ivl_9", 15 0, L_0x74d1a0c80; 1 drivers
|
|
L_0x74c878328 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1a4e0_0 .net/s "acc_in", 31 0, L_0x74c878328; 1 drivers
|
|
v0x74ce1a580_0 .net/s "acc_out", 31 0, L_0x74d096080; alias, 1 drivers
|
|
v0x74ce1a620_0 .net/s "product", 15 0, L_0x74ce7a8a0; 1 drivers
|
|
v0x74ce1a6c0_0 .net/s "product_ext", 31 0, L_0x74ce7a940; 1 drivers
|
|
v0x74ce1a760_0 .net/s "w", 7 0, L_0x74d1a0dc0; 1 drivers
|
|
v0x74ce1a800_0 .net/s "x", 7 0, L_0x74d1a0d20; 1 drivers
|
|
L_0x74ce7a760 .extend/s 16, L_0x74d1a0d20;
|
|
L_0x74ce7a800 .extend/s 16, L_0x74d1a0dc0;
|
|
L_0x74ce7a8a0 .arith/mult 16, L_0x74ce7a760, L_0x74ce7a800;
|
|
L_0x74d1a0be0 .part L_0x74ce7a8a0, 15, 1;
|
|
L_0x74d1a0c80 .repeat 16, 16, L_0x74d1a0be0;
|
|
L_0x74ce7a940 .concat [ 16 16 0 0], L_0x74ce7a8a0, L_0x74d1a0c80;
|
|
L_0x74d096080 .arith/sum 32, L_0x74c878328, L_0x74ce7a940;
|
|
S_0x74ce17300 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcde40 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce17480 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce17300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c40c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4100 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4140 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce1a8a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7a9e0; 1 drivers
|
|
v0x74ce1a940_0 .net/s *"_ivl_2", 15 0, L_0x74ce7aa80; 1 drivers
|
|
v0x74ce1a9e0_0 .net *"_ivl_7", 0 0, L_0x74d1a0e60; 1 drivers
|
|
v0x74ce1aa80_0 .net *"_ivl_9", 15 0, L_0x74d1a0f00; 1 drivers
|
|
L_0x74c878370 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1ab20_0 .net/s "acc_in", 31 0, L_0x74c878370; 1 drivers
|
|
v0x74ce1abc0_0 .net/s "acc_out", 31 0, L_0x74d096120; alias, 1 drivers
|
|
v0x74ce1ac60_0 .net/s "product", 15 0, L_0x74ce7ab20; 1 drivers
|
|
v0x74ce1ad00_0 .net/s "product_ext", 31 0, L_0x74ce7abc0; 1 drivers
|
|
v0x74ce1ada0_0 .net/s "w", 7 0, L_0x74d1a1040; 1 drivers
|
|
v0x74ce1ae40_0 .net/s "x", 7 0, L_0x74d1a0fa0; 1 drivers
|
|
L_0x74ce7a9e0 .extend/s 16, L_0x74d1a0fa0;
|
|
L_0x74ce7aa80 .extend/s 16, L_0x74d1a1040;
|
|
L_0x74ce7ab20 .arith/mult 16, L_0x74ce7a9e0, L_0x74ce7aa80;
|
|
L_0x74d1a0e60 .part L_0x74ce7ab20, 15, 1;
|
|
L_0x74d1a0f00 .repeat 16, 16, L_0x74d1a0e60;
|
|
L_0x74ce7abc0 .concat [ 16 16 0 0], L_0x74ce7ab20, L_0x74d1a0f00;
|
|
L_0x74d096120 .arith/sum 32, L_0x74c878370, L_0x74ce7abc0;
|
|
S_0x74ce17600 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcde80 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce17780 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce17600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4180 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c41c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4200 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce1aee0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7ac60; 1 drivers
|
|
v0x74ce1af80_0 .net/s *"_ivl_2", 15 0, L_0x74ce7ad00; 1 drivers
|
|
v0x74ce1b020_0 .net *"_ivl_7", 0 0, L_0x74d1a10e0; 1 drivers
|
|
v0x74ce1b0c0_0 .net *"_ivl_9", 15 0, L_0x74d1a1180; 1 drivers
|
|
L_0x74c8783b8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1b160_0 .net/s "acc_in", 31 0, L_0x74c8783b8; 1 drivers
|
|
v0x74ce1b200_0 .net/s "acc_out", 31 0, L_0x74d0961c0; alias, 1 drivers
|
|
v0x74ce1b2a0_0 .net/s "product", 15 0, L_0x74ce7ada0; 1 drivers
|
|
v0x74ce1b340_0 .net/s "product_ext", 31 0, L_0x74ce7ae40; 1 drivers
|
|
v0x74ce1b3e0_0 .net/s "w", 7 0, L_0x74d1a12c0; 1 drivers
|
|
v0x74ce1b480_0 .net/s "x", 7 0, L_0x74d1a1220; 1 drivers
|
|
L_0x74ce7ac60 .extend/s 16, L_0x74d1a1220;
|
|
L_0x74ce7ad00 .extend/s 16, L_0x74d1a12c0;
|
|
L_0x74ce7ada0 .arith/mult 16, L_0x74ce7ac60, L_0x74ce7ad00;
|
|
L_0x74d1a10e0 .part L_0x74ce7ada0, 15, 1;
|
|
L_0x74d1a1180 .repeat 16, 16, L_0x74d1a10e0;
|
|
L_0x74ce7ae40 .concat [ 16 16 0 0], L_0x74ce7ada0, L_0x74d1a1180;
|
|
L_0x74d0961c0 .arith/sum 32, L_0x74c8783b8, L_0x74ce7ae40;
|
|
S_0x74ce17900 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdec0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce17a80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce17900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4240 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4280 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c42c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce1b520_0 .net/s *"_ivl_0", 15 0, L_0x74ce7aee0; 1 drivers
|
|
v0x74ce1b5c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7af80; 1 drivers
|
|
v0x74ce1b660_0 .net *"_ivl_7", 0 0, L_0x74d1a1360; 1 drivers
|
|
v0x74ce1b700_0 .net *"_ivl_9", 15 0, L_0x74d1a1400; 1 drivers
|
|
L_0x74c878400 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1b7a0_0 .net/s "acc_in", 31 0, L_0x74c878400; 1 drivers
|
|
v0x74ce1b840_0 .net/s "acc_out", 31 0, L_0x74d096260; alias, 1 drivers
|
|
v0x74ce1b8e0_0 .net/s "product", 15 0, L_0x74ce7b020; 1 drivers
|
|
v0x74ce1b980_0 .net/s "product_ext", 31 0, L_0x74ce7b0c0; 1 drivers
|
|
v0x74ce1ba20_0 .net/s "w", 7 0, L_0x74d1a1540; 1 drivers
|
|
v0x74ce1bac0_0 .net/s "x", 7 0, L_0x74d1a14a0; 1 drivers
|
|
L_0x74ce7aee0 .extend/s 16, L_0x74d1a14a0;
|
|
L_0x74ce7af80 .extend/s 16, L_0x74d1a1540;
|
|
L_0x74ce7b020 .arith/mult 16, L_0x74ce7aee0, L_0x74ce7af80;
|
|
L_0x74d1a1360 .part L_0x74ce7b020, 15, 1;
|
|
L_0x74d1a1400 .repeat 16, 16, L_0x74d1a1360;
|
|
L_0x74ce7b0c0 .concat [ 16 16 0 0], L_0x74ce7b020, L_0x74d1a1400;
|
|
L_0x74d096260 .arith/sum 32, L_0x74c878400, L_0x74ce7b0c0;
|
|
S_0x74ce17c00 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdf00 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce17d80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce17c00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4300 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4340 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4380 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce1bb60_0 .net/s *"_ivl_0", 15 0, L_0x74ce7b160; 1 drivers
|
|
v0x74ce1bc00_0 .net/s *"_ivl_2", 15 0, L_0x74ce7b200; 1 drivers
|
|
v0x74ce1bca0_0 .net *"_ivl_7", 0 0, L_0x74d1a15e0; 1 drivers
|
|
v0x74ce1bd40_0 .net *"_ivl_9", 15 0, L_0x74d1a1680; 1 drivers
|
|
L_0x74c878448 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce1bde0_0 .net/s "acc_in", 31 0, L_0x74c878448; 1 drivers
|
|
v0x74ce1be80_0 .net/s "acc_out", 31 0, L_0x74d096300; alias, 1 drivers
|
|
v0x74ce1bf20_0 .net/s "product", 15 0, L_0x74ce7b2a0; 1 drivers
|
|
v0x74ce1c000_0 .net/s "product_ext", 31 0, L_0x74ce7b340; 1 drivers
|
|
v0x74ce1c0a0_0 .net/s "w", 7 0, L_0x74d1a17c0; 1 drivers
|
|
v0x74ce1c140_0 .net/s "x", 7 0, L_0x74d1a1720; 1 drivers
|
|
L_0x74ce7b160 .extend/s 16, L_0x74d1a1720;
|
|
L_0x74ce7b200 .extend/s 16, L_0x74d1a17c0;
|
|
L_0x74ce7b2a0 .arith/mult 16, L_0x74ce7b160, L_0x74ce7b200;
|
|
L_0x74d1a15e0 .part L_0x74ce7b2a0, 15, 1;
|
|
L_0x74d1a1680 .repeat 16, 16, L_0x74d1a15e0;
|
|
L_0x74ce7b340 .concat [ 16 16 0 0], L_0x74ce7b2a0, L_0x74d1a1680;
|
|
L_0x74d096300 .arith/sum 32, L_0x74c878448, L_0x74ce7b340;
|
|
S_0x74ce20000 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcde00 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc461b0 .functor BUFZ 32, L_0x74d095e00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20180 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdf40 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc46220 .functor BUFZ 32, L_0x74d095ea0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20300 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdf80 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc46290 .functor BUFZ 32, L_0x74d095fe0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20480 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdcdfc0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc46300 .functor BUFZ 32, L_0x74d096080, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20600 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce000 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc46370 .functor BUFZ 32, L_0x74d096120, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20780 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce040 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc463e0 .functor BUFZ 32, L_0x74d0961c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20900 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce080 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc46450 .functor BUFZ 32, L_0x74d096260, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20a80 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce0c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc464c0 .functor BUFZ 32, L_0x74d096300, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce20c00 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce100 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce20d80 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce20c00;
|
|
.timescale 0 0;
|
|
P_0x74cdce140 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d0963a0 .arith/sum 32, L_0x74cc461b0, L_0x74cc46220;
|
|
S_0x74ce20f00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce20c00;
|
|
.timescale 0 0;
|
|
P_0x74cdce180 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d096440 .arith/sum 32, L_0x74cc46290, L_0x74cc46300;
|
|
S_0x74ce21080 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce20c00;
|
|
.timescale 0 0;
|
|
P_0x74cdce1c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d0964e0 .arith/sum 32, L_0x74cc46370, L_0x74cc463e0;
|
|
S_0x74ce21200 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce20c00;
|
|
.timescale 0 0;
|
|
P_0x74cdce200 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d096580 .arith/sum 32, L_0x74cc46450, L_0x74cc464c0;
|
|
S_0x74ce21380 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce240 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce21500 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce21380;
|
|
.timescale 0 0;
|
|
P_0x74cdce280 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d096620 .arith/sum 32, L_0x74d0963a0, L_0x74d096440;
|
|
S_0x74ce21680 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce21380;
|
|
.timescale 0 0;
|
|
P_0x74cdce2c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d0966c0 .arith/sum 32, L_0x74d0964e0, L_0x74d096580;
|
|
S_0x74ce21800 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce16580;
|
|
.timescale 0 0;
|
|
P_0x74cdce300 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce21980 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce21800;
|
|
.timescale 0 0;
|
|
P_0x74cdce340 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d096760 .arith/sum 32, L_0x74d096620, L_0x74d0966c0;
|
|
S_0x103a681e0 .scope module, "psram_controller" "psram_controller" 10 1;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "mem_req";
|
|
.port_info 3 /INPUT 1 "mem_wr";
|
|
.port_info 4 /INPUT 22 "mem_addr";
|
|
.port_info 5 /INPUT 16 "mem_wdata";
|
|
.port_info 6 /INPUT 1 "mem_lb_n";
|
|
.port_info 7 /INPUT 1 "mem_ub_n";
|
|
.port_info 8 /OUTPUT 16 "mem_rdata";
|
|
.port_info 9 /OUTPUT 1 "mem_ready";
|
|
.port_info 10 /OUTPUT 22 "psram_a";
|
|
.port_info 11 /INOUT 16 "psram_dq";
|
|
.port_info 12 /OUTPUT 1 "psram_ce_n";
|
|
.port_info 13 /OUTPUT 1 "psram_oe_n";
|
|
.port_info 14 /OUTPUT 1 "psram_we_n";
|
|
.port_info 15 /OUTPUT 1 "psram_lb_n";
|
|
.port_info 16 /OUTPUT 1 "psram_ub_n";
|
|
.port_info 17 /OUTPUT 1 "psram_zz_n";
|
|
P_0x103a717b0 .param/l "ACCESS_CYCLES" 1 10 43, +C4<00000000000000000000000000000110>;
|
|
P_0x103a717f0 .param/l "ADDR_WIDTH" 0 10 2, +C4<00000000000000000000000000010110>;
|
|
P_0x103a71830 .param/l "CLK_FREQ_MHZ" 0 10 4, +C4<00000000000000000000000001010000>;
|
|
P_0x103a71870 .param/l "COUNTER_WIDTH" 1 10 49, +C4<00000000000000000000000000001110>;
|
|
P_0x103a718b0 .param/l "DATA_WIDTH" 0 10 3, +C4<00000000000000000000000000010000>;
|
|
P_0x103a718f0 .param/l "INIT_CYCLES" 1 10 46, +C4<00000000000000000010111011100000>;
|
|
P_0x103a71930 .param/l "STATE_IDLE" 1 10 58, C4<001>;
|
|
P_0x103a71970 .param/l "STATE_INIT" 1 10 57, C4<000>;
|
|
P_0x103a719b0 .param/l "STATE_READ" 1 10 59, C4<010>;
|
|
P_0x103a719f0 .param/l "STATE_WRITE" 1 10 60, C4<011>;
|
|
P_0x103a71a30 .param/l "STATE_WRITE_WAIT" 1 10 61, C4<100>;
|
|
o0x74c849290 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
|
|
; Elide local net with no drivers, v0x74ce1f3e0_0 name=_ivl_0
|
|
v0x74ce1f480_0 .var "address_reg", 21 0;
|
|
o0x74c8492f0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x74ce1f520_0 .net "clk", 0 0, o0x74c8492f0; 0 drivers
|
|
v0x74ce1f5c0_0 .var "counter", 13 0;
|
|
v0x74ce1f660_0 .var "dq_oe", 0 0;
|
|
v0x74ce1f700_0 .var "dq_out", 15 0;
|
|
v0x74ce1f7a0_0 .var "lb_reg", 0 0;
|
|
o0x74c8493e0 .functor BUFZ 22, c4<zzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1f840_0 .net "mem_addr", 21 0, o0x74c8493e0; 0 drivers
|
|
o0x74c849410 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x74ce1f8e0_0 .net "mem_lb_n", 0 0, o0x74c849410; 0 drivers
|
|
v0x74ce1f980_0 .var "mem_rdata", 15 0;
|
|
v0x74ce1fa20_0 .var "mem_ready", 0 0;
|
|
o0x74c8494a0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x74ce1fac0_0 .net "mem_req", 0 0, o0x74c8494a0; 0 drivers
|
|
o0x74c8494d0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x74ce1fb60_0 .net "mem_ub_n", 0 0, o0x74c8494d0; 0 drivers
|
|
o0x74c849500 .functor BUFZ 16, c4<zzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce1fc00_0 .net "mem_wdata", 15 0, o0x74c849500; 0 drivers
|
|
o0x74c849530 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x74ce1fca0_0 .net "mem_wr", 0 0, o0x74c849530; 0 drivers
|
|
v0x74ce1fd40_0 .var "psram_a", 21 0;
|
|
v0x74ce1fde0_0 .var "psram_ce_n", 0 0;
|
|
v0x74ce1fe80_0 .net "psram_dq", 15 0, L_0x74cddab20; 1 drivers
|
|
v0x74ce1ff20_0 .var "psram_lb_n", 0 0;
|
|
v0x74ce24000_0 .var "psram_oe_n", 0 0;
|
|
v0x74ce240a0_0 .var "psram_ub_n", 0 0;
|
|
v0x74ce24140_0 .var "psram_we_n", 0 0;
|
|
v0x74ce241e0_0 .var "psram_zz_n", 0 0;
|
|
o0x74c8496e0 .functor BUFZ 1, c4<z>; HiZ drive
|
|
v0x74ce24280_0 .net "rst", 0 0, o0x74c8496e0; 0 drivers
|
|
v0x74ce24320_0 .var "state", 2 0;
|
|
v0x74ce243c0_0 .var "ub_reg", 0 0;
|
|
v0x74ce24460_0 .var "wdata_reg", 15 0;
|
|
v0x74ce24500_0 .var "wr_reg", 0 0;
|
|
E_0x74ce08f80 .event posedge, v0x74ce1f520_0;
|
|
L_0x74cddab20 .functor MUXZ 16, o0x74c849290, v0x74ce1f700_0, v0x74ce1f660_0, C4<>;
|
|
S_0x103a71ab0 .scope module, "tb" "tb" 11 3;
|
|
.timescale -9 -12;
|
|
P_0x74cd0be80 .param/l "ACC_WIDTH" 0 11 9, +C4<00000000000000000000000000100000>;
|
|
P_0x74cd0bec0 .param/l "DATA_WIDTH" 0 11 5, +C4<00000000000000000000000000001000>;
|
|
P_0x74cd0bf00 .param/l "N_INPUTS" 0 11 6, +C4<00000000000000000000000000100000>;
|
|
P_0x74cd0bf40 .param/l "N_NEURONS" 0 11 7, +C4<00000000000000000000000000001000>;
|
|
P_0x74cd0bf80 .param/l "PARALLEL" 0 11 8, +C4<00000000000000000000000000001000>;
|
|
v0x74ce792c0_0 .var/s "bias_bus", 63 0;
|
|
v0x74ce79360_0 .net "busy", 0 0, L_0x74cddabc0; 1 drivers
|
|
v0x74ce79400_0 .var "clk", 0 0;
|
|
v0x74ce794a0_0 .net "done", 0 0, L_0x74cddac60; 1 drivers
|
|
v0x74ce79540_0 .var/i "errors", 31 0;
|
|
v0x74ce795e0_0 .var/i "i", 31 0;
|
|
v0x74ce79680_0 .var "rst", 0 0;
|
|
v0x74ce79720_0 .var "start", 0 0;
|
|
v0x74ce797c0_0 .var/s "weights_bus", 2047 0;
|
|
v0x74ce79860_0 .var/s "x_bus", 255 0;
|
|
v0x74ce79900_0 .net/s "y_bus", 63 0, L_0x74ce87840; 1 drivers
|
|
S_0x74ce21b00 .scope module, "dut" "layer" 11 38, 12 1 0, S_0x103a71ab0;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 2048 "weights_bus";
|
|
.port_info 5 /INPUT 64 "bias_bus";
|
|
.port_info 6 /OUTPUT 64 "y_bus";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x74cd0bd40 .param/l "ACC_WIDTH" 0 12 6, +C4<00000000000000000000000000100000>;
|
|
P_0x74cd0bd80 .param/l "DATA_WIDTH" 0 12 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74cd0bdc0 .param/l "N_INPUTS" 0 12 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74cd0be00 .param/l "N_NEURONS" 0 12 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74cd0be40 .param/l "PARALLEL" 0 12 5, +C4<00000000000000000000000000001000>;
|
|
v0x74ce78be0_0 .net/s "bias_bus", 63 0, v0x74ce792c0_0; 1 drivers
|
|
v0x74ce78c80_0 .net "busy", 0 0, L_0x74cddabc0; alias, 1 drivers
|
|
v0x74ce78d20_0 .net "clk", 0 0, v0x74ce79400_0; 1 drivers
|
|
v0x74ce78dc0_0 .net "done", 0 0, L_0x74cddac60; alias, 1 drivers
|
|
v0x74ce78e60_0 .net "neuron_busy", 7 0, L_0x74ce878e0; 1 drivers
|
|
v0x74ce78f00_0 .net "neuron_done", 7 0, L_0x74ce87980; 1 drivers
|
|
v0x74ce78fa0_0 .net "rst", 0 0, v0x74ce79680_0; 1 drivers
|
|
v0x74ce79040_0 .net "start", 0 0, v0x74ce79720_0; 1 drivers
|
|
v0x74ce790e0_0 .net/s "weights_bus", 2047 0, v0x74ce797c0_0; 1 drivers
|
|
v0x74ce79180_0 .net/s "x_bus", 255 0, v0x74ce79860_0; 1 drivers
|
|
v0x74ce79220_0 .net/s "y_bus", 63 0, L_0x74ce87840; alias, 1 drivers
|
|
L_0x74d1a3160 .part v0x74ce797c0_0, 0, 256;
|
|
L_0x74d1a3200 .part v0x74ce792c0_0, 0, 8;
|
|
L_0x74d1e0a00 .part v0x74ce797c0_0, 256, 256;
|
|
L_0x74d1e0aa0 .part v0x74ce792c0_0, 8, 8;
|
|
L_0x74d1e2260 .part v0x74ce797c0_0, 512, 256;
|
|
L_0x74d1e2300 .part v0x74ce792c0_0, 16, 8;
|
|
L_0x74d1e3ac0 .part v0x74ce797c0_0, 768, 256;
|
|
L_0x74d1e3b60 .part v0x74ce792c0_0, 24, 8;
|
|
L_0x74d1ed360 .part v0x74ce797c0_0, 1024, 256;
|
|
L_0x74d1ed400 .part v0x74ce792c0_0, 32, 8;
|
|
L_0x74d1eebc0 .part v0x74ce797c0_0, 1280, 256;
|
|
L_0x74d1eec60 .part v0x74ce792c0_0, 40, 8;
|
|
L_0x74d1f8460 .part v0x74ce797c0_0, 1536, 256;
|
|
L_0x74d1f8500 .part v0x74ce792c0_0, 48, 8;
|
|
L_0x74d1f9cc0 .part v0x74ce797c0_0, 1792, 256;
|
|
L_0x74d1f9d60 .part v0x74ce792c0_0, 56, 8;
|
|
LS_0x74ce87840_0_0 .concat8 [ 8 8 8 8], v0x74ce30dc0_0, v0x74ce39680_0, v0x74ce41f40_0, v0x74ce4a800_0;
|
|
LS_0x74ce87840_0_4 .concat8 [ 8 8 8 8], v0x74ce570c0_0, v0x74ce5f980_0, v0x74ce70280_0, v0x74ce78b40_0;
|
|
L_0x74ce87840 .concat8 [ 32 32 0 0], LS_0x74ce87840_0_0, LS_0x74ce87840_0_4;
|
|
LS_0x74ce878e0_0_0 .concat8 [ 1 1 1 1], v0x74ce306e0_0, v0x74ce38fa0_0, v0x74ce41860_0, v0x74ce4a120_0;
|
|
LS_0x74ce878e0_0_4 .concat8 [ 1 1 1 1], v0x74ce569e0_0, v0x74ce5f2a0_0, v0x74ce6bb60_0, v0x74ce78460_0;
|
|
L_0x74ce878e0 .concat8 [ 4 4 0 0], LS_0x74ce878e0_0_0, LS_0x74ce878e0_0_4;
|
|
LS_0x74ce87980_0_0 .concat8 [ 1 1 1 1], v0x74ce30820_0, v0x74ce390e0_0, v0x74ce419a0_0, v0x74ce4a260_0;
|
|
LS_0x74ce87980_0_4 .concat8 [ 1 1 1 1], v0x74ce56b20_0, v0x74ce5f3e0_0, v0x74ce6bca0_0, v0x74ce785a0_0;
|
|
L_0x74ce87980 .concat8 [ 4 4 0 0], LS_0x74ce87980_0_0, LS_0x74ce87980_0_4;
|
|
L_0x74cddabc0 .reduce/or L_0x74ce878e0;
|
|
L_0x74cddac60 .reduce/and L_0x74ce87980;
|
|
S_0x74ce21c80 .scope generate, "GEN_NEURON[0]" "GEN_NEURON[0]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74cdce3c0 .param/l "n" 1 12 34, +C4<00>;
|
|
S_0x74ce21e00 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce21c80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a77620 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77660 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a776a0 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a776e0 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a77720 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77760 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce27b60_0 .net *"_ivl_0", 31 0, L_0x74ce7b480; 1 drivers
|
|
v0x74ce27c00_0 .net *"_ivl_11", 31 0, L_0x74ce7b5c0; 1 drivers
|
|
v0x74ce27ca0_0 .net *"_ivl_14", 31 0, L_0x74ce7b660; 1 drivers
|
|
L_0x74c878568 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce27d40_0 .net *"_ivl_17", 29 0, L_0x74c878568; 1 drivers
|
|
L_0x74c8785b0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce27de0_0 .net/2u *"_ivl_18", 31 0, L_0x74c8785b0; 1 drivers
|
|
v0x74ce27e80_0 .net *"_ivl_21", 31 0, L_0x74ce7b700; 1 drivers
|
|
L_0x74c8785f8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce27f20_0 .net/2u *"_ivl_22", 31 0, L_0x74c8785f8; 1 drivers
|
|
v0x74ce30000_0 .net *"_ivl_25", 31 0, L_0x74ce7b7a0; 1 drivers
|
|
v0x74ce300a0_0 .net *"_ivl_29", 0 0, L_0x74d1a3020; 1 drivers
|
|
L_0x74c878490 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce30140_0 .net *"_ivl_3", 29 0, L_0x74c878490; 1 drivers
|
|
v0x74ce301e0_0 .net *"_ivl_31", 23 0, L_0x74d1a30c0; 1 drivers
|
|
L_0x74c8784d8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce30280_0 .net/2u *"_ivl_4", 31 0, L_0x74c8784d8; 1 drivers
|
|
v0x74ce30320_0 .net *"_ivl_7", 31 0, L_0x74ce7b520; 1 drivers
|
|
L_0x74c878520 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce303c0_0 .net/2u *"_ivl_8", 31 0, L_0x74c878520; 1 drivers
|
|
v0x74ce30460_0 .var/s "acc", 31 0;
|
|
v0x74ce30500_0 .net/s "acc_next", 31 0, L_0x74d0972a0; 1 drivers
|
|
v0x74ce305a0_0 .net/s "bias", 7 0, L_0x74d1a3200; 1 drivers
|
|
v0x74ce30640_0 .net/s "bias_ext", 31 0, L_0x74ce7cc80; 1 drivers
|
|
v0x74ce306e0_0 .var "busy", 0 0;
|
|
v0x74ce30780_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce30820_0 .var "done", 0 0;
|
|
v0x74ce308c0_0 .net/s "final_acc", 31 0, L_0x74d097340; 1 drivers
|
|
v0x74ce30960_0 .var "group_index", 1 0;
|
|
v0x74ce30a00_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce30aa0_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce30b40_0 .net/s "w_bus", 255 0, L_0x74d1a3160; 1 drivers
|
|
v0x74ce30be0_0 .net/s "w_group", 63 0, L_0x74d1a1ae0; 1 drivers
|
|
v0x74ce30c80_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce30d20_0 .net/s "x_group", 63 0, L_0x74d1a1a40; 1 drivers
|
|
v0x74ce30dc0_0 .var/s "y", 7 0;
|
|
E_0x74ce08fc0 .event posedge, v0x74ce30780_0;
|
|
L_0x74ce7b480 .concat [ 2 30 0 0], v0x74ce30960_0, L_0x74c878490;
|
|
L_0x74ce7b520 .arith/mult 32, L_0x74ce7b480, L_0x74c8784d8;
|
|
L_0x74ce7b5c0 .arith/mult 32, L_0x74ce7b520, L_0x74c878520;
|
|
L_0x74d1a1a40 .part/v v0x74ce79860_0, L_0x74ce7b5c0, 64;
|
|
L_0x74ce7b660 .concat [ 2 30 0 0], v0x74ce30960_0, L_0x74c878568;
|
|
L_0x74ce7b700 .arith/mult 32, L_0x74ce7b660, L_0x74c8785b0;
|
|
L_0x74ce7b7a0 .arith/mult 32, L_0x74ce7b700, L_0x74c8785f8;
|
|
L_0x74d1a1ae0 .part/v L_0x74d1a3160, L_0x74ce7b7a0, 64;
|
|
L_0x74d1a3020 .part L_0x74d1a3200, 7, 1;
|
|
L_0x74d1a30c0 .repeat 24, 24, L_0x74d1a3020;
|
|
L_0x74ce7cc80 .concat [ 8 24 0 0], L_0x74d1a3200, L_0x74d1a30c0;
|
|
L_0x74d097340 .arith/sum 32, L_0x74d0972a0, L_0x74ce7cc80;
|
|
S_0x74ce21f80 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce21e00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c0600 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c0640 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0680 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c06c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce277a0_0 .net/s "acc_in", 31 0, v0x74ce30460_0; 1 drivers
|
|
v0x74ce27840_0 .net/s "acc_out", 31 0, L_0x74d0972a0; alias, 1 drivers
|
|
v0x74ce278e0 .array "products", 7 0;
|
|
v0x74ce278e0_0 .net/s v0x74ce278e0 0, 31 0, L_0x74d096940; 1 drivers
|
|
v0x74ce278e0_1 .net/s v0x74ce278e0 1, 31 0, L_0x74d0969e0; 1 drivers
|
|
v0x74ce278e0_2 .net/s v0x74ce278e0 2, 31 0, L_0x74d096a80; 1 drivers
|
|
v0x74ce278e0_3 .net/s v0x74ce278e0 3, 31 0, L_0x74d096b20; 1 drivers
|
|
v0x74ce278e0_4 .net/s v0x74ce278e0 4, 31 0, L_0x74d096bc0; 1 drivers
|
|
v0x74ce278e0_5 .net/s v0x74ce278e0 5, 31 0, L_0x74d096c60; 1 drivers
|
|
v0x74ce278e0_6 .net/s v0x74ce278e0 6, 31 0, L_0x74d096d00; 1 drivers
|
|
v0x74ce278e0_7 .net/s v0x74ce278e0 7, 31 0, L_0x74d096da0; 1 drivers
|
|
v0x74ce27980 .array "tree", 31 0;
|
|
v0x74ce27980_0 .net/s v0x74ce27980 0, 31 0, L_0x74cc46530; 1 drivers
|
|
v0x74ce27980_1 .net/s v0x74ce27980 1, 31 0, L_0x74cc465a0; 1 drivers
|
|
v0x74ce27980_2 .net/s v0x74ce27980 2, 31 0, L_0x74cc46610; 1 drivers
|
|
v0x74ce27980_3 .net/s v0x74ce27980 3, 31 0, L_0x74cc46680; 1 drivers
|
|
v0x74ce27980_4 .net/s v0x74ce27980 4, 31 0, L_0x74cc466f0; 1 drivers
|
|
v0x74ce27980_5 .net/s v0x74ce27980 5, 31 0, L_0x74cc46760; 1 drivers
|
|
v0x74ce27980_6 .net/s v0x74ce27980 6, 31 0, L_0x74cc467d0; 1 drivers
|
|
v0x74ce27980_7 .net/s v0x74ce27980 7, 31 0, L_0x74cc46840; 1 drivers
|
|
v0x74ce27980_8 .net/s v0x74ce27980 8, 31 0, L_0x74d096e40; 1 drivers
|
|
v0x74ce27980_9 .net/s v0x74ce27980 9, 31 0, L_0x74d096ee0; 1 drivers
|
|
v0x74ce27980_10 .net/s v0x74ce27980 10, 31 0, L_0x74d096f80; 1 drivers
|
|
v0x74ce27980_11 .net/s v0x74ce27980 11, 31 0, L_0x74d097020; 1 drivers
|
|
o0x74c84b2d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_12 .net/s v0x74ce27980 12, 31 0, o0x74c84b2d0; 0 drivers
|
|
o0x74c84b300 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_13 .net/s v0x74ce27980 13, 31 0, o0x74c84b300; 0 drivers
|
|
o0x74c84b330 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_14 .net/s v0x74ce27980 14, 31 0, o0x74c84b330; 0 drivers
|
|
o0x74c84b360 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_15 .net/s v0x74ce27980 15, 31 0, o0x74c84b360; 0 drivers
|
|
v0x74ce27980_16 .net/s v0x74ce27980 16, 31 0, L_0x74d0970c0; 1 drivers
|
|
v0x74ce27980_17 .net/s v0x74ce27980 17, 31 0, L_0x74d097160; 1 drivers
|
|
o0x74c84b3f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_18 .net/s v0x74ce27980 18, 31 0, o0x74c84b3f0; 0 drivers
|
|
o0x74c84b420 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_19 .net/s v0x74ce27980 19, 31 0, o0x74c84b420; 0 drivers
|
|
o0x74c84b450 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_20 .net/s v0x74ce27980 20, 31 0, o0x74c84b450; 0 drivers
|
|
o0x74c84b480 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_21 .net/s v0x74ce27980 21, 31 0, o0x74c84b480; 0 drivers
|
|
o0x74c84b4b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_22 .net/s v0x74ce27980 22, 31 0, o0x74c84b4b0; 0 drivers
|
|
o0x74c84b4e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_23 .net/s v0x74ce27980 23, 31 0, o0x74c84b4e0; 0 drivers
|
|
v0x74ce27980_24 .net/s v0x74ce27980 24, 31 0, L_0x74d097200; 1 drivers
|
|
o0x74c84b540 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_25 .net/s v0x74ce27980 25, 31 0, o0x74c84b540; 0 drivers
|
|
o0x74c84b570 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_26 .net/s v0x74ce27980 26, 31 0, o0x74c84b570; 0 drivers
|
|
o0x74c84b5a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_27 .net/s v0x74ce27980 27, 31 0, o0x74c84b5a0; 0 drivers
|
|
o0x74c84b5d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_28 .net/s v0x74ce27980 28, 31 0, o0x74c84b5d0; 0 drivers
|
|
o0x74c84b600 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_29 .net/s v0x74ce27980 29, 31 0, o0x74c84b600; 0 drivers
|
|
o0x74c84b630 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_30 .net/s v0x74ce27980 30, 31 0, o0x74c84b630; 0 drivers
|
|
o0x74c84b660 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce27980_31 .net/s v0x74ce27980 31, 31 0, o0x74c84b660; 0 drivers
|
|
v0x74ce27a20_0 .net/s "w_bus", 63 0, L_0x74d1a1ae0; alias, 1 drivers
|
|
v0x74ce27ac0_0 .net/s "x_bus", 63 0, L_0x74d1a1a40; alias, 1 drivers
|
|
L_0x74d1a1cc0 .part L_0x74d1a1a40, 0, 8;
|
|
L_0x74d1a1d60 .part L_0x74d1a1ae0, 0, 8;
|
|
L_0x74d1a1f40 .part L_0x74d1a1a40, 8, 8;
|
|
L_0x74d1a1fe0 .part L_0x74d1a1ae0, 8, 8;
|
|
L_0x74d1a21c0 .part L_0x74d1a1a40, 16, 8;
|
|
L_0x74d1a2260 .part L_0x74d1a1ae0, 16, 8;
|
|
L_0x74d1a2440 .part L_0x74d1a1a40, 24, 8;
|
|
L_0x74d1a24e0 .part L_0x74d1a1ae0, 24, 8;
|
|
L_0x74d1a26c0 .part L_0x74d1a1a40, 32, 8;
|
|
L_0x74d1a2760 .part L_0x74d1a1ae0, 32, 8;
|
|
L_0x74d1a2940 .part L_0x74d1a1a40, 40, 8;
|
|
L_0x74d1a29e0 .part L_0x74d1a1ae0, 40, 8;
|
|
L_0x74d1a2bc0 .part L_0x74d1a1a40, 48, 8;
|
|
L_0x74d1a2c60 .part L_0x74d1a1ae0, 48, 8;
|
|
L_0x74d1a2e40 .part L_0x74d1a1a40, 56, 8;
|
|
L_0x74d1a2ee0 .part L_0x74d1a1ae0, 56, 8;
|
|
L_0x74d0972a0 .arith/sum 32, v0x74ce30460_0, L_0x74d097200;
|
|
S_0x74ce22100 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce400 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce22280 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce22100;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c43c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4400 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4440 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce245a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7b840; 1 drivers
|
|
v0x74ce24640_0 .net/s *"_ivl_2", 15 0, L_0x74ce7b8e0; 1 drivers
|
|
v0x74ce246e0_0 .net *"_ivl_7", 0 0, L_0x74d1a1b80; 1 drivers
|
|
v0x74ce24780_0 .net *"_ivl_9", 15 0, L_0x74d1a1c20; 1 drivers
|
|
L_0x74c878640 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce24820_0 .net/s "acc_in", 31 0, L_0x74c878640; 1 drivers
|
|
v0x74ce248c0_0 .net/s "acc_out", 31 0, L_0x74d096940; alias, 1 drivers
|
|
v0x74ce24960_0 .net/s "product", 15 0, L_0x74ce7b980; 1 drivers
|
|
v0x74ce24a00_0 .net/s "product_ext", 31 0, L_0x74ce7ba20; 1 drivers
|
|
v0x74ce24aa0_0 .net/s "w", 7 0, L_0x74d1a1d60; 1 drivers
|
|
v0x74ce24b40_0 .net/s "x", 7 0, L_0x74d1a1cc0; 1 drivers
|
|
L_0x74ce7b840 .extend/s 16, L_0x74d1a1cc0;
|
|
L_0x74ce7b8e0 .extend/s 16, L_0x74d1a1d60;
|
|
L_0x74ce7b980 .arith/mult 16, L_0x74ce7b840, L_0x74ce7b8e0;
|
|
L_0x74d1a1b80 .part L_0x74ce7b980, 15, 1;
|
|
L_0x74d1a1c20 .repeat 16, 16, L_0x74d1a1b80;
|
|
L_0x74ce7ba20 .concat [ 16 16 0 0], L_0x74ce7b980, L_0x74d1a1c20;
|
|
L_0x74d096940 .arith/sum 32, L_0x74c878640, L_0x74ce7ba20;
|
|
S_0x74ce22400 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce440 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce22580 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce22400;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4480 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c44c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4500 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce24be0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7bac0; 1 drivers
|
|
v0x74ce24c80_0 .net/s *"_ivl_2", 15 0, L_0x74ce7bb60; 1 drivers
|
|
v0x74ce24d20_0 .net *"_ivl_7", 0 0, L_0x74d1a1e00; 1 drivers
|
|
v0x74ce24dc0_0 .net *"_ivl_9", 15 0, L_0x74d1a1ea0; 1 drivers
|
|
L_0x74c878688 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce24e60_0 .net/s "acc_in", 31 0, L_0x74c878688; 1 drivers
|
|
v0x74ce24f00_0 .net/s "acc_out", 31 0, L_0x74d0969e0; alias, 1 drivers
|
|
v0x74ce24fa0_0 .net/s "product", 15 0, L_0x74ce7bc00; 1 drivers
|
|
v0x74ce25040_0 .net/s "product_ext", 31 0, L_0x74ce7bca0; 1 drivers
|
|
v0x74ce250e0_0 .net/s "w", 7 0, L_0x74d1a1fe0; 1 drivers
|
|
v0x74ce25180_0 .net/s "x", 7 0, L_0x74d1a1f40; 1 drivers
|
|
L_0x74ce7bac0 .extend/s 16, L_0x74d1a1f40;
|
|
L_0x74ce7bb60 .extend/s 16, L_0x74d1a1fe0;
|
|
L_0x74ce7bc00 .arith/mult 16, L_0x74ce7bac0, L_0x74ce7bb60;
|
|
L_0x74d1a1e00 .part L_0x74ce7bc00, 15, 1;
|
|
L_0x74d1a1ea0 .repeat 16, 16, L_0x74d1a1e00;
|
|
L_0x74ce7bca0 .concat [ 16 16 0 0], L_0x74ce7bc00, L_0x74d1a1ea0;
|
|
L_0x74d0969e0 .arith/sum 32, L_0x74c878688, L_0x74ce7bca0;
|
|
S_0x74ce22700 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce480 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce22880 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce22700;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4540 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4580 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c45c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce25220_0 .net/s *"_ivl_0", 15 0, L_0x74ce7bd40; 1 drivers
|
|
v0x74ce252c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7bde0; 1 drivers
|
|
v0x74ce25360_0 .net *"_ivl_7", 0 0, L_0x74d1a2080; 1 drivers
|
|
v0x74ce25400_0 .net *"_ivl_9", 15 0, L_0x74d1a2120; 1 drivers
|
|
L_0x74c8786d0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce254a0_0 .net/s "acc_in", 31 0, L_0x74c8786d0; 1 drivers
|
|
v0x74ce25540_0 .net/s "acc_out", 31 0, L_0x74d096a80; alias, 1 drivers
|
|
v0x74ce255e0_0 .net/s "product", 15 0, L_0x74ce7be80; 1 drivers
|
|
v0x74ce25680_0 .net/s "product_ext", 31 0, L_0x74ce7bf20; 1 drivers
|
|
v0x74ce25720_0 .net/s "w", 7 0, L_0x74d1a2260; 1 drivers
|
|
v0x74ce257c0_0 .net/s "x", 7 0, L_0x74d1a21c0; 1 drivers
|
|
L_0x74ce7bd40 .extend/s 16, L_0x74d1a21c0;
|
|
L_0x74ce7bde0 .extend/s 16, L_0x74d1a2260;
|
|
L_0x74ce7be80 .arith/mult 16, L_0x74ce7bd40, L_0x74ce7bde0;
|
|
L_0x74d1a2080 .part L_0x74ce7be80, 15, 1;
|
|
L_0x74d1a2120 .repeat 16, 16, L_0x74d1a2080;
|
|
L_0x74ce7bf20 .concat [ 16 16 0 0], L_0x74ce7be80, L_0x74d1a2120;
|
|
L_0x74d096a80 .arith/sum 32, L_0x74c8786d0, L_0x74ce7bf20;
|
|
S_0x74ce22a00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce4c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce22b80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce22a00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4600 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4640 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4680 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce25860_0 .net/s *"_ivl_0", 15 0, L_0x74ce7c000; 1 drivers
|
|
v0x74ce25900_0 .net/s *"_ivl_2", 15 0, L_0x74ce7c0a0; 1 drivers
|
|
v0x74ce259a0_0 .net *"_ivl_7", 0 0, L_0x74d1a2300; 1 drivers
|
|
v0x74ce25a40_0 .net *"_ivl_9", 15 0, L_0x74d1a23a0; 1 drivers
|
|
L_0x74c878718 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce25ae0_0 .net/s "acc_in", 31 0, L_0x74c878718; 1 drivers
|
|
v0x74ce25b80_0 .net/s "acc_out", 31 0, L_0x74d096b20; alias, 1 drivers
|
|
v0x74ce25c20_0 .net/s "product", 15 0, L_0x74ce7c140; 1 drivers
|
|
v0x74ce25cc0_0 .net/s "product_ext", 31 0, L_0x74ce7c1e0; 1 drivers
|
|
v0x74ce25d60_0 .net/s "w", 7 0, L_0x74d1a24e0; 1 drivers
|
|
v0x74ce25e00_0 .net/s "x", 7 0, L_0x74d1a2440; 1 drivers
|
|
L_0x74ce7c000 .extend/s 16, L_0x74d1a2440;
|
|
L_0x74ce7c0a0 .extend/s 16, L_0x74d1a24e0;
|
|
L_0x74ce7c140 .arith/mult 16, L_0x74ce7c000, L_0x74ce7c0a0;
|
|
L_0x74d1a2300 .part L_0x74ce7c140, 15, 1;
|
|
L_0x74d1a23a0 .repeat 16, 16, L_0x74d1a2300;
|
|
L_0x74ce7c1e0 .concat [ 16 16 0 0], L_0x74ce7c140, L_0x74d1a23a0;
|
|
L_0x74d096b20 .arith/sum 32, L_0x74c878718, L_0x74ce7c1e0;
|
|
S_0x74ce22d00 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce540 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce22e80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce22d00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c46c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4700 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4740 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce25ea0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7c280; 1 drivers
|
|
v0x74ce25f40_0 .net/s *"_ivl_2", 15 0, L_0x74ce7c320; 1 drivers
|
|
v0x74ce25fe0_0 .net *"_ivl_7", 0 0, L_0x74d1a2580; 1 drivers
|
|
v0x74ce26080_0 .net *"_ivl_9", 15 0, L_0x74d1a2620; 1 drivers
|
|
L_0x74c878760 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce26120_0 .net/s "acc_in", 31 0, L_0x74c878760; 1 drivers
|
|
v0x74ce261c0_0 .net/s "acc_out", 31 0, L_0x74d096bc0; alias, 1 drivers
|
|
v0x74ce26260_0 .net/s "product", 15 0, L_0x74ce7c3c0; 1 drivers
|
|
v0x74ce26300_0 .net/s "product_ext", 31 0, L_0x74ce7c460; 1 drivers
|
|
v0x74ce263a0_0 .net/s "w", 7 0, L_0x74d1a2760; 1 drivers
|
|
v0x74ce26440_0 .net/s "x", 7 0, L_0x74d1a26c0; 1 drivers
|
|
L_0x74ce7c280 .extend/s 16, L_0x74d1a26c0;
|
|
L_0x74ce7c320 .extend/s 16, L_0x74d1a2760;
|
|
L_0x74ce7c3c0 .arith/mult 16, L_0x74ce7c280, L_0x74ce7c320;
|
|
L_0x74d1a2580 .part L_0x74ce7c3c0, 15, 1;
|
|
L_0x74d1a2620 .repeat 16, 16, L_0x74d1a2580;
|
|
L_0x74ce7c460 .concat [ 16 16 0 0], L_0x74ce7c3c0, L_0x74d1a2620;
|
|
L_0x74d096bc0 .arith/sum 32, L_0x74c878760, L_0x74ce7c460;
|
|
S_0x74ce23000 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce580 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce23180 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce23000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4780 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c47c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4800 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce264e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7c500; 1 drivers
|
|
v0x74ce26580_0 .net/s *"_ivl_2", 15 0, L_0x74ce7c5a0; 1 drivers
|
|
v0x74ce26620_0 .net *"_ivl_7", 0 0, L_0x74d1a2800; 1 drivers
|
|
v0x74ce266c0_0 .net *"_ivl_9", 15 0, L_0x74d1a28a0; 1 drivers
|
|
L_0x74c8787a8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce26760_0 .net/s "acc_in", 31 0, L_0x74c8787a8; 1 drivers
|
|
v0x74ce26800_0 .net/s "acc_out", 31 0, L_0x74d096c60; alias, 1 drivers
|
|
v0x74ce268a0_0 .net/s "product", 15 0, L_0x74ce7c640; 1 drivers
|
|
v0x74ce26940_0 .net/s "product_ext", 31 0, L_0x74ce7c6e0; 1 drivers
|
|
v0x74ce269e0_0 .net/s "w", 7 0, L_0x74d1a29e0; 1 drivers
|
|
v0x74ce26a80_0 .net/s "x", 7 0, L_0x74d1a2940; 1 drivers
|
|
L_0x74ce7c500 .extend/s 16, L_0x74d1a2940;
|
|
L_0x74ce7c5a0 .extend/s 16, L_0x74d1a29e0;
|
|
L_0x74ce7c640 .arith/mult 16, L_0x74ce7c500, L_0x74ce7c5a0;
|
|
L_0x74d1a2800 .part L_0x74ce7c640, 15, 1;
|
|
L_0x74d1a28a0 .repeat 16, 16, L_0x74d1a2800;
|
|
L_0x74ce7c6e0 .concat [ 16 16 0 0], L_0x74ce7c640, L_0x74d1a28a0;
|
|
L_0x74d096c60 .arith/sum 32, L_0x74c8787a8, L_0x74ce7c6e0;
|
|
S_0x74ce23300 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce5c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce23480 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce23300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4840 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4880 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c48c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce26b20_0 .net/s *"_ivl_0", 15 0, L_0x74ce7c780; 1 drivers
|
|
v0x74ce26bc0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7c820; 1 drivers
|
|
v0x74ce26c60_0 .net *"_ivl_7", 0 0, L_0x74d1a2a80; 1 drivers
|
|
v0x74ce26d00_0 .net *"_ivl_9", 15 0, L_0x74d1a2b20; 1 drivers
|
|
L_0x74c8787f0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce26da0_0 .net/s "acc_in", 31 0, L_0x74c8787f0; 1 drivers
|
|
v0x74ce26e40_0 .net/s "acc_out", 31 0, L_0x74d096d00; alias, 1 drivers
|
|
v0x74ce26ee0_0 .net/s "product", 15 0, L_0x74ce7c8c0; 1 drivers
|
|
v0x74ce26f80_0 .net/s "product_ext", 31 0, L_0x74ce7c960; 1 drivers
|
|
v0x74ce27020_0 .net/s "w", 7 0, L_0x74d1a2c60; 1 drivers
|
|
v0x74ce270c0_0 .net/s "x", 7 0, L_0x74d1a2bc0; 1 drivers
|
|
L_0x74ce7c780 .extend/s 16, L_0x74d1a2bc0;
|
|
L_0x74ce7c820 .extend/s 16, L_0x74d1a2c60;
|
|
L_0x74ce7c8c0 .arith/mult 16, L_0x74ce7c780, L_0x74ce7c820;
|
|
L_0x74d1a2a80 .part L_0x74ce7c8c0, 15, 1;
|
|
L_0x74d1a2b20 .repeat 16, 16, L_0x74d1a2a80;
|
|
L_0x74ce7c960 .concat [ 16 16 0 0], L_0x74ce7c8c0, L_0x74d1a2b20;
|
|
L_0x74d096d00 .arith/sum 32, L_0x74c8787f0, L_0x74ce7c960;
|
|
S_0x74ce23600 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce600 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce23780 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce23600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4900 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4940 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4980 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce27160_0 .net/s *"_ivl_0", 15 0, L_0x74ce7ca00; 1 drivers
|
|
v0x74ce27200_0 .net/s *"_ivl_2", 15 0, L_0x74ce7caa0; 1 drivers
|
|
v0x74ce272a0_0 .net *"_ivl_7", 0 0, L_0x74d1a2d00; 1 drivers
|
|
v0x74ce27340_0 .net *"_ivl_9", 15 0, L_0x74d1a2da0; 1 drivers
|
|
L_0x74c878838 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce273e0_0 .net/s "acc_in", 31 0, L_0x74c878838; 1 drivers
|
|
v0x74ce27480_0 .net/s "acc_out", 31 0, L_0x74d096da0; alias, 1 drivers
|
|
v0x74ce27520_0 .net/s "product", 15 0, L_0x74ce7cb40; 1 drivers
|
|
v0x74ce275c0_0 .net/s "product_ext", 31 0, L_0x74ce7cbe0; 1 drivers
|
|
v0x74ce27660_0 .net/s "w", 7 0, L_0x74d1a2ee0; 1 drivers
|
|
v0x74ce27700_0 .net/s "x", 7 0, L_0x74d1a2e40; 1 drivers
|
|
L_0x74ce7ca00 .extend/s 16, L_0x74d1a2e40;
|
|
L_0x74ce7caa0 .extend/s 16, L_0x74d1a2ee0;
|
|
L_0x74ce7cb40 .arith/mult 16, L_0x74ce7ca00, L_0x74ce7caa0;
|
|
L_0x74d1a2d00 .part L_0x74ce7cb40, 15, 1;
|
|
L_0x74d1a2da0 .repeat 16, 16, L_0x74d1a2d00;
|
|
L_0x74ce7cbe0 .concat [ 16 16 0 0], L_0x74ce7cb40, L_0x74d1a2da0;
|
|
L_0x74d096da0 .arith/sum 32, L_0x74c878838, L_0x74ce7cbe0;
|
|
S_0x74ce23900 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce500 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc46530 .functor BUFZ 32, L_0x74d096940, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce23a80 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce640 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc465a0 .functor BUFZ 32, L_0x74d0969e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce23c00 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce680 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc46610 .functor BUFZ 32, L_0x74d096a80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce23d80 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce6c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc46680 .functor BUFZ 32, L_0x74d096b20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2c000 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce700 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc466f0 .functor BUFZ 32, L_0x74d096bc0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2c180 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce740 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc46760 .functor BUFZ 32, L_0x74d096c60, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2c300 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce780 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc467d0 .functor BUFZ 32, L_0x74d096d00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2c480 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce7c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc46840 .functor BUFZ 32, L_0x74d096da0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2c600 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce800 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce2c780 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce2c600;
|
|
.timescale 0 0;
|
|
P_0x74cdce840 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d096e40 .arith/sum 32, L_0x74cc46530, L_0x74cc465a0;
|
|
S_0x74ce2c900 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce2c600;
|
|
.timescale 0 0;
|
|
P_0x74cdce880 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d096ee0 .arith/sum 32, L_0x74cc46610, L_0x74cc46680;
|
|
S_0x74ce2ca80 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce2c600;
|
|
.timescale 0 0;
|
|
P_0x74cdce8c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d096f80 .arith/sum 32, L_0x74cc466f0, L_0x74cc46760;
|
|
S_0x74ce2cc00 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce2c600;
|
|
.timescale 0 0;
|
|
P_0x74cdce900 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d097020 .arith/sum 32, L_0x74cc467d0, L_0x74cc46840;
|
|
S_0x74ce2cd80 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdce940 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce2cf00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce2cd80;
|
|
.timescale 0 0;
|
|
P_0x74cdce980 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d0970c0 .arith/sum 32, L_0x74d096e40, L_0x74d096ee0;
|
|
S_0x74ce2d080 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce2cd80;
|
|
.timescale 0 0;
|
|
P_0x74cdce9c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d097160 .arith/sum 32, L_0x74d096f80, L_0x74d097020;
|
|
S_0x74ce2d200 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce21f80;
|
|
.timescale 0 0;
|
|
P_0x74cdcea00 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce2d380 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce2d200;
|
|
.timescale 0 0;
|
|
P_0x74cdcea40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d097200 .arith/sum 32, L_0x74d0970c0, L_0x74d097160;
|
|
S_0x74ce2d500 .scope generate, "GEN_NEURON[1]" "GEN_NEURON[1]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74cdceac0 .param/l "n" 1 12 34, +C4<01>;
|
|
S_0x74ce2d680 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce2d500;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a777a0 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a777e0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a77820 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a77860 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a778a0 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a778e0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce38460_0 .net *"_ivl_0", 31 0, L_0x74ce7cd20; 1 drivers
|
|
v0x74ce38500_0 .net *"_ivl_11", 31 0, L_0x74ce7ce60; 1 drivers
|
|
v0x74ce385a0_0 .net *"_ivl_14", 31 0, L_0x74ce7cf00; 1 drivers
|
|
L_0x74c878958 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce38640_0 .net *"_ivl_17", 29 0, L_0x74c878958; 1 drivers
|
|
L_0x74c8789a0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce386e0_0 .net/2u *"_ivl_18", 31 0, L_0x74c8789a0; 1 drivers
|
|
v0x74ce38780_0 .net *"_ivl_21", 31 0, L_0x74ce7cfa0; 1 drivers
|
|
L_0x74c8789e8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce38820_0 .net/2u *"_ivl_22", 31 0, L_0x74c8789e8; 1 drivers
|
|
v0x74ce388c0_0 .net *"_ivl_25", 31 0, L_0x74ce7d040; 1 drivers
|
|
v0x74ce38960_0 .net *"_ivl_29", 0 0, L_0x74d1e08c0; 1 drivers
|
|
L_0x74c878880 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce38a00_0 .net *"_ivl_3", 29 0, L_0x74c878880; 1 drivers
|
|
v0x74ce38aa0_0 .net *"_ivl_31", 23 0, L_0x74d1e0960; 1 drivers
|
|
L_0x74c8788c8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce38b40_0 .net/2u *"_ivl_4", 31 0, L_0x74c8788c8; 1 drivers
|
|
v0x74ce38be0_0 .net *"_ivl_7", 31 0, L_0x74ce7cdc0; 1 drivers
|
|
L_0x74c878910 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce38c80_0 .net/2u *"_ivl_8", 31 0, L_0x74c878910; 1 drivers
|
|
v0x74ce38d20_0 .var/s "acc", 31 0;
|
|
v0x74ce38dc0_0 .net/s "acc_next", 31 0, L_0x74d097d40; 1 drivers
|
|
v0x74ce38e60_0 .net/s "bias", 7 0, L_0x74d1e0aa0; 1 drivers
|
|
v0x74ce38f00_0 .net/s "bias_ext", 31 0, L_0x74ce7e4e0; 1 drivers
|
|
v0x74ce38fa0_0 .var "busy", 0 0;
|
|
v0x74ce39040_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce390e0_0 .var "done", 0 0;
|
|
v0x74ce39180_0 .net/s "final_acc", 31 0, L_0x74d097de0; 1 drivers
|
|
v0x74ce39220_0 .var "group_index", 1 0;
|
|
v0x74ce392c0_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce39360_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce39400_0 .net/s "w_bus", 255 0, L_0x74d1e0a00; 1 drivers
|
|
v0x74ce394a0_0 .net/s "w_group", 63 0, L_0x74d1a3340; 1 drivers
|
|
v0x74ce39540_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce395e0_0 .net/s "x_group", 63 0, L_0x74d1a32a0; 1 drivers
|
|
v0x74ce39680_0 .var/s "y", 7 0;
|
|
L_0x74ce7cd20 .concat [ 2 30 0 0], v0x74ce39220_0, L_0x74c878880;
|
|
L_0x74ce7cdc0 .arith/mult 32, L_0x74ce7cd20, L_0x74c8788c8;
|
|
L_0x74ce7ce60 .arith/mult 32, L_0x74ce7cdc0, L_0x74c878910;
|
|
L_0x74d1a32a0 .part/v v0x74ce79860_0, L_0x74ce7ce60, 64;
|
|
L_0x74ce7cf00 .concat [ 2 30 0 0], v0x74ce39220_0, L_0x74c878958;
|
|
L_0x74ce7cfa0 .arith/mult 32, L_0x74ce7cf00, L_0x74c8789a0;
|
|
L_0x74ce7d040 .arith/mult 32, L_0x74ce7cfa0, L_0x74c8789e8;
|
|
L_0x74d1a3340 .part/v L_0x74d1e0a00, L_0x74ce7d040, 64;
|
|
L_0x74d1e08c0 .part L_0x74d1e0aa0, 7, 1;
|
|
L_0x74d1e0960 .repeat 24, 24, L_0x74d1e08c0;
|
|
L_0x74ce7e4e0 .concat [ 8 24 0 0], L_0x74d1e0aa0, L_0x74d1e0960;
|
|
L_0x74d097de0 .arith/sum 32, L_0x74d097d40, L_0x74ce7e4e0;
|
|
S_0x74ce2d800 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce2d680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c0900 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c0940 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0980 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c09c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce380a0_0 .net/s "acc_in", 31 0, v0x74ce38d20_0; 1 drivers
|
|
v0x74ce38140_0 .net/s "acc_out", 31 0, L_0x74d097d40; alias, 1 drivers
|
|
v0x74ce381e0 .array "products", 7 0;
|
|
v0x74ce381e0_0 .net/s v0x74ce381e0 0, 31 0, L_0x74d0973e0; 1 drivers
|
|
v0x74ce381e0_1 .net/s v0x74ce381e0 1, 31 0, L_0x74d097480; 1 drivers
|
|
v0x74ce381e0_2 .net/s v0x74ce381e0 2, 31 0, L_0x74d097520; 1 drivers
|
|
v0x74ce381e0_3 .net/s v0x74ce381e0 3, 31 0, L_0x74d0975c0; 1 drivers
|
|
v0x74ce381e0_4 .net/s v0x74ce381e0 4, 31 0, L_0x74d097660; 1 drivers
|
|
v0x74ce381e0_5 .net/s v0x74ce381e0 5, 31 0, L_0x74d097700; 1 drivers
|
|
v0x74ce381e0_6 .net/s v0x74ce381e0 6, 31 0, L_0x74d0977a0; 1 drivers
|
|
v0x74ce381e0_7 .net/s v0x74ce381e0 7, 31 0, L_0x74d097840; 1 drivers
|
|
v0x74ce38280 .array "tree", 31 0;
|
|
v0x74ce38280_0 .net/s v0x74ce38280 0, 31 0, L_0x74cc468b0; 1 drivers
|
|
v0x74ce38280_1 .net/s v0x74ce38280 1, 31 0, L_0x74cc46920; 1 drivers
|
|
v0x74ce38280_2 .net/s v0x74ce38280 2, 31 0, L_0x74cc46990; 1 drivers
|
|
v0x74ce38280_3 .net/s v0x74ce38280 3, 31 0, L_0x74cc46a00; 1 drivers
|
|
v0x74ce38280_4 .net/s v0x74ce38280 4, 31 0, L_0x74cc46a70; 1 drivers
|
|
v0x74ce38280_5 .net/s v0x74ce38280 5, 31 0, L_0x74cc46ae0; 1 drivers
|
|
v0x74ce38280_6 .net/s v0x74ce38280 6, 31 0, L_0x74cc46b50; 1 drivers
|
|
v0x74ce38280_7 .net/s v0x74ce38280 7, 31 0, L_0x74cc46bc0; 1 drivers
|
|
v0x74ce38280_8 .net/s v0x74ce38280 8, 31 0, L_0x74d0978e0; 1 drivers
|
|
v0x74ce38280_9 .net/s v0x74ce38280 9, 31 0, L_0x74d097980; 1 drivers
|
|
v0x74ce38280_10 .net/s v0x74ce38280 10, 31 0, L_0x74d097a20; 1 drivers
|
|
v0x74ce38280_11 .net/s v0x74ce38280 11, 31 0, L_0x74d097ac0; 1 drivers
|
|
o0x74c84d5e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_12 .net/s v0x74ce38280 12, 31 0, o0x74c84d5e0; 0 drivers
|
|
o0x74c84d610 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_13 .net/s v0x74ce38280 13, 31 0, o0x74c84d610; 0 drivers
|
|
o0x74c84d640 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_14 .net/s v0x74ce38280 14, 31 0, o0x74c84d640; 0 drivers
|
|
o0x74c84d670 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_15 .net/s v0x74ce38280 15, 31 0, o0x74c84d670; 0 drivers
|
|
v0x74ce38280_16 .net/s v0x74ce38280 16, 31 0, L_0x74d097b60; 1 drivers
|
|
v0x74ce38280_17 .net/s v0x74ce38280 17, 31 0, L_0x74d097c00; 1 drivers
|
|
o0x74c84d700 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_18 .net/s v0x74ce38280 18, 31 0, o0x74c84d700; 0 drivers
|
|
o0x74c84d730 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_19 .net/s v0x74ce38280 19, 31 0, o0x74c84d730; 0 drivers
|
|
o0x74c84d760 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_20 .net/s v0x74ce38280 20, 31 0, o0x74c84d760; 0 drivers
|
|
o0x74c84d790 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_21 .net/s v0x74ce38280 21, 31 0, o0x74c84d790; 0 drivers
|
|
o0x74c84d7c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_22 .net/s v0x74ce38280 22, 31 0, o0x74c84d7c0; 0 drivers
|
|
o0x74c84d7f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_23 .net/s v0x74ce38280 23, 31 0, o0x74c84d7f0; 0 drivers
|
|
v0x74ce38280_24 .net/s v0x74ce38280 24, 31 0, L_0x74d097ca0; 1 drivers
|
|
o0x74c84d850 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_25 .net/s v0x74ce38280 25, 31 0, o0x74c84d850; 0 drivers
|
|
o0x74c84d880 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_26 .net/s v0x74ce38280 26, 31 0, o0x74c84d880; 0 drivers
|
|
o0x74c84d8b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_27 .net/s v0x74ce38280 27, 31 0, o0x74c84d8b0; 0 drivers
|
|
o0x74c84d8e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_28 .net/s v0x74ce38280 28, 31 0, o0x74c84d8e0; 0 drivers
|
|
o0x74c84d910 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_29 .net/s v0x74ce38280 29, 31 0, o0x74c84d910; 0 drivers
|
|
o0x74c84d940 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_30 .net/s v0x74ce38280 30, 31 0, o0x74c84d940; 0 drivers
|
|
o0x74c84d970 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce38280_31 .net/s v0x74ce38280 31, 31 0, o0x74c84d970; 0 drivers
|
|
v0x74ce38320_0 .net/s "w_bus", 63 0, L_0x74d1a3340; alias, 1 drivers
|
|
v0x74ce383c0_0 .net/s "x_bus", 63 0, L_0x74d1a32a0; alias, 1 drivers
|
|
L_0x74d1a3520 .part L_0x74d1a32a0, 0, 8;
|
|
L_0x74d1a35c0 .part L_0x74d1a3340, 0, 8;
|
|
L_0x74d1a37a0 .part L_0x74d1a32a0, 8, 8;
|
|
L_0x74d1a3840 .part L_0x74d1a3340, 8, 8;
|
|
L_0x74d1a3a20 .part L_0x74d1a32a0, 16, 8;
|
|
L_0x74d1a3ac0 .part L_0x74d1a3340, 16, 8;
|
|
L_0x74d1a3ca0 .part L_0x74d1a32a0, 24, 8;
|
|
L_0x74d1a3d40 .part L_0x74d1a3340, 24, 8;
|
|
L_0x74d1a3f20 .part L_0x74d1a32a0, 32, 8;
|
|
L_0x74d1e0000 .part L_0x74d1a3340, 32, 8;
|
|
L_0x74d1e01e0 .part L_0x74d1a32a0, 40, 8;
|
|
L_0x74d1e0280 .part L_0x74d1a3340, 40, 8;
|
|
L_0x74d1e0460 .part L_0x74d1a32a0, 48, 8;
|
|
L_0x74d1e0500 .part L_0x74d1a3340, 48, 8;
|
|
L_0x74d1e06e0 .part L_0x74d1a32a0, 56, 8;
|
|
L_0x74d1e0780 .part L_0x74d1a3340, 56, 8;
|
|
L_0x74d097d40 .arith/sum 32, v0x74ce38d20_0, L_0x74d097ca0;
|
|
S_0x74ce2d980 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdceb00 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce2db00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2d980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c49c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4a00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4a40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce30e60_0 .net/s *"_ivl_0", 15 0, L_0x74ce7d0e0; 1 drivers
|
|
v0x74ce30f00_0 .net/s *"_ivl_2", 15 0, L_0x74ce7d180; 1 drivers
|
|
v0x74ce30fa0_0 .net *"_ivl_7", 0 0, L_0x74d1a33e0; 1 drivers
|
|
v0x74ce31040_0 .net *"_ivl_9", 15 0, L_0x74d1a3480; 1 drivers
|
|
L_0x74c878a30 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce310e0_0 .net/s "acc_in", 31 0, L_0x74c878a30; 1 drivers
|
|
v0x74ce31180_0 .net/s "acc_out", 31 0, L_0x74d0973e0; alias, 1 drivers
|
|
v0x74ce31220_0 .net/s "product", 15 0, L_0x74ce7d220; 1 drivers
|
|
v0x74ce312c0_0 .net/s "product_ext", 31 0, L_0x74ce7d2c0; 1 drivers
|
|
v0x74ce31360_0 .net/s "w", 7 0, L_0x74d1a35c0; 1 drivers
|
|
v0x74ce31400_0 .net/s "x", 7 0, L_0x74d1a3520; 1 drivers
|
|
L_0x74ce7d0e0 .extend/s 16, L_0x74d1a3520;
|
|
L_0x74ce7d180 .extend/s 16, L_0x74d1a35c0;
|
|
L_0x74ce7d220 .arith/mult 16, L_0x74ce7d0e0, L_0x74ce7d180;
|
|
L_0x74d1a33e0 .part L_0x74ce7d220, 15, 1;
|
|
L_0x74d1a3480 .repeat 16, 16, L_0x74d1a33e0;
|
|
L_0x74ce7d2c0 .concat [ 16 16 0 0], L_0x74ce7d220, L_0x74d1a3480;
|
|
L_0x74d0973e0 .arith/sum 32, L_0x74c878a30, L_0x74ce7d2c0;
|
|
S_0x74ce2dc80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdceb40 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce2de00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2dc80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4a80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4ac0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4b00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce314a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7d360; 1 drivers
|
|
v0x74ce31540_0 .net/s *"_ivl_2", 15 0, L_0x74ce7d400; 1 drivers
|
|
v0x74ce315e0_0 .net *"_ivl_7", 0 0, L_0x74d1a3660; 1 drivers
|
|
v0x74ce31680_0 .net *"_ivl_9", 15 0, L_0x74d1a3700; 1 drivers
|
|
L_0x74c878a78 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce31720_0 .net/s "acc_in", 31 0, L_0x74c878a78; 1 drivers
|
|
v0x74ce317c0_0 .net/s "acc_out", 31 0, L_0x74d097480; alias, 1 drivers
|
|
v0x74ce31860_0 .net/s "product", 15 0, L_0x74ce7d4a0; 1 drivers
|
|
v0x74ce31900_0 .net/s "product_ext", 31 0, L_0x74ce7d540; 1 drivers
|
|
v0x74ce319a0_0 .net/s "w", 7 0, L_0x74d1a3840; 1 drivers
|
|
v0x74ce31a40_0 .net/s "x", 7 0, L_0x74d1a37a0; 1 drivers
|
|
L_0x74ce7d360 .extend/s 16, L_0x74d1a37a0;
|
|
L_0x74ce7d400 .extend/s 16, L_0x74d1a3840;
|
|
L_0x74ce7d4a0 .arith/mult 16, L_0x74ce7d360, L_0x74ce7d400;
|
|
L_0x74d1a3660 .part L_0x74ce7d4a0, 15, 1;
|
|
L_0x74d1a3700 .repeat 16, 16, L_0x74d1a3660;
|
|
L_0x74ce7d540 .concat [ 16 16 0 0], L_0x74ce7d4a0, L_0x74d1a3700;
|
|
L_0x74d097480 .arith/sum 32, L_0x74c878a78, L_0x74ce7d540;
|
|
S_0x74ce2df80 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdceb80 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce2e100 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2df80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4b40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4b80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4bc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce31ae0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7d5e0; 1 drivers
|
|
v0x74ce31b80_0 .net/s *"_ivl_2", 15 0, L_0x74ce7d680; 1 drivers
|
|
v0x74ce31c20_0 .net *"_ivl_7", 0 0, L_0x74d1a38e0; 1 drivers
|
|
v0x74ce31cc0_0 .net *"_ivl_9", 15 0, L_0x74d1a3980; 1 drivers
|
|
L_0x74c878ac0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce31d60_0 .net/s "acc_in", 31 0, L_0x74c878ac0; 1 drivers
|
|
v0x74ce31e00_0 .net/s "acc_out", 31 0, L_0x74d097520; alias, 1 drivers
|
|
v0x74ce31ea0_0 .net/s "product", 15 0, L_0x74ce7d720; 1 drivers
|
|
v0x74ce31f40_0 .net/s "product_ext", 31 0, L_0x74ce7d7c0; 1 drivers
|
|
v0x74ce31fe0_0 .net/s "w", 7 0, L_0x74d1a3ac0; 1 drivers
|
|
v0x74ce32080_0 .net/s "x", 7 0, L_0x74d1a3a20; 1 drivers
|
|
L_0x74ce7d5e0 .extend/s 16, L_0x74d1a3a20;
|
|
L_0x74ce7d680 .extend/s 16, L_0x74d1a3ac0;
|
|
L_0x74ce7d720 .arith/mult 16, L_0x74ce7d5e0, L_0x74ce7d680;
|
|
L_0x74d1a38e0 .part L_0x74ce7d720, 15, 1;
|
|
L_0x74d1a3980 .repeat 16, 16, L_0x74d1a38e0;
|
|
L_0x74ce7d7c0 .concat [ 16 16 0 0], L_0x74ce7d720, L_0x74d1a3980;
|
|
L_0x74d097520 .arith/sum 32, L_0x74c878ac0, L_0x74ce7d7c0;
|
|
S_0x74ce2e280 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcebc0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce2e400 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2e280;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4c00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4c40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4c80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce32120_0 .net/s *"_ivl_0", 15 0, L_0x74ce7d860; 1 drivers
|
|
v0x74ce321c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7d900; 1 drivers
|
|
v0x74ce32260_0 .net *"_ivl_7", 0 0, L_0x74d1a3b60; 1 drivers
|
|
v0x74ce32300_0 .net *"_ivl_9", 15 0, L_0x74d1a3c00; 1 drivers
|
|
L_0x74c878b08 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce323a0_0 .net/s "acc_in", 31 0, L_0x74c878b08; 1 drivers
|
|
v0x74ce32440_0 .net/s "acc_out", 31 0, L_0x74d0975c0; alias, 1 drivers
|
|
v0x74ce324e0_0 .net/s "product", 15 0, L_0x74ce7d9a0; 1 drivers
|
|
v0x74ce32580_0 .net/s "product_ext", 31 0, L_0x74ce7da40; 1 drivers
|
|
v0x74ce32620_0 .net/s "w", 7 0, L_0x74d1a3d40; 1 drivers
|
|
v0x74ce326c0_0 .net/s "x", 7 0, L_0x74d1a3ca0; 1 drivers
|
|
L_0x74ce7d860 .extend/s 16, L_0x74d1a3ca0;
|
|
L_0x74ce7d900 .extend/s 16, L_0x74d1a3d40;
|
|
L_0x74ce7d9a0 .arith/mult 16, L_0x74ce7d860, L_0x74ce7d900;
|
|
L_0x74d1a3b60 .part L_0x74ce7d9a0, 15, 1;
|
|
L_0x74d1a3c00 .repeat 16, 16, L_0x74d1a3b60;
|
|
L_0x74ce7da40 .concat [ 16 16 0 0], L_0x74ce7d9a0, L_0x74d1a3c00;
|
|
L_0x74d0975c0 .arith/sum 32, L_0x74c878b08, L_0x74ce7da40;
|
|
S_0x74ce2e580 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcec40 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce2e700 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2e580;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4cc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4d00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4d40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce32760_0 .net/s *"_ivl_0", 15 0, L_0x74ce7dae0; 1 drivers
|
|
v0x74ce32800_0 .net/s *"_ivl_2", 15 0, L_0x74ce7db80; 1 drivers
|
|
v0x74ce328a0_0 .net *"_ivl_7", 0 0, L_0x74d1a3de0; 1 drivers
|
|
v0x74ce32940_0 .net *"_ivl_9", 15 0, L_0x74d1a3e80; 1 drivers
|
|
L_0x74c878b50 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce329e0_0 .net/s "acc_in", 31 0, L_0x74c878b50; 1 drivers
|
|
v0x74ce32a80_0 .net/s "acc_out", 31 0, L_0x74d097660; alias, 1 drivers
|
|
v0x74ce32b20_0 .net/s "product", 15 0, L_0x74ce7dc20; 1 drivers
|
|
v0x74ce32bc0_0 .net/s "product_ext", 31 0, L_0x74ce7dcc0; 1 drivers
|
|
v0x74ce32c60_0 .net/s "w", 7 0, L_0x74d1e0000; 1 drivers
|
|
v0x74ce32d00_0 .net/s "x", 7 0, L_0x74d1a3f20; 1 drivers
|
|
L_0x74ce7dae0 .extend/s 16, L_0x74d1a3f20;
|
|
L_0x74ce7db80 .extend/s 16, L_0x74d1e0000;
|
|
L_0x74ce7dc20 .arith/mult 16, L_0x74ce7dae0, L_0x74ce7db80;
|
|
L_0x74d1a3de0 .part L_0x74ce7dc20, 15, 1;
|
|
L_0x74d1a3e80 .repeat 16, 16, L_0x74d1a3de0;
|
|
L_0x74ce7dcc0 .concat [ 16 16 0 0], L_0x74ce7dc20, L_0x74d1a3e80;
|
|
L_0x74d097660 .arith/sum 32, L_0x74c878b50, L_0x74ce7dcc0;
|
|
S_0x74ce2e880 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcec80 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce2ea00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2e880;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4d80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4dc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4e00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce32da0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7dd60; 1 drivers
|
|
v0x74ce32e40_0 .net/s *"_ivl_2", 15 0, L_0x74ce7de00; 1 drivers
|
|
v0x74ce32ee0_0 .net *"_ivl_7", 0 0, L_0x74d1e00a0; 1 drivers
|
|
v0x74ce32f80_0 .net *"_ivl_9", 15 0, L_0x74d1e0140; 1 drivers
|
|
L_0x74c878b98 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce33020_0 .net/s "acc_in", 31 0, L_0x74c878b98; 1 drivers
|
|
v0x74ce330c0_0 .net/s "acc_out", 31 0, L_0x74d097700; alias, 1 drivers
|
|
v0x74ce33160_0 .net/s "product", 15 0, L_0x74ce7dea0; 1 drivers
|
|
v0x74ce33200_0 .net/s "product_ext", 31 0, L_0x74ce7df40; 1 drivers
|
|
v0x74ce332a0_0 .net/s "w", 7 0, L_0x74d1e0280; 1 drivers
|
|
v0x74ce33340_0 .net/s "x", 7 0, L_0x74d1e01e0; 1 drivers
|
|
L_0x74ce7dd60 .extend/s 16, L_0x74d1e01e0;
|
|
L_0x74ce7de00 .extend/s 16, L_0x74d1e0280;
|
|
L_0x74ce7dea0 .arith/mult 16, L_0x74ce7dd60, L_0x74ce7de00;
|
|
L_0x74d1e00a0 .part L_0x74ce7dea0, 15, 1;
|
|
L_0x74d1e0140 .repeat 16, 16, L_0x74d1e00a0;
|
|
L_0x74ce7df40 .concat [ 16 16 0 0], L_0x74ce7dea0, L_0x74d1e0140;
|
|
L_0x74d097700 .arith/sum 32, L_0x74c878b98, L_0x74ce7df40;
|
|
S_0x74ce2eb80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcecc0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce2ed00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2eb80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4e40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4e80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4ec0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce333e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7dfe0; 1 drivers
|
|
v0x74ce33480_0 .net/s *"_ivl_2", 15 0, L_0x74ce7e080; 1 drivers
|
|
v0x74ce33520_0 .net *"_ivl_7", 0 0, L_0x74d1e0320; 1 drivers
|
|
v0x74ce335c0_0 .net *"_ivl_9", 15 0, L_0x74d1e03c0; 1 drivers
|
|
L_0x74c878be0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce33660_0 .net/s "acc_in", 31 0, L_0x74c878be0; 1 drivers
|
|
v0x74ce33700_0 .net/s "acc_out", 31 0, L_0x74d0977a0; alias, 1 drivers
|
|
v0x74ce337a0_0 .net/s "product", 15 0, L_0x74ce7e120; 1 drivers
|
|
v0x74ce33840_0 .net/s "product_ext", 31 0, L_0x74ce7e1c0; 1 drivers
|
|
v0x74ce338e0_0 .net/s "w", 7 0, L_0x74d1e0500; 1 drivers
|
|
v0x74ce33980_0 .net/s "x", 7 0, L_0x74d1e0460; 1 drivers
|
|
L_0x74ce7dfe0 .extend/s 16, L_0x74d1e0460;
|
|
L_0x74ce7e080 .extend/s 16, L_0x74d1e0500;
|
|
L_0x74ce7e120 .arith/mult 16, L_0x74ce7dfe0, L_0x74ce7e080;
|
|
L_0x74d1e0320 .part L_0x74ce7e120, 15, 1;
|
|
L_0x74d1e03c0 .repeat 16, 16, L_0x74d1e0320;
|
|
L_0x74ce7e1c0 .concat [ 16 16 0 0], L_0x74ce7e120, L_0x74d1e03c0;
|
|
L_0x74d0977a0 .arith/sum 32, L_0x74c878be0, L_0x74ce7e1c0;
|
|
S_0x74ce2ee80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdced00 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce2f000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce2ee80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4f00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c4f40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c4f80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce33a20_0 .net/s *"_ivl_0", 15 0, L_0x74ce7e260; 1 drivers
|
|
v0x74ce33ac0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7e300; 1 drivers
|
|
v0x74ce33b60_0 .net *"_ivl_7", 0 0, L_0x74d1e05a0; 1 drivers
|
|
v0x74ce33c00_0 .net *"_ivl_9", 15 0, L_0x74d1e0640; 1 drivers
|
|
L_0x74c878c28 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce33ca0_0 .net/s "acc_in", 31 0, L_0x74c878c28; 1 drivers
|
|
v0x74ce33d40_0 .net/s "acc_out", 31 0, L_0x74d097840; alias, 1 drivers
|
|
v0x74ce33de0_0 .net/s "product", 15 0, L_0x74ce7e3a0; 1 drivers
|
|
v0x74ce33e80_0 .net/s "product_ext", 31 0, L_0x74ce7e440; 1 drivers
|
|
v0x74ce33f20_0 .net/s "w", 7 0, L_0x74d1e0780; 1 drivers
|
|
v0x74ce38000_0 .net/s "x", 7 0, L_0x74d1e06e0; 1 drivers
|
|
L_0x74ce7e260 .extend/s 16, L_0x74d1e06e0;
|
|
L_0x74ce7e300 .extend/s 16, L_0x74d1e0780;
|
|
L_0x74ce7e3a0 .arith/mult 16, L_0x74ce7e260, L_0x74ce7e300;
|
|
L_0x74d1e05a0 .part L_0x74ce7e3a0, 15, 1;
|
|
L_0x74d1e0640 .repeat 16, 16, L_0x74d1e05a0;
|
|
L_0x74ce7e440 .concat [ 16 16 0 0], L_0x74ce7e3a0, L_0x74d1e0640;
|
|
L_0x74d097840 .arith/sum 32, L_0x74c878c28, L_0x74ce7e440;
|
|
S_0x74ce2f180 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcec00 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc468b0 .functor BUFZ 32, L_0x74d0973e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2f300 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdced40 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc46920 .functor BUFZ 32, L_0x74d097480, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2f480 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdced80 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc46990 .functor BUFZ 32, L_0x74d097520, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2f600 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcedc0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc46a00 .functor BUFZ 32, L_0x74d0975c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2f780 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcee00 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc46a70 .functor BUFZ 32, L_0x74d097660, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2f900 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcee40 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc46ae0 .functor BUFZ 32, L_0x74d097700, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2fa80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcee80 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc46b50 .functor BUFZ 32, L_0x74d0977a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2fc00 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdceec0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc46bc0 .functor BUFZ 32, L_0x74d097840, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce2fd80 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcef00 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce3c000 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce2fd80;
|
|
.timescale 0 0;
|
|
P_0x74cdcef40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d0978e0 .arith/sum 32, L_0x74cc468b0, L_0x74cc46920;
|
|
S_0x74ce3c180 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce2fd80;
|
|
.timescale 0 0;
|
|
P_0x74cdcef80 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d097980 .arith/sum 32, L_0x74cc46990, L_0x74cc46a00;
|
|
S_0x74ce3c300 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce2fd80;
|
|
.timescale 0 0;
|
|
P_0x74cdcefc0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d097a20 .arith/sum 32, L_0x74cc46a70, L_0x74cc46ae0;
|
|
S_0x74ce3c480 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce2fd80;
|
|
.timescale 0 0;
|
|
P_0x74cdcf000 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d097ac0 .arith/sum 32, L_0x74cc46b50, L_0x74cc46bc0;
|
|
S_0x74ce3c600 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcf040 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce3c780 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce3c600;
|
|
.timescale 0 0;
|
|
P_0x74cdcf080 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d097b60 .arith/sum 32, L_0x74d0978e0, L_0x74d097980;
|
|
S_0x74ce3c900 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce3c600;
|
|
.timescale 0 0;
|
|
P_0x74cdcf0c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d097c00 .arith/sum 32, L_0x74d097a20, L_0x74d097ac0;
|
|
S_0x74ce3ca80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce2d800;
|
|
.timescale 0 0;
|
|
P_0x74cdcf100 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce3cc00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce3ca80;
|
|
.timescale 0 0;
|
|
P_0x74cdcf140 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d097ca0 .arith/sum 32, L_0x74d097b60, L_0x74d097c00;
|
|
S_0x74ce3cd80 .scope generate, "GEN_NEURON[2]" "GEN_NEURON[2]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74cdcf1c0 .param/l "n" 1 12 34, +C4<010>;
|
|
S_0x74ce3cf00 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce3cd80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a77920 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77960 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a779a0 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a779e0 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a77a20 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77a60 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce40d20_0 .net *"_ivl_0", 31 0, L_0x74ce7e580; 1 drivers
|
|
v0x74ce40dc0_0 .net *"_ivl_11", 31 0, L_0x74ce7e6c0; 1 drivers
|
|
v0x74ce40e60_0 .net *"_ivl_14", 31 0, L_0x74ce7e760; 1 drivers
|
|
L_0x74c878d48 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce40f00_0 .net *"_ivl_17", 29 0, L_0x74c878d48; 1 drivers
|
|
L_0x74c878d90 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce40fa0_0 .net/2u *"_ivl_18", 31 0, L_0x74c878d90; 1 drivers
|
|
v0x74ce41040_0 .net *"_ivl_21", 31 0, L_0x74ce7e800; 1 drivers
|
|
L_0x74c878dd8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce410e0_0 .net/2u *"_ivl_22", 31 0, L_0x74c878dd8; 1 drivers
|
|
v0x74ce41180_0 .net *"_ivl_25", 31 0, L_0x74ce7e8a0; 1 drivers
|
|
v0x74ce41220_0 .net *"_ivl_29", 0 0, L_0x74d1e2120; 1 drivers
|
|
L_0x74c878c70 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce412c0_0 .net *"_ivl_3", 29 0, L_0x74c878c70; 1 drivers
|
|
v0x74ce41360_0 .net *"_ivl_31", 23 0, L_0x74d1e21c0; 1 drivers
|
|
L_0x74c878cb8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce41400_0 .net/2u *"_ivl_4", 31 0, L_0x74c878cb8; 1 drivers
|
|
v0x74ce414a0_0 .net *"_ivl_7", 31 0, L_0x74ce7e620; 1 drivers
|
|
L_0x74c878d00 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce41540_0 .net/2u *"_ivl_8", 31 0, L_0x74c878d00; 1 drivers
|
|
v0x74ce415e0_0 .var/s "acc", 31 0;
|
|
v0x74ce41680_0 .net/s "acc_next", 31 0, L_0x74d1e4820; 1 drivers
|
|
v0x74ce41720_0 .net/s "bias", 7 0, L_0x74d1e2300; 1 drivers
|
|
v0x74ce417c0_0 .net/s "bias_ext", 31 0, L_0x74ce7fd40; 1 drivers
|
|
v0x74ce41860_0 .var "busy", 0 0;
|
|
v0x74ce41900_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce419a0_0 .var "done", 0 0;
|
|
v0x74ce41a40_0 .net/s "final_acc", 31 0, L_0x74d1e48c0; 1 drivers
|
|
v0x74ce41ae0_0 .var "group_index", 1 0;
|
|
v0x74ce41b80_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce41c20_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce41cc0_0 .net/s "w_bus", 255 0, L_0x74d1e2260; 1 drivers
|
|
v0x74ce41d60_0 .net/s "w_group", 63 0, L_0x74d1e0be0; 1 drivers
|
|
v0x74ce41e00_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce41ea0_0 .net/s "x_group", 63 0, L_0x74d1e0b40; 1 drivers
|
|
v0x74ce41f40_0 .var/s "y", 7 0;
|
|
L_0x74ce7e580 .concat [ 2 30 0 0], v0x74ce41ae0_0, L_0x74c878c70;
|
|
L_0x74ce7e620 .arith/mult 32, L_0x74ce7e580, L_0x74c878cb8;
|
|
L_0x74ce7e6c0 .arith/mult 32, L_0x74ce7e620, L_0x74c878d00;
|
|
L_0x74d1e0b40 .part/v v0x74ce79860_0, L_0x74ce7e6c0, 64;
|
|
L_0x74ce7e760 .concat [ 2 30 0 0], v0x74ce41ae0_0, L_0x74c878d48;
|
|
L_0x74ce7e800 .arith/mult 32, L_0x74ce7e760, L_0x74c878d90;
|
|
L_0x74ce7e8a0 .arith/mult 32, L_0x74ce7e800, L_0x74c878dd8;
|
|
L_0x74d1e0be0 .part/v L_0x74d1e2260, L_0x74ce7e8a0, 64;
|
|
L_0x74d1e2120 .part L_0x74d1e2300, 7, 1;
|
|
L_0x74d1e21c0 .repeat 24, 24, L_0x74d1e2120;
|
|
L_0x74ce7fd40 .concat [ 8 24 0 0], L_0x74d1e2300, L_0x74d1e21c0;
|
|
L_0x74d1e48c0 .arith/sum 32, L_0x74d1e4820, L_0x74ce7fd40;
|
|
S_0x74ce3d080 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce3cf00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c0c00 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c0c40 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0c80 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0cc0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce40960_0 .net/s "acc_in", 31 0, v0x74ce415e0_0; 1 drivers
|
|
v0x74ce40a00_0 .net/s "acc_out", 31 0, L_0x74d1e4820; alias, 1 drivers
|
|
v0x74ce40aa0 .array "products", 7 0;
|
|
v0x74ce40aa0_0 .net/s v0x74ce40aa0 0, 31 0, L_0x74d097e80; 1 drivers
|
|
v0x74ce40aa0_1 .net/s v0x74ce40aa0 1, 31 0, L_0x74d097f20; 1 drivers
|
|
v0x74ce40aa0_2 .net/s v0x74ce40aa0 2, 31 0, L_0x74d1e4000; 1 drivers
|
|
v0x74ce40aa0_3 .net/s v0x74ce40aa0 3, 31 0, L_0x74d1e40a0; 1 drivers
|
|
v0x74ce40aa0_4 .net/s v0x74ce40aa0 4, 31 0, L_0x74d1e4140; 1 drivers
|
|
v0x74ce40aa0_5 .net/s v0x74ce40aa0 5, 31 0, L_0x74d1e41e0; 1 drivers
|
|
v0x74ce40aa0_6 .net/s v0x74ce40aa0 6, 31 0, L_0x74d1e4280; 1 drivers
|
|
v0x74ce40aa0_7 .net/s v0x74ce40aa0 7, 31 0, L_0x74d1e4320; 1 drivers
|
|
v0x74ce40b40 .array "tree", 31 0;
|
|
v0x74ce40b40_0 .net/s v0x74ce40b40 0, 31 0, L_0x74cc46c30; 1 drivers
|
|
v0x74ce40b40_1 .net/s v0x74ce40b40 1, 31 0, L_0x74cc46ca0; 1 drivers
|
|
v0x74ce40b40_2 .net/s v0x74ce40b40 2, 31 0, L_0x74cc46d10; 1 drivers
|
|
v0x74ce40b40_3 .net/s v0x74ce40b40 3, 31 0, L_0x74cc46d80; 1 drivers
|
|
v0x74ce40b40_4 .net/s v0x74ce40b40 4, 31 0, L_0x74cc46df0; 1 drivers
|
|
v0x74ce40b40_5 .net/s v0x74ce40b40 5, 31 0, L_0x74cc46e60; 1 drivers
|
|
v0x74ce40b40_6 .net/s v0x74ce40b40 6, 31 0, L_0x74cc46ed0; 1 drivers
|
|
v0x74ce40b40_7 .net/s v0x74ce40b40 7, 31 0, L_0x74cc46f40; 1 drivers
|
|
v0x74ce40b40_8 .net/s v0x74ce40b40 8, 31 0, L_0x74d1e43c0; 1 drivers
|
|
v0x74ce40b40_9 .net/s v0x74ce40b40 9, 31 0, L_0x74d1e4460; 1 drivers
|
|
v0x74ce40b40_10 .net/s v0x74ce40b40 10, 31 0, L_0x74d1e4500; 1 drivers
|
|
v0x74ce40b40_11 .net/s v0x74ce40b40 11, 31 0, L_0x74d1e45a0; 1 drivers
|
|
o0x74c84f830 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_12 .net/s v0x74ce40b40 12, 31 0, o0x74c84f830; 0 drivers
|
|
o0x74c84f860 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_13 .net/s v0x74ce40b40 13, 31 0, o0x74c84f860; 0 drivers
|
|
o0x74c84f890 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_14 .net/s v0x74ce40b40 14, 31 0, o0x74c84f890; 0 drivers
|
|
o0x74c84f8c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_15 .net/s v0x74ce40b40 15, 31 0, o0x74c84f8c0; 0 drivers
|
|
v0x74ce40b40_16 .net/s v0x74ce40b40 16, 31 0, L_0x74d1e4640; 1 drivers
|
|
v0x74ce40b40_17 .net/s v0x74ce40b40 17, 31 0, L_0x74d1e46e0; 1 drivers
|
|
o0x74c84f950 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_18 .net/s v0x74ce40b40 18, 31 0, o0x74c84f950; 0 drivers
|
|
o0x74c84f980 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_19 .net/s v0x74ce40b40 19, 31 0, o0x74c84f980; 0 drivers
|
|
o0x74c84f9b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_20 .net/s v0x74ce40b40 20, 31 0, o0x74c84f9b0; 0 drivers
|
|
o0x74c84f9e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_21 .net/s v0x74ce40b40 21, 31 0, o0x74c84f9e0; 0 drivers
|
|
o0x74c84fa10 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_22 .net/s v0x74ce40b40 22, 31 0, o0x74c84fa10; 0 drivers
|
|
o0x74c84fa40 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_23 .net/s v0x74ce40b40 23, 31 0, o0x74c84fa40; 0 drivers
|
|
v0x74ce40b40_24 .net/s v0x74ce40b40 24, 31 0, L_0x74d1e4780; 1 drivers
|
|
o0x74c84faa0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_25 .net/s v0x74ce40b40 25, 31 0, o0x74c84faa0; 0 drivers
|
|
o0x74c84fad0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_26 .net/s v0x74ce40b40 26, 31 0, o0x74c84fad0; 0 drivers
|
|
o0x74c84fb00 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_27 .net/s v0x74ce40b40 27, 31 0, o0x74c84fb00; 0 drivers
|
|
o0x74c84fb30 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_28 .net/s v0x74ce40b40 28, 31 0, o0x74c84fb30; 0 drivers
|
|
o0x74c84fb60 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_29 .net/s v0x74ce40b40 29, 31 0, o0x74c84fb60; 0 drivers
|
|
o0x74c84fb90 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_30 .net/s v0x74ce40b40 30, 31 0, o0x74c84fb90; 0 drivers
|
|
o0x74c84fbc0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce40b40_31 .net/s v0x74ce40b40 31, 31 0, o0x74c84fbc0; 0 drivers
|
|
v0x74ce40be0_0 .net/s "w_bus", 63 0, L_0x74d1e0be0; alias, 1 drivers
|
|
v0x74ce40c80_0 .net/s "x_bus", 63 0, L_0x74d1e0b40; alias, 1 drivers
|
|
L_0x74d1e0dc0 .part L_0x74d1e0b40, 0, 8;
|
|
L_0x74d1e0e60 .part L_0x74d1e0be0, 0, 8;
|
|
L_0x74d1e1040 .part L_0x74d1e0b40, 8, 8;
|
|
L_0x74d1e10e0 .part L_0x74d1e0be0, 8, 8;
|
|
L_0x74d1e12c0 .part L_0x74d1e0b40, 16, 8;
|
|
L_0x74d1e1360 .part L_0x74d1e0be0, 16, 8;
|
|
L_0x74d1e1540 .part L_0x74d1e0b40, 24, 8;
|
|
L_0x74d1e15e0 .part L_0x74d1e0be0, 24, 8;
|
|
L_0x74d1e17c0 .part L_0x74d1e0b40, 32, 8;
|
|
L_0x74d1e1860 .part L_0x74d1e0be0, 32, 8;
|
|
L_0x74d1e1a40 .part L_0x74d1e0b40, 40, 8;
|
|
L_0x74d1e1ae0 .part L_0x74d1e0be0, 40, 8;
|
|
L_0x74d1e1cc0 .part L_0x74d1e0b40, 48, 8;
|
|
L_0x74d1e1d60 .part L_0x74d1e0be0, 48, 8;
|
|
L_0x74d1e1f40 .part L_0x74d1e0b40, 56, 8;
|
|
L_0x74d1e1fe0 .part L_0x74d1e0be0, 56, 8;
|
|
L_0x74d1e4820 .arith/sum 32, v0x74ce415e0_0, L_0x74d1e4780;
|
|
S_0x74ce3d200 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf200 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce3d380 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3d200;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c4fc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5000 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5040 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce39720_0 .net/s *"_ivl_0", 15 0, L_0x74ce7e940; 1 drivers
|
|
v0x74ce397c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7e9e0; 1 drivers
|
|
v0x74ce39860_0 .net *"_ivl_7", 0 0, L_0x74d1e0c80; 1 drivers
|
|
v0x74ce39900_0 .net *"_ivl_9", 15 0, L_0x74d1e0d20; 1 drivers
|
|
L_0x74c878e20 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce399a0_0 .net/s "acc_in", 31 0, L_0x74c878e20; 1 drivers
|
|
v0x74ce39a40_0 .net/s "acc_out", 31 0, L_0x74d097e80; alias, 1 drivers
|
|
v0x74ce39ae0_0 .net/s "product", 15 0, L_0x74ce7ea80; 1 drivers
|
|
v0x74ce39b80_0 .net/s "product_ext", 31 0, L_0x74ce7eb20; 1 drivers
|
|
v0x74ce39c20_0 .net/s "w", 7 0, L_0x74d1e0e60; 1 drivers
|
|
v0x74ce39cc0_0 .net/s "x", 7 0, L_0x74d1e0dc0; 1 drivers
|
|
L_0x74ce7e940 .extend/s 16, L_0x74d1e0dc0;
|
|
L_0x74ce7e9e0 .extend/s 16, L_0x74d1e0e60;
|
|
L_0x74ce7ea80 .arith/mult 16, L_0x74ce7e940, L_0x74ce7e9e0;
|
|
L_0x74d1e0c80 .part L_0x74ce7ea80, 15, 1;
|
|
L_0x74d1e0d20 .repeat 16, 16, L_0x74d1e0c80;
|
|
L_0x74ce7eb20 .concat [ 16 16 0 0], L_0x74ce7ea80, L_0x74d1e0d20;
|
|
L_0x74d097e80 .arith/sum 32, L_0x74c878e20, L_0x74ce7eb20;
|
|
S_0x74ce3d500 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf240 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce3d680 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3d500;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5080 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c50c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5100 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce39d60_0 .net/s *"_ivl_0", 15 0, L_0x74ce7ebc0; 1 drivers
|
|
v0x74ce39e00_0 .net/s *"_ivl_2", 15 0, L_0x74ce7ec60; 1 drivers
|
|
v0x74ce39ea0_0 .net *"_ivl_7", 0 0, L_0x74d1e0f00; 1 drivers
|
|
v0x74ce39f40_0 .net *"_ivl_9", 15 0, L_0x74d1e0fa0; 1 drivers
|
|
L_0x74c878e68 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce39fe0_0 .net/s "acc_in", 31 0, L_0x74c878e68; 1 drivers
|
|
v0x74ce3a080_0 .net/s "acc_out", 31 0, L_0x74d097f20; alias, 1 drivers
|
|
v0x74ce3a120_0 .net/s "product", 15 0, L_0x74ce7ed00; 1 drivers
|
|
v0x74ce3a1c0_0 .net/s "product_ext", 31 0, L_0x74ce7eda0; 1 drivers
|
|
v0x74ce3a260_0 .net/s "w", 7 0, L_0x74d1e10e0; 1 drivers
|
|
v0x74ce3a300_0 .net/s "x", 7 0, L_0x74d1e1040; 1 drivers
|
|
L_0x74ce7ebc0 .extend/s 16, L_0x74d1e1040;
|
|
L_0x74ce7ec60 .extend/s 16, L_0x74d1e10e0;
|
|
L_0x74ce7ed00 .arith/mult 16, L_0x74ce7ebc0, L_0x74ce7ec60;
|
|
L_0x74d1e0f00 .part L_0x74ce7ed00, 15, 1;
|
|
L_0x74d1e0fa0 .repeat 16, 16, L_0x74d1e0f00;
|
|
L_0x74ce7eda0 .concat [ 16 16 0 0], L_0x74ce7ed00, L_0x74d1e0fa0;
|
|
L_0x74d097f20 .arith/sum 32, L_0x74c878e68, L_0x74ce7eda0;
|
|
S_0x74ce3d800 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf280 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce3d980 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3d800;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5140 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5180 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c51c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce3a3a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7ee40; 1 drivers
|
|
v0x74ce3a440_0 .net/s *"_ivl_2", 15 0, L_0x74ce7eee0; 1 drivers
|
|
v0x74ce3a4e0_0 .net *"_ivl_7", 0 0, L_0x74d1e1180; 1 drivers
|
|
v0x74ce3a580_0 .net *"_ivl_9", 15 0, L_0x74d1e1220; 1 drivers
|
|
L_0x74c878eb0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce3a620_0 .net/s "acc_in", 31 0, L_0x74c878eb0; 1 drivers
|
|
v0x74ce3a6c0_0 .net/s "acc_out", 31 0, L_0x74d1e4000; alias, 1 drivers
|
|
v0x74ce3a760_0 .net/s "product", 15 0, L_0x74ce7ef80; 1 drivers
|
|
v0x74ce3a800_0 .net/s "product_ext", 31 0, L_0x74ce7f020; 1 drivers
|
|
v0x74ce3a8a0_0 .net/s "w", 7 0, L_0x74d1e1360; 1 drivers
|
|
v0x74ce3a940_0 .net/s "x", 7 0, L_0x74d1e12c0; 1 drivers
|
|
L_0x74ce7ee40 .extend/s 16, L_0x74d1e12c0;
|
|
L_0x74ce7eee0 .extend/s 16, L_0x74d1e1360;
|
|
L_0x74ce7ef80 .arith/mult 16, L_0x74ce7ee40, L_0x74ce7eee0;
|
|
L_0x74d1e1180 .part L_0x74ce7ef80, 15, 1;
|
|
L_0x74d1e1220 .repeat 16, 16, L_0x74d1e1180;
|
|
L_0x74ce7f020 .concat [ 16 16 0 0], L_0x74ce7ef80, L_0x74d1e1220;
|
|
L_0x74d1e4000 .arith/sum 32, L_0x74c878eb0, L_0x74ce7f020;
|
|
S_0x74ce3db00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf2c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce3dc80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3db00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5200 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5240 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5280 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce3a9e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7f0c0; 1 drivers
|
|
v0x74ce3aa80_0 .net/s *"_ivl_2", 15 0, L_0x74ce7f160; 1 drivers
|
|
v0x74ce3ab20_0 .net *"_ivl_7", 0 0, L_0x74d1e1400; 1 drivers
|
|
v0x74ce3abc0_0 .net *"_ivl_9", 15 0, L_0x74d1e14a0; 1 drivers
|
|
L_0x74c878ef8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce3ac60_0 .net/s "acc_in", 31 0, L_0x74c878ef8; 1 drivers
|
|
v0x74ce3ad00_0 .net/s "acc_out", 31 0, L_0x74d1e40a0; alias, 1 drivers
|
|
v0x74ce3ada0_0 .net/s "product", 15 0, L_0x74ce7f200; 1 drivers
|
|
v0x74ce3ae40_0 .net/s "product_ext", 31 0, L_0x74ce7f2a0; 1 drivers
|
|
v0x74ce3aee0_0 .net/s "w", 7 0, L_0x74d1e15e0; 1 drivers
|
|
v0x74ce3af80_0 .net/s "x", 7 0, L_0x74d1e1540; 1 drivers
|
|
L_0x74ce7f0c0 .extend/s 16, L_0x74d1e1540;
|
|
L_0x74ce7f160 .extend/s 16, L_0x74d1e15e0;
|
|
L_0x74ce7f200 .arith/mult 16, L_0x74ce7f0c0, L_0x74ce7f160;
|
|
L_0x74d1e1400 .part L_0x74ce7f200, 15, 1;
|
|
L_0x74d1e14a0 .repeat 16, 16, L_0x74d1e1400;
|
|
L_0x74ce7f2a0 .concat [ 16 16 0 0], L_0x74ce7f200, L_0x74d1e14a0;
|
|
L_0x74d1e40a0 .arith/sum 32, L_0x74c878ef8, L_0x74ce7f2a0;
|
|
S_0x74ce3de00 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf340 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce3df80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3de00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c52c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5300 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5340 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce3b020_0 .net/s *"_ivl_0", 15 0, L_0x74ce7f340; 1 drivers
|
|
v0x74ce3b0c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7f3e0; 1 drivers
|
|
v0x74ce3b160_0 .net *"_ivl_7", 0 0, L_0x74d1e1680; 1 drivers
|
|
v0x74ce3b200_0 .net *"_ivl_9", 15 0, L_0x74d1e1720; 1 drivers
|
|
L_0x74c878f40 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce3b2a0_0 .net/s "acc_in", 31 0, L_0x74c878f40; 1 drivers
|
|
v0x74ce3b340_0 .net/s "acc_out", 31 0, L_0x74d1e4140; alias, 1 drivers
|
|
v0x74ce3b3e0_0 .net/s "product", 15 0, L_0x74ce7f480; 1 drivers
|
|
v0x74ce3b480_0 .net/s "product_ext", 31 0, L_0x74ce7f520; 1 drivers
|
|
v0x74ce3b520_0 .net/s "w", 7 0, L_0x74d1e1860; 1 drivers
|
|
v0x74ce3b5c0_0 .net/s "x", 7 0, L_0x74d1e17c0; 1 drivers
|
|
L_0x74ce7f340 .extend/s 16, L_0x74d1e17c0;
|
|
L_0x74ce7f3e0 .extend/s 16, L_0x74d1e1860;
|
|
L_0x74ce7f480 .arith/mult 16, L_0x74ce7f340, L_0x74ce7f3e0;
|
|
L_0x74d1e1680 .part L_0x74ce7f480, 15, 1;
|
|
L_0x74d1e1720 .repeat 16, 16, L_0x74d1e1680;
|
|
L_0x74ce7f520 .concat [ 16 16 0 0], L_0x74ce7f480, L_0x74d1e1720;
|
|
L_0x74d1e4140 .arith/sum 32, L_0x74c878f40, L_0x74ce7f520;
|
|
S_0x74ce3e100 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf380 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce3e280 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3e100;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5380 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c53c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5400 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce3b660_0 .net/s *"_ivl_0", 15 0, L_0x74ce7f5c0; 1 drivers
|
|
v0x74ce3b700_0 .net/s *"_ivl_2", 15 0, L_0x74ce7f660; 1 drivers
|
|
v0x74ce3b7a0_0 .net *"_ivl_7", 0 0, L_0x74d1e1900; 1 drivers
|
|
v0x74ce3b840_0 .net *"_ivl_9", 15 0, L_0x74d1e19a0; 1 drivers
|
|
L_0x74c878f88 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce3b8e0_0 .net/s "acc_in", 31 0, L_0x74c878f88; 1 drivers
|
|
v0x74ce3b980_0 .net/s "acc_out", 31 0, L_0x74d1e41e0; alias, 1 drivers
|
|
v0x74ce3ba20_0 .net/s "product", 15 0, L_0x74ce7f700; 1 drivers
|
|
v0x74ce3bac0_0 .net/s "product_ext", 31 0, L_0x74ce7f7a0; 1 drivers
|
|
v0x74ce3bb60_0 .net/s "w", 7 0, L_0x74d1e1ae0; 1 drivers
|
|
v0x74ce3bc00_0 .net/s "x", 7 0, L_0x74d1e1a40; 1 drivers
|
|
L_0x74ce7f5c0 .extend/s 16, L_0x74d1e1a40;
|
|
L_0x74ce7f660 .extend/s 16, L_0x74d1e1ae0;
|
|
L_0x74ce7f700 .arith/mult 16, L_0x74ce7f5c0, L_0x74ce7f660;
|
|
L_0x74d1e1900 .part L_0x74ce7f700, 15, 1;
|
|
L_0x74d1e19a0 .repeat 16, 16, L_0x74d1e1900;
|
|
L_0x74ce7f7a0 .concat [ 16 16 0 0], L_0x74ce7f700, L_0x74d1e19a0;
|
|
L_0x74d1e41e0 .arith/sum 32, L_0x74c878f88, L_0x74ce7f7a0;
|
|
S_0x74ce3e400 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf3c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce3e580 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3e400;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5440 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5480 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c54c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce3bca0_0 .net/s *"_ivl_0", 15 0, L_0x74ce7f840; 1 drivers
|
|
v0x74ce3bd40_0 .net/s *"_ivl_2", 15 0, L_0x74ce7f8e0; 1 drivers
|
|
v0x74ce3bde0_0 .net *"_ivl_7", 0 0, L_0x74d1e1b80; 1 drivers
|
|
v0x74ce3be80_0 .net *"_ivl_9", 15 0, L_0x74d1e1c20; 1 drivers
|
|
L_0x74c878fd0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce3bf20_0 .net/s "acc_in", 31 0, L_0x74c878fd0; 1 drivers
|
|
v0x74ce40000_0 .net/s "acc_out", 31 0, L_0x74d1e4280; alias, 1 drivers
|
|
v0x74ce400a0_0 .net/s "product", 15 0, L_0x74ce7f980; 1 drivers
|
|
v0x74ce40140_0 .net/s "product_ext", 31 0, L_0x74ce7fa20; 1 drivers
|
|
v0x74ce401e0_0 .net/s "w", 7 0, L_0x74d1e1d60; 1 drivers
|
|
v0x74ce40280_0 .net/s "x", 7 0, L_0x74d1e1cc0; 1 drivers
|
|
L_0x74ce7f840 .extend/s 16, L_0x74d1e1cc0;
|
|
L_0x74ce7f8e0 .extend/s 16, L_0x74d1e1d60;
|
|
L_0x74ce7f980 .arith/mult 16, L_0x74ce7f840, L_0x74ce7f8e0;
|
|
L_0x74d1e1b80 .part L_0x74ce7f980, 15, 1;
|
|
L_0x74d1e1c20 .repeat 16, 16, L_0x74d1e1b80;
|
|
L_0x74ce7fa20 .concat [ 16 16 0 0], L_0x74ce7f980, L_0x74d1e1c20;
|
|
L_0x74d1e4280 .arith/sum 32, L_0x74c878fd0, L_0x74ce7fa20;
|
|
S_0x74ce3e700 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf400 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce3e880 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce3e700;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5500 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5540 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5580 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce40320_0 .net/s *"_ivl_0", 15 0, L_0x74ce7fac0; 1 drivers
|
|
v0x74ce403c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce7fb60; 1 drivers
|
|
v0x74ce40460_0 .net *"_ivl_7", 0 0, L_0x74d1e1e00; 1 drivers
|
|
v0x74ce40500_0 .net *"_ivl_9", 15 0, L_0x74d1e1ea0; 1 drivers
|
|
L_0x74c879018 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce405a0_0 .net/s "acc_in", 31 0, L_0x74c879018; 1 drivers
|
|
v0x74ce40640_0 .net/s "acc_out", 31 0, L_0x74d1e4320; alias, 1 drivers
|
|
v0x74ce406e0_0 .net/s "product", 15 0, L_0x74ce7fc00; 1 drivers
|
|
v0x74ce40780_0 .net/s "product_ext", 31 0, L_0x74ce7fca0; 1 drivers
|
|
v0x74ce40820_0 .net/s "w", 7 0, L_0x74d1e1fe0; 1 drivers
|
|
v0x74ce408c0_0 .net/s "x", 7 0, L_0x74d1e1f40; 1 drivers
|
|
L_0x74ce7fac0 .extend/s 16, L_0x74d1e1f40;
|
|
L_0x74ce7fb60 .extend/s 16, L_0x74d1e1fe0;
|
|
L_0x74ce7fc00 .arith/mult 16, L_0x74ce7fac0, L_0x74ce7fb60;
|
|
L_0x74d1e1e00 .part L_0x74ce7fc00, 15, 1;
|
|
L_0x74d1e1ea0 .repeat 16, 16, L_0x74d1e1e00;
|
|
L_0x74ce7fca0 .concat [ 16 16 0 0], L_0x74ce7fc00, L_0x74d1e1ea0;
|
|
L_0x74d1e4320 .arith/sum 32, L_0x74c879018, L_0x74ce7fca0;
|
|
S_0x74ce3ea00 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf300 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc46c30 .functor BUFZ 32, L_0x74d097e80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3eb80 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf440 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc46ca0 .functor BUFZ 32, L_0x74d097f20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3ed00 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf480 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc46d10 .functor BUFZ 32, L_0x74d1e4000, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3ee80 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf4c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc46d80 .functor BUFZ 32, L_0x74d1e40a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3f000 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf500 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc46df0 .functor BUFZ 32, L_0x74d1e4140, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3f180 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf540 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc46e60 .functor BUFZ 32, L_0x74d1e41e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3f300 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf580 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc46ed0 .functor BUFZ 32, L_0x74d1e4280, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3f480 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf5c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc46f40 .functor BUFZ 32, L_0x74d1e4320, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce3f600 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf600 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce3f780 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce3f600;
|
|
.timescale 0 0;
|
|
P_0x74cdcf640 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e43c0 .arith/sum 32, L_0x74cc46c30, L_0x74cc46ca0;
|
|
S_0x74ce3f900 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce3f600;
|
|
.timescale 0 0;
|
|
P_0x74cdcf680 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e4460 .arith/sum 32, L_0x74cc46d10, L_0x74cc46d80;
|
|
S_0x74ce3fa80 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce3f600;
|
|
.timescale 0 0;
|
|
P_0x74cdcf6c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d1e4500 .arith/sum 32, L_0x74cc46df0, L_0x74cc46e60;
|
|
S_0x74ce3fc00 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce3f600;
|
|
.timescale 0 0;
|
|
P_0x74cdcf700 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d1e45a0 .arith/sum 32, L_0x74cc46ed0, L_0x74cc46f40;
|
|
S_0x74ce3fd80 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf740 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce44000 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce3fd80;
|
|
.timescale 0 0;
|
|
P_0x74cdcf780 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e4640 .arith/sum 32, L_0x74d1e43c0, L_0x74d1e4460;
|
|
S_0x74ce44180 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce3fd80;
|
|
.timescale 0 0;
|
|
P_0x74cdcf7c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e46e0 .arith/sum 32, L_0x74d1e4500, L_0x74d1e45a0;
|
|
S_0x74ce44300 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce3d080;
|
|
.timescale 0 0;
|
|
P_0x74cdcf800 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce44480 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce44300;
|
|
.timescale 0 0;
|
|
P_0x74cdcf840 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e4780 .arith/sum 32, L_0x74d1e4640, L_0x74d1e46e0;
|
|
S_0x74ce44600 .scope generate, "GEN_NEURON[3]" "GEN_NEURON[3]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74cdcf8c0 .param/l "n" 1 12 34, +C4<011>;
|
|
S_0x74ce44780 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce44600;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a77aa0 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77ae0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a77b20 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a77b60 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a77ba0 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77be0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce495e0_0 .net *"_ivl_0", 31 0, L_0x74ce7fde0; 1 drivers
|
|
v0x74ce49680_0 .net *"_ivl_11", 31 0, L_0x74ce7ff20; 1 drivers
|
|
v0x74ce49720_0 .net *"_ivl_14", 31 0, L_0x74ce80000; 1 drivers
|
|
L_0x74c879138 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce497c0_0 .net *"_ivl_17", 29 0, L_0x74c879138; 1 drivers
|
|
L_0x74c879180 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce49860_0 .net/2u *"_ivl_18", 31 0, L_0x74c879180; 1 drivers
|
|
v0x74ce49900_0 .net *"_ivl_21", 31 0, L_0x74ce800a0; 1 drivers
|
|
L_0x74c8791c8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce499a0_0 .net/2u *"_ivl_22", 31 0, L_0x74c8791c8; 1 drivers
|
|
v0x74ce49a40_0 .net *"_ivl_25", 31 0, L_0x74ce80140; 1 drivers
|
|
v0x74ce49ae0_0 .net *"_ivl_29", 0 0, L_0x74d1e3980; 1 drivers
|
|
L_0x74c879060 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce49b80_0 .net *"_ivl_3", 29 0, L_0x74c879060; 1 drivers
|
|
v0x74ce49c20_0 .net *"_ivl_31", 23 0, L_0x74d1e3a20; 1 drivers
|
|
L_0x74c8790a8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce49cc0_0 .net/2u *"_ivl_4", 31 0, L_0x74c8790a8; 1 drivers
|
|
v0x74ce49d60_0 .net *"_ivl_7", 31 0, L_0x74ce7fe80; 1 drivers
|
|
L_0x74c8790f0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce49e00_0 .net/2u *"_ivl_8", 31 0, L_0x74c8790f0; 1 drivers
|
|
v0x74ce49ea0_0 .var/s "acc", 31 0;
|
|
v0x74ce49f40_0 .net/s "acc_next", 31 0, L_0x74d1e52c0; 1 drivers
|
|
v0x74ce49fe0_0 .net/s "bias", 7 0, L_0x74d1e3b60; 1 drivers
|
|
v0x74ce4a080_0 .net/s "bias_ext", 31 0, L_0x74ce815e0; 1 drivers
|
|
v0x74ce4a120_0 .var "busy", 0 0;
|
|
v0x74ce4a1c0_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce4a260_0 .var "done", 0 0;
|
|
v0x74ce4a300_0 .net/s "final_acc", 31 0, L_0x74d1e5360; 1 drivers
|
|
v0x74ce4a3a0_0 .var "group_index", 1 0;
|
|
v0x74ce4a440_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce4a4e0_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce4a580_0 .net/s "w_bus", 255 0, L_0x74d1e3ac0; 1 drivers
|
|
v0x74ce4a620_0 .net/s "w_group", 63 0, L_0x74d1e2440; 1 drivers
|
|
v0x74ce4a6c0_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce4a760_0 .net/s "x_group", 63 0, L_0x74d1e23a0; 1 drivers
|
|
v0x74ce4a800_0 .var/s "y", 7 0;
|
|
L_0x74ce7fde0 .concat [ 2 30 0 0], v0x74ce4a3a0_0, L_0x74c879060;
|
|
L_0x74ce7fe80 .arith/mult 32, L_0x74ce7fde0, L_0x74c8790a8;
|
|
L_0x74ce7ff20 .arith/mult 32, L_0x74ce7fe80, L_0x74c8790f0;
|
|
L_0x74d1e23a0 .part/v v0x74ce79860_0, L_0x74ce7ff20, 64;
|
|
L_0x74ce80000 .concat [ 2 30 0 0], v0x74ce4a3a0_0, L_0x74c879138;
|
|
L_0x74ce800a0 .arith/mult 32, L_0x74ce80000, L_0x74c879180;
|
|
L_0x74ce80140 .arith/mult 32, L_0x74ce800a0, L_0x74c8791c8;
|
|
L_0x74d1e2440 .part/v L_0x74d1e3ac0, L_0x74ce80140, 64;
|
|
L_0x74d1e3980 .part L_0x74d1e3b60, 7, 1;
|
|
L_0x74d1e3a20 .repeat 24, 24, L_0x74d1e3980;
|
|
L_0x74ce815e0 .concat [ 8 24 0 0], L_0x74d1e3b60, L_0x74d1e3a20;
|
|
L_0x74d1e5360 .arith/sum 32, L_0x74d1e52c0, L_0x74ce815e0;
|
|
S_0x74ce44900 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce44780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c0f00 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c0f40 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0f80 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c0fc0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce49220_0 .net/s "acc_in", 31 0, v0x74ce49ea0_0; 1 drivers
|
|
v0x74ce492c0_0 .net/s "acc_out", 31 0, L_0x74d1e52c0; alias, 1 drivers
|
|
v0x74ce49360 .array "products", 7 0;
|
|
v0x74ce49360_0 .net/s v0x74ce49360 0, 31 0, L_0x74d1e4960; 1 drivers
|
|
v0x74ce49360_1 .net/s v0x74ce49360 1, 31 0, L_0x74d1e4a00; 1 drivers
|
|
v0x74ce49360_2 .net/s v0x74ce49360 2, 31 0, L_0x74d1e4aa0; 1 drivers
|
|
v0x74ce49360_3 .net/s v0x74ce49360 3, 31 0, L_0x74d1e4b40; 1 drivers
|
|
v0x74ce49360_4 .net/s v0x74ce49360 4, 31 0, L_0x74d1e4be0; 1 drivers
|
|
v0x74ce49360_5 .net/s v0x74ce49360 5, 31 0, L_0x74d1e4c80; 1 drivers
|
|
v0x74ce49360_6 .net/s v0x74ce49360 6, 31 0, L_0x74d1e4d20; 1 drivers
|
|
v0x74ce49360_7 .net/s v0x74ce49360 7, 31 0, L_0x74d1e4dc0; 1 drivers
|
|
v0x74ce49400 .array "tree", 31 0;
|
|
v0x74ce49400_0 .net/s v0x74ce49400 0, 31 0, L_0x74cc46fb0; 1 drivers
|
|
v0x74ce49400_1 .net/s v0x74ce49400 1, 31 0, L_0x74cc47020; 1 drivers
|
|
v0x74ce49400_2 .net/s v0x74ce49400 2, 31 0, L_0x74cc47090; 1 drivers
|
|
v0x74ce49400_3 .net/s v0x74ce49400 3, 31 0, L_0x74cc47100; 1 drivers
|
|
v0x74ce49400_4 .net/s v0x74ce49400 4, 31 0, L_0x74cc47170; 1 drivers
|
|
v0x74ce49400_5 .net/s v0x74ce49400 5, 31 0, L_0x74cc471e0; 1 drivers
|
|
v0x74ce49400_6 .net/s v0x74ce49400 6, 31 0, L_0x74cc47250; 1 drivers
|
|
v0x74ce49400_7 .net/s v0x74ce49400 7, 31 0, L_0x74cc472c0; 1 drivers
|
|
v0x74ce49400_8 .net/s v0x74ce49400 8, 31 0, L_0x74d1e4e60; 1 drivers
|
|
v0x74ce49400_9 .net/s v0x74ce49400 9, 31 0, L_0x74d1e4f00; 1 drivers
|
|
v0x74ce49400_10 .net/s v0x74ce49400 10, 31 0, L_0x74d1e4fa0; 1 drivers
|
|
v0x74ce49400_11 .net/s v0x74ce49400 11, 31 0, L_0x74d1e5040; 1 drivers
|
|
o0x74c851a80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_12 .net/s v0x74ce49400 12, 31 0, o0x74c851a80; 0 drivers
|
|
o0x74c851ab0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_13 .net/s v0x74ce49400 13, 31 0, o0x74c851ab0; 0 drivers
|
|
o0x74c851ae0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_14 .net/s v0x74ce49400 14, 31 0, o0x74c851ae0; 0 drivers
|
|
o0x74c851b10 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_15 .net/s v0x74ce49400 15, 31 0, o0x74c851b10; 0 drivers
|
|
v0x74ce49400_16 .net/s v0x74ce49400 16, 31 0, L_0x74d1e50e0; 1 drivers
|
|
v0x74ce49400_17 .net/s v0x74ce49400 17, 31 0, L_0x74d1e5180; 1 drivers
|
|
o0x74c851ba0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_18 .net/s v0x74ce49400 18, 31 0, o0x74c851ba0; 0 drivers
|
|
o0x74c851bd0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_19 .net/s v0x74ce49400 19, 31 0, o0x74c851bd0; 0 drivers
|
|
o0x74c851c00 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_20 .net/s v0x74ce49400 20, 31 0, o0x74c851c00; 0 drivers
|
|
o0x74c851c30 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_21 .net/s v0x74ce49400 21, 31 0, o0x74c851c30; 0 drivers
|
|
o0x74c851c60 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_22 .net/s v0x74ce49400 22, 31 0, o0x74c851c60; 0 drivers
|
|
o0x74c851c90 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_23 .net/s v0x74ce49400 23, 31 0, o0x74c851c90; 0 drivers
|
|
v0x74ce49400_24 .net/s v0x74ce49400 24, 31 0, L_0x74d1e5220; 1 drivers
|
|
o0x74c851cf0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_25 .net/s v0x74ce49400 25, 31 0, o0x74c851cf0; 0 drivers
|
|
o0x74c851d20 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_26 .net/s v0x74ce49400 26, 31 0, o0x74c851d20; 0 drivers
|
|
o0x74c851d50 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_27 .net/s v0x74ce49400 27, 31 0, o0x74c851d50; 0 drivers
|
|
o0x74c851d80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_28 .net/s v0x74ce49400 28, 31 0, o0x74c851d80; 0 drivers
|
|
o0x74c851db0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_29 .net/s v0x74ce49400 29, 31 0, o0x74c851db0; 0 drivers
|
|
o0x74c851de0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_30 .net/s v0x74ce49400 30, 31 0, o0x74c851de0; 0 drivers
|
|
o0x74c851e10 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce49400_31 .net/s v0x74ce49400 31, 31 0, o0x74c851e10; 0 drivers
|
|
v0x74ce494a0_0 .net/s "w_bus", 63 0, L_0x74d1e2440; alias, 1 drivers
|
|
v0x74ce49540_0 .net/s "x_bus", 63 0, L_0x74d1e23a0; alias, 1 drivers
|
|
L_0x74d1e2620 .part L_0x74d1e23a0, 0, 8;
|
|
L_0x74d1e26c0 .part L_0x74d1e2440, 0, 8;
|
|
L_0x74d1e28a0 .part L_0x74d1e23a0, 8, 8;
|
|
L_0x74d1e2940 .part L_0x74d1e2440, 8, 8;
|
|
L_0x74d1e2b20 .part L_0x74d1e23a0, 16, 8;
|
|
L_0x74d1e2bc0 .part L_0x74d1e2440, 16, 8;
|
|
L_0x74d1e2da0 .part L_0x74d1e23a0, 24, 8;
|
|
L_0x74d1e2e40 .part L_0x74d1e2440, 24, 8;
|
|
L_0x74d1e3020 .part L_0x74d1e23a0, 32, 8;
|
|
L_0x74d1e30c0 .part L_0x74d1e2440, 32, 8;
|
|
L_0x74d1e32a0 .part L_0x74d1e23a0, 40, 8;
|
|
L_0x74d1e3340 .part L_0x74d1e2440, 40, 8;
|
|
L_0x74d1e3520 .part L_0x74d1e23a0, 48, 8;
|
|
L_0x74d1e35c0 .part L_0x74d1e2440, 48, 8;
|
|
L_0x74d1e37a0 .part L_0x74d1e23a0, 56, 8;
|
|
L_0x74d1e3840 .part L_0x74d1e2440, 56, 8;
|
|
L_0x74d1e52c0 .arith/sum 32, v0x74ce49ea0_0, L_0x74d1e5220;
|
|
S_0x74ce44a80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcf900 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce44c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce44a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c55c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5600 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5640 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce41fe0_0 .net/s *"_ivl_0", 15 0, L_0x74ce801e0; 1 drivers
|
|
v0x74ce42080_0 .net/s *"_ivl_2", 15 0, L_0x74ce80280; 1 drivers
|
|
v0x74ce42120_0 .net *"_ivl_7", 0 0, L_0x74d1e24e0; 1 drivers
|
|
v0x74ce421c0_0 .net *"_ivl_9", 15 0, L_0x74d1e2580; 1 drivers
|
|
L_0x74c879210 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce42260_0 .net/s "acc_in", 31 0, L_0x74c879210; 1 drivers
|
|
v0x74ce42300_0 .net/s "acc_out", 31 0, L_0x74d1e4960; alias, 1 drivers
|
|
v0x74ce423a0_0 .net/s "product", 15 0, L_0x74ce80320; 1 drivers
|
|
v0x74ce42440_0 .net/s "product_ext", 31 0, L_0x74ce803c0; 1 drivers
|
|
v0x74ce424e0_0 .net/s "w", 7 0, L_0x74d1e26c0; 1 drivers
|
|
v0x74ce42580_0 .net/s "x", 7 0, L_0x74d1e2620; 1 drivers
|
|
L_0x74ce801e0 .extend/s 16, L_0x74d1e2620;
|
|
L_0x74ce80280 .extend/s 16, L_0x74d1e26c0;
|
|
L_0x74ce80320 .arith/mult 16, L_0x74ce801e0, L_0x74ce80280;
|
|
L_0x74d1e24e0 .part L_0x74ce80320, 15, 1;
|
|
L_0x74d1e2580 .repeat 16, 16, L_0x74d1e24e0;
|
|
L_0x74ce803c0 .concat [ 16 16 0 0], L_0x74ce80320, L_0x74d1e2580;
|
|
L_0x74d1e4960 .arith/sum 32, L_0x74c879210, L_0x74ce803c0;
|
|
S_0x74ce44d80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcf940 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce44f00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce44d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5680 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c56c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5700 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce42620_0 .net/s *"_ivl_0", 15 0, L_0x74ce80460; 1 drivers
|
|
v0x74ce426c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce80500; 1 drivers
|
|
v0x74ce42760_0 .net *"_ivl_7", 0 0, L_0x74d1e2760; 1 drivers
|
|
v0x74ce42800_0 .net *"_ivl_9", 15 0, L_0x74d1e2800; 1 drivers
|
|
L_0x74c879258 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce428a0_0 .net/s "acc_in", 31 0, L_0x74c879258; 1 drivers
|
|
v0x74ce42940_0 .net/s "acc_out", 31 0, L_0x74d1e4a00; alias, 1 drivers
|
|
v0x74ce429e0_0 .net/s "product", 15 0, L_0x74ce805a0; 1 drivers
|
|
v0x74ce42a80_0 .net/s "product_ext", 31 0, L_0x74ce80640; 1 drivers
|
|
v0x74ce42b20_0 .net/s "w", 7 0, L_0x74d1e2940; 1 drivers
|
|
v0x74ce42bc0_0 .net/s "x", 7 0, L_0x74d1e28a0; 1 drivers
|
|
L_0x74ce80460 .extend/s 16, L_0x74d1e28a0;
|
|
L_0x74ce80500 .extend/s 16, L_0x74d1e2940;
|
|
L_0x74ce805a0 .arith/mult 16, L_0x74ce80460, L_0x74ce80500;
|
|
L_0x74d1e2760 .part L_0x74ce805a0, 15, 1;
|
|
L_0x74d1e2800 .repeat 16, 16, L_0x74d1e2760;
|
|
L_0x74ce80640 .concat [ 16 16 0 0], L_0x74ce805a0, L_0x74d1e2800;
|
|
L_0x74d1e4a00 .arith/sum 32, L_0x74c879258, L_0x74ce80640;
|
|
S_0x74ce45080 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcf980 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce45200 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce45080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5740 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5780 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c57c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce42c60_0 .net/s *"_ivl_0", 15 0, L_0x74ce806e0; 1 drivers
|
|
v0x74ce42d00_0 .net/s *"_ivl_2", 15 0, L_0x74ce80780; 1 drivers
|
|
v0x74ce42da0_0 .net *"_ivl_7", 0 0, L_0x74d1e29e0; 1 drivers
|
|
v0x74ce42e40_0 .net *"_ivl_9", 15 0, L_0x74d1e2a80; 1 drivers
|
|
L_0x74c8792a0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce42ee0_0 .net/s "acc_in", 31 0, L_0x74c8792a0; 1 drivers
|
|
v0x74ce42f80_0 .net/s "acc_out", 31 0, L_0x74d1e4aa0; alias, 1 drivers
|
|
v0x74ce43020_0 .net/s "product", 15 0, L_0x74ce80820; 1 drivers
|
|
v0x74ce430c0_0 .net/s "product_ext", 31 0, L_0x74ce808c0; 1 drivers
|
|
v0x74ce43160_0 .net/s "w", 7 0, L_0x74d1e2bc0; 1 drivers
|
|
v0x74ce43200_0 .net/s "x", 7 0, L_0x74d1e2b20; 1 drivers
|
|
L_0x74ce806e0 .extend/s 16, L_0x74d1e2b20;
|
|
L_0x74ce80780 .extend/s 16, L_0x74d1e2bc0;
|
|
L_0x74ce80820 .arith/mult 16, L_0x74ce806e0, L_0x74ce80780;
|
|
L_0x74d1e29e0 .part L_0x74ce80820, 15, 1;
|
|
L_0x74d1e2a80 .repeat 16, 16, L_0x74d1e29e0;
|
|
L_0x74ce808c0 .concat [ 16 16 0 0], L_0x74ce80820, L_0x74d1e2a80;
|
|
L_0x74d1e4aa0 .arith/sum 32, L_0x74c8792a0, L_0x74ce808c0;
|
|
S_0x74ce45380 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcf9c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce45500 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce45380;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5800 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5840 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5880 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce432a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce80960; 1 drivers
|
|
v0x74ce43340_0 .net/s *"_ivl_2", 15 0, L_0x74ce80a00; 1 drivers
|
|
v0x74ce433e0_0 .net *"_ivl_7", 0 0, L_0x74d1e2c60; 1 drivers
|
|
v0x74ce43480_0 .net *"_ivl_9", 15 0, L_0x74d1e2d00; 1 drivers
|
|
L_0x74c8792e8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce43520_0 .net/s "acc_in", 31 0, L_0x74c8792e8; 1 drivers
|
|
v0x74ce435c0_0 .net/s "acc_out", 31 0, L_0x74d1e4b40; alias, 1 drivers
|
|
v0x74ce43660_0 .net/s "product", 15 0, L_0x74ce80aa0; 1 drivers
|
|
v0x74ce43700_0 .net/s "product_ext", 31 0, L_0x74ce80b40; 1 drivers
|
|
v0x74ce437a0_0 .net/s "w", 7 0, L_0x74d1e2e40; 1 drivers
|
|
v0x74ce43840_0 .net/s "x", 7 0, L_0x74d1e2da0; 1 drivers
|
|
L_0x74ce80960 .extend/s 16, L_0x74d1e2da0;
|
|
L_0x74ce80a00 .extend/s 16, L_0x74d1e2e40;
|
|
L_0x74ce80aa0 .arith/mult 16, L_0x74ce80960, L_0x74ce80a00;
|
|
L_0x74d1e2c60 .part L_0x74ce80aa0, 15, 1;
|
|
L_0x74d1e2d00 .repeat 16, 16, L_0x74d1e2c60;
|
|
L_0x74ce80b40 .concat [ 16 16 0 0], L_0x74ce80aa0, L_0x74d1e2d00;
|
|
L_0x74d1e4b40 .arith/sum 32, L_0x74c8792e8, L_0x74ce80b40;
|
|
S_0x74ce45680 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfa40 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce45800 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce45680;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c58c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5900 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5940 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce438e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce80be0; 1 drivers
|
|
v0x74ce43980_0 .net/s *"_ivl_2", 15 0, L_0x74ce80c80; 1 drivers
|
|
v0x74ce43a20_0 .net *"_ivl_7", 0 0, L_0x74d1e2ee0; 1 drivers
|
|
v0x74ce43ac0_0 .net *"_ivl_9", 15 0, L_0x74d1e2f80; 1 drivers
|
|
L_0x74c879330 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce43b60_0 .net/s "acc_in", 31 0, L_0x74c879330; 1 drivers
|
|
v0x74ce43c00_0 .net/s "acc_out", 31 0, L_0x74d1e4be0; alias, 1 drivers
|
|
v0x74ce43ca0_0 .net/s "product", 15 0, L_0x74ce80d20; 1 drivers
|
|
v0x74ce43d40_0 .net/s "product_ext", 31 0, L_0x74ce80dc0; 1 drivers
|
|
v0x74ce43de0_0 .net/s "w", 7 0, L_0x74d1e30c0; 1 drivers
|
|
v0x74ce43e80_0 .net/s "x", 7 0, L_0x74d1e3020; 1 drivers
|
|
L_0x74ce80be0 .extend/s 16, L_0x74d1e3020;
|
|
L_0x74ce80c80 .extend/s 16, L_0x74d1e30c0;
|
|
L_0x74ce80d20 .arith/mult 16, L_0x74ce80be0, L_0x74ce80c80;
|
|
L_0x74d1e2ee0 .part L_0x74ce80d20, 15, 1;
|
|
L_0x74d1e2f80 .repeat 16, 16, L_0x74d1e2ee0;
|
|
L_0x74ce80dc0 .concat [ 16 16 0 0], L_0x74ce80d20, L_0x74d1e2f80;
|
|
L_0x74d1e4be0 .arith/sum 32, L_0x74c879330, L_0x74ce80dc0;
|
|
S_0x74ce45980 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfa80 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce45b00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce45980;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5980 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c59c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5a00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce43f20_0 .net/s *"_ivl_0", 15 0, L_0x74ce80e60; 1 drivers
|
|
v0x74ce48000_0 .net/s *"_ivl_2", 15 0, L_0x74ce80f00; 1 drivers
|
|
v0x74ce480a0_0 .net *"_ivl_7", 0 0, L_0x74d1e3160; 1 drivers
|
|
v0x74ce48140_0 .net *"_ivl_9", 15 0, L_0x74d1e3200; 1 drivers
|
|
L_0x74c879378 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce481e0_0 .net/s "acc_in", 31 0, L_0x74c879378; 1 drivers
|
|
v0x74ce48280_0 .net/s "acc_out", 31 0, L_0x74d1e4c80; alias, 1 drivers
|
|
v0x74ce48320_0 .net/s "product", 15 0, L_0x74ce80fa0; 1 drivers
|
|
v0x74ce483c0_0 .net/s "product_ext", 31 0, L_0x74ce81040; 1 drivers
|
|
v0x74ce48460_0 .net/s "w", 7 0, L_0x74d1e3340; 1 drivers
|
|
v0x74ce48500_0 .net/s "x", 7 0, L_0x74d1e32a0; 1 drivers
|
|
L_0x74ce80e60 .extend/s 16, L_0x74d1e32a0;
|
|
L_0x74ce80f00 .extend/s 16, L_0x74d1e3340;
|
|
L_0x74ce80fa0 .arith/mult 16, L_0x74ce80e60, L_0x74ce80f00;
|
|
L_0x74d1e3160 .part L_0x74ce80fa0, 15, 1;
|
|
L_0x74d1e3200 .repeat 16, 16, L_0x74d1e3160;
|
|
L_0x74ce81040 .concat [ 16 16 0 0], L_0x74ce80fa0, L_0x74d1e3200;
|
|
L_0x74d1e4c80 .arith/sum 32, L_0x74c879378, L_0x74ce81040;
|
|
S_0x74ce45c80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfac0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce45e00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce45c80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5a40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5a80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5ac0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce485a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce810e0; 1 drivers
|
|
v0x74ce48640_0 .net/s *"_ivl_2", 15 0, L_0x74ce81180; 1 drivers
|
|
v0x74ce486e0_0 .net *"_ivl_7", 0 0, L_0x74d1e33e0; 1 drivers
|
|
v0x74ce48780_0 .net *"_ivl_9", 15 0, L_0x74d1e3480; 1 drivers
|
|
L_0x74c8793c0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce48820_0 .net/s "acc_in", 31 0, L_0x74c8793c0; 1 drivers
|
|
v0x74ce488c0_0 .net/s "acc_out", 31 0, L_0x74d1e4d20; alias, 1 drivers
|
|
v0x74ce48960_0 .net/s "product", 15 0, L_0x74ce81220; 1 drivers
|
|
v0x74ce48a00_0 .net/s "product_ext", 31 0, L_0x74ce812c0; 1 drivers
|
|
v0x74ce48aa0_0 .net/s "w", 7 0, L_0x74d1e35c0; 1 drivers
|
|
v0x74ce48b40_0 .net/s "x", 7 0, L_0x74d1e3520; 1 drivers
|
|
L_0x74ce810e0 .extend/s 16, L_0x74d1e3520;
|
|
L_0x74ce81180 .extend/s 16, L_0x74d1e35c0;
|
|
L_0x74ce81220 .arith/mult 16, L_0x74ce810e0, L_0x74ce81180;
|
|
L_0x74d1e33e0 .part L_0x74ce81220, 15, 1;
|
|
L_0x74d1e3480 .repeat 16, 16, L_0x74d1e33e0;
|
|
L_0x74ce812c0 .concat [ 16 16 0 0], L_0x74ce81220, L_0x74d1e3480;
|
|
L_0x74d1e4d20 .arith/sum 32, L_0x74c8793c0, L_0x74ce812c0;
|
|
S_0x74ce45f80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfb00 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce46100 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce45f80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5b00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5b40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5b80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce48be0_0 .net/s *"_ivl_0", 15 0, L_0x74ce81360; 1 drivers
|
|
v0x74ce48c80_0 .net/s *"_ivl_2", 15 0, L_0x74ce81400; 1 drivers
|
|
v0x74ce48d20_0 .net *"_ivl_7", 0 0, L_0x74d1e3660; 1 drivers
|
|
v0x74ce48dc0_0 .net *"_ivl_9", 15 0, L_0x74d1e3700; 1 drivers
|
|
L_0x74c879408 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce48e60_0 .net/s "acc_in", 31 0, L_0x74c879408; 1 drivers
|
|
v0x74ce48f00_0 .net/s "acc_out", 31 0, L_0x74d1e4dc0; alias, 1 drivers
|
|
v0x74ce48fa0_0 .net/s "product", 15 0, L_0x74ce814a0; 1 drivers
|
|
v0x74ce49040_0 .net/s "product_ext", 31 0, L_0x74ce81540; 1 drivers
|
|
v0x74ce490e0_0 .net/s "w", 7 0, L_0x74d1e3840; 1 drivers
|
|
v0x74ce49180_0 .net/s "x", 7 0, L_0x74d1e37a0; 1 drivers
|
|
L_0x74ce81360 .extend/s 16, L_0x74d1e37a0;
|
|
L_0x74ce81400 .extend/s 16, L_0x74d1e3840;
|
|
L_0x74ce814a0 .arith/mult 16, L_0x74ce81360, L_0x74ce81400;
|
|
L_0x74d1e3660 .part L_0x74ce814a0, 15, 1;
|
|
L_0x74d1e3700 .repeat 16, 16, L_0x74d1e3660;
|
|
L_0x74ce81540 .concat [ 16 16 0 0], L_0x74ce814a0, L_0x74d1e3700;
|
|
L_0x74d1e4dc0 .arith/sum 32, L_0x74c879408, L_0x74ce81540;
|
|
S_0x74ce46280 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfa00 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc46fb0 .functor BUFZ 32, L_0x74d1e4960, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46400 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfb40 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc47020 .functor BUFZ 32, L_0x74d1e4a00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46580 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfb80 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc47090 .functor BUFZ 32, L_0x74d1e4aa0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46700 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfbc0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc47100 .functor BUFZ 32, L_0x74d1e4b40, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46880 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfc00 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc47170 .functor BUFZ 32, L_0x74d1e4be0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46a00 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfc40 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc471e0 .functor BUFZ 32, L_0x74d1e4c80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46b80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfc80 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc47250 .functor BUFZ 32, L_0x74d1e4d20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46d00 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfcc0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc472c0 .functor BUFZ 32, L_0x74d1e4dc0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce46e80 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfd00 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce47000 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce46e80;
|
|
.timescale 0 0;
|
|
P_0x74cdcfd40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e4e60 .arith/sum 32, L_0x74cc46fb0, L_0x74cc47020;
|
|
S_0x74ce47180 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce46e80;
|
|
.timescale 0 0;
|
|
P_0x74cdcfd80 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e4f00 .arith/sum 32, L_0x74cc47090, L_0x74cc47100;
|
|
S_0x74ce47300 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce46e80;
|
|
.timescale 0 0;
|
|
P_0x74cdcfdc0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d1e4fa0 .arith/sum 32, L_0x74cc47170, L_0x74cc471e0;
|
|
S_0x74ce47480 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce46e80;
|
|
.timescale 0 0;
|
|
P_0x74cdcfe00 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d1e5040 .arith/sum 32, L_0x74cc47250, L_0x74cc472c0;
|
|
S_0x74ce47600 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcfe40 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce47780 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce47600;
|
|
.timescale 0 0;
|
|
P_0x74cdcfe80 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e50e0 .arith/sum 32, L_0x74d1e4e60, L_0x74d1e4f00;
|
|
S_0x74ce47900 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce47600;
|
|
.timescale 0 0;
|
|
P_0x74cdcfec0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e5180 .arith/sum 32, L_0x74d1e4fa0, L_0x74d1e5040;
|
|
S_0x74ce47a80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce44900;
|
|
.timescale 0 0;
|
|
P_0x74cdcff00 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce47c00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce47a80;
|
|
.timescale 0 0;
|
|
P_0x74cdcff40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e5220 .arith/sum 32, L_0x74d1e50e0, L_0x74d1e5180;
|
|
S_0x74ce47d80 .scope generate, "GEN_NEURON[4]" "GEN_NEURON[4]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74cc30040 .param/l "n" 1 12 34, +C4<0100>;
|
|
S_0x74ce4c000 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce47d80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a77c20 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77c60 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a77ca0 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a77ce0 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a77d20 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77d60 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce55ea0_0 .net *"_ivl_0", 31 0, L_0x74ce81680; 1 drivers
|
|
v0x74ce55f40_0 .net *"_ivl_11", 31 0, L_0x74ce817c0; 1 drivers
|
|
v0x74ce55fe0_0 .net *"_ivl_14", 31 0, L_0x74ce81860; 1 drivers
|
|
L_0x74c879528 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce56080_0 .net *"_ivl_17", 29 0, L_0x74c879528; 1 drivers
|
|
L_0x74c879570 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce56120_0 .net/2u *"_ivl_18", 31 0, L_0x74c879570; 1 drivers
|
|
v0x74ce561c0_0 .net *"_ivl_21", 31 0, L_0x74ce81900; 1 drivers
|
|
L_0x74c8795b8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce56260_0 .net/2u *"_ivl_22", 31 0, L_0x74c8795b8; 1 drivers
|
|
v0x74ce56300_0 .net *"_ivl_25", 31 0, L_0x74ce819a0; 1 drivers
|
|
v0x74ce563a0_0 .net *"_ivl_29", 0 0, L_0x74d1ed220; 1 drivers
|
|
L_0x74c879450 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce56440_0 .net *"_ivl_3", 29 0, L_0x74c879450; 1 drivers
|
|
v0x74ce564e0_0 .net *"_ivl_31", 23 0, L_0x74d1ed2c0; 1 drivers
|
|
L_0x74c879498 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce56580_0 .net/2u *"_ivl_4", 31 0, L_0x74c879498; 1 drivers
|
|
v0x74ce56620_0 .net *"_ivl_7", 31 0, L_0x74ce81720; 1 drivers
|
|
L_0x74c8794e0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce566c0_0 .net/2u *"_ivl_8", 31 0, L_0x74c8794e0; 1 drivers
|
|
v0x74ce56760_0 .var/s "acc", 31 0;
|
|
v0x74ce56800_0 .net/s "acc_next", 31 0, L_0x74d1e5d60; 1 drivers
|
|
v0x74ce568a0_0 .net/s "bias", 7 0, L_0x74d1ed400; 1 drivers
|
|
v0x74ce56940_0 .net/s "bias_ext", 31 0, L_0x74ce82e40; 1 drivers
|
|
v0x74ce569e0_0 .var "busy", 0 0;
|
|
v0x74ce56a80_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce56b20_0 .var "done", 0 0;
|
|
v0x74ce56bc0_0 .net/s "final_acc", 31 0, L_0x74d1e5e00; 1 drivers
|
|
v0x74ce56c60_0 .var "group_index", 1 0;
|
|
v0x74ce56d00_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce56da0_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce56e40_0 .net/s "w_bus", 255 0, L_0x74d1ed360; 1 drivers
|
|
v0x74ce56ee0_0 .net/s "w_group", 63 0, L_0x74d1e3ca0; 1 drivers
|
|
v0x74ce56f80_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce57020_0 .net/s "x_group", 63 0, L_0x74d1e3c00; 1 drivers
|
|
v0x74ce570c0_0 .var/s "y", 7 0;
|
|
L_0x74ce81680 .concat [ 2 30 0 0], v0x74ce56c60_0, L_0x74c879450;
|
|
L_0x74ce81720 .arith/mult 32, L_0x74ce81680, L_0x74c879498;
|
|
L_0x74ce817c0 .arith/mult 32, L_0x74ce81720, L_0x74c8794e0;
|
|
L_0x74d1e3c00 .part/v v0x74ce79860_0, L_0x74ce817c0, 64;
|
|
L_0x74ce81860 .concat [ 2 30 0 0], v0x74ce56c60_0, L_0x74c879528;
|
|
L_0x74ce81900 .arith/mult 32, L_0x74ce81860, L_0x74c879570;
|
|
L_0x74ce819a0 .arith/mult 32, L_0x74ce81900, L_0x74c8795b8;
|
|
L_0x74d1e3ca0 .part/v L_0x74d1ed360, L_0x74ce819a0, 64;
|
|
L_0x74d1ed220 .part L_0x74d1ed400, 7, 1;
|
|
L_0x74d1ed2c0 .repeat 24, 24, L_0x74d1ed220;
|
|
L_0x74ce82e40 .concat [ 8 24 0 0], L_0x74d1ed400, L_0x74d1ed2c0;
|
|
L_0x74d1e5e00 .arith/sum 32, L_0x74d1e5d60, L_0x74ce82e40;
|
|
S_0x74ce4c180 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce4c000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c1200 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c1240 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c1280 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c12c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce55ae0_0 .net/s "acc_in", 31 0, v0x74ce56760_0; 1 drivers
|
|
v0x74ce55b80_0 .net/s "acc_out", 31 0, L_0x74d1e5d60; alias, 1 drivers
|
|
v0x74ce55c20 .array "products", 7 0;
|
|
v0x74ce55c20_0 .net/s v0x74ce55c20 0, 31 0, L_0x74d1e5400; 1 drivers
|
|
v0x74ce55c20_1 .net/s v0x74ce55c20 1, 31 0, L_0x74d1e54a0; 1 drivers
|
|
v0x74ce55c20_2 .net/s v0x74ce55c20 2, 31 0, L_0x74d1e5540; 1 drivers
|
|
v0x74ce55c20_3 .net/s v0x74ce55c20 3, 31 0, L_0x74d1e55e0; 1 drivers
|
|
v0x74ce55c20_4 .net/s v0x74ce55c20 4, 31 0, L_0x74d1e5680; 1 drivers
|
|
v0x74ce55c20_5 .net/s v0x74ce55c20 5, 31 0, L_0x74d1e5720; 1 drivers
|
|
v0x74ce55c20_6 .net/s v0x74ce55c20 6, 31 0, L_0x74d1e57c0; 1 drivers
|
|
v0x74ce55c20_7 .net/s v0x74ce55c20 7, 31 0, L_0x74d1e5860; 1 drivers
|
|
v0x74ce55cc0 .array "tree", 31 0;
|
|
v0x74ce55cc0_0 .net/s v0x74ce55cc0 0, 31 0, L_0x74cc47330; 1 drivers
|
|
v0x74ce55cc0_1 .net/s v0x74ce55cc0 1, 31 0, L_0x74cc473a0; 1 drivers
|
|
v0x74ce55cc0_2 .net/s v0x74ce55cc0 2, 31 0, L_0x74cc47410; 1 drivers
|
|
v0x74ce55cc0_3 .net/s v0x74ce55cc0 3, 31 0, L_0x74cc47480; 1 drivers
|
|
v0x74ce55cc0_4 .net/s v0x74ce55cc0 4, 31 0, L_0x74cc474f0; 1 drivers
|
|
v0x74ce55cc0_5 .net/s v0x74ce55cc0 5, 31 0, L_0x74cc47560; 1 drivers
|
|
v0x74ce55cc0_6 .net/s v0x74ce55cc0 6, 31 0, L_0x74cc475d0; 1 drivers
|
|
v0x74ce55cc0_7 .net/s v0x74ce55cc0 7, 31 0, L_0x74cc47640; 1 drivers
|
|
v0x74ce55cc0_8 .net/s v0x74ce55cc0 8, 31 0, L_0x74d1e5900; 1 drivers
|
|
v0x74ce55cc0_9 .net/s v0x74ce55cc0 9, 31 0, L_0x74d1e59a0; 1 drivers
|
|
v0x74ce55cc0_10 .net/s v0x74ce55cc0 10, 31 0, L_0x74d1e5a40; 1 drivers
|
|
v0x74ce55cc0_11 .net/s v0x74ce55cc0 11, 31 0, L_0x74d1e5ae0; 1 drivers
|
|
o0x74c853cd0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_12 .net/s v0x74ce55cc0 12, 31 0, o0x74c853cd0; 0 drivers
|
|
o0x74c853d00 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_13 .net/s v0x74ce55cc0 13, 31 0, o0x74c853d00; 0 drivers
|
|
o0x74c853d30 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_14 .net/s v0x74ce55cc0 14, 31 0, o0x74c853d30; 0 drivers
|
|
o0x74c853d60 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_15 .net/s v0x74ce55cc0 15, 31 0, o0x74c853d60; 0 drivers
|
|
v0x74ce55cc0_16 .net/s v0x74ce55cc0 16, 31 0, L_0x74d1e5b80; 1 drivers
|
|
v0x74ce55cc0_17 .net/s v0x74ce55cc0 17, 31 0, L_0x74d1e5c20; 1 drivers
|
|
o0x74c853df0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_18 .net/s v0x74ce55cc0 18, 31 0, o0x74c853df0; 0 drivers
|
|
o0x74c853e20 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_19 .net/s v0x74ce55cc0 19, 31 0, o0x74c853e20; 0 drivers
|
|
o0x74c853e50 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_20 .net/s v0x74ce55cc0 20, 31 0, o0x74c853e50; 0 drivers
|
|
o0x74c853e80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_21 .net/s v0x74ce55cc0 21, 31 0, o0x74c853e80; 0 drivers
|
|
o0x74c853eb0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_22 .net/s v0x74ce55cc0 22, 31 0, o0x74c853eb0; 0 drivers
|
|
o0x74c853ee0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_23 .net/s v0x74ce55cc0 23, 31 0, o0x74c853ee0; 0 drivers
|
|
v0x74ce55cc0_24 .net/s v0x74ce55cc0 24, 31 0, L_0x74d1e5cc0; 1 drivers
|
|
o0x74c853f40 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_25 .net/s v0x74ce55cc0 25, 31 0, o0x74c853f40; 0 drivers
|
|
o0x74c853f70 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_26 .net/s v0x74ce55cc0 26, 31 0, o0x74c853f70; 0 drivers
|
|
o0x74c853fa0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_27 .net/s v0x74ce55cc0 27, 31 0, o0x74c853fa0; 0 drivers
|
|
o0x74c853fd0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_28 .net/s v0x74ce55cc0 28, 31 0, o0x74c853fd0; 0 drivers
|
|
o0x74c854000 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_29 .net/s v0x74ce55cc0 29, 31 0, o0x74c854000; 0 drivers
|
|
o0x74c854030 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_30 .net/s v0x74ce55cc0 30, 31 0, o0x74c854030; 0 drivers
|
|
o0x74c854060 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce55cc0_31 .net/s v0x74ce55cc0 31, 31 0, o0x74c854060; 0 drivers
|
|
v0x74ce55d60_0 .net/s "w_bus", 63 0, L_0x74d1e3ca0; alias, 1 drivers
|
|
v0x74ce55e00_0 .net/s "x_bus", 63 0, L_0x74d1e3c00; alias, 1 drivers
|
|
L_0x74d1e3e80 .part L_0x74d1e3c00, 0, 8;
|
|
L_0x74d1e3f20 .part L_0x74d1e3ca0, 0, 8;
|
|
L_0x74d1ec140 .part L_0x74d1e3c00, 8, 8;
|
|
L_0x74d1ec1e0 .part L_0x74d1e3ca0, 8, 8;
|
|
L_0x74d1ec3c0 .part L_0x74d1e3c00, 16, 8;
|
|
L_0x74d1ec460 .part L_0x74d1e3ca0, 16, 8;
|
|
L_0x74d1ec640 .part L_0x74d1e3c00, 24, 8;
|
|
L_0x74d1ec6e0 .part L_0x74d1e3ca0, 24, 8;
|
|
L_0x74d1ec8c0 .part L_0x74d1e3c00, 32, 8;
|
|
L_0x74d1ec960 .part L_0x74d1e3ca0, 32, 8;
|
|
L_0x74d1ecb40 .part L_0x74d1e3c00, 40, 8;
|
|
L_0x74d1ecbe0 .part L_0x74d1e3ca0, 40, 8;
|
|
L_0x74d1ecdc0 .part L_0x74d1e3c00, 48, 8;
|
|
L_0x74d1ece60 .part L_0x74d1e3ca0, 48, 8;
|
|
L_0x74d1ed040 .part L_0x74d1e3c00, 56, 8;
|
|
L_0x74d1ed0e0 .part L_0x74d1e3ca0, 56, 8;
|
|
L_0x74d1e5d60 .arith/sum 32, v0x74ce56760_0, L_0x74d1e5cc0;
|
|
S_0x74ce4c300 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50000 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce4c480 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4c300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5bc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5c00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5c40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce4a8a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce81a40; 1 drivers
|
|
v0x74ce4a940_0 .net/s *"_ivl_2", 15 0, L_0x74ce81ae0; 1 drivers
|
|
v0x74ce4a9e0_0 .net *"_ivl_7", 0 0, L_0x74d1e3d40; 1 drivers
|
|
v0x74ce4aa80_0 .net *"_ivl_9", 15 0, L_0x74d1e3de0; 1 drivers
|
|
L_0x74c879600 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce4ab20_0 .net/s "acc_in", 31 0, L_0x74c879600; 1 drivers
|
|
v0x74ce4abc0_0 .net/s "acc_out", 31 0, L_0x74d1e5400; alias, 1 drivers
|
|
v0x74ce4ac60_0 .net/s "product", 15 0, L_0x74ce81b80; 1 drivers
|
|
v0x74ce4ad00_0 .net/s "product_ext", 31 0, L_0x74ce81c20; 1 drivers
|
|
v0x74ce4ada0_0 .net/s "w", 7 0, L_0x74d1e3f20; 1 drivers
|
|
v0x74ce4ae40_0 .net/s "x", 7 0, L_0x74d1e3e80; 1 drivers
|
|
L_0x74ce81a40 .extend/s 16, L_0x74d1e3e80;
|
|
L_0x74ce81ae0 .extend/s 16, L_0x74d1e3f20;
|
|
L_0x74ce81b80 .arith/mult 16, L_0x74ce81a40, L_0x74ce81ae0;
|
|
L_0x74d1e3d40 .part L_0x74ce81b80, 15, 1;
|
|
L_0x74d1e3de0 .repeat 16, 16, L_0x74d1e3d40;
|
|
L_0x74ce81c20 .concat [ 16 16 0 0], L_0x74ce81b80, L_0x74d1e3de0;
|
|
L_0x74d1e5400 .arith/sum 32, L_0x74c879600, L_0x74ce81c20;
|
|
S_0x74ce4c600 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50040 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce4c780 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4c600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5c80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5cc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5d00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce4aee0_0 .net/s *"_ivl_0", 15 0, L_0x74ce81cc0; 1 drivers
|
|
v0x74ce4af80_0 .net/s *"_ivl_2", 15 0, L_0x74ce81d60; 1 drivers
|
|
v0x74ce4b020_0 .net *"_ivl_7", 0 0, L_0x74d1ec000; 1 drivers
|
|
v0x74ce4b0c0_0 .net *"_ivl_9", 15 0, L_0x74d1ec0a0; 1 drivers
|
|
L_0x74c879648 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce4b160_0 .net/s "acc_in", 31 0, L_0x74c879648; 1 drivers
|
|
v0x74ce4b200_0 .net/s "acc_out", 31 0, L_0x74d1e54a0; alias, 1 drivers
|
|
v0x74ce4b2a0_0 .net/s "product", 15 0, L_0x74ce81e00; 1 drivers
|
|
v0x74ce4b340_0 .net/s "product_ext", 31 0, L_0x74ce81ea0; 1 drivers
|
|
v0x74ce4b3e0_0 .net/s "w", 7 0, L_0x74d1ec1e0; 1 drivers
|
|
v0x74ce4b480_0 .net/s "x", 7 0, L_0x74d1ec140; 1 drivers
|
|
L_0x74ce81cc0 .extend/s 16, L_0x74d1ec140;
|
|
L_0x74ce81d60 .extend/s 16, L_0x74d1ec1e0;
|
|
L_0x74ce81e00 .arith/mult 16, L_0x74ce81cc0, L_0x74ce81d60;
|
|
L_0x74d1ec000 .part L_0x74ce81e00, 15, 1;
|
|
L_0x74d1ec0a0 .repeat 16, 16, L_0x74d1ec000;
|
|
L_0x74ce81ea0 .concat [ 16 16 0 0], L_0x74ce81e00, L_0x74d1ec0a0;
|
|
L_0x74d1e54a0 .arith/sum 32, L_0x74c879648, L_0x74ce81ea0;
|
|
S_0x74ce4c900 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50080 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce4ca80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4c900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5d40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5d80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5dc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce4b520_0 .net/s *"_ivl_0", 15 0, L_0x74ce81f40; 1 drivers
|
|
v0x74ce4b5c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce81fe0; 1 drivers
|
|
v0x74ce4b660_0 .net *"_ivl_7", 0 0, L_0x74d1ec280; 1 drivers
|
|
v0x74ce4b700_0 .net *"_ivl_9", 15 0, L_0x74d1ec320; 1 drivers
|
|
L_0x74c879690 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce4b7a0_0 .net/s "acc_in", 31 0, L_0x74c879690; 1 drivers
|
|
v0x74ce4b840_0 .net/s "acc_out", 31 0, L_0x74d1e5540; alias, 1 drivers
|
|
v0x74ce4b8e0_0 .net/s "product", 15 0, L_0x74ce82080; 1 drivers
|
|
v0x74ce4b980_0 .net/s "product_ext", 31 0, L_0x74ce82120; 1 drivers
|
|
v0x74ce4ba20_0 .net/s "w", 7 0, L_0x74d1ec460; 1 drivers
|
|
v0x74ce4bac0_0 .net/s "x", 7 0, L_0x74d1ec3c0; 1 drivers
|
|
L_0x74ce81f40 .extend/s 16, L_0x74d1ec3c0;
|
|
L_0x74ce81fe0 .extend/s 16, L_0x74d1ec460;
|
|
L_0x74ce82080 .arith/mult 16, L_0x74ce81f40, L_0x74ce81fe0;
|
|
L_0x74d1ec280 .part L_0x74ce82080, 15, 1;
|
|
L_0x74d1ec320 .repeat 16, 16, L_0x74d1ec280;
|
|
L_0x74ce82120 .concat [ 16 16 0 0], L_0x74ce82080, L_0x74d1ec320;
|
|
L_0x74d1e5540 .arith/sum 32, L_0x74c879690, L_0x74ce82120;
|
|
S_0x74ce4cc00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce500c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce4cd80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4cc00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5e00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5e40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5e80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce4bb60_0 .net/s *"_ivl_0", 15 0, L_0x74ce821c0; 1 drivers
|
|
v0x74ce4bc00_0 .net/s *"_ivl_2", 15 0, L_0x74ce82260; 1 drivers
|
|
v0x74ce4bca0_0 .net *"_ivl_7", 0 0, L_0x74d1ec500; 1 drivers
|
|
v0x74ce4bd40_0 .net *"_ivl_9", 15 0, L_0x74d1ec5a0; 1 drivers
|
|
L_0x74c8796d8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce4bde0_0 .net/s "acc_in", 31 0, L_0x74c8796d8; 1 drivers
|
|
v0x74ce4be80_0 .net/s "acc_out", 31 0, L_0x74d1e55e0; alias, 1 drivers
|
|
v0x74ce4bf20_0 .net/s "product", 15 0, L_0x74ce82300; 1 drivers
|
|
v0x74ce54000_0 .net/s "product_ext", 31 0, L_0x74ce823a0; 1 drivers
|
|
v0x74ce540a0_0 .net/s "w", 7 0, L_0x74d1ec6e0; 1 drivers
|
|
v0x74ce54140_0 .net/s "x", 7 0, L_0x74d1ec640; 1 drivers
|
|
L_0x74ce821c0 .extend/s 16, L_0x74d1ec640;
|
|
L_0x74ce82260 .extend/s 16, L_0x74d1ec6e0;
|
|
L_0x74ce82300 .arith/mult 16, L_0x74ce821c0, L_0x74ce82260;
|
|
L_0x74d1ec500 .part L_0x74ce82300, 15, 1;
|
|
L_0x74d1ec5a0 .repeat 16, 16, L_0x74d1ec500;
|
|
L_0x74ce823a0 .concat [ 16 16 0 0], L_0x74ce82300, L_0x74d1ec5a0;
|
|
L_0x74d1e55e0 .arith/sum 32, L_0x74c8796d8, L_0x74ce823a0;
|
|
S_0x74ce4cf00 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50140 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce4d080 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4cf00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5ec0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5f00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c5f40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce541e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce82440; 1 drivers
|
|
v0x74ce54280_0 .net/s *"_ivl_2", 15 0, L_0x74ce824e0; 1 drivers
|
|
v0x74ce54320_0 .net *"_ivl_7", 0 0, L_0x74d1ec780; 1 drivers
|
|
v0x74ce543c0_0 .net *"_ivl_9", 15 0, L_0x74d1ec820; 1 drivers
|
|
L_0x74c879720 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce54460_0 .net/s "acc_in", 31 0, L_0x74c879720; 1 drivers
|
|
v0x74ce54500_0 .net/s "acc_out", 31 0, L_0x74d1e5680; alias, 1 drivers
|
|
v0x74ce545a0_0 .net/s "product", 15 0, L_0x74ce82580; 1 drivers
|
|
v0x74ce54640_0 .net/s "product_ext", 31 0, L_0x74ce82620; 1 drivers
|
|
v0x74ce546e0_0 .net/s "w", 7 0, L_0x74d1ec960; 1 drivers
|
|
v0x74ce54780_0 .net/s "x", 7 0, L_0x74d1ec8c0; 1 drivers
|
|
L_0x74ce82440 .extend/s 16, L_0x74d1ec8c0;
|
|
L_0x74ce824e0 .extend/s 16, L_0x74d1ec960;
|
|
L_0x74ce82580 .arith/mult 16, L_0x74ce82440, L_0x74ce824e0;
|
|
L_0x74d1ec780 .part L_0x74ce82580, 15, 1;
|
|
L_0x74d1ec820 .repeat 16, 16, L_0x74d1ec780;
|
|
L_0x74ce82620 .concat [ 16 16 0 0], L_0x74ce82580, L_0x74d1ec820;
|
|
L_0x74d1e5680 .arith/sum 32, L_0x74c879720, L_0x74ce82620;
|
|
S_0x74ce4d200 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50180 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce4d380 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4d200;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c5f80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c5fc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6000 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce54820_0 .net/s *"_ivl_0", 15 0, L_0x74ce826c0; 1 drivers
|
|
v0x74ce548c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce82760; 1 drivers
|
|
v0x74ce54960_0 .net *"_ivl_7", 0 0, L_0x74d1eca00; 1 drivers
|
|
v0x74ce54a00_0 .net *"_ivl_9", 15 0, L_0x74d1ecaa0; 1 drivers
|
|
L_0x74c879768 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce54aa0_0 .net/s "acc_in", 31 0, L_0x74c879768; 1 drivers
|
|
v0x74ce54b40_0 .net/s "acc_out", 31 0, L_0x74d1e5720; alias, 1 drivers
|
|
v0x74ce54be0_0 .net/s "product", 15 0, L_0x74ce82800; 1 drivers
|
|
v0x74ce54c80_0 .net/s "product_ext", 31 0, L_0x74ce828a0; 1 drivers
|
|
v0x74ce54d20_0 .net/s "w", 7 0, L_0x74d1ecbe0; 1 drivers
|
|
v0x74ce54dc0_0 .net/s "x", 7 0, L_0x74d1ecb40; 1 drivers
|
|
L_0x74ce826c0 .extend/s 16, L_0x74d1ecb40;
|
|
L_0x74ce82760 .extend/s 16, L_0x74d1ecbe0;
|
|
L_0x74ce82800 .arith/mult 16, L_0x74ce826c0, L_0x74ce82760;
|
|
L_0x74d1eca00 .part L_0x74ce82800, 15, 1;
|
|
L_0x74d1ecaa0 .repeat 16, 16, L_0x74d1eca00;
|
|
L_0x74ce828a0 .concat [ 16 16 0 0], L_0x74ce82800, L_0x74d1ecaa0;
|
|
L_0x74d1e5720 .arith/sum 32, L_0x74c879768, L_0x74ce828a0;
|
|
S_0x74ce4d500 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce501c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce4d680 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4d500;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6040 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6080 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c60c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce54e60_0 .net/s *"_ivl_0", 15 0, L_0x74ce82940; 1 drivers
|
|
v0x74ce54f00_0 .net/s *"_ivl_2", 15 0, L_0x74ce829e0; 1 drivers
|
|
v0x74ce54fa0_0 .net *"_ivl_7", 0 0, L_0x74d1ecc80; 1 drivers
|
|
v0x74ce55040_0 .net *"_ivl_9", 15 0, L_0x74d1ecd20; 1 drivers
|
|
L_0x74c8797b0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce550e0_0 .net/s "acc_in", 31 0, L_0x74c8797b0; 1 drivers
|
|
v0x74ce55180_0 .net/s "acc_out", 31 0, L_0x74d1e57c0; alias, 1 drivers
|
|
v0x74ce55220_0 .net/s "product", 15 0, L_0x74ce82a80; 1 drivers
|
|
v0x74ce552c0_0 .net/s "product_ext", 31 0, L_0x74ce82b20; 1 drivers
|
|
v0x74ce55360_0 .net/s "w", 7 0, L_0x74d1ece60; 1 drivers
|
|
v0x74ce55400_0 .net/s "x", 7 0, L_0x74d1ecdc0; 1 drivers
|
|
L_0x74ce82940 .extend/s 16, L_0x74d1ecdc0;
|
|
L_0x74ce829e0 .extend/s 16, L_0x74d1ece60;
|
|
L_0x74ce82a80 .arith/mult 16, L_0x74ce82940, L_0x74ce829e0;
|
|
L_0x74d1ecc80 .part L_0x74ce82a80, 15, 1;
|
|
L_0x74d1ecd20 .repeat 16, 16, L_0x74d1ecc80;
|
|
L_0x74ce82b20 .concat [ 16 16 0 0], L_0x74ce82a80, L_0x74d1ecd20;
|
|
L_0x74d1e57c0 .arith/sum 32, L_0x74c8797b0, L_0x74ce82b20;
|
|
S_0x74ce4d800 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50200 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce4d980 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4d800;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6100 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6140 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6180 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce554a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce82bc0; 1 drivers
|
|
v0x74ce55540_0 .net/s *"_ivl_2", 15 0, L_0x74ce82c60; 1 drivers
|
|
v0x74ce555e0_0 .net *"_ivl_7", 0 0, L_0x74d1ecf00; 1 drivers
|
|
v0x74ce55680_0 .net *"_ivl_9", 15 0, L_0x74d1ecfa0; 1 drivers
|
|
L_0x74c8797f8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce55720_0 .net/s "acc_in", 31 0, L_0x74c8797f8; 1 drivers
|
|
v0x74ce557c0_0 .net/s "acc_out", 31 0, L_0x74d1e5860; alias, 1 drivers
|
|
v0x74ce55860_0 .net/s "product", 15 0, L_0x74ce82d00; 1 drivers
|
|
v0x74ce55900_0 .net/s "product_ext", 31 0, L_0x74ce82da0; 1 drivers
|
|
v0x74ce559a0_0 .net/s "w", 7 0, L_0x74d1ed0e0; 1 drivers
|
|
v0x74ce55a40_0 .net/s "x", 7 0, L_0x74d1ed040; 1 drivers
|
|
L_0x74ce82bc0 .extend/s 16, L_0x74d1ed040;
|
|
L_0x74ce82c60 .extend/s 16, L_0x74d1ed0e0;
|
|
L_0x74ce82d00 .arith/mult 16, L_0x74ce82bc0, L_0x74ce82c60;
|
|
L_0x74d1ecf00 .part L_0x74ce82d00, 15, 1;
|
|
L_0x74d1ecfa0 .repeat 16, 16, L_0x74d1ecf00;
|
|
L_0x74ce82da0 .concat [ 16 16 0 0], L_0x74ce82d00, L_0x74d1ecfa0;
|
|
L_0x74d1e5860 .arith/sum 32, L_0x74c8797f8, L_0x74ce82da0;
|
|
S_0x74ce4db00 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50100 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc47330 .functor BUFZ 32, L_0x74d1e5400, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4dc80 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50240 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc473a0 .functor BUFZ 32, L_0x74d1e54a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4de00 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50280 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc47410 .functor BUFZ 32, L_0x74d1e5540, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4df80 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce502c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc47480 .functor BUFZ 32, L_0x74d1e55e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4e100 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50300 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc474f0 .functor BUFZ 32, L_0x74d1e5680, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4e280 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50340 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc47560 .functor BUFZ 32, L_0x74d1e5720, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4e400 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50380 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc475d0 .functor BUFZ 32, L_0x74d1e57c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4e580 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce503c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc47640 .functor BUFZ 32, L_0x74d1e5860, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce4e700 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50400 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce4e880 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce4e700;
|
|
.timescale 0 0;
|
|
P_0x74ce50440 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e5900 .arith/sum 32, L_0x74cc47330, L_0x74cc473a0;
|
|
S_0x74ce4ea00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce4e700;
|
|
.timescale 0 0;
|
|
P_0x74ce50480 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e59a0 .arith/sum 32, L_0x74cc47410, L_0x74cc47480;
|
|
S_0x74ce4eb80 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce4e700;
|
|
.timescale 0 0;
|
|
P_0x74ce504c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d1e5a40 .arith/sum 32, L_0x74cc474f0, L_0x74cc47560;
|
|
S_0x74ce4ed00 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce4e700;
|
|
.timescale 0 0;
|
|
P_0x74ce50500 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d1e5ae0 .arith/sum 32, L_0x74cc475d0, L_0x74cc47640;
|
|
S_0x74ce4ee80 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50540 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce4f000 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce4ee80;
|
|
.timescale 0 0;
|
|
P_0x74ce50580 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e5b80 .arith/sum 32, L_0x74d1e5900, L_0x74d1e59a0;
|
|
S_0x74ce4f180 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce4ee80;
|
|
.timescale 0 0;
|
|
P_0x74ce505c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e5c20 .arith/sum 32, L_0x74d1e5a40, L_0x74d1e5ae0;
|
|
S_0x74ce4f300 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce4c180;
|
|
.timescale 0 0;
|
|
P_0x74ce50600 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce4f480 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce4f300;
|
|
.timescale 0 0;
|
|
P_0x74ce50640 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e5cc0 .arith/sum 32, L_0x74d1e5b80, L_0x74d1e5c20;
|
|
S_0x74ce4f600 .scope generate, "GEN_NEURON[5]" "GEN_NEURON[5]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74ce506c0 .param/l "n" 1 12 34, +C4<0101>;
|
|
S_0x74ce4f780 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce4f600;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a77da0 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77de0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a77e20 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a77e60 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a77ea0 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77ee0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce5e760_0 .net *"_ivl_0", 31 0, L_0x74ce82ee0; 1 drivers
|
|
v0x74ce5e800_0 .net *"_ivl_11", 31 0, L_0x74ce83020; 1 drivers
|
|
v0x74ce5e8a0_0 .net *"_ivl_14", 31 0, L_0x74ce830c0; 1 drivers
|
|
L_0x74c879918 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5e940_0 .net *"_ivl_17", 29 0, L_0x74c879918; 1 drivers
|
|
L_0x74c879960 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5e9e0_0 .net/2u *"_ivl_18", 31 0, L_0x74c879960; 1 drivers
|
|
v0x74ce5ea80_0 .net *"_ivl_21", 31 0, L_0x74ce83160; 1 drivers
|
|
L_0x74c8799a8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5eb20_0 .net/2u *"_ivl_22", 31 0, L_0x74c8799a8; 1 drivers
|
|
v0x74ce5ebc0_0 .net *"_ivl_25", 31 0, L_0x74ce83200; 1 drivers
|
|
v0x74ce5ec60_0 .net *"_ivl_29", 0 0, L_0x74d1eea80; 1 drivers
|
|
L_0x74c879840 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5ed00_0 .net *"_ivl_3", 29 0, L_0x74c879840; 1 drivers
|
|
v0x74ce5eda0_0 .net *"_ivl_31", 23 0, L_0x74d1eeb20; 1 drivers
|
|
L_0x74c879888 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5ee40_0 .net/2u *"_ivl_4", 31 0, L_0x74c879888; 1 drivers
|
|
v0x74ce5eee0_0 .net *"_ivl_7", 31 0, L_0x74ce82f80; 1 drivers
|
|
L_0x74c8798d0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5ef80_0 .net/2u *"_ivl_8", 31 0, L_0x74c8798d0; 1 drivers
|
|
v0x74ce5f020_0 .var/s "acc", 31 0;
|
|
v0x74ce5f0c0_0 .net/s "acc_next", 31 0, L_0x74d1e6800; 1 drivers
|
|
v0x74ce5f160_0 .net/s "bias", 7 0, L_0x74d1eec60; 1 drivers
|
|
v0x74ce5f200_0 .net/s "bias_ext", 31 0, L_0x74ce846e0; 1 drivers
|
|
v0x74ce5f2a0_0 .var "busy", 0 0;
|
|
v0x74ce5f340_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce5f3e0_0 .var "done", 0 0;
|
|
v0x74ce5f480_0 .net/s "final_acc", 31 0, L_0x74d1e68a0; 1 drivers
|
|
v0x74ce5f520_0 .var "group_index", 1 0;
|
|
v0x74ce5f5c0_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce5f660_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce5f700_0 .net/s "w_bus", 255 0, L_0x74d1eebc0; 1 drivers
|
|
v0x74ce5f7a0_0 .net/s "w_group", 63 0, L_0x74d1ed540; 1 drivers
|
|
v0x74ce5f840_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce5f8e0_0 .net/s "x_group", 63 0, L_0x74d1ed4a0; 1 drivers
|
|
v0x74ce5f980_0 .var/s "y", 7 0;
|
|
L_0x74ce82ee0 .concat [ 2 30 0 0], v0x74ce5f520_0, L_0x74c879840;
|
|
L_0x74ce82f80 .arith/mult 32, L_0x74ce82ee0, L_0x74c879888;
|
|
L_0x74ce83020 .arith/mult 32, L_0x74ce82f80, L_0x74c8798d0;
|
|
L_0x74d1ed4a0 .part/v v0x74ce79860_0, L_0x74ce83020, 64;
|
|
L_0x74ce830c0 .concat [ 2 30 0 0], v0x74ce5f520_0, L_0x74c879918;
|
|
L_0x74ce83160 .arith/mult 32, L_0x74ce830c0, L_0x74c879960;
|
|
L_0x74ce83200 .arith/mult 32, L_0x74ce83160, L_0x74c8799a8;
|
|
L_0x74d1ed540 .part/v L_0x74d1eebc0, L_0x74ce83200, 64;
|
|
L_0x74d1eea80 .part L_0x74d1eec60, 7, 1;
|
|
L_0x74d1eeb20 .repeat 24, 24, L_0x74d1eea80;
|
|
L_0x74ce846e0 .concat [ 8 24 0 0], L_0x74d1eec60, L_0x74d1eeb20;
|
|
L_0x74d1e68a0 .arith/sum 32, L_0x74d1e6800, L_0x74ce846e0;
|
|
S_0x74ce4f900 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce4f780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c1500 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c1540 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c1580 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c15c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce5e3a0_0 .net/s "acc_in", 31 0, v0x74ce5f020_0; 1 drivers
|
|
v0x74ce5e440_0 .net/s "acc_out", 31 0, L_0x74d1e6800; alias, 1 drivers
|
|
v0x74ce5e4e0 .array "products", 7 0;
|
|
v0x74ce5e4e0_0 .net/s v0x74ce5e4e0 0, 31 0, L_0x74d1e5ea0; 1 drivers
|
|
v0x74ce5e4e0_1 .net/s v0x74ce5e4e0 1, 31 0, L_0x74d1e5f40; 1 drivers
|
|
v0x74ce5e4e0_2 .net/s v0x74ce5e4e0 2, 31 0, L_0x74d1e5fe0; 1 drivers
|
|
v0x74ce5e4e0_3 .net/s v0x74ce5e4e0 3, 31 0, L_0x74d1e6080; 1 drivers
|
|
v0x74ce5e4e0_4 .net/s v0x74ce5e4e0 4, 31 0, L_0x74d1e6120; 1 drivers
|
|
v0x74ce5e4e0_5 .net/s v0x74ce5e4e0 5, 31 0, L_0x74d1e61c0; 1 drivers
|
|
v0x74ce5e4e0_6 .net/s v0x74ce5e4e0 6, 31 0, L_0x74d1e6260; 1 drivers
|
|
v0x74ce5e4e0_7 .net/s v0x74ce5e4e0 7, 31 0, L_0x74d1e6300; 1 drivers
|
|
v0x74ce5e580 .array "tree", 31 0;
|
|
v0x74ce5e580_0 .net/s v0x74ce5e580 0, 31 0, L_0x74cc476b0; 1 drivers
|
|
v0x74ce5e580_1 .net/s v0x74ce5e580 1, 31 0, L_0x74cc47720; 1 drivers
|
|
v0x74ce5e580_2 .net/s v0x74ce5e580 2, 31 0, L_0x74cc47790; 1 drivers
|
|
v0x74ce5e580_3 .net/s v0x74ce5e580 3, 31 0, L_0x74cc47800; 1 drivers
|
|
v0x74ce5e580_4 .net/s v0x74ce5e580 4, 31 0, L_0x74cc47870; 1 drivers
|
|
v0x74ce5e580_5 .net/s v0x74ce5e580 5, 31 0, L_0x74cc478e0; 1 drivers
|
|
v0x74ce5e580_6 .net/s v0x74ce5e580 6, 31 0, L_0x74cc47950; 1 drivers
|
|
v0x74ce5e580_7 .net/s v0x74ce5e580 7, 31 0, L_0x74cc479c0; 1 drivers
|
|
v0x74ce5e580_8 .net/s v0x74ce5e580 8, 31 0, L_0x74d1e63a0; 1 drivers
|
|
v0x74ce5e580_9 .net/s v0x74ce5e580 9, 31 0, L_0x74d1e6440; 1 drivers
|
|
v0x74ce5e580_10 .net/s v0x74ce5e580 10, 31 0, L_0x74d1e64e0; 1 drivers
|
|
v0x74ce5e580_11 .net/s v0x74ce5e580 11, 31 0, L_0x74d1e6580; 1 drivers
|
|
o0x74c855f20 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_12 .net/s v0x74ce5e580 12, 31 0, o0x74c855f20; 0 drivers
|
|
o0x74c855f50 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_13 .net/s v0x74ce5e580 13, 31 0, o0x74c855f50; 0 drivers
|
|
o0x74c855f80 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_14 .net/s v0x74ce5e580 14, 31 0, o0x74c855f80; 0 drivers
|
|
o0x74c855fb0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_15 .net/s v0x74ce5e580 15, 31 0, o0x74c855fb0; 0 drivers
|
|
v0x74ce5e580_16 .net/s v0x74ce5e580 16, 31 0, L_0x74d1e6620; 1 drivers
|
|
v0x74ce5e580_17 .net/s v0x74ce5e580 17, 31 0, L_0x74d1e66c0; 1 drivers
|
|
o0x74c856040 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_18 .net/s v0x74ce5e580 18, 31 0, o0x74c856040; 0 drivers
|
|
o0x74c856070 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_19 .net/s v0x74ce5e580 19, 31 0, o0x74c856070; 0 drivers
|
|
o0x74c8560a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_20 .net/s v0x74ce5e580 20, 31 0, o0x74c8560a0; 0 drivers
|
|
o0x74c8560d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_21 .net/s v0x74ce5e580 21, 31 0, o0x74c8560d0; 0 drivers
|
|
o0x74c856100 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_22 .net/s v0x74ce5e580 22, 31 0, o0x74c856100; 0 drivers
|
|
o0x74c856130 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_23 .net/s v0x74ce5e580 23, 31 0, o0x74c856130; 0 drivers
|
|
v0x74ce5e580_24 .net/s v0x74ce5e580 24, 31 0, L_0x74d1e6760; 1 drivers
|
|
o0x74c856190 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_25 .net/s v0x74ce5e580 25, 31 0, o0x74c856190; 0 drivers
|
|
o0x74c8561c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_26 .net/s v0x74ce5e580 26, 31 0, o0x74c8561c0; 0 drivers
|
|
o0x74c8561f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_27 .net/s v0x74ce5e580 27, 31 0, o0x74c8561f0; 0 drivers
|
|
o0x74c856220 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_28 .net/s v0x74ce5e580 28, 31 0, o0x74c856220; 0 drivers
|
|
o0x74c856250 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_29 .net/s v0x74ce5e580 29, 31 0, o0x74c856250; 0 drivers
|
|
o0x74c856280 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_30 .net/s v0x74ce5e580 30, 31 0, o0x74c856280; 0 drivers
|
|
o0x74c8562b0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce5e580_31 .net/s v0x74ce5e580 31, 31 0, o0x74c8562b0; 0 drivers
|
|
v0x74ce5e620_0 .net/s "w_bus", 63 0, L_0x74d1ed540; alias, 1 drivers
|
|
v0x74ce5e6c0_0 .net/s "x_bus", 63 0, L_0x74d1ed4a0; alias, 1 drivers
|
|
L_0x74d1ed720 .part L_0x74d1ed4a0, 0, 8;
|
|
L_0x74d1ed7c0 .part L_0x74d1ed540, 0, 8;
|
|
L_0x74d1ed9a0 .part L_0x74d1ed4a0, 8, 8;
|
|
L_0x74d1eda40 .part L_0x74d1ed540, 8, 8;
|
|
L_0x74d1edc20 .part L_0x74d1ed4a0, 16, 8;
|
|
L_0x74d1edcc0 .part L_0x74d1ed540, 16, 8;
|
|
L_0x74d1edea0 .part L_0x74d1ed4a0, 24, 8;
|
|
L_0x74d1edf40 .part L_0x74d1ed540, 24, 8;
|
|
L_0x74d1ee120 .part L_0x74d1ed4a0, 32, 8;
|
|
L_0x74d1ee1c0 .part L_0x74d1ed540, 32, 8;
|
|
L_0x74d1ee3a0 .part L_0x74d1ed4a0, 40, 8;
|
|
L_0x74d1ee440 .part L_0x74d1ed540, 40, 8;
|
|
L_0x74d1ee620 .part L_0x74d1ed4a0, 48, 8;
|
|
L_0x74d1ee6c0 .part L_0x74d1ed540, 48, 8;
|
|
L_0x74d1ee8a0 .part L_0x74d1ed4a0, 56, 8;
|
|
L_0x74d1ee940 .part L_0x74d1ed540, 56, 8;
|
|
L_0x74d1e6800 .arith/sum 32, v0x74ce5f020_0, L_0x74d1e6760;
|
|
S_0x74ce4fa80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50700 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce4fc00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4fa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c61c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6200 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6240 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce57160_0 .net/s *"_ivl_0", 15 0, L_0x74ce832a0; 1 drivers
|
|
v0x74ce57200_0 .net/s *"_ivl_2", 15 0, L_0x74ce83340; 1 drivers
|
|
v0x74ce572a0_0 .net *"_ivl_7", 0 0, L_0x74d1ed5e0; 1 drivers
|
|
v0x74ce57340_0 .net *"_ivl_9", 15 0, L_0x74d1ed680; 1 drivers
|
|
L_0x74c8799f0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce573e0_0 .net/s "acc_in", 31 0, L_0x74c8799f0; 1 drivers
|
|
v0x74ce57480_0 .net/s "acc_out", 31 0, L_0x74d1e5ea0; alias, 1 drivers
|
|
v0x74ce57520_0 .net/s "product", 15 0, L_0x74ce833e0; 1 drivers
|
|
v0x74ce575c0_0 .net/s "product_ext", 31 0, L_0x74ce83480; 1 drivers
|
|
v0x74ce57660_0 .net/s "w", 7 0, L_0x74d1ed7c0; 1 drivers
|
|
v0x74ce57700_0 .net/s "x", 7 0, L_0x74d1ed720; 1 drivers
|
|
L_0x74ce832a0 .extend/s 16, L_0x74d1ed720;
|
|
L_0x74ce83340 .extend/s 16, L_0x74d1ed7c0;
|
|
L_0x74ce833e0 .arith/mult 16, L_0x74ce832a0, L_0x74ce83340;
|
|
L_0x74d1ed5e0 .part L_0x74ce833e0, 15, 1;
|
|
L_0x74d1ed680 .repeat 16, 16, L_0x74d1ed5e0;
|
|
L_0x74ce83480 .concat [ 16 16 0 0], L_0x74ce833e0, L_0x74d1ed680;
|
|
L_0x74d1e5ea0 .arith/sum 32, L_0x74c8799f0, L_0x74ce83480;
|
|
S_0x74ce4fd80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50740 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce58000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce4fd80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6280 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c62c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6300 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce577a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce83520; 1 drivers
|
|
v0x74ce57840_0 .net/s *"_ivl_2", 15 0, L_0x74ce835c0; 1 drivers
|
|
v0x74ce578e0_0 .net *"_ivl_7", 0 0, L_0x74d1ed860; 1 drivers
|
|
v0x74ce57980_0 .net *"_ivl_9", 15 0, L_0x74d1ed900; 1 drivers
|
|
L_0x74c879a38 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce57a20_0 .net/s "acc_in", 31 0, L_0x74c879a38; 1 drivers
|
|
v0x74ce57ac0_0 .net/s "acc_out", 31 0, L_0x74d1e5f40; alias, 1 drivers
|
|
v0x74ce57b60_0 .net/s "product", 15 0, L_0x74ce83660; 1 drivers
|
|
v0x74ce57c00_0 .net/s "product_ext", 31 0, L_0x74ce83700; 1 drivers
|
|
v0x74ce57ca0_0 .net/s "w", 7 0, L_0x74d1eda40; 1 drivers
|
|
v0x74ce57d40_0 .net/s "x", 7 0, L_0x74d1ed9a0; 1 drivers
|
|
L_0x74ce83520 .extend/s 16, L_0x74d1ed9a0;
|
|
L_0x74ce835c0 .extend/s 16, L_0x74d1eda40;
|
|
L_0x74ce83660 .arith/mult 16, L_0x74ce83520, L_0x74ce835c0;
|
|
L_0x74d1ed860 .part L_0x74ce83660, 15, 1;
|
|
L_0x74d1ed900 .repeat 16, 16, L_0x74d1ed860;
|
|
L_0x74ce83700 .concat [ 16 16 0 0], L_0x74ce83660, L_0x74d1ed900;
|
|
L_0x74d1e5f40 .arith/sum 32, L_0x74c879a38, L_0x74ce83700;
|
|
S_0x74ce58180 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50780 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce58300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce58180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6340 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6380 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c63c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce57de0_0 .net/s *"_ivl_0", 15 0, L_0x74ce837a0; 1 drivers
|
|
v0x74ce57e80_0 .net/s *"_ivl_2", 15 0, L_0x74ce83840; 1 drivers
|
|
v0x74ce57f20_0 .net *"_ivl_7", 0 0, L_0x74d1edae0; 1 drivers
|
|
v0x74ce5c000_0 .net *"_ivl_9", 15 0, L_0x74d1edb80; 1 drivers
|
|
L_0x74c879a80 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5c0a0_0 .net/s "acc_in", 31 0, L_0x74c879a80; 1 drivers
|
|
v0x74ce5c140_0 .net/s "acc_out", 31 0, L_0x74d1e5fe0; alias, 1 drivers
|
|
v0x74ce5c1e0_0 .net/s "product", 15 0, L_0x74ce838e0; 1 drivers
|
|
v0x74ce5c280_0 .net/s "product_ext", 31 0, L_0x74ce83980; 1 drivers
|
|
v0x74ce5c320_0 .net/s "w", 7 0, L_0x74d1edcc0; 1 drivers
|
|
v0x74ce5c3c0_0 .net/s "x", 7 0, L_0x74d1edc20; 1 drivers
|
|
L_0x74ce837a0 .extend/s 16, L_0x74d1edc20;
|
|
L_0x74ce83840 .extend/s 16, L_0x74d1edcc0;
|
|
L_0x74ce838e0 .arith/mult 16, L_0x74ce837a0, L_0x74ce83840;
|
|
L_0x74d1edae0 .part L_0x74ce838e0, 15, 1;
|
|
L_0x74d1edb80 .repeat 16, 16, L_0x74d1edae0;
|
|
L_0x74ce83980 .concat [ 16 16 0 0], L_0x74ce838e0, L_0x74d1edb80;
|
|
L_0x74d1e5fe0 .arith/sum 32, L_0x74c879a80, L_0x74ce83980;
|
|
S_0x74ce58480 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce507c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce58600 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce58480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6400 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6440 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6480 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce5c460_0 .net/s *"_ivl_0", 15 0, L_0x74ce83a20; 1 drivers
|
|
v0x74ce5c500_0 .net/s *"_ivl_2", 15 0, L_0x74ce83ac0; 1 drivers
|
|
v0x74ce5c5a0_0 .net *"_ivl_7", 0 0, L_0x74d1edd60; 1 drivers
|
|
v0x74ce5c640_0 .net *"_ivl_9", 15 0, L_0x74d1ede00; 1 drivers
|
|
L_0x74c879ac8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5c6e0_0 .net/s "acc_in", 31 0, L_0x74c879ac8; 1 drivers
|
|
v0x74ce5c780_0 .net/s "acc_out", 31 0, L_0x74d1e6080; alias, 1 drivers
|
|
v0x74ce5c820_0 .net/s "product", 15 0, L_0x74ce83b60; 1 drivers
|
|
v0x74ce5c8c0_0 .net/s "product_ext", 31 0, L_0x74ce83c00; 1 drivers
|
|
v0x74ce5c960_0 .net/s "w", 7 0, L_0x74d1edf40; 1 drivers
|
|
v0x74ce5ca00_0 .net/s "x", 7 0, L_0x74d1edea0; 1 drivers
|
|
L_0x74ce83a20 .extend/s 16, L_0x74d1edea0;
|
|
L_0x74ce83ac0 .extend/s 16, L_0x74d1edf40;
|
|
L_0x74ce83b60 .arith/mult 16, L_0x74ce83a20, L_0x74ce83ac0;
|
|
L_0x74d1edd60 .part L_0x74ce83b60, 15, 1;
|
|
L_0x74d1ede00 .repeat 16, 16, L_0x74d1edd60;
|
|
L_0x74ce83c00 .concat [ 16 16 0 0], L_0x74ce83b60, L_0x74d1ede00;
|
|
L_0x74d1e6080 .arith/sum 32, L_0x74c879ac8, L_0x74ce83c00;
|
|
S_0x74ce58780 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50840 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce58900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce58780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c64c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6500 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6540 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce5caa0_0 .net/s *"_ivl_0", 15 0, L_0x74ce83ca0; 1 drivers
|
|
v0x74ce5cb40_0 .net/s *"_ivl_2", 15 0, L_0x74ce83d40; 1 drivers
|
|
v0x74ce5cbe0_0 .net *"_ivl_7", 0 0, L_0x74d1edfe0; 1 drivers
|
|
v0x74ce5cc80_0 .net *"_ivl_9", 15 0, L_0x74d1ee080; 1 drivers
|
|
L_0x74c879b10 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5cd20_0 .net/s "acc_in", 31 0, L_0x74c879b10; 1 drivers
|
|
v0x74ce5cdc0_0 .net/s "acc_out", 31 0, L_0x74d1e6120; alias, 1 drivers
|
|
v0x74ce5ce60_0 .net/s "product", 15 0, L_0x74ce83de0; 1 drivers
|
|
v0x74ce5cf00_0 .net/s "product_ext", 31 0, L_0x74ce83e80; 1 drivers
|
|
v0x74ce5cfa0_0 .net/s "w", 7 0, L_0x74d1ee1c0; 1 drivers
|
|
v0x74ce5d040_0 .net/s "x", 7 0, L_0x74d1ee120; 1 drivers
|
|
L_0x74ce83ca0 .extend/s 16, L_0x74d1ee120;
|
|
L_0x74ce83d40 .extend/s 16, L_0x74d1ee1c0;
|
|
L_0x74ce83de0 .arith/mult 16, L_0x74ce83ca0, L_0x74ce83d40;
|
|
L_0x74d1edfe0 .part L_0x74ce83de0, 15, 1;
|
|
L_0x74d1ee080 .repeat 16, 16, L_0x74d1edfe0;
|
|
L_0x74ce83e80 .concat [ 16 16 0 0], L_0x74ce83de0, L_0x74d1ee080;
|
|
L_0x74d1e6120 .arith/sum 32, L_0x74c879b10, L_0x74ce83e80;
|
|
S_0x74ce58a80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50880 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce58c00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce58a80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6580 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c65c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6600 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce5d0e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce83f20; 1 drivers
|
|
v0x74ce5d180_0 .net/s *"_ivl_2", 15 0, L_0x74ce84000; 1 drivers
|
|
v0x74ce5d220_0 .net *"_ivl_7", 0 0, L_0x74d1ee260; 1 drivers
|
|
v0x74ce5d2c0_0 .net *"_ivl_9", 15 0, L_0x74d1ee300; 1 drivers
|
|
L_0x74c879b58 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5d360_0 .net/s "acc_in", 31 0, L_0x74c879b58; 1 drivers
|
|
v0x74ce5d400_0 .net/s "acc_out", 31 0, L_0x74d1e61c0; alias, 1 drivers
|
|
v0x74ce5d4a0_0 .net/s "product", 15 0, L_0x74ce840a0; 1 drivers
|
|
v0x74ce5d540_0 .net/s "product_ext", 31 0, L_0x74ce84140; 1 drivers
|
|
v0x74ce5d5e0_0 .net/s "w", 7 0, L_0x74d1ee440; 1 drivers
|
|
v0x74ce5d680_0 .net/s "x", 7 0, L_0x74d1ee3a0; 1 drivers
|
|
L_0x74ce83f20 .extend/s 16, L_0x74d1ee3a0;
|
|
L_0x74ce84000 .extend/s 16, L_0x74d1ee440;
|
|
L_0x74ce840a0 .arith/mult 16, L_0x74ce83f20, L_0x74ce84000;
|
|
L_0x74d1ee260 .part L_0x74ce840a0, 15, 1;
|
|
L_0x74d1ee300 .repeat 16, 16, L_0x74d1ee260;
|
|
L_0x74ce84140 .concat [ 16 16 0 0], L_0x74ce840a0, L_0x74d1ee300;
|
|
L_0x74d1e61c0 .arith/sum 32, L_0x74c879b58, L_0x74ce84140;
|
|
S_0x74ce58d80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce508c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce58f00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce58d80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6640 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6680 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c66c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce5d720_0 .net/s *"_ivl_0", 15 0, L_0x74ce841e0; 1 drivers
|
|
v0x74ce5d7c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce84280; 1 drivers
|
|
v0x74ce5d860_0 .net *"_ivl_7", 0 0, L_0x74d1ee4e0; 1 drivers
|
|
v0x74ce5d900_0 .net *"_ivl_9", 15 0, L_0x74d1ee580; 1 drivers
|
|
L_0x74c879ba0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5d9a0_0 .net/s "acc_in", 31 0, L_0x74c879ba0; 1 drivers
|
|
v0x74ce5da40_0 .net/s "acc_out", 31 0, L_0x74d1e6260; alias, 1 drivers
|
|
v0x74ce5dae0_0 .net/s "product", 15 0, L_0x74ce84320; 1 drivers
|
|
v0x74ce5db80_0 .net/s "product_ext", 31 0, L_0x74ce843c0; 1 drivers
|
|
v0x74ce5dc20_0 .net/s "w", 7 0, L_0x74d1ee6c0; 1 drivers
|
|
v0x74ce5dcc0_0 .net/s "x", 7 0, L_0x74d1ee620; 1 drivers
|
|
L_0x74ce841e0 .extend/s 16, L_0x74d1ee620;
|
|
L_0x74ce84280 .extend/s 16, L_0x74d1ee6c0;
|
|
L_0x74ce84320 .arith/mult 16, L_0x74ce841e0, L_0x74ce84280;
|
|
L_0x74d1ee4e0 .part L_0x74ce84320, 15, 1;
|
|
L_0x74d1ee580 .repeat 16, 16, L_0x74d1ee4e0;
|
|
L_0x74ce843c0 .concat [ 16 16 0 0], L_0x74ce84320, L_0x74d1ee580;
|
|
L_0x74d1e6260 .arith/sum 32, L_0x74c879ba0, L_0x74ce843c0;
|
|
S_0x74ce59080 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50900 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce59200 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce59080;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6700 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6740 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6780 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce5dd60_0 .net/s *"_ivl_0", 15 0, L_0x74ce84460; 1 drivers
|
|
v0x74ce5de00_0 .net/s *"_ivl_2", 15 0, L_0x74ce84500; 1 drivers
|
|
v0x74ce5dea0_0 .net *"_ivl_7", 0 0, L_0x74d1ee760; 1 drivers
|
|
v0x74ce5df40_0 .net *"_ivl_9", 15 0, L_0x74d1ee800; 1 drivers
|
|
L_0x74c879be8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5dfe0_0 .net/s "acc_in", 31 0, L_0x74c879be8; 1 drivers
|
|
v0x74ce5e080_0 .net/s "acc_out", 31 0, L_0x74d1e6300; alias, 1 drivers
|
|
v0x74ce5e120_0 .net/s "product", 15 0, L_0x74ce845a0; 1 drivers
|
|
v0x74ce5e1c0_0 .net/s "product_ext", 31 0, L_0x74ce84640; 1 drivers
|
|
v0x74ce5e260_0 .net/s "w", 7 0, L_0x74d1ee940; 1 drivers
|
|
v0x74ce5e300_0 .net/s "x", 7 0, L_0x74d1ee8a0; 1 drivers
|
|
L_0x74ce84460 .extend/s 16, L_0x74d1ee8a0;
|
|
L_0x74ce84500 .extend/s 16, L_0x74d1ee940;
|
|
L_0x74ce845a0 .arith/mult 16, L_0x74ce84460, L_0x74ce84500;
|
|
L_0x74d1ee760 .part L_0x74ce845a0, 15, 1;
|
|
L_0x74d1ee800 .repeat 16, 16, L_0x74d1ee760;
|
|
L_0x74ce84640 .concat [ 16 16 0 0], L_0x74ce845a0, L_0x74d1ee800;
|
|
L_0x74d1e6300 .arith/sum 32, L_0x74c879be8, L_0x74ce84640;
|
|
S_0x74ce59380 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50800 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc476b0 .functor BUFZ 32, L_0x74d1e5ea0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59500 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50940 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc47720 .functor BUFZ 32, L_0x74d1e5f40, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59680 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50980 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc47790 .functor BUFZ 32, L_0x74d1e5fe0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59800 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce509c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc47800 .functor BUFZ 32, L_0x74d1e6080, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59980 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50a00 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc47870 .functor BUFZ 32, L_0x74d1e6120, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59b00 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50a40 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc478e0 .functor BUFZ 32, L_0x74d1e61c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59c80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50a80 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc47950 .functor BUFZ 32, L_0x74d1e6260, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59e00 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50ac0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc479c0 .functor BUFZ 32, L_0x74d1e6300, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce59f80 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50b00 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce5a100 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce59f80;
|
|
.timescale 0 0;
|
|
P_0x74ce50b40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e63a0 .arith/sum 32, L_0x74cc476b0, L_0x74cc47720;
|
|
S_0x74ce5a280 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce59f80;
|
|
.timescale 0 0;
|
|
P_0x74ce50b80 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e6440 .arith/sum 32, L_0x74cc47790, L_0x74cc47800;
|
|
S_0x74ce5a400 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce59f80;
|
|
.timescale 0 0;
|
|
P_0x74ce50bc0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d1e64e0 .arith/sum 32, L_0x74cc47870, L_0x74cc478e0;
|
|
S_0x74ce5a580 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce59f80;
|
|
.timescale 0 0;
|
|
P_0x74ce50c00 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d1e6580 .arith/sum 32, L_0x74cc47950, L_0x74cc479c0;
|
|
S_0x74ce5a700 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50c40 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce5a880 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce5a700;
|
|
.timescale 0 0;
|
|
P_0x74ce50c80 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e6620 .arith/sum 32, L_0x74d1e63a0, L_0x74d1e6440;
|
|
S_0x74ce5aa00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce5a700;
|
|
.timescale 0 0;
|
|
P_0x74ce50cc0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e66c0 .arith/sum 32, L_0x74d1e64e0, L_0x74d1e6580;
|
|
S_0x74ce5ab80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce4f900;
|
|
.timescale 0 0;
|
|
P_0x74ce50d00 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce5ad00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce5ab80;
|
|
.timescale 0 0;
|
|
P_0x74ce50d40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e6760 .arith/sum 32, L_0x74d1e6620, L_0x74d1e66c0;
|
|
S_0x74ce5ae80 .scope generate, "GEN_NEURON[6]" "GEN_NEURON[6]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74ce50dc0 .param/l "n" 1 12 34, +C4<0110>;
|
|
S_0x74ce5b000 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce5ae80;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a77f20 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a77f60 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a77fa0 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a77fe0 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a78020 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a78060 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce6b020_0 .net *"_ivl_0", 31 0, L_0x74ce84780; 1 drivers
|
|
v0x74ce6b0c0_0 .net *"_ivl_11", 31 0, L_0x74ce848c0; 1 drivers
|
|
v0x74ce6b160_0 .net *"_ivl_14", 31 0, L_0x74ce84960; 1 drivers
|
|
L_0x74c879d08 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6b200_0 .net *"_ivl_17", 29 0, L_0x74c879d08; 1 drivers
|
|
L_0x74c879d50 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6b2a0_0 .net/2u *"_ivl_18", 31 0, L_0x74c879d50; 1 drivers
|
|
v0x74ce6b340_0 .net *"_ivl_21", 31 0, L_0x74ce84a00; 1 drivers
|
|
L_0x74c879d98 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6b3e0_0 .net/2u *"_ivl_22", 31 0, L_0x74c879d98; 1 drivers
|
|
v0x74ce6b480_0 .net *"_ivl_25", 31 0, L_0x74ce84aa0; 1 drivers
|
|
v0x74ce6b520_0 .net *"_ivl_29", 0 0, L_0x74d1f8320; 1 drivers
|
|
L_0x74c879c30 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6b5c0_0 .net *"_ivl_3", 29 0, L_0x74c879c30; 1 drivers
|
|
v0x74ce6b660_0 .net *"_ivl_31", 23 0, L_0x74d1f83c0; 1 drivers
|
|
L_0x74c879c78 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6b700_0 .net/2u *"_ivl_4", 31 0, L_0x74c879c78; 1 drivers
|
|
v0x74ce6b7a0_0 .net *"_ivl_7", 31 0, L_0x74ce84820; 1 drivers
|
|
L_0x74c879cc0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6b840_0 .net/2u *"_ivl_8", 31 0, L_0x74c879cc0; 1 drivers
|
|
v0x74ce6b8e0_0 .var/s "acc", 31 0;
|
|
v0x74ce6b980_0 .net/s "acc_next", 31 0, L_0x74d1e72a0; 1 drivers
|
|
v0x74ce6ba20_0 .net/s "bias", 7 0, L_0x74d1f8500; 1 drivers
|
|
v0x74ce6bac0_0 .net/s "bias_ext", 31 0, L_0x74ce85f40; 1 drivers
|
|
v0x74ce6bb60_0 .var "busy", 0 0;
|
|
v0x74ce6bc00_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce6bca0_0 .var "done", 0 0;
|
|
v0x74ce6bd40_0 .net/s "final_acc", 31 0, L_0x74d1e7340; 1 drivers
|
|
v0x74ce6bde0_0 .var "group_index", 1 0;
|
|
v0x74ce6be80_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce6bf20_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce70000_0 .net/s "w_bus", 255 0, L_0x74d1f8460; 1 drivers
|
|
v0x74ce700a0_0 .net/s "w_group", 63 0, L_0x74d1eeda0; 1 drivers
|
|
v0x74ce70140_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce701e0_0 .net/s "x_group", 63 0, L_0x74d1eed00; 1 drivers
|
|
v0x74ce70280_0 .var/s "y", 7 0;
|
|
L_0x74ce84780 .concat [ 2 30 0 0], v0x74ce6bde0_0, L_0x74c879c30;
|
|
L_0x74ce84820 .arith/mult 32, L_0x74ce84780, L_0x74c879c78;
|
|
L_0x74ce848c0 .arith/mult 32, L_0x74ce84820, L_0x74c879cc0;
|
|
L_0x74d1eed00 .part/v v0x74ce79860_0, L_0x74ce848c0, 64;
|
|
L_0x74ce84960 .concat [ 2 30 0 0], v0x74ce6bde0_0, L_0x74c879d08;
|
|
L_0x74ce84a00 .arith/mult 32, L_0x74ce84960, L_0x74c879d50;
|
|
L_0x74ce84aa0 .arith/mult 32, L_0x74ce84a00, L_0x74c879d98;
|
|
L_0x74d1eeda0 .part/v L_0x74d1f8460, L_0x74ce84aa0, 64;
|
|
L_0x74d1f8320 .part L_0x74d1f8500, 7, 1;
|
|
L_0x74d1f83c0 .repeat 24, 24, L_0x74d1f8320;
|
|
L_0x74ce85f40 .concat [ 8 24 0 0], L_0x74d1f8500, L_0x74d1f83c0;
|
|
L_0x74d1e7340 .arith/sum 32, L_0x74d1e72a0, L_0x74ce85f40;
|
|
S_0x74ce5b180 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce5b000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c1800 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c1840 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c1880 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c18c0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce6ac60_0 .net/s "acc_in", 31 0, v0x74ce6b8e0_0; 1 drivers
|
|
v0x74ce6ad00_0 .net/s "acc_out", 31 0, L_0x74d1e72a0; alias, 1 drivers
|
|
v0x74ce6ada0 .array "products", 7 0;
|
|
v0x74ce6ada0_0 .net/s v0x74ce6ada0 0, 31 0, L_0x74d1e6940; 1 drivers
|
|
v0x74ce6ada0_1 .net/s v0x74ce6ada0 1, 31 0, L_0x74d1e69e0; 1 drivers
|
|
v0x74ce6ada0_2 .net/s v0x74ce6ada0 2, 31 0, L_0x74d1e6a80; 1 drivers
|
|
v0x74ce6ada0_3 .net/s v0x74ce6ada0 3, 31 0, L_0x74d1e6b20; 1 drivers
|
|
v0x74ce6ada0_4 .net/s v0x74ce6ada0 4, 31 0, L_0x74d1e6bc0; 1 drivers
|
|
v0x74ce6ada0_5 .net/s v0x74ce6ada0 5, 31 0, L_0x74d1e6c60; 1 drivers
|
|
v0x74ce6ada0_6 .net/s v0x74ce6ada0 6, 31 0, L_0x74d1e6d00; 1 drivers
|
|
v0x74ce6ada0_7 .net/s v0x74ce6ada0 7, 31 0, L_0x74d1e6da0; 1 drivers
|
|
v0x74ce6ae40 .array "tree", 31 0;
|
|
v0x74ce6ae40_0 .net/s v0x74ce6ae40 0, 31 0, L_0x74cc47a30; 1 drivers
|
|
v0x74ce6ae40_1 .net/s v0x74ce6ae40 1, 31 0, L_0x74cc47aa0; 1 drivers
|
|
v0x74ce6ae40_2 .net/s v0x74ce6ae40 2, 31 0, L_0x74cc47b10; 1 drivers
|
|
v0x74ce6ae40_3 .net/s v0x74ce6ae40 3, 31 0, L_0x74cc47b80; 1 drivers
|
|
v0x74ce6ae40_4 .net/s v0x74ce6ae40 4, 31 0, L_0x74cc47bf0; 1 drivers
|
|
v0x74ce6ae40_5 .net/s v0x74ce6ae40 5, 31 0, L_0x74cc47c60; 1 drivers
|
|
v0x74ce6ae40_6 .net/s v0x74ce6ae40 6, 31 0, L_0x74cc47cd0; 1 drivers
|
|
v0x74ce6ae40_7 .net/s v0x74ce6ae40 7, 31 0, L_0x74cc47d40; 1 drivers
|
|
v0x74ce6ae40_8 .net/s v0x74ce6ae40 8, 31 0, L_0x74d1e6e40; 1 drivers
|
|
v0x74ce6ae40_9 .net/s v0x74ce6ae40 9, 31 0, L_0x74d1e6ee0; 1 drivers
|
|
v0x74ce6ae40_10 .net/s v0x74ce6ae40 10, 31 0, L_0x74d1e6f80; 1 drivers
|
|
v0x74ce6ae40_11 .net/s v0x74ce6ae40 11, 31 0, L_0x74d1e7020; 1 drivers
|
|
o0x74c858170 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_12 .net/s v0x74ce6ae40 12, 31 0, o0x74c858170; 0 drivers
|
|
o0x74c8581a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_13 .net/s v0x74ce6ae40 13, 31 0, o0x74c8581a0; 0 drivers
|
|
o0x74c8581d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_14 .net/s v0x74ce6ae40 14, 31 0, o0x74c8581d0; 0 drivers
|
|
o0x74c858200 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_15 .net/s v0x74ce6ae40 15, 31 0, o0x74c858200; 0 drivers
|
|
v0x74ce6ae40_16 .net/s v0x74ce6ae40 16, 31 0, L_0x74d1e70c0; 1 drivers
|
|
v0x74ce6ae40_17 .net/s v0x74ce6ae40 17, 31 0, L_0x74d1e7160; 1 drivers
|
|
o0x74c858290 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_18 .net/s v0x74ce6ae40 18, 31 0, o0x74c858290; 0 drivers
|
|
o0x74c8582c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_19 .net/s v0x74ce6ae40 19, 31 0, o0x74c8582c0; 0 drivers
|
|
o0x74c8582f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_20 .net/s v0x74ce6ae40 20, 31 0, o0x74c8582f0; 0 drivers
|
|
o0x74c858320 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_21 .net/s v0x74ce6ae40 21, 31 0, o0x74c858320; 0 drivers
|
|
o0x74c858350 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_22 .net/s v0x74ce6ae40 22, 31 0, o0x74c858350; 0 drivers
|
|
o0x74c858380 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_23 .net/s v0x74ce6ae40 23, 31 0, o0x74c858380; 0 drivers
|
|
v0x74ce6ae40_24 .net/s v0x74ce6ae40 24, 31 0, L_0x74d1e7200; 1 drivers
|
|
o0x74c8583e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_25 .net/s v0x74ce6ae40 25, 31 0, o0x74c8583e0; 0 drivers
|
|
o0x74c858410 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_26 .net/s v0x74ce6ae40 26, 31 0, o0x74c858410; 0 drivers
|
|
o0x74c858440 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_27 .net/s v0x74ce6ae40 27, 31 0, o0x74c858440; 0 drivers
|
|
o0x74c858470 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_28 .net/s v0x74ce6ae40 28, 31 0, o0x74c858470; 0 drivers
|
|
o0x74c8584a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_29 .net/s v0x74ce6ae40 29, 31 0, o0x74c8584a0; 0 drivers
|
|
o0x74c8584d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_30 .net/s v0x74ce6ae40 30, 31 0, o0x74c8584d0; 0 drivers
|
|
o0x74c858500 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce6ae40_31 .net/s v0x74ce6ae40 31, 31 0, o0x74c858500; 0 drivers
|
|
v0x74ce6aee0_0 .net/s "w_bus", 63 0, L_0x74d1eeda0; alias, 1 drivers
|
|
v0x74ce6af80_0 .net/s "x_bus", 63 0, L_0x74d1eed00; alias, 1 drivers
|
|
L_0x74d1eef80 .part L_0x74d1eed00, 0, 8;
|
|
L_0x74d1ef020 .part L_0x74d1eeda0, 0, 8;
|
|
L_0x74d1ef200 .part L_0x74d1eed00, 8, 8;
|
|
L_0x74d1ef2a0 .part L_0x74d1eeda0, 8, 8;
|
|
L_0x74d1ef480 .part L_0x74d1eed00, 16, 8;
|
|
L_0x74d1ef520 .part L_0x74d1eeda0, 16, 8;
|
|
L_0x74d1ef700 .part L_0x74d1eed00, 24, 8;
|
|
L_0x74d1ef7a0 .part L_0x74d1eeda0, 24, 8;
|
|
L_0x74d1ef980 .part L_0x74d1eed00, 32, 8;
|
|
L_0x74d1efa20 .part L_0x74d1eeda0, 32, 8;
|
|
L_0x74d1efc00 .part L_0x74d1eed00, 40, 8;
|
|
L_0x74d1efca0 .part L_0x74d1eeda0, 40, 8;
|
|
L_0x74d1efe80 .part L_0x74d1eed00, 48, 8;
|
|
L_0x74d1eff20 .part L_0x74d1eeda0, 48, 8;
|
|
L_0x74d1f8140 .part L_0x74d1eed00, 56, 8;
|
|
L_0x74d1f81e0 .part L_0x74d1eeda0, 56, 8;
|
|
L_0x74d1e72a0 .arith/sum 32, v0x74ce6b8e0_0, L_0x74d1e7200;
|
|
S_0x74ce5b300 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50e00 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce5b480 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce5b300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c67c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6800 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6840 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce5fa20_0 .net/s *"_ivl_0", 15 0, L_0x74ce84b40; 1 drivers
|
|
v0x74ce5fac0_0 .net/s *"_ivl_2", 15 0, L_0x74ce84be0; 1 drivers
|
|
v0x74ce5fb60_0 .net *"_ivl_7", 0 0, L_0x74d1eee40; 1 drivers
|
|
v0x74ce5fc00_0 .net *"_ivl_9", 15 0, L_0x74d1eeee0; 1 drivers
|
|
L_0x74c879de0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce5fca0_0 .net/s "acc_in", 31 0, L_0x74c879de0; 1 drivers
|
|
v0x74ce5fd40_0 .net/s "acc_out", 31 0, L_0x74d1e6940; alias, 1 drivers
|
|
v0x74ce5fde0_0 .net/s "product", 15 0, L_0x74ce84c80; 1 drivers
|
|
v0x74ce5fe80_0 .net/s "product_ext", 31 0, L_0x74ce84d20; 1 drivers
|
|
v0x74ce5ff20_0 .net/s "w", 7 0, L_0x74d1ef020; 1 drivers
|
|
v0x74ce68000_0 .net/s "x", 7 0, L_0x74d1eef80; 1 drivers
|
|
L_0x74ce84b40 .extend/s 16, L_0x74d1eef80;
|
|
L_0x74ce84be0 .extend/s 16, L_0x74d1ef020;
|
|
L_0x74ce84c80 .arith/mult 16, L_0x74ce84b40, L_0x74ce84be0;
|
|
L_0x74d1eee40 .part L_0x74ce84c80, 15, 1;
|
|
L_0x74d1eeee0 .repeat 16, 16, L_0x74d1eee40;
|
|
L_0x74ce84d20 .concat [ 16 16 0 0], L_0x74ce84c80, L_0x74d1eeee0;
|
|
L_0x74d1e6940 .arith/sum 32, L_0x74c879de0, L_0x74ce84d20;
|
|
S_0x74ce5b600 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50e40 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce5b780 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce5b600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6880 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c68c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6900 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce680a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce84dc0; 1 drivers
|
|
v0x74ce68140_0 .net/s *"_ivl_2", 15 0, L_0x74ce84e60; 1 drivers
|
|
v0x74ce681e0_0 .net *"_ivl_7", 0 0, L_0x74d1ef0c0; 1 drivers
|
|
v0x74ce68280_0 .net *"_ivl_9", 15 0, L_0x74d1ef160; 1 drivers
|
|
L_0x74c879e28 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce68320_0 .net/s "acc_in", 31 0, L_0x74c879e28; 1 drivers
|
|
v0x74ce683c0_0 .net/s "acc_out", 31 0, L_0x74d1e69e0; alias, 1 drivers
|
|
v0x74ce68460_0 .net/s "product", 15 0, L_0x74ce84f00; 1 drivers
|
|
v0x74ce68500_0 .net/s "product_ext", 31 0, L_0x74ce84fa0; 1 drivers
|
|
v0x74ce685a0_0 .net/s "w", 7 0, L_0x74d1ef2a0; 1 drivers
|
|
v0x74ce68640_0 .net/s "x", 7 0, L_0x74d1ef200; 1 drivers
|
|
L_0x74ce84dc0 .extend/s 16, L_0x74d1ef200;
|
|
L_0x74ce84e60 .extend/s 16, L_0x74d1ef2a0;
|
|
L_0x74ce84f00 .arith/mult 16, L_0x74ce84dc0, L_0x74ce84e60;
|
|
L_0x74d1ef0c0 .part L_0x74ce84f00, 15, 1;
|
|
L_0x74d1ef160 .repeat 16, 16, L_0x74d1ef0c0;
|
|
L_0x74ce84fa0 .concat [ 16 16 0 0], L_0x74ce84f00, L_0x74d1ef160;
|
|
L_0x74d1e69e0 .arith/sum 32, L_0x74c879e28, L_0x74ce84fa0;
|
|
S_0x74ce5b900 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50e80 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce5ba80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce5b900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6940 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6980 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c69c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce686e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce85040; 1 drivers
|
|
v0x74ce68780_0 .net/s *"_ivl_2", 15 0, L_0x74ce850e0; 1 drivers
|
|
v0x74ce68820_0 .net *"_ivl_7", 0 0, L_0x74d1ef340; 1 drivers
|
|
v0x74ce688c0_0 .net *"_ivl_9", 15 0, L_0x74d1ef3e0; 1 drivers
|
|
L_0x74c879e70 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce68960_0 .net/s "acc_in", 31 0, L_0x74c879e70; 1 drivers
|
|
v0x74ce68a00_0 .net/s "acc_out", 31 0, L_0x74d1e6a80; alias, 1 drivers
|
|
v0x74ce68aa0_0 .net/s "product", 15 0, L_0x74ce85180; 1 drivers
|
|
v0x74ce68b40_0 .net/s "product_ext", 31 0, L_0x74ce85220; 1 drivers
|
|
v0x74ce68be0_0 .net/s "w", 7 0, L_0x74d1ef520; 1 drivers
|
|
v0x74ce68c80_0 .net/s "x", 7 0, L_0x74d1ef480; 1 drivers
|
|
L_0x74ce85040 .extend/s 16, L_0x74d1ef480;
|
|
L_0x74ce850e0 .extend/s 16, L_0x74d1ef520;
|
|
L_0x74ce85180 .arith/mult 16, L_0x74ce85040, L_0x74ce850e0;
|
|
L_0x74d1ef340 .part L_0x74ce85180, 15, 1;
|
|
L_0x74d1ef3e0 .repeat 16, 16, L_0x74d1ef340;
|
|
L_0x74ce85220 .concat [ 16 16 0 0], L_0x74ce85180, L_0x74d1ef3e0;
|
|
L_0x74d1e6a80 .arith/sum 32, L_0x74c879e70, L_0x74ce85220;
|
|
S_0x74ce5bc00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50ec0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce5bd80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce5bc00;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6a00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6a40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6a80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce68d20_0 .net/s *"_ivl_0", 15 0, L_0x74ce852c0; 1 drivers
|
|
v0x74ce68dc0_0 .net/s *"_ivl_2", 15 0, L_0x74ce85360; 1 drivers
|
|
v0x74ce68e60_0 .net *"_ivl_7", 0 0, L_0x74d1ef5c0; 1 drivers
|
|
v0x74ce68f00_0 .net *"_ivl_9", 15 0, L_0x74d1ef660; 1 drivers
|
|
L_0x74c879eb8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce68fa0_0 .net/s "acc_in", 31 0, L_0x74c879eb8; 1 drivers
|
|
v0x74ce69040_0 .net/s "acc_out", 31 0, L_0x74d1e6b20; alias, 1 drivers
|
|
v0x74ce690e0_0 .net/s "product", 15 0, L_0x74ce85400; 1 drivers
|
|
v0x74ce69180_0 .net/s "product_ext", 31 0, L_0x74ce854a0; 1 drivers
|
|
v0x74ce69220_0 .net/s "w", 7 0, L_0x74d1ef7a0; 1 drivers
|
|
v0x74ce692c0_0 .net/s "x", 7 0, L_0x74d1ef700; 1 drivers
|
|
L_0x74ce852c0 .extend/s 16, L_0x74d1ef700;
|
|
L_0x74ce85360 .extend/s 16, L_0x74d1ef7a0;
|
|
L_0x74ce85400 .arith/mult 16, L_0x74ce852c0, L_0x74ce85360;
|
|
L_0x74d1ef5c0 .part L_0x74ce85400, 15, 1;
|
|
L_0x74d1ef660 .repeat 16, 16, L_0x74d1ef5c0;
|
|
L_0x74ce854a0 .concat [ 16 16 0 0], L_0x74ce85400, L_0x74d1ef660;
|
|
L_0x74d1e6b20 .arith/sum 32, L_0x74c879eb8, L_0x74ce854a0;
|
|
S_0x74ce6c000 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50f40 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce6c180 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6c000;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6ac0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6b00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6b40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce69360_0 .net/s *"_ivl_0", 15 0, L_0x74ce85540; 1 drivers
|
|
v0x74ce69400_0 .net/s *"_ivl_2", 15 0, L_0x74ce855e0; 1 drivers
|
|
v0x74ce694a0_0 .net *"_ivl_7", 0 0, L_0x74d1ef840; 1 drivers
|
|
v0x74ce69540_0 .net *"_ivl_9", 15 0, L_0x74d1ef8e0; 1 drivers
|
|
L_0x74c879f00 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce695e0_0 .net/s "acc_in", 31 0, L_0x74c879f00; 1 drivers
|
|
v0x74ce69680_0 .net/s "acc_out", 31 0, L_0x74d1e6bc0; alias, 1 drivers
|
|
v0x74ce69720_0 .net/s "product", 15 0, L_0x74ce85680; 1 drivers
|
|
v0x74ce697c0_0 .net/s "product_ext", 31 0, L_0x74ce85720; 1 drivers
|
|
v0x74ce69860_0 .net/s "w", 7 0, L_0x74d1efa20; 1 drivers
|
|
v0x74ce69900_0 .net/s "x", 7 0, L_0x74d1ef980; 1 drivers
|
|
L_0x74ce85540 .extend/s 16, L_0x74d1ef980;
|
|
L_0x74ce855e0 .extend/s 16, L_0x74d1efa20;
|
|
L_0x74ce85680 .arith/mult 16, L_0x74ce85540, L_0x74ce855e0;
|
|
L_0x74d1ef840 .part L_0x74ce85680, 15, 1;
|
|
L_0x74d1ef8e0 .repeat 16, 16, L_0x74d1ef840;
|
|
L_0x74ce85720 .concat [ 16 16 0 0], L_0x74ce85680, L_0x74d1ef8e0;
|
|
L_0x74d1e6bc0 .arith/sum 32, L_0x74c879f00, L_0x74ce85720;
|
|
S_0x74ce6c300 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50f80 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce6c480 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6c300;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6b80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6bc0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6c00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce699a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce857c0; 1 drivers
|
|
v0x74ce69a40_0 .net/s *"_ivl_2", 15 0, L_0x74ce85860; 1 drivers
|
|
v0x74ce69ae0_0 .net *"_ivl_7", 0 0, L_0x74d1efac0; 1 drivers
|
|
v0x74ce69b80_0 .net *"_ivl_9", 15 0, L_0x74d1efb60; 1 drivers
|
|
L_0x74c879f48 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce69c20_0 .net/s "acc_in", 31 0, L_0x74c879f48; 1 drivers
|
|
v0x74ce69cc0_0 .net/s "acc_out", 31 0, L_0x74d1e6c60; alias, 1 drivers
|
|
v0x74ce69d60_0 .net/s "product", 15 0, L_0x74ce85900; 1 drivers
|
|
v0x74ce69e00_0 .net/s "product_ext", 31 0, L_0x74ce859a0; 1 drivers
|
|
v0x74ce69ea0_0 .net/s "w", 7 0, L_0x74d1efca0; 1 drivers
|
|
v0x74ce69f40_0 .net/s "x", 7 0, L_0x74d1efc00; 1 drivers
|
|
L_0x74ce857c0 .extend/s 16, L_0x74d1efc00;
|
|
L_0x74ce85860 .extend/s 16, L_0x74d1efca0;
|
|
L_0x74ce85900 .arith/mult 16, L_0x74ce857c0, L_0x74ce85860;
|
|
L_0x74d1efac0 .part L_0x74ce85900, 15, 1;
|
|
L_0x74d1efb60 .repeat 16, 16, L_0x74d1efac0;
|
|
L_0x74ce859a0 .concat [ 16 16 0 0], L_0x74ce85900, L_0x74d1efb60;
|
|
L_0x74d1e6c60 .arith/sum 32, L_0x74c879f48, L_0x74ce859a0;
|
|
S_0x74ce6c600 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50fc0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce6c780 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6c600;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6c40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6c80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6cc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce69fe0_0 .net/s *"_ivl_0", 15 0, L_0x74ce85a40; 1 drivers
|
|
v0x74ce6a080_0 .net/s *"_ivl_2", 15 0, L_0x74ce85ae0; 1 drivers
|
|
v0x74ce6a120_0 .net *"_ivl_7", 0 0, L_0x74d1efd40; 1 drivers
|
|
v0x74ce6a1c0_0 .net *"_ivl_9", 15 0, L_0x74d1efde0; 1 drivers
|
|
L_0x74c879f90 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6a260_0 .net/s "acc_in", 31 0, L_0x74c879f90; 1 drivers
|
|
v0x74ce6a300_0 .net/s "acc_out", 31 0, L_0x74d1e6d00; alias, 1 drivers
|
|
v0x74ce6a3a0_0 .net/s "product", 15 0, L_0x74ce85b80; 1 drivers
|
|
v0x74ce6a440_0 .net/s "product_ext", 31 0, L_0x74ce85c20; 1 drivers
|
|
v0x74ce6a4e0_0 .net/s "w", 7 0, L_0x74d1eff20; 1 drivers
|
|
v0x74ce6a580_0 .net/s "x", 7 0, L_0x74d1efe80; 1 drivers
|
|
L_0x74ce85a40 .extend/s 16, L_0x74d1efe80;
|
|
L_0x74ce85ae0 .extend/s 16, L_0x74d1eff20;
|
|
L_0x74ce85b80 .arith/mult 16, L_0x74ce85a40, L_0x74ce85ae0;
|
|
L_0x74d1efd40 .part L_0x74ce85b80, 15, 1;
|
|
L_0x74d1efde0 .repeat 16, 16, L_0x74d1efd40;
|
|
L_0x74ce85c20 .concat [ 16 16 0 0], L_0x74ce85b80, L_0x74d1efde0;
|
|
L_0x74d1e6d00 .arith/sum 32, L_0x74c879f90, L_0x74ce85c20;
|
|
S_0x74ce6c900 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51000 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce6ca80 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6c900;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6d00 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6d40 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6d80 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce6a620_0 .net/s *"_ivl_0", 15 0, L_0x74ce85cc0; 1 drivers
|
|
v0x74ce6a6c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce85d60; 1 drivers
|
|
v0x74ce6a760_0 .net *"_ivl_7", 0 0, L_0x74d1f8000; 1 drivers
|
|
v0x74ce6a800_0 .net *"_ivl_9", 15 0, L_0x74d1f80a0; 1 drivers
|
|
L_0x74c879fd8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce6a8a0_0 .net/s "acc_in", 31 0, L_0x74c879fd8; 1 drivers
|
|
v0x74ce6a940_0 .net/s "acc_out", 31 0, L_0x74d1e6da0; alias, 1 drivers
|
|
v0x74ce6a9e0_0 .net/s "product", 15 0, L_0x74ce85e00; 1 drivers
|
|
v0x74ce6aa80_0 .net/s "product_ext", 31 0, L_0x74ce85ea0; 1 drivers
|
|
v0x74ce6ab20_0 .net/s "w", 7 0, L_0x74d1f81e0; 1 drivers
|
|
v0x74ce6abc0_0 .net/s "x", 7 0, L_0x74d1f8140; 1 drivers
|
|
L_0x74ce85cc0 .extend/s 16, L_0x74d1f8140;
|
|
L_0x74ce85d60 .extend/s 16, L_0x74d1f81e0;
|
|
L_0x74ce85e00 .arith/mult 16, L_0x74ce85cc0, L_0x74ce85d60;
|
|
L_0x74d1f8000 .part L_0x74ce85e00, 15, 1;
|
|
L_0x74d1f80a0 .repeat 16, 16, L_0x74d1f8000;
|
|
L_0x74ce85ea0 .concat [ 16 16 0 0], L_0x74ce85e00, L_0x74d1f80a0;
|
|
L_0x74d1e6da0 .arith/sum 32, L_0x74c879fd8, L_0x74ce85ea0;
|
|
S_0x74ce6cc00 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce50f00 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc47a30 .functor BUFZ 32, L_0x74d1e6940, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6cd80 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51040 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc47aa0 .functor BUFZ 32, L_0x74d1e69e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6cf00 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51080 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc47b10 .functor BUFZ 32, L_0x74d1e6a80, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6d080 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce510c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc47b80 .functor BUFZ 32, L_0x74d1e6b20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6d200 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51100 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc47bf0 .functor BUFZ 32, L_0x74d1e6bc0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6d380 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51140 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74cc47c60 .functor BUFZ 32, L_0x74d1e6c60, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6d500 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51180 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74cc47cd0 .functor BUFZ 32, L_0x74d1e6d00, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6d680 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce511c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74cc47d40 .functor BUFZ 32, L_0x74d1e6da0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce6d800 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51200 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce6d980 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce6d800;
|
|
.timescale 0 0;
|
|
P_0x74ce51240 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e6e40 .arith/sum 32, L_0x74cc47a30, L_0x74cc47aa0;
|
|
S_0x74ce6db00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce6d800;
|
|
.timescale 0 0;
|
|
P_0x74ce51280 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e6ee0 .arith/sum 32, L_0x74cc47b10, L_0x74cc47b80;
|
|
S_0x74ce6dc80 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce6d800;
|
|
.timescale 0 0;
|
|
P_0x74ce512c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d1e6f80 .arith/sum 32, L_0x74cc47bf0, L_0x74cc47c60;
|
|
S_0x74ce6de00 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce6d800;
|
|
.timescale 0 0;
|
|
P_0x74ce51300 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d1e7020 .arith/sum 32, L_0x74cc47cd0, L_0x74cc47d40;
|
|
S_0x74ce6df80 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51340 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce6e100 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce6df80;
|
|
.timescale 0 0;
|
|
P_0x74ce51380 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e70c0 .arith/sum 32, L_0x74d1e6e40, L_0x74d1e6ee0;
|
|
S_0x74ce6e280 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce6df80;
|
|
.timescale 0 0;
|
|
P_0x74ce513c0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e7160 .arith/sum 32, L_0x74d1e6f80, L_0x74d1e7020;
|
|
S_0x74ce6e400 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce5b180;
|
|
.timescale 0 0;
|
|
P_0x74ce51400 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce6e580 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce6e400;
|
|
.timescale 0 0;
|
|
P_0x74ce51440 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e7200 .arith/sum 32, L_0x74d1e70c0, L_0x74d1e7160;
|
|
S_0x74ce6e700 .scope generate, "GEN_NEURON[7]" "GEN_NEURON[7]" 12 34, 12 34 0, S_0x74ce21b00;
|
|
.timescale 0 0;
|
|
P_0x74ce514c0 .param/l "n" 1 12 34, +C4<0111>;
|
|
S_0x74ce6e880 .scope module, "u_neuron" "neuron_parallel" 12 41, 7 1 0, S_0x74ce6e700;
|
|
.timescale -9 -12;
|
|
.port_info 0 /INPUT 1 "clk";
|
|
.port_info 1 /INPUT 1 "rst";
|
|
.port_info 2 /INPUT 1 "start";
|
|
.port_info 3 /INPUT 256 "x_bus";
|
|
.port_info 4 /INPUT 256 "w_bus";
|
|
.port_info 5 /INPUT 8 "bias";
|
|
.port_info 6 /OUTPUT 8 "y";
|
|
.port_info 7 /OUTPUT 1 "busy";
|
|
.port_info 8 /OUTPUT 1 "done";
|
|
P_0x103a780a0 .param/l "ACC_WIDTH" 0 7 5, +C4<00000000000000000000000000100000>;
|
|
P_0x103a780e0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000001000>;
|
|
P_0x103a78120 .param/l "GROUPS" 1 7 49, +C4<00000000000000000000000000000100>;
|
|
P_0x103a78160 .param/l "GROUP_INDEX_WIDTH" 1 7 50, +C4<00000000000000000000000000000010>;
|
|
P_0x103a781a0 .param/l "N_INPUTS" 0 7 3, +C4<00000000000000000000000000100000>;
|
|
P_0x103a781e0 .param/l "PARALLEL" 0 7 4, +C4<00000000000000000000000000001000>;
|
|
v0x74ce738e0_0 .net *"_ivl_0", 31 0, L_0x74ce85fe0; 1 drivers
|
|
v0x74ce73980_0 .net *"_ivl_11", 31 0, L_0x74ce86120; 1 drivers
|
|
v0x74ce73a20_0 .net *"_ivl_14", 31 0, L_0x74ce861c0; 1 drivers
|
|
L_0x74c87a0f8 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce73ac0_0 .net *"_ivl_17", 29 0, L_0x74c87a0f8; 1 drivers
|
|
L_0x74c87a140 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce73b60_0 .net/2u *"_ivl_18", 31 0, L_0x74c87a140; 1 drivers
|
|
v0x74ce73c00_0 .net *"_ivl_21", 31 0, L_0x74ce86260; 1 drivers
|
|
L_0x74c87a188 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce73ca0_0 .net/2u *"_ivl_22", 31 0, L_0x74c87a188; 1 drivers
|
|
v0x74ce73d40_0 .net *"_ivl_25", 31 0, L_0x74ce86300; 1 drivers
|
|
v0x74ce73de0_0 .net *"_ivl_29", 0 0, L_0x74d1f9b80; 1 drivers
|
|
L_0x74c87a020 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce73e80_0 .net *"_ivl_3", 29 0, L_0x74c87a020; 1 drivers
|
|
v0x74ce73f20_0 .net *"_ivl_31", 23 0, L_0x74d1f9c20; 1 drivers
|
|
L_0x74c87a068 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce78000_0 .net/2u *"_ivl_4", 31 0, L_0x74c87a068; 1 drivers
|
|
v0x74ce780a0_0 .net *"_ivl_7", 31 0, L_0x74ce86080; 1 drivers
|
|
L_0x74c87a0b0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce78140_0 .net/2u *"_ivl_8", 31 0, L_0x74c87a0b0; 1 drivers
|
|
v0x74ce781e0_0 .var/s "acc", 31 0;
|
|
v0x74ce78280_0 .net/s "acc_next", 31 0, L_0x74d1e7d40; 1 drivers
|
|
v0x74ce78320_0 .net/s "bias", 7 0, L_0x74d1f9d60; 1 drivers
|
|
v0x74ce783c0_0 .net/s "bias_ext", 31 0, L_0x74ce877a0; 1 drivers
|
|
v0x74ce78460_0 .var "busy", 0 0;
|
|
v0x74ce78500_0 .net "clk", 0 0, v0x74ce79400_0; alias, 1 drivers
|
|
v0x74ce785a0_0 .var "done", 0 0;
|
|
v0x74ce78640_0 .net/s "final_acc", 31 0, L_0x74d1e7de0; 1 drivers
|
|
v0x74ce786e0_0 .var "group_index", 1 0;
|
|
v0x74ce78780_0 .net "rst", 0 0, v0x74ce79680_0; alias, 1 drivers
|
|
v0x74ce78820_0 .net "start", 0 0, v0x74ce79720_0; alias, 1 drivers
|
|
v0x74ce788c0_0 .net/s "w_bus", 255 0, L_0x74d1f9cc0; 1 drivers
|
|
v0x74ce78960_0 .net/s "w_group", 63 0, L_0x74d1f8640; 1 drivers
|
|
v0x74ce78a00_0 .net/s "x_bus", 255 0, v0x74ce79860_0; alias, 1 drivers
|
|
v0x74ce78aa0_0 .net/s "x_group", 63 0, L_0x74d1f85a0; 1 drivers
|
|
v0x74ce78b40_0 .var/s "y", 7 0;
|
|
L_0x74ce85fe0 .concat [ 2 30 0 0], v0x74ce786e0_0, L_0x74c87a020;
|
|
L_0x74ce86080 .arith/mult 32, L_0x74ce85fe0, L_0x74c87a068;
|
|
L_0x74ce86120 .arith/mult 32, L_0x74ce86080, L_0x74c87a0b0;
|
|
L_0x74d1f85a0 .part/v v0x74ce79860_0, L_0x74ce86120, 64;
|
|
L_0x74ce861c0 .concat [ 2 30 0 0], v0x74ce786e0_0, L_0x74c87a0f8;
|
|
L_0x74ce86260 .arith/mult 32, L_0x74ce861c0, L_0x74c87a140;
|
|
L_0x74ce86300 .arith/mult 32, L_0x74ce86260, L_0x74c87a188;
|
|
L_0x74d1f8640 .part/v L_0x74d1f9cc0, L_0x74ce86300, 64;
|
|
L_0x74d1f9b80 .part L_0x74d1f9d60, 7, 1;
|
|
L_0x74d1f9c20 .repeat 24, 24, L_0x74d1f9b80;
|
|
L_0x74ce877a0 .concat [ 8 24 0 0], L_0x74d1f9d60, L_0x74d1f9c20;
|
|
L_0x74d1e7de0 .arith/sum 32, L_0x74d1e7d40, L_0x74ce877a0;
|
|
S_0x74ce6ea00 .scope module, "u_mac8" "mac8" 7 81, 8 1 0, S_0x74ce6e880;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 64 "x_bus";
|
|
.port_info 1 /INPUT 64 "w_bus";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c1b00 .param/l "ACC_WIDTH" 0 8 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c1b40 .param/l "DATA_WIDTH" 0 8 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c1b80 .param/l "PARALLEL" 0 8 4, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c1bc0 .param/l "TREE_LEVELS" 1 8 70, +C4<00000000000000000000000000000011>;
|
|
v0x74ce73520_0 .net/s "acc_in", 31 0, v0x74ce781e0_0; 1 drivers
|
|
v0x74ce735c0_0 .net/s "acc_out", 31 0, L_0x74d1e7d40; alias, 1 drivers
|
|
v0x74ce73660 .array "products", 7 0;
|
|
v0x74ce73660_0 .net/s v0x74ce73660 0, 31 0, L_0x74d1e73e0; 1 drivers
|
|
v0x74ce73660_1 .net/s v0x74ce73660 1, 31 0, L_0x74d1e7480; 1 drivers
|
|
v0x74ce73660_2 .net/s v0x74ce73660 2, 31 0, L_0x74d1e7520; 1 drivers
|
|
v0x74ce73660_3 .net/s v0x74ce73660 3, 31 0, L_0x74d1e75c0; 1 drivers
|
|
v0x74ce73660_4 .net/s v0x74ce73660 4, 31 0, L_0x74d1e7660; 1 drivers
|
|
v0x74ce73660_5 .net/s v0x74ce73660 5, 31 0, L_0x74d1e7700; 1 drivers
|
|
v0x74ce73660_6 .net/s v0x74ce73660 6, 31 0, L_0x74d1e77a0; 1 drivers
|
|
v0x74ce73660_7 .net/s v0x74ce73660 7, 31 0, L_0x74d1e7840; 1 drivers
|
|
v0x74ce73700 .array "tree", 31 0;
|
|
v0x74ce73700_0 .net/s v0x74ce73700 0, 31 0, L_0x74cc47db0; 1 drivers
|
|
v0x74ce73700_1 .net/s v0x74ce73700 1, 31 0, L_0x74cc47e20; 1 drivers
|
|
v0x74ce73700_2 .net/s v0x74ce73700 2, 31 0, L_0x74cc47e90; 1 drivers
|
|
v0x74ce73700_3 .net/s v0x74ce73700 3, 31 0, L_0x74cc47f00; 1 drivers
|
|
v0x74ce73700_4 .net/s v0x74ce73700 4, 31 0, L_0x74cc47f70; 1 drivers
|
|
v0x74ce73700_5 .net/s v0x74ce73700 5, 31 0, L_0x74ce88000; 1 drivers
|
|
v0x74ce73700_6 .net/s v0x74ce73700 6, 31 0, L_0x74ce8c000; 1 drivers
|
|
v0x74ce73700_7 .net/s v0x74ce73700 7, 31 0, L_0x74ce8c070; 1 drivers
|
|
v0x74ce73700_8 .net/s v0x74ce73700 8, 31 0, L_0x74d1e78e0; 1 drivers
|
|
v0x74ce73700_9 .net/s v0x74ce73700 9, 31 0, L_0x74d1e7980; 1 drivers
|
|
v0x74ce73700_10 .net/s v0x74ce73700 10, 31 0, L_0x74d1e7a20; 1 drivers
|
|
v0x74ce73700_11 .net/s v0x74ce73700 11, 31 0, L_0x74d1e7ac0; 1 drivers
|
|
o0x74c85a3c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_12 .net/s v0x74ce73700 12, 31 0, o0x74c85a3c0; 0 drivers
|
|
o0x74c85a3f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_13 .net/s v0x74ce73700 13, 31 0, o0x74c85a3f0; 0 drivers
|
|
o0x74c85a420 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_14 .net/s v0x74ce73700 14, 31 0, o0x74c85a420; 0 drivers
|
|
o0x74c85a450 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_15 .net/s v0x74ce73700 15, 31 0, o0x74c85a450; 0 drivers
|
|
v0x74ce73700_16 .net/s v0x74ce73700 16, 31 0, L_0x74d1e7b60; 1 drivers
|
|
v0x74ce73700_17 .net/s v0x74ce73700 17, 31 0, L_0x74d1e7c00; 1 drivers
|
|
o0x74c85a4e0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_18 .net/s v0x74ce73700 18, 31 0, o0x74c85a4e0; 0 drivers
|
|
o0x74c85a510 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_19 .net/s v0x74ce73700 19, 31 0, o0x74c85a510; 0 drivers
|
|
o0x74c85a540 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_20 .net/s v0x74ce73700 20, 31 0, o0x74c85a540; 0 drivers
|
|
o0x74c85a570 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_21 .net/s v0x74ce73700 21, 31 0, o0x74c85a570; 0 drivers
|
|
o0x74c85a5a0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_22 .net/s v0x74ce73700 22, 31 0, o0x74c85a5a0; 0 drivers
|
|
o0x74c85a5d0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_23 .net/s v0x74ce73700 23, 31 0, o0x74c85a5d0; 0 drivers
|
|
v0x74ce73700_24 .net/s v0x74ce73700 24, 31 0, L_0x74d1e7ca0; 1 drivers
|
|
o0x74c85a630 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_25 .net/s v0x74ce73700 25, 31 0, o0x74c85a630; 0 drivers
|
|
o0x74c85a660 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_26 .net/s v0x74ce73700 26, 31 0, o0x74c85a660; 0 drivers
|
|
o0x74c85a690 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_27 .net/s v0x74ce73700 27, 31 0, o0x74c85a690; 0 drivers
|
|
o0x74c85a6c0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_28 .net/s v0x74ce73700 28, 31 0, o0x74c85a6c0; 0 drivers
|
|
o0x74c85a6f0 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_29 .net/s v0x74ce73700 29, 31 0, o0x74c85a6f0; 0 drivers
|
|
o0x74c85a720 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_30 .net/s v0x74ce73700 30, 31 0, o0x74c85a720; 0 drivers
|
|
o0x74c85a750 .functor BUFZ 32, c4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive
|
|
v0x74ce73700_31 .net/s v0x74ce73700 31, 31 0, o0x74c85a750; 0 drivers
|
|
v0x74ce737a0_0 .net/s "w_bus", 63 0, L_0x74d1f8640; alias, 1 drivers
|
|
v0x74ce73840_0 .net/s "x_bus", 63 0, L_0x74d1f85a0; alias, 1 drivers
|
|
L_0x74d1f8820 .part L_0x74d1f85a0, 0, 8;
|
|
L_0x74d1f88c0 .part L_0x74d1f8640, 0, 8;
|
|
L_0x74d1f8aa0 .part L_0x74d1f85a0, 8, 8;
|
|
L_0x74d1f8b40 .part L_0x74d1f8640, 8, 8;
|
|
L_0x74d1f8d20 .part L_0x74d1f85a0, 16, 8;
|
|
L_0x74d1f8dc0 .part L_0x74d1f8640, 16, 8;
|
|
L_0x74d1f8fa0 .part L_0x74d1f85a0, 24, 8;
|
|
L_0x74d1f9040 .part L_0x74d1f8640, 24, 8;
|
|
L_0x74d1f9220 .part L_0x74d1f85a0, 32, 8;
|
|
L_0x74d1f92c0 .part L_0x74d1f8640, 32, 8;
|
|
L_0x74d1f94a0 .part L_0x74d1f85a0, 40, 8;
|
|
L_0x74d1f9540 .part L_0x74d1f8640, 40, 8;
|
|
L_0x74d1f9720 .part L_0x74d1f85a0, 48, 8;
|
|
L_0x74d1f97c0 .part L_0x74d1f8640, 48, 8;
|
|
L_0x74d1f99a0 .part L_0x74d1f85a0, 56, 8;
|
|
L_0x74d1f9a40 .part L_0x74d1f8640, 56, 8;
|
|
L_0x74d1e7d40 .arith/sum 32, v0x74ce781e0_0, L_0x74d1e7ca0;
|
|
S_0x74ce6eb80 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51500 .param/l "i" 1 8 20, +C4<00>;
|
|
S_0x74ce6ed00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6eb80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6dc0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6e00 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6e40 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce70320_0 .net/s *"_ivl_0", 15 0, L_0x74ce863a0; 1 drivers
|
|
v0x74ce703c0_0 .net/s *"_ivl_2", 15 0, L_0x74ce86440; 1 drivers
|
|
v0x74ce70460_0 .net *"_ivl_7", 0 0, L_0x74d1f86e0; 1 drivers
|
|
v0x74ce70500_0 .net *"_ivl_9", 15 0, L_0x74d1f8780; 1 drivers
|
|
L_0x74c87a1d0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce705a0_0 .net/s "acc_in", 31 0, L_0x74c87a1d0; 1 drivers
|
|
v0x74ce70640_0 .net/s "acc_out", 31 0, L_0x74d1e73e0; alias, 1 drivers
|
|
v0x74ce706e0_0 .net/s "product", 15 0, L_0x74ce864e0; 1 drivers
|
|
v0x74ce70780_0 .net/s "product_ext", 31 0, L_0x74ce86580; 1 drivers
|
|
v0x74ce70820_0 .net/s "w", 7 0, L_0x74d1f88c0; 1 drivers
|
|
v0x74ce708c0_0 .net/s "x", 7 0, L_0x74d1f8820; 1 drivers
|
|
L_0x74ce863a0 .extend/s 16, L_0x74d1f8820;
|
|
L_0x74ce86440 .extend/s 16, L_0x74d1f88c0;
|
|
L_0x74ce864e0 .arith/mult 16, L_0x74ce863a0, L_0x74ce86440;
|
|
L_0x74d1f86e0 .part L_0x74ce864e0, 15, 1;
|
|
L_0x74d1f8780 .repeat 16, 16, L_0x74d1f86e0;
|
|
L_0x74ce86580 .concat [ 16 16 0 0], L_0x74ce864e0, L_0x74d1f8780;
|
|
L_0x74d1e73e0 .arith/sum 32, L_0x74c87a1d0, L_0x74ce86580;
|
|
S_0x74ce6ee80 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51540 .param/l "i" 1 8 20, +C4<01>;
|
|
S_0x74ce6f000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6ee80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6e80 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6ec0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6f00 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce70960_0 .net/s *"_ivl_0", 15 0, L_0x74ce86620; 1 drivers
|
|
v0x74ce70a00_0 .net/s *"_ivl_2", 15 0, L_0x74ce866c0; 1 drivers
|
|
v0x74ce70aa0_0 .net *"_ivl_7", 0 0, L_0x74d1f8960; 1 drivers
|
|
v0x74ce70b40_0 .net *"_ivl_9", 15 0, L_0x74d1f8a00; 1 drivers
|
|
L_0x74c87a218 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce70be0_0 .net/s "acc_in", 31 0, L_0x74c87a218; 1 drivers
|
|
v0x74ce70c80_0 .net/s "acc_out", 31 0, L_0x74d1e7480; alias, 1 drivers
|
|
v0x74ce70d20_0 .net/s "product", 15 0, L_0x74ce86760; 1 drivers
|
|
v0x74ce70dc0_0 .net/s "product_ext", 31 0, L_0x74ce86800; 1 drivers
|
|
v0x74ce70e60_0 .net/s "w", 7 0, L_0x74d1f8b40; 1 drivers
|
|
v0x74ce70f00_0 .net/s "x", 7 0, L_0x74d1f8aa0; 1 drivers
|
|
L_0x74ce86620 .extend/s 16, L_0x74d1f8aa0;
|
|
L_0x74ce866c0 .extend/s 16, L_0x74d1f8b40;
|
|
L_0x74ce86760 .arith/mult 16, L_0x74ce86620, L_0x74ce866c0;
|
|
L_0x74d1f8960 .part L_0x74ce86760, 15, 1;
|
|
L_0x74d1f8a00 .repeat 16, 16, L_0x74d1f8960;
|
|
L_0x74ce86800 .concat [ 16 16 0 0], L_0x74ce86760, L_0x74d1f8a00;
|
|
L_0x74d1e7480 .arith/sum 32, L_0x74c87a218, L_0x74ce86800;
|
|
S_0x74ce6f180 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51580 .param/l "i" 1 8 20, +C4<010>;
|
|
S_0x74ce6f300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6f180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c6f40 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c6f80 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c6fc0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce70fa0_0 .net/s *"_ivl_0", 15 0, L_0x74ce868a0; 1 drivers
|
|
v0x74ce71040_0 .net/s *"_ivl_2", 15 0, L_0x74ce86940; 1 drivers
|
|
v0x74ce710e0_0 .net *"_ivl_7", 0 0, L_0x74d1f8be0; 1 drivers
|
|
v0x74ce71180_0 .net *"_ivl_9", 15 0, L_0x74d1f8c80; 1 drivers
|
|
L_0x74c87a260 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce71220_0 .net/s "acc_in", 31 0, L_0x74c87a260; 1 drivers
|
|
v0x74ce712c0_0 .net/s "acc_out", 31 0, L_0x74d1e7520; alias, 1 drivers
|
|
v0x74ce71360_0 .net/s "product", 15 0, L_0x74ce869e0; 1 drivers
|
|
v0x74ce71400_0 .net/s "product_ext", 31 0, L_0x74ce86a80; 1 drivers
|
|
v0x74ce714a0_0 .net/s "w", 7 0, L_0x74d1f8dc0; 1 drivers
|
|
v0x74ce71540_0 .net/s "x", 7 0, L_0x74d1f8d20; 1 drivers
|
|
L_0x74ce868a0 .extend/s 16, L_0x74d1f8d20;
|
|
L_0x74ce86940 .extend/s 16, L_0x74d1f8dc0;
|
|
L_0x74ce869e0 .arith/mult 16, L_0x74ce868a0, L_0x74ce86940;
|
|
L_0x74d1f8be0 .part L_0x74ce869e0, 15, 1;
|
|
L_0x74d1f8c80 .repeat 16, 16, L_0x74d1f8be0;
|
|
L_0x74ce86a80 .concat [ 16 16 0 0], L_0x74ce869e0, L_0x74d1f8c80;
|
|
L_0x74d1e7520 .arith/sum 32, L_0x74c87a260, L_0x74ce86a80;
|
|
S_0x74ce6f480 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce515c0 .param/l "i" 1 8 20, +C4<011>;
|
|
S_0x74ce6f600 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6f480;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c7000 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c7040 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c7080 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce715e0_0 .net/s *"_ivl_0", 15 0, L_0x74ce86b20; 1 drivers
|
|
v0x74ce71680_0 .net/s *"_ivl_2", 15 0, L_0x74ce86bc0; 1 drivers
|
|
v0x74ce71720_0 .net *"_ivl_7", 0 0, L_0x74d1f8e60; 1 drivers
|
|
v0x74ce717c0_0 .net *"_ivl_9", 15 0, L_0x74d1f8f00; 1 drivers
|
|
L_0x74c87a2a8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce71860_0 .net/s "acc_in", 31 0, L_0x74c87a2a8; 1 drivers
|
|
v0x74ce71900_0 .net/s "acc_out", 31 0, L_0x74d1e75c0; alias, 1 drivers
|
|
v0x74ce719a0_0 .net/s "product", 15 0, L_0x74ce86c60; 1 drivers
|
|
v0x74ce71a40_0 .net/s "product_ext", 31 0, L_0x74ce86d00; 1 drivers
|
|
v0x74ce71ae0_0 .net/s "w", 7 0, L_0x74d1f9040; 1 drivers
|
|
v0x74ce71b80_0 .net/s "x", 7 0, L_0x74d1f8fa0; 1 drivers
|
|
L_0x74ce86b20 .extend/s 16, L_0x74d1f8fa0;
|
|
L_0x74ce86bc0 .extend/s 16, L_0x74d1f9040;
|
|
L_0x74ce86c60 .arith/mult 16, L_0x74ce86b20, L_0x74ce86bc0;
|
|
L_0x74d1f8e60 .part L_0x74ce86c60, 15, 1;
|
|
L_0x74d1f8f00 .repeat 16, 16, L_0x74d1f8e60;
|
|
L_0x74ce86d00 .concat [ 16 16 0 0], L_0x74ce86c60, L_0x74d1f8f00;
|
|
L_0x74d1e75c0 .arith/sum 32, L_0x74c87a2a8, L_0x74ce86d00;
|
|
S_0x74ce6f780 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51640 .param/l "i" 1 8 20, +C4<0100>;
|
|
S_0x74ce6f900 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6f780;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c70c0 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c7100 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c7140 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce71c20_0 .net/s *"_ivl_0", 15 0, L_0x74ce86da0; 1 drivers
|
|
v0x74ce71cc0_0 .net/s *"_ivl_2", 15 0, L_0x74ce86e40; 1 drivers
|
|
v0x74ce71d60_0 .net *"_ivl_7", 0 0, L_0x74d1f90e0; 1 drivers
|
|
v0x74ce71e00_0 .net *"_ivl_9", 15 0, L_0x74d1f9180; 1 drivers
|
|
L_0x74c87a2f0 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce71ea0_0 .net/s "acc_in", 31 0, L_0x74c87a2f0; 1 drivers
|
|
v0x74ce71f40_0 .net/s "acc_out", 31 0, L_0x74d1e7660; alias, 1 drivers
|
|
v0x74ce71fe0_0 .net/s "product", 15 0, L_0x74ce86ee0; 1 drivers
|
|
v0x74ce72080_0 .net/s "product_ext", 31 0, L_0x74ce86f80; 1 drivers
|
|
v0x74ce72120_0 .net/s "w", 7 0, L_0x74d1f92c0; 1 drivers
|
|
v0x74ce721c0_0 .net/s "x", 7 0, L_0x74d1f9220; 1 drivers
|
|
L_0x74ce86da0 .extend/s 16, L_0x74d1f9220;
|
|
L_0x74ce86e40 .extend/s 16, L_0x74d1f92c0;
|
|
L_0x74ce86ee0 .arith/mult 16, L_0x74ce86da0, L_0x74ce86e40;
|
|
L_0x74d1f90e0 .part L_0x74ce86ee0, 15, 1;
|
|
L_0x74d1f9180 .repeat 16, 16, L_0x74d1f90e0;
|
|
L_0x74ce86f80 .concat [ 16 16 0 0], L_0x74ce86ee0, L_0x74d1f9180;
|
|
L_0x74d1e7660 .arith/sum 32, L_0x74c87a2f0, L_0x74ce86f80;
|
|
S_0x74ce6fa80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51680 .param/l "i" 1 8 20, +C4<0101>;
|
|
S_0x74ce6fc00 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6fa80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c7180 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c71c0 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c7200 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce72260_0 .net/s *"_ivl_0", 15 0, L_0x74ce87020; 1 drivers
|
|
v0x74ce72300_0 .net/s *"_ivl_2", 15 0, L_0x74ce870c0; 1 drivers
|
|
v0x74ce723a0_0 .net *"_ivl_7", 0 0, L_0x74d1f9360; 1 drivers
|
|
v0x74ce72440_0 .net *"_ivl_9", 15 0, L_0x74d1f9400; 1 drivers
|
|
L_0x74c87a338 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce724e0_0 .net/s "acc_in", 31 0, L_0x74c87a338; 1 drivers
|
|
v0x74ce72580_0 .net/s "acc_out", 31 0, L_0x74d1e7700; alias, 1 drivers
|
|
v0x74ce72620_0 .net/s "product", 15 0, L_0x74ce87160; 1 drivers
|
|
v0x74ce726c0_0 .net/s "product_ext", 31 0, L_0x74ce87200; 1 drivers
|
|
v0x74ce72760_0 .net/s "w", 7 0, L_0x74d1f9540; 1 drivers
|
|
v0x74ce72800_0 .net/s "x", 7 0, L_0x74d1f94a0; 1 drivers
|
|
L_0x74ce87020 .extend/s 16, L_0x74d1f94a0;
|
|
L_0x74ce870c0 .extend/s 16, L_0x74d1f9540;
|
|
L_0x74ce87160 .arith/mult 16, L_0x74ce87020, L_0x74ce870c0;
|
|
L_0x74d1f9360 .part L_0x74ce87160, 15, 1;
|
|
L_0x74d1f9400 .repeat 16, 16, L_0x74d1f9360;
|
|
L_0x74ce87200 .concat [ 16 16 0 0], L_0x74ce87160, L_0x74d1f9400;
|
|
L_0x74d1e7700 .arith/sum 32, L_0x74c87a338, L_0x74ce87200;
|
|
S_0x74ce6fd80 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce516c0 .param/l "i" 1 8 20, +C4<0110>;
|
|
S_0x74ce74000 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce6fd80;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c7240 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c7280 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c72c0 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce728a0_0 .net/s *"_ivl_0", 15 0, L_0x74ce872a0; 1 drivers
|
|
v0x74ce72940_0 .net/s *"_ivl_2", 15 0, L_0x74ce87340; 1 drivers
|
|
v0x74ce729e0_0 .net *"_ivl_7", 0 0, L_0x74d1f95e0; 1 drivers
|
|
v0x74ce72a80_0 .net *"_ivl_9", 15 0, L_0x74d1f9680; 1 drivers
|
|
L_0x74c87a380 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce72b20_0 .net/s "acc_in", 31 0, L_0x74c87a380; 1 drivers
|
|
v0x74ce72bc0_0 .net/s "acc_out", 31 0, L_0x74d1e77a0; alias, 1 drivers
|
|
v0x74ce72c60_0 .net/s "product", 15 0, L_0x74ce873e0; 1 drivers
|
|
v0x74ce72d00_0 .net/s "product_ext", 31 0, L_0x74ce87480; 1 drivers
|
|
v0x74ce72da0_0 .net/s "w", 7 0, L_0x74d1f97c0; 1 drivers
|
|
v0x74ce72e40_0 .net/s "x", 7 0, L_0x74d1f9720; 1 drivers
|
|
L_0x74ce872a0 .extend/s 16, L_0x74d1f9720;
|
|
L_0x74ce87340 .extend/s 16, L_0x74d1f97c0;
|
|
L_0x74ce873e0 .arith/mult 16, L_0x74ce872a0, L_0x74ce87340;
|
|
L_0x74d1f95e0 .part L_0x74ce873e0, 15, 1;
|
|
L_0x74d1f9680 .repeat 16, 16, L_0x74d1f95e0;
|
|
L_0x74ce87480 .concat [ 16 16 0 0], L_0x74ce873e0, L_0x74d1f9680;
|
|
L_0x74d1e77a0 .arith/sum 32, L_0x74c87a380, L_0x74ce87480;
|
|
S_0x74ce74180 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 8 20, 8 20 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51700 .param/l "i" 1 8 20, +C4<0111>;
|
|
S_0x74ce74300 .scope module, "u_mac" "mac_unit" 8 25, 9 1 0, S_0x74ce74180;
|
|
.timescale 0 0;
|
|
.port_info 0 /INPUT 8 "x";
|
|
.port_info 1 /INPUT 8 "w";
|
|
.port_info 2 /INPUT 32 "acc_in";
|
|
.port_info 3 /OUTPUT 32 "acc_out";
|
|
P_0x74d1c7300 .param/l "ACC_WIDTH" 0 9 3, +C4<00000000000000000000000000100000>;
|
|
P_0x74d1c7340 .param/l "DATA_WIDTH" 0 9 2, +C4<00000000000000000000000000001000>;
|
|
P_0x74d1c7380 .param/l "PROD_WIDTH" 1 9 11, +C4<0000000000000000000000000000000000000000000000000000000000010000>;
|
|
v0x74ce72ee0_0 .net/s *"_ivl_0", 15 0, L_0x74ce87520; 1 drivers
|
|
v0x74ce72f80_0 .net/s *"_ivl_2", 15 0, L_0x74ce875c0; 1 drivers
|
|
v0x74ce73020_0 .net *"_ivl_7", 0 0, L_0x74d1f9860; 1 drivers
|
|
v0x74ce730c0_0 .net *"_ivl_9", 15 0, L_0x74d1f9900; 1 drivers
|
|
L_0x74c87a3c8 .functor BUFT 1, C4<00000000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
|
|
v0x74ce73160_0 .net/s "acc_in", 31 0, L_0x74c87a3c8; 1 drivers
|
|
v0x74ce73200_0 .net/s "acc_out", 31 0, L_0x74d1e7840; alias, 1 drivers
|
|
v0x74ce732a0_0 .net/s "product", 15 0, L_0x74ce87660; 1 drivers
|
|
v0x74ce73340_0 .net/s "product_ext", 31 0, L_0x74ce87700; 1 drivers
|
|
v0x74ce733e0_0 .net/s "w", 7 0, L_0x74d1f9a40; 1 drivers
|
|
v0x74ce73480_0 .net/s "x", 7 0, L_0x74d1f99a0; 1 drivers
|
|
L_0x74ce87520 .extend/s 16, L_0x74d1f99a0;
|
|
L_0x74ce875c0 .extend/s 16, L_0x74d1f9a40;
|
|
L_0x74ce87660 .arith/mult 16, L_0x74ce87520, L_0x74ce875c0;
|
|
L_0x74d1f9860 .part L_0x74ce87660, 15, 1;
|
|
L_0x74d1f9900 .repeat 16, 16, L_0x74d1f9860;
|
|
L_0x74ce87700 .concat [ 16 16 0 0], L_0x74ce87660, L_0x74d1f9900;
|
|
L_0x74d1e7840 .arith/sum 32, L_0x74c87a3c8, L_0x74ce87700;
|
|
S_0x74ce74480 .scope generate, "GEN_TREE_INPUT[0]" "GEN_TREE_INPUT[0]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51600 .param/l "i" 1 8 80, +C4<00>;
|
|
L_0x74cc47db0 .functor BUFZ 32, L_0x74d1e73e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74600 .scope generate, "GEN_TREE_INPUT[1]" "GEN_TREE_INPUT[1]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51740 .param/l "i" 1 8 80, +C4<01>;
|
|
L_0x74cc47e20 .functor BUFZ 32, L_0x74d1e7480, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74780 .scope generate, "GEN_TREE_INPUT[2]" "GEN_TREE_INPUT[2]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51780 .param/l "i" 1 8 80, +C4<010>;
|
|
L_0x74cc47e90 .functor BUFZ 32, L_0x74d1e7520, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74900 .scope generate, "GEN_TREE_INPUT[3]" "GEN_TREE_INPUT[3]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce517c0 .param/l "i" 1 8 80, +C4<011>;
|
|
L_0x74cc47f00 .functor BUFZ 32, L_0x74d1e75c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74a80 .scope generate, "GEN_TREE_INPUT[4]" "GEN_TREE_INPUT[4]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51800 .param/l "i" 1 8 80, +C4<0100>;
|
|
L_0x74cc47f70 .functor BUFZ 32, L_0x74d1e7660, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74c00 .scope generate, "GEN_TREE_INPUT[5]" "GEN_TREE_INPUT[5]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51840 .param/l "i" 1 8 80, +C4<0101>;
|
|
L_0x74ce88000 .functor BUFZ 32, L_0x74d1e7700, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74d80 .scope generate, "GEN_TREE_INPUT[6]" "GEN_TREE_INPUT[6]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51880 .param/l "i" 1 8 80, +C4<0110>;
|
|
L_0x74ce8c000 .functor BUFZ 32, L_0x74d1e77a0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce74f00 .scope generate, "GEN_TREE_INPUT[7]" "GEN_TREE_INPUT[7]" 8 80, 8 80 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce518c0 .param/l "i" 1 8 80, +C4<0111>;
|
|
L_0x74ce8c070 .functor BUFZ 32, L_0x74d1e7840, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
|
|
S_0x74ce75080 .scope generate, "GEN_TREE_LEVEL[0]" "GEN_TREE_LEVEL[0]" 8 92, 8 92 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51900 .param/l "level" 1 8 92, +C4<00>;
|
|
S_0x74ce75200 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce75080;
|
|
.timescale 0 0;
|
|
P_0x74ce51940 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e78e0 .arith/sum 32, L_0x74cc47db0, L_0x74cc47e20;
|
|
S_0x74ce75380 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce75080;
|
|
.timescale 0 0;
|
|
P_0x74ce51980 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e7980 .arith/sum 32, L_0x74cc47e90, L_0x74cc47f00;
|
|
S_0x74ce75500 .scope generate, "GEN_TREE_NODE[2]" "GEN_TREE_NODE[2]" 8 94, 8 94 0, S_0x74ce75080;
|
|
.timescale 0 0;
|
|
P_0x74ce519c0 .param/l "node" 1 8 94, +C4<010>;
|
|
L_0x74d1e7a20 .arith/sum 32, L_0x74cc47f70, L_0x74ce88000;
|
|
S_0x74ce75680 .scope generate, "GEN_TREE_NODE[3]" "GEN_TREE_NODE[3]" 8 94, 8 94 0, S_0x74ce75080;
|
|
.timescale 0 0;
|
|
P_0x74ce51a00 .param/l "node" 1 8 94, +C4<011>;
|
|
L_0x74d1e7ac0 .arith/sum 32, L_0x74ce8c000, L_0x74ce8c070;
|
|
S_0x74ce75800 .scope generate, "GEN_TREE_LEVEL[1]" "GEN_TREE_LEVEL[1]" 8 92, 8 92 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51a40 .param/l "level" 1 8 92, +C4<01>;
|
|
S_0x74ce75980 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce75800;
|
|
.timescale 0 0;
|
|
P_0x74ce51a80 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e7b60 .arith/sum 32, L_0x74d1e78e0, L_0x74d1e7980;
|
|
S_0x74ce75b00 .scope generate, "GEN_TREE_NODE[1]" "GEN_TREE_NODE[1]" 8 94, 8 94 0, S_0x74ce75800;
|
|
.timescale 0 0;
|
|
P_0x74ce51ac0 .param/l "node" 1 8 94, +C4<01>;
|
|
L_0x74d1e7c00 .arith/sum 32, L_0x74d1e7a20, L_0x74d1e7ac0;
|
|
S_0x74ce75c80 .scope generate, "GEN_TREE_LEVEL[2]" "GEN_TREE_LEVEL[2]" 8 92, 8 92 0, S_0x74ce6ea00;
|
|
.timescale 0 0;
|
|
P_0x74ce51b00 .param/l "level" 1 8 92, +C4<010>;
|
|
S_0x74ce75e00 .scope generate, "GEN_TREE_NODE[0]" "GEN_TREE_NODE[0]" 8 94, 8 94 0, S_0x74ce75c80;
|
|
.timescale 0 0;
|
|
P_0x74ce51b40 .param/l "node" 1 8 94, +C4<00>;
|
|
L_0x74d1e7ca0 .arith/sum 32, L_0x74d1e7b60, L_0x74d1e7c00;
|
|
S_0x74ce75f80 .scope task, "run_layer" "run_layer" 11 55, 11 55 0, S_0x103a71ab0;
|
|
.timescale -9 -12;
|
|
E_0x74ce0a000 .event anyedge, v0x74ce78dc0_0;
|
|
TD_tb.run_layer ;
|
|
%wait E_0x74ce08fc0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x74ce79720_0, 0, 1;
|
|
%wait E_0x74ce08fc0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x74ce79720_0, 0, 1;
|
|
T_0.0 ;
|
|
%load/vec4 v0x74ce794a0_0;
|
|
%pad/u 32;
|
|
%pushi/vec4 1, 0, 32;
|
|
%cmp/e;
|
|
%flag_get/vec4 4;
|
|
%cmpi/ne 1, 0, 1;
|
|
%jmp/0xz T_0.1, 6;
|
|
%wait E_0x74ce0a000;
|
|
%jmp T_0.0;
|
|
T_0.1 ;
|
|
%wait E_0x74ce08fc0;
|
|
%end;
|
|
.scope S_0x103a6a1f0;
|
|
T_1 ;
|
|
%wait E_0x74ce08cc0;
|
|
%load/vec4 v0x74cd60fa0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74cd61040_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74cd60dc0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd60e60_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74cd60960_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74cd60be0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd60b40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd60d20_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74cd608c0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74cd60c80_0, 0;
|
|
%jmp T_1.1;
|
|
T_1.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd60e60_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd60b40_0, 0;
|
|
%load/vec4 v0x74cd61040_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_1.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_1.3, 6;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74cd61040_0, 0;
|
|
%jmp T_1.5;
|
|
T_1.2 ;
|
|
%load/vec4 v0x74cd60f00_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.6, 8;
|
|
%load/vec4 v0x74cd61220_0;
|
|
%assign/vec4 v0x74cd60d20_0, 0;
|
|
%load/vec4 v0x74cd606e0_0;
|
|
%assign/vec4 v0x74cd608c0_0, 0;
|
|
%load/vec4 v0x74cd61180_0;
|
|
%assign/vec4 v0x74cd60c80_0, 0;
|
|
%load/vec4 v0x74cd60820_0;
|
|
%assign/vec4 v0x74cd60960_0, 0;
|
|
%load/vec4 v0x74cd610e0_0;
|
|
%assign/vec4 v0x74cd60be0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74cd60b40_0, 0;
|
|
%pushi/vec4 1, 0, 2;
|
|
%assign/vec4 v0x74cd61040_0, 0;
|
|
T_1.6 ;
|
|
%jmp T_1.5;
|
|
T_1.3 ;
|
|
%load/vec4 v0x74cd60aa0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.8, 8;
|
|
%load/vec4 v0x74cd60d20_0;
|
|
%nor/r;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_1.10, 8;
|
|
%load/vec4 v0x74cd60a00_0;
|
|
%assign/vec4 v0x74cd60dc0_0, 0;
|
|
T_1.10 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74cd60e60_0, 0;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74cd61040_0, 0;
|
|
T_1.8 ;
|
|
%jmp T_1.5;
|
|
T_1.5 ;
|
|
%pop/vec4 1;
|
|
T_1.1 ;
|
|
%jmp T_1;
|
|
.thread T_1;
|
|
.scope S_0x103a6a370;
|
|
T_2 ;
|
|
%wait E_0x74ce08d00;
|
|
%load/vec4 v0x74cd61a40_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.0, 8;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74cd61860_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd61900_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd61360_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd617c0_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74cd61680_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74cd61720_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74cd614a0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74cd61540_0, 0, 32;
|
|
T_2.2 ; Top of for-loop
|
|
%load/vec4 v0x74cd61540_0;
|
|
%cmpi/s 4096, 0, 32;
|
|
%jmp/0xz T_2.3, 5;
|
|
%pushi/vec4 0, 0, 16;
|
|
%ix/getv/s 3, v0x74cd61540_0;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x74cd615e0, 0, 4;
|
|
T_2.4 ; for-loop step statement
|
|
%load/vec4 v0x74cd61540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74cd61540_0, 0, 32;
|
|
%jmp T_2.2;
|
|
T_2.3 ; for-loop exit label
|
|
%jmp T_2.1;
|
|
T_2.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd61900_0, 0;
|
|
%load/vec4 v0x74cd61360_0;
|
|
%nor/r;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.5, 8;
|
|
%load/vec4 v0x74cd619a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.7, 8;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74cd61360_0, 0;
|
|
%load/vec4 v0x74cd61b80_0;
|
|
%assign/vec4 v0x74cd617c0_0, 0;
|
|
%load/vec4 v0x74cd612c0_0;
|
|
%assign/vec4 v0x74cd61680_0, 0;
|
|
%load/vec4 v0x74cd61ae0_0;
|
|
%assign/vec4 v0x74cd61720_0, 0;
|
|
%pushi/vec4 2, 0, 32;
|
|
%assign/vec4 v0x74cd614a0_0, 0;
|
|
T_2.7 ;
|
|
%jmp T_2.6;
|
|
T_2.5 ;
|
|
%load/vec4 v0x74cd614a0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_2.9, 5;
|
|
%load/vec4 v0x74cd614a0_0;
|
|
%subi 1, 0, 32;
|
|
%assign/vec4 v0x74cd614a0_0, 0;
|
|
%jmp T_2.10;
|
|
T_2.9 ;
|
|
%load/vec4 v0x74cd617c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_2.11, 8;
|
|
%load/vec4 v0x74cd61680_0;
|
|
%pad/u 32;
|
|
%cmpi/u 4096, 0, 32;
|
|
%jmp/0xz T_2.13, 5;
|
|
%load/vec4 v0x74cd61720_0;
|
|
%ix/getv 3, v0x74cd61680_0;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x74cd615e0, 0, 4;
|
|
T_2.13 ;
|
|
%jmp T_2.12;
|
|
T_2.11 ;
|
|
%load/vec4 v0x74cd61680_0;
|
|
%pad/u 32;
|
|
%cmpi/u 4096, 0, 32;
|
|
%jmp/0xz T_2.15, 5;
|
|
%ix/getv 4, v0x74cd61680_0;
|
|
%load/vec4a v0x74cd615e0, 4;
|
|
%assign/vec4 v0x74cd61860_0, 0;
|
|
%jmp T_2.16;
|
|
T_2.15 ;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74cd61860_0, 0;
|
|
T_2.16 ;
|
|
T_2.12 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74cd61900_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74cd61360_0, 0;
|
|
T_2.10 ;
|
|
T_2.6 ;
|
|
T_2.1 ;
|
|
%jmp T_2;
|
|
.thread T_2;
|
|
.scope S_0x74ce16280;
|
|
T_3 ;
|
|
%wait E_0x74ce08d40;
|
|
%load/vec4 v0x74ce18d20_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce18dc0_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74ce18500_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce18b40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce18be0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce188c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce18aa0_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74ce18640_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74ce18a00_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce186e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce18960_0, 0;
|
|
%jmp T_3.1;
|
|
T_3.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce18be0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce188c0_0, 0;
|
|
%load/vec4 v0x74ce18dc0_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_3.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 2;
|
|
%cmp/u;
|
|
%jmp/1 T_3.3, 6;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce18dc0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce188c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce186e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce18960_0, 0;
|
|
%jmp T_3.5;
|
|
T_3.2 ;
|
|
%load/vec4 v0x74ce18c80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.6, 8;
|
|
%load/vec4 v0x74ce18460_0;
|
|
%assign/vec4 v0x74ce18500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce188c0_0, 0;
|
|
%load/vec4 v0x74ce18f00_0;
|
|
%assign/vec4 v0x74ce18aa0_0, 0;
|
|
%load/vec4 v0x74ce18460_0;
|
|
%ix/load 4, 1, 0;
|
|
%flag_set/imm 4, 0;
|
|
%shiftr 4;
|
|
%assign/vec4 v0x74ce18640_0, 0;
|
|
%load/vec4 v0x74ce18460_0;
|
|
%parti/s 1, 0, 2;
|
|
%cmpi/e 0, 0, 1;
|
|
%jmp/0xz T_3.8, 4;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce186e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce18960_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%load/vec4 v0x74ce18e60_0;
|
|
%concat/vec4; draw_concat_vec4
|
|
%assign/vec4 v0x74ce18a00_0, 0;
|
|
%jmp T_3.9;
|
|
T_3.8 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce186e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce18960_0, 0;
|
|
%load/vec4 v0x74ce18e60_0;
|
|
%concati/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce18a00_0, 0;
|
|
T_3.9 ;
|
|
%pushi/vec4 1, 0, 2;
|
|
%assign/vec4 v0x74ce18dc0_0, 0;
|
|
T_3.6 ;
|
|
%jmp T_3.5;
|
|
T_3.3 ;
|
|
%load/vec4 v0x74ce18820_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_3.10, 8;
|
|
%load/vec4 v0x74ce18500_0;
|
|
%parti/s 1, 0, 2;
|
|
%cmpi/e 0, 0, 1;
|
|
%jmp/0xz T_3.12, 4;
|
|
%load/vec4 v0x74ce18780_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce18b40_0, 0;
|
|
%jmp T_3.13;
|
|
T_3.12 ;
|
|
%load/vec4 v0x74ce18780_0;
|
|
%parti/s 8, 8, 5;
|
|
%assign/vec4 v0x74ce18b40_0, 0;
|
|
T_3.13 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce18be0_0, 0;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce18dc0_0, 0;
|
|
T_3.10 ;
|
|
%jmp T_3.5;
|
|
T_3.5 ;
|
|
%pop/vec4 1;
|
|
T_3.1 ;
|
|
%jmp T_3;
|
|
.thread T_3;
|
|
.scope S_0x74ce16400;
|
|
T_4 ;
|
|
%wait E_0x74ce08d40;
|
|
%load/vec4 v0x74ce1d400_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce1d360_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce1ce60_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce1d7c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1d0e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1d220_0, 0;
|
|
%jmp T_4.1;
|
|
T_4.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1d220_0, 0;
|
|
%load/vec4 v0x74ce1d4a0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_4.4, 9;
|
|
%load/vec4 v0x74ce1d0e0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_4.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce1d360_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce1ce60_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1d0e0_0, 0;
|
|
%jmp T_4.3;
|
|
T_4.2 ;
|
|
%load/vec4 v0x74ce1d0e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_4.5, 8;
|
|
%load/vec4 v0x74ce1d360_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_4.7, 4;
|
|
%load/vec4 v0x74ce1d2c0_0;
|
|
%assign/vec4 v0x74ce1ce60_0, 0;
|
|
%load/vec4 v0x74ce1d2c0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_4.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce1d7c0_0, 0;
|
|
%jmp T_4.10;
|
|
T_4.9 ;
|
|
%load/vec4 v0x74ce1d2c0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_4.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce1d7c0_0, 0;
|
|
%jmp T_4.12;
|
|
T_4.11 ;
|
|
%load/vec4 v0x74ce1d2c0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce1d7c0_0, 0;
|
|
T_4.12 ;
|
|
T_4.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1d0e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1d220_0, 0;
|
|
%jmp T_4.8;
|
|
T_4.7 ;
|
|
%load/vec4 v0x74ce1cf00_0;
|
|
%assign/vec4 v0x74ce1ce60_0, 0;
|
|
%load/vec4 v0x74ce1d360_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce1d360_0, 0;
|
|
T_4.8 ;
|
|
T_4.5 ;
|
|
T_4.3 ;
|
|
T_4.1 ;
|
|
%jmp T_4;
|
|
.thread T_4;
|
|
.scope S_0x103a68b20;
|
|
T_5 ;
|
|
%wait E_0x74ce08d40;
|
|
%load/vec4 v0x74ce1eda0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.0, 8;
|
|
%pushi/vec4 0, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
%pushi/vec4 0, 0, 6;
|
|
%assign/vec4 v0x74ce1e6c0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce1e440_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e300_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74ce1db80_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce1e260_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1ec60_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce1f340_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e4e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e620_0, 0;
|
|
%jmp T_5.1;
|
|
T_5.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1ec60_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e620_0, 0;
|
|
%load/vec4 v0x74ce1eee0_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.3, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 2, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.4, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 3, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.5, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 4, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.6, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 5, 0, 4;
|
|
%cmp/u;
|
|
%jmp/1 T_5.7, 6;
|
|
%pushi/vec4 0, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e4e0_0, 0;
|
|
%jmp T_5.9;
|
|
T_5.2 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e4e0_0, 0;
|
|
%load/vec4 v0x74ce1ee40_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.10, 8;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e4e0_0, 0;
|
|
%pushi/vec4 0, 0, 6;
|
|
%assign/vec4 v0x74ce1e6c0_0, 0;
|
|
%load/vec4 v0x74ce1f160_0;
|
|
%assign/vec4 v0x74ce1db80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e300_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
%pushi/vec4 1, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
T_5.10 ;
|
|
%jmp T_5.9;
|
|
T_5.3 ;
|
|
%load/vec4 v0x74ce1e120_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.12, 8;
|
|
%load/vec4 v0x74ce1e080_0;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%pad/u 7;
|
|
%ix/vec4 3;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x74ce1f2a0, 0, 4;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_5.14, 4;
|
|
%pushi/vec4 0, 0, 6;
|
|
%assign/vec4 v0x74ce1e6c0_0, 0;
|
|
%load/vec4 v0x74ce1ef80_0;
|
|
%assign/vec4 v0x74ce1db80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e300_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
%pushi/vec4 2, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
%jmp T_5.15;
|
|
T_5.14 ;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%addi 1, 0, 6;
|
|
%assign/vec4 v0x74ce1e6c0_0, 0;
|
|
%load/vec4 v0x74ce1f160_0;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%pad/u 22;
|
|
%add;
|
|
%addi 1, 0, 22;
|
|
%assign/vec4 v0x74ce1db80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
T_5.15 ;
|
|
T_5.12 ;
|
|
%jmp T_5.9;
|
|
T_5.4 ;
|
|
%load/vec4 v0x74ce1e120_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.16, 8;
|
|
%load/vec4 v0x74ce1e080_0;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%pad/u 7;
|
|
%ix/vec4 3;
|
|
%ix/load 4, 0, 0; Constant delay
|
|
%assign/vec4/a/d v0x74ce1f0c0, 0, 4;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 31, 0, 32;
|
|
%jmp/0xz T_5.18, 4;
|
|
%load/vec4 v0x74ce1e3a0_0;
|
|
%assign/vec4 v0x74ce1db80_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e300_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
%pushi/vec4 3, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
%jmp T_5.19;
|
|
T_5.18 ;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%addi 1, 0, 6;
|
|
%assign/vec4 v0x74ce1e6c0_0, 0;
|
|
%load/vec4 v0x74ce1ef80_0;
|
|
%load/vec4 v0x74ce1e6c0_0;
|
|
%pad/u 22;
|
|
%add;
|
|
%addi 1, 0, 22;
|
|
%assign/vec4 v0x74ce1db80_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e1c0_0, 0;
|
|
T_5.19 ;
|
|
T_5.16 ;
|
|
%jmp T_5.9;
|
|
T_5.5 ;
|
|
%load/vec4 v0x74ce1e120_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.20, 8;
|
|
%load/vec4 v0x74ce1e080_0;
|
|
%assign/vec4 v0x74ce1e440_0, 0;
|
|
%pushi/vec4 4, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
T_5.20 ;
|
|
%jmp T_5.9;
|
|
T_5.6 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ec60_0, 0;
|
|
%pushi/vec4 5, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
%jmp T_5.9;
|
|
T_5.7 ;
|
|
%load/vec4 v0x74ce1ebc0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_5.22, 8;
|
|
%load/vec4 v0x74ce1ed00_0;
|
|
%assign/vec4 v0x74ce1f340_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1e4e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1e620_0, 0;
|
|
%pushi/vec4 0, 0, 4;
|
|
%assign/vec4 v0x74ce1eee0_0, 0;
|
|
T_5.22 ;
|
|
%jmp T_5.9;
|
|
T_5.9 ;
|
|
%pop/vec4 1;
|
|
T_5.1 ;
|
|
%jmp T_5;
|
|
.thread T_5;
|
|
.scope S_0x103a681e0;
|
|
T_6 ;
|
|
%wait E_0x74ce08f80;
|
|
%load/vec4 v0x74ce24280_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.0, 8;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74ce1f480_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74ce24460_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce24500_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1f7a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce243c0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74ce1f980_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1fa20_0, 0;
|
|
%pushi/vec4 0, 0, 22;
|
|
%assign/vec4 v0x74ce1fd40_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 0, 0, 16;
|
|
%assign/vec4 v0x74ce1f700_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%jmp T_6.1;
|
|
T_6.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1fa20_0, 0;
|
|
%load/vec4 v0x74ce24320_0;
|
|
%dup/vec4;
|
|
%pushi/vec4 0, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.2, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 1, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.3, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 2, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.4, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 3, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.5, 6;
|
|
%dup/vec4;
|
|
%pushi/vec4 4, 0, 3;
|
|
%cmp/u;
|
|
%jmp/1 T_6.6, 6;
|
|
%pushi/vec4 0, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1f7a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce243c0_0, 0;
|
|
%jmp T_6.8;
|
|
T_6.2 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%load/vec4 v0x74ce1f5c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 11999, 0, 32;
|
|
%jmp/0xz T_6.9, 4;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
%pushi/vec4 1, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%jmp T_6.10;
|
|
T_6.9 ;
|
|
%load/vec4 v0x74ce1f5c0_0;
|
|
%addi 1, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
T_6.10 ;
|
|
%jmp T_6.8;
|
|
T_6.3 ;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%load/vec4 v0x74ce1fac0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.11, 8;
|
|
%load/vec4 v0x74ce1f840_0;
|
|
%assign/vec4 v0x74ce1f480_0, 0;
|
|
%load/vec4 v0x74ce1fc00_0;
|
|
%assign/vec4 v0x74ce24460_0, 0;
|
|
%load/vec4 v0x74ce1fca0_0;
|
|
%assign/vec4 v0x74ce24500_0, 0;
|
|
%load/vec4 v0x74ce1f8e0_0;
|
|
%assign/vec4 v0x74ce1f7a0_0, 0;
|
|
%load/vec4 v0x74ce1fb60_0;
|
|
%assign/vec4 v0x74ce243c0_0, 0;
|
|
%load/vec4 v0x74ce1f840_0;
|
|
%assign/vec4 v0x74ce1fd40_0, 0;
|
|
%load/vec4 v0x74ce1f8e0_0;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%load/vec4 v0x74ce1fb60_0;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
%load/vec4 v0x74ce1fca0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_6.13, 8;
|
|
%load/vec4 v0x74ce1fc00_0;
|
|
%assign/vec4 v0x74ce1f700_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 3, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%jmp T_6.14;
|
|
T_6.13 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 2, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
T_6.14 ;
|
|
T_6.11 ;
|
|
%jmp T_6.8;
|
|
T_6.4 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%load/vec4 v0x74ce1f7a0_0;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%load/vec4 v0x74ce243c0_0;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%load/vec4 v0x74ce1f5c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 5, 0, 32;
|
|
%jmp/0xz T_6.15, 4;
|
|
%load/vec4 v0x74ce1fe80_0;
|
|
%assign/vec4 v0x74ce1f980_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fa20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
%pushi/vec4 1, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%jmp T_6.16;
|
|
T_6.15 ;
|
|
%load/vec4 v0x74ce1f5c0_0;
|
|
%addi 1, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
T_6.16 ;
|
|
%jmp T_6.8;
|
|
T_6.5 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%load/vec4 v0x74ce1f7a0_0;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%load/vec4 v0x74ce243c0_0;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%load/vec4 v0x74ce1f5c0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 5, 0, 32;
|
|
%jmp/0xz T_6.17, 4;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%pushi/vec4 0, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
%pushi/vec4 4, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%jmp T_6.18;
|
|
T_6.17 ;
|
|
%load/vec4 v0x74ce1f5c0_0;
|
|
%addi 1, 0, 14;
|
|
%assign/vec4 v0x74ce1f5c0_0, 0;
|
|
T_6.18 ;
|
|
%jmp T_6.8;
|
|
T_6.6 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24000_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce24140_0, 0;
|
|
%load/vec4 v0x74ce1f7a0_0;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%load/vec4 v0x74ce243c0_0;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce241e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce1f660_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fde0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1ff20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce240a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce1fa20_0, 0;
|
|
%pushi/vec4 1, 0, 3;
|
|
%assign/vec4 v0x74ce24320_0, 0;
|
|
%jmp T_6.8;
|
|
T_6.8 ;
|
|
%pop/vec4 1;
|
|
T_6.1 ;
|
|
%jmp T_6;
|
|
.thread T_6;
|
|
.scope S_0x74ce21e00;
|
|
T_7 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce30a00_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce30960_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce30460_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce30dc0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce306e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce30820_0, 0;
|
|
%jmp T_7.1;
|
|
T_7.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce30820_0, 0;
|
|
%load/vec4 v0x74ce30aa0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_7.4, 9;
|
|
%load/vec4 v0x74ce306e0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_7.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce30960_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce30460_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce306e0_0, 0;
|
|
%jmp T_7.3;
|
|
T_7.2 ;
|
|
%load/vec4 v0x74ce306e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_7.5, 8;
|
|
%load/vec4 v0x74ce30960_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_7.7, 4;
|
|
%load/vec4 v0x74ce308c0_0;
|
|
%assign/vec4 v0x74ce30460_0, 0;
|
|
%load/vec4 v0x74ce308c0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_7.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce30dc0_0, 0;
|
|
%jmp T_7.10;
|
|
T_7.9 ;
|
|
%load/vec4 v0x74ce308c0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_7.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce30dc0_0, 0;
|
|
%jmp T_7.12;
|
|
T_7.11 ;
|
|
%load/vec4 v0x74ce308c0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce30dc0_0, 0;
|
|
T_7.12 ;
|
|
T_7.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce306e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce30820_0, 0;
|
|
%jmp T_7.8;
|
|
T_7.7 ;
|
|
%load/vec4 v0x74ce30500_0;
|
|
%assign/vec4 v0x74ce30460_0, 0;
|
|
%load/vec4 v0x74ce30960_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce30960_0, 0;
|
|
T_7.8 ;
|
|
T_7.5 ;
|
|
T_7.3 ;
|
|
T_7.1 ;
|
|
%jmp T_7;
|
|
.thread T_7;
|
|
.scope S_0x74ce2d680;
|
|
T_8 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce392c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce39220_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce38d20_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce39680_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce38fa0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce390e0_0, 0;
|
|
%jmp T_8.1;
|
|
T_8.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce390e0_0, 0;
|
|
%load/vec4 v0x74ce39360_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_8.4, 9;
|
|
%load/vec4 v0x74ce38fa0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_8.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce39220_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce38d20_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce38fa0_0, 0;
|
|
%jmp T_8.3;
|
|
T_8.2 ;
|
|
%load/vec4 v0x74ce38fa0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_8.5, 8;
|
|
%load/vec4 v0x74ce39220_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_8.7, 4;
|
|
%load/vec4 v0x74ce39180_0;
|
|
%assign/vec4 v0x74ce38d20_0, 0;
|
|
%load/vec4 v0x74ce39180_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_8.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce39680_0, 0;
|
|
%jmp T_8.10;
|
|
T_8.9 ;
|
|
%load/vec4 v0x74ce39180_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_8.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce39680_0, 0;
|
|
%jmp T_8.12;
|
|
T_8.11 ;
|
|
%load/vec4 v0x74ce39180_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce39680_0, 0;
|
|
T_8.12 ;
|
|
T_8.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce38fa0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce390e0_0, 0;
|
|
%jmp T_8.8;
|
|
T_8.7 ;
|
|
%load/vec4 v0x74ce38dc0_0;
|
|
%assign/vec4 v0x74ce38d20_0, 0;
|
|
%load/vec4 v0x74ce39220_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce39220_0, 0;
|
|
T_8.8 ;
|
|
T_8.5 ;
|
|
T_8.3 ;
|
|
T_8.1 ;
|
|
%jmp T_8;
|
|
.thread T_8;
|
|
.scope S_0x74ce3cf00;
|
|
T_9 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce41b80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce41ae0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce415e0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce41f40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce41860_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce419a0_0, 0;
|
|
%jmp T_9.1;
|
|
T_9.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce419a0_0, 0;
|
|
%load/vec4 v0x74ce41c20_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_9.4, 9;
|
|
%load/vec4 v0x74ce41860_0;
|
|
%nor/r;
|
|
%and;
|
|
T_9.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce41ae0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce415e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce41860_0, 0;
|
|
%jmp T_9.3;
|
|
T_9.2 ;
|
|
%load/vec4 v0x74ce41860_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_9.5, 8;
|
|
%load/vec4 v0x74ce41ae0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_9.7, 4;
|
|
%load/vec4 v0x74ce41a40_0;
|
|
%assign/vec4 v0x74ce415e0_0, 0;
|
|
%load/vec4 v0x74ce41a40_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_9.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce41f40_0, 0;
|
|
%jmp T_9.10;
|
|
T_9.9 ;
|
|
%load/vec4 v0x74ce41a40_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_9.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce41f40_0, 0;
|
|
%jmp T_9.12;
|
|
T_9.11 ;
|
|
%load/vec4 v0x74ce41a40_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce41f40_0, 0;
|
|
T_9.12 ;
|
|
T_9.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce41860_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce419a0_0, 0;
|
|
%jmp T_9.8;
|
|
T_9.7 ;
|
|
%load/vec4 v0x74ce41680_0;
|
|
%assign/vec4 v0x74ce415e0_0, 0;
|
|
%load/vec4 v0x74ce41ae0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce41ae0_0, 0;
|
|
T_9.8 ;
|
|
T_9.5 ;
|
|
T_9.3 ;
|
|
T_9.1 ;
|
|
%jmp T_9;
|
|
.thread T_9;
|
|
.scope S_0x74ce44780;
|
|
T_10 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce4a440_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce4a3a0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce49ea0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce4a800_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce4a120_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce4a260_0, 0;
|
|
%jmp T_10.1;
|
|
T_10.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce4a260_0, 0;
|
|
%load/vec4 v0x74ce4a4e0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_10.4, 9;
|
|
%load/vec4 v0x74ce4a120_0;
|
|
%nor/r;
|
|
%and;
|
|
T_10.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce4a3a0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce49ea0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce4a120_0, 0;
|
|
%jmp T_10.3;
|
|
T_10.2 ;
|
|
%load/vec4 v0x74ce4a120_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_10.5, 8;
|
|
%load/vec4 v0x74ce4a3a0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_10.7, 4;
|
|
%load/vec4 v0x74ce4a300_0;
|
|
%assign/vec4 v0x74ce49ea0_0, 0;
|
|
%load/vec4 v0x74ce4a300_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_10.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce4a800_0, 0;
|
|
%jmp T_10.10;
|
|
T_10.9 ;
|
|
%load/vec4 v0x74ce4a300_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_10.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce4a800_0, 0;
|
|
%jmp T_10.12;
|
|
T_10.11 ;
|
|
%load/vec4 v0x74ce4a300_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce4a800_0, 0;
|
|
T_10.12 ;
|
|
T_10.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce4a120_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce4a260_0, 0;
|
|
%jmp T_10.8;
|
|
T_10.7 ;
|
|
%load/vec4 v0x74ce49f40_0;
|
|
%assign/vec4 v0x74ce49ea0_0, 0;
|
|
%load/vec4 v0x74ce4a3a0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce4a3a0_0, 0;
|
|
T_10.8 ;
|
|
T_10.5 ;
|
|
T_10.3 ;
|
|
T_10.1 ;
|
|
%jmp T_10;
|
|
.thread T_10;
|
|
.scope S_0x74ce4c000;
|
|
T_11 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce56d00_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_11.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce56c60_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce56760_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce570c0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce569e0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce56b20_0, 0;
|
|
%jmp T_11.1;
|
|
T_11.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce56b20_0, 0;
|
|
%load/vec4 v0x74ce56da0_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_11.4, 9;
|
|
%load/vec4 v0x74ce569e0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_11.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_11.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce56c60_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce56760_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce569e0_0, 0;
|
|
%jmp T_11.3;
|
|
T_11.2 ;
|
|
%load/vec4 v0x74ce569e0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_11.5, 8;
|
|
%load/vec4 v0x74ce56c60_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_11.7, 4;
|
|
%load/vec4 v0x74ce56bc0_0;
|
|
%assign/vec4 v0x74ce56760_0, 0;
|
|
%load/vec4 v0x74ce56bc0_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_11.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce570c0_0, 0;
|
|
%jmp T_11.10;
|
|
T_11.9 ;
|
|
%load/vec4 v0x74ce56bc0_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_11.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce570c0_0, 0;
|
|
%jmp T_11.12;
|
|
T_11.11 ;
|
|
%load/vec4 v0x74ce56bc0_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce570c0_0, 0;
|
|
T_11.12 ;
|
|
T_11.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce569e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce56b20_0, 0;
|
|
%jmp T_11.8;
|
|
T_11.7 ;
|
|
%load/vec4 v0x74ce56800_0;
|
|
%assign/vec4 v0x74ce56760_0, 0;
|
|
%load/vec4 v0x74ce56c60_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce56c60_0, 0;
|
|
T_11.8 ;
|
|
T_11.5 ;
|
|
T_11.3 ;
|
|
T_11.1 ;
|
|
%jmp T_11;
|
|
.thread T_11;
|
|
.scope S_0x74ce4f780;
|
|
T_12 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce5f5c0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce5f520_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce5f020_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce5f980_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce5f2a0_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce5f3e0_0, 0;
|
|
%jmp T_12.1;
|
|
T_12.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce5f3e0_0, 0;
|
|
%load/vec4 v0x74ce5f660_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_12.4, 9;
|
|
%load/vec4 v0x74ce5f2a0_0;
|
|
%nor/r;
|
|
%and;
|
|
T_12.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce5f520_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce5f020_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce5f2a0_0, 0;
|
|
%jmp T_12.3;
|
|
T_12.2 ;
|
|
%load/vec4 v0x74ce5f2a0_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_12.5, 8;
|
|
%load/vec4 v0x74ce5f520_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_12.7, 4;
|
|
%load/vec4 v0x74ce5f480_0;
|
|
%assign/vec4 v0x74ce5f020_0, 0;
|
|
%load/vec4 v0x74ce5f480_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_12.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce5f980_0, 0;
|
|
%jmp T_12.10;
|
|
T_12.9 ;
|
|
%load/vec4 v0x74ce5f480_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_12.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce5f980_0, 0;
|
|
%jmp T_12.12;
|
|
T_12.11 ;
|
|
%load/vec4 v0x74ce5f480_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce5f980_0, 0;
|
|
T_12.12 ;
|
|
T_12.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce5f2a0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce5f3e0_0, 0;
|
|
%jmp T_12.8;
|
|
T_12.7 ;
|
|
%load/vec4 v0x74ce5f0c0_0;
|
|
%assign/vec4 v0x74ce5f020_0, 0;
|
|
%load/vec4 v0x74ce5f520_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce5f520_0, 0;
|
|
T_12.8 ;
|
|
T_12.5 ;
|
|
T_12.3 ;
|
|
T_12.1 ;
|
|
%jmp T_12;
|
|
.thread T_12;
|
|
.scope S_0x74ce5b000;
|
|
T_13 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce6be80_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_13.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce6bde0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce6b8e0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce70280_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce6bb60_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce6bca0_0, 0;
|
|
%jmp T_13.1;
|
|
T_13.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce6bca0_0, 0;
|
|
%load/vec4 v0x74ce6bf20_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_13.4, 9;
|
|
%load/vec4 v0x74ce6bb60_0;
|
|
%nor/r;
|
|
%and;
|
|
T_13.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_13.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce6bde0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce6b8e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce6bb60_0, 0;
|
|
%jmp T_13.3;
|
|
T_13.2 ;
|
|
%load/vec4 v0x74ce6bb60_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_13.5, 8;
|
|
%load/vec4 v0x74ce6bde0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_13.7, 4;
|
|
%load/vec4 v0x74ce6bd40_0;
|
|
%assign/vec4 v0x74ce6b8e0_0, 0;
|
|
%load/vec4 v0x74ce6bd40_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_13.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce70280_0, 0;
|
|
%jmp T_13.10;
|
|
T_13.9 ;
|
|
%load/vec4 v0x74ce6bd40_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_13.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce70280_0, 0;
|
|
%jmp T_13.12;
|
|
T_13.11 ;
|
|
%load/vec4 v0x74ce6bd40_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce70280_0, 0;
|
|
T_13.12 ;
|
|
T_13.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce6bb60_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce6bca0_0, 0;
|
|
%jmp T_13.8;
|
|
T_13.7 ;
|
|
%load/vec4 v0x74ce6b980_0;
|
|
%assign/vec4 v0x74ce6b8e0_0, 0;
|
|
%load/vec4 v0x74ce6bde0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce6bde0_0, 0;
|
|
T_13.8 ;
|
|
T_13.5 ;
|
|
T_13.3 ;
|
|
T_13.1 ;
|
|
%jmp T_13;
|
|
.thread T_13;
|
|
.scope S_0x74ce6e880;
|
|
T_14 ;
|
|
%wait E_0x74ce08fc0;
|
|
%load/vec4 v0x74ce78780_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.0, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce786e0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce781e0_0, 0;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce78b40_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce78460_0, 0;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce785a0_0, 0;
|
|
%jmp T_14.1;
|
|
T_14.0 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce785a0_0, 0;
|
|
%load/vec4 v0x74ce78820_0;
|
|
%flag_set/vec4 9;
|
|
%flag_get/vec4 9;
|
|
%jmp/0 T_14.4, 9;
|
|
%load/vec4 v0x74ce78460_0;
|
|
%nor/r;
|
|
%and;
|
|
T_14.4;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.2, 8;
|
|
%pushi/vec4 0, 0, 2;
|
|
%assign/vec4 v0x74ce786e0_0, 0;
|
|
%pushi/vec4 0, 0, 32;
|
|
%assign/vec4 v0x74ce781e0_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce78460_0, 0;
|
|
%jmp T_14.3;
|
|
T_14.2 ;
|
|
%load/vec4 v0x74ce78460_0;
|
|
%flag_set/vec4 8;
|
|
%jmp/0xz T_14.5, 8;
|
|
%load/vec4 v0x74ce786e0_0;
|
|
%pad/u 32;
|
|
%cmpi/e 3, 0, 32;
|
|
%jmp/0xz T_14.7, 4;
|
|
%load/vec4 v0x74ce78640_0;
|
|
%assign/vec4 v0x74ce781e0_0, 0;
|
|
%load/vec4 v0x74ce78640_0;
|
|
%cmpi/s 0, 0, 32;
|
|
%flag_or 5, 4;
|
|
%jmp/0xz T_14.9, 5;
|
|
%pushi/vec4 0, 0, 8;
|
|
%assign/vec4 v0x74ce78b40_0, 0;
|
|
%jmp T_14.10;
|
|
T_14.9 ;
|
|
%load/vec4 v0x74ce78640_0;
|
|
%cmpi/s 127, 0, 32;
|
|
%flag_or 5, 4; GT is !LE
|
|
%flag_inv 5;
|
|
%jmp/0xz T_14.11, 5;
|
|
%pushi/vec4 127, 0, 8;
|
|
%assign/vec4 v0x74ce78b40_0, 0;
|
|
%jmp T_14.12;
|
|
T_14.11 ;
|
|
%load/vec4 v0x74ce78640_0;
|
|
%parti/s 8, 0, 2;
|
|
%assign/vec4 v0x74ce78b40_0, 0;
|
|
T_14.12 ;
|
|
T_14.10 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%assign/vec4 v0x74ce78460_0, 0;
|
|
%pushi/vec4 1, 0, 1;
|
|
%assign/vec4 v0x74ce785a0_0, 0;
|
|
%jmp T_14.8;
|
|
T_14.7 ;
|
|
%load/vec4 v0x74ce78280_0;
|
|
%assign/vec4 v0x74ce781e0_0, 0;
|
|
%load/vec4 v0x74ce786e0_0;
|
|
%addi 1, 0, 2;
|
|
%assign/vec4 v0x74ce786e0_0, 0;
|
|
T_14.8 ;
|
|
T_14.5 ;
|
|
T_14.3 ;
|
|
T_14.1 ;
|
|
%jmp T_14;
|
|
.thread T_14;
|
|
.scope S_0x103a71ab0;
|
|
T_15 ;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x74ce79400_0, 0, 1;
|
|
T_15.0 ;
|
|
%delay 5000, 0;
|
|
%load/vec4 v0x74ce79400_0;
|
|
%inv;
|
|
%store/vec4 v0x74ce79400_0, 0, 1;
|
|
%jmp T_15.0;
|
|
T_15.1 ;
|
|
%end;
|
|
.thread T_15;
|
|
.scope S_0x103a71ab0;
|
|
T_16 ;
|
|
%vpi_call/w 11 71 "$dumpfile", "sim/layer.vcd" {0 0 0};
|
|
%vpi_call/w 11 72 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x103a71ab0 {0 0 0};
|
|
%pushi/vec4 1, 0, 1;
|
|
%store/vec4 v0x74ce79680_0, 0, 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x74ce79720_0, 0, 1;
|
|
%pushi/vec4 0, 0, 256;
|
|
%store/vec4 v0x74ce79860_0, 0, 256;
|
|
%pushi/vec4 0, 0, 2048;
|
|
%store/vec4 v0x74ce797c0_0, 0, 2048;
|
|
%pushi/vec4 0, 0, 64;
|
|
%store/vec4 v0x74ce792c0_0, 0, 64;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
%pushi/vec4 2, 0, 32;
|
|
T_16.0 %dup/vec4;
|
|
%cmpi/s 0, 0, 32;
|
|
%jmp/1xz T_16.1, 5;
|
|
%jmp/1 T_16.1, 4;
|
|
%subi 1, 0, 32;
|
|
%wait E_0x74ce08fc0;
|
|
%jmp T_16.0;
|
|
T_16.1 ;
|
|
%pop/vec4 1;
|
|
%pushi/vec4 0, 0, 1;
|
|
%store/vec4 v0x74ce79680_0, 0, 1;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.2 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.3, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce79860_0, 4, 8;
|
|
T_16.4 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.2;
|
|
T_16.3 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.5 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.6, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce797c0_0, 4, 8;
|
|
T_16.7 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.5;
|
|
T_16.6 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 8;
|
|
%ix/load 4, 0, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x74ce792c0_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.8 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.9, 5;
|
|
%pushi/vec4 3, 0, 8;
|
|
%pushi/vec4 256, 0, 32;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce797c0_0, 4, 8;
|
|
T_16.10 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.8;
|
|
T_16.9 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.11 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.12, 5;
|
|
%pushi/vec4 255, 0, 8;
|
|
%pushi/vec4 512, 0, 32;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce797c0_0, 4, 8;
|
|
T_16.13 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.11;
|
|
T_16.12 ; for-loop exit label
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.14 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.15, 5;
|
|
%pushi/vec4 8, 0, 8;
|
|
%pushi/vec4 768, 0, 32;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce797c0_0, 4, 8;
|
|
T_16.16 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.14;
|
|
T_16.15 ; for-loop exit label
|
|
%pushi/vec4 5, 0, 8;
|
|
%ix/load 4, 32, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x74ce792c0_0, 4, 8;
|
|
%pushi/vec4 251, 0, 8;
|
|
%ix/load 4, 40, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x74ce792c0_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.17 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.18, 5;
|
|
%pushi/vec4 1, 0, 8;
|
|
%pushi/vec4 1536, 0, 32;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce797c0_0, 4, 8;
|
|
T_16.19 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.17;
|
|
T_16.18 ; for-loop exit label
|
|
%pushi/vec4 246, 0, 8;
|
|
%ix/load 4, 48, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x74ce792c0_0, 4, 8;
|
|
%pushi/vec4 0, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
T_16.20 ; Top of for-loop
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 32, 0, 32;
|
|
%jmp/0xz T_16.21, 5;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%cmpi/s 16, 0, 32;
|
|
%flag_mov 8, 5;
|
|
%jmp/0 T_16.23, 8;
|
|
%pushi/vec4 1, 0, 8;
|
|
%jmp/1 T_16.24, 8;
|
|
T_16.23 ; End of true expr.
|
|
%pushi/vec4 0, 0, 8;
|
|
%jmp/0 T_16.24, 8;
|
|
; End of false expr.
|
|
%blend;
|
|
T_16.24;
|
|
%pushi/vec4 1792, 0, 32;
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%muli 8, 0, 32;
|
|
%add;
|
|
%ix/vec4/s 4;
|
|
%store/vec4 v0x74ce797c0_0, 4, 8;
|
|
T_16.22 ; for-loop step statement
|
|
%load/vec4 v0x74ce795e0_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce795e0_0, 0, 32;
|
|
%jmp T_16.20;
|
|
T_16.21 ; for-loop exit label
|
|
%pushi/vec4 5, 0, 8;
|
|
%ix/load 4, 56, 0;
|
|
%flag_set/imm 4, 0;
|
|
%store/vec4 v0x74ce792c0_0, 4, 8;
|
|
%vpi_call/w 11 192 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 11 193 "$display", "==============================" {0 0 0};
|
|
%vpi_call/w 11 194 "$display", "LAYER TEST (INT8)" {0 0 0};
|
|
%vpi_call/w 11 195 "$display", "==============================" {0 0 0};
|
|
%fork TD_tb.run_layer, S_0x74ce75f80;
|
|
%join;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 0, 2;
|
|
%vpi_call/w 11 199 "$display", "Neuron 0 = %5d expected = 32", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 8, 5;
|
|
%vpi_call/w 11 200 "$display", "Neuron 1 = %5d expected = 96", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 16, 6;
|
|
%vpi_call/w 11 201 "$display", "Neuron 2 = %5d expected = 0", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 24, 6;
|
|
%vpi_call/w 11 202 "$display", "Neuron 3 = %5d expected = 127", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 32, 7;
|
|
%vpi_call/w 11 203 "$display", "Neuron 4 = %5d expected = 5", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 40, 7;
|
|
%vpi_call/w 11 204 "$display", "Neuron 5 = %5d expected = 0", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 48, 7;
|
|
%vpi_call/w 11 205 "$display", "Neuron 6 = %5d expected = 22", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 56, 7;
|
|
%vpi_call/w 11 206 "$display", "Neuron 7 = %5d expected = 21", S<0,vec4,s8> {1 0 0};
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 0, 2;
|
|
%cmpi/ne 32, 0, 8;
|
|
%jmp/0xz T_16.25, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.25 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 8, 5;
|
|
%cmpi/ne 96, 0, 8;
|
|
%jmp/0xz T_16.27, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.27 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 16, 6;
|
|
%cmpi/ne 0, 0, 8;
|
|
%jmp/0xz T_16.29, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.29 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 24, 6;
|
|
%cmpi/ne 127, 0, 8;
|
|
%jmp/0xz T_16.31, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.31 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 32, 7;
|
|
%cmpi/ne 5, 0, 8;
|
|
%jmp/0xz T_16.33, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.33 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 40, 7;
|
|
%cmpi/ne 0, 0, 8;
|
|
%jmp/0xz T_16.35, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.35 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 48, 7;
|
|
%cmpi/ne 22, 0, 8;
|
|
%jmp/0xz T_16.37, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.37 ;
|
|
%load/vec4 v0x74ce79900_0;
|
|
%parti/s 8, 56, 7;
|
|
%cmpi/ne 21, 0, 8;
|
|
%jmp/0xz T_16.39, 6;
|
|
%load/vec4 v0x74ce79540_0;
|
|
%addi 1, 0, 32;
|
|
%store/vec4 v0x74ce79540_0, 0, 32;
|
|
T_16.39 ;
|
|
%vpi_call/w 11 217 "$display", "busy = %0d", v0x74ce79360_0 {0 0 0};
|
|
%vpi_call/w 11 218 "$display", "done = %0d", v0x74ce794a0_0 {0 0 0};
|
|
%vpi_call/w 11 220 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 11 221 "$display", "==============================" {0 0 0};
|
|
%load/vec4 v0x74ce79540_0;
|
|
%cmpi/e 0, 0, 32;
|
|
%jmp/0xz T_16.41, 4;
|
|
%vpi_call/w 11 224 "$display", "PASS - ALL 8 NEURONS" {0 0 0};
|
|
%jmp T_16.42;
|
|
T_16.41 ;
|
|
%vpi_call/w 11 226 "$display", "FAIL - %0d ERRORS", v0x74ce79540_0 {0 0 0};
|
|
T_16.42 ;
|
|
%vpi_call/w 11 228 "$display", "==============================" {0 0 0};
|
|
%vpi_call/w 11 229 "$display", "LAYER TEST FINISHED" {0 0 0};
|
|
%vpi_call/w 11 230 "$display", "\000" {0 0 0};
|
|
%vpi_call/w 11 232 "$finish" {0 0 0};
|
|
%end;
|
|
.thread T_16;
|
|
# The file index is used to find the file name in the following table.
|
|
:file_names 13;
|
|
"N/A";
|
|
"<interactive>";
|
|
"-";
|
|
"rtl/memory_interface.v";
|
|
"rtl/memory_model.v";
|
|
"rtl/neuron_memory.v";
|
|
"rtl/int8_memory_access.v";
|
|
"rtl/neuron_parallel.v";
|
|
"rtl/mac8.v";
|
|
"rtl/mac_unit.v";
|
|
"rtl/psram_controller.v";
|
|
"sim/layer_tb.v";
|
|
"rtl/layer.v";
|