.device LFE5U-45F .comment Part: LFE5U-45F-8CABGA381 .tile CIB_R10C13:CIB_EBR arc: E3_H06E0003 W3_H06E0003 .tile CIB_R10C19:CIB_EBR arc: E3_H06E0003 W3_H06E0003 .tile CIB_R10C1:CIB_LR_S arc: E3_H06E0303 S3_V06N0303 .tile CIB_R10C25:CIB_EBR arc: E3_H06E0103 W3_H06E0003 .tile CIB_R10C28:CIB_EBR arc: S1_V02S0201 H06E0103 .tile CIB_R10C29:CIB_EBR arc: E1_H02E0601 E3_H06W0303 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 .tile CIB_R10C30:CIB_EBR arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0303 E3_H06W0303 .tile CIB_R10C31:CIB_EBR arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 H06W0303 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0601 .tile CIB_R10C32:CIB_EBR arc: E1_H02E0001 E3_H06W0003 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 H02W0501 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0601 H06W0303 arc: S3_V06S0303 H06W0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E3_H06W0003 .tile CIB_R10C33:CIB_EBR arc: E1_H01E0001 E3_H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0303 N1_V02S0501 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 N1_V02S0501 .tile CIB_R10C34:CIB_EBR arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0303 E1_H01W0100 .tile CIB_R10C35:CIB_EBR arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R10C36:CIB_EBR arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 E3_H06W0303 arc: N1_V02N0301 S1_V02N0201 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 N1_V02S0701 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R10C37:CIB_EBR arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V06N0203 arc: E3_H06E0303 JQ6 arc: H00R0100 H02W0501 arc: JD6 V00B0000 arc: JD7 H00R0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 JQ7 arc: V00B0000 H02W0601 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0303 E1_H01W0100 enum: CIB.JB7MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 .tile CIB_R10C38:CIB_EBR arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V01S0100 arc: H01W0100 E3_H06W0303 arc: JA0 H02W0501 arc: JA1 S1_V02N0501 arc: JA2 H02W0701 arc: JA3 V00B0000 arc: JA6 S1_V02N0301 arc: JA7 W1_H02E0501 arc: JB1 W1_H02E0301 arc: JC0 S1_V02N0401 arc: JC1 H02W0401 arc: JC2 V02N0401 arc: JC3 H02W0601 arc: JC6 N1_V02S0201 arc: JC7 V02N0201 arc: JCLK0 G_HPBX0000 arc: JD0 H02W0001 arc: JLSR1 H02W0301 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 JQ0 arc: S3_V06S0103 JQ1 arc: S3_V06S0203 H06W0203 arc: V00B0000 S1_V02N0201 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 V06S0003 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R10C39:CIB_EBR arc: JA0 H02W0501 arc: JA1 H02E0701 arc: JA4 W1_H02E0701 arc: JA5 V02S0301 arc: JA6 V02N0301 arc: JA7 W1_H02E0501 arc: JC0 H02E0401 arc: JC1 V02N0601 arc: JC4 H02E0601 arc: JC5 H02W0601 arc: JC6 V00B0100 arc: JC7 S1_V02N0201 arc: JCLK0 G_HPBX0000 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0203 H06W0203 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 enum: CIB.JLSR1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 .tile CIB_R10C3:PVT_COUNT2 unknown: F2B0 unknown: F3B0 unknown: F5B0 unknown: F11B0 unknown: F13B0 .tile CIB_R10C40:CIB_EBR arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H06E0303 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R10C41:CIB_EBR arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 H06W0103 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 .tile CIB_R10C42:CIB_EBR arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 N1_V02S0001 arc: H01W0000 JQ0 arc: H01W0100 JQ2 arc: JA0 V02N0501 arc: JA1 V02N0701 arc: JA2 S1_V02N0701 arc: JA3 H02E0501 arc: JA6 S1_V02N0301 arc: JA7 E1_H02W0501 arc: JB1 E1_H02W0301 arc: JB3 S1_V02N0101 arc: JC0 H02W0601 arc: JC1 N1_V02S0601 arc: JC2 H02W0401 arc: JC3 H00L0000 arc: JC6 V00T0000 arc: JC7 V00B0100 arc: JCLK0 G_HPBX0000 arc: JD0 E1_H02W0201 arc: JD2 V01S0100 arc: JLSR1 H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 JQ3 arc: S3_V06S0103 JQ1 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02N0101 arc: V00T0000 E1_H02W0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 N1_V02S0201 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0501 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 enum: CIB.JCE1MUX 1 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R10C43:CIB_EBR arc: E3_H06E0203 V01N0001 arc: H00R0000 S1_V02N0401 arc: JA0 W1_H02E0701 arc: JA1 H02W0701 arc: JA4 V02N0101 arc: JA5 V00B0000 arc: JA6 H02E0501 arc: JA7 H00R0000 arc: JC0 H02W0601 arc: JC1 H02E0601 arc: JC4 W1_H02E0401 arc: JC5 V00B0100 arc: JC6 V02N0001 arc: JC7 W1_H02E0601 arc: JCLK0 G_HPBX0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0301 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 V01N0001 arc: W3_H06W0303 N1_V01S0100 enum: CIB.JLSR1MUX 0 enum: CIB.JLSR0MUX 0 enum: CIB.JCE0MUX 1 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JD7MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JD5MUX 0 enum: CIB.JB2MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD6MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JCE2MUX 1 enum: CIB.JCE3MUX 1 enum: CIB.JCE1MUX 1 .tile CIB_R10C44:CIB_EBR arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H06W0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 N1_V01S0100 enum: CIB.JB0MUX 0 enum: CIB.JD1MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JCE3MUX 1 enum: CIB.JCE2MUX 1 .tile CIB_R10C45:CIB_EBR arc: E1_H02E0001 V02S0001 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 E3_H06W0303 .tile CIB_R10C46:CIB_EBR arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 .tile CIB_R10C47:CIB_EBR arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 N1_V02S0401 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 E3_H06W0203 .tile CIB_R10C48:CIB_EBR arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 N1_V01S0000 .tile CIB_R10C49:CIB_EBR arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 E3_H06W0303 .tile CIB_R10C50:CIB_EBR arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H06W0103 arc: W3_H06W0303 E1_H02W0501 .tile CIB_R10C51:CIB_EBR arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V02S0201 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0303 W1_H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 N1_V01S0100 .tile CIB_R10C52:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 E1_H02W0201 .tile CIB_R10C53:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E3_H06W0303 .tile CIB_R10C54:CIB_EBR arc: E3_H06E0303 N1_V01S0100 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 N1_V01S0100 .tile CIB_R10C55:CIB_EBR arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V01N0101 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N1_V02S0601 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 V01N0001 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 N1_V01S0100 .tile CIB_R10C56:CIB_EBR arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06N0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N1_V02S0201 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02S0401 arc: W3_H06W0103 V06N0103 arc: W3_H06W0203 E3_H06W0203 .tile CIB_R10C57:CIB_EBR arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 H06E0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 .tile CIB_R10C58:CIB_EBR arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 N1_V01S0000 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: W1_H02W0201 N1_V02S0201 arc: W3_H06W0103 V01N0101 .tile CIB_R10C59:CIB_EBR arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 V06N0303 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 E1_H02W0101 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0303 N1_V02S0601 arc: W1_H02W0401 V06N0203 arc: W3_H06W0303 N1_V01S0100 .tile CIB_R10C60:CIB_EBR arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W1_H02E0601 .tile CIB_R10C61:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 E1_H02W0301 .tile CIB_R10C62:CIB_EBR arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 N1_V01S0100 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 N1_V01S0000 .tile CIB_R10C63:CIB_EBR arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V01N0101 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 V01N0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0101 N1_V02S0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V01N0101 arc: W3_H06W0103 V01N0101 arc: W3_H06W0203 N1_V01S0000 .tile CIB_R10C64:CIB_EBR arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 V01N0101 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V02S0401 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0401 S1_V02N0401 .tile CIB_R10C65:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 W1_H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 H06E0303 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 H06E0103 .tile CIB_R10C66:CIB_EBR arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 V01N0001 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 V06N0003 arc: W3_H06W0203 N1_V01S0000 .tile CIB_R10C67:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 S1_V02N0201 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 V06S0303 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0301 V06N0003 .tile CIB_R10C68:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0701 W3_H06E0203 .tile CIB_R10C69:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 H01E0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 .tile CIB_R10C70:CIB_EBR arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 V01N0001 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0303 .tile CIB_R10C71:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H06E0003 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 H06E0203 .tile CIB_R10C72:CIB_EBR arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 N1_V01S0100 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0101 V01N0101 .tile CIB_R10C73:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 .tile CIB_R10C74:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N1_V01S0100 .tile CIB_R10C75:CIB_EBR arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H01E0001 arc: S1_V02S0601 E1_H02W0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V01N0101 .tile CIB_R10C76:CIB_EBR arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0201 E1_H02W0201 .tile CIB_R10C77:CIB_EBR arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 H06E0003 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V01S0000 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 .tile CIB_R10C78:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E3_H06E0003 W3_H06E0303 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 W3_H06E0203 arc: W1_H02W0201 V06S0103 .tile CIB_R10C79:CIB_EBR arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0303 H01E0101 .tile CIB_R10C7:CIB_EBR arc: E3_H06E0003 W3_H06E0303 .tile CIB_R10C80:CIB_EBR arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 .tile CIB_R10C81:CIB_EBR arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 S1_V02N0501 .tile CIB_R10C82:CIB_EBR arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 E1_H02W0301 .tile CIB_R10C83:CIB_EBR arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 H01E0001 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 .tile CIB_R10C84:CIB_EBR arc: E1_H02E0301 S1_V02N0301 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 V02S0701 .tile CIB_R10C85:CIB_EBR arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 W1_H02E0301 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 .tile CIB_R10C86:CIB_EBR arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0601 S3_V06N0303 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0701 N1_V01S0100 .tile CIB_R10C87:CIB_EBR arc: E1_H02E0101 N1_V01S0100 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 .tile CIB_R10C88:CIB_EBR arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V01S0000 S3_V06N0103 .tile CIB_R10C89:CIB_LR_S arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 .tile CIB_R11C89:CIB_LR arc: H01W0000 JQ5 arc: JA0 H01E0001 arc: JA3 V00B0000 arc: JB0 H02E0101 arc: JB3 H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 JF5 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02E0401 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 S3_V06N0203 .tile CIB_R12C89:CIB_LR arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 .tile CIB_R13C1:CIB_LR arc: E3_H06E0303 JF5 arc: N3_V06N0303 JQ5 .tile CIB_R13C89:CIB_LR arc: JA0 W1_H02E0501 arc: JA3 N1_V02S0501 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 W3_H06E0303 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R14C1:CIB_LR arc: E3_H06E0303 JQ5 arc: JA0 E1_H02W0501 arc: N3_V06N0303 JQ5 enum: CIB.JB0MUX 0 .tile CIB_R14C89:CIB_LR arc: JA0 N1_V02S0501 arc: JA3 N1_V02S0701 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R15C1:CIB_LR arc: S1_V02S0501 H02W0501 .tile CIB_R15C89:CIB_LR arc: N3_V06N0103 H01E0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0401 V02S0401 .tile CIB_R16C1:CIB_LR arc: JA0 E1_H02W0701 arc: N3_V06N0303 JQ5 enum: CIB.JB0MUX 0 .tile CIB_R16C89:CIB_LR arc: JA0 W1_H02E0701 arc: JA3 N1_V02S0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H01E0101 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0601 V06S0303 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R17C1:CIB_LR arc: E3_H06E0303 JQ5 arc: JA0 N1_V02S0501 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 enum: CIB.JB0MUX 0 .tile CIB_R17C89:CIB_LR arc: H00L0000 H02E0001 arc: H01W0000 W3_H06E0103 arc: JA0 H00L0000 arc: JA3 H02E0701 arc: N3_V06N0203 S3_V06N0203 arc: S3_V06S0003 N3_V06S0303 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 W3_H06E0303 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R18C89:CIB_LR arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 N1_V02S0501 .tile CIB_R19C1:CIB_LR arc: JA0 N1_V02S0501 arc: JA3 N1_V02S0701 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R19C89:CIB_LR arc: JA0 S1_V02N0701 arc: JA3 W1_H02E0701 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R1C34:CIB arc: S1_V02S0501 V01N0101 .tile CIB_R1C35:CIB arc: S1_V02S0201 V01N0001 .tile CIB_R1C39:CIB arc: S1_V02S0401 H06W0203 .tile CIB_R1C40:CIB arc: V01S0100 S3_V06N0303 .tile CIB_R1C42:CIB arc: S1_V02S0101 V01N0101 arc: W3_H06W0203 S3_V06N0203 .tile CIB_R1C43:CIB arc: S1_V02S0601 H06W0303 .tile CIB_R1C44:CIB arc: S1_V02S0501 V01N0101 .tile CIB_R1C45:CIB arc: S1_V02S0701 V01N0101 .tile CIB_R1C46:CIB arc: V01S0100 S3_V06N0303 arc: W3_H06W0303 S3_V06N0303 .tile CIB_R1C48:CIB arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06W0103 arc: V01S0000 S3_V06N0103 .tile CIB_R1C50:CIB arc: S1_V02S0201 H06W0103 .tile CIB_R1C51:CIB arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 S3_V06N0203 arc: V01S0000 S3_V06N0103 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 S3_V06N0103 .tile CIB_R1C52:CIB arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 .tile CIB_R1C53:CIB arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 S3_V06N0203 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0103 S3_V06N0103 .tile CIB_R1C54:CIB arc: E3_H06E0103 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 H06W0203 arc: W3_H06W0303 S3_V06N0303 .tile CIB_R1C55:CIB arc: E1_H02E0301 V06N0003 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: W1_H02W0601 V02N0601 .tile CIB_R1C56:CIB arc: E1_H02E0101 S3_V06N0103 arc: E3_H06E0003 S3_V06N0003 arc: S1_V02S0701 V01N0101 arc: V01S0100 S3_V06N0303 .tile CIB_R1C57:CIB arc: E3_H06E0003 W1_H02E0301 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 S3_V06N0203 arc: V01S0000 S3_V06N0103 arc: W3_H06W0203 S3_V06N0203 .tile CIB_R1C58:CIB arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 .tile CIB_R1C60:CIB arc: E3_H06E0103 W3_H06E0103 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: V01S0000 S3_V06N0103 .tile CIB_R1C61:CIB arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0003 V06N0003 arc: E3_H06E0303 V06N0303 arc: S1_V02S0301 W3_H06E0003 .tile CIB_R1C62:CIB arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0003 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 .tile CIB_R1C63:CIB arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W1_H02E0501 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 W1_H02E0501 arc: V01S0000 S3_V06N0103 .tile CIB_R1C64:CIB arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 V06N0103 arc: E3_H06E0303 W1_H02E0501 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H06E0303 .tile CIB_R1C65:CIB arc: S1_V02S0301 H06E0003 .tile CIB_R1C66:CIB arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 W1_H02E0601 arc: V01S0100 S3_V06N0303 .tile CIB_R1C67:CIB arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 V01N0101 .tile CIB_R1C68:CIB arc: E3_H06E0203 H01E0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02E0701 .tile CIB_R1C69:CIB arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W1_H02E0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: V01S0000 S3_V06N0103 .tile CIB_R1C70:CIB arc: E3_H06E0203 W3_H06E0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 W3_H06E0303 .tile CIB_R1C71:CIB arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 W1_H02E0501 arc: V01S0000 S3_V06N0103 .tile CIB_R1C72:CIB arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06E0303 .tile CIB_R1C73:CIB arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 .tile CIB_R1C74:CIB arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 H01E0001 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02E0501 .tile CIB_R1C75:CIB arc: E1_H02E0501 H01E0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 V06N0303 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 W3_H06E0303 .tile CIB_R1C76:CIB arc: E3_H06E0303 W3_H06E0203 arc: S1_V02S0501 H02E0501 .tile CIB_R1C77:CIB arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 V01N0101 .tile CIB_R1C78:CIB arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06E0303 arc: V01S0100 S3_V06N0303 arc: W1_H02W0601 W3_H06E0303 .tile CIB_R1C79:CIB arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 H06E0303 .tile CIB_R1C80:CIB arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0303 H01E0101 .tile CIB_R1C81:CIB arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 H01E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W3_H06E0003 .tile CIB_R1C82:CIB arc: S1_V02S0201 H06E0103 .tile CIB_R1C83:CIB arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H06E0303 .tile CIB_R1C84:CIB arc: S1_V02S0101 H02W0101 .tile CIB_R1C85:CIB arc: S1_V02S0201 V01N0001 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0101 W3_H06E0103 .tile CIB_R1C86:CIB arc: E3_H06E0303 V06N0303 arc: S1_V02S0501 S3_V06N0303 .tile CIB_R1C87:CIB arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0501 W3_H06E0303 .tile CIB_R1C89:CIB_LR_S arc: S1_V02S0501 H06E0303 .tile CIB_R20C1:CIB_LR arc: H00L0100 H02W0101 arc: JA3 H00L0100 enum: CIB.JB3MUX 0 .tile CIB_R20C89:CIB_LR arc: JA0 N1_V02S0701 arc: JA3 H02E0701 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0001 W3_H06E0003 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R21C89:CIB_LR arc: N1_V02N0701 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 V02S0701 .tile CIB_R22C22:CIB_DSP arc: E1_H01E0101 JQ6 arc: E1_H02E0401 JQ4 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ5 arc: N1_V01N0001 JQ2 arc: N1_V01N0101 JQ3 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C23:CIB_DSP arc: E1_H01E0001 JQ3 arc: E1_H01E0101 JQ2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 JQ4 arc: E1_H02E0501 V06S0303 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: N1_V01N0001 JQ5 arc: N1_V01N0101 JQ1 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C24:CIB_DSP arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: JB2 E1_H02W0101 arc: JB3 H00R0000 arc: JB4 E1_H02W0301 arc: JB5 H02W0101 arc: JB6 H02E0301 arc: JB7 N1_V02S0501 arc: JD2 N1_V02S0201 arc: JD3 V02S0001 arc: JD4 V02S0601 arc: JD5 H00R0100 arc: JD6 N1_V02S0401 arc: JD7 H02E0201 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: V00B0100 H02W0701 .tile CIB_R22C25:CIB_DSP arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S3_V06N0003 arc: E3_H06E0203 W1_H02E0401 arc: JB0 V02S0301 arc: JB1 W1_H02E0101 arc: JB2 V02S0301 arc: JB3 W1_H02E0101 arc: JB4 V02S0701 arc: JB5 W1_H02E0101 arc: JB6 V02S0701 arc: JB7 W1_H02E0101 arc: JD0 H02W0001 arc: JD1 V02S0201 arc: JD2 W1_H02E0001 arc: JD3 V02S0001 arc: JD4 W1_H02E0001 arc: JD5 V02S0401 arc: JD6 W1_H02E0001 arc: JD7 V02S0401 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0701 N1_V02S0701 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C26:CIB_DSP arc: E1_H01E0001 JF4 arc: E1_H01E0101 JF6 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 JF7 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ6 arc: H00R0000 E1_H02W0401 arc: JB0 V02S0101 arc: JB1 W1_H02E0301 arc: JB2 V02S0101 arc: JB3 W1_H02E0301 arc: JB4 E1_H02W0301 arc: JB5 W1_H02E0101 arc: JB6 H02W0301 arc: JB7 N1_V02S0501 arc: JCE0 H00R0000 arc: JCE1 V02N0201 arc: JCE2 S1_V02N0601 arc: JCE3 H00R0000 arc: JD0 W1_H02E0201 arc: JD1 V02S0201 arc: JD2 W1_H02E0201 arc: JD3 V02S0201 arc: JD4 E1_H02W0201 arc: JD5 V02N0401 arc: JD6 H02E0001 arc: JD7 S1_V02N0401 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 JF5 arc: S1_V02S0601 H02W0601 arc: V01S0000 JQ7 arc: V01S0100 JQ5 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 .tile CIB_R22C27:CIB_DSP arc: E1_H01E0001 JF0 arc: E1_H01E0101 JF1 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 JF3 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 JQ5 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 JF7 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JF4 arc: E3_H06E0303 JQ6 arc: H01W0000 JF2 arc: JB0 V02N0101 arc: JB1 N1_V02S0101 arc: JB2 S1_V02N0301 arc: JB3 V02N0301 arc: JB4 S1_V02N0501 arc: JB5 V02N0501 arc: JB6 S1_V02N0501 arc: JB7 V02N0501 arc: JD0 N1_V01S0000 arc: JD1 H02E0001 arc: JD2 N1_V02S0001 arc: JD3 E1_H02W0201 arc: JD4 V02N0601 arc: JD5 S1_V02N0401 arc: JD6 V02N0601 arc: JD7 S1_V02N0401 arc: N1_V01N0001 JF6 arc: N1_V01N0101 JQ7 arc: S1_V02S0001 JQ0 arc: S1_V02S0101 JQ1 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0501 JF5 arc: S1_V02S0701 H01E0101 arc: V01S0000 JQ3 arc: V01S0100 JQ4 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 V06S0303 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C28:CIB_DSP arc: E1_H01E0001 JF1 arc: E1_H01E0101 JF2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 JQ2 arc: E1_H02E0301 JQ3 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 H02E0401 arc: JB0 H02E0301 arc: JB1 W1_H02E0101 arc: JB2 H02E0301 arc: JB3 W1_H02E0101 arc: JB4 H00R0000 arc: JB5 W1_H02E0101 arc: JB6 V00B0000 arc: JB7 N1_V01S0000 arc: JD0 W1_H02E0201 arc: JD1 H02E0001 arc: JD2 V02N0001 arc: JD3 H02E0001 arc: JD4 W1_H02E0201 arc: JD5 H02E0001 arc: JD6 H02W0001 arc: JD7 S1_V02N0401 arc: JLSR0 V00T0100 arc: JLSR1 V00T0100 arc: N1_V01N0101 JQ1 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0201 JF0 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00T0100 N1_V02S0701 arc: V01S0000 JF3 arc: V01S0100 JQ0 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V01N0001 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C29:CIB_DSP arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: JB0 H02W0101 arc: JB1 E1_H02W0101 arc: JB2 H00R0000 arc: JB3 S1_V02N0301 arc: JB4 H00L0000 arc: JB5 H02E0101 arc: JB6 V00B0000 arc: JB7 H02E0101 arc: JD0 H02W0001 arc: JD1 V02N0001 arc: JD2 S1_V02N0001 arc: JD3 E1_H02W0201 arc: JD4 E1_H02W0001 arc: JD5 S1_V02N0401 arc: JD6 H00R0100 arc: JD7 W1_H02E0201 arc: JLSR1 V00B0100 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0101 W1_H02E0101 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02N0301 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S3_V06N0203 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C30:CIB_DSP arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V06N0003 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0103 arc: H00R0100 W1_H02E0701 arc: JB0 H02E0301 arc: JB1 W1_H02E0101 arc: JB2 H02E0301 arc: JB3 W1_H02E0101 arc: JB4 H02E0301 arc: JB5 W1_H02E0101 arc: JB6 H02E0301 arc: JB7 W1_H02E0101 arc: JCE3 S1_V02N0601 arc: JD0 V02N0001 arc: JD1 H02E0201 arc: JD2 V02N0001 arc: JD3 H02E0201 arc: JD4 H00R0100 arc: JD5 H02E0201 arc: JD6 H00R0100 arc: JD7 H02E0201 arc: JLSR0 V00B0000 arc: JLSR1 V00B0000 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 V06N0103 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C31:CIB_DSP arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 JQ0 arc: E1_H02E0301 JQ3 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 JQ7 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 JQ1 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 JQ4 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 JQ6 arc: S1_V02S0701 JQ5 arc: S3_V06S0103 JQ2 arc: S3_V06S0203 E3_H06W0203 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W3_H06W0203 E1_H02W0701 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C32:CIB_DSP arc: E1_H02E0001 JQ0 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0601 JQ4 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 JQ1 arc: S1_V02S0201 JQ2 arc: S1_V02S0301 JQ3 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 JQ5 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N3_V06S0203 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C33:CIB_DSP arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V06N0303 arc: JB2 S1_V02N0101 arc: JB3 V02S0301 arc: JB4 H02W0301 arc: JB5 E1_H02W0301 arc: JB6 H02E0101 arc: JB7 V00B0100 arc: JD2 H02W0001 arc: JD3 H02E0201 arc: JD4 V00B0000 arc: JD5 S1_V02N0601 arc: JD6 N1_V02S0601 arc: JD7 W1_H02E0001 arc: JLSR0 V00T0000 arc: JLSR1 V00T0000 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0401 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 .tile CIB_R22C34:CIB_DSP arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02N0501 arc: E3_H06E0303 N1_V01S0100 arc: JB0 H02E0301 arc: JB1 W1_H02E0301 arc: JB2 H02E0301 arc: JB3 W1_H02E0301 arc: JB4 H02E0301 arc: JB5 W1_H02E0301 arc: JB6 H02E0301 arc: JB7 W1_H02E0301 arc: JD0 N1_V02S0001 arc: JD1 H02E0201 arc: JD2 H02E0001 arc: JD3 V02N0001 arc: JD4 H02E0001 arc: JD5 V00B0000 arc: JD6 H02E0001 arc: JD7 V00B0000 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0001 arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E1_H01W0000 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C35:CIB_DSP arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: H01W0000 JF6 arc: JB0 W1_H02E0301 arc: JB1 V00B0000 arc: JB2 W1_H02E0301 arc: JB3 H00R0000 arc: JB4 H02E0101 arc: JB5 E1_H02W0301 arc: JB6 V00B0100 arc: JB7 V02N0701 arc: JCE0 H00R0100 arc: JCE1 H00R0100 arc: JCE2 H00L0000 arc: JCE3 H00R0100 arc: JD0 W1_H02E0001 arc: JD1 V00T0100 arc: JD2 W1_H02E0001 arc: JD3 V00T0100 arc: JD4 H00L0100 arc: JD5 N1_V02S0401 arc: JD6 H02E0001 arc: JD7 V02N0601 arc: N1_V01N0001 JQ6 arc: N1_V01N0101 JQ7 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 JF5 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0301 arc: V00T0100 W1_H02E0301 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 JF4 arc: W1_H02W0501 JF7 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 JQ4 arc: W3_H06W0303 JQ5 .tile CIB_R22C36:CIB_DSP arc: E1_H01E0001 JF0 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: H01W0000 JQ0 arc: H01W0100 JQ2 arc: JB0 S1_V02N0301 arc: JB1 N1_V02S0301 arc: JB2 W1_H02E0301 arc: JB3 E1_H02W0301 arc: JB4 W1_H02E0301 arc: JB5 E1_H02W0301 arc: JB6 W1_H02E0301 arc: JB7 E1_H02W0301 arc: JD0 H02E0001 arc: JD1 S1_V02N0201 arc: JD2 S1_V02N0001 arc: JD3 E1_H02W0001 arc: JD4 H02W0201 arc: JD5 E1_H02W0201 arc: JD6 H02W0201 arc: JD7 E1_H02W0201 arc: N1_V01N0001 JQ6 arc: N1_V01N0101 JQ1 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 JQ7 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 JF5 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 JF7 arc: S3_V06S0003 JF3 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 JF4 arc: S3_V06S0303 JF6 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 JF2 arc: W1_H02W0401 JQ4 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JF1 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 JQ5 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C37:CIB_DSP arc: E1_H01E0001 JF1 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W1_H02E0701 arc: H00L0100 V02S0101 arc: H00R0000 V02N0601 arc: H01W0000 JF3 arc: H01W0100 JF0 arc: JB0 V02N0301 arc: JB1 H02W0301 arc: JB2 V02N0301 arc: JB3 H02W0301 arc: JB4 V02N0501 arc: JB5 H02W0301 arc: JB6 S1_V02N0701 arc: JB7 H02W0101 arc: JD0 V02N0201 arc: JD1 H00R0000 arc: JD2 V02N0201 arc: JD3 H00R0000 arc: JD4 V00B0000 arc: JD5 V02N0601 arc: JD6 H00L0100 arc: JD7 S1_V02N0401 arc: JLSR0 E1_H02W0301 arc: JLSR1 E1_H02W0301 arc: N1_V01N0001 JQ0 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 JQ1 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02N0201 arc: W1_H02W0001 JF2 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ2 arc: W3_H06W0203 V06S0203 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C38:CIB_DSP arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 H02E0601 arc: JB0 S1_V02N0101 arc: JB1 N1_V02S0301 arc: JB2 H00R0000 arc: JB3 H02E0101 arc: JB4 W1_H02E0101 arc: JB5 W1_H02E0301 arc: JB6 W1_H02E0101 arc: JB7 W1_H02E0301 arc: JD0 H02W0001 arc: JD1 V02S0001 arc: JD2 N1_V02S0001 arc: JD3 V00B0100 arc: JD4 H02W0201 arc: JD5 V02S0601 arc: JD6 W1_H02E0001 arc: JD7 W1_H02E0201 arc: JLSR1 E1_H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 V02N0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W3_H06W0003 V06S0003 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C39:CIB_DSP arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 V01N0101 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: JB0 H02E0101 arc: JB1 V02S0301 arc: JB2 H02E0101 arc: JB3 V02S0301 arc: JB4 H02E0101 arc: JB5 W1_H02E0301 arc: JB6 H02E0101 arc: JB7 W1_H02E0301 arc: JCE3 H00R0100 arc: JD0 V02S0001 arc: JD1 H00R0000 arc: JD2 V02S0001 arc: JD3 H00R0000 arc: JD4 H02E0001 arc: JD5 V02S0401 arc: JD6 V00B0000 arc: JD7 V02S0401 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W3_H06W0003 V01N0001 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C40:CIB_DSP arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E3_H06E0003 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06W0203 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 V06N0003 arc: W3_H06W0203 V01N0001 arc: W3_H06W0303 V01N0101 .tile CIB_R22C41:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 H06E0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0203 N1_V01S0000 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 .tile CIB_R22C42:CIB_DSP arc: E1_H01E0101 JF7 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 N1_V01S0100 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0701 arc: H01W0000 JQ2 arc: H01W0100 JQ0 arc: JB0 H00R0100 arc: JB1 V00T0000 arc: JB2 S1_V02N0101 arc: JB3 V02S0301 arc: JB4 H02E0301 arc: JB5 H02W0301 arc: JB6 S1_V02N0501 arc: JB7 V02N0701 arc: JCE0 H00R0000 arc: JD0 N1_V01S0000 arc: JD1 S1_V02N0201 arc: JD2 H02W0201 arc: JD3 V02S0001 arc: JD4 E1_H02W0001 arc: JD5 W1_H02E0001 arc: JD6 E1_H02W0201 arc: JD7 H00L0100 arc: JLSR0 V00B0000 arc: JLSR1 V00B0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 JF4 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 JF5 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 JQ7 arc: S3_V06S0303 JF6 arc: V00B0000 E1_H02W0401 arc: V00T0000 S1_V02N0401 arc: V01S0000 N3_V06S0103 arc: V01S0100 JQ6 arc: W1_H02W0001 JF2 arc: W1_H02W0101 JF3 arc: W1_H02W0201 JF0 arc: W1_H02W0301 JF1 arc: W1_H02W0601 JQ4 arc: W1_H02W0701 JQ5 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ1 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C43:CIB_DSP arc: E1_H01E0001 JF3 arc: E1_H01E0101 JF7 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02N0601 arc: H01W0000 JQ2 arc: H01W0100 JQ3 arc: JB0 V02N0101 arc: JB1 W1_H02E0101 arc: JB2 V02N0101 arc: JB3 W1_H02E0101 arc: JB4 V02N0501 arc: JB5 W1_H02E0101 arc: JB6 V02N0501 arc: JB7 W1_H02E0101 arc: JD0 W1_H02E0201 arc: JD1 V02N0001 arc: JD2 W1_H02E0201 arc: JD3 V02N0001 arc: JD4 W1_H02E0201 arc: JD5 V02N0601 arc: JD6 W1_H02E0201 arc: JD7 V02N0601 arc: JLSR1 V00B0100 arc: S1_V02S0301 JF1 arc: S1_V02S0601 JF4 arc: S1_V02S0701 JF5 arc: S3_V06S0103 JF2 arc: V00B0100 V02N0301 arc: V01S0100 JF7 arc: W1_H02W0001 JF0 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 JQ4 arc: W1_H02W0501 JQ5 arc: W1_H02W0601 JF6 arc: W3_H06W0003 JQ0 arc: W3_H06W0103 JQ1 arc: W3_H06W0203 JQ7 arc: W3_H06W0303 JQ6 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 .tile CIB_R22C44:CIB_DSP arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 H02W0701 arc: JB0 V00B0000 arc: JB1 W1_H02E0101 arc: JB2 H00R0100 arc: JB3 E1_H01W0100 arc: JB4 H02E0101 arc: JB5 W1_H02E0301 arc: JB6 H02W0301 arc: JB7 V00B0100 arc: JD0 V02N0001 arc: JD1 H00R0000 arc: JD2 W1_H02E0001 arc: JD3 H02E0001 arc: JD4 V02N0601 arc: JD5 H02E0201 arc: JD6 W1_H02E0201 arc: JD7 H02W0201 arc: JLSR0 V00T0000 arc: JLSR1 V00T0000 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H06W0303 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C45:CIB_DSP arc: H01W0100 W3_H06E0303 arc: JB0 H02E0301 arc: JB1 W1_H02E0301 arc: JB2 H02E0301 arc: JB3 W1_H02E0301 arc: JB4 H02E0301 arc: JB5 W1_H02E0301 arc: JB6 H02E0301 arc: JB7 W1_H02E0301 arc: JD0 N1_V01S0000 arc: JD1 H02W0001 arc: JD2 H02E0201 arc: JD3 H02E0001 arc: JD4 H02E0201 arc: JD5 H02E0001 arc: JD6 H02E0201 arc: JD7 H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0003 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 W3_H06E0203 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C46:CIB_DSP arc: H00L0100 V02N0101 arc: H00R0000 V02N0401 arc: JB0 S1_V02N0301 arc: JB1 W1_H02E0101 arc: JB2 S1_V02N0301 arc: JB3 W1_H02E0101 arc: JCE0 H00R0000 arc: JCE1 H00L0100 arc: JD0 W1_H02E0201 arc: JD1 S1_V02N0001 arc: JD2 W1_H02E0201 arc: JD3 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N1_V02S0401 .tile CIB_R22C47:CIB_DSP arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: V01S0000 N3_V06S0103 arc: W1_H02W0501 N1_V01S0100 arc: W3_H06W0303 V01N0101 .tile CIB_R22C48:CIB_DSP arc: E1_H02E0201 V02S0201 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 .tile CIB_R22C49:CIB_DSP arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 V06S0003 arc: E1_H02E0701 N1_V02S0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 .tile CIB_R22C50:CIB_DSP arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V01S0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V06N0303 arc: W3_H06W0103 V06S0103 .tile CIB_R22C51:CIB_DSP arc: E1_H02E0001 V06S0003 arc: E1_H02E0501 V06S0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 N1_V01S0000 .tile CIB_R22C52:CIB_DSP arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 V01N0001 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 N1_V02S0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 V06S0103 .tile CIB_R22C53:CIB_DSP arc: E1_H02E0101 V01N0101 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0001 N3_V06S0003 .tile CIB_R22C54:CIB_DSP arc: E1_H02E0001 V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 .tile CIB_R22C55:CIB_DSP arc: E1_H01E0001 JF6 arc: E1_H01E0101 JF7 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 JQ7 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 JF4 arc: E3_H06E0303 JQ6 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: JB4 H00L0000 arc: JB5 V02S0501 arc: JB6 V00B0100 arc: JB7 N1_V02S0501 arc: JCE2 H00R0100 arc: JCE3 H00R0000 arc: JD4 N1_V02S0401 arc: JD5 V02S0401 arc: JD6 V02S0601 arc: JD7 H02E0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 V01N0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 JF5 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 N1_V02S0101 arc: V01S0000 JQ4 arc: V01S0100 JQ5 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 N3_V06S0203 .tile CIB_R22C56:CIB_DSP arc: E1_H01E0001 JF3 arc: E1_H01E0101 JF4 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 JF1 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 JF6 arc: E1_H02E0701 JF7 arc: E3_H06E0003 JF0 arc: E3_H06E0103 JF2 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: JB0 V02S0301 arc: JB1 N1_V02S0301 arc: JB2 V02S0101 arc: JB3 E1_H02W0101 arc: JB4 V02S0501 arc: JB5 E1_H02W0101 arc: JB6 V02S0501 arc: JB7 E1_H02W0101 arc: JD0 N1_V02S0001 arc: JD1 N1_V02S0201 arc: JD2 E1_H02W0001 arc: JD3 V00B0100 arc: JD4 E1_H02W0201 arc: JD5 V02S0601 arc: JD6 E1_H02W0201 arc: JD7 V02S0601 arc: N1_V01N0001 JQ2 arc: N1_V01N0101 JQ4 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0001 JQ0 arc: S1_V02S0101 JQ3 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 JQ1 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 JQ6 arc: S1_V02S0701 JF5 arc: V00B0100 N1_V02S0101 arc: V01S0000 JQ7 arc: V01S0100 JQ5 arc: W1_H02W0001 V02S0001 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06S0203 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C57:CIB_DSP arc: E1_H01E0001 JF1 arc: E1_H01E0101 JF2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 JQ3 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02S0001 arc: H00R0100 V02S0501 arc: H01W0000 JQ2 arc: H01W0100 E3_H06W0303 arc: JB0 V02S0301 arc: JB1 V00T0000 arc: JB2 V02S0301 arc: JB3 H00R0100 arc: JB4 H00L0000 arc: JB5 V02S0501 arc: JB6 E1_H02W0301 arc: JB7 V00B0100 arc: JD0 V02S0201 arc: JD1 V02S0001 arc: JD2 V02S0201 arc: JD3 V02S0001 arc: JD4 E1_H01W0100 arc: JD5 E1_H02W0201 arc: JD6 N1_V02S0601 arc: JD7 E1_H02W0001 arc: JLSR0 V00B0000 arc: JLSR1 V00B0000 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 JF0 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V01S0100 JF3 arc: W1_H02W0501 N3_V06S0303 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C58:CIB_DSP arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H01W0100 E3_H06W0303 arc: JB0 V02N0301 arc: JB1 V00B0000 arc: JB2 E1_H02W0301 arc: JB3 H00L0000 arc: JB4 V02N0501 arc: JB5 W1_H02E0101 arc: JB6 V02N0501 arc: JB7 W1_H02E0101 arc: JD0 E1_H02W0001 arc: JD1 V02N0201 arc: JD2 E1_H02W0201 arc: JD3 V02S0201 arc: JD4 V02N0401 arc: JD5 V02S0401 arc: JD6 W1_H02E0001 arc: JD7 V02N0601 arc: JLSR1 V00T0100 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V01N0101 arc: W3_H06W0103 N3_V06S0103 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C59:CIB_DSP arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 W1_H02E0501 arc: H00R0100 H02E0501 arc: JB0 H02E0101 arc: JB1 V02S0301 arc: JB2 H02E0101 arc: JB3 V02S0301 arc: JB4 H02E0101 arc: JB5 V02S0501 arc: JB6 H02E0101 arc: JB7 V02S0501 arc: JCE3 H00R0100 arc: JD0 V02S0001 arc: JD1 H02E0001 arc: JD2 V02S0001 arc: JD3 H02E0001 arc: JD4 H02E0201 arc: JD5 H02E0001 arc: JD6 V02S0401 arc: JD7 H02E0001 arc: JLSR0 V00T0000 arc: JLSR1 V00T0000 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N1_V01S0000 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0003 E1_H01W0000 arc: V00T0000 W1_H02E0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 N3_V06S0103 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C60:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V02S0301 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 JQ6 arc: H01W0000 JQ4 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: S3_V06S0003 JQ3 arc: S3_V06S0103 JQ1 arc: S3_V06S0203 JQ7 arc: S3_V06S0303 JQ5 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H02W0101 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C61:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 JQ0 arc: E3_H06E0103 JQ1 arc: E3_H06E0203 JQ7 arc: E3_H06E0303 JQ6 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 JQ3 arc: S3_V06S0103 JQ2 arc: S3_V06S0203 JQ4 arc: S3_V06S0303 JQ5 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C62:CIB_DSP arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: JB2 S1_V02N0101 arc: JB3 H02E0101 arc: JB4 N1_V01S0000 arc: JB5 V02S0501 arc: JB6 S1_V02N0501 arc: JB7 W1_H02E0301 arc: JD2 W1_H02E0001 arc: JD3 S1_V02N0001 arc: JD4 H02E0001 arc: JD5 V00B0000 arc: JD6 W1_H02E0201 arc: JD7 S1_V02N0601 arc: JLSR0 V00T0000 arc: JLSR1 V00T0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 V02S0001 arc: V00T0000 H02W0201 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E3_H06W0003 .tile CIB_R22C63:CIB_DSP arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 H02E0401 arc: JB0 V00B0000 arc: JB1 W1_H02E0301 arc: JB2 H00R0000 arc: JB3 W1_H02E0301 arc: JB4 H00R0000 arc: JB5 W1_H02E0301 arc: JB6 V00B0000 arc: JB7 W1_H02E0301 arc: JD0 H02E0001 arc: JD1 V02N0001 arc: JD2 W1_H02E0201 arc: JD3 S1_V02N0001 arc: JD4 W1_H02E0201 arc: JD5 V00B0000 arc: JD6 W1_H02E0201 arc: JD7 V00B0000 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W3_H06W0303 V06N0303 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C64:CIB_DSP arc: E1_H01E0001 JF7 arc: E1_H01E0101 JF6 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 JQ7 arc: E1_H02E0601 JQ6 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ5 arc: H00L0000 V02N0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0701 arc: H01W0100 W3_H06E0303 arc: JB0 V00B0000 arc: JB1 W1_H02E0101 arc: JB2 H00R0000 arc: JB3 W1_H02E0101 arc: JB4 V02S0701 arc: JB5 E1_H02W0301 arc: JB6 H02E0101 arc: JB7 V00B0100 arc: JCE0 V02N0201 arc: JCE1 V02N0201 arc: JCE2 H00L0000 arc: JCE3 H00L0000 arc: JD0 W1_H02E0201 arc: JD1 H00R0000 arc: JD2 W1_H02E0201 arc: JD3 H00R0000 arc: JD4 H00R0100 arc: JD5 H02W0201 arc: JD6 H02W0001 arc: JD7 V02S0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 JF5 arc: S1_V02S0601 JF4 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 S3_V06N0103 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 N1_V01S0100 .tile CIB_R22C65:CIB_DSP arc: E1_H01E0001 JQ6 arc: E1_H01E0101 JQ1 arc: E1_H02E0001 JQ0 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 JQ7 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 JQ4 arc: E3_H06E0303 JQ5 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: H01W0000 JF0 arc: H01W0100 JF7 arc: JB0 W1_H02E0301 arc: JB1 H02W0101 arc: JB2 H02E0301 arc: JB3 H00R0100 arc: JB4 H02E0301 arc: JB5 S1_V02N0701 arc: JB6 H02E0301 arc: JB7 S1_V02N0701 arc: JD0 H00R0000 arc: JD1 V02S0001 arc: JD2 N1_V01S0000 arc: JD3 W1_H02E0001 arc: JD4 H00R0100 arc: JD5 H02E0201 arc: JD6 H00R0100 arc: JD7 H02E0201 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 JF3 arc: S1_V02S0201 JF2 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 JF5 arc: S1_V02S0601 JF4 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 JF1 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H01E0101 arc: V01S0100 JF6 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0103 V06N0103 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C66:CIB_DSP arc: E1_H01E0001 JF1 arc: E1_H01E0101 JF0 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 JQ0 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 JQ3 arc: E3_H06E0103 JQ2 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00R0100 H02E0701 arc: H01W0000 JQ1 arc: JB0 W1_H02E0301 arc: JB1 H00R0100 arc: JB2 W1_H02E0301 arc: JB3 H00R0100 arc: JB4 W1_H02E0301 arc: JB5 V00B0100 arc: JB6 V00T0000 arc: JB7 H02W0301 arc: JD0 W1_H02E0001 arc: JD1 V02N0201 arc: JD2 W1_H02E0001 arc: JD3 V02N0201 arc: JD4 W1_H02E0001 arc: JD5 V00B0000 arc: JD6 N1_V02S0601 arc: JD7 E1_H02W0001 arc: JLSR0 V00T0100 arc: JLSR1 V00T0100 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 JF2 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 JF3 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 S3_V06N0303 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C67:CIB_DSP arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02S0301 arc: JB0 N1_V02S0301 arc: JB1 H02E0301 arc: JB2 H02E0101 arc: JB3 H02W0301 arc: JB4 H02W0101 arc: JB5 W1_H02E0301 arc: JB6 V00T0000 arc: JB7 W1_H02E0301 arc: JD0 H02W0201 arc: JD1 V00B0100 arc: JD2 N1_V01S0000 arc: JD3 E1_H02W0201 arc: JD4 H00L0100 arc: JD5 E1_H02W0001 arc: JD6 W1_H02E0201 arc: JD7 H02E0001 arc: JLSR1 V00B0000 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V06N0003 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C68:CIB_DSP arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0701 V02S0701 arc: H00L0000 S1_V02N0001 arc: H00R0000 V02N0401 arc: JB0 S1_V02N0101 arc: JB1 H02E0301 arc: JB2 S1_V02N0101 arc: JB3 H02E0301 arc: JB4 H00L0000 arc: JB5 H02E0301 arc: JB6 V00B0000 arc: JB7 H02E0301 arc: JCE3 H00R0000 arc: JD0 H02E0201 arc: JD1 V02N0001 arc: JD2 H02E0201 arc: JD3 V02N0001 arc: JD4 H02E0201 arc: JD5 V00B0000 arc: JD6 H02E0201 arc: JD7 V00B0000 arc: JLSR0 V00T0100 arc: JLSR1 V00T0100 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0303 V01N0101 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02N0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E1_H02W0001 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C69:CIB_DSP arc: E1_H01E0001 JF0 arc: E1_H01E0101 JF2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: H01W0000 JQ2 arc: H01W0100 JQ4 arc: JB0 V02S0301 arc: JB1 N1_V02S0301 arc: JB2 H00R0000 arc: JB3 N1_V02S0101 arc: JB4 S1_V02N0501 arc: JB5 H02W0101 arc: JB6 V00B0000 arc: JB7 N1_V02S0701 arc: JCE0 H02E0101 arc: JD0 N1_V02S0201 arc: JD1 E1_H02W0201 arc: JD2 H02E0201 arc: JD3 V02S0001 arc: JD4 N1_V02S0401 arc: JD5 H00R0100 arc: JD6 W1_H02E0001 arc: JD7 H00L0100 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N1_V01N0101 JQ1 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 JF3 arc: N1_V02N0401 JF6 arc: N1_V02N0501 JQ7 arc: N1_V02N0601 JQ6 arc: N1_V02N0701 JF7 arc: N3_V06N0203 V01N0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 JQ3 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 JF1 arc: W1_H02W0401 JF4 arc: W1_H02W0501 JQ5 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 JF5 arc: W3_H06W0003 JQ0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JA2MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JA0MUX 0 .tile CIB_R22C70:CIB_DSP arc: E1_H01E0001 JF0 arc: E1_H01E0101 JF1 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 V01N0001 arc: H01W0000 JQ4 arc: H01W0100 JQ0 arc: JB0 H02E0301 arc: JB1 H02E0101 arc: JB2 H02E0301 arc: JB3 H02E0101 arc: JB4 S1_V02N0501 arc: JB5 H02E0101 arc: JB6 S1_V02N0501 arc: JB7 H02E0101 arc: JD0 N1_V02S0001 arc: JD1 S1_V02N0201 arc: JD2 N1_V02S0001 arc: JD3 S1_V02N0201 arc: JD4 H02E0201 arc: JD5 S1_V02N0601 arc: JD6 H02E0201 arc: JD7 S1_V02N0601 arc: JLSR1 V00B0100 arc: N1_V01N0001 JQ7 arc: N1_V01N0101 JQ6 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 JQ1 arc: N1_V02N0401 JF6 arc: N1_V02N0501 JF7 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 JQ5 arc: N3_V06N0003 JF3 arc: N3_V06N0103 JF2 arc: N3_V06N0203 JF4 arc: N3_V06N0303 JF5 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 W3_H06E0203 arc: V00B0100 V02S0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 JQ3 arc: W3_H06W0103 JQ2 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JC1MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JC7MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JC5MUX 0 .tile CIB_R22C71:CIB_DSP arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V01N0001 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V01N0001 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: JB0 W1_H02E0301 arc: JB1 W1_H02E0101 arc: JB2 H00R0100 arc: JB3 H00R0000 arc: JB4 H00L0000 arc: JB5 H02W0301 arc: JB6 E1_H02W0101 arc: JB7 N1_V01S0000 arc: JD0 W1_H02E0201 arc: JD1 V02S0201 arc: JD2 H02W0001 arc: JD3 H02E0001 arc: JD4 H02W0201 arc: JD5 H00L0100 arc: JD6 V00B0000 arc: JD7 V02S0601 arc: JLSR0 V00B0100 arc: JLSR1 V00B0100 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 V01N0001 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W3_H06W0103 N1_V01S0100 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C72:CIB_DSP arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: JB0 W1_H02E0301 arc: JB1 W1_H02E0101 arc: JB2 W1_H02E0301 arc: JB3 W1_H02E0101 arc: JB4 W1_H02E0301 arc: JB5 W1_H02E0101 arc: JB6 W1_H02E0301 arc: JB7 W1_H02E0101 arc: JD0 V02S0001 arc: JD1 H00R0000 arc: JD2 W1_H02E0201 arc: JD3 V02S0201 arc: JD4 W1_H02E0201 arc: JD5 V00B0000 arc: JD6 W1_H02E0201 arc: JD7 H00R0100 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 V02S0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 .tile CIB_R22C73:CIB_DSP arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V02N0501 arc: H00R0100 V02N0701 arc: H01W0000 JF4 arc: H01W0100 JF6 arc: JB0 V02S0301 arc: JB1 V02S0101 arc: JB2 V02S0301 arc: JB3 V02S0101 arc: JB4 W1_H02E0301 arc: JB5 N1_V01S0000 arc: JB6 H02E0101 arc: JB7 W1_H02E0101 arc: JCE0 H00R0100 arc: JCE1 H00R0100 arc: JCE2 H00R0100 arc: JCE3 H00R0100 arc: JD0 V02S0201 arc: JD1 V02S0001 arc: JD2 V02S0201 arc: JD3 V02S0001 arc: JD4 W1_H02E0001 arc: JD5 V02N0401 arc: JD6 E1_H02W0001 arc: JD7 V02N0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 JF5 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 JF7 .tile CIB_R22C74:CIB_DSP arc: E1_H01E0001 JF7 arc: E1_H01E0101 JF3 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 S3_V06N0003 arc: H01W0000 JF0 arc: H01W0100 JF4 arc: JB0 S1_V02N0301 arc: JB1 V02S0101 arc: JB2 W1_H02E0301 arc: JB3 V02N0301 arc: JB4 W1_H02E0301 arc: JB5 V02N0501 arc: JB6 W1_H02E0301 arc: JB7 V02N0501 arc: JD0 W1_H02E0001 arc: JD1 S1_V02N0201 arc: JD2 N1_V01S0000 arc: JD3 S1_V02N0001 arc: JD4 V02N0401 arc: JD5 H02E0201 arc: JD6 V02N0401 arc: JD7 H02E0201 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 JF6 arc: V01S0000 N3_V06S0103 arc: V01S0100 JF5 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 JF1 arc: W3_H06W0103 JF2 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C75:CIB_DSP arc: E1_H01E0101 JF3 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N3_V06S0303 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 W1_H02E0501 arc: H01W0000 JF1 arc: H01W0100 JF0 arc: JB0 V02N0101 arc: JB1 W1_H02E0101 arc: JB2 V02N0101 arc: JB3 W1_H02E0101 arc: JB4 V00B0100 arc: JB5 W1_H02E0101 arc: JD0 W1_H02E0001 arc: JD1 V02N0201 arc: JD2 W1_H02E0001 arc: JD3 V02N0201 arc: JD4 H02E0201 arc: JD5 W1_H02E0201 arc: JLSR0 H02W0501 arc: JLSR1 H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 V02N0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 H01E0101 arc: W3_H06W0003 JF3 arc: W3_H06W0103 JF2 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JA1MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JC6MUX 0 .tile CIB_R22C76:CIB_DSP arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 N1_V01S0100 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0303 N1_V02S0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 S3_V06N0003 enum: CIB.JA5MUX 0 enum: CIB.JC4MUX 0 .tile CIB_R22C77:CIB_DSP arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 N1_V01S0100 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: V01S0000 N3_V06S0103 arc: W1_H02W0601 V06S0303 .tile CIB_R22C78:CIB_DSP arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V01S0100 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 V01N0001 arc: W1_H02W0701 V01N0101 .tile CIB_R22C79:CIB_DSP arc: E1_H02E0501 V01N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N3_V06S0303 .tile CIB_R22C80:CIB_DSP arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 V06N0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: W1_H02W0301 S3_V06N0003 .tile CIB_R22C81:CIB_DSP arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0201 N1_V01S0000 .tile CIB_R22C82:CIB_DSP arc: E1_H02E0101 S1_V02N0101 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 V06N0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 V01N0101 arc: W1_H02W0001 S3_V06N0003 .tile CIB_R22C83:CIB_DSP arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V01N0101 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 V01N0101 .tile CIB_R22C84:CIB_DSP arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 V06N0303 arc: E3_H06E0303 V06N0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N1_V01S0000 arc: W1_H02W0601 V06N0303 arc: W3_H06W0103 V01N0101 .tile CIB_R22C85:CIB_DSP arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 N3_V06S0103 .tile CIB_R22C86:CIB_DSP arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0701 S3_V06N0203 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 N3_V06S0203 arc: W1_H02W0001 W3_H06E0003 .tile CIB_R22C87:CIB_DSP arc: E1_H01E0101 W3_H06E0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0701 N1_V01S0100 .tile CIB_R22C88:CIB_DSP arc: E1_H02E0501 N3_V06S0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0701 N3_V06S0203 arc: V01S0000 S3_V06N0103 arc: W1_H02W0701 V01N0101 .tile CIB_R22C89:CIB_LR_S arc: JA0 N1_V02S0501 arc: JA3 H02E0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: V01S0100 N3_V06S0303 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R23C89:CIB_LR arc: JA0 V02N0701 arc: JA3 H02E0701 arc: N1_V02N0301 H06E0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H01E0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V01S0100 arc: W1_H02W0001 N3_V06S0003 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R24C89:CIB_LR arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 H02E0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 N3_V06S0303 .tile CIB_R25C89:CIB_LR arc: H01W0000 JF5 arc: JA0 N1_V02S0701 arc: JA3 N1_V02S0501 arc: JB0 N1_V02S0101 arc: S1_V02S0101 W3_H06E0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0501 V01N0101 enum: CIB.JB3MUX 0 .tile CIB_R26C89:CIB_LR arc: H01W0100 W3_H06E0303 arc: JA0 N1_V02S0701 arc: JA3 N1_V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 W3_H06E0003 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R27C89:CIB_LR arc: H01W0100 W3_H06E0303 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 H01E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 V02N0501 .tile CIB_R28C89:CIB_LR arc: JA0 V02S0501 arc: JA3 N1_V02S0501 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H06E0303 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 S3_V06N0303 enum: CIB.JB3MUX 0 enum: CIB.JB0MUX 0 .tile CIB_R29C89:CIB_LR arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: H01W0100 JF5 arc: JA0 H00R0000 arc: JA3 H00L0100 arc: JB0 H00R0100 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0101 H01E0101 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V06S0303 enum: CIB.JB3MUX 0 .tile CIB_R2C89:CIB_LR arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 V06N0003 .tile CIB_R30C89:CIB_LR arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S3_V06N0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 H06E0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 S1_V02N0701 .tile CIB_R31C1:CIB_LR arc: S1_V02S0701 JF5 .tile CIB_R31C89:CIB_LR arc: H00R0100 H02E0501 arc: H01W0000 JQ5 arc: JA0 N1_V02S0701 arc: JA3 H02E0701 arc: JB0 N1_V02S0101 arc: JB3 H00R0100 arc: N1_V01N0001 JF5 arc: N1_V02N0001 S3_V06N0003 .tile CIB_R32C89:CIB_LR arc: H00L0000 H02E0201 arc: H00R0100 H02E0501 arc: JA0 N1_V02S0501 arc: JA3 N1_V02S0701 arc: JB0 H00R0100 arc: JB3 H00L0000 arc: N1_V02N0701 JQ5 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H01E0101 arc: W1_H02W0701 JF5 .tile CIB_R33C1:CIB_LR arc: S3_V06S0203 N1_V02S0701 .tile CIB_R33C89:CIB_LR arc: N3_V06N0103 V01N0101 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 .tile CIB_R34C34:CIB_EBR arc: N3_V06N0103 V01N0101 .tile CIB_R34C61:CIB_EBR arc: N1_V02N0301 N1_V01S0100 .tile CIB_R34C86:CIB_EBR arc: E1_H02E0401 N3_V06S0203 .tile CIB_R34C87:CIB_EBR arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 .tile CIB_R34C88:CIB_EBR arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 V06S0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 N3_V06S0103 arc: S3_V06S0103 N3_V06S0103 .tile CIB_R34C89:CIB_LR_S arc: H01W0000 JQ5 arc: JA0 H02E0501 arc: JA3 H02E0701 arc: JB0 N1_V02S0101 arc: JB3 N1_V02S0301 arc: N1_V01N0101 JF5 arc: N3_V06N0303 S3_V06N0303 .tile CIB_R35C89:CIB_LR arc: N3_V06N0303 S3_V06N0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 .tile CIB_R36C89:CIB_LR arc: N3_V06N0203 S3_V06N0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 .tile CIB_R37C89:CIB_LR arc: N3_V06N0003 S3_V06N0303 .tile CIB_R38C1:CIB_LR arc: JD7 V02N0401 .tile CIB_R38C89:CIB_LR arc: H00L0100 H02E0101 arc: H00R0100 H02E0501 arc: H01W0000 JQ5 arc: JA3 H00L0100 arc: JB3 H00R0100 arc: S1_V02S0101 H01E0101 .tile CIB_R39C1:CIB_LR arc: N1_V02N0401 N3_V06S0203 .tile CIB_R39C89:CIB_LR arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 .tile CIB_R3C89:CIB_LR arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: W1_H02W0501 N1_V02S0501 .tile CIB_R40C89:CIB_LR arc: JA3 V02S0501 arc: JB3 N1_V02S0101 arc: N3_V06N0303 JQ5 .tile CIB_R41C89:CIB_LR arc: H00R0100 H02E0701 arc: JA0 W1_H02E0701 arc: JA3 N1_V02S0701 arc: JB0 W1_H02E0101 arc: JB3 H00R0100 arc: N3_V06N0303 JQ5 arc: S1_V02S0101 H01E0101 arc: S1_V02S0401 H01E0001 arc: S3_V06S0203 N3_V06S0203 arc: V01S0000 N3_V06S0103 arc: W1_H02W0501 JF5 .tile CIB_R42C89:CIB_LR arc: N3_V06N0203 V01N0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 .tile CIB_R43C89:CIB_LR arc: H00R0000 N1_V02S0401 arc: JA0 S1_V02N0701 arc: JA3 W1_H02E0701 arc: JB0 N1_V02S0101 arc: JB3 H00R0000 arc: N1_V01N0001 JF5 arc: N3_V06N0303 JQ5 .tile CIB_R44C89:CIB_LR arc: H00L0100 N1_V02S0301 arc: JA0 H00L0100 arc: S1_V02S0501 N1_V02S0401 enum: CIB.JB0MUX 0 .tile CIB_R45C89:CIB_LR arc: N1_V02N0701 N3_V06S0203 .tile CIB_R46C89:CIB_LR_S arc: JA0 V02N0701 arc: JA3 N1_V02S0501 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R47C89:CIB_LR arc: N1_V02N0701 N3_V06S0203 .tile CIB_R48C89:CIB_LR arc: S3_V06S0303 N3_V06S0303 .tile CIB_R4C89:CIB_PLL0 arc: S1_V02S0301 W1_H02E0301 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H01E0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 .tile CIB_R53C89:CIB_LR arc: JA0 V02N0501 enum: CIB.JB0MUX 0 .tile CIB_R54C89:CIB_LR arc: N1_V02N0501 N3_V06S0303 .tile CIB_R59C89:CIB_LR arc: JA0 H02E0701 arc: JA3 H01E0001 enum: CIB.JB0MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R5C1:CIB_PLL1 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R5C89:CIB_PLL1 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: W1_H02W0501 S3_V06N0303 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R61C89:CIB_LR arc: JA3 W1_H02E0501 enum: CIB.JB3MUX 0 .tile CIB_R6C89:CIB_LR arc: S1_V02S0401 H02E0401 arc: S3_V06S0003 N1_V02S0301 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02S0601 .tile CIB_R70C3:CIB_PLL3 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R70C42:VCIB_DCU0 enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C43:VCIB_DCUA enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C44:VCIB_DCUB enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C45:VCIB_DCUC enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C46:VCIB_DCUD enum: CIB.JA1MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C47:VCIB_DCUF enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C48:VCIB_DCU3 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C49:VCIB_DCU2 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C50:VCIB_DCUG enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C51:VCIB_DCUH enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C52:VCIB_DCUI enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C53:VCIB_DCU1 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 .tile CIB_R70C69:VCIB_DCU0 enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C6:CIB_EFB0 enum: CIB.JB3MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C70:VCIB_DCUA enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C71:VCIB_DCUB enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C72:VCIB_DCUC enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C73:VCIB_DCUD enum: CIB.JA1MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C74:VCIB_DCUF enum: CIB.JA1MUX 0 enum: CIB.JA3MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC2MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C75:VCIB_DCU3 enum: CIB.JA5MUX 0 enum: CIB.JA7MUX 0 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JC0MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC6MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C76:VCIB_DCU2 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C77:VCIB_DCUG enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C78:VCIB_DCUH enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C79:VCIB_DCUI enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB7MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD6MUX 0 .tile CIB_R70C7:CIB_EFB1 enum: CIB.JA3MUX 0 enum: CIB.JA4MUX 0 enum: CIB.JA5MUX 0 enum: CIB.JA6MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB4MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JB6MUX 0 enum: CIB.JC3MUX 0 enum: CIB.JC4MUX 0 enum: CIB.JC5MUX 0 enum: CIB.JD3MUX 0 enum: CIB.JD4MUX 0 enum: CIB.JD5MUX 0 .tile CIB_R70C80:VCIB_DCU1 enum: CIB.JB1MUX 0 enum: CIB.JB3MUX 0 enum: CIB.JB5MUX 0 enum: CIB.JD0MUX 0 enum: CIB.JD2MUX 0 .tile CIB_R70C87:CIB_PLL3 enum: CIB.JA3MUX 0 enum: CIB.JB3MUX 0 .tile CIB_R7C1:CIB_LR arc: E3_H06E0303 S3_V06N0303 .tile CIB_R7C89:CIB_LR arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 .tile CIB_R8C1:CIB_LR arc: E3_H06E0303 S3_V06N0303 .tile CIB_R8C89:CIB_LR arc: N1_V02N0401 S1_V02N0101 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02N0501 .tile CIB_R9C89:CIB_LR arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H06E0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 .tile MIB_R10C0:BANKREF7 enum: BANK.VCCIO 3V3 .tile MIB_R10C30:EBR_SPINE_UL0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R10C40:CMUX_UL_0 arc: G_DCS0CLK0 G_VPFN0000 arc: G_ULPCLK0 G_HPFE0000 .tile MIB_R10C41:CMUX_UR_0 arc: G_DCS0CLK1 G_VPFN0000 arc: G_URPCLK0 G_HPFE0000 .tile MIB_R10C50:EBR_SPINE_UR0 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R10C77:EBR_SPINE_UR1 arc: G_VPTX0000 G_HPRX0000 .tile MIB_R10C90:BANKREF2 enum: BANK.VCCIO 3V3 .tile MIB_R11C90:PICR0 arc: JDIA JPADDIA_PIO arc: JDIB JPADDIB_PIO enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R12C0:PICL1 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOD.BASE_TYPE INPUT_LVCMOS33 enum: PIOD.HYSTERESIS ON .tile MIB_R12C90:PICR1 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R13C0:PICL2 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOD.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R13C90:PICR2 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R14C0:PICL0 arc: JDIB JPADDIB_PIO enum: PIOB.BASE_TYPE INPUT_LVCMOS33 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R14C90:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R15C0:PICL1_DQS0 enum: PIOB.BASE_TYPE INPUT_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE INPUT_LVCMOS33 enum: PIOD.HYSTERESIS ON .tile MIB_R15C90:PICR1_DQS0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R16C0:PICL2_DQS1 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R16C90:PICR2_DQS1 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R17C0:PICL0_DQS2 arc: JDIB JPADDIB_PIO enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R17C90:PICR0_DQS2 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R18C0:PICL1_DQS3 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE INPUT_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R18C90:PICR1_DQS3 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R19C0:PICL2 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R19C90:PICR2 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R20C0:PICL0 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R20C90:PICR0 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R21C0:PICL1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R21C90:PICR1 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R22C42:MIB_DSP0 arc: JMULTA0 JMUIA0 arc: JMULTA1 JMUIA1 arc: JMULTA10 JMUIA10 arc: JMULTA11 JMUIA11 arc: JMULTA12 JMUIA12 arc: JMULTA13 JMUIA13 arc: JMULTA14 JMUIA14 arc: JMULTA15 JMUIA15 arc: JMULTA16 JMUIA16 arc: JMULTA17 JMUIA17 arc: JMULTA2 JMUIA2 arc: JMULTA3 JMUIA3 arc: JMULTA4 JMUIA4 arc: JMULTA5 JMUIA5 arc: JMULTA6 JMUIA6 arc: JMULTA7 JMUIA7 arc: JMULTA8 JMUIA8 arc: JMULTA9 JMUIA9 .tile MIB_R22C69:MIB_DSP0 arc: JMULTA0 JMUIA0 arc: JMULTA1 JMUIA1 arc: JMULTA10 JMUIA10 arc: JMULTA11 JMUIA11 arc: JMULTA12 JMUIA12 arc: JMULTA13 JMUIA13 arc: JMULTA14 JMUIA14 arc: JMULTA15 JMUIA15 arc: JMULTA16 JMUIA16 arc: JMULTA17 JMUIA17 arc: JMULTA2 JMUIA2 arc: JMULTA3 JMUIA3 arc: JMULTA4 JMUIA4 arc: JMULTA5 JMUIA5 arc: JMULTA6 JMUIA6 arc: JMULTA7 JMUIA7 arc: JMULTA8 JMUIA8 arc: JMULTA9 JMUIA9 .tile MIB_R22C90:MIB_CIB_LR_A enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R23C90:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R24C90:PICR1 enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R25C90:PICR2 enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R26C90:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R27C90:PICR1_DQS0 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R28C90:PICR2_DQS1 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R29C90:PICR0_DQS2 arc: JDIA JPADDIA_PIO enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R30C0:PICL1_DQS3 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 enum: PIOC.HYSTERESIS ON .tile MIB_R30C90:PICR1_DQS3 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.HYSTERESIS ON .tile MIB_R31C0:PICL2 enum: PIOC.BASE_TYPE INPUT_LVCMOS33 .tile MIB_R31C90:PICR2 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R32C90:PICR0 arc: JDIA JPADDIA_PIO arc: JDIB JPADDIB_PIO enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R33C90:PICR1 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON .tile MIB_R34C3:LMID_0 arc: G_LDCC0CLKI G_JLLQPCLKCIB0 .tile MIB_R34C90:MIB_CIB_LR_A enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R38C90:PICR0 arc: JDIB JPADDIB_PIO enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R39C90:PICR1_DQS0 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON .tile MIB_R40C90:PICR2_DQS1 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R41C90:PICR0_DQS2 arc: JDIA JPADDIA_PIO arc: JDIB JPADDIB_PIO enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R42C90:PICR1_DQS3 enum: PIOB.BASE_TYPE BIDIR_LVCMOS33 enum: PIOB.HYSTERESIS ON enum: PIOA.BASE_TYPE BIDIR_LVCMOS33 enum: PIOA.HYSTERESIS ON enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOC.HYSTERESIS ON enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.HYSTERESIS ON .tile MIB_R43C90:PICR2 enum: PIOC.BASE_TYPE BIDIR_LVCMOS33 enum: PIOD.BASE_TYPE BIDIR_LVCMOS33 .tile MIB_R44C90:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R45C90:PICR1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R46C90:MIB_CIB_LR_A enum: PIOC.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R53C90:PICR0_DQS2 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R54C90:PICR1_DQS3 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R58C40:CMUX_LL_0 arc: G_DCS1CLK0 G_VPFN0000 arc: G_LLPCLK0 G_HPFE0000 .tile MIB_R58C41:CMUX_LR_0 arc: G_DCS1CLK1 G_VPFN0000 arc: G_LRPCLK0 G_HPFE0000 .tile MIB_R59C90:PICR0 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R60C90:PICR1 enum: PIOA.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOB.BASE_TYPE OUTPUT_LVCMOS33 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R61C90:PICR2 enum: PIOD.BASE_TYPE OUTPUT_LVCMOS33 .tile MIB_R71C4:EFB0_PICB0 unknown: F54B1 unknown: F56B1 unknown: F82B1 unknown: F94B1 .tile MIB_R71C89:BANKREF3 enum: BANK.VCCIO 3V3 .tile R11C22:PLC2 arc: E1_H02E0401 S1_V02N0401 .tile R11C23:PLC2 arc: CLK0 G_HPBX0000 arc: LSR1 E1_H02W0301 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0601 Q6 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C25:PLC2 arc: W1_H02W0301 V02N0301 .tile R11C27:PLC2 arc: E1_H02E0101 E3_H06W0103 .tile R11C28:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 .tile R11C29:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: N1_V02N0301 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: LSR0 H02E0301 arc: M4 V00B0100 arc: M7 H02E0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V00B0100 Q7 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET SET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C2:PLC2 arc: S3_V06S0003 N3_V06S0303 .tile R11C30:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 V06S0303 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: A0 H02E0501 arc: A3 S1_V02N0701 arc: A4 S1_V02N0101 arc: A5 V00B0000 arc: A6 N1_V02S0301 arc: A7 N1_V02S0301 arc: B0 H01W0100 arc: B2 F3 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 V00B0000 arc: B7 V02S0701 arc: C0 H02E0401 arc: C2 H02W0401 arc: C3 S1_V02N0601 arc: C4 Q4 arc: C5 H02E0401 arc: C6 Q6 arc: C7 V00T0100 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V01S0100 arc: D3 V00T0100 arc: D4 H01W0000 arc: D5 H02E0201 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0101 F2 arc: E1_H02E0401 F6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q6 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q3 arc: V00B0000 Q4 arc: V00T0100 Q1 arc: V01S0000 F0 arc: V01S0100 F4 word: SLICEC.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 1111111010101110 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0100010001010000 word: SLICED.K1.INIT 1000100010100000 word: SLICEB.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 0000001000010011 word: SLICEB.K0.INIT 1111000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C31:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E3_H06E0103 H01E0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E3_H06W0203 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02E0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H02W0701 arc: A4 E1_H02W0701 arc: A5 Q5 arc: A6 F7 arc: A7 E1_H01W0000 arc: B0 W1_H02E0301 arc: B1 Q1 arc: B2 H01W0100 arc: B4 V00B0100 arc: B5 S1_V02N0701 arc: B6 V02S0501 arc: B7 V00B0000 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: C2 W1_H02E0401 arc: C4 H02E0401 arc: C5 E1_H02W0601 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE0 H00R0100 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 W1_H02E0001 arc: D2 E1_H02W0201 arc: D4 H02E0201 arc: D5 H00L0100 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M0 H02W0601 arc: M1 H02E0001 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: V00T0000 F2 arc: V01S0000 F6 arc: V01S0100 Q5 word: SLICED.K1.INIT 0001000011010000 word: SLICEB.K0.INIT 0000000000110101 word: SLICED.K0.INIT 0000010011001100 word: SLICEA.K0.INIT 1100010010000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 0000000011111101 word: SLICEC.K1.INIT 0000010011000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C32:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 F5 arc: A3 F7 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 S1_V02N0101 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H02W0101 arc: B4 H02W0301 arc: B5 S1_V02N0501 arc: B6 H01E0101 arc: B7 H02W0301 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H02E0401 arc: C3 E1_H01W0000 arc: C4 H01E0001 arc: C5 S1_V02N0201 arc: C6 N1_V02S0001 arc: C7 S1_V02N0001 arc: CE0 H02E0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02E0001 arc: D2 V01S0100 arc: D3 H00R0000 arc: D4 E1_H01W0100 arc: D5 H01W0000 arc: D6 W1_H02E0201 arc: D7 E1_H01W0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 V00B0000 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 V00B0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F0 arc: V00T0100 Q1 arc: V01S0100 F7 arc: W1_H02W0601 F4 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 1010100000100000 word: SLICEA.K1.INIT 1101110111110101 word: SLICEC.K0.INIT 1100111111000000 word: SLICED.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 0000000100001101 word: SLICED.K1.INIT 0010000001110000 word: SLICEB.K0.INIT 1010111110101100 word: SLICEB.K1.INIT 1111111111111010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C33:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 V02S0001 arc: H00L0100 H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0201 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 V06S0303 arc: A0 F5 arc: A2 E1_H02W0701 arc: A3 S1_V02N0701 arc: A4 V00T0100 arc: A5 E1_H02W0501 arc: A6 E1_H01W0000 arc: A7 N1_V01N0101 arc: B0 H02W0101 arc: B1 E1_H02W0301 arc: B2 E1_H02W0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02S0501 arc: B6 H01E0101 arc: B7 V00B0100 arc: C0 H00R0100 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 H02E0601 arc: C4 E1_H02W0401 arc: C5 F4 arc: C6 W1_H02E0601 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 N1_V02S0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 W1_H02E0001 arc: D2 V02S0201 arc: D3 S1_V02N0001 arc: D4 V02S0401 arc: D5 F2 arc: D6 V02N0601 arc: D7 V02N0401 arc: E1_H01E0001 F1 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M1 H00L0000 arc: M3 H00L0000 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F0 arc: V00T0100 Q1 arc: V01S0000 Q4 arc: W1_H02W0101 F3 arc: W1_H02W0301 Q1 word: SLICEC.K0.INIT 1010000011000000 word: SLICEB.K0.INIT 0100010001010000 word: SLICEC.K1.INIT 0011001100110001 word: SLICEA.K0.INIT 1010101010101000 word: SLICED.K1.INIT 0000000101010101 word: SLICEA.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1101110000000000 word: SLICEB.K1.INIT 0000010100010001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C34:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 H01E0001 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H02E0501 arc: A2 S1_V02N0501 arc: A3 H02W0701 arc: A4 S1_V02N0301 arc: A5 H02W0701 arc: A6 F7 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B2 H02E0101 arc: B3 H00R0000 arc: B4 V01S0000 arc: B5 V00B0100 arc: B7 E1_H02W0301 arc: C0 N1_V02S0601 arc: C1 F4 arc: C2 H00R0100 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V00T0000 arc: C6 H02W0601 arc: C7 V00T0000 arc: CE0 W1_H02E0101 arc: CE1 H00L0100 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 Q2 arc: D3 H02E0201 arc: D4 E1_H02W0201 arc: D5 V02S0401 arc: D6 F0 arc: D7 N1_V02S0601 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H00R0100 Q7 arc: H01W0000 F6 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: W1_H02W0101 F3 arc: W1_H02W0501 F5 word: SLICEC.K1.INIT 1010000010001000 word: SLICEB.K1.INIT 0101000001000100 word: SLICED.K1.INIT 1110001000000000 word: SLICEA.K0.INIT 0000111000000010 word: SLICED.K0.INIT 0000000000000101 word: SLICEB.K0.INIT 0000010010001100 word: SLICEC.K0.INIT 0000000000100111 word: SLICEA.K1.INIT 0101010101010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C35:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V06S0303 arc: H01W0100 E3_H06W0303 arc: N1_V02N0301 S1_V02N0201 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02W0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 E1_H02W0501 arc: A4 F5 arc: A5 E1_H01W0000 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 H02W0101 arc: B4 H02E0101 arc: B5 H02W0301 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C2 H02W0601 arc: C5 N1_V02S0001 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 N1_V02S0001 arc: D4 F2 arc: D5 E1_H01W0100 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00B0000 arc: V01S0100 F4 word: SLICEC.K1.INIT 1011000010000000 word: SLICEB.K0.INIT 0000000011011000 word: SLICEC.K0.INIT 0000000000010001 word: SLICEA.K0.INIT 1111000100000000 word: SLICEA.K1.INIT 0000000100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R11C36:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 V06S0303 arc: H00L0000 V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E1_H01W0100 arc: A0 F7 arc: A1 F7 arc: A2 F5 arc: A4 N1_V01N0101 arc: A5 V00B0000 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 E1_H02W0301 arc: B2 H02W0301 arc: B4 S1_V02N0501 arc: B5 V02S0501 arc: B6 H02E0101 arc: B7 S1_V02N0501 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 F6 arc: C4 S1_V02N0201 arc: C5 H02E0401 arc: C6 H02E0401 arc: C7 S1_V02N0201 arc: CE0 H00L0100 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V02N0001 arc: D4 V00B0000 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 H00R0100 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 E1_H02W0601 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: V00B0000 Q4 arc: V00T0100 Q1 arc: V01S0000 F0 arc: V01S0100 F4 arc: W1_H02W0101 Q3 arc: W1_H02W0601 Q4 word: SLICED.K1.INIT 0001000011010000 word: SLICEC.K0.INIT 0000010000000111 word: SLICEA.K0.INIT 1100111111001010 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K0.INIT 1110000000100000 word: SLICEC.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 0011001100110111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C37:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V02N0701 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0601 arc: H01W0100 E3_H06W0303 arc: N1_V02N0401 V01N0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: A1 H02E0701 arc: A2 E1_H02W0701 arc: A4 H02W0701 arc: A5 N1_V01N0101 arc: A7 S1_V02N0101 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 S1_V02N0101 arc: B3 H01W0100 arc: B4 V00B0100 arc: B5 H02E0301 arc: B7 V01S0000 arc: C0 W1_H02E0401 arc: C1 W1_H02E0601 arc: C2 N1_V01N0001 arc: C3 E1_H02W0401 arc: C4 W1_H02E0401 arc: C7 E1_H02W0401 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 F0 arc: D2 Q2 arc: D3 V00B0100 arc: D4 E1_H01W0100 arc: D5 H00R0100 arc: D7 S1_V02N0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 V00T0100 arc: M5 H00L0100 arc: M7 E1_H01W0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q2 arc: S1_V02S0501 F5 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V01S0000 Q7 arc: V01S0100 F3 arc: W1_H02W0301 F1 word: SLICEB.K0.INIT 0000100001001100 word: SLICED.K1.INIT 0000010100010001 word: SLICEA.K0.INIT 1100000010100000 word: SLICEC.K0.INIT 0000111000000100 word: SLICEA.K1.INIT 0101010101000101 word: SLICEB.K1.INIT 1111001111000000 word: SLICEC.K1.INIT 1110111000100010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C38:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V06N0303 arc: H00R0100 H02E0701 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02N0101 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: W3_H06W0303 E3_H06W0203 arc: A2 V02N0701 arc: A3 H02E0701 arc: B0 E1_H02W0101 arc: B2 H00R0100 arc: C0 H02E0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: H01W0000 F0 arc: H01W0100 Q0 arc: LSR1 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0001 F2 arc: W1_H02W0001 F0 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 0000101100001000 word: SLICEB.K1.INIT 0000010100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C39:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V06N0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 H00L0100 arc: A3 H00L0100 arc: A5 Q5 arc: A6 E1_H02W0701 arc: A7 E1_H02W0701 arc: B0 H01W0100 arc: B1 H01W0100 arc: B3 H01W0100 arc: B5 S1_V02N0701 arc: B6 V01S0000 arc: B7 H02E0301 arc: C0 V02S0401 arc: C1 V02S0401 arc: C3 S1_V02N0601 arc: C5 S1_V02N0001 arc: C6 V02N0001 arc: C7 V02N0001 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D3 S1_V02N0001 arc: D5 E1_H01W0100 arc: D6 E1_H01W0100 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E1_H02E0201 F0 arc: E1_H02E0501 F5 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M3 H00R0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 Q5 arc: V01S0100 F7 word: SLICEC.K1.INIT 0000000100001101 word: SLICEB.K1.INIT 0101001100000000 word: SLICEA.K0.INIT 0101000000110000 word: SLICEA.K1.INIT 0101111100111111 word: SLICED.K0.INIT 0000111000000100 word: SLICED.K1.INIT 1110000001000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C40:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 H02E0701 arc: A4 E1_H01W0000 arc: A5 V02N0301 arc: A6 F5 arc: A7 Q7 arc: B0 V02N0101 arc: B2 H00L0000 arc: B4 V02S0701 arc: B5 H02W0301 arc: B6 V01S0000 arc: B7 H02W0101 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0401 arc: C4 Q4 arc: C5 V02S0001 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE2 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 H02W0201 arc: D4 W1_H02E0201 arc: D5 H02W0201 arc: D6 V02S0401 arc: D7 H02W0201 arc: E1_H01E0101 F6 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 N1_V01N0001 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F4 arc: V00T0000 F2 arc: V01S0000 F7 arc: V01S0100 Q7 word: SLICEA.K0.INIT 1100111111001010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 0100011100000000 word: SLICEB.K0.INIT 1111110011101110 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 0011000001010000 word: SLICED.K1.INIT 0000001100000101 word: SLICED.K0.INIT 1110111000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C41:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 W3_H06E0003 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0100 V02S0701 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 H02W0701 arc: A3 V00B0000 arc: A4 E1_H02W0701 arc: A5 H02W0501 arc: A6 H02W0701 arc: B1 Q1 arc: B3 Q3 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 V01S0000 arc: C1 N1_V01N0001 arc: C3 E1_H02W0401 arc: C4 N1_V02S0001 arc: C5 F4 arc: C6 Q6 arc: CE0 E1_H02W0101 arc: CE1 H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D3 V01S0100 arc: D4 H01W0000 arc: D5 H00L0100 arc: D6 W1_H02E0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 F3 arc: H01W0000 Q6 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: S1_V02S0501 F5 arc: V01S0000 Q4 arc: V01S0100 Q1 arc: W1_H02W0101 Q3 arc: W1_H02W0301 Q1 arc: W1_H02W0401 Q4 word: SLICEA.K1.INIT 0010011100000000 word: SLICED.K0.INIT 0000000000011011 word: SLICEC.K0.INIT 0000111000000100 word: SLICEB.K1.INIT 1010100000001000 word: SLICEC.K1.INIT 1010101010100010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C42:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 H06W0303 arc: V00B0000 N1_V02S0201 arc: V00T0000 W1_H02E0201 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 F7 arc: A1 F7 arc: A2 V02S0701 arc: A3 E1_H01E0001 arc: A4 E1_H02W0501 arc: A5 Q5 arc: A6 F5 arc: A7 Q7 arc: B0 H02W0301 arc: B2 H02E0101 arc: B3 H02E0301 arc: B4 V01S0000 arc: B5 V00B0100 arc: B7 S1_V02N0701 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C4 H02E0401 arc: C5 H02W0401 arc: C6 H02E0601 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02W0001 arc: D2 E1_H02W0201 arc: D3 V02N0001 arc: D4 H02E0201 arc: D5 H02E0001 arc: D6 H02W0201 arc: D7 H01W0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M0 H01E0001 arc: M1 W1_H02E0001 arc: M2 V00B0000 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q5 arc: N1_V02N0301 F3 arc: V00B0100 Q7 arc: V01S0000 F2 arc: V01S0100 F6 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q1 word: SLICED.K1.INIT 0001000011010000 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K0.INIT 0100010000001100 word: SLICEC.K0.INIT 1110111111100000 word: SLICEB.K1.INIT 0011010100000000 word: SLICEC.K1.INIT 1010110000000000 word: SLICED.K0.INIT 0000000000000101 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C43:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 V06N0003 arc: E3_H06E0303 H01E0101 arc: H00L0100 V02S0301 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: A1 H00R0000 arc: A2 E1_H02W0501 arc: A3 W1_H02E0701 arc: A4 N1_V01N0101 arc: A5 F7 arc: A6 F5 arc: A7 E1_H01W0000 arc: B1 V00T0000 arc: B2 H00R0000 arc: B3 E1_H01W0100 arc: B4 S1_V02N0701 arc: B5 F3 arc: B6 N1_V02S0501 arc: B7 V02S0501 arc: C0 H02E0601 arc: C1 E1_H02W0601 arc: C2 V02N0601 arc: C3 E1_H02W0401 arc: C4 N1_V02S0001 arc: C5 E1_H02W0601 arc: C6 V01N0101 arc: C7 W1_H02E0401 arc: CE0 H00L0100 arc: CE1 H02E0101 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0001 arc: D2 N1_V02S0201 arc: D3 V02S0001 arc: D4 E1_H02W0001 arc: D5 H02W0001 arc: D6 H02E0201 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H00R0100 Q7 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M2 V00B0000 arc: M3 H00R0100 arc: M4 V00B0100 arc: M6 V00T0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N3_V06N0103 Q2 arc: N3_V06N0303 F6 arc: S1_V02S0501 Q7 arc: V00B0000 Q6 arc: V01S0000 Q0 arc: V01S0100 F0 arc: W1_H02W0201 F2 word: SLICEA.K0.INIT 1111101000001010 word: SLICEC.K0.INIT 0000000000011101 word: SLICEA.K1.INIT 0000001100000101 word: SLICED.K1.INIT 0000000000110101 word: SLICEB.K1.INIT 0001101100000000 word: SLICEC.K1.INIT 1110000011101111 word: SLICED.K0.INIT 0000110001000100 word: SLICEB.K0.INIT 0000111000000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C44:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 V06N0303 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0501 arc: A4 H02W0701 arc: A5 Q5 arc: A7 E1_H01W0000 arc: B0 E1_H01W0100 arc: B1 V00B0000 arc: B2 V01N0001 arc: B4 H02W0101 arc: B5 H02W0301 arc: B7 V00T0000 arc: C0 H00R0100 arc: C1 V02N0401 arc: C2 E1_H01W0000 arc: C4 H02E0401 arc: C5 H02E0601 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 S1_V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02W0201 arc: D2 V02S0201 arc: D4 H00R0100 arc: D5 E1_H01W0100 arc: E1_H01E0101 F7 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q3 arc: H01W0100 Q7 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 E1_H01E0101 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q3 arc: S1_V02S0101 Q1 arc: S1_V02S0701 Q7 arc: V00T0100 F1 arc: V01S0000 Q1 arc: V01S0100 F4 arc: W1_H02W0001 F2 word: SLICEA.K1.INIT 0000010010001100 word: SLICEB.K0.INIT 1111111111100100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0010001000001010 word: SLICED.K1.INIT 1100101011001010 word: SLICEC.K0.INIT 1000101010000000 word: SLICEC.K1.INIT 1110111100101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C45:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 H02W0401 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H02W0601 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 F5 arc: A1 F5 arc: A3 H02E0701 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 F3 arc: B1 W1_H02E0301 arc: B3 Q3 arc: B5 H00L0000 arc: B7 V01S0000 arc: C0 H00R0100 arc: C3 S1_V02N0401 arc: C5 S1_V02N0201 arc: C6 Q6 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V01S0100 arc: D3 S1_V02N0201 arc: D5 S1_V02N0401 arc: D6 V00B0000 arc: D7 S1_V02N0401 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M1 H02W0001 arc: M3 H00L0100 arc: M5 H02W0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q1 arc: V01S0000 Q6 arc: V01S0100 F7 arc: W1_H02W0101 Q3 arc: W1_H02W0401 Q6 word: SLICEB.K1.INIT 0000000000110101 word: SLICED.K1.INIT 0011000001010000 word: SLICEC.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111101110 word: SLICED.K0.INIT 1111000010101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C46:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 V06S0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0701 arc: A1 S1_V02N0701 arc: A2 N1_V02S0501 arc: A3 N1_V02S0501 arc: A4 V00B0000 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 F5 arc: B0 E1_H01W0100 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H02W0301 arc: B5 V02S0501 arc: B6 S1_V02N0501 arc: B7 V00B0100 arc: C0 N1_V02S0601 arc: C1 V02S0601 arc: C2 N1_V02S0601 arc: C3 E1_H02W0401 arc: C4 H02E0401 arc: C5 H02W0401 arc: C6 S1_V02N0201 arc: C7 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 H02E0201 arc: D2 H02W0201 arc: D3 H02E0201 arc: D4 W1_H02E0201 arc: D5 N1_V02S0601 arc: D6 H01W0000 arc: D7 F0 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: E1_H02E0301 F1 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M1 H00R0100 arc: M3 E1_H02W0201 arc: M5 H00R0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q6 arc: N1_V02N0301 Q1 arc: N1_V02N0401 F4 arc: S1_V02S0301 Q1 arc: V00B0000 Q6 arc: V01S0000 F7 arc: V01S0100 F2 word: SLICEB.K1.INIT 0011010100000000 word: SLICEA.K1.INIT 0000000000011011 word: SLICED.K0.INIT 0000010000000111 word: SLICEC.K0.INIT 0010001000110000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEA.K0.INIT 1101000010000000 word: SLICEC.K1.INIT 0000000011001010 word: SLICED.K1.INIT 1111000010110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C47:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 H01E0101 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 F7 arc: A2 H02E0701 arc: A4 N1_V02S0301 arc: A7 Q7 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 W1_H02E0301 arc: B4 H00R0000 arc: B7 N1_V02S0501 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H02W0401 arc: C4 Q4 arc: C7 E1_H02W0601 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D4 W1_H02E0201 arc: D7 S1_V02N0401 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0501 Q7 arc: V00B0000 F4 word: SLICEC.K0.INIT 0000000001000111 word: SLICED.K1.INIT 0101000000110000 word: SLICEB.K0.INIT 0000010011000100 word: SLICEA.K0.INIT 1110111011100010 word: SLICEA.K1.INIT 1111111111110011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C48:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0001 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 H06W0303 arc: V00B0000 W1_H02E0401 arc: V00T0000 H02E0201 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 N1_V02S0701 arc: A1 H02E0701 arc: A2 V00T0000 arc: A3 E1_H01E0001 arc: A4 N1_V02S0301 arc: A7 Q7 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B2 S1_V02N0101 arc: B3 S1_V02N0301 arc: B4 V02S0701 arc: B7 V01S0000 arc: C0 H02E0401 arc: C2 E1_H02W0401 arc: C3 S1_V02N0401 arc: C4 V00B0100 arc: C7 E1_H02W0601 arc: CE0 W1_H02E0101 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 F0 arc: D3 V00B0100 arc: D4 H01W0000 arc: D7 H00R0100 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 F7 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00B0000 arc: M5 H00L0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V02N0601 F4 arc: N3_V06N0103 Q2 arc: V00B0100 Q7 arc: V00T0100 F3 arc: V01S0000 Q1 arc: V01S0100 F2 arc: W1_H02W0001 Q2 word: SLICEB.K1.INIT 0001000000010011 word: SLICEA.K0.INIT 1111110010101010 word: SLICEA.K1.INIT 1110111011111111 word: SLICEB.K0.INIT 0100000001001100 word: SLICEC.K0.INIT 0101010000010000 word: SLICED.K1.INIT 0000110000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C49:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 V06N0303 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02W0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0501 arc: A6 E1_H01W0000 arc: B0 V02N0301 arc: B6 W1_H02E0301 arc: C0 V02N0601 arc: C6 V00B0100 arc: D0 H02W0001 arc: D6 V02S0601 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: M0 H02E0601 arc: S1_V02S0001 F0 word: SLICEA.K0.INIT 1010111111001111 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100000010001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R11C50:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 F5 arc: A1 F5 arc: A2 V02S0501 arc: A3 H02E0701 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 H02W0301 arc: B3 V02N0301 arc: B4 F3 arc: B5 N1_V02S0701 arc: B6 N1_V02S0701 arc: B7 H02W0301 arc: C0 N1_V02S0401 arc: C2 E1_H01W0000 arc: C3 N1_V02S0601 arc: C4 H02E0601 arc: C5 E1_H02W0601 arc: C6 H02E0401 arc: C7 V00T0100 arc: CE0 V02S0201 arc: CE1 H02W0101 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 H02W0201 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 H02W0201 arc: D6 N1_V02S0601 arc: D7 H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0100 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: N1_V02N0201 Q2 arc: N3_V06N0103 Q2 arc: V00T0100 Q1 arc: V01S0000 F7 arc: V01S0100 Q7 arc: W1_H02W0501 Q7 word: SLICEA.K1.INIT 1111111111101110 word: SLICEC.K1.INIT 0011000001010000 word: SLICEB.K0.INIT 0000001100010001 word: SLICED.K1.INIT 0100010000001100 word: SLICED.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1101000010000000 word: SLICEC.K0.INIT 0000000000000011 word: SLICEA.K0.INIT 1111001111100010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C51:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02E0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 W1_H02E0701 arc: A1 W1_H02E0501 arc: A2 F7 arc: A3 V02S0701 arc: A4 E1_H02W0701 arc: A5 E1_H01W0000 arc: A6 S1_V02N0101 arc: A7 W1_H02E0701 arc: B0 H02E0101 arc: B1 V02S0101 arc: B2 E1_H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 H02E0601 arc: C1 F4 arc: C2 N1_V02S0601 arc: C3 V02N0601 arc: C4 H01E0001 arc: C5 E1_H01E0101 arc: C6 S1_V02N0001 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 V00B0100 arc: D3 V01S0100 arc: D4 F0 arc: D5 V02S0601 arc: D6 H00L0100 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q0 arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M3 H00L0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: S1_V02S0101 F1 arc: V01S0000 Q3 arc: V01S0100 Q6 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0010000001110000 word: SLICEB.K1.INIT 1110000001000000 word: SLICEC.K1.INIT 0000010100000000 word: SLICEA.K0.INIT 0000111000000100 word: SLICED.K1.INIT 1110000001000000 word: SLICEB.K0.INIT 1110000011110000 word: SLICEC.K0.INIT 1100110011001000 word: SLICEA.K1.INIT 1100010011000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C52:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 N1_V02S0501 arc: A1 F5 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 H02E0701 arc: A7 Q7 arc: B0 F3 arc: B1 N1_V02S0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 N1_V02S0701 arc: B6 H02W0301 arc: B7 V02S0701 arc: C0 N1_V01N0001 arc: C3 W1_H02E0401 arc: C4 H02E0401 arc: C5 V00T0000 arc: C6 S1_V02N0001 arc: C7 E1_H01E0101 arc: CE1 H00L0100 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D3 H02E0001 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 F0 arc: D7 V02N0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F4 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0501 arc: M0 H01E0001 arc: M3 H00L0000 arc: M5 W1_H02E0001 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q7 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: V01S0000 Q3 arc: V01S0100 F6 word: SLICED.K0.INIT 0001000011010000 word: SLICEA.K0.INIT 1100110011111010 word: SLICEB.K1.INIT 0000000000110101 word: SLICEC.K1.INIT 0000000000110101 word: SLICED.K1.INIT 0000000011100010 word: SLICEA.K1.INIT 1111111111101110 word: SLICEC.K0.INIT 0000000011001010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C53:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 H02W0001 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 H06W0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E3_H06W0203 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0701 arc: A1 H02W0701 arc: A3 H02W0501 arc: A4 V02S0301 arc: A5 N1_V02S0101 arc: A7 V02N0301 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 N1_V02S0101 arc: B3 H02E0301 arc: B4 H02E0301 arc: B5 H02W0101 arc: B6 H02W0101 arc: B7 N1_V02S0701 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 S1_V02N0401 arc: C3 N1_V02S0601 arc: C4 H02W0601 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: C7 W1_H02E0401 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02W0201 arc: D2 N1_V02S0201 arc: D3 H00R0000 arc: D4 E1_H01W0100 arc: D5 W1_H02E0001 arc: D6 V02S0601 arc: D7 S1_V02N0601 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0601 F4 arc: S1_V02S0001 F0 arc: S1_V02S0501 F5 arc: S1_V02S0601 F6 arc: S1_V02S0701 F7 arc: V00T0000 F2 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICED.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 0000000011100010 word: SLICEC.K0.INIT 0011001000010000 word: SLICEB.K1.INIT 1100111110001011 word: SLICEB.K0.INIT 1111110000001100 word: SLICEA.K0.INIT 1000100010100000 word: SLICEA.K1.INIT 1101110111110101 word: SLICED.K1.INIT 0000000010101100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C54:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 N1_V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 H02W0601 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 W1_H02E0401 arc: V00B0100 N1_V02S0301 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 E1_H01W0100 arc: A0 S1_V02N0501 arc: A1 H00R0000 arc: A2 E1_H01E0001 arc: A3 H02W0701 arc: A4 V02S0101 arc: A5 V00T0100 arc: A6 V02N0301 arc: A7 V00T0100 arc: B0 N1_V02S0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 N1_V02S0301 arc: B4 V02N0501 arc: B6 H02E0101 arc: B7 H02E0101 arc: C0 N1_V02S0401 arc: C1 N1_V01N0001 arc: C2 E1_H02W0601 arc: C3 N1_V02S0401 arc: C4 H02E0401 arc: C5 S1_V02N0201 arc: C6 V02S0001 arc: C7 H02E0601 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 W1_H02E0201 arc: D4 V02S0601 arc: D5 V02S0401 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F3 arc: E1_H02E0001 F0 arc: E1_H02E0101 F3 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F0 arc: N1_V02N0201 F0 arc: N3_V06N0003 F3 arc: S1_V02S0001 F2 arc: S1_V02S0101 F1 arc: S1_V02S0701 F5 arc: S3_V06S0003 F0 arc: V00T0100 Q1 arc: V01S0000 F4 arc: V01S0100 F0 arc: W1_H02W0301 F3 arc: W1_H02W0401 F6 arc: W1_H02W0501 F7 arc: W1_H02W0601 Q6 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 0000000011001010 word: SLICEA.K1.INIT 1110010000000000 word: SLICED.K0.INIT 0000110001000100 word: SLICED.K1.INIT 0001000100000011 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 1111101000001010 word: SLICEB.K1.INIT 1111111100100000 word: SLICEA.K0.INIT 1010101011101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R11C55:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 H01E0101 arc: H00L0100 W1_H02E0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0501 E3_H06W0303 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 H01E0101 arc: V00B0000 V02N0201 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E3_H06W0103 arc: A1 W1_H02E0501 arc: A2 H02W0701 arc: A3 N1_V02S0701 arc: A4 N1_V02S0101 arc: A7 E1_H01W0000 arc: B0 V02S0101 arc: B2 E1_H02W0301 arc: B4 H00L0000 arc: B5 N1_V02S0701 arc: B6 S1_V02N0501 arc: B7 N1_V02S0501 arc: C0 H02E0601 arc: C1 N1_V02S0401 arc: C3 E1_H02W0601 arc: C4 E1_H02W0401 arc: C5 V02N0201 arc: C6 V00T0000 arc: C7 V02S0201 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 V02S0401 arc: D6 N1_V02S0401 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E1_H02E0101 F1 arc: E1_H02E0201 Q0 arc: E1_H02E0301 F1 arc: E1_H02E0401 F6 arc: E1_H02E0601 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q5 arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: M5 W1_H02E0001 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N1_V02N0101 F3 arc: N1_V02N0401 F6 arc: N1_V02N0601 Q6 arc: N1_V02N0701 Q7 arc: N3_V06N0003 F3 arc: N3_V06N0303 F5 arc: S1_V02S0301 F1 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S3_V06S0003 F3 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V00B0100 F7 arc: V01S0000 Q0 arc: V01S0100 Q7 arc: W1_H02W0101 F1 arc: W1_H02W0201 Q0 arc: W1_H02W0301 F3 arc: W1_H02W0401 F6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F1 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1100110011110000 word: SLICED.K1.INIT 0011000000100010 word: SLICEB.K0.INIT 0000000000010001 word: SLICEC.K0.INIT 1111000000100000 word: SLICEC.K1.INIT 1111110011110000 word: SLICED.K0.INIT 1111110011001100 word: SLICEB.K1.INIT 1111101011110000 word: SLICEA.K1.INIT 1111101010101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R11C56:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 H01E0101 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06W0203 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 N1_V02S0701 arc: A3 S1_V02N0701 arc: A4 V02N0301 arc: A5 V00T0000 arc: A6 H02W0701 arc: A7 H00R0000 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 V02N0101 arc: B3 N1_V02S0301 arc: B4 H02W0101 arc: B6 H02W0101 arc: B7 V02N0701 arc: C0 V02N0401 arc: C1 V02N0601 arc: C2 V02N0601 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V02N0001 arc: C6 V02N0201 arc: C7 E1_H01E0101 arc: CE0 N1_V02S0201 arc: CE1 W1_H02E0101 arc: CE2 H00L0000 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 Q2 arc: D3 F2 arc: D4 H02W0201 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 W1_H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F6 arc: N1_V02N0001 Q2 arc: N1_V02N0601 F4 arc: V00B0000 Q6 arc: V00B0100 F5 arc: V01S0100 Q1 arc: W1_H02W0701 F7 word: SLICEC.K1.INIT 1111010110100000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEB.K0.INIT 0100000001001100 word: SLICEB.K1.INIT 1010111110001101 word: SLICED.K1.INIT 1010000010001000 word: SLICEC.K0.INIT 0001110100000000 word: SLICED.K0.INIT 0000010000010101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C57:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 W3_H06E0103 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A1 H02W0701 arc: A2 H00L0100 arc: A3 E1_H01E0001 arc: A4 S1_V02N0301 arc: A5 H02W0701 arc: A6 F7 arc: A7 Q7 arc: B0 V02N0101 arc: B1 H01W0100 arc: B2 H00L0000 arc: B4 V02N0701 arc: B5 H00L0000 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 H02E0601 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 F4 arc: C4 Q4 arc: C5 H02E0401 arc: C6 E1_H01E0101 arc: C7 H02E0601 arc: CE0 H02E0101 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D2 S1_V02N0201 arc: D3 W1_H02E0201 arc: D4 H01W0000 arc: D5 V02S0601 arc: D6 E1_H01W0100 arc: D7 W1_H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: E1_H02E0101 F1 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F3 arc: N1_V02N0101 F3 arc: S1_V02S0401 F6 arc: V01S0000 Q4 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000000100001101 word: SLICED.K1.INIT 0011000001010000 word: SLICED.K0.INIT 1100100011111011 word: SLICEC.K1.INIT 0000111000000100 word: SLICEA.K1.INIT 1110000001000000 word: SLICEC.K0.INIT 0000100001001100 word: SLICEB.K0.INIT 0000000000011011 word: SLICEB.K1.INIT 0000010100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C58:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 H06W0303 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 H06E0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 V02S0101 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02N0701 arc: A3 H00L0100 arc: A4 H02E0701 arc: A6 S1_V02N0301 arc: A7 V02S0301 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 E1_H02W0301 arc: B4 N1_V02S0501 arc: B5 S1_V02N0501 arc: B6 V01S0000 arc: B7 H02W0101 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H02E0401 arc: C3 N1_V02S0601 arc: C4 V00T0100 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0201 arc: D3 V02S0001 arc: D4 H02W0201 arc: D5 V02N0601 arc: D6 H02E0001 arc: D7 H01W0000 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F4 arc: H01W0100 F0 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F5 arc: N1_V02N0601 F6 arc: S1_V02S0001 F2 arc: S1_V02S0701 F5 arc: V01S0000 Q1 arc: W1_H02W0501 F7 word: SLICEC.K1.INIT 0011001100000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1011101111110011 word: SLICEB.K1.INIT 1011000010000000 word: SLICEC.K0.INIT 0011001000110011 word: SLICED.K1.INIT 1111111000000000 word: SLICED.K0.INIT 0010011100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C59:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 V06S0003 arc: E3_H06E0203 H01E0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V06N0203 arc: W1_H02W0701 V06N0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0501 arc: A0 F5 arc: A3 E1_H01E0001 arc: A5 V02N0301 arc: B1 V00B0000 arc: B2 V01N0001 arc: B3 V02N0101 arc: B6 F3 arc: C1 F4 arc: C2 W1_H02E0401 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C5 W1_H02E0401 arc: C6 F4 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F2 arc: D2 V00B0100 arc: D3 E1_H02W0201 arc: D4 W1_H02E0201 arc: D5 V01N0001 arc: D6 S1_V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: E1_H02E0701 F5 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q5 arc: LSR0 V00T0100 arc: M5 H00R0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F0 arc: N1_V02N0601 F6 arc: N3_V06N0003 F0 arc: S1_V02S0001 F2 arc: S1_V02S0301 F1 arc: S1_V02S0701 F5 arc: V01S0000 F0 arc: V01S0100 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000011110000 word: SLICED.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 0000110000001111 word: SLICEB.K0.INIT 0000000000001100 word: SLICEB.K1.INIT 1010110000000100 word: SLICEC.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1010101000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 .tile R11C60:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: A0 E1_H01E0001 arc: A1 W1_H02E0701 arc: A2 H02E0501 arc: A4 E1_H01W0000 arc: B0 H02W0301 arc: B1 Q1 arc: B2 H02E0301 arc: B4 N1_V02S0501 arc: C0 N1_V01N0001 arc: C1 V02N0601 arc: C2 V02S0601 arc: C4 V00T0000 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02W0001 arc: D2 E1_H02W0201 arc: D4 F0 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F2 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0000 F2 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 V01S0100 arc: M4 E1_H01E0101 arc: M6 W1_H02E0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q2 arc: N1_V02N0001 F2 arc: N1_V02N0201 Q2 arc: N3_V06N0203 Q7 arc: S3_V06S0203 F4 arc: V01S0000 Q4 arc: V01S0100 F2 arc: W1_H02W0201 F2 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0100010000001100 word: SLICEA.K1.INIT 0001101111111111 word: SLICEC.K0.INIT 0000111011111110 word: SLICEB.K0.INIT 1000111110001000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C61:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0201 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0501 arc: A0 H00L0000 arc: A1 N1_V02S0501 arc: A7 H00L0000 arc: B0 S1_V02N0301 arc: B1 H01W0100 arc: B2 E1_H01W0100 arc: B7 V00B0100 arc: C0 H00R0100 arc: C1 H00L0000 arc: C2 V02N0401 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V00B0100 arc: D2 H02W0001 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 Q7 arc: H01W0000 F0 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 V00T0100 arc: M0 W1_H02E0601 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q2 arc: N1_V02N0701 F7 arc: N3_V06N0103 Q2 arc: S3_V06S0103 Q2 arc: V00B0100 Q7 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 1111110000001100 word: SLICEA.K0.INIT 1110001000000000 word: SLICED.K1.INIT 0011000001010000 word: SLICEA.K1.INIT 1010100000100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C62:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 H02E0201 arc: S3_V06S0203 W3_H06E0203 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02N0401 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A1 E1_H02W0701 arc: A4 V00B0000 arc: A5 H02W0701 arc: A6 N1_V01N0101 arc: A7 V02S0101 arc: B0 H02E0101 arc: B1 H02W0301 arc: B4 H00L0000 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 H01E0101 arc: C1 H02W0401 arc: C4 Q4 arc: C5 E1_H02W0401 arc: C6 S1_V02N0001 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE2 H00L0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H00R0000 arc: D4 H02W0001 arc: D5 N1_V02S0601 arc: D6 V02N0601 arc: D7 H01W0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: N3_V06N0103 F1 arc: S1_V02S0701 F7 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V01S0000 F6 arc: V01S0100 F4 arc: W1_H02W0001 F0 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0100011100000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 0000000000010000 word: SLICED.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 0100000000000000 word: SLICED.K1.INIT 1010001010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C63:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 W3_H06E0103 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0201 W3_H06E0103 arc: V00B0000 H02W0401 arc: V00B0100 V02S0101 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E1_H01W0100 arc: A1 H02W0701 arc: A2 H02W0501 arc: A4 H02W0501 arc: A5 W1_H02E0701 arc: A6 H02W0701 arc: A7 V02S0101 arc: B0 E1_H02W0101 arc: B1 V02S0101 arc: B2 V01N0001 arc: B3 V01N0001 arc: B6 V00B0100 arc: B7 V00B0000 arc: C1 E1_H01W0000 arc: C3 S1_V02N0601 arc: C4 V01N0101 arc: C5 V02N0001 arc: C6 H02W0601 arc: C7 H02W0601 arc: D0 V02N0201 arc: D1 H00R0000 arc: D2 H02W0201 arc: D3 V00T0100 arc: D4 F0 arc: D5 E1_H02W0201 arc: D6 N1_V02S0601 arc: D7 N1_V02S0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0101 F1 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F4 arc: N1_V01N0001 F2 arc: N1_V01N0101 F5 arc: N3_V06N0103 F2 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0001 F0 arc: S1_V02S0501 F5 arc: S3_V06S0103 F1 arc: S3_V06S0303 F5 arc: V01S0000 F6 arc: V01S0100 F6 arc: W1_H02W0501 F5 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000110011 word: SLICEB.K1.INIT 1100110000001100 word: SLICEB.K0.INIT 1100110010001000 word: SLICEC.K0.INIT 1010000011110000 word: SLICED.K0.INIT 0100000000000000 word: SLICEA.K1.INIT 0001000000000000 word: SLICED.K1.INIT 0000010000000000 word: SLICEC.K1.INIT 0000101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R11C64:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 H01E0101 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 W1_H02E0701 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V06S0203 arc: A0 H02W0701 arc: A4 H02W0501 arc: A6 V00T0100 arc: B0 W1_H02E0301 arc: B4 N1_V02S0701 arc: B6 E1_H02W0101 arc: B7 F3 arc: C0 V02N0601 arc: C3 E1_H02W0601 arc: C6 H02E0601 arc: C7 H02E0601 arc: CE0 H00L0000 arc: CE1 N1_V02S0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D3 H02E0201 arc: D6 S1_V02N0401 arc: D7 H00R0100 arc: E1_H01E0101 F0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M2 V00B0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0601 Q4 arc: S3_V06S0003 Q0 arc: V00B0000 F6 arc: V00T0100 F3 arc: V01S0100 F0 arc: W1_H02W0601 Q4 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0001000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K0.INIT 1111111000001110 word: SLICED.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 1000100010001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C65:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: H00R0000 H02E0401 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 H01E0101 arc: V00B0100 H02W0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 V02N0701 arc: A0 V02N0701 arc: A1 H00L0000 arc: A4 W1_H02E0701 arc: B0 V02N0301 arc: B4 W1_H02E0101 arc: B6 H02E0101 arc: C0 S1_V02N0401 arc: C1 H02E0401 arc: C2 H02E0601 arc: C4 N1_V02S0201 arc: C6 V00T0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 F2 arc: D2 N1_V02S0001 arc: D4 V02N0401 arc: D6 V02S0601 arc: E1_H01E0101 Q1 arc: E3_H06E0003 F0 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q1 arc: N1_V02N0301 Q1 arc: N1_V02N0401 F4 arc: N3_V06N0103 Q1 arc: V00T0000 Q0 arc: V01S0100 Q1 arc: W1_H02W0001 F0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0001010000000000 word: SLICED.K0.INIT 0000000000111111 word: SLICEA.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1111000000000000 word: SLICEC.K0.INIT 1111010100110001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R11C66:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 N1_V02S0201 arc: V00T0000 W1_H02E0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 N1_V02S0701 arc: A3 F7 arc: A4 V00T0100 arc: A5 N1_V01N0101 arc: A7 Q7 arc: B0 S1_V02N0301 arc: B1 S1_V02N0101 arc: B2 H01W0100 arc: B4 E1_H02W0101 arc: B5 S1_V02N0701 arc: B7 N1_V02S0701 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 E1_H02W0601 arc: C3 F4 arc: C4 Q4 arc: C7 N1_V02S0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 Q2 arc: D3 H01E0101 arc: D4 N1_V02S0401 arc: D5 N1_V02S0401 arc: D7 E1_H02W0201 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q7 arc: V00B0100 F5 arc: V01S0000 F3 arc: V01S0100 F2 word: SLICEC.K1.INIT 0001000111011101 word: SLICEA.K0.INIT 1111111011011100 word: SLICEA.K1.INIT 0011001000010000 word: SLICEB.K0.INIT 0100010101000000 word: SLICEC.K0.INIT 1010100000100000 word: SLICED.K1.INIT 0011000000100010 word: SLICEB.K1.INIT 0000000000000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C67:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: V00T0000 H02E0201 arc: V00T0100 H02E0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 N1_V02S0501 arc: A4 N1_V02S0301 arc: A7 V00T0100 arc: B0 V02S0101 arc: B1 V02S0301 arc: B2 H02W0301 arc: B4 V02S0501 arc: B6 H02E0101 arc: B7 N1_V02S0701 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 H02W0401 arc: C3 H02E0401 arc: C4 V02S0001 arc: C6 E1_H02W0401 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 S1_V02N0201 arc: D3 V02N0001 arc: D4 H02W0201 arc: D6 H02E0201 arc: D7 W1_H02E0001 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M2 H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F0 arc: N1_V02N0701 F7 arc: S1_V02S0001 F2 arc: V00B0000 F6 arc: V01S0000 F4 arc: W1_H02W0201 Q2 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 1100111111000000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEB.K0.INIT 1010101010101000 word: SLICED.K1.INIT 0000000010111000 word: SLICEC.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1111000011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C68:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02W0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02E0401 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02N0601 arc: A0 V02S0701 arc: A1 W1_H02E0701 arc: A2 F7 arc: A3 E1_H02W0701 arc: A4 H02E0501 arc: A5 V00T0100 arc: A6 S1_V02N0301 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 H01W0100 arc: B3 Q3 arc: B4 V02N0701 arc: B5 V00B0100 arc: B6 V01S0000 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 H00L0100 arc: C2 F4 arc: C3 N1_V01N0001 arc: C4 V02S0201 arc: C5 S1_V02N0201 arc: C6 Q6 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V01S0100 arc: D2 V02N0201 arc: D3 H02E0001 arc: D4 H01W0000 arc: D5 S1_V02N0401 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0501 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F5 arc: N1_V02N0201 F2 arc: V00B0100 Q5 arc: V00T0000 F0 arc: V00T0100 Q3 arc: V01S0000 Q0 arc: V01S0100 Q6 arc: W1_H02W0301 F3 arc: W1_H02W0401 F6 word: SLICEA.K1.INIT 0000001000000111 word: SLICEC.K1.INIT 0011000001010000 word: SLICEB.K1.INIT 1010000010001000 word: SLICED.K0.INIT 0000000011011000 word: SLICEA.K0.INIT 1010000011101100 word: SLICED.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 0000101000001100 word: SLICEB.K0.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C69:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 W3_H06E0103 arc: S3_V06S0203 N1_V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H01W0100 .tile R11C70:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0103 H06E0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0701 V02N0701 arc: A0 H00L0000 arc: A1 F5 arc: A3 V00T0000 arc: A5 Q5 arc: A6 S1_V02N0101 arc: A7 H00L0000 arc: B0 S1_V02N0101 arc: B1 S1_V02N0301 arc: B2 H00L0000 arc: B3 H02W0301 arc: B6 V00T0000 arc: B7 V00B0100 arc: C0 H02E0401 arc: C1 S1_V02N0601 arc: C2 V02N0401 arc: C3 N1_V01N0001 arc: C5 V00B0100 arc: C6 H02E0401 arc: C7 V02S0201 arc: CE0 H00L0100 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 F2 arc: D2 Q2 arc: D3 W1_H02E0201 arc: D5 V02N0401 arc: D6 V02S0401 arc: D7 W1_H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F7 arc: H01W0100 F1 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M2 H02E0601 arc: M5 H02E0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F0 arc: V00B0100 Q7 arc: V00T0000 Q2 word: SLICEA.K0.INIT 0100000001001100 word: SLICED.K0.INIT 0001000000010101 word: SLICEC.K1.INIT 0000111101010101 word: SLICEB.K0.INIT 0011000000111111 word: SLICEA.K1.INIT 1110000000100000 word: SLICED.K1.INIT 1010000011000000 word: SLICEB.K1.INIT 0010001000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C71:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V06N0303 arc: A0 V02S0701 arc: A1 V01N0101 arc: A2 V00B0000 arc: A4 S1_V02N0101 arc: A6 F5 arc: A7 Q7 arc: B0 H02E0301 arc: B1 V01N0001 arc: B2 S1_V02N0101 arc: B4 S1_V02N0701 arc: B5 H00L0000 arc: B6 H02W0301 arc: B7 V00T0000 arc: C0 V02N0601 arc: C1 V02S0401 arc: C2 W1_H02E0401 arc: C4 V01N0101 arc: C5 F4 arc: C6 H02W0401 arc: C7 H02E0401 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02E0001 arc: D2 Q2 arc: D4 V01N0001 arc: D5 F2 arc: D6 E1_H01W0100 arc: D7 H02E0201 arc: E1_H02E0001 Q0 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M2 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V02N0001 F0 arc: S1_V02S0501 F7 arc: S1_V02S0701 F7 arc: V00T0000 Q0 arc: V01S0000 F6 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0001000000010011 word: SLICEC.K0.INIT 0000001010001010 word: SLICEC.K1.INIT 0011001100110000 word: SLICED.K0.INIT 1101000011000000 word: SLICED.K1.INIT 0011000001010000 word: SLICEA.K1.INIT 1100000010100000 word: SLICEA.K0.INIT 0101000101000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C72:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H02W0601 arc: V00T0000 H02E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0701 V02N0701 arc: A1 F5 arc: A2 H02E0701 arc: A3 E1_H01E0001 arc: A4 H02E0701 arc: A5 Q5 arc: A6 V02N0101 arc: A7 Q7 arc: B1 E1_H02W0301 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: B4 S1_V02N0501 arc: B5 S1_V02N0701 arc: B6 V02S0701 arc: B7 V00B0100 arc: C1 F4 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: C7 S1_V02N0201 arc: CE0 H02W0101 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 H02W0201 arc: D2 H02E0001 arc: D3 V00B0100 arc: D4 S1_V02N0401 arc: D5 S1_V02N0601 arc: D6 F2 arc: D7 V02N0401 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: V00B0100 Q5 arc: V00T0100 F3 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000011111111 word: SLICEC.K1.INIT 0000001100010001 word: SLICEC.K0.INIT 0001110100000000 word: SLICEA.K1.INIT 0000010011001100 word: SLICED.K1.INIT 0000000001010011 word: SLICEB.K0.INIT 1110000000100000 word: SLICEB.K1.INIT 0000101100001000 word: SLICED.K0.INIT 1100110011000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C73:PLC2 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 N1_V02S0201 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: A3 H02W0701 arc: B0 V00B0000 arc: B7 S1_V02N0501 arc: C0 W1_H02E0601 arc: C1 V02N0401 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F0 arc: D3 H02W0201 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0101 F3 arc: S1_V02S0201 F0 arc: S1_V02S0501 F7 arc: S3_V06S0103 F1 arc: V00B0100 F7 arc: V01S0000 F7 arc: V01S0100 Q0 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICEB.K1.INIT 1111111110101010 word: SLICED.K1.INIT 1100110011111111 word: SLICEA.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1100111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C74:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 H02E0601 arc: V00B0100 H02W0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V02N0701 arc: A0 F5 arc: A2 F5 arc: A3 H01E0001 arc: A4 V00B0000 arc: B0 F3 arc: B2 V02S0101 arc: B3 V02S0301 arc: B4 N1_V02S0701 arc: B5 H02E0301 arc: C0 F4 arc: C2 V02N0601 arc: C3 H00L0000 arc: C4 V02N0201 arc: C5 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 Q2 arc: D3 V00B0100 arc: D4 H00R0100 arc: E1_H01E0001 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: V01S0000 Q0 arc: V01S0100 F5 word: SLICEC.K1.INIT 0000001100000011 word: SLICEC.K0.INIT 0000100000000000 word: SLICEB.K1.INIT 0000000001000000 word: SLICEB.K0.INIT 1110101011000000 word: SLICEA.K0.INIT 1111111011111100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C75:PLC2 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 H06E0303 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0501 N1_V01S0100 arc: A1 E1_H02W0501 arc: A3 V02N0501 arc: A4 F5 arc: A5 H02E0501 arc: A6 H00L0000 arc: B0 F3 arc: B1 F3 arc: B4 H02W0101 arc: B5 H02W0301 arc: B6 H02W0301 arc: C1 V02N0401 arc: C2 H02W0401 arc: C4 V01N0101 arc: C6 V01N0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V02S0201 arc: D2 H02E0001 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 F2 arc: D6 H00R0100 arc: E1_H01E0001 F6 arc: E1_H02E0101 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 F2 arc: H01W0100 F0 arc: M0 V00B0100 arc: M3 H01W0100 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0601 F4 arc: S1_V02S0701 F5 arc: V01S0000 Q3 arc: V01S0100 Q3 arc: W1_H02W0001 F2 arc: W3_H06W0003 Q3 word: SLICEC.K0.INIT 1000000000000000 word: SLICED.K0.INIT 0010000010000000 word: SLICEB.K1.INIT 0101010100000000 word: SLICEB.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0001000100000000 word: SLICEA.K0.INIT 0000000011001100 word: SLICEA.K1.INIT 1111010001000100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C76:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 V02S0201 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: V00T0100 H02W0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V02N0501 arc: A1 W1_H02E0701 arc: A2 H02E0701 arc: A3 V02N0701 arc: A6 V02N0101 arc: B1 V02N0101 arc: B3 S1_V02N0301 arc: C1 H02E0401 arc: C3 H00L0000 arc: C6 H01E0001 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 V02N0001 arc: D6 F0 arc: E1_H01E0001 F6 arc: E1_H02E0401 F6 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: H00R0000 F6 arc: LSR0 V00T0100 arc: M0 H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0601 F6 arc: S3_V06S0103 Q2 arc: V01S0000 Q2 arc: W1_H02W0101 F3 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010101010101100 word: SLICED.K0.INIT 1111010100000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1010101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C77:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00R0000 H02E0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06E0303 arc: V00B0100 V02N0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 S1_V02N0501 arc: C0 H00L0000 arc: C1 H00L0000 arc: C3 H00L0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02W0001 arc: D3 E1_H02W0201 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q1 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: V01S0000 Q3 arc: V01S0100 Q0 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C78:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 V02N0601 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0501 V02N0501 arc: B0 V01N0001 arc: C0 H00L0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: H00L0000 Q0 arc: LSR0 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000111111001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C79:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 W1_H02E0701 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H06E0103 arc: V00T0000 H02W0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 S1_V02N0201 arc: A0 V02N0701 arc: A1 H02E0701 arc: A2 V00T0000 arc: B0 V01N0001 arc: B1 V02N0101 arc: C2 V02N0601 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 S1_V02N0001 arc: E1_H01E0101 Q0 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: S1_V02S0001 Q2 arc: V01S0100 Q2 word: SLICEA.K1.INIT 1100110010101010 word: SLICEB.K0.INIT 1111010110100000 word: SLICEA.K0.INIT 1100110010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C80:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 V06N0303 arc: H00R0000 H02W0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: A0 V01N0101 arc: A1 H02E0501 arc: A5 V00B0000 arc: A7 N1_V01N0101 arc: B0 V02N0101 arc: B1 V01N0001 arc: B2 E1_H02W0301 arc: B4 S1_V02N0501 arc: B5 H00L0000 arc: B7 S1_V02N0701 arc: C2 V02N0601 arc: C4 V00T0100 arc: C5 E1_H02W0401 arc: C7 N1_V02S0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V02N0001 arc: D4 E1_H02W0001 arc: D5 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q4 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 word: SLICED.K1.INIT 1100101000000000 word: SLICEC.K1.INIT 1110010000000000 word: SLICEC.K0.INIT 1111110000001100 word: SLICEB.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 1010101011001100 word: SLICEA.K1.INIT 1100110010101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C81:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 W3_H06E0203 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H01E0101 arc: S3_V06S0103 H06W0103 arc: V00B0100 W1_H02E0701 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 V02N0601 arc: W3_H06W0203 E1_H01W0000 arc: A2 H02E0701 arc: A3 E1_H02W0701 arc: A6 S1_V02N0301 arc: B0 V02N0301 arc: B2 S1_V02N0101 arc: B3 V02N0101 arc: B4 H02W0301 arc: B6 V00B0000 arc: C0 W1_H02E0401 arc: C2 N1_V02S0601 arc: C3 H00L0000 arc: C4 S1_V02N0201 arc: C6 N1_V02S0201 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 V00T0100 arc: D3 S1_V02N0001 arc: D4 S1_V02N0401 arc: D6 E1_H02W0201 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: LSR0 V00B0100 arc: LSR1 H02E0301 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V00T0100 F3 arc: V01S0100 Q0 word: SLICED.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 1000101010000000 word: SLICEB.K0.INIT 1101110111011000 word: SLICEC.K0.INIT 1111110000110000 word: SLICEA.K0.INIT 1100110011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C82:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02E0201 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 W3_H06E0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V02N0701 arc: A0 V01N0101 arc: A2 H02W0501 arc: A5 H02E0701 arc: A7 N1_V01N0101 arc: B0 V02N0101 arc: B2 N1_V02S0301 arc: B4 S1_V02N0501 arc: B5 S1_V02N0501 arc: B6 S1_V02N0501 arc: B7 V01S0000 arc: C2 H02E0601 arc: C7 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D2 V02N0201 arc: D4 H01W0000 arc: D6 E1_H02W0001 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0201 Q2 arc: S1_V02S0201 Q0 arc: V00B0000 Q6 arc: V01S0000 Q5 arc: W1_H02W0501 F7 word: SLICEC.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1000100010001000 word: SLICED.K0.INIT 1111111100110011 word: SLICEB.K0.INIT 1111111001010100 word: SLICED.K1.INIT 0000000000010000 word: SLICEA.K0.INIT 1100110010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C83:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02E0501 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 N1_V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V02N0701 arc: A0 H01E0001 arc: A2 N1_V02S0501 arc: A6 V00T0100 arc: B0 V02S0101 arc: B2 V02N0301 arc: B6 V00B0000 arc: C0 H00L0100 arc: C2 V02N0601 arc: C5 V02N0001 arc: C6 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 V01S0100 arc: D5 H01W0000 arc: D6 W1_H02E0001 arc: E1_H01E0001 Q5 arc: E1_H02E0001 Q0 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0301 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: S1_V02S0601 F6 arc: V00B0000 Q6 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0100010001010000 word: SLICEB.K0.INIT 1100110011111010 word: SLICEA.K0.INIT 0000001011111110 word: SLICEC.K1.INIT 1111000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C84:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 E1_H02W0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 H01E0001 arc: V00B0100 H02W0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0501 arc: A0 H00L0000 arc: B0 N1_V02S0301 arc: C0 H02W0601 arc: C2 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 V02N0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: S3_V06S0103 Q2 arc: V01S0100 Q2 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1111000111100000 word: SLICEB.K0.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C85:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 V06N0203 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 V01N0101 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 H06E0103 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02N0701 arc: A0 W1_H02E0701 arc: A1 N1_V02S0501 arc: A2 V02S0701 arc: A3 V00B0000 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B6 S1_V02N0501 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 H00L0100 arc: C3 N1_V02S0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02N0201 arc: D2 H00R0000 arc: D3 H02E0001 arc: D6 V02S0601 arc: E1_H01E0001 Q3 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: H01W0000 Q1 arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: V01S0100 Q6 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 1111111000000010 word: SLICEB.K0.INIT 1010101010111000 word: SLICEA.K1.INIT 1010101110101000 word: SLICEB.K1.INIT 1111000111100000 word: SLICED.K0.INIT 1100110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C86:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 N1_V02S0501 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: A2 N1_V02S0701 arc: A3 V00B0000 arc: A5 V00T0000 arc: A7 H02W0701 arc: B2 H02W0301 arc: B3 H02W0301 arc: B5 E1_H02W0101 arc: B7 V02N0701 arc: C0 H02E0401 arc: C2 V02N0401 arc: C3 H00L0100 arc: C5 H02E0601 arc: C7 H02W0601 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 V02S0201 arc: D3 W1_H02E0201 arc: D5 E1_H01W0100 arc: D7 H02W0001 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: S3_V06S0303 F6 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1010101010111000 word: SLICEB.K1.INIT 1111000111100000 word: SLICEA.K0.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C87:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: H00L0000 V02N0201 arc: H00L0100 V02N0101 arc: H00R0100 V02N0501 arc: N1_V02N0201 H01E0001 arc: N1_V02N0601 H01E0001 arc: S1_V02S0301 H02W0301 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0201 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V06S0203 arc: A0 H00L0100 arc: A1 H02E0501 arc: A6 V02S0101 arc: B0 V00T0000 arc: B1 N1_V02S0301 arc: B2 H01W0100 arc: B6 H02W0101 arc: C0 H00L0000 arc: C1 E1_H02W0601 arc: C6 V01N0101 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: D6 V02N0401 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H01W0000 F6 arc: H01W0100 Q2 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0301 Q1 arc: V01S0000 Q2 word: SLICEA.K0.INIT 1100110011001010 word: SLICEA.K1.INIT 1010101010111000 word: SLICED.K0.INIT 1000001001000001 word: SLICEB.K0.INIT 0011001100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R11C88:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: S3_V06S0203 E1_H01W0000 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 S3_V06N0003 arc: A4 H02W0701 arc: A6 H00L0000 arc: B4 H00R0000 arc: B6 V02N0701 arc: C4 V02N0201 arc: C6 S1_V02N0001 arc: CE1 S1_V02N0201 arc: CE2 V02S0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 V02N0601 arc: D6 V02N0601 arc: E1_H01E0001 Q4 arc: E1_H02E0101 F1 arc: E1_H02E0301 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: H00R0000 Q6 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 word: SLICEA.K1.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICED.K0.INIT 1011001110100000 word: SLICEC.K0.INIT 1110101011000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C25:PLC2 arc: N1_V02N0301 S1_V02N0201 .tile R12C28:PLC2 arc: N1_V02N0301 S1_V02N0201 .tile R12C2:PLC2 arc: S3_V06S0303 N3_V06S0203 .tile R12C30:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 N1_V01S0000 arc: H00L0100 V02N0301 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: A0 H00L0000 arc: A5 Q5 arc: B0 E1_H02W0301 arc: B5 V02N0501 arc: C0 H00R0100 arc: C5 V00T0000 arc: CE0 V02S0201 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D5 V02N0401 arc: E1_H01E0101 F5 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H00R0100 Q5 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: V00T0000 Q0 arc: V01S0000 F0 word: SLICEC.K1.INIT 0100011100000000 word: SLICEA.K0.INIT 1100000010001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C31:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 N1_V01S0000 arc: H00L0000 V02N0001 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0201 N1_V02S0701 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: A0 V02N0501 arc: A1 V01N0101 arc: A3 H00L0100 arc: A4 F5 arc: A5 E1_H01W0000 arc: A7 V00T0100 arc: B0 V01N0001 arc: B1 V02N0301 arc: B3 H02W0301 arc: B4 H02E0301 arc: B5 E1_H02W0301 arc: B7 V01S0000 arc: C0 N1_V01N0001 arc: C3 H02E0401 arc: C4 V00T0000 arc: C5 V00B0100 arc: C7 E1_H02W0401 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V01S0100 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D5 H02W0001 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M3 H00L0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: S1_V02S0101 F3 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 F7 word: SLICED.K1.INIT 0011000001010000 word: SLICEA.K0.INIT 1111110110101000 word: SLICEA.K1.INIT 1111111110111011 word: SLICEB.K1.INIT 1100010010000000 word: SLICEC.K1.INIT 0000000010101100 word: SLICEC.K0.INIT 0011001100100011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C32:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: A0 F5 arc: A1 F5 arc: A2 E1_H01E0001 arc: A3 V02S0701 arc: A4 F7 arc: A5 Q5 arc: A6 W1_H02E0501 arc: A7 N1_V01N0101 arc: B0 E1_H01W0100 arc: B2 V02N0301 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 V01S0000 arc: B6 V00T0000 arc: B7 V02S0701 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 H02W0401 arc: C3 N1_V02S0601 arc: C4 V00T0100 arc: C5 H02W0401 arc: C6 V02S0001 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D3 V01S0100 arc: D4 S1_V02N0401 arc: D5 H02W0001 arc: D6 H02W0201 arc: D7 N1_V02S0601 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q5 arc: E1_H02E0001 F0 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q1 arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M2 V00B0100 arc: M5 H00L0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: V00T0000 Q2 arc: V00T0100 F3 arc: V01S0000 Q1 arc: V01S0100 Q1 word: SLICEC.K1.INIT 0000001100000101 word: SLICEB.K0.INIT 0001000011010000 word: SLICEA.K0.INIT 1100111111001010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K1.INIT 0101010000000100 word: SLICED.K1.INIT 1100000010001000 word: SLICEC.K0.INIT 1100110011001000 word: SLICED.K0.INIT 1101000010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C33:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S3_V06S0003 H06W0003 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02N0501 arc: A4 E1_H01W0000 arc: A5 Q5 arc: A6 V02N0301 arc: A7 H00L0000 arc: B0 H02W0301 arc: B1 Q1 arc: B2 H00R0100 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02N0701 arc: B6 V00T0000 arc: B7 S1_V02N0701 arc: C0 N1_V01N0001 arc: C1 V02S0601 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 E1_H02W0401 arc: C5 V02N0001 arc: C6 V01N0101 arc: C7 F4 arc: CE0 V02N0201 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 N1_V02S0201 arc: D3 V00B0100 arc: D4 N1_V02S0401 arc: D5 E1_H01W0100 arc: D6 W1_H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F7 arc: E1_H02E0201 F0 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q5 arc: H01W0100 F3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 E1_H02W0601 arc: M1 E1_H02W0001 arc: M3 H00L0100 arc: M5 E1_H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: V01S0000 Q5 word: SLICEC.K1.INIT 0100000001001100 word: SLICEB.K1.INIT 0000000000100111 word: SLICED.K0.INIT 0000001010001010 word: SLICEC.K0.INIT 1100000010100000 word: SLICEB.K0.INIT 0010001000110000 word: SLICED.K1.INIT 1111101100000000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C34:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: H00L0000 H02E0201 arc: H00R0100 H02E0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 H01E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 H02W0701 arc: A3 V00T0000 arc: A5 Q5 arc: A7 F5 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 F3 arc: B3 H00L0000 arc: B5 N1_V02S0501 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C2 H02E0601 arc: C3 E1_H02W0601 arc: C5 V02N0201 arc: C7 V01N0101 arc: CE0 N1_V02S0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 W1_H02E0201 arc: D3 F0 arc: D5 N1_V02S0401 arc: D7 H00R0100 arc: E1_H02E0701 F7 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M1 H02W0001 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: S1_V02S0701 Q5 arc: V00T0100 Q1 arc: V01S0000 Q5 word: SLICEC.K1.INIT 0011000000100010 word: SLICED.K1.INIT 0000010100000000 word: SLICEA.K0.INIT 1010001010000000 word: SLICEA.K1.INIT 1111011111010101 word: SLICEB.K1.INIT 1010100000001000 word: SLICEB.K0.INIT 1101000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C35:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 W1_H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 H02E0201 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02W0601 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V01S0100 arc: A0 F7 arc: A1 H00L0000 arc: A2 V00B0000 arc: A3 N1_V02S0501 arc: A4 W1_H02E0501 arc: A5 W1_H02E0501 arc: A6 H02E0701 arc: A7 V00T0100 arc: B0 F3 arc: B1 Q1 arc: B2 H00L0000 arc: B3 H00R0100 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 S1_V02N0701 arc: C0 N1_V02S0601 arc: C1 V02N0401 arc: C2 E1_H02W0601 arc: C3 N1_V02S0401 arc: C4 H02W0601 arc: C5 V02N0001 arc: C6 V01N0101 arc: C7 N1_V02S0201 arc: CE0 H02W0101 arc: CE1 H02E0101 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 E1_H02W0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H00L0100 arc: D5 E1_H02W0001 arc: D6 F0 arc: D7 V02S0601 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M5 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q2 arc: S1_V02S0101 F1 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 F2 arc: V01S0100 F1 word: SLICEA.K1.INIT 0011000001010000 word: SLICEC.K1.INIT 0000000001010011 word: SLICEC.K0.INIT 0000010011000100 word: SLICEB.K0.INIT 0000001000000111 word: SLICED.K1.INIT 0100000001001100 word: SLICEB.K1.INIT 0001000000010101 word: SLICEA.K0.INIT 1110111111100000 word: SLICED.K0.INIT 1111101111001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C36:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 W1_H02E0201 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 E3_H06W0003 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 V06S0103 arc: A4 E1_H02W0501 arc: B4 N1_V01S0000 arc: C4 W1_H02E0401 arc: D4 W1_H02E0001 arc: E3_H06E0203 F4 arc: F4 F4_SLICE word: SLICEC.K0.INIT 0000001010100010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R12C37:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: V00B0000 S1_V02N0001 arc: V00T0000 S1_V02N0601 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0303 E1_H02W0601 arc: A0 H02W0701 arc: A2 H02W0701 arc: A3 V02S0701 arc: B0 W1_H02E0101 arc: B1 Q1 arc: B2 H00R0000 arc: B3 W1_H02E0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02N0401 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: E3_H06E0203 Q7 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F2 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q6 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 arc: V01S0000 Q3 arc: V01S0100 Q4 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 0000101100001000 word: SLICEA.K1.INIT 0000000000001100 word: SLICEB.K0.INIT 0000101000001100 word: SLICEB.K1.INIT 0001000000010000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 .tile R12C38:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W1_H02E0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 N1_V02S0101 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 E1_H02W0501 arc: A3 N1_V02S0501 arc: A7 Q7 arc: B0 V01N0001 arc: B1 E1_H01W0100 arc: B3 V02N0101 arc: B7 V00T0000 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C3 V02N0601 arc: C7 V00T0100 arc: CE1 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D3 F0 arc: D7 S1_V02N0401 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: LSR0 W1_H02E0301 arc: M0 V00B0100 arc: M2 W1_H02E0601 arc: M7 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0101 F3 arc: V00B0100 F7 arc: V00T0000 Q2 arc: V01S0000 Q2 arc: V01S0100 Q7 word: SLICED.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 1111101011001100 word: SLICEA.K1.INIT 1111110011111111 word: SLICEB.K1.INIT 1010100011111101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C39:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V02N0701 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0501 arc: A1 F5 arc: A2 V00B0000 arc: A3 V00T0000 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 H02E0701 arc: A7 H02E0501 arc: B0 V02N0301 arc: B1 V01N0001 arc: B2 H02E0301 arc: B3 Q3 arc: B4 E1_H02W0101 arc: B5 V02N0501 arc: B6 V00B0100 arc: B7 F3 arc: C0 N1_V01N0001 arc: C1 H00L0000 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C4 V00T0000 arc: C5 V02N0001 arc: C6 Q6 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02W0201 arc: D2 V00B0100 arc: D3 H02E0001 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 N1_V02S0401 arc: D7 F2 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F6 arc: H01W0100 F4 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M3 H00R0000 arc: M5 H00R0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q3 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 F7 word: SLICEC.K0.INIT 0010001000110000 word: SLICED.K0.INIT 1110010000000000 word: SLICEB.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 1000110010000000 word: SLICED.K1.INIT 0000111100001101 word: SLICEA.K0.INIT 0000001000010011 word: SLICEC.K1.INIT 0001000011010000 word: SLICEA.K1.INIT 0000000100110011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C40:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0501 arc: A1 E1_H01E0001 arc: A2 V02S0501 arc: A3 H02E0701 arc: A4 H02W0701 arc: A5 E1_H02W0501 arc: A6 F5 arc: A7 Q7 arc: B2 W1_H02E0301 arc: B3 Q3 arc: B4 V00B0100 arc: B5 V02S0701 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 H02E0601 arc: C1 H00L0000 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 Q4 arc: C5 V02S0001 arc: C6 H02W0601 arc: C7 V02N0201 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V00B0100 arc: D2 V01S0100 arc: D3 V02N0001 arc: D4 W1_H02E0001 arc: D5 F2 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 V00T0000 arc: M3 H00R0100 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F7 arc: N1_V02N0101 F3 arc: N1_V02N0301 Q3 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V01S0000 Q4 arc: V01S0100 Q3 word: SLICEA.K0.INIT 1010111110100000 word: SLICEB.K1.INIT 0010011100000000 word: SLICED.K1.INIT 0000001100000101 word: SLICEA.K1.INIT 0101000001011111 word: SLICEB.K0.INIT 1100100001000000 word: SLICEC.K0.INIT 0000000011100100 word: SLICEC.K1.INIT 0101010101010001 word: SLICED.K0.INIT 1010101010101000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C41:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 V02S0501 arc: E3_H06E0203 S3_V06N0203 arc: H01W0000 E3_H06W0103 arc: N1_V02N0501 E3_H06W0303 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 H02W0501 arc: S3_V06S0103 N1_V02S0101 arc: V00B0100 H02E0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V01N0101 arc: A1 V01N0101 arc: A5 W1_H02E0501 arc: B1 V02N0101 arc: B5 H00L0000 arc: C0 V02N0601 arc: C1 V02N0401 arc: C5 H02W0401 arc: D0 V02N0201 arc: D1 V00B0100 arc: D5 N1_V02S0401 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H00L0000 F0 arc: M0 H02E0601 word: SLICEA.K0.INIT 0101000000000000 word: SLICEA.K1.INIT 0100110000001100 word: SLICEC.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R12C42:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 E1_H02W0601 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: A1 E1_H02W0501 arc: A2 F5 arc: A3 H02E0501 arc: A4 V02N0301 arc: A5 Q5 arc: A7 Q7 arc: B0 H01W0100 arc: B2 W1_H02E0301 arc: B3 H02E0301 arc: B4 V00B0100 arc: B5 V01S0000 arc: B7 V02N0501 arc: C0 E1_H01W0000 arc: C2 H00L0000 arc: C3 N1_V01S0100 arc: C4 N1_V02S0001 arc: C5 H02W0401 arc: C7 V02N0201 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 V02S0001 arc: D3 S1_V02N0001 arc: D4 H02E0201 arc: D5 V00B0000 arc: D7 H01W0000 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0301 arc: M0 H02W0601 arc: M3 H02W0201 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0101 F3 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q7 arc: W3_H06W0003 F0 word: SLICED.K1.INIT 0100000001110000 word: SLICEA.K1.INIT 1010101010101010 word: SLICEA.K0.INIT 1111000011001100 word: SLICEC.K0.INIT 0000000001010011 word: SLICEB.K1.INIT 1100111000000000 word: SLICEC.K1.INIT 1100101000000000 word: SLICEB.K0.INIT 0000000011111011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C43:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 H02W0401 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 N1_V01S0100 arc: A0 H00L0000 arc: A2 H02W0701 arc: A4 V02S0101 arc: A5 V00T0000 arc: A6 E1_H02W0701 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 V02S0301 arc: B2 H00R0100 arc: B4 V02N0701 arc: B5 V01S0000 arc: B6 W1_H02E0101 arc: B7 V01S0000 arc: C0 F4 arc: C1 F4 arc: C2 N1_V01N0001 arc: C4 V02N0001 arc: C5 H02W0601 arc: C6 H02E0401 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 E1_H02W0201 arc: D2 N1_V02S0001 arc: D4 V02S0601 arc: D5 H00R0100 arc: D6 F2 arc: D7 V02N0401 arc: E1_H01E0001 F5 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0000 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F6 arc: V00B0100 F7 arc: V01S0000 Q5 word: SLICED.K1.INIT 0000010100000011 word: SLICEC.K0.INIT 0100000001110000 word: SLICEA.K0.INIT 1111111001010100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 1110111011111010 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1100100011111011 word: SLICEC.K1.INIT 0000111000000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C44:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 E1_H01W0000 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02W0501 arc: A2 W1_H02E0501 arc: A3 E1_H02W0701 arc: A4 N1_V02S0301 arc: A6 F5 arc: A7 Q7 arc: B2 H00R0100 arc: B3 V02S0101 arc: B4 V00B0100 arc: B5 F3 arc: B6 V01S0000 arc: B7 N1_V01S0000 arc: C0 E1_H02W0401 arc: C2 N1_V01S0100 arc: C3 N1_V01N0001 arc: C4 V00T0100 arc: C5 F4 arc: C6 V00T0000 arc: C7 V02N0001 arc: CE2 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0201 arc: D2 E1_H02W0001 arc: D3 S1_V02N0001 arc: D4 H00R0100 arc: D5 V02S0601 arc: D6 W1_H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR1 E1_H02W0501 arc: M0 W1_H02E0601 arc: M5 H02E0001 arc: M7 H00L0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: S3_V06S0303 F6 arc: V01S0000 F2 arc: V01S0100 Q5 arc: W3_H06W0003 F0 word: SLICED.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 0000000011011000 word: SLICEC.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 1010100000100000 word: SLICED.K0.INIT 1101000011000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C45:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 N1_V02S0201 arc: V00T0000 V02S0601 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02N0501 arc: A1 H02W0701 arc: A2 V02S0501 arc: A5 Q5 arc: A7 N1_V01N0101 arc: B0 V00T0000 arc: B1 Q1 arc: B2 W1_H02E0101 arc: B5 V01S0000 arc: B7 E1_H02W0101 arc: C0 V02S0401 arc: C1 V02S0601 arc: C5 V02N0001 arc: C7 V00T0100 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V01S0100 arc: D2 H02W0201 arc: D5 V02N0401 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: LSR0 H02E0301 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M5 H00R0100 arc: M6 E1_H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: N1_V02N0701 F5 arc: S1_V02S0001 Q2 arc: S1_V02S0201 F2 arc: S3_V06S0103 F2 arc: V00T0100 Q1 arc: V01S0000 Q1 arc: V01S0100 Q5 arc: W1_H02W0401 Q6 arc: W1_H02W0501 Q7 arc: W1_H02W0701 F7 word: SLICEC.K1.INIT 0101000000110000 word: SLICEB.K0.INIT 1110111001000100 word: SLICED.K1.INIT 0100010000001100 word: SLICEA.K0.INIT 1000110010000000 word: SLICEA.K1.INIT 1110111101001111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C46:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 W3_H06E0203 arc: V00B0100 E1_H02W0501 arc: V00T0000 S1_V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0203 E3_H06W0103 arc: A0 E1_H01E0001 arc: A2 H02W0701 arc: A4 N1_V01S0100 arc: A7 V02S0301 arc: B2 H02E0301 arc: B7 V02S0701 arc: C0 E1_H02W0401 arc: C1 H02E0601 arc: C2 F4 arc: C4 E1_H01E0101 arc: C7 W1_H02E0601 arc: CE0 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 N1_V01S0000 arc: D4 V02S0601 arc: D7 N1_V02S0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00L0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: V01S0100 F2 arc: W3_H06W0003 F0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111000011110000 word: SLICED.K1.INIT 0000111000000010 word: SLICEC.K0.INIT 0000000000000101 word: SLICEB.K0.INIT 1000110010001000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R12C47:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V06S0203 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 W3_H06E0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 E1_H02W0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H01E0001 arc: A3 H00L0100 arc: A4 S1_V02N0301 arc: A6 F7 arc: A7 H02W0701 arc: B0 H02E0101 arc: B1 Q1 arc: B3 V01N0001 arc: B4 V01S0000 arc: B6 S1_V02N0701 arc: B7 H02W0301 arc: C0 H02E0601 arc: C1 H02E0601 arc: C3 F4 arc: C4 Q4 arc: C6 H02W0601 arc: C7 V01N0101 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 N1_V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D3 H02W0001 arc: D4 V00B0000 arc: D6 H02W0201 arc: D7 V02S0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F3 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N3_V06N0303 Q6 arc: V00T0000 F0 arc: V01S0000 Q2 arc: V01S0100 F6 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000011001010 word: SLICEA.K1.INIT 0000000000001100 word: SLICED.K1.INIT 0000111111101110 word: SLICED.K0.INIT 1100110000001000 word: SLICEC.K0.INIT 0000000000011011 word: SLICEB.K1.INIT 0000000101010101 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R12C48:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02N0501 arc: A1 H00L0000 arc: A2 E1_H01E0001 arc: A3 F7 arc: A4 V02N0301 arc: A5 N1_V01N0101 arc: A6 E1_H02W0501 arc: A7 N1_V01N0101 arc: B0 V02N0301 arc: B1 H01W0100 arc: B2 H00L0000 arc: B3 N1_V02S0101 arc: B4 H00L0000 arc: B5 V02N0701 arc: B6 H02W0301 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 E1_H02W0601 arc: C2 S1_V02N0401 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V00B0100 arc: C6 F4 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00T0100 arc: D2 H02E0201 arc: D3 H01E0101 arc: D4 V02N0401 arc: D5 V02S0601 arc: D6 F0 arc: D7 H02E0201 arc: E1_H01E0001 Q4 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: S1_V02S0401 F6 arc: V00B0100 Q7 arc: V01S0100 Q7 arc: W1_H02W0301 F1 arc: W1_H02W0701 F5 word: SLICEB.K1.INIT 1111111000000000 word: SLICED.K0.INIT 0100010001000101 word: SLICEC.K0.INIT 0000010100010001 word: SLICEA.K1.INIT 0000110000001010 word: SLICEC.K1.INIT 1110001000000000 word: SLICEA.K0.INIT 0100000001001100 word: SLICED.K1.INIT 1100000010100000 word: SLICEB.K0.INIT 0000101000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R12C49:PLC2 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: A0 V01N0101 arc: A1 H00R0000 arc: A2 V01N0101 arc: A3 E1_H01E0001 arc: A4 F7 arc: A5 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 V00T0000 arc: B1 N1_V02S0301 arc: B2 H00R0100 arc: B3 V02N0301 arc: B4 H02W0301 arc: B5 V01S0000 arc: B7 V02S0701 arc: C0 N1_V02S0601 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 V00T0000 arc: C7 H02W0601 arc: CE0 V02S0201 arc: CE1 N1_V02S0201 arc: CE2 H00L0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 E1_H02W0001 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 N1_V02S0601 arc: D7 H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F5 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F1 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: N3_V06N0303 Q6 arc: S1_V02S0001 Q0 arc: S1_V02S0101 F3 arc: V01S0000 Q5 arc: V01S0100 Q3 arc: W3_H06W0303 Q6 word: SLICEB.K1.INIT 0000010011000100 word: SLICEC.K0.INIT 1110000011110000 word: SLICEA.K1.INIT 1010101010101000 word: SLICEB.K0.INIT 0000000010111000 word: SLICEA.K0.INIT 0010001100100000 word: SLICED.K1.INIT 1011000010000000 word: SLICEC.K1.INIT 1010000011000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R12C50:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 S1_V02N0001 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0100 arc: A2 F7 arc: A3 H02E0701 arc: A4 N1_V01N0101 arc: A5 V00T0000 arc: A6 H02W0501 arc: A7 N1_V02S0101 arc: B2 V01N0001 arc: B3 V02S0101 arc: B4 E1_H02W0301 arc: B5 W1_H02E0301 arc: B6 H02W0301 arc: B7 H01E0101 arc: C0 N1_V01N0001 arc: C1 H02E0601 arc: C2 H00L0000 arc: C3 V02S0601 arc: C4 Q4 arc: C5 H02W0601 arc: C6 Q6 arc: C7 S1_V02N0001 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 H02E0201 arc: D3 V01S0100 arc: D4 N1_V02S0601 arc: D5 F2 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F4 arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0000 arc: M3 W1_H02E0201 arc: M4 H02E0401 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q1 arc: S3_V06S0003 F0 arc: V01S0000 F6 arc: V01S0100 Q4 arc: W1_H02W0301 F3 word: SLICEB.K0.INIT 1010101010101000 word: SLICEC.K1.INIT 0000000000100000 word: SLICEA.K0.INIT 1010101011110000 word: SLICEA.K1.INIT 1111000011110000 word: SLICED.K0.INIT 0000001100010001 word: SLICED.K1.INIT 1010101010001010 word: SLICEC.K0.INIT 0010001000110000 word: SLICEB.K1.INIT 0000110100001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C51:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A6 V02N0301 arc: B0 V00B0000 arc: B2 E1_H02W0301 arc: B6 V00B0000 arc: C0 H02W0401 arc: C2 V02N0601 arc: C3 V02N0601 arc: C6 V02N0201 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 H02W0201 arc: D3 E1_H02W0001 arc: D6 H01W0000 arc: E1_H01E0001 Q3 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H01W0000 Q3 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 H02W0601 arc: M3 H00R0100 arc: M5 H00L0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F2 arc: N1_V02N0701 Q5 arc: S1_V02S0001 F0 arc: V00B0000 Q6 arc: V01S0000 Q1 arc: V01S0100 F6 word: SLICED.K0.INIT 0010000000101010 word: SLICEB.K0.INIT 0101010000010000 word: SLICEB.K1.INIT 0000000001010000 word: SLICEA.K0.INIT 0011010111111111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C52:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0303 W1_H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N1_V02S0601 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 .tile R12C53:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H06W0303 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02N0701 arc: A1 E1_H01E0001 arc: A2 F5 arc: A3 H02E0501 arc: A4 F7 arc: A5 E1_H01W0000 arc: A6 E1_H02W0501 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 N1_V02S0101 arc: B3 N1_V02S0101 arc: B4 E1_H02W0101 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: B7 V02N0501 arc: C0 H02W0601 arc: C1 H02E0601 arc: C2 V02S0401 arc: C3 H00R0100 arc: C4 H02W0601 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 V02N0601 arc: D6 F2 arc: D7 H01W0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q5 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M3 H02E0201 arc: M5 H02E0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F1 arc: N1_V02N0101 F1 arc: S1_V02S0201 Q0 arc: S1_V02S0701 Q5 arc: S3_V06S0303 F6 arc: V00B0000 F4 arc: V01S0000 Q7 arc: V01S0100 Q3 word: SLICEB.K1.INIT 0100010000001100 word: SLICEA.K1.INIT 0001000100000011 word: SLICED.K1.INIT 0010001100100000 word: SLICEC.K0.INIT 0000111000001111 word: SLICEC.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 0000000000000101 word: SLICEA.K0.INIT 1101000010000000 word: SLICED.K0.INIT 1010000010101000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C54:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0501 S1_V02N0501 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0501 arc: A1 F7 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 H02W0701 arc: A5 Q5 arc: A6 H02W0701 arc: A7 Q7 arc: B0 H00R0100 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 V01S0000 arc: B5 H02W0301 arc: B6 V01S0000 arc: B7 V01S0000 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 S1_V02N0001 arc: C7 E1_H02W0601 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 Q3 arc: H01W0100 F4 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M2 H02E0601 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 W1_H02E0001 arc: M7 W1_H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F2 arc: N1_V02N0301 Q3 arc: N3_V06N0303 F6 arc: V01S0000 Q5 arc: V01S0100 F0 word: SLICEB.K1.INIT 1011111110110011 word: SLICEB.K0.INIT 1000110010000000 word: SLICEA.K1.INIT 1111111110101111 word: SLICEA.K0.INIT 1111101011001010 word: SLICED.K1.INIT 1010110000000000 word: SLICED.K0.INIT 1010000011000000 word: SLICEC.K0.INIT 1010000011000000 word: SLICEC.K1.INIT 1100111110101111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C55:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V06S0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 H06W0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 S1_V02N0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: B4 S1_V02N0501 arc: C0 N1_V01S0100 arc: C4 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D4 W1_H02E0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F4 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: H01W0000 Q0 arc: H01W0100 F4 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0601 F4 arc: N3_V06N0203 F4 arc: S1_V02S0001 Q0 arc: V01S0000 F4 arc: W1_H02W0601 F4 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0011000000000000 word: SLICEA.K0.INIT 1010101011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R12C56:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E3_H06E0103 H01E0101 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0701 arc: A1 E1_H02W0501 arc: A2 N1_V02S0701 arc: B0 H02W0101 arc: B1 H01W0100 arc: B2 W1_H02E0101 arc: B3 H01W0100 arc: C0 H00L0000 arc: C1 H00L0100 arc: C2 S1_V02N0601 arc: C4 V02N0201 arc: C7 V01N0101 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 E1_H02W0001 arc: D2 H01E0101 arc: D3 V00B0100 arc: D4 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q0 arc: E1_H02E0601 F4 arc: E1_H02E0701 F7 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: LSR0 V00T0000 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 F2 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q2 arc: S1_V02S0101 F1 arc: S1_V02S0201 Q0 arc: V01S0000 F3 arc: V01S0100 F2 word: SLICEC.K0.INIT 0000000011110000 word: SLICEA.K0.INIT 1111111111111011 word: SLICED.K1.INIT 0000000000001111 word: SLICEA.K1.INIT 0001001100110011 word: SLICEB.K1.INIT 0000000011001100 word: SLICEB.K0.INIT 1000111110001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C57:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 H01E0101 arc: E3_H06E0103 V06S0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 V01N0101 arc: V00B0000 S1_V02N0001 arc: V00T0000 W1_H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 F7 arc: A2 V00B0000 arc: A3 H00L0100 arc: A4 N1_V02S0301 arc: A5 H02E0701 arc: A6 V00T0100 arc: A7 H02E0501 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 N1_V02S0101 arc: B3 V01N0001 arc: B4 H01E0101 arc: B5 F3 arc: B6 H02E0101 arc: B7 V02S0501 arc: C0 F4 arc: C1 W1_H02E0401 arc: C2 V02S0601 arc: C3 E1_H02W0401 arc: C4 H02W0601 arc: C5 E1_H02W0401 arc: C6 H02E0401 arc: C7 H02E0601 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 H02W0201 arc: D2 H00R0000 arc: D3 V02S0201 arc: D4 H01W0000 arc: D5 E1_H02W0201 arc: D6 V01N0001 arc: D7 V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q0 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q1 arc: E1_H02E0701 F5 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F6 arc: S1_V02S0101 Q1 arc: S3_V06S0103 F2 arc: V01S0000 Q1 arc: V01S0100 Q0 word: SLICEC.K1.INIT 1000100000001000 word: SLICEC.K0.INIT 0101010100010101 word: SLICEA.K0.INIT 0011111111111111 word: SLICEA.K1.INIT 0111111101110111 word: SLICEB.K1.INIT 0000011111110111 word: SLICED.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1110111011100000 word: SLICEB.K0.INIT 1010011010010101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R12C58:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02S0001 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0003 H06E0003 arc: V00B0100 W1_H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: A1 H01E0001 arc: A2 H02E0501 arc: A3 H01E0001 arc: A4 H02E0701 arc: A5 E1_H02W0701 arc: A7 H02E0501 arc: B1 W1_H02E0101 arc: B2 H02E0101 arc: B5 V00B0100 arc: B6 V00T0000 arc: B7 H01E0101 arc: C0 H00L0000 arc: C1 H02W0601 arc: C2 E1_H01W0000 arc: C3 N1_V01N0001 arc: C4 H01E0001 arc: C5 E1_H02W0601 arc: C6 V02S0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H01E0101 arc: D3 W1_H02E0001 arc: D4 W1_H02E0001 arc: D5 F2 arc: D6 H00R0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F4 arc: E1_H02E0101 F1 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: V00B0000 F6 arc: W1_H02W0101 F1 word: SLICEB.K0.INIT 0000000000101111 word: SLICEB.K1.INIT 0000000010100000 word: SLICEC.K1.INIT 0100000000000000 word: SLICEA.K1.INIT 1010000010000000 word: SLICED.K0.INIT 1100110011001111 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1111000011111010 word: SLICEC.K0.INIT 0000000010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R12C59:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 H01E0101 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H06W0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 H01E0001 arc: S3_V06S0203 E3_H06W0203 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 E3_H06W0303 arc: A0 F5 arc: A2 V02S0701 arc: A3 H02E0701 arc: A4 V02S0101 arc: A5 H02W0501 arc: B0 H02E0301 arc: B2 F3 arc: B3 W1_H02E0301 arc: B4 V02S0701 arc: B5 H02E0301 arc: B6 V00B0000 arc: B7 V02S0701 arc: C0 E1_H01W0000 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V02S0201 arc: C5 V02N0201 arc: C6 V02S0001 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D4 H00L0100 arc: D5 E1_H02W0201 arc: D6 V02S0401 arc: D7 W1_H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 F3 arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M7 H00L0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: V00B0000 F4 arc: V00B0100 F7 arc: V01S0100 Q7 arc: W1_H02W0001 F2 arc: W1_H02W0601 F6 arc: W1_H02W0701 F5 word: SLICEB.K1.INIT 0001000000010000 word: SLICEC.K0.INIT 1010001011110011 word: SLICEB.K0.INIT 0011000100110001 word: SLICEA.K0.INIT 1111111110001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEC.K1.INIT 0000111100001101 word: SLICED.K1.INIT 1100110000000000 word: SLICED.K0.INIT 1100110000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C60:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 S1_V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 F5 arc: A1 F5 arc: A4 V02N0301 arc: A5 E1_H01W0000 arc: A7 V02N0301 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B4 H02W0101 arc: B5 V01S0000 arc: B7 V00B0000 arc: C0 F4 arc: C1 F4 arc: C2 E1_H02W0401 arc: C4 H02W0401 arc: C5 V02N0001 arc: C7 V01N0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 H02W0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D7 V01N0001 arc: E1_H01E0101 Q5 arc: E1_H02E0001 F0 arc: E1_H02E0501 Q5 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: LSR0 V00T0000 arc: M0 V00B0100 arc: M5 H00R0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N3_V06N0103 F2 arc: V01S0000 Q5 arc: V01S0100 F7 word: SLICEC.K0.INIT 0010001000001010 word: SLICEC.K1.INIT 0000010100000011 word: SLICED.K1.INIT 0000010000010101 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111011111110 word: SLICEB.K0.INIT 0000000000001111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R12C61:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 H06W0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 N1_V01S0000 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 V02N0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0501 arc: A0 F7 arc: A2 H02E0501 arc: A3 E1_H01E0001 arc: A4 V02N0301 arc: A5 N1_V01S0100 arc: A6 F5 arc: A7 E1_H01W0000 arc: B0 F3 arc: B1 F3 arc: B2 N1_V02S0101 arc: B3 V02N0301 arc: B4 H01E0101 arc: B5 V01S0000 arc: B6 V00B0100 arc: B7 V00B0000 arc: C0 F4 arc: C1 F4 arc: C2 V02N0601 arc: C3 H00L0100 arc: C4 Q4 arc: C5 V02S0001 arc: C6 E1_H02W0401 arc: C7 V02N0001 arc: CE0 W1_H02E0101 arc: CE1 V02S0201 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 H02E0201 arc: D3 V01S0100 arc: D4 H02W0201 arc: D5 V02S0401 arc: D6 F2 arc: D7 H02W0201 arc: E1_H01E0101 Q6 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q3 arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0301 arc: M0 H02W0601 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F6 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: V01S0100 Q1 arc: W1_H02W0101 Q1 arc: W1_H02W0401 Q4 word: SLICED.K1.INIT 0000000011001010 word: SLICEB.K1.INIT 0000010010001100 word: SLICEC.K0.INIT 0000010100010001 word: SLICEA.K0.INIT 0101010111111100 word: SLICEA.K1.INIT 0000000011111100 word: SLICEC.K1.INIT 1110000001000000 word: SLICEB.K0.INIT 0000111000000010 word: SLICED.K0.INIT 1100110011001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C62:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 S1_V02N0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 V06S0303 arc: H00R0100 H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0701 H06E0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A2 N1_V02S0501 arc: A3 H00L0100 arc: A6 W1_H02E0701 arc: A7 E1_H02W0501 arc: B0 V02N0301 arc: B1 F3 arc: B2 H02E0101 arc: B3 W1_H02E0301 arc: B6 H02E0301 arc: B7 V02S0701 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H02E0601 arc: C3 V02N0601 arc: C6 E1_H01E0101 arc: C7 H02W0401 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D2 V01S0100 arc: D3 H01E0101 arc: D6 W1_H02E0001 arc: D7 F2 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q3 arc: LSR0 V00B0000 arc: M0 V00T0100 arc: M3 H00R0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: V01S0000 F6 arc: V01S0100 Q3 arc: W1_H02W0701 F7 word: SLICEB.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K0.INIT 0000100000101010 word: SLICEB.K0.INIT 0101000101000000 word: SLICED.K1.INIT 0101010101000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C63:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 W1_H02E0701 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0501 H06W0303 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02S0501 arc: A0 H00L0100 arc: A2 E1_H02W0701 arc: A4 F5 arc: A6 F5 arc: A7 H02W0701 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 V01N0001 arc: B5 H02E0101 arc: B7 F3 arc: C0 H02W0401 arc: C1 V02N0601 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V01N0101 arc: C5 V02N0201 arc: C6 V00T0000 arc: C7 H02W0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 S1_V02N0201 arc: D3 F2 arc: D4 V02N0401 arc: D5 H02W0001 arc: D6 F2 arc: D7 H02W0201 arc: E1_H01E0101 F4 arc: E1_H02E0701 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 Q1 arc: H01W0100 F4 arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N1_V02N0201 F2 arc: N1_V02N0401 F6 arc: N1_V02N0601 F4 arc: N3_V06N0103 Q1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: V01S0000 F3 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000000000100 word: SLICEC.K1.INIT 0000110000000000 word: SLICEB.K1.INIT 0000000000111111 word: SLICEB.K0.INIT 0100000000000000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K0.INIT 1010000000000000 word: SLICEA.K0.INIT 0000100000001000 word: SLICEA.K1.INIT 1100110000001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C64:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 V06S0203 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 N1_V02S0501 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 E1_H01W0100 arc: A0 F5 arc: A1 V01N0101 arc: A3 V00T0000 arc: A5 S1_V02N0301 arc: A6 S1_V02N0101 arc: B1 V00T0000 arc: B2 V01N0001 arc: B3 Q3 arc: B4 F3 arc: B5 S1_V02N0501 arc: B6 V00T0000 arc: C0 E1_H02W0601 arc: C1 H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 Q4 arc: C5 H02E0401 arc: C6 H02W0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00B0100 arc: D5 V01N0001 arc: D6 V01N0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F4 arc: E3_H06E0003 Q0 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q0 arc: H01W0100 F1 arc: LSR0 E1_H02W0301 arc: LSR1 V00T0100 arc: M3 H02E0201 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0601 Q4 arc: V01S0000 Q4 arc: V01S0100 Q3 arc: W1_H02W0201 F2 arc: W1_H02W0301 F1 arc: W1_H02W0401 F4 arc: W1_H02W0701 F5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0100000000000000 word: SLICEC.K1.INIT 0010000000000000 word: SLICEA.K1.INIT 0000000010000000 word: SLICEB.K0.INIT 0000000011000000 word: SLICEC.K0.INIT 1100000011000000 word: SLICEB.K1.INIT 0000000000100000 word: SLICEA.K0.INIT 1010000011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C65:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 H01E0101 arc: S1_V02S0601 E3_H06W0303 arc: V00B0100 W1_H02E0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02N0701 arc: A3 V02N0701 arc: A4 F7 arc: A5 F7 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 V02N0101 arc: B5 V02N0701 arc: B6 V02N0501 arc: B7 V02N0701 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 S1_V02N0401 arc: C3 E1_H01W0000 arc: C4 V02N0201 arc: C6 S1_V02N0201 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 F0 arc: D3 V02S0001 arc: D4 E1_H01W0100 arc: D5 E1_H01W0100 arc: D6 H02W0001 arc: D7 S1_V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0401 F6 arc: V00T0100 F3 arc: V01S0100 F7 arc: W1_H02W0401 F4 arc: W3_H06W0103 Q2 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 1111111100000101 word: SLICEA.K0.INIT 0001010100111111 word: SLICED.K1.INIT 0000110011001100 word: SLICEA.K1.INIT 0011111100111111 word: SLICEB.K0.INIT 0000000000110000 word: SLICEC.K0.INIT 0000010100000000 word: SLICEC.K1.INIT 0001000100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 .tile R12C66:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: H00L0000 E1_H02W0201 arc: H00R0000 S1_V02N0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H01E0001 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0401 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02N0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 H01E0101 arc: W3_H06W0303 E3_H06W0203 arc: A1 F7 arc: A3 H02E0701 arc: A4 H02W0501 arc: A5 V02S0101 arc: A6 F5 arc: A7 V02S0301 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 E1_H02W0101 arc: B4 N1_V01S0000 arc: B5 H00L0000 arc: B6 H02E0301 arc: C0 H02E0601 arc: C1 H02E0601 arc: C3 N1_V01S0100 arc: C4 N1_V02S0201 arc: C5 H02W0601 arc: C6 V02N0001 arc: C7 H02E0401 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 H02W0001 arc: D4 H00L0100 arc: D5 N1_V02S0601 arc: D6 E1_H01W0100 arc: D7 H01W0000 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 F0 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M3 H00R0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V02N0301 Q3 arc: N3_V06N0103 F2 arc: S3_V06S0303 F6 arc: V01S0000 F7 arc: V01S0100 F7 arc: W1_H02W0001 F2 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 1100110000000000 word: SLICED.K1.INIT 0101000001010101 word: SLICEA.K0.INIT 0000110000000000 word: SLICEA.K1.INIT 0000100010101000 word: SLICEC.K1.INIT 1111110110101000 word: SLICED.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 1100110011001000 word: SLICEC.K0.INIT 1111000000100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R12C67:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0003 H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 V02S0001 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 S1_V02N0701 arc: A0 V02S0701 arc: A2 V02S0701 arc: A4 E1_H02W0701 arc: A6 F7 arc: A7 Q7 arc: B0 H02E0101 arc: B2 H02W0301 arc: B4 V01S0000 arc: B6 N1_V02S0701 arc: B7 V02N0701 arc: C0 V02S0401 arc: C2 V02S0401 arc: C4 E1_H01E0101 arc: C6 V02S0201 arc: C7 H02E0601 arc: CE0 W1_H02E0101 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 E1_H02W0201 arc: D6 E1_H02W0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q1 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F6 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0101 Q1 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICED.K1.INIT 0000101100001000 word: SLICEC.K0.INIT 0000000011011000 word: SLICED.K0.INIT 1111110010101100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 0011001100110010 word: SLICEB.K0.INIT 0000000100000000 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C68:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 E1_H02W0701 arc: A0 H02E0701 arc: A1 H00L0000 arc: A2 H02E0501 arc: A3 V02S0701 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: A6 F5 arc: A7 H02E0701 arc: B0 H01W0100 arc: B1 V00T0000 arc: B2 N1_V02S0101 arc: B3 H02E0301 arc: B4 V02N0701 arc: B5 V02S0501 arc: B6 V00B0100 arc: B7 V02S0501 arc: C0 H02E0601 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 V02N0601 arc: C4 Q4 arc: C5 S1_V02N0001 arc: C6 V02N0001 arc: C7 S1_V02N0001 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 F2 arc: D2 Q2 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 H00R0100 arc: D6 V02S0601 arc: D7 H01W0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: S1_V02S0101 F3 arc: V00B0100 F7 arc: V01S0000 F6 arc: V01S0100 Q4 arc: W1_H02W0101 F1 word: SLICEB.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 1110001000000000 word: SLICED.K1.INIT 0000101100001000 word: SLICEC.K1.INIT 1110000000100000 word: SLICED.K0.INIT 1111000011100000 word: SLICEA.K0.INIT 0000000010101100 word: SLICEB.K0.INIT 1100010010000000 word: SLICEA.K1.INIT 0000111100001011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C69:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W1_H02E0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 H01E0101 arc: S1_V02S0401 V01N0001 arc: V00B0000 H02E0601 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V02N0701 arc: A0 F7 arc: A2 S1_V02N0501 arc: A4 F5 arc: A6 F7 arc: B0 V00T0000 arc: B2 H02E0301 arc: B4 H01E0101 arc: B6 H01E0101 arc: C0 F4 arc: C2 H02W0601 arc: C4 V02S0201 arc: C5 V02N0001 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 E1_H02W0001 arc: D4 H02W0001 arc: D5 V00B0000 arc: D6 E1_H02W0001 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: S1_V02S0001 Q0 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 F2 arc: W1_H02W0401 F6 word: SLICEC.K1.INIT 1111111100001111 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1110110010100000 word: SLICEC.K0.INIT 0000010000000000 word: SLICEB.K0.INIT 0000100000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1000100000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 .tile R12C70:PLC2 arc: E1_H02E0101 V06S0103 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 H06E0203 arc: V00B0000 W1_H02E0601 arc: W1_H02W0001 V02S0001 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: A0 W1_H02E0501 arc: A2 H00L0100 arc: B0 V01N0001 arc: B2 H02E0301 arc: C0 S1_V02N0401 arc: C2 N1_V01S0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 H00R0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E1_H02E0201 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: LSR0 V00B0000 arc: M0 H02W0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F2 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0101010111110111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100111000001010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C71:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 S1_V02N0001 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 V06S0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02S0701 arc: A3 V02S0501 arc: A4 W1_H02E0501 arc: A5 N1_V01S0100 arc: B0 V02N0301 arc: B1 Q1 arc: B2 E1_H02W0101 arc: B3 V02S0301 arc: B4 N1_V02S0701 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 Q4 arc: C5 V02N0001 arc: CE0 N1_V02S0201 arc: CE1 H02E0101 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 H01W0000 arc: D5 H02E0201 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0000 Q6 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00T0000 arc: M3 H00L0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: S1_V02S0401 F4 arc: V00B0100 F5 arc: V00T0000 F0 arc: V00T0100 Q1 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W3_H06W0103 F2 word: SLICEC.K1.INIT 0000010111110101 word: SLICEA.K0.INIT 0001000011010000 word: SLICEA.K1.INIT 0011111101011111 word: SLICEB.K0.INIT 1100000010000000 word: SLICEB.K1.INIT 1100110010001100 word: SLICEC.K0.INIT 0011001000010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C72:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V06S0303 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02W0701 arc: V00B0100 H02E0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E1_H02W0701 arc: C0 F4 arc: C1 H02E0401 arc: C4 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02N0001 arc: D4 E1_H02W0001 arc: E1_H01E0001 Q0 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: H01W0000 Q1 arc: MUXCLK0 CLK0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 arc: W3_H06W0203 F4 word: SLICEA.K1.INIT 1111000011111111 word: SLICEC.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C73:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V01N0101 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02S0201 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00L0000 arc: A1 E1_H01E0001 arc: A2 F5 arc: A3 F5 arc: A5 V00T0100 arc: A6 H00R0000 arc: A7 H02E0501 arc: B1 Q1 arc: B2 H00R0100 arc: B4 V02N0501 arc: B5 H00L0000 arc: B7 N1_V01S0000 arc: C0 F4 arc: C1 V02N0401 arc: C2 F4 arc: C3 F4 arc: C5 E1_H02W0401 arc: C6 Q6 arc: C7 S1_V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V01S0100 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V02N0601 arc: D5 E1_H02W0001 arc: D7 V02S0601 arc: E1_H01E0001 F6 arc: E1_H02E0401 F6 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: M2 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 Q6 arc: S3_V06S0103 Q1 arc: V00B0100 F7 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0100 F4 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0101000001010000 word: SLICEB.K0.INIT 0011111100110111 word: SLICEB.K1.INIT 0000111100000101 word: SLICEA.K1.INIT 1110110010100000 word: SLICEA.K0.INIT 1111111110100000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000110011 word: SLICED.K1.INIT 0000000000010000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C74:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 E1_H02W0201 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0001 arc: W1_H02W0001 N1_V01S0000 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A2 H01E0001 arc: A3 H02E0701 arc: A4 H02E0701 arc: A5 V02S0101 arc: A6 H02W0701 arc: B0 H02E0301 arc: B1 F3 arc: B2 V02N0101 arc: B4 V00B0100 arc: B5 S1_V02N0501 arc: B6 V02S0501 arc: B7 V02S0701 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 V02S0001 arc: C6 S1_V02N0001 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02N0001 arc: D2 Q2 arc: D3 H02E0001 arc: D4 V00B0000 arc: D5 S1_V02N0601 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F7 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0100 F5 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V02N0601 F4 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q1 arc: S3_V06S0303 F5 arc: V00B0100 F7 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0701 F5 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 1110110010100000 word: SLICEC.K0.INIT 0000010000000000 word: SLICEB.K1.INIT 0101000000000000 word: SLICEA.K1.INIT 1110110010100000 word: SLICED.K1.INIT 0000000000110011 word: SLICEB.K0.INIT 1111100010001000 word: SLICEC.K1.INIT 0000000010001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 .tile R12C75:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 S1_V02N0401 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 W3_H06E0203 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 V02S0701 arc: A0 F5 arc: A1 H00R0000 arc: B0 H02W0101 arc: B1 H02E0101 arc: B4 H02E0101 arc: B5 H01E0101 arc: B6 H02E0101 arc: C0 V02S0401 arc: C1 F4 arc: C4 H02E0401 arc: C5 S1_V02N0001 arc: C6 F4 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02E0201 arc: D4 F0 arc: D5 H02E0001 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F6 arc: LSR0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 F5 arc: S3_V06S0003 Q0 word: SLICEC.K1.INIT 0000000000001100 word: SLICEA.K0.INIT 1000000000000000 word: SLICEC.K0.INIT 1111000000110000 word: SLICED.K0.INIT 1100000011000000 word: SLICEA.K1.INIT 1010000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R12C76:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 H01E0101 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0303 H01E0101 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: A3 V00T0000 arc: B1 V00T0000 arc: C0 H02W0601 arc: C1 E1_H02W0401 arc: C2 V02N0601 arc: C3 E1_H02W0401 arc: C4 H02E0601 arc: CE1 S1_V02N0201 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 F0 arc: D2 Q2 arc: D3 F0 arc: D4 V00B0000 arc: E1_H02E0001 F0 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: S1_V02S0001 Q2 arc: S1_V02S0101 F1 arc: S1_V02S0301 F3 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 Q4 arc: V01S0000 Q4 word: SLICEB.K1.INIT 0000101000000000 word: SLICEA.K1.INIT 0011000000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEC.K0.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C77:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02E0201 arc: H00R0000 H02W0601 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N1_V01S0000 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: A2 V00B0000 arc: B0 H00R0100 arc: C0 V02N0601 arc: C2 V02N0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 E1_H02W0001 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H00R0100 Q5 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M4 V00T0000 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: V00B0000 Q4 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1111110000001100 word: SLICEB.K0.INIT 1111101000001010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C78:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 W1_H02E0101 arc: H00L0100 W1_H02E0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 H01E0101 arc: N3_V06N0303 H01E0101 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0401 W3_H06E0203 arc: V00B0100 V02S0301 arc: V00T0000 H02E0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V06S0203 arc: A2 H02W0701 arc: A3 V00T0000 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 V02S0101 arc: B3 V02N0301 arc: B4 V02S0701 arc: C0 H02W0401 arc: C1 E1_H01W0000 arc: C3 F4 arc: C4 V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 V02S0201 arc: D4 W1_H02E0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q2 arc: E1_H02E0101 F3 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00R0100 Q7 arc: H01W0000 Q5 arc: H01W0100 F3 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0501 arc: M4 V00B0100 arc: M5 H00L0100 arc: M6 E1_H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q6 arc: S1_V02S0301 F3 arc: S1_V02S0601 Q4 arc: S1_V02S0701 Q7 arc: V00B0000 Q4 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0101 F3 arc: W3_H06W0303 Q6 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000001100000000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1010101011001100 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C79:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: H00R0100 H02E0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: A2 H02E0701 arc: A3 H02W0701 arc: B0 H02W0101 arc: B4 V02N0501 arc: B5 H01E0101 arc: B6 V00T0000 arc: B7 H02E0301 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 W1_H02E0401 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0701 Q5 arc: S1_V02S0001 Q2 arc: S1_V02S0401 F4 arc: S1_V02S0601 Q4 arc: V01S0000 Q1 arc: W1_H02W0401 F6 arc: W1_H02W0501 Q5 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C80:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 W1_H02E0301 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02S0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 V02S0701 arc: W3_H06W0203 S3_V06N0203 arc: A3 V00B0000 arc: A4 V02S0101 arc: A5 V02N0101 arc: B0 V02N0301 arc: B1 H02E0101 arc: B2 V02S0301 arc: B6 H02W0301 arc: B7 H02E0301 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F2 arc: N1_V01N0001 F4 arc: N1_V01N0101 F3 arc: V01S0000 F0 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C81:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02W0401 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 arc: A0 V02N0501 arc: A1 H00R0000 arc: A3 V00T0000 arc: A5 E1_H01W0000 arc: A7 V02S0101 arc: B2 H02W0101 arc: B4 H00L0000 arc: B6 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E1_H02E0301 F3 arc: E1_H02E0601 F4 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F2 arc: S1_V02S0001 F0 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C82:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02N0201 arc: V00T0000 V02N0601 arc: W1_H02W0101 S1_V02N0101 arc: W3_H06W0003 E1_H01W0000 arc: A0 E1_H01E0001 arc: A4 V02N0101 arc: A6 H02E0701 arc: B5 H00L0000 arc: C4 W1_H02E0601 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 V02S0601 arc: D5 W1_H02E0001 arc: D6 W1_H02E0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: H01W0000 Q6 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M2 V00B0000 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: S1_V02S0201 Q0 arc: S1_V02S0601 Q4 arc: V00T0100 Q1 arc: V01S0000 Q6 arc: V01S0100 Q5 arc: W1_H02W0401 Q4 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 1111010110100000 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1010101011110000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R12C83:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 E1_H01W0100 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: W3_H06W0303 V06N0303 arc: A2 V00B0000 arc: A4 H02W0501 arc: B0 H02E0101 arc: B2 V02N0301 arc: C0 W1_H02E0601 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V00T0100 arc: D4 H02E0001 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0000 Q7 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0501 arc: M6 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0401 Q6 arc: S3_V06S0203 Q4 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 arc: W1_H02W0201 Q0 word: SLICEC.K0.INIT 1010101000000000 word: SLICEB.K0.INIT 1110111000100010 word: SLICEA.K0.INIT 1111001111000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C84:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02S0601 arc: H00L0000 S1_V02N0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02N0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 N1_V01S0100 arc: A2 H02E0701 arc: B0 H02E0301 arc: C1 H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0701 Q7 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 W1_H02E0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0201 Q0 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: V01S0000 Q2 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1010101000000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C85:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00L0100 H02E0101 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S1_V02N0601 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 H06E0303 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: A0 H02W0701 arc: A1 H02W0501 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: C0 H00L0000 arc: C1 N1_V02S0401 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02E0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q2 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M3 H00L0100 arc: M6 H02E0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 word: SLICEA.K0.INIT 1010101010111000 word: SLICEA.K1.INIT 1010101110101000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C86:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 V06N0303 arc: H00L0100 H02W0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 E1_H01W0100 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: A0 E1_H02W0701 arc: A1 H00L0100 arc: A3 H02E0701 arc: A4 F5 arc: A5 E1_H01W0000 arc: A6 W1_H02E0701 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 W1_H02E0301 arc: B3 V02N0301 arc: B4 V00B0100 arc: B5 V02S0701 arc: B6 H02E0301 arc: B7 H02E0101 arc: C0 S1_V02N0601 arc: C1 V02S0401 arc: C3 H02E0601 arc: C4 V02S0001 arc: C5 H02W0601 arc: C6 H01E0001 arc: C7 H02W0401 arc: CE0 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V02S0201 arc: D3 H01E0101 arc: D4 F0 arc: D5 E1_H02W0001 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 Q6 arc: E1_H02E0001 F2 arc: E1_H02E0501 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: LSR0 H02W0501 arc: LSR1 V00T0000 arc: M2 V00B0000 arc: M6 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: V00B0000 F6 arc: V00B0100 F7 arc: V01S0000 F4 word: SLICEA.K1.INIT 1111000011100100 word: SLICEC.K1.INIT 1001000000001001 word: SLICED.K1.INIT 1111011010011111 word: SLICEA.K0.INIT 1000001001000001 word: SLICEC.K0.INIT 0010000000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R12C87:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V02S0601 arc: A2 H01E0001 arc: A3 H02E0501 arc: A5 Q5 arc: A7 Q7 arc: B0 V02S0301 arc: B4 V01S0000 arc: B6 V02N0701 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F4 arc: E1_H02E0001 Q0 arc: E1_H02E0101 Q1 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M5 W1_H02E0001 arc: M6 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F5 arc: N1_V02N0401 F6 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0101010101011010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R12C88:PLC2 arc: E1_H02E0701 N1_V02S0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 H02E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 H01E0101 arc: B0 H02E0101 arc: B1 V00T0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: W1_H02W0001 F0 arc: W1_H02W0301 F1 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R13C10:PLC2 arc: H01W0000 E3_H06W0103 .tile R13C13:PLC2 arc: E3_H06E0103 W3_H06E0003 .tile R13C16:PLC2 arc: W3_H06W0103 E3_H06W0003 .tile R13C19:PLC2 arc: E3_H06E0203 W3_H06E0103 .tile R13C22:PLC2 arc: N1_V02N0401 H06E0203 arc: W3_H06W0003 E3_H06W0303 .tile R13C28:PLC2 arc: E1_H02E0201 V02N0201 arc: W3_H06W0303 E3_H06W0203 .tile R13C29:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 H02E0201 .tile R13C30:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N1_V02S0401 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H02W0501 arc: V00T0000 W1_H02E0201 arc: A4 N1_V02S0301 arc: A5 S1_V02N0101 arc: A6 H02W0501 arc: B4 V01S0000 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: C4 N1_V02S0001 arc: C5 F4 arc: C6 Q6 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H02E0001 arc: D6 H02W0001 arc: E1_H01E0001 F6 arc: E1_H02E0501 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: LSR0 V00T0000 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V00B0000 Q4 arc: V01S0000 Q6 word: SLICED.K0.INIT 0001000100000101 word: SLICEC.K0.INIT 0101010000000100 word: SLICEC.K1.INIT 0101010001010101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C31:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02N0001 arc: H00L0100 H02W0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N1_V02S0101 arc: V00B0000 H02W0601 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0401 arc: A0 V02N0501 arc: A1 N1_V02S0501 arc: A2 V00T0000 arc: A5 E1_H02W0701 arc: A6 N1_V02S0301 arc: B0 E1_H02W0101 arc: B1 V02S0101 arc: B2 N1_V02S0301 arc: B5 V00B0100 arc: B6 V00B0100 arc: C0 E1_H02W0601 arc: C1 H02E0401 arc: C2 V02N0601 arc: C5 E1_H02W0601 arc: C6 Q6 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 H02W0001 arc: D5 H01W0000 arc: D6 H02W0001 arc: E1_H01E0101 F6 arc: E1_H02E0101 F1 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q6 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 H02W0601 arc: M2 H02W0601 arc: M5 H00L0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F0 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q2 word: SLICEC.K1.INIT 0000001010100010 word: SLICEA.K0.INIT 0000000100110001 word: SLICED.K0.INIT 1110010000000000 word: SLICEB.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 1111000011010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C32:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E1_H01W0000 arc: H00L0100 H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 H01E0001 arc: A0 W1_H02E0501 arc: A2 H00L0100 arc: A4 E1_H01W0000 arc: A6 V02N0301 arc: B0 V00T0000 arc: B2 S1_V02N0301 arc: B4 H00L0000 arc: B6 H02E0101 arc: C0 H00R0100 arc: C2 H00L0000 arc: C4 Q4 arc: C6 E1_H02W0401 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 V01S0100 arc: D4 H02W0001 arc: D6 F0 arc: E1_H01E0001 F4 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: LSR0 W1_H02E0301 arc: M2 V00B0000 arc: M4 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: V00T0000 F2 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0000010100010001 word: SLICEB.K0.INIT 0011001000010000 word: SLICEA.K0.INIT 1010101010101000 word: SLICED.K0.INIT 1010101000001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C33:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: H00L0000 W1_H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 F7 arc: A1 F7 arc: A2 V00T0000 arc: A3 V00T0000 arc: A5 Q5 arc: A6 F5 arc: A7 Q7 arc: B0 H00R0100 arc: B2 H01W0100 arc: B3 V02S0301 arc: B5 V00B0100 arc: B6 F3 arc: B7 H02E0301 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 H02E0601 arc: C3 N1_V02S0601 arc: C5 V02N0001 arc: C6 N1_V02S0001 arc: C7 E1_H01E0101 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D5 N1_V02S0601 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 H01E0001 arc: M2 V00B0000 arc: M5 W1_H02E0001 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F0 arc: V00B0100 Q7 arc: V00T0000 Q2 word: SLICED.K1.INIT 0001000011010000 word: SLICEB.K0.INIT 0000000100001101 word: SLICEA.K0.INIT 1111110010101100 word: SLICEA.K1.INIT 1111111110101111 word: SLICEC.K1.INIT 1010000011000000 word: SLICEB.K1.INIT 0011001000000010 word: SLICED.K0.INIT 0000000100000001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C34:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V06S0203 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02S0701 arc: A2 F5 arc: A3 F5 arc: A5 H02W0701 arc: A6 H02W0701 arc: A7 V02S0301 arc: B0 H02E0301 arc: B2 H00R0100 arc: B5 H00L0000 arc: B6 N1_V02S0701 arc: B7 N1_V01S0000 arc: C0 H02E0401 arc: C2 H02W0401 arc: C3 N1_V02S0601 arc: C5 V00B0100 arc: C6 E1_H02W0601 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 V00T0100 arc: D3 V01S0100 arc: D5 W1_H02E0001 arc: D6 H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 F7 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F6 arc: N1_V02N0201 Q0 arc: V01S0100 F7 word: SLICEA.K0.INIT 0000000100001101 word: SLICEC.K1.INIT 0101000000110000 word: SLICED.K1.INIT 0000000100001011 word: SLICEB.K0.INIT 1110111011110000 word: SLICEB.K1.INIT 1111111110101111 word: SLICED.K0.INIT 1000100011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C35:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V02N0701 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: A0 V02S0501 arc: A1 V02S0701 arc: A2 H02W0501 arc: A3 H00L0100 arc: A4 H02W0501 arc: A5 W1_H02E0701 arc: A7 V00T0100 arc: B0 V02S0101 arc: B2 H02W0301 arc: B3 E1_H01W0100 arc: B4 H02W0101 arc: B5 F3 arc: B6 N1_V02S0501 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 N1_V01S0100 arc: C2 V02N0601 arc: C3 V02N0401 arc: C4 V02S0001 arc: C5 V01N0101 arc: C6 F4 arc: C7 E1_H02W0601 arc: CE0 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 E1_H02W0201 arc: D2 V02S0001 arc: D3 S1_V02N0201 arc: D4 E1_H01W0100 arc: D6 F2 arc: D7 W1_H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F5 arc: V00B0100 F7 arc: V00T0100 Q1 arc: V01S0000 Q7 arc: W1_H02W0701 Q7 word: SLICED.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K0.INIT 1110010000000000 word: SLICEC.K0.INIT 0000110100001000 word: SLICED.K0.INIT 0000000000001100 word: SLICEB.K1.INIT 0000101000001100 word: SLICEC.K1.INIT 0000000100000001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C36:PLC2 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 V02S0201 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 H06W0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S3_V06S0203 H06W0203 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06S0203 arc: A0 H02E0701 arc: A1 E1_H01E0001 arc: A2 F5 arc: A3 F5 arc: A4 H02W0501 arc: A5 H02E0501 arc: A6 V02N0101 arc: A7 Q7 arc: B0 H02E0101 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: B4 H02W0301 arc: B6 N1_V02S0501 arc: B7 H02W0301 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 Q4 arc: C5 F6 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02E0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 V01N0001 arc: D6 E1_H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q1 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: H01W0100 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 H02E0601 arc: M3 H00R0000 arc: M4 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F4 arc: S1_V02S0701 F7 arc: V01S0000 F7 arc: V01S0100 Q7 arc: W1_H02W0101 Q3 word: SLICEC.K0.INIT 0000000100100011 word: SLICED.K1.INIT 0000110001000100 word: SLICED.K0.INIT 1110001000000000 word: SLICEC.K1.INIT 0000000000000101 word: SLICEA.K0.INIT 0000100000101010 word: SLICEA.K1.INIT 0011111101011111 word: SLICEB.K0.INIT 1100110100000000 word: SLICEB.K1.INIT 0000000100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C37:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0203 H06W0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 V02S0701 arc: A2 V02S0501 arc: B0 H00R0100 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: C0 N1_V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0100 Q3 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V02N0201 F2 arc: V00T0100 Q1 arc: V01S0000 F0 word: SLICEB.K0.INIT 0000000010101100 word: SLICEB.K1.INIT 0000000000001100 word: SLICEA.K0.INIT 0000110100001000 word: SLICEA.K1.INIT 0000000000001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R13C38:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E3_H06E0003 W3_H06E0303 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E3_H06W0203 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0501 arc: A2 F5 arc: A3 E1_H02W0701 arc: A5 S1_V02N0301 arc: A6 N1_V01S0100 arc: A7 N1_V01S0100 arc: B2 N1_V02S0301 arc: B3 H02W0301 arc: B5 H02W0301 arc: B6 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 H00L0000 arc: C2 H02W0401 arc: C3 V02N0401 arc: C5 V02N0001 arc: C7 S1_V02N0001 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 V01S0100 arc: D3 V02N0001 arc: D5 V02S0601 arc: D6 V00B0000 arc: D7 V02N0601 arc: E1_H01E0001 F6 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F0 arc: H01W0100 Q0 arc: LSR0 W1_H02E0501 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F3 arc: V01S0100 F7 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1101000010000000 word: SLICED.K1.INIT 0000101000001100 word: SLICEC.K1.INIT 1000100010100000 word: SLICEB.K0.INIT 1111000011100000 word: SLICED.K0.INIT 0101010100110011 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C39:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 E1_H02W0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0501 arc: A1 F5 arc: A2 H02W0501 arc: A4 V00T0000 arc: A5 V00B0000 arc: A6 V00T0100 arc: A7 E1_H01W0000 arc: B0 E1_H01W0100 arc: B2 H02W0301 arc: B3 Q3 arc: B5 V02S0501 arc: B6 H02W0101 arc: B7 H02W0301 arc: C0 E1_H02W0401 arc: C1 H00L0000 arc: C2 E1_H01W0000 arc: C3 W1_H02E0401 arc: C4 E1_H02W0601 arc: C5 H02W0401 arc: C6 H01E0001 arc: C7 H02W0401 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D2 H02E0001 arc: D3 V01S0100 arc: D4 F0 arc: D5 H02W0201 arc: D6 H01W0000 arc: D7 V02S0401 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: LSR1 H02E0301 arc: M1 H00R0100 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F6 arc: V00B0100 F7 arc: V00T0000 F2 arc: V00T0100 F3 arc: V01S0000 Q1 arc: V01S0100 Q1 arc: W1_H02W0301 Q3 word: SLICED.K1.INIT 1100101000000000 word: SLICEC.K1.INIT 0010001100100000 word: SLICEA.K1.INIT 0000000000000101 word: SLICEB.K0.INIT 1101100000000000 word: SLICEA.K0.INIT 0000000011100100 word: SLICEC.K0.INIT 0000000000000101 word: SLICEB.K1.INIT 0011000000111111 word: SLICED.K0.INIT 0010001000110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C3:PLC2 arc: S3_V06S0203 E3_H06W0203 .tile R13C40:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V01N0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 H06W0203 arc: V00B0100 H02E0501 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A3 V00B0000 arc: A4 F5 arc: A5 V00T0000 arc: A6 V02S0301 arc: A7 E1_H01W0000 arc: B3 Q3 arc: B4 F3 arc: B5 H02E0101 arc: B6 V01S0000 arc: B7 H02W0101 arc: C3 H02E0601 arc: C4 N1_V02S0201 arc: C5 H02E0401 arc: C7 V02N0001 arc: CE0 V02S0201 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D4 E1_H02W0201 arc: D5 V02S0401 arc: D6 E1_H01W0100 arc: D7 H02W0201 arc: E1_H01E0001 Q5 arc: E1_H02E0601 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F4 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0000 F7 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q3 arc: W1_H02W0601 F6 word: SLICED.K1.INIT 0011000000100010 word: SLICED.K0.INIT 0000000000100010 word: SLICEC.K1.INIT 0000000100110001 word: SLICEB.K1.INIT 0011010100000000 word: SLICEC.K0.INIT 1111000100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C41:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 F5 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V00B0000 arc: A5 V00T0100 arc: A7 Q7 arc: B0 V02N0101 arc: B1 H02E0301 arc: B2 W1_H02E0301 arc: B3 V02S0101 arc: B4 N1_V02S0701 arc: B5 H00L0000 arc: B6 E1_H02W0301 arc: B7 W1_H02E0301 arc: C0 V02N0401 arc: C1 H02W0401 arc: C2 W1_H02E0401 arc: C3 H02E0401 arc: C4 H02W0601 arc: C5 F4 arc: C6 E1_H01E0101 arc: C7 W1_H02E0401 arc: CE0 N1_V02S0201 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V02S0001 arc: D2 Q2 arc: D3 V01S0100 arc: D4 H01W0000 arc: D5 N1_V02S0601 arc: D6 F2 arc: D7 V00B0000 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 Q7 arc: H01W0100 F3 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F6 arc: V00B0000 Q4 arc: V00T0000 Q0 arc: V01S0000 Q4 arc: V01S0100 Q2 word: SLICEB.K1.INIT 1100100000001000 word: SLICEA.K0.INIT 1000101010000000 word: SLICEC.K0.INIT 0000101100001000 word: SLICEC.K1.INIT 1010100010101010 word: SLICEA.K1.INIT 1111001000000000 word: SLICED.K1.INIT 0000000100110001 word: SLICEB.K0.INIT 0000010011000100 word: SLICED.K0.INIT 1100110011000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C42:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 W3_H06E0103 arc: H00R0000 H02W0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 V02S0601 arc: A0 E1_H01E0001 arc: A1 N1_V02S0701 arc: A4 V02S0301 arc: B0 V01N0001 arc: B1 V01N0001 arc: B4 H02E0101 arc: C0 V02S0601 arc: C1 V02S0601 arc: C4 S1_V02N0001 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V01S0100 arc: D4 W1_H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: LSR1 H02E0501 arc: M0 H02E0601 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000001010100010 word: SLICEA.K0.INIT 1100111110101111 word: SLICEA.K1.INIT 1101000010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C43:PLC2 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 E3_H06W0303 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 E1_H02W0601 arc: A0 F5 arc: A1 F7 arc: A3 E1_H02W0701 arc: A4 V00T0100 arc: A5 E1_H01W0000 arc: A6 S1_V02N0301 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 N1_V02S0301 arc: B3 Q3 arc: B4 V00B0100 arc: B5 V01S0000 arc: B6 H02E0301 arc: B7 V00B0100 arc: C0 H02W0601 arc: C1 N1_V01N0001 arc: C3 E1_H01W0000 arc: C4 H02E0601 arc: C5 H02E0601 arc: C6 N1_V02S0201 arc: C7 E1_H02W0401 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02W0201 arc: D3 E1_H02W0201 arc: D4 N1_V02S0401 arc: D5 N1_V02S0401 arc: D6 E1_H01W0100 arc: D7 E1_H02W0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q7 arc: E1_H02E0001 F0 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0501 arc: M1 H00R0100 arc: M3 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V02N0601 F6 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V00T0100 Q1 arc: V01S0000 Q3 word: SLICEB.K1.INIT 0001101100000000 word: SLICED.K1.INIT 0000000001010011 word: SLICEA.K1.INIT 0000000011001101 word: SLICED.K0.INIT 0010000000101010 word: SLICEC.K0.INIT 0000101000001100 word: SLICEC.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 1111111000001110 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C44:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02N0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 V02N0701 arc: A4 H02W0501 arc: A5 W1_H02E0501 arc: A6 F5 arc: A7 H00R0000 arc: B0 H02W0301 arc: B1 V02N0101 arc: B2 V02S0301 arc: B4 H02E0301 arc: B5 H02E0301 arc: B6 V00T0000 arc: B7 H02E0101 arc: C0 H00L0100 arc: C2 E1_H02W0401 arc: C4 E1_H01E0101 arc: C5 V02S0201 arc: C6 F4 arc: C7 S1_V02N0201 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 H01E0101 arc: D4 V00B0000 arc: D5 E1_H01W0100 arc: D6 F2 arc: D7 V02N0401 arc: E1_H01E0101 Q3 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F6 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M2 N1_V01N0001 arc: M3 H00R0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F7 arc: N3_V06N0003 F0 word: SLICEA.K0.INIT 1100111000000000 word: SLICEA.K1.INIT 0010001000000000 word: SLICED.K1.INIT 0101000000110000 word: SLICEB.K0.INIT 1111110111101100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000100110001 word: SLICEC.K0.INIT 0100010000001100 word: SLICED.K0.INIT 1100100011111011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C45:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02W0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06W0303 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A1 W1_H02E0501 arc: A2 H02E0501 arc: A3 H02W0501 arc: A4 F5 arc: A5 Q5 arc: A6 N1_V01N0101 arc: B0 H02W0301 arc: B1 F3 arc: B2 H00L0000 arc: B3 Q3 arc: B4 V02N0501 arc: B5 V01S0000 arc: B6 S1_V02N0501 arc: C0 H02E0601 arc: C1 H00L0100 arc: C2 N1_V02S0401 arc: C3 H02W0601 arc: C4 E1_H02W0601 arc: C5 V00B0100 arc: C6 H02E0401 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F0 arc: D2 V01S0100 arc: D3 V02N0001 arc: D4 F2 arc: D5 S1_V02N0601 arc: D6 W1_H02E0001 arc: E1_H01E0001 Q3 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q5 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M3 H00R0000 arc: M5 H00R0000 arc: M6 V00T0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F4 arc: N1_V02N0701 Q7 arc: V01S0000 Q0 arc: V01S0100 Q3 arc: W1_H02W0301 F1 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q6 word: SLICEB.K1.INIT 0000000000011011 word: SLICEA.K0.INIT 0001110100000000 word: SLICEA.K1.INIT 1010000010100010 word: SLICEB.K0.INIT 0100010101000000 word: SLICEC.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 1100110011001000 word: SLICED.K0.INIT 1011000010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C46:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 W1_H02E0301 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V01S0100 arc: V00T0000 V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 S3_V06N0203 arc: A5 Q5 arc: A7 Q7 arc: B0 H01W0100 arc: B5 N1_V02S0701 arc: B7 H02E0101 arc: C0 V02S0401 arc: C5 V00B0100 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D5 V02S0601 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M3 H00L0000 arc: M5 V01S0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F0 arc: S1_V02S0001 F0 arc: S1_V02S0201 Q0 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V00B0100 Q7 arc: V01S0000 F0 arc: V01S0100 F0 word: SLICEA.K0.INIT 1111110000001100 word: SLICED.K1.INIT 0000010011000100 word: SLICEC.K1.INIT 1011100000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C47:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: H00L0000 H02E0201 arc: H00L0100 V02N0301 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02S0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H02W0701 arc: A1 E1_H01E0001 arc: A2 F7 arc: A3 E1_H02W0701 arc: A4 V00T0100 arc: A5 N1_V02S0101 arc: A7 N1_V01S0100 arc: B0 N1_V02S0101 arc: B1 Q1 arc: B3 H01W0100 arc: B4 N1_V01S0000 arc: B5 V02N0501 arc: B6 F3 arc: B7 V02S0501 arc: C1 H00L0100 arc: C2 S1_V02N0401 arc: C4 V00B0100 arc: C5 W1_H02E0401 arc: C6 V02N0201 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02S0201 arc: D2 H02W0001 arc: D3 N1_V01S0000 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 F0 arc: D7 V00B0000 arc: E1_H01E0001 Q5 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q5 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0301 arc: M1 E1_H02W0001 arc: M5 E1_H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F6 arc: V00B0100 Q5 arc: V01S0000 Q2 arc: V01S0100 Q1 word: SLICEB.K0.INIT 0101111111111111 word: SLICED.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000011011 word: SLICEC.K1.INIT 0011010100000000 word: SLICEA.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 0001000110111011 word: SLICEB.K1.INIT 0010001001110111 word: SLICED.K0.INIT 1111110000001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R13C48:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V02S0601 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 V06S0103 arc: W3_H06W0303 E1_H02W0501 arc: A1 F7 arc: A2 W1_H02E0701 arc: A3 H02E0501 arc: A4 H02E0701 arc: A5 N1_V01N0101 arc: A6 V02N0301 arc: A7 E1_H02W0701 arc: B1 F3 arc: B2 E1_H02W0301 arc: B3 H00L0000 arc: B4 H02W0301 arc: B5 H02W0101 arc: B6 V02N0701 arc: B7 N1_V01S0000 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 F4 arc: C3 H02E0601 arc: C4 W1_H02E0401 arc: C5 H02W0601 arc: C6 Q6 arc: C7 V02N0201 arc: CE0 W1_H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D2 H02W0201 arc: D3 H02E0001 arc: D4 V02S0401 arc: D5 H01W0000 arc: D6 N1_V02S0601 arc: E1_H02E0701 F5 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q1 arc: LSR0 E1_H02W0501 arc: M0 V00B0000 arc: M1 H00R0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V01S0000 F6 arc: V01S0100 Q1 word: SLICED.K1.INIT 0000000100000001 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1111000011110000 word: SLICEA.K1.INIT 1111000001110000 word: SLICEC.K1.INIT 0100000001110000 word: SLICED.K0.INIT 1110001000000000 word: SLICEB.K0.INIT 1010000010101000 word: SLICEC.K0.INIT 0011011100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C49:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 V01N0001 arc: H00L0000 V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02W0501 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 E1_H02W0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0701 arc: A2 F5 arc: A3 F5 arc: A4 E1_H01W0000 arc: A5 V00T0100 arc: A6 E1_H01W0000 arc: B0 H02E0301 arc: B2 N1_V02S0301 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: B6 N1_V02S0701 arc: C0 H02E0601 arc: C2 H02W0401 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V02S0001 arc: C6 V00T0000 arc: CE0 H02E0101 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 E1_H01W0100 arc: D5 H01W0000 arc: D6 E1_H01W0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q7 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00R0000 F4 arc: H01W0000 Q0 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M2 V00B0100 arc: M4 E1_H01E0101 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 F0 arc: N1_V02N0401 F6 arc: V01S0100 Q4 arc: W1_H02W0001 F0 arc: W1_H02W0201 F2 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 1111100011110000 word: SLICEC.K0.INIT 0100000001110000 word: SLICED.K0.INIT 1011000010000000 word: SLICEC.K1.INIT 0000000101000101 word: SLICEB.K0.INIT 1111001111100010 word: SLICEB.K1.INIT 1111111111111010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R13C50:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02E0201 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02E0501 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A1 E1_H01E0001 arc: A3 N1_V02S0701 arc: A5 V02N0301 arc: B1 H02W0301 arc: B3 E1_H02W0101 arc: B5 V00B0100 arc: C1 E1_H01W0000 arc: C3 V02N0401 arc: C5 V00T0100 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D3 V02N0201 arc: D5 H00L0100 arc: E1_H01E0001 Q1 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: M1 H02W0001 arc: M3 H02E0201 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: S1_V02S0301 F3 arc: V00B0100 Q5 arc: V01S0000 Q1 arc: V01S0100 F1 word: SLICEA.K1.INIT 0000001100010001 word: SLICEB.K1.INIT 0100010101000000 word: SLICEC.K1.INIT 1000101010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C51:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 V02S0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 W1_H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A2 E1_H01E0001 arc: A3 V00T0000 arc: A7 Q7 arc: B0 H01W0100 arc: B2 H00R0100 arc: B7 V02S0501 arc: C0 E1_H02W0401 arc: C2 H02E0401 arc: C3 N1_V01S0100 arc: C7 H02W0401 arc: CE0 E1_H02W0101 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 Q2 arc: D3 F2 arc: D7 V02S0601 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 Q7 arc: H01W0000 Q0 arc: H01W0100 Q5 arc: LSR0 V00B0100 arc: LSR1 H02W0501 arc: M2 V00T0100 arc: M5 E1_H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F0 arc: N1_V02N0701 F7 arc: S1_V02S0101 F3 arc: S1_V02S0201 F0 arc: V01S0000 F0 arc: V01S0100 F0 arc: W1_H02W0001 F0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 0001000000010101 word: SLICEB.K1.INIT 1010101010100000 word: SLICED.K1.INIT 0010001100100000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C52:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 H02W0601 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H01E0001 arc: A2 F5 arc: A3 V02S0701 arc: A4 V00T0000 arc: A5 V00T0000 arc: A6 F7 arc: A7 S1_V02N0301 arc: B2 V02S0101 arc: B3 N1_V02S0101 arc: B4 V02S0701 arc: B5 V02S0701 arc: B6 F3 arc: B7 V00T0000 arc: C0 V02N0401 arc: C2 F4 arc: C3 S1_V02N0401 arc: C4 V02N0201 arc: C5 S1_V02N0201 arc: C6 H02E0601 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 V00B0100 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 H00R0100 arc: D6 F2 arc: D7 V02N0601 arc: E1_H01E0001 Q6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: N3_V06N0303 F6 arc: W3_H06W0303 Q6 word: SLICEC.K1.INIT 0000100000101010 word: SLICEC.K0.INIT 0000010000010101 word: SLICED.K1.INIT 0001000000010011 word: SLICEB.K1.INIT 0000010010001100 word: SLICEB.K0.INIT 1100110000000100 word: SLICED.K0.INIT 0001111100000000 word: SLICEA.K0.INIT 1111101000001010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R13C53:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A1 S1_V02N0501 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V00T0100 arc: A6 H00L0000 arc: A7 N1_V01S0100 arc: B0 H00R0100 arc: B1 V00B0000 arc: B2 E1_H02W0301 arc: B3 H01W0100 arc: B4 N1_V01S0000 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C0 H02E0601 arc: C1 N1_V01S0100 arc: C2 E1_H02W0601 arc: C3 H02E0401 arc: C4 E1_H02W0601 arc: C6 N1_V02S0201 arc: C7 E1_H02W0601 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D4 W1_H02E0001 arc: D6 E1_H01W0100 arc: D7 W1_H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: E1_H02E0101 F1 arc: E1_H02E0401 F4 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00R0100 Q5 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F0 arc: V00T0000 Q0 arc: V01S0000 F0 arc: V01S0100 F6 word: SLICED.K1.INIT 1100101000000000 word: SLICEC.K0.INIT 0000000011001010 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1010110010101100 word: SLICEA.K1.INIT 1000100010100000 word: SLICEB.K0.INIT 0001000000010011 word: SLICED.K0.INIT 1100000011000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C54:PLC2 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 V01N0001 arc: H00L0000 V02S0201 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A1 H00R0000 arc: A3 H02E0501 arc: A5 N1_V01S0100 arc: B1 H02W0301 arc: B3 N1_V02S0301 arc: B4 H00R0000 arc: B5 H02E0301 arc: C1 E1_H02W0401 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D3 N1_V02S0201 arc: D4 H02W0201 arc: D5 E1_H02W0001 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q2 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q4 arc: H01W0000 Q2 arc: H01W0100 F1 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0100 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H02E0201 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F4 arc: S1_V02S0501 F5 arc: V00T0100 Q1 arc: W3_H06W0003 Q3 word: SLICEB.K1.INIT 1111101011001100 word: SLICEC.K1.INIT 1000100011000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 0000010011000100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C55:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 H02W0501 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02N0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0501 arc: A2 H02E0701 arc: A5 V00T0100 arc: B5 H00R0000 arc: C0 N1_V02S0601 arc: C1 E1_H01W0000 arc: C2 H02W0601 arc: C5 H02E0401 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V00B0100 arc: D2 H02W0201 arc: D5 H02E0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q2 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 V00B0000 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: S1_V02S0201 Q0 arc: S3_V06S0103 Q2 arc: V01S0000 Q5 arc: V01S0100 F1 arc: W1_H02W0701 F5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K1.INIT 0000111100000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1010101011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R13C56:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H01E0001 arc: S3_V06S0303 H01E0101 arc: V00B0100 V02S0301 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: A3 H00L0100 arc: B0 V02S0301 arc: B3 H00L0000 arc: B5 H00L0000 arc: C0 N1_V01N0001 arc: C3 F4 arc: C4 V00T0000 arc: C5 F4 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D3 V02N0201 arc: D4 V00B0000 arc: D5 H00L0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0000 F3 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0501 arc: M2 H02W0601 arc: M3 H00R0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F5 arc: N3_V06N0003 Q0 arc: S1_V02S0201 Q0 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0100 F4 arc: W1_H02W0001 Q0 arc: W3_H06W0003 Q0 word: SLICEC.K1.INIT 0000001100110011 word: SLICEA.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 0000000000100000 word: SLICEC.K0.INIT 0000111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R13C57:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02S0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02W0601 arc: V00B0100 V02N0101 arc: V00T0100 V02S0501 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: A0 H00R0000 arc: A1 E1_H01E0001 arc: A2 V02S0501 arc: A3 V00T0000 arc: A4 N1_V01S0100 arc: A5 F7 arc: A7 N1_V02S0101 arc: B0 V00B0000 arc: B2 E1_H02W0101 arc: B3 V02S0301 arc: B4 E1_H02W0101 arc: B5 H02E0101 arc: B6 V00T0000 arc: B7 H02E0101 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 N1_V01S0100 arc: C4 V00T0100 arc: C5 N1_V02S0001 arc: C6 V02S0201 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 N1_V01S0000 arc: D3 E1_H02W0201 arc: D4 H00L0100 arc: D5 H02E0001 arc: D6 E1_H02W0201 arc: D7 F2 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q1 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H00R0100 F5 arc: H01W0000 Q1 arc: H01W0100 F2 arc: LSR0 E1_H02W0501 arc: LSR1 H02W0301 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q1 arc: N1_V02N0401 F4 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q1 arc: S3_V06S0003 F3 arc: S3_V06S0103 Q1 arc: S3_V06S0303 F6 arc: V00T0000 Q2 arc: V01S0000 F6 arc: V01S0100 Q0 arc: W1_H02W0001 F2 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q1 arc: W1_H02W0701 F7 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 0000001010100000 word: SLICEA.K0.INIT 1100101011001010 word: SLICEA.K1.INIT 1111101000001010 word: SLICED.K1.INIT 0010001010101010 word: SLICEC.K1.INIT 0000000010101000 word: SLICED.K0.INIT 0011111100110011 word: SLICEB.K1.INIT 0010001000000000 word: SLICEB.K0.INIT 1111111111110111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R13C58:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H06W0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A2 V02N0501 arc: A3 V02N0701 arc: A5 V02N0301 arc: B0 V00T0000 arc: B4 E1_H02W0301 arc: E1_H01E0101 F6 arc: F6 F6_SLICE word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000001110 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R13C59:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0203 V01N0001 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02E0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0001 H02W0001 arc: S3_V06S0003 H06E0003 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V02S0501 arc: A2 E1_H01E0001 arc: A4 V02N0101 arc: A6 V02N0101 arc: A7 V02N0101 arc: B2 V02N0101 arc: B4 F3 arc: B6 F3 arc: B7 F3 arc: C0 E1_H02W0401 arc: C2 V02N0401 arc: C3 V02N0601 arc: C4 E1_H02W0401 arc: C6 V02N0001 arc: C7 E1_H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 V02N0001 arc: D3 V00B0100 arc: D4 V02N0401 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q0 arc: E1_H02E0001 F0 arc: E1_H02E0301 Q1 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 F7 arc: H01W0100 F6 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H00R0000 arc: M3 H00L0100 arc: M4 E1_H01E0101 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0601 Q6 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: S1_V02S0601 Q6 arc: V00T0100 Q3 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 0000000000000010 word: SLICED.K0.INIT 0000000000001000 word: SLICEC.K0.INIT 0000010000000000 word: SLICED.K1.INIT 0000100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R13C60:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 V02S0001 arc: H00L0100 S1_V02N0101 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 H02W0501 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0701 arc: A1 F7 arc: A2 E1_H01E0001 arc: A3 N1_V02S0501 arc: A4 N1_V01N0101 arc: A5 V00T0000 arc: A6 F5 arc: A7 Q7 arc: B0 H02E0301 arc: B1 V02S0301 arc: B2 W1_H02E0301 arc: B3 V02S0101 arc: B4 H02W0301 arc: B5 N1_V02S0501 arc: B6 F3 arc: B7 H02W0301 arc: C0 V02N0601 arc: C1 F4 arc: C2 H02E0601 arc: C3 E1_H02W0601 arc: C5 E1_H02W0601 arc: C6 V02N0201 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H02W0201 arc: D2 Q2 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 H00R0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: E1_H02E0201 F0 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F0 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M2 V00B0100 arc: M4 E1_H01E0101 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: S1_V02S0301 F1 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 F1 word: SLICEB.K0.INIT 0000010011000100 word: SLICEC.K0.INIT 1011101110001000 word: SLICED.K1.INIT 1110001011100010 word: SLICEA.K1.INIT 0000000001000111 word: SLICEA.K0.INIT 1100111000001010 word: SLICEC.K1.INIT 1011000010000000 word: SLICEB.K1.INIT 0000110100001000 word: SLICED.K0.INIT 0000000100000001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C61:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 V01N0001 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A1 N1_V02S0701 arc: A2 F7 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A7 H00L0000 arc: B0 V02S0301 arc: B1 V02S0101 arc: B2 H00R0000 arc: B3 V02S0301 arc: B4 V00B0100 arc: B5 E1_H02W0301 arc: B6 F3 arc: B7 V01S0000 arc: C0 H00L0000 arc: C1 H02E0601 arc: C2 F4 arc: C3 H00L0100 arc: C4 H02W0601 arc: C5 W1_H02E0601 arc: C6 E1_H01E0101 arc: C7 V02S0201 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 F2 arc: D2 V02N0201 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 H02W0201 arc: E1_H01E0101 F0 arc: E1_H02E0001 Q0 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: H01W0100 F6 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M3 H02E0201 arc: M5 H02E0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q3 arc: N3_V06N0103 F1 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q7 word: SLICEC.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 1100100001000000 word: SLICEB.K1.INIT 0011000100100000 word: SLICED.K0.INIT 0000001100000000 word: SLICED.K1.INIT 1100101000000000 word: SLICEC.K0.INIT 0000101000001100 word: SLICEB.K0.INIT 1100100011001100 word: SLICEA.K1.INIT 1000110010001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C62:PLC2 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0103 E1_H01W0100 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02N0701 arc: A1 V02N0501 arc: A2 V02S0701 arc: A4 N1_V01N0101 arc: A5 E1_H01W0000 arc: B1 V02N0301 arc: B2 V02S0301 arc: B4 E1_H02W0101 arc: B5 H02W0301 arc: C1 H02W0601 arc: C2 H02W0401 arc: C4 E1_H02W0601 arc: C5 V00B0100 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 H02W0001 arc: D4 H00R0100 arc: D5 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 F2 arc: LSR0 V00B0000 arc: M0 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: N1_V02N0701 F5 arc: N3_V06N0003 F0 arc: S1_V02S0401 F4 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEC.K1.INIT 0000100001001100 word: SLICEC.K0.INIT 0000000010000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111111111111110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R13C63:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 V01N0101 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 V01N0001 arc: W3_H06W0303 N1_V01S0100 arc: A1 V02N0701 arc: A6 H02W0501 arc: B1 V02N0101 arc: C1 W1_H02E0401 arc: C6 H02W0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D6 V02N0601 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: H01W0100 F0 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F6 arc: N3_V06N0003 F0 arc: S1_V02S0601 Q6 word: SLICED.K0.INIT 0000000000001010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R13C64:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 N3_V06S0303 arc: H00R0000 V02N0601 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 V06S0003 arc: A0 E1_H02W0501 arc: A1 H02W0701 arc: A3 H01E0001 arc: A4 V02N0101 arc: A5 V00T0000 arc: A6 F5 arc: A7 N1_V01S0100 arc: B0 H02E0101 arc: B4 H00R0000 arc: B6 V00B0100 arc: C0 E1_H02W0401 arc: C1 E1_H01W0000 arc: C2 N1_V01S0100 arc: C3 W1_H02E0601 arc: C4 H02W0401 arc: C5 V01N0101 arc: C6 V02N0201 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 F2 arc: D2 N1_V01S0000 arc: D3 F0 arc: D4 H00R0100 arc: D5 V02N0601 arc: D6 E1_H01W0100 arc: D7 V02S0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F4 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0100 F7 arc: H01W0000 F6 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F2 arc: S1_V02S0001 Q0 arc: S3_V06S0003 Q0 arc: S3_V06S0303 F6 arc: V00T0000 F2 arc: V01S0000 F4 arc: W1_H02W0101 F1 arc: W1_H02W0501 F7 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEC.K1.INIT 0000000000001010 word: SLICEA.K1.INIT 0000101000000000 word: SLICED.K0.INIT 0000100000000000 word: SLICEB.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0101010100000000 word: SLICEB.K1.INIT 1111111110100000 word: SLICEC.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 1111111111010001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R13C65:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 H06E0203 arc: S1_V02S0001 N3_V06S0003 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H01W0100 arc: A1 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 V00T0100 arc: B1 V00B0000 arc: B4 V01S0000 arc: B6 V01S0000 arc: C1 N1_V01N0001 arc: C4 V00T0100 arc: C5 E1_H01E0101 arc: C6 E1_H01E0101 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q4 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0000 arc: M0 H01E0001 arc: M1 H00R0100 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0601 F4 arc: V00B0000 Q6 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000001010000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICED.K0.INIT 0000000000000100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R13C66:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H06E0203 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 F7 arc: A2 F5 arc: A3 V02N0701 arc: A5 V00T0000 arc: A6 V00T0100 arc: A7 W1_H02E0701 arc: B0 V02N0301 arc: B2 H02W0101 arc: B6 H02E0101 arc: B7 V00T0000 arc: C0 V02S0401 arc: C2 E1_H02W0601 arc: C5 N1_V02S0001 arc: C6 H02W0601 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D2 H02W0001 arc: D3 V02N0001 arc: D5 V02N0401 arc: D6 E1_H02W0201 arc: D7 S1_V02N0601 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q6 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q0 arc: N3_V06N0003 Q0 arc: V00T0000 Q0 arc: V00T0100 F3 arc: V01S0000 Q6 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEC.K1.INIT 0000000000001010 word: SLICEB.K0.INIT 0101010100000001 word: SLICEB.K1.INIT 0000000001010101 word: SLICED.K0.INIT 1111100010001000 word: SLICEA.K0.INIT 1011101011111111 word: SLICED.K1.INIT 0000010000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C67:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A1 F7 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A5 Q5 arc: A6 F5 arc: A7 V02S0101 arc: B0 V02S0101 arc: B1 F3 arc: B2 W1_H02E0301 arc: B3 H00R0100 arc: B5 V01S0000 arc: B6 V02S0701 arc: B7 N1_V01S0000 arc: C0 N1_V01S0100 arc: C1 N1_V02S0601 arc: C2 E1_H02W0401 arc: C3 V02S0401 arc: C4 H02E0601 arc: C5 V02S0001 arc: C6 H02E0401 arc: C7 W1_H02E0401 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 H02W0001 arc: D2 V01S0100 arc: D3 V00B0100 arc: D4 E1_H02W0001 arc: D5 V02S0601 arc: D6 F0 arc: D7 V02S0401 arc: E1_H01E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 Q5 arc: H01W0000 Q6 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M2 V00T0000 arc: M5 H00L0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F6 arc: N1_V02N0101 F1 arc: N3_V06N0003 Q0 arc: N3_V06N0303 Q6 arc: V01S0000 Q2 arc: V01S0100 Q5 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 1100100000001000 word: SLICEB.K1.INIT 1100101000000000 word: SLICED.K1.INIT 0000110000001010 word: SLICEA.K1.INIT 1110111100000000 word: SLICEC.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 0000000011100100 word: SLICED.K0.INIT 1111000010110000 word: SLICEC.K0.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C68:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 W3_H06E0003 arc: V00B0100 V02S0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V02S0601 arc: A0 F5 arc: A1 F7 arc: A3 E1_H02W0501 arc: A5 W1_H02E0701 arc: B0 H02E0101 arc: B1 V02N0101 arc: B3 V02N0101 arc: B4 F1 arc: B7 V02N0501 arc: C0 E1_H02W0401 arc: C1 N1_V01N0001 arc: C3 H00L0100 arc: C5 F6 arc: C6 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00T0100 arc: D3 N1_V02S0001 arc: D4 E1_H01W0100 arc: D5 F2 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: E1_H02E0701 F5 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F6 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F5 arc: S1_V02S0201 F0 arc: S1_V02S0401 Q4 arc: S1_V02S0701 F5 arc: V00T0100 Q1 arc: V01S0000 F2 arc: V01S0100 F7 arc: W1_H02W0201 F2 word: SLICED.K0.INIT 1111000000000000 word: SLICED.K1.INIT 0011001100000000 word: SLICEA.K0.INIT 1110101011000000 word: SLICEA.K1.INIT 1111100010001000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000011110111 word: SLICEC.K1.INIT 0000010101010101 word: SLICEC.K0.INIT 1111111111001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C69:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 W1_H02E0401 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: A1 H02W0501 arc: A2 H02E0701 arc: A3 H02E0701 arc: A5 V02S0101 arc: A6 N1_V01N0101 arc: A7 F5 arc: B1 H02W0101 arc: B3 H00R0000 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 V02N0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C3 H00R0100 arc: C4 E1_H01E0101 arc: C6 V02S0001 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 F2 arc: D5 E1_H02W0001 arc: D6 V02S0401 arc: D7 V02S0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 F6 arc: H00R0100 F7 arc: H01W0100 F0 arc: M0 V00T0000 arc: M1 V01S0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: S1_V02S0601 Q4 arc: V01S0000 Q3 arc: V01S0100 F0 arc: W1_H02W0301 Q3 word: SLICEC.K1.INIT 0010001000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0011000111110101 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111001000100010 word: SLICEB.K0.INIT 1111111110100000 word: SLICEB.K1.INIT 1111111100101111 word: SLICEC.K0.INIT 1111111111110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R13C70:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06E0303 arc: V00B0100 V02N0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02N0501 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02S0501 arc: A1 E1_H01E0001 arc: A2 H02W0701 arc: A3 V00B0000 arc: A4 V00B0000 arc: A5 V02S0101 arc: A6 F5 arc: A7 H02W0701 arc: B0 H02E0301 arc: B1 F3 arc: B2 W1_H02E0101 arc: B3 Q3 arc: B4 V02S0701 arc: B5 V01S0000 arc: B6 S1_V02N0501 arc: B7 W1_H02E0101 arc: C0 H02E0401 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 H02W0401 arc: C6 V02S0001 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 W1_H02E0001 arc: D2 V01S0100 arc: D3 H02E0201 arc: D4 H02E0001 arc: D5 F2 arc: D6 E1_H01W0100 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q0 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0000 F7 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000000110101 word: SLICEB.K1.INIT 0011010100000000 word: SLICEA.K1.INIT 1111000100000000 word: SLICEC.K0.INIT 1100000010001000 word: SLICED.K1.INIT 1010001010000000 word: SLICEB.K0.INIT 0101000101000000 word: SLICEC.K1.INIT 1111000011100000 word: SLICED.K0.INIT 1011000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C71:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 W3_H06E0003 arc: H00L0100 V02S0301 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 V06S0203 arc: A0 W1_H02E0701 arc: A1 H02W0701 arc: A2 V02N0701 arc: A3 F5 arc: A4 V00T0000 arc: A5 N1_V01N0101 arc: A6 N1_V01S0100 arc: A7 V00T0100 arc: B0 W1_H02E0101 arc: B1 V00T0000 arc: B2 W1_H02E0101 arc: B3 E1_H01W0100 arc: B4 H00L0000 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: B7 V01S0000 arc: C0 N1_V01S0100 arc: C1 F4 arc: C2 W1_H02E0401 arc: C3 V02S0401 arc: C4 H02E0601 arc: C5 V00T0100 arc: C6 H02E0401 arc: C7 H02E0401 arc: CE0 S1_V02N0201 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H02W0001 arc: D2 V00T0100 arc: D3 V02S0201 arc: D4 F2 arc: D5 V02N0401 arc: D6 W1_H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F1 arc: H01W0100 F3 arc: LSR0 V00B0100 arc: LSR1 H02W0301 arc: M1 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: V00T0100 Q1 arc: V01S0000 Q7 arc: V01S0100 Q7 word: SLICEB.K0.INIT 0100000001001100 word: SLICEA.K0.INIT 0000000100100011 word: SLICEC.K0.INIT 0000101000001011 word: SLICEA.K1.INIT 0011000001110000 word: SLICED.K1.INIT 1100000010100000 word: SLICED.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1000100011000000 word: SLICEB.K1.INIT 1100110011111010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C72:PLC2 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 S3_V06N0303 arc: H00L0100 W1_H02E0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06E0203 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A1 V02S0701 arc: A2 V02S0501 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A7 H02E0701 arc: B0 V00T0000 arc: B1 Q1 arc: B2 V02S0301 arc: B3 Q3 arc: B4 V02S0701 arc: B5 V02N0701 arc: B7 H02E0301 arc: C0 H02E0401 arc: C1 V02N0601 arc: C2 V02N0401 arc: C3 V02S0601 arc: C4 Q4 arc: C5 V00T0100 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 N1_V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02W0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 H02W0001 arc: D5 H01W0000 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F2 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M1 H00L0100 arc: M2 N1_V01N0001 arc: M3 H00L0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q7 arc: S1_V02S0101 F1 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 F4 arc: W1_H02W0001 F0 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 0001000011010000 word: SLICED.K1.INIT 0000001000010011 word: SLICEA.K1.INIT 0001101100000000 word: SLICEC.K0.INIT 0000000001000111 word: SLICEC.K1.INIT 0000110000111111 word: SLICEB.K0.INIT 1110010011111111 word: SLICEB.K1.INIT 1100101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C73:PLC2 arc: E1_H02E0501 E1_H01W0100 arc: H00R0000 S1_V02N0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 N1_V02S0001 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 N1_V02S0701 arc: A0 V02N0701 arc: A2 E1_H01E0001 arc: A3 F5 arc: A7 N1_V02S0101 arc: B0 V02N0301 arc: B2 V02N0101 arc: B5 V02N0501 arc: B7 H02W0301 arc: C0 H02E0401 arc: C2 V02N0601 arc: C3 H02W0601 arc: C5 V02N0201 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 N1_V02S0001 arc: D3 F0 arc: D5 V00B0000 arc: E1_H01E0001 F0 arc: E3_H06E0003 Q3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: LSR0 V00B0100 arc: M3 H00R0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 F5 arc: S1_V02S0301 Q3 arc: V00B0100 F7 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 word: SLICEB.K0.INIT 0010100000000000 word: SLICEC.K1.INIT 0011000000000000 word: SLICEB.K1.INIT 1010000000000000 word: SLICEA.K0.INIT 0000000000000100 word: SLICED.K1.INIT 1011111110111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C74:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0003 N1_V01S0000 arc: V00T0000 H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 H00R0000 arc: A2 V02N0701 arc: A4 H02W0701 arc: A5 E1_H01W0000 arc: A6 N1_V02S0301 arc: A7 V02S0301 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 E1_H02W0101 arc: B3 V02S0301 arc: B4 S1_V02N0701 arc: B6 V00T0000 arc: C0 E1_H01W0000 arc: C2 H00L0000 arc: C3 S1_V02N0601 arc: C4 H01E0001 arc: C5 S1_V02N0201 arc: C6 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V02N0201 arc: D3 S1_V02N0001 arc: D4 H00R0100 arc: D5 E1_H01W0100 arc: D6 H00L0100 arc: D7 V02S0601 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q2 arc: E1_H02E0201 F0 arc: E1_H02E0601 F6 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: S1_V02S0601 F4 arc: V00B0100 F7 arc: V01S0100 F3 arc: W3_H06W0303 F5 word: SLICEC.K0.INIT 1101111111111111 word: SLICEA.K0.INIT 0011101100001010 word: SLICEA.K1.INIT 0011001100000000 word: SLICEB.K1.INIT 1100000000000000 word: SLICED.K1.INIT 0101010100000000 word: SLICED.K0.INIT 0100010000000100 word: SLICEB.K0.INIT 0101010100010000 word: SLICEC.K1.INIT 0101010100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C75:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 N1_V02S0701 arc: B0 H02E0101 arc: C0 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: F0 F0_SLICE arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: W1_H02W0201 Q0 arc: W1_H02W0601 Q4 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111110011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C76:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V06N0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 E1_H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: A0 F7 arc: A2 V00B0000 arc: B0 H02W0301 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B7 V00B0000 arc: C0 H00L0000 arc: C2 W1_H02E0401 arc: C3 E1_H02W0601 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D7 V01N0001 arc: E1_H01E0001 Q0 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: V01S0000 F2 arc: W3_H06W0003 Q0 word: SLICEB.K1.INIT 0000110000000000 word: SLICED.K1.INIT 0000000011000000 word: SLICEA.K0.INIT 0011001000100010 word: SLICEB.K0.INIT 1100010010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R13C77:PLC2 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0301 V02S0301 arc: A0 H01E0001 arc: A3 V02S0701 arc: A4 F5 arc: A5 W1_H02E0701 arc: A6 N1_V02S0101 arc: A7 H00L0000 arc: B3 V02N0101 arc: B4 W1_H02E0301 arc: B5 H00R0000 arc: B7 V02N0701 arc: C0 S1_V02N0401 arc: C3 H02E0601 arc: C4 S1_V02N0201 arc: C5 W1_H02E0401 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CE2 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D3 S1_V02N0001 arc: D4 H00R0100 arc: D5 H02W0001 arc: D6 V02N0401 arc: D7 H02W0201 arc: E1_H02E0201 F2 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N3_V06N0203 F7 arc: V01S0100 F6 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111100010001000 word: SLICEC.K1.INIT 1011000010000000 word: SLICEC.K0.INIT 1100110011111010 word: SLICED.K1.INIT 1100000010001000 word: SLICEA.K0.INIT 1111010110100000 word: SLICED.K0.INIT 1111111101010101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R13C78:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N3_V06N0003 H06E0003 arc: N3_V06N0303 H06E0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 E1_H02W0601 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02S0701 arc: A3 W1_H02E0501 arc: A4 H02W0501 arc: A7 H02W0501 arc: B0 H01W0100 arc: B1 E1_H02W0301 arc: B2 H02W0301 arc: B3 V02N0101 arc: B4 S1_V02N0701 arc: C0 H02W0401 arc: C1 E1_H02W0401 arc: C2 H00L0000 arc: C3 V02N0401 arc: C4 V02N0001 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00B0100 arc: D2 E1_H02W0201 arc: D3 S1_V02N0201 arc: D5 S1_V02N0601 arc: D7 E1_H02W0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q0 arc: E1_H02E0301 Q1 arc: E1_H02E0501 Q5 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S3_V06S0203 F4 arc: V00B0100 Q5 arc: W1_H02W0001 Q2 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K1.INIT 1010000011000000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1100101011001010 word: SLICEA.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C79:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: H00R0100 V02S0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H06E0003 arc: V00B0000 H02E0401 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: A3 H02E0501 arc: A4 V02S0301 arc: A5 V00B0000 arc: A6 N1_V02S0101 arc: A7 H02W0501 arc: B0 V01N0001 arc: B1 H02E0101 arc: B2 V02N0301 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 V01N0101 arc: C6 S1_V02N0001 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02N0201 arc: D2 N1_V01S0000 arc: D3 V02N0001 arc: D4 V02N0601 arc: D5 V02S0601 arc: D6 V00B0000 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: S1_V02S0101 Q3 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q1 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: V01S0000 Q6 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 1010111110100000 word: SLICED.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1111000010101010 word: SLICEC.K0.INIT 1010111110100000 word: SLICEC.K1.INIT 1111101001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C7:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R13C80:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 E3_H06W0003 arc: S3_V06S0203 H06E0203 arc: V00B0000 N1_V02S0001 arc: V00T0000 H02W0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 N1_V02S0601 arc: A2 V00B0000 arc: A3 N1_V02S0701 arc: A4 H02E0501 arc: A5 W1_H02E0701 arc: A6 H00R0000 arc: A7 V02S0301 arc: B0 V02N0101 arc: B2 V02N0301 arc: B3 H02E0101 arc: B4 H02E0301 arc: B5 V02N0501 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F6 arc: E3_H06E0003 Q3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F2 arc: LSR0 V00T0000 arc: M3 H02E0201 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0501 F7 arc: V01S0000 F3 word: SLICED.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001100 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C81:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0201 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 V01N0101 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 S1_V02N0001 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W3_H06W0103 E3_H06W0003 arc: A3 N1_V02S0501 arc: A6 V02S0101 arc: B0 H02E0301 arc: B1 V00T0000 arc: B2 N1_V02S0301 arc: B4 H02E0101 arc: B5 E1_H02W0101 arc: B7 E1_H02W0301 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: E1_H02E0101 F1 arc: E1_H02E0301 F3 arc: E3_H06E0203 Q4 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0000 arc: M4 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0001 F2 arc: V01S0000 F7 word: SLICED.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEA.K0.INIT 1100110011000000 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C82:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0103 H01E0101 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 N1_V02S0201 arc: V00T0000 V02S0601 arc: A0 H02E0701 arc: A4 H02W0501 arc: B1 V01N0001 arc: B2 V02N0301 arc: B3 V02S0301 arc: B5 N1_V01S0000 arc: B6 V00T0000 arc: B7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0601 F4 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: S1_V02S0701 F5 arc: V01S0000 F1 arc: V01S0100 F7 word: SLICED.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEA.K0.INIT 1010101010100000 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R13C83:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0301 H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E1_H01W0000 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 N1_V01S0100 arc: B0 H02E0101 arc: E1_H01E0001 F0 arc: F0 F0_SLICE word: SLICEB.K1.INIT 0000000000001110 word: SLICEB.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100110011000000 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R13C84:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 N1_V01S0100 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: V00B0100 V02N0301 arc: W1_H02W0201 V02S0201 arc: W1_H02W0601 N1_V01S0000 arc: A2 W1_H02E0501 arc: B0 H02E0301 arc: B1 V02S0301 arc: B2 H00R0000 arc: B3 W1_H02E0301 arc: B4 W1_H02E0301 arc: B7 E1_H02W0301 arc: C3 S1_V02N0401 arc: C4 H02E0601 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 E1_H02W0201 arc: D3 W1_H02E0201 arc: D4 S1_V02N0601 arc: D7 H02E0201 arc: E1_H01E0001 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q1 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0201 Q0 arc: N3_V06N0103 F2 arc: N3_V06N0203 F7 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: V00T0100 Q3 arc: V01S0000 Q0 word: SLICEB.K0.INIT 0101010100110011 word: SLICED.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 1111110000110000 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100110000000000 word: SLICEB.K1.INIT 1111001111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R13C85:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02N0701 arc: H00R0100 V02N0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H01E0001 arc: V00B0100 V02N0101 arc: V00T0100 H02E0101 arc: W1_H02W0101 E1_H02W0101 arc: W3_H06W0103 E1_H01W0100 arc: A0 H02E0701 arc: A3 H00L0100 arc: A4 W1_H02E0701 arc: A5 V00B0000 arc: A7 H00L0000 arc: B1 H02E0101 arc: B2 H02E0101 arc: B4 H02E0101 arc: B6 V00T0000 arc: C0 V02N0401 arc: C1 S1_V02N0601 arc: C2 S1_V02N0401 arc: C3 E1_H02W0401 arc: C5 S1_V02N0201 arc: C6 V02N0001 arc: C7 S1_V02N0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 W1_H02E0001 arc: D2 H02E0201 arc: D3 H02W0201 arc: D4 H00R0100 arc: D5 H02W0201 arc: D6 H02W0201 arc: D7 H02W0201 arc: E1_H01E0101 F3 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N3_V06N0203 F7 arc: N3_V06N0303 F6 arc: V00B0000 Q4 arc: V00T0000 Q2 word: SLICED.K1.INIT 0000111101010101 word: SLICEC.K1.INIT 0000111101010101 word: SLICEB.K1.INIT 0000111101010101 word: SLICED.K0.INIT 0000111100110011 word: SLICEB.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1111001111000000 word: SLICEC.K0.INIT 1110111000100010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 .tile R13C86:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00R0100 V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0401 N1_V01S0000 arc: S3_V06S0303 H06E0303 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 W3_H06E0003 arc: A0 E1_H01E0001 arc: B0 W1_H02E0101 arc: C0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: E1_H01E0001 Q0 arc: F0 F0_SLICE arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: N1_V02N0001 Q0 arc: N3_V06N0003 Q0 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000110000001110 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R13C87:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: H00R0100 H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 W1_H02E0301 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 W3_H06E0203 arc: A0 F5 arc: A1 V02N0701 arc: A2 V02N0701 arc: A4 V00B0000 arc: A6 V02S0101 arc: B0 H00R0100 arc: B1 H02E0101 arc: B3 H02E0101 arc: B4 V02N0501 arc: B6 V02N0501 arc: C0 V02N0401 arc: C1 H00L0000 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 H01E0001 arc: C6 H01E0001 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 W1_H02E0001 arc: D2 V02S0001 arc: D3 W1_H02E0001 arc: D4 H02E0201 arc: D5 H02E0001 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 F2 arc: H01W0000 F4 arc: H01W0100 F6 arc: LSR0 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0001 F0 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: V01S0000 F1 arc: V01S0100 F3 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111111110000000 word: SLICED.K0.INIT 1010101110101011 word: SLICEB.K1.INIT 0011000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K1.INIT 0000011100000101 word: SLICEB.K0.INIT 1010101000000000 word: SLICEC.K0.INIT 0000000001000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R13C88:PLC2 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0303 H06E0303 .tile R13C9:PLC2 arc: W3_H06W0203 E1_H01W0000 .tile R14C10:PLC2 arc: H01W0100 E3_H06W0303 .tile R14C13:PLC2 arc: E3_H06E0003 W3_H06E0003 .tile R14C16:PLC2 arc: D5 V02N0601 arc: F5 F5_SLICE arc: W3_H06W0303 F5 word: SLICEC.K1.INIT 0000000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 .tile R14C19:PLC2 arc: E3_H06E0103 W3_H06E0003 .tile R14C25:PLC2 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0103 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: E3_H06E0203 F7 arc: F7 F7_SLICE arc: N3_V06N0203 F7 arc: S3_V06S0203 F7 word: SLICED.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R14C27:PLC2 arc: E1_H02E0301 W1_H02E0201 .tile R14C28:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: N1_V02N0201 H06E0103 arc: S3_V06S0203 H06E0203 .tile R14C29:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 .tile R14C30:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V01S0100 N3_V06S0303 arc: A0 H00L0000 arc: A2 H02E0501 arc: A3 V02S0501 arc: A4 V02S0301 arc: A5 Q5 arc: A6 F5 arc: B0 H02W0301 arc: B2 V02N0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02S0501 arc: C0 H00L0100 arc: C2 F4 arc: C3 H00L0000 arc: C4 H02W0601 arc: C5 V02S0201 arc: C6 H02W0401 arc: CE0 V02N0201 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 F0 arc: D3 V02S0001 arc: D4 H02W0001 arc: D5 V00B0000 arc: D6 H01W0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F6 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H01W0000 F3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00B0000 Q6 arc: V00T0100 Q3 arc: V01S0000 Q5 word: SLICEC.K1.INIT 0000000100110001 word: SLICEB.K1.INIT 0000101000100010 word: SLICED.K0.INIT 1111000010100000 word: SLICEC.K0.INIT 0101000001000100 word: SLICEA.K0.INIT 1011000010000000 word: SLICEB.K0.INIT 0011001100110001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C31:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 W3_H06E0203 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E3_H06W0203 arc: A0 E1_H02W0701 arc: A2 V02N0501 arc: A3 H02E0501 arc: A4 F7 arc: A5 V02N0301 arc: A6 F5 arc: A7 Q7 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 H01W0100 arc: B3 V02N0101 arc: B4 V02S0701 arc: B5 V00B0100 arc: B6 F3 arc: B7 V00B0100 arc: C0 E1_H02W0601 arc: C1 E1_H01W0000 arc: C2 V02S0401 arc: C3 H02W0601 arc: C5 H02W0601 arc: C6 V02N0001 arc: C7 V00T0000 arc: CE0 N1_V02S0201 arc: CE1 E1_H02W0101 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 V02S0001 arc: D3 H02W0001 arc: D4 F2 arc: D5 H01W0000 arc: D6 W1_H02E0001 arc: D7 V02S0601 arc: E1_H01E0001 F6 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00T0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00B0000 F4 arc: V00B0100 Q5 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0101000000110000 word: SLICED.K1.INIT 0000010100000011 word: SLICEC.K0.INIT 1100110010001000 word: SLICEA.K0.INIT 1100000011001000 word: SLICEA.K1.INIT 0000000011000000 word: SLICEB.K1.INIT 1100101000000000 word: SLICEC.K1.INIT 0101010000000100 word: SLICED.K0.INIT 1110000011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C32:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V01N0101 arc: H00L0000 H02E0001 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 H02E0701 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: A0 V02S0701 arc: A1 V02S0501 arc: A3 H00L0100 arc: A4 V02N0301 arc: A5 V02N0301 arc: A6 F7 arc: A7 F5 arc: B0 V00B0000 arc: B1 F3 arc: B3 V02S0301 arc: B4 H02E0301 arc: B5 H02E0301 arc: B6 H02W0301 arc: B7 N1_V02S0501 arc: C0 N1_V01N0001 arc: C1 E1_H02W0401 arc: C3 V02S0401 arc: C4 V00T0000 arc: C5 V00T0100 arc: C6 H01E0001 arc: C7 F4 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 F0 arc: D3 V01S0100 arc: D4 V00B0000 arc: D5 H00L0100 arc: D6 E1_H01W0100 arc: D7 W1_H02E0201 arc: E1_H01E0101 F1 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F1 arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: V00B0000 Q4 arc: V00T0000 Q0 arc: V01S0100 Q6 word: SLICEB.K1.INIT 0000000100001101 word: SLICEA.K0.INIT 0000101000100010 word: SLICEA.K1.INIT 0101000001010001 word: SLICEC.K1.INIT 0101000101000000 word: SLICEC.K0.INIT 1010001010000000 word: SLICED.K1.INIT 1111111000000000 word: SLICED.K0.INIT 1000100011001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C33:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 W1_H02E0201 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 H01E0101 arc: A0 E1_H01E0001 arc: A2 H01E0001 arc: A3 E1_H01E0001 arc: A4 F5 arc: A5 Q5 arc: A7 N1_V01N0101 arc: B0 V02S0301 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 V02S0501 arc: B5 H02E0301 arc: B7 S1_V02N0501 arc: C0 N1_V01N0001 arc: C2 H00R0100 arc: C3 N1_V01N0001 arc: C4 H02W0401 arc: C5 V02S0001 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 F0 arc: D5 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0100 F7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M3 H00R0000 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F2 arc: W1_H02W0601 F4 word: SLICEC.K1.INIT 0000000000110101 word: SLICEA.K0.INIT 0100011100000000 word: SLICEC.K0.INIT 1100000011000100 word: SLICEB.K1.INIT 1011100000000000 word: SLICEB.K0.INIT 0000000010111000 word: SLICED.K1.INIT 0000000100000001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C34:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06E0203 arc: N3_V06N0203 H06E0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 H02W0701 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 H02E0501 arc: A1 E1_H02W0701 arc: A3 H00L0100 arc: A4 V02S0101 arc: A7 H02W0501 arc: B0 H02W0301 arc: B1 V00B0000 arc: B2 F3 arc: B3 H00R0000 arc: B4 H00L0000 arc: B7 E1_H02W0301 arc: C0 H02W0601 arc: C1 E1_H02W0601 arc: C2 S1_V02N0401 arc: C3 H02W0401 arc: C4 V01N0101 arc: C7 W1_H02E0401 arc: CE1 V02N0201 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D7 F2 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 Q3 arc: H00R0000 Q6 arc: LSR0 H02E0301 arc: M3 H00R0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0301 Q3 arc: V00B0000 F4 arc: V01S0000 Q6 arc: V01S0100 Q3 word: SLICEB.K1.INIT 1010000011000000 word: SLICEB.K0.INIT 0000000000110000 word: SLICED.K1.INIT 1100111110001011 word: SLICEA.K0.INIT 1101100000000000 word: SLICEC.K0.INIT 1111000011100000 word: SLICEA.K1.INIT 1000101010001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C35:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V06S0303 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0501 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 V06S0003 arc: A0 H02E0701 arc: A1 E1_H02W0701 arc: A2 H02W0501 arc: A3 W1_H02E0701 arc: A4 V00T0000 arc: A5 F7 arc: A6 V02N0101 arc: A7 H02E0701 arc: B0 V00B0000 arc: B1 E1_H01W0100 arc: B2 F3 arc: B3 Q3 arc: B4 V02S0501 arc: B5 V02S0701 arc: B6 V00T0000 arc: B7 V01S0000 arc: C0 S1_V02N0401 arc: C1 N1_V02S0401 arc: C2 F4 arc: C3 V02S0601 arc: C4 Q4 arc: C6 E1_H02W0601 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 N1_V02S0201 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0201 arc: D2 E1_H02W0201 arc: D3 V01S0100 arc: D4 H02W0201 arc: D5 F0 arc: D6 V00B0000 arc: D7 V02S0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F6 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0100 arc: M3 H00R0000 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F1 arc: V00B0000 Q4 arc: V00T0000 Q0 arc: V01S0000 Q3 arc: V01S0100 Q6 arc: W1_H02W0301 Q3 arc: W1_H02W0501 F5 arc: W1_H02W0601 Q6 word: SLICEB.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 0000000000011101 word: SLICEB.K0.INIT 1010101000000010 word: SLICED.K1.INIT 1000101010000000 word: SLICEA.K0.INIT 0100010101000000 word: SLICEC.K1.INIT 0000000000010001 word: SLICEA.K1.INIT 1100101000000000 word: SLICED.K0.INIT 0101010000000100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C36:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06N0103 arc: E3_H06E0303 N3_V06S0303 arc: H00L0100 W1_H02E0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 V01N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E1_H02W0501 arc: A0 F7 arc: A1 V02S0701 arc: A2 W1_H02E0501 arc: A4 V02S0101 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 H02W0101 arc: B2 V02S0301 arc: B4 V02S0501 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 V02S0501 arc: C0 F4 arc: C1 F4 arc: C2 V02N0401 arc: C4 Q4 arc: C5 S1_V02N0201 arc: C6 H02W0601 arc: C7 V00T0100 arc: CE0 E1_H02W0101 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H02W0201 arc: D2 F0 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 E1_H02W0001 arc: D7 V02S0401 arc: E1_H01E0101 Q3 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q1 arc: N1_V02N0301 Q3 arc: N1_V02N0701 F5 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0000 Q1 word: SLICEC.K1.INIT 0011000000111111 word: SLICED.K1.INIT 0100011100000000 word: SLICEC.K0.INIT 0000000101000101 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K0.INIT 0010000000101010 word: SLICED.K0.INIT 0000000010101100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C37:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 E1_H02W0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02W0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A0 F7 arc: A1 H00L0000 arc: A2 H02W0701 arc: A4 N1_V01N0101 arc: A5 V02S0101 arc: A6 H02W0701 arc: A7 V00T0100 arc: B1 Q1 arc: B2 W1_H02E0101 arc: B4 V00B0100 arc: B5 V02S0501 arc: B6 V00B0100 arc: B7 V00T0000 arc: C0 W1_H02E0601 arc: C1 V02S0601 arc: C2 N1_V01N0001 arc: C4 V02N0001 arc: C5 V00B0100 arc: C6 S1_V02N0201 arc: C7 V02N0001 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D4 H02W0001 arc: D5 H01W0000 arc: D6 H01W0000 arc: D7 H02W0001 arc: E1_H01E0001 F6 arc: E1_H02E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q6 arc: LSR1 H02W0301 arc: M1 H00L0100 arc: M2 H02W0601 arc: M5 H00L0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q6 arc: S1_V02S0001 F0 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 F4 word: SLICEA.K1.INIT 0000000000110101 word: SLICEC.K1.INIT 0000100000101010 word: SLICEB.K0.INIT 0101000101000000 word: SLICED.K0.INIT 1000101010000000 word: SLICEC.K0.INIT 1100101000000000 word: SLICED.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 0000000001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C38:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 H01E0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02W0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: V00B0100 H02E0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A6 H02W0701 arc: B0 V00B0000 arc: C6 H01E0001 arc: CE0 S1_V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D6 H02E0001 arc: F0 F0_SLICE arc: F6 F6_SLICE arc: H01W0000 F0 arc: LSR0 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 arc: V01S0100 F6 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1010101011001100 word: SLICED.K0.INIT 0000000000000101 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C39:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V01N0101 arc: A2 H02W0701 arc: A3 V02S0701 arc: A4 H02W0701 arc: A5 N1_V02S0301 arc: A7 F5 arc: B0 F3 arc: B1 F3 arc: B2 H01W0100 arc: B3 Q3 arc: B4 V02S0701 arc: B5 H02W0101 arc: B7 E1_H02W0301 arc: C0 F4 arc: C1 F4 arc: C2 H02E0401 arc: C3 E1_H01W0000 arc: C4 Q4 arc: C5 W1_H02E0601 arc: C7 E1_H02W0601 arc: CE1 E1_H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 H00R0000 arc: D3 V02S0001 arc: D4 H00L0100 arc: D5 H01W0000 arc: D7 F2 arc: E1_H01E0101 Q3 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: V01S0000 F7 arc: V01S0100 F0 word: SLICEB.K1.INIT 0001101100000000 word: SLICEC.K0.INIT 0000000001000111 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0000101000001100 word: SLICEC.K1.INIT 1000101010000000 word: SLICED.K1.INIT 1100110011001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C3:PLC2 arc: S3_V06S0203 N3_V06S0203 arc: W1_H02W0501 E3_H06W0303 .tile R14C40:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0501 arc: A1 E1_H02W0501 arc: A2 H02W0501 arc: A3 S1_V02N0701 arc: A4 H02W0701 arc: A5 Q5 arc: A7 N1_V01N0101 arc: B0 H00R0100 arc: B1 N1_V02S0101 arc: B2 H02E0301 arc: B3 V02S0301 arc: B4 F3 arc: B5 H02E0301 arc: B7 W1_H02E0301 arc: C0 S1_V02N0401 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 V02N0001 arc: C5 H02E0401 arc: C7 H02W0401 arc: CE0 V02N0201 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 F0 arc: D5 H00R0100 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q3 arc: H01W0100 F1 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0000 arc: M3 H00R0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q5 arc: S1_V02S0001 F2 arc: S1_V02S0301 Q1 arc: S1_V02S0501 F5 arc: V01S0100 F1 arc: W1_H02W0101 Q3 arc: W1_H02W0301 F1 word: SLICEA.K1.INIT 1010101011001100 word: SLICEB.K0.INIT 0100010000001100 word: SLICEC.K1.INIT 0000000100110001 word: SLICEB.K1.INIT 0000010100010001 word: SLICEA.K0.INIT 0101000000110000 word: SLICEC.K0.INIT 1010111110001101 word: SLICED.K1.INIT 0011001000000010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C41:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 H01E0001 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02W0601 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 H02W0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A2 E1_H01E0001 arc: A3 H02E0501 arc: A4 N1_V02S0301 arc: A5 Q5 arc: A6 F5 arc: A7 V00T0100 arc: B0 S1_V02N0301 arc: B2 N1_V02S0101 arc: B3 Q3 arc: B4 H02E0301 arc: B5 V02N0501 arc: B6 H01E0101 arc: B7 V02N0701 arc: C0 W1_H02E0601 arc: C2 N1_V01N0001 arc: C3 H00L0000 arc: C4 S1_V02N0201 arc: C5 E1_H02W0401 arc: C6 V02N0001 arc: C7 S1_V02N0201 arc: CE0 H00L0100 arc: CE1 W1_H02E0101 arc: CE2 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 F0 arc: D3 N1_V02S0201 arc: D4 V02N0401 arc: D5 H01W0000 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00R0000 arc: M3 H00R0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F2 arc: V00B0100 F7 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 F6 arc: W1_H02W0501 Q5 word: SLICED.K1.INIT 0011000001010000 word: SLICEA.K0.INIT 1110111011111010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 0000001100000101 word: SLICEC.K0.INIT 0001000010110000 word: SLICEB.K0.INIT 1100100011111011 word: SLICEC.K1.INIT 1000110010000000 word: SLICED.K0.INIT 1110111100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C42:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0203 N3_V06S0203 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 V02S0501 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A2 V02S0701 arc: A3 F7 arc: A5 H02W0701 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B0 V00B0000 arc: B2 V02S0101 arc: B3 H02W0301 arc: B4 V01S0000 arc: B5 H02E0101 arc: B6 V00T0000 arc: B7 V02S0701 arc: C0 E1_H02W0401 arc: C2 N1_V01S0100 arc: C4 H02W0401 arc: C5 F6 arc: C6 E1_H02W0401 arc: C7 V02S0201 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 Q2 arc: D3 F2 arc: D4 H02W0201 arc: D5 F0 arc: D6 V02S0401 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 E1_H02W0501 arc: LSR1 H02W0501 arc: M0 E1_H02W0601 arc: M2 V00T0100 arc: M4 V00T0100 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F5 arc: V00B0000 Q4 arc: V01S0000 Q4 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 0000010010001100 word: SLICED.K1.INIT 0000010000000111 word: SLICEB.K1.INIT 1100110010001000 word: SLICEA.K0.INIT 1111101011111100 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000100001101 word: SLICEC.K1.INIT 1100100011111011 word: SLICEC.K0.INIT 0000001111110011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C43:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 N1_V02S0301 arc: H00R0000 W1_H02E0601 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 V02S0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0501 arc: C0 H00R0100 arc: CE0 H00L0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: F0 F0_SLICE arc: H00R0100 Q7 arc: H01W0000 F0 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0201 F0 arc: V01S0000 Q0 arc: V01S0100 F0 word: SLICEA.K0.INIT 1010101011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C44:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0001 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 H06W0203 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H01E0101 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 H01E0101 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00R0000 arc: A1 V02N0501 arc: A2 V00T0000 arc: A3 E1_H01E0001 arc: A4 V00T0000 arc: A5 F7 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 S1_V02N0301 arc: B1 F3 arc: B2 H00R0000 arc: B3 Q3 arc: B4 H02W0301 arc: B6 V01S0000 arc: B7 V01S0000 arc: C0 H02E0401 arc: C1 V02S0601 arc: C2 H02W0401 arc: C3 H02E0401 arc: C4 Q4 arc: C5 F4 arc: C6 H02W0401 arc: C7 V02S0001 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F0 arc: D2 S1_V02N0201 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 H02E0001 arc: D6 V00B0000 arc: D7 V02S0401 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0100 F2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: V00T0000 Q0 arc: V01S0000 Q3 arc: V01S0100 F5 arc: W1_H02W0601 F6 word: SLICED.K1.INIT 0000001100000101 word: SLICEC.K0.INIT 0000110001000100 word: SLICEC.K1.INIT 1111101000000000 word: SLICED.K0.INIT 0011000001010000 word: SLICEB.K0.INIT 0011000001010000 word: SLICEB.K1.INIT 0000000011001010 word: SLICEA.K0.INIT 1000110010000000 word: SLICEA.K1.INIT 1010101010001010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C45:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 N1_V02S0001 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 V02N0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0501 arc: A3 E1_H01E0001 arc: A4 V02N0101 arc: A5 N1_V02S0101 arc: A6 H00L0000 arc: A7 V00T0100 arc: B0 V02N0301 arc: B3 V02S0301 arc: B4 E1_H02W0301 arc: B5 V01S0000 arc: B6 H02E0301 arc: B7 E1_H02W0301 arc: C0 E1_H02W0401 arc: C3 V02S0401 arc: C4 Q4 arc: C5 F4 arc: C6 W1_H02E0401 arc: C7 N1_V02S0001 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D3 N1_V02S0001 arc: D4 E1_H02W0201 arc: D5 H00R0100 arc: D6 H02W0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 Q1 arc: H01W0100 F0 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M3 H00L0100 arc: M4 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: S1_V02S0101 F3 arc: V00B0100 F5 arc: V00T0100 Q3 arc: V01S0100 Q7 word: SLICEC.K0.INIT 1000100011000000 word: SLICED.K1.INIT 0011000000100010 word: SLICEC.K1.INIT 0011001100110001 word: SLICEA.K0.INIT 0000000111111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000100110001 word: SLICED.K0.INIT 0010001100100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C46:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A2 V00T0000 arc: A4 F5 arc: A5 Q5 arc: A6 H02W0701 arc: A7 H02W0701 arc: B2 H02E0301 arc: B4 V02S0701 arc: B5 H02E0301 arc: B6 V00B0100 arc: B7 V00T0000 arc: C2 H02E0401 arc: C4 V02N0001 arc: C5 H02E0401 arc: C6 Q6 arc: C7 V02S0201 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0201 arc: D4 W1_H02E0201 arc: D5 H01W0000 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: E1_H02E0401 F6 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q0 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M0 W1_H02E0601 arc: M2 V00B0000 arc: M5 H00L0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: S1_V02S0001 F2 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V01S0100 F7 word: SLICEB.K0.INIT 0000000100110001 word: SLICEC.K1.INIT 0000000100110001 word: SLICEC.K0.INIT 0000000011110001 word: SLICED.K1.INIT 0000000011100100 word: SLICED.K0.INIT 0000000011100100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C47:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0203 N3_V06S0203 arc: A0 E1_H02W0701 arc: A1 E1_H02W0701 arc: A2 H00L0100 arc: A3 H01E0001 arc: A4 N1_V01N0101 arc: A5 H02E0501 arc: A6 E1_H02W0701 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 H02W0301 arc: B3 N1_V02S0301 arc: B4 H02W0301 arc: B5 V02S0701 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H02W0401 arc: C3 F4 arc: C4 Q4 arc: C5 H02E0401 arc: C6 Q6 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 Q2 arc: D3 F2 arc: D4 V02S0401 arc: D5 F0 arc: D6 V02S0601 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: S1_V02S0701 F5 arc: V00B0000 F6 arc: V00T0000 Q2 arc: V01S0000 F3 word: SLICEC.K0.INIT 0000001100010001 word: SLICEB.K0.INIT 0000010011000100 word: SLICEB.K1.INIT 0010001000101010 word: SLICED.K0.INIT 0000010110101111 word: SLICEA.K0.INIT 1101100011111111 word: SLICEA.K1.INIT 1101100000000000 word: SLICEC.K1.INIT 1111111000110010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C48:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02S0501 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0201 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02E0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 H02W0701 arc: A5 V02N0101 arc: A6 H02E0501 arc: A7 Q7 arc: B1 N1_V02S0301 arc: B4 V02N0501 arc: B5 E1_H02W0101 arc: B6 N1_V01S0000 arc: B7 V02S0701 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: C6 F4 arc: C7 V02S0001 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D4 V00B0000 arc: D5 S1_V02N0601 arc: D6 V02N0601 arc: D7 V00B0000 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M7 H02W0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F5 arc: V00B0000 Q4 arc: V00B0100 Q7 word: SLICED.K1.INIT 0000010000000111 word: SLICEA.K0.INIT 0101000001010000 word: SLICEA.K1.INIT 0111000001010000 word: SLICEB.K0.INIT 0101000001010000 word: SLICEB.K1.INIT 0101000001010000 word: SLICEC.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0011000100100000 word: SLICED.K0.INIT 1111110100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C49:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 V02S0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 H02E0501 arc: A3 H02E0501 arc: B1 V02N0101 arc: C1 V02N0401 arc: C4 V02N0201 arc: C5 V02N0201 arc: C6 V02N0201 arc: C7 V02N0201 arc: D0 V02N0201 arc: D1 N1_V01S0000 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 H00R0100 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 V00B0100 arc: M5 H02W0001 arc: M6 V00B0100 word: SLICEA.K0.INIT 0101010100000000 word: SLICEA.K1.INIT 0100110001000100 word: SLICEB.K0.INIT 0101010100000000 word: SLICEB.K1.INIT 0101010100000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0000000011110000 word: SLICED.K1.INIT 0000000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R14C50:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0303 H01E0101 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 V01N0101 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A0 W1_H02E0701 arc: A2 V00T0000 arc: A4 N1_V01N0101 arc: A7 V02S0301 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 H00L0000 arc: B4 H00L0000 arc: B7 H02E0101 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H00L0100 arc: C4 H02E0401 arc: C7 F4 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 V01S0100 arc: D4 V00B0000 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 E1_H02W0501 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M2 H02W0601 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: V01S0100 Q4 word: SLICEB.K0.INIT 0000001010100010 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 1010110000000000 word: SLICED.K1.INIT 1100110011001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C51:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 V02S0201 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 F5 arc: A3 H02E0701 arc: A4 V00T0100 arc: A5 H02E0501 arc: A6 V02S0101 arc: A7 H02W0701 arc: B0 S1_V02N0301 arc: B3 V02S0301 arc: B4 N1_V02S0501 arc: B5 V01S0000 arc: B6 V02S0501 arc: B7 F3 arc: C0 V02S0601 arc: C3 N1_V01N0001 arc: C4 W1_H02E0401 arc: C5 N1_V02S0001 arc: C6 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D3 V01S0100 arc: D4 H01W0000 arc: D5 E1_H01W0100 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: E3_H06E0103 Q1 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q6 arc: H01W0100 Q5 arc: LSR0 H02E0301 arc: LSR1 H02W0501 arc: M1 E1_H02W0001 arc: M3 H00L0000 arc: M5 H00L0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: V00T0100 Q3 arc: V01S0000 F4 arc: V01S0100 Q6 word: SLICEB.K1.INIT 0000010010001100 word: SLICED.K1.INIT 0000000011101110 word: SLICED.K0.INIT 1111111000110010 word: SLICEC.K0.INIT 1100100000001000 word: SLICEC.K1.INIT 0101111101001110 word: SLICEA.K0.INIT 1111000000100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C52:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 V01N0101 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0101 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02S0501 arc: A2 V01N0101 arc: A4 N1_V01N0101 arc: A7 Q7 arc: B1 H02W0101 arc: B2 V02N0101 arc: B4 V02N0501 arc: B7 V01S0000 arc: C1 H02E0601 arc: C4 E1_H01E0101 arc: C7 V02S0001 arc: CE0 H00L0100 arc: CE1 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 V00B0100 arc: D4 V02S0401 arc: D7 E1_H02W0201 arc: E1_H01E0101 Q7 arc: E1_H02E0201 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 F4 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M1 H00L0000 arc: M4 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0201 Q2 arc: S1_V02S0101 Q1 arc: V01S0000 Q4 arc: W1_H02W0701 F7 word: SLICED.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111111011111111 word: SLICEC.K0.INIT 0010001000110000 word: SLICEB.K0.INIT 1010101011001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 .tile R14C53:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V01N0101 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A2 V02S0701 arc: A5 N1_V01S0100 arc: A7 V02N0101 arc: B0 S1_V02N0101 arc: B1 Q1 arc: B2 W1_H02E0301 arc: B3 V01N0001 arc: B5 H00L0000 arc: B7 H02W0301 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 H02W0601 arc: C5 V02S0201 arc: C7 E1_H02W0401 arc: CE0 H02E0101 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 Q2 arc: D3 V02N0201 arc: D5 E1_H01W0100 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: H01W0000 F3 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: S1_V02S0501 F5 arc: V01S0100 Q2 word: SLICEB.K1.INIT 0000000000001100 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1100010010000000 word: SLICEA.K1.INIT 1101111110001111 word: SLICEB.K0.INIT 0000001000010011 word: SLICEC.K1.INIT 0000101000101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C54:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0501 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 S1_V02N0301 arc: A6 N1_V01N0101 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 H02E0101 arc: B3 Q3 arc: B4 H01E0101 arc: B6 E1_H02W0301 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C2 H00L0100 arc: C3 E1_H02W0401 arc: C4 E1_H01E0101 arc: C6 Q6 arc: CE0 S1_V02N0201 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 E1_H02W0001 arc: D6 H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0100 F6 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0301 arc: M0 H02E0601 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M5 V01S0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: S1_V02S0401 F4 arc: V00B0000 Q6 arc: V01S0000 F0 arc: V01S0100 Q1 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1100111110101111 word: SLICEC.K0.INIT 1010000010001000 word: SLICED.K0.INIT 0100011100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C55:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 V06S0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 V06S0303 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 H02E0501 arc: A4 E1_H01W0000 arc: B0 H02E0301 arc: B1 H02E0301 arc: B3 E1_H01W0100 arc: C0 H02E0601 arc: C1 H02E0601 arc: C3 V02N0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D4 V02N0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q1 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00L0000 F0 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V02N0701 Q5 arc: V00T0100 F3 arc: V01S0000 Q2 word: SLICEB.K1.INIT 1100000011000000 word: SLICEC.K0.INIT 1010101000000000 word: SLICEA.K0.INIT 0000111100000100 word: SLICEA.K1.INIT 0000111100001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C56:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 H06W0003 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V01N0101 arc: A1 H02W0701 arc: A2 V02S0501 arc: A4 F5 arc: A5 N1_V01N0101 arc: A6 N1_V01S0100 arc: A7 N1_V01N0101 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 N1_V02S0101 arc: B4 V02N0701 arc: B5 V01S0000 arc: B6 N1_V01S0000 arc: B7 V01S0000 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 N1_V01S0100 arc: C5 V00T0000 arc: C7 V02S0001 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 N1_V01S0000 arc: D4 H02W0001 arc: D5 E1_H02W0201 arc: D6 N1_V02S0401 arc: D7 H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q6 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 H00L0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N3_V06N0003 F0 arc: S1_V02S0301 Q1 arc: S1_V02S0601 F6 arc: V00B0000 F4 arc: V01S0000 Q5 word: SLICEC.K1.INIT 0101001100000000 word: SLICEC.K0.INIT 1100110010001000 word: SLICEA.K0.INIT 1011101000000000 word: SLICED.K0.INIT 0010001000000000 word: SLICEA.K1.INIT 0010000000100000 word: SLICEB.K0.INIT 0111011101110010 word: SLICED.K1.INIT 1010000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C57:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 H02W0101 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 N1_V01S0100 arc: A0 N1_V02S0701 arc: A1 F7 arc: A2 V02N0501 arc: A3 F5 arc: A4 V00B0000 arc: A5 V02N0101 arc: A6 V02N0101 arc: A7 N1_V01N0101 arc: B0 V02S0301 arc: B2 V02S0301 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 V01S0000 arc: B6 V00T0000 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 H00L0000 arc: C2 N1_V01S0100 arc: C3 F4 arc: C4 Q4 arc: C5 V00T0000 arc: C6 V01N0101 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02W0001 arc: D2 Q2 arc: D3 E1_H02W0201 arc: D4 S1_V02N0401 arc: D5 V01N0001 arc: D6 H01W0000 arc: D7 V02S0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 Q2 arc: H01W0100 F1 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: S1_V02S0401 Q4 arc: V00B0000 Q6 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0001 F2 word: SLICEB.K0.INIT 0000000100001101 word: SLICED.K1.INIT 0100000001110000 word: SLICEA.K0.INIT 0000000101000101 word: SLICEA.K1.INIT 1111101000000000 word: SLICED.K0.INIT 0011001000010000 word: SLICEC.K1.INIT 0000110100001000 word: SLICEC.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 0011001000110011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C58:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06W0203 arc: N3_V06N0203 H06E0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0701 arc: A1 H01E0001 arc: A2 F7 arc: A3 E1_H01E0001 arc: A4 E1_H02W0501 arc: A5 Q5 arc: A6 F5 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B1 V01N0001 arc: B2 V02S0301 arc: B3 H02E0101 arc: B4 H01E0101 arc: B5 H02E0101 arc: B6 F3 arc: B7 E1_H02W0101 arc: C0 V02N0601 arc: C1 F4 arc: C3 N1_V01N0001 arc: C4 H02E0601 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 V00T0100 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 F0 arc: D3 H02E0001 arc: D4 H02W0201 arc: D5 H02E0001 arc: D6 W1_H02E0201 arc: D7 V02N0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M3 H00L0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: S1_V02S0001 Q0 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 Q3 arc: V01S0100 Q5 arc: W1_H02W0401 F6 word: SLICEB.K1.INIT 0001110100000000 word: SLICEC.K1.INIT 0000000000011101 word: SLICED.K0.INIT 0000000011110001 word: SLICED.K1.INIT 1110001000000000 word: SLICEA.K0.INIT 0000111000000010 word: SLICEC.K0.INIT 1010100010101010 word: SLICEB.K0.INIT 0000000000010001 word: SLICEA.K1.INIT 1100111101000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C59:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 E1_H02W0001 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 E1_H02W0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V01N0001 arc: A0 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 E1_H02W0701 arc: A5 E1_H02W0701 arc: A7 E1_H02W0701 arc: B0 E1_H02W0101 arc: B2 E1_H02W0101 arc: B3 H00L0000 arc: B4 V00B0100 arc: B5 V01S0000 arc: B7 V00T0000 arc: C0 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0401 arc: C4 V00T0000 arc: C5 E1_H02W0401 arc: C7 E1_H02W0401 arc: D0 E1_H02W0001 arc: D3 F2 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: E3_H06E0003 F0 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F4 arc: M0 V00B0000 arc: N3_V06N0203 F4 arc: S1_V02S0601 F4 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V00T0000 F2 arc: V01S0000 F2 arc: W1_H02W0701 F5 arc: W3_H06W0003 F3 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0000000000000010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000110000001100 word: SLICEB.K1.INIT 0001000000000000 word: SLICEC.K0.INIT 0000000000010000 word: SLICEC.K1.INIT 0000000000001000 word: SLICED.K1.INIT 0000000010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R14C60:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V02N0501 arc: W3_H06W0303 E1_H01W0100 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 N1_V01S0100 arc: A5 V02S0301 arc: B0 H02E0301 arc: B1 V00B0000 arc: B2 V02S0301 arc: B3 H00R0000 arc: B4 H00R0000 arc: B5 H00R0000 arc: C0 H02E0601 arc: C1 E1_H01W0000 arc: C2 W1_H02E0401 arc: C3 H00L0000 arc: C4 V02N0201 arc: C5 V02N0201 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 F0 arc: D2 W1_H02E0201 arc: D3 N1_V01S0000 arc: D4 H00R0100 arc: D5 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0100 F1 arc: H01W0000 Q0 arc: LSR1 V00T0000 arc: M2 V00T0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEA.K1.INIT 1111111111000000 word: SLICEA.K0.INIT 1100000011000000 word: SLICEB.K0.INIT 0001000011110000 word: SLICEB.K1.INIT 0000000001000000 word: SLICEC.K0.INIT 0011000000100000 word: SLICEC.K1.INIT 0011001100100011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R14C61:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00R0000 V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 W1_H02E0401 arc: V00T0100 H02E0301 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 E1_H02W0701 arc: A1 E1_H02W0501 arc: A2 H02E0501 arc: A4 V02S0101 arc: A5 V02S0101 arc: A7 N1_V01N0101 arc: B1 V02S0101 arc: B2 H02W0101 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: B6 H02E0101 arc: C0 E1_H01W0000 arc: C1 H02W0601 arc: C2 E1_H02W0601 arc: C5 V00B0100 arc: C6 F4 arc: C7 V01N0101 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02S0001 arc: D2 H02E0001 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D6 H02W0201 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F7 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0501 arc: M4 V00T0100 arc: M5 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F4 arc: S1_V02S0001 Q2 arc: S1_V02S0101 F1 arc: S1_V02S0601 Q4 arc: S1_V02S0701 F5 arc: V00B0100 Q5 arc: V01S0000 F1 arc: V01S0100 F1 arc: W1_H02W0001 Q0 word: SLICEA.K1.INIT 0100000000000000 word: SLICEC.K1.INIT 0000000010000000 word: SLICEC.K0.INIT 0000000010001000 word: SLICED.K1.INIT 0101000011110000 word: SLICED.K0.INIT 1100000000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEB.K0.INIT 1111111011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R14C62:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02E0701 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02W0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 V06S0303 arc: A2 V00B0000 arc: A5 E1_H01W0000 arc: B0 H01W0100 arc: B3 E1_H01W0100 arc: B4 H02W0301 arc: B6 H01E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F3 arc: E1_H02E0401 F4 arc: E1_H02E0701 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F6 arc: M5 E1_H02W0001 arc: MUXCLK2 CLK0 arc: S1_V02S0501 Q5 arc: V01S0000 Q5 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R14C63:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A2 H02E0701 arc: A6 V02S0101 arc: A7 H00L0000 arc: B5 H01E0101 arc: B6 H02W0301 arc: B7 V02N0501 arc: C3 H02E0401 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 H02W0401 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V00B0000 arc: D6 V02S0601 arc: D7 F2 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q4 arc: E1_H02E0701 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: LSR0 V00B0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F5 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0701 Q5 arc: S1_V02S0401 F6 arc: S1_V02S0601 Q6 arc: S1_V02S0701 F7 arc: V00B0000 Q4 arc: V00T0000 Q0 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q4 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q3 word: SLICED.K0.INIT 0010000000000000 word: SLICED.K1.INIT 0000111000000010 word: SLICEB.K0.INIT 1010101000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 1100000011000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R14C64:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0701 arc: A2 E1_H02W0701 arc: A6 F7 arc: A7 H00R0000 arc: B0 E1_H02W0101 arc: B1 V00T0000 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: B6 H02W0301 arc: B7 E1_H02W0101 arc: C0 H02W0601 arc: C1 E1_H02W0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C6 H01E0001 arc: C7 V02N0201 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 N1_V01S0000 arc: D2 V02S0201 arc: D6 F0 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: M2 V00B0100 arc: M3 H00L0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q3 arc: N1_V02N0601 Q6 arc: S1_V02S0101 F1 arc: S1_V02S0601 F6 arc: V01S0000 F2 arc: W1_H02W0101 F1 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q6 word: SLICEA.K0.INIT 0110110111111011 word: SLICED.K1.INIT 0110000000000110 word: SLICED.K0.INIT 0000000010000010 word: SLICEB.K0.INIT 0000110000001000 word: SLICEB.K1.INIT 0000110000001100 word: SLICEA.K1.INIT 0011000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R14C65:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 V06S0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 E1_H02W0301 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 W3_H06E0203 arc: V00T0100 H02E0301 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 V06S0103 arc: A1 H00L0100 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B3 W1_H02E0301 arc: B6 H02E0101 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C4 H02W0401 arc: C6 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H00R0000 arc: D3 S1_V02N0001 arc: D4 H02E0001 arc: D6 H02W0001 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00R0000 F4 arc: M0 E1_H02W0601 arc: M1 V01S0100 arc: MUXCLK0 CLK0 arc: N3_V06N0003 F3 arc: V01S0000 Q1 arc: V01S0100 F0 word: SLICEC.K0.INIT 0000000000001111 word: SLICED.K0.INIT 0000110000111111 word: SLICEB.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 0011001100110000 word: SLICEA.K1.INIT 0101000001010100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C66:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W3_H06E0203 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: V00T0000 H02W0201 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 N1_V01S0100 arc: A0 H02W0701 arc: A1 F7 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 H02W0501 arc: A6 N1_V02S0301 arc: A7 N1_V02S0101 arc: B0 F1 arc: B1 N1_V02S0101 arc: B2 H00R0100 arc: B3 Q3 arc: B4 V02S0501 arc: C0 V02N0601 arc: C1 H02E0401 arc: C2 H00L0000 arc: C3 E1_H02W0601 arc: C4 V00T0000 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 N1_V01S0000 arc: D2 H02W0201 arc: D3 F0 arc: D4 F0 arc: D6 H02W0001 arc: D7 H02W0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0000 F4 arc: H01W0000 Q3 arc: H01W0100 Q3 arc: M1 H00R0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q2 arc: S1_V02S0601 F6 arc: V00T0100 F3 arc: V01S0000 F7 arc: V01S0100 F6 arc: W1_H02W0101 Q1 arc: W3_H06W0303 F6 word: SLICEA.K1.INIT 0101000101000000 word: SLICED.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 0101010100010101 word: SLICEB.K1.INIT 1110110010100000 word: SLICEC.K0.INIT 1110110010100000 word: SLICED.K0.INIT 0000000010101010 word: SLICEC.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1110101011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C67:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00L0100 V02N0101 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: V00T0000 H02W0201 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E1_H02W0701 arc: A1 H02E0501 arc: A2 V00B0000 arc: A4 V00B0000 arc: A5 V02S0101 arc: A6 H00L0000 arc: A7 H00L0000 arc: B1 V00B0000 arc: B2 H01W0100 arc: B3 Q3 arc: B5 V02N0701 arc: B6 V00T0000 arc: B7 V00T0000 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 H02E0401 arc: C4 V00T0100 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V00T0100 arc: D3 H02E0001 arc: D4 H02E0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0101 Q5 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q3 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0100 Q2 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M1 H00L0100 arc: M5 V01S0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: S1_V02S0101 Q1 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0000 F0 arc: V01S0100 Q5 arc: W1_H02W0501 F5 word: SLICEC.K1.INIT 0010001000100010 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0111000010000000 word: SLICEB.K0.INIT 0110000011000000 word: SLICEB.K1.INIT 0011001100000000 word: SLICEC.K0.INIT 0101101000000000 word: SLICED.K0.INIT 1100000010100000 word: SLICED.K1.INIT 0100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C68:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 V02S0201 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02W0601 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0701 arc: A2 W1_H02E0501 arc: A6 V02S0301 arc: B0 V00T0000 arc: B2 H00R0100 arc: B6 H02E0301 arc: B7 H01E0101 arc: C0 N1_V01S0100 arc: C1 H00L0000 arc: C2 V02S0401 arc: C4 H02W0601 arc: C6 H02E0401 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 F0 arc: D2 H00R0000 arc: D4 H02W0201 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0000 Q1 arc: M2 N1_V01N0001 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F6 arc: V00T0000 Q0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1000100011111000 word: SLICED.K0.INIT 1101101110111101 word: SLICEC.K0.INIT 0000000000001111 word: SLICED.K1.INIT 1100110000110011 word: SLICEB.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0100001010000100 word: SLICEA.K1.INIT 1111111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C69:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A2 W1_H02E0501 arc: B2 V02N0101 arc: C2 S1_V02N0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 V02N0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E1_H02E0201 F2 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: N1_V02N0601 Q6 arc: V00B0000 Q6 arc: V01S0100 Q4 word: SLICEB.K0.INIT 1100111000001010 word: SLICEA.K0.INIT 0000000011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C70:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02E0401 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 N3_V06S0303 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02E0501 arc: A3 F5 arc: A4 H02E0701 arc: A5 N1_V02S0301 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B0 H00R0100 arc: B1 Q1 arc: B2 V02N0301 arc: B3 V02S0101 arc: B4 S1_V02N0501 arc: B5 N1_V02S0701 arc: B6 F3 arc: C0 H00L0100 arc: C1 N1_V02S0401 arc: C2 N1_V02S0601 arc: C3 V02S0601 arc: C4 V02N0001 arc: C5 V02S0201 arc: C6 S1_V02N0001 arc: C7 V02S0201 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02N0201 arc: D3 F0 arc: D4 H02W0001 arc: D5 W1_H02E0001 arc: D6 E1_H02W0201 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F2 arc: E1_H02E0101 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q4 arc: LSR0 V00B0000 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M1 H02E0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: S1_V02S0001 F2 arc: S1_V02S0201 F2 arc: V00B0100 F7 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0101000001011111 word: SLICEA.K0.INIT 0000110001000100 word: SLICEA.K1.INIT 0011111101011111 word: SLICEC.K1.INIT 0011001000000010 word: SLICEB.K1.INIT 0000111011111110 word: SLICED.K0.INIT 0110101001100101 word: SLICEB.K0.INIT 1000100011111000 word: SLICEC.K0.INIT 1111111110111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C71:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 W1_H02E0301 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02E0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0203 E1_H02W0401 arc: A0 H01E0001 arc: A2 F5 arc: A3 F7 arc: A4 V00T0000 arc: A5 Q5 arc: A7 N1_V01N0101 arc: B0 V00T0000 arc: B1 V02N0101 arc: B3 N1_V02S0101 arc: B4 V02S0701 arc: B5 V02S0701 arc: B7 H02E0101 arc: C0 E1_H02W0401 arc: C1 V02N0401 arc: C2 F4 arc: C3 V02N0601 arc: C4 H01E0001 arc: C5 H02E0401 arc: C7 V00B0100 arc: CE0 E1_H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V00B0100 arc: D2 H02E0201 arc: D3 F0 arc: D4 H00L0100 arc: D5 H00L0100 arc: D7 S1_V02N0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 Q0 arc: LSR0 V00B0000 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q5 arc: S1_V02S0101 F1 arc: V00T0000 Q0 arc: W1_H02W0501 Q5 word: SLICEC.K0.INIT 0000000000011101 word: SLICEC.K1.INIT 0001110100000000 word: SLICEB.K0.INIT 1111101000000000 word: SLICEA.K0.INIT 0000000010101100 word: SLICED.K1.INIT 1100101000000000 word: SLICEB.K1.INIT 1111000010110000 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C72:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 W3_H06E0003 arc: H00L0000 H02W0001 arc: H00L0100 H02E0301 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 H06E0303 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 V02N0301 arc: W3_H06W0103 E1_H01W0100 arc: A0 W1_H02E0501 arc: A5 Q5 arc: A7 N1_V02S0101 arc: B0 V02S0301 arc: B1 V02S0301 arc: B5 V02S0701 arc: B7 V02N0501 arc: C0 N1_V01S0100 arc: C1 W1_H02E0601 arc: C5 V00T0000 arc: C7 E1_H02W0401 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0001 arc: D5 V00B0000 arc: D7 H01W0000 arc: E1_H01E0001 F7 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q6 arc: V00B0000 Q6 arc: V01S0000 Q5 arc: V01S0100 Q1 arc: W1_H02W0201 F0 word: SLICED.K1.INIT 1000000010110000 word: SLICEC.K1.INIT 0000010011000100 word: SLICEA.K0.INIT 1010000010110001 word: SLICEA.K1.INIT 1111000011110011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C73:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 .tile R14C74:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 H06E0203 arc: V00B0100 V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E1_H01W0000 arc: A0 H02W0701 arc: B0 E1_H01W0100 arc: C0 S1_V02N0601 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: F0 F5A_SLICE arc: H00L0000 F0 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M3 H00L0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0100 Q3 word: SLICEA.K0.INIT 1010000010001000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C75:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00R0100 H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: B4 H00L0000 arc: B6 H02E0101 arc: C0 V02S0401 arc: C2 V02N0401 arc: C4 V02N0201 arc: C5 F4 arc: C6 H02E0401 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 H00R0000 arc: D4 W1_H02E0201 arc: D5 V02N0401 arc: D6 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0701 F5 arc: E3_H06E0003 F0 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H00R0000 F4 arc: H01W0000 F2 arc: H01W0100 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0501 arc: M2 V00T0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F5 arc: N1_V02N0201 F2 arc: N1_V02N0401 F6 arc: N3_V06N0203 F4 arc: V01S0000 Q2 arc: W1_H02W0001 F2 arc: W1_H02W0701 F5 arc: W3_H06W0103 F2 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1111110000001100 word: SLICED.K0.INIT 0000000000110000 word: SLICEA.K0.INIT 1111111111110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C76:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 W3_H06E0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00T0100 V02N0701 arc: W1_H02W0101 H01E0101 arc: A1 N1_V02S0701 arc: A3 E1_H02W0501 arc: A6 E1_H02W0701 arc: A7 V02S0301 arc: B1 W1_H02E0301 arc: B3 S1_V02N0301 arc: B4 H02E0301 arc: B6 S1_V02N0701 arc: B7 E1_H02W0301 arc: C1 H00L0000 arc: C3 H00L0000 arc: C4 E1_H02W0601 arc: C5 N1_V02S0001 arc: C6 S1_V02N0001 arc: C7 V02N0001 arc: CE0 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D3 W1_H02E0001 arc: D4 H02W0201 arc: D5 H02E0001 arc: D6 V02S0401 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H02E0401 Q4 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 V01S0100 arc: M2 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q7 arc: N1_V02N0101 Q1 arc: N1_V02N0701 F5 arc: V00B0000 F6 arc: V01S0000 Q4 arc: V01S0100 F0 arc: W1_H02W0501 F7 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111100010001000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1110101011000000 word: SLICED.K0.INIT 0001010100111111 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R14C77:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H06W0003 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A3 E1_H02W0701 arc: A4 E1_H02W0501 arc: A6 V02S0301 arc: B1 H02W0101 arc: B3 V02N0101 arc: B5 V02S0701 arc: B7 E1_H02W0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C3 H02E0601 arc: C4 V02S0001 arc: C5 E1_H02W0601 arc: C6 H02W0401 arc: C7 W1_H02E0601 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00T0100 arc: D3 E1_H02W0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q0 arc: E1_H02E0201 F2 arc: E1_H02E0301 Q1 arc: E1_H02E0401 Q4 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0101 Q1 arc: S1_V02S0701 Q5 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111100010001000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1010000010101111 word: SLICEC.K0.INIT 1111000010101010 word: SLICED.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1111110000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C78:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 W1_H02E0701 arc: H00R0000 V02N0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06E0103 arc: V00B0000 W1_H02E0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 V01N0001 arc: A2 H01E0001 arc: A5 H02E0701 arc: B0 E1_H02W0101 arc: B3 H02E0301 arc: B4 V02N0501 arc: B6 S1_V02N0701 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q7 arc: LSR1 H02E0501 arc: M7 H00R0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: V01S0000 F4 arc: W1_H02W0101 F3 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C79:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0601 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06E0303 arc: V00B0000 W1_H02E0401 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V01N0101 arc: A1 H00L0000 arc: A3 N1_V02S0501 arc: B0 V02S0101 arc: B2 V02S0301 arc: B4 N1_V01S0000 arc: B5 H00R0000 arc: B6 V02S0701 arc: B7 V00B0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: LSR0 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F6 arc: N1_V02N0001 F0 arc: N1_V02N0201 F2 arc: N1_V02N0301 F1 arc: V01S0000 F4 arc: W1_H02W0501 F7 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R14C7:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R14C80:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0501 H01E0101 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02E0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0701 arc: B0 V02N0301 arc: B2 V02N0101 arc: B3 E1_H02W0101 arc: B4 H00R0000 arc: B5 V02N0501 arc: B6 V00T0000 arc: B7 S1_V02N0701 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: E1_H02E0601 F6 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: N1_V01N0101 F5 arc: V01S0000 F7 arc: V01S0100 F2 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R14C81:PLC2 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0203 arc: A4 V00T0000 arc: A6 V02N0101 arc: B0 V01N0001 arc: B7 S1_V02N0701 arc: C4 N1_V02S0001 arc: C6 V02S0001 arc: C7 V02N0201 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D6 W1_H02E0001 arc: D7 V02N0601 arc: E1_H01E0101 F7 arc: E1_H02E0101 Q3 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: LSR0 V00B0000 arc: LSR1 E1_H02W0501 arc: M2 V00B0100 arc: M3 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: S1_V02S0101 Q3 arc: S1_V02S0201 F0 arc: S1_V02S0501 F7 arc: S3_V06S0203 F7 arc: V00T0000 Q2 arc: V01S0000 F7 arc: V01S0100 Q2 arc: W3_H06W0203 F7 word: SLICED.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICED.K0.INIT 1010101011110000 word: SLICEC.K0.INIT 1111000010101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C82:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0001 arc: H00L0100 H02E0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E1_H01W0100 arc: A5 V02N0101 arc: A7 W1_H02E0501 arc: B0 H02E0101 arc: B1 N1_V02S0101 arc: B2 V02N0301 arc: B7 H02W0101 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 H00L0000 arc: C5 V02S0001 arc: C7 V02N0201 arc: CE0 W1_H02E0101 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V01S0100 arc: D2 V00B0100 arc: D5 W1_H02E0201 arc: D7 H00R0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q1 arc: V01S0000 Q7 arc: V01S0100 Q7 word: SLICED.K1.INIT 1010110000000000 word: SLICEC.K1.INIT 1010111110100000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1100111111000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C83:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02E0301 arc: H00R0000 E1_H02W0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 V02N0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: A2 F7 arc: A3 V00B0000 arc: A7 W1_H02E0701 arc: B0 V02S0301 arc: B2 N1_V02S0101 arc: B3 V02N0301 arc: B4 H02E0301 arc: B6 V00T0000 arc: B7 V02N0701 arc: C0 H00L0100 arc: C2 V02S0601 arc: C4 W1_H02E0601 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 H02E0201 arc: D3 V02N0201 arc: D4 V02N0401 arc: D6 V02N0601 arc: D7 E1_H02W0201 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V02N0101 F3 arc: N3_V06N0303 F6 arc: V00B0000 Q4 arc: V00T0000 Q0 word: SLICED.K0.INIT 0000001111110011 word: SLICEB.K1.INIT 0011001101010101 word: SLICED.K1.INIT 1000101010000000 word: SLICEB.K0.INIT 1111111000110010 word: SLICEC.K0.INIT 1111110000110000 word: SLICEA.K0.INIT 1111110000001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C84:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02W0401 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 H01E0001 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06E0203 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E1_H01W0000 arc: A0 V01N0101 arc: A5 V00T0100 arc: B0 W1_H02E0301 arc: B1 V01N0001 arc: B2 W1_H02E0101 arc: B4 H00L0000 arc: B7 S1_V02N0501 arc: C0 N1_V02S0401 arc: C1 V02S0601 arc: C2 H00L0100 arc: C4 V02N0201 arc: C5 S1_V02N0001 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 E1_H02W0001 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D7 E1_H02W0201 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V02N0601 F4 arc: N3_V06N0303 F5 arc: V00T0000 Q2 arc: V00T0100 Q1 word: SLICEC.K1.INIT 0000111101010101 word: SLICEC.K0.INIT 0000111100110011 word: SLICED.K1.INIT 0011001100001111 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEA.K0.INIT 1011100010111000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C85:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W3_H06E0303 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06W0003 arc: S3_V06S0003 H06W0003 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 E1_H02W0101 arc: A1 H02E0701 arc: A4 S1_V02N0301 arc: A5 N1_V01N0101 arc: B0 V02N0101 arc: B2 V02N0301 arc: B3 S1_V02N0101 arc: B7 V01S0000 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V00T0000 arc: C5 E1_H02W0401 arc: C7 S1_V02N0201 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00T0100 arc: D2 V02S0001 arc: D3 H02E0001 arc: D4 H02W0201 arc: D5 H02W0201 arc: D7 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0100 arc: M5 E1_H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q1 arc: N1_V02N0601 F4 arc: N3_V06N0203 F7 arc: N3_V06N0303 F5 arc: S1_V02S0701 Q5 arc: S3_V06S0303 Q5 arc: V00T0000 Q2 arc: V01S0000 Q3 arc: V01S0100 Q5 arc: W1_H02W0201 Q0 word: SLICEC.K0.INIT 0101010100001111 word: SLICED.K1.INIT 0000111100110011 word: SLICEC.K1.INIT 0000111101010101 word: SLICEB.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 1100111111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C86:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02N0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0203 H06E0203 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W3_H06W0103 E1_H01W0100 arc: A0 V02N0501 arc: A2 V02N0501 arc: A4 N1_V01S0100 arc: B0 H02E0301 arc: B2 H02E0101 arc: B7 V02N0501 arc: C0 H00L0000 arc: C2 H02W0601 arc: C3 H02E0401 arc: C7 W1_H02E0401 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 W1_H02E0201 arc: D4 V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 Q6 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 F4 arc: V00B0100 F7 arc: V00T0000 F2 arc: W1_H02W0701 F7 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0011001000110000 word: SLICEB.K1.INIT 0000111100001111 word: SLICEA.K0.INIT 0011001100010000 word: SLICEC.K0.INIT 0000000010101010 word: SLICED.K1.INIT 1100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R14C87:PLC2 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0701 W3_H06E0203 arc: H00L0100 H02E0101 arc: H00R0100 V02S0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02S0001 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 W1_H02E0501 arc: A3 E1_H01E0001 arc: A6 F7 arc: A7 H02E0501 arc: B0 V02S0301 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 F3 arc: B5 F3 arc: B6 V02S0501 arc: B7 H02E0301 arc: C0 H00L0100 arc: C2 H02E0401 arc: C3 V02N0601 arc: C5 H01E0001 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 N1_V01S0000 arc: D3 V00B0100 arc: D4 H00R0100 arc: D6 F2 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F4 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F4 arc: H01W0100 F4 arc: M0 V00B0000 arc: M7 H00L0000 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F4 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: S1_V02S0701 F5 arc: V00B0100 Q7 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0001000100000000 word: SLICEA.K0.INIT 1111101110101010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K1.INIT 1010001010000000 word: SLICEC.K0.INIT 0000000011001100 word: SLICED.K1.INIT 0101010101000111 word: SLICEB.K0.INIT 1111001100000000 word: SLICEC.K1.INIT 0000110000001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.D1MUX 1 .tile R14C88:PLC2 arc: H00R0000 H02E0601 arc: N1_V02N0401 H02E0401 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 H02E0701 arc: V00T0100 W1_H02E0301 arc: C0 V02N0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: F0 F0_SLICE arc: H01W0000 Q0 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V01S0000 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R14C9:PLC2 arc: W3_H06W0303 E1_H01W0100 .tile R15C16:PLC2 arc: N1_V02N0601 E1_H02W0601 .tile R15C18:PLC2 arc: W1_H02W0601 E3_H06W0303 .tile R15C24:PLC2 arc: W3_H06W0303 E3_H06W0203 .tile R15C27:PLC2 arc: E1_H02E0401 E3_H06W0203 .tile R15C28:PLC2 arc: E1_H02E0301 V02N0301 .tile R15C29:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02S0701 .tile R15C2:PLC2 arc: W1_H02W0501 V06S0303 .tile R15C30:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0100 H02W0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 N1_V02S0001 arc: V00T0100 S1_V02N0701 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02N0501 arc: A1 H00L0000 arc: A3 H02E0701 arc: A4 E1_H01W0000 arc: A5 H02W0701 arc: A6 F5 arc: A7 Q7 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 V02N0101 arc: B4 N1_V02S0501 arc: B5 V02S0701 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 E1_H01W0000 arc: C3 V02N0601 arc: C4 Q4 arc: C5 H02E0601 arc: C6 V02N0001 arc: C7 N1_V02S0201 arc: CE0 V02S0201 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 V00B0100 arc: D4 V00B0000 arc: D5 V02N0601 arc: D6 V02S0601 arc: D7 N1_V02S0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M4 H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: S1_V02S0501 F7 arc: V00B0100 Q7 arc: V00T0000 F2 arc: V01S0000 F4 arc: V01S0100 Q1 word: SLICED.K1.INIT 0000000001010011 word: SLICEC.K0.INIT 0001000100000011 word: SLICEB.K1.INIT 0101010000000100 word: SLICEC.K1.INIT 0010001000110000 word: SLICED.K0.INIT 0000000000000101 word: SLICEB.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1110010011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C31:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 E1_H02W0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H01E0101 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: A0 F5 arc: A1 F7 arc: A2 H01E0001 arc: A3 V02S0701 arc: A5 E1_H02W0501 arc: A7 H02W0701 arc: B0 F3 arc: B1 F3 arc: B2 V01N0001 arc: B3 H00R0000 arc: B5 V02S0701 arc: B7 V02S0701 arc: C0 N1_V01N0001 arc: C3 H00L0000 arc: C5 E1_H02W0601 arc: C7 V00T0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V00T0100 arc: D5 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 V00B0000 arc: M0 H02W0601 arc: M5 E1_H02W0001 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F7 arc: W1_H02W0701 Q5 word: SLICEB.K0.INIT 0001000100000000 word: SLICEC.K1.INIT 1000100011000000 word: SLICEB.K1.INIT 1000100010100000 word: SLICED.K1.INIT 0010001000110000 word: SLICEA.K0.INIT 1111110010101010 word: SLICEA.K1.INIT 1110111011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C32:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N3_V06S0003 arc: A0 S1_V02N0701 arc: A2 H02E0701 arc: A3 E1_H01E0001 arc: A4 V02S0301 arc: A5 Q5 arc: A6 E1_H01W0000 arc: A7 E1_H01W0000 arc: B0 E1_H02W0301 arc: B2 S1_V02N0301 arc: B3 E1_H01W0100 arc: B4 F3 arc: B5 H02W0301 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 H00L0000 arc: C2 N1_V01N0001 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 N1_V02S0201 arc: C6 V00T0100 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 H02E0001 arc: D4 F0 arc: D5 H01W0000 arc: D6 V02S0401 arc: D7 V02N0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F7 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M2 W1_H02E0601 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F4 arc: S1_V02S0501 F5 arc: V00B0100 Q7 arc: V00T0000 F2 arc: W1_H02W0001 Q2 arc: W1_H02W0601 F6 arc: W1_H02W0701 Q5 word: SLICEC.K1.INIT 0000010000000111 word: SLICED.K0.INIT 0000000010101100 word: SLICEB.K0.INIT 0000000011100010 word: SLICEA.K0.INIT 0010011111111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K1.INIT 0000000010101100 word: SLICEB.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 0101010011111110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C33:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 H06W0103 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02S0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 N1_V01S0100 arc: A0 N1_V02S0701 arc: A1 V02S0701 arc: A2 H02E0501 arc: A5 N1_V02S0301 arc: A6 F7 arc: A7 F5 arc: B0 V02N0101 arc: B1 H02E0301 arc: B2 N1_V02S0301 arc: B5 V00B0100 arc: B6 S1_V02N0501 arc: B7 N1_V02S0501 arc: C0 N1_V02S0601 arc: C1 H02E0401 arc: C2 H00L0000 arc: C5 H01E0001 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE0 V02S0201 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 E1_H02W0201 arc: D2 N1_V02S0201 arc: D5 V00B0000 arc: D6 F0 arc: D7 F2 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q7 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 H02E0601 arc: M2 H02E0601 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V00B0100 Q5 arc: V01S0100 Q7 arc: W1_H02W0201 Q0 arc: W1_H02W0501 Q5 arc: W3_H06W0203 Q7 word: SLICEB.K0.INIT 0000000000011101 word: SLICEC.K1.INIT 0010011100000000 word: SLICEA.K0.INIT 0010000000101010 word: SLICED.K1.INIT 0011000000110001 word: SLICED.K0.INIT 0000101000101010 word: SLICEA.K1.INIT 1010100011111101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C34:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0203 H01E0001 arc: H00L0100 V02S0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02W0301 arc: V00B0000 V02N0201 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: A0 S1_V02N0501 arc: A1 H02W0701 arc: A2 H02E0701 arc: A4 F7 arc: A5 Q5 arc: A6 F5 arc: A7 H02E0701 arc: B0 H02W0301 arc: B1 H01W0100 arc: B2 V02S0301 arc: B4 H00L0000 arc: B5 V02N0501 arc: B6 E1_H02W0301 arc: B7 H02E0301 arc: C0 N1_V01S0100 arc: C1 N1_V01N0001 arc: C2 V02N0601 arc: C4 V00T0000 arc: C5 E1_H02W0601 arc: C6 N1_V02S0001 arc: C7 V00B0100 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V00T0100 arc: D2 N1_V01S0000 arc: D4 S1_V02N0401 arc: D5 H02W0001 arc: D6 F0 arc: D7 H01W0000 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR1 V00B0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F6 arc: V00B0100 Q5 arc: V01S0000 F1 arc: V01S0100 Q7 word: SLICED.K1.INIT 0000000101000101 word: SLICEB.K0.INIT 0010000000101010 word: SLICEC.K0.INIT 0001000011110000 word: SLICEA.K1.INIT 0100010001010000 word: SLICEA.K0.INIT 1100010010000000 word: SLICEC.K1.INIT 0000000011001010 word: SLICED.K0.INIT 1100110010001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C35:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 W1_H02E0601 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V02S0701 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02E0501 arc: A3 V00T0000 arc: A6 H00R0000 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 H02W0101 arc: B3 H01W0100 arc: B6 V00T0000 arc: C0 E1_H01W0000 arc: C2 S1_V02N0601 arc: C3 V02S0401 arc: C6 Q6 arc: CE1 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: D2 Q2 arc: D3 S1_V02N0201 arc: D6 H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: H01W0100 Q6 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M2 V00B0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: V00T0000 Q2 arc: V00T0100 F3 arc: W1_H02W0201 F0 word: SLICED.K0.INIT 0010011100000000 word: SLICEB.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 1111110110101000 word: SLICEA.K1.INIT 1111111111011101 word: SLICEB.K0.INIT 1100100000001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C36:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H01E0101 arc: V00B0100 V02S0101 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H02W0501 arc: A0 N1_V02S0501 arc: A1 H02E0701 arc: A2 V00B0000 arc: A3 V00T0000 arc: A4 F5 arc: A5 V00T0000 arc: A6 N1_V02S0101 arc: A7 V00T0100 arc: B0 N1_V02S0101 arc: B1 W1_H02E0301 arc: B2 H02E0301 arc: B3 H00R0100 arc: B4 S1_V02N0501 arc: B5 E1_H02W0301 arc: B6 V01S0000 arc: B7 V00B0000 arc: C0 H00R0100 arc: C1 W1_H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 E1_H01E0101 arc: C5 H02W0601 arc: C6 N1_V02S0001 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D3 V02N0201 arc: D4 V02S0601 arc: D5 H00R0100 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 F3 arc: H01W0100 F2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: M5 H00L0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 F0 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 F6 arc: W1_H02W0401 F4 word: SLICEA.K0.INIT 0000001000010011 word: SLICED.K0.INIT 0000001010100010 word: SLICEA.K1.INIT 0000000000110111 word: SLICEB.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 0000110000001010 word: SLICEC.K1.INIT 0011001000000010 word: SLICED.K1.INIT 1000101010000000 word: SLICEC.K0.INIT 0000000011111011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C37:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: H00R0000 H02W0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0701 H02E0701 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: A0 V02S0501 arc: A2 V02S0701 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 H02E0501 arc: A6 F5 arc: A7 Q7 arc: B0 F3 arc: B1 F3 arc: B2 E1_H01W0100 arc: B3 E1_H02W0301 arc: B4 N1_V02S0701 arc: B5 V02S0701 arc: B7 E1_H02W0301 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H00R0100 arc: C3 N1_V02S0601 arc: C4 V00T0000 arc: C5 E1_H02W0401 arc: C6 H02E0401 arc: C7 E1_H02W0601 arc: CE1 V02S0201 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V02N0201 arc: D3 E1_H02W0001 arc: D4 H00L0100 arc: D5 V02N0401 arc: D6 F2 arc: D7 E1_H01W0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: H01W0100 Q3 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M3 H00R0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: V01S0000 F0 arc: V01S0100 F7 word: SLICED.K1.INIT 0100000001001100 word: SLICEB.K1.INIT 0001000000010011 word: SLICEA.K0.INIT 1111101011001010 word: SLICEA.K1.INIT 1111111111001111 word: SLICEB.K0.INIT 1010000010001000 word: SLICEC.K1.INIT 0010001000110000 word: SLICED.K0.INIT 0000000001010000 word: SLICEC.K0.INIT 0100000001001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C38:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H01E0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V01N0101 arc: A3 V02N0701 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 N1_V01N0101 arc: A7 N1_V01S0100 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 F3 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 V02S0501 arc: B6 H02W0301 arc: B7 H01E0101 arc: C0 E1_H02W0401 arc: C1 V02N0401 arc: C2 V02S0401 arc: C3 E1_H02W0401 arc: C4 Q4 arc: C5 V02S0001 arc: C6 H02W0601 arc: C7 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 N1_V02S0201 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 F0 arc: D3 V00T0100 arc: D4 H01W0000 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 F2 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F6 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N3_V06N0203 F7 arc: V00B0000 Q6 arc: V01S0000 F4 arc: V01S0100 Q1 word: SLICED.K0.INIT 0100000001001100 word: SLICEA.K0.INIT 0000001010100010 word: SLICEA.K1.INIT 0101011111110111 word: SLICEB.K1.INIT 0000000000110101 word: SLICEB.K0.INIT 1110111111100000 word: SLICED.K1.INIT 1110111111100000 word: SLICEC.K0.INIT 0000000101000101 word: SLICEC.K1.INIT 1101000010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C39:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0501 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 H02W0701 arc: A2 F7 arc: A3 F7 arc: A4 V00B0000 arc: A5 W1_H02E0501 arc: A6 N1_V02S0301 arc: A7 F5 arc: B0 V01N0001 arc: B1 N1_V02S0101 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 N1_V02S0501 arc: B5 H02E0301 arc: B6 N1_V02S0501 arc: B7 S1_V02N0501 arc: C1 N1_V01S0100 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 Q4 arc: C5 S1_V02N0201 arc: C6 Q6 arc: C7 V00B0100 arc: CE0 H00L0000 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 H02W0201 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 E1_H01W0100 arc: D5 H00L0100 arc: D6 V02N0401 arc: E1_H01E0001 Q6 arc: E1_H02E0601 Q6 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F1 arc: H01W0100 Q4 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: S1_V02S0101 Q3 arc: V01S0000 F4 arc: V01S0100 Q1 arc: W1_H02W0201 F0 word: SLICEC.K0.INIT 0000010000010101 word: SLICED.K0.INIT 0000001010001010 word: SLICEA.K1.INIT 0000001010001010 word: SLICEA.K0.INIT 0101010100110011 word: SLICEC.K1.INIT 0011001000010000 word: SLICED.K1.INIT 0000000100000001 word: SLICEB.K0.INIT 1100000011010000 word: SLICEB.K1.INIT 0000000000010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C40:PLC2 arc: H00L0000 H02E0001 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0501 N1_V02S0501 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02S0701 arc: A0 H01E0001 arc: A2 V02S0501 arc: A4 N1_V01N0101 arc: A5 W1_H02E0701 arc: A6 F7 arc: A7 W1_H02E0701 arc: B0 H01W0100 arc: B2 E1_H01W0100 arc: B3 N1_V02S0101 arc: B4 N1_V02S0501 arc: B5 H02W0101 arc: B6 S1_V02N0501 arc: B7 V02N0501 arc: C0 V02N0401 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 H02E0601 arc: C5 V02N0001 arc: C6 E1_H02W0601 arc: C7 V00T0000 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 S1_V02N0201 arc: D3 H02W0201 arc: D4 W1_H02E0001 arc: D5 V02N0401 arc: D6 H01W0000 arc: D7 V02S0401 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00B0000 arc: M3 H00R0100 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 F0 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: V00B0100 F5 arc: V01S0000 Q4 arc: V01S0100 Q1 arc: W1_H02W0201 F2 word: SLICEB.K0.INIT 1010101011111100 word: SLICEB.K1.INIT 1111111111111100 word: SLICEC.K1.INIT 0001110100000000 word: SLICEA.K0.INIT 1111101011111100 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K1.INIT 0000101000001100 word: SLICEC.K0.INIT 1011100000000000 word: SLICED.K0.INIT 0000111100001011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C41:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: A0 S1_V02N0501 arc: A1 H02W0701 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 V00B0000 arc: A5 V00T0100 arc: A6 W1_H02E0501 arc: A7 N1_V01S0100 arc: B0 F3 arc: B1 Q1 arc: B2 H00L0000 arc: B3 H00L0000 arc: B4 N1_V01S0000 arc: B5 V00B0100 arc: B6 N1_V01S0000 arc: B7 V02S0701 arc: C0 F4 arc: C1 V02N0401 arc: C2 V02N0601 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 W1_H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 H02W0201 arc: D7 W1_H02E0201 arc: E1_H01E0101 F0 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F6 arc: H01W0100 F2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M1 H00R0100 arc: M2 V00T0000 arc: M5 H00R0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0401 Q6 arc: S1_V02S0301 F1 arc: S1_V02S0701 F5 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W1_H02W0201 F2 word: SLICED.K0.INIT 0001101100000000 word: SLICEB.K0.INIT 0000000001010011 word: SLICEC.K1.INIT 1100101000000000 word: SLICEC.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 0000000100000001 word: SLICED.K1.INIT 1100110000001000 word: SLICEA.K1.INIT 0001101100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C42:PLC2 arc: E1_H02E0501 V02S0501 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02S0001 arc: N1_V02N0001 H06W0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E3_H06W0103 arc: A0 F5 arc: A2 E1_H02W0501 arc: A3 N1_V02S0701 arc: A4 N1_V02S0301 arc: A5 Q5 arc: A6 V02S0101 arc: A7 N1_V01N0101 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H02E0101 arc: B5 N1_V02S0701 arc: B6 V00B0100 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 S1_V02N0401 arc: C3 H00R0100 arc: C4 N1_V02S0001 arc: C5 N1_V02S0201 arc: C6 V01N0101 arc: C7 E1_H02W0601 arc: CE1 V02S0201 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 N1_V02S0201 arc: D4 F0 arc: D5 H02W0001 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0101 F4 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0100 Q5 arc: LSR0 H02E0301 arc: LSR1 E1_H02W0301 arc: M0 H02W0601 arc: M3 H00L0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q3 arc: S1_V02S0701 F7 arc: V00T0100 F3 arc: V01S0000 F2 word: SLICEB.K0.INIT 0101010000000100 word: SLICED.K1.INIT 1011000010000000 word: SLICED.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000100001101 word: SLICEB.K1.INIT 0010011100000000 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 0010000001110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C43:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E3_H06E0103 H01E0101 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N3_V06S0003 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 N1_V01S0100 arc: A0 F5 arc: A3 E1_H01E0001 arc: A5 N1_V01N0101 arc: B0 F3 arc: B3 V02N0101 arc: B5 V02N0501 arc: C0 E1_H02W0601 arc: C3 N1_V02S0401 arc: C5 V00B0100 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D3 V00T0100 arc: D5 W1_H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M1 H02W0001 arc: M3 E1_H02W0201 arc: M5 H02W0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q6 arc: S1_V02S0101 Q1 arc: S1_V02S0401 Q6 arc: S1_V02S0501 Q5 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 Q3 arc: V01S0100 Q6 word: SLICEB.K1.INIT 1011000010000000 word: SLICEC.K1.INIT 0010001000110000 word: SLICEA.K0.INIT 1111000011100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C44:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0201 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0303 N3_V06S0303 arc: A0 F5 arc: A2 V00B0000 arc: A5 V00T0100 arc: B0 H01W0100 arc: B2 H00R0100 arc: B5 V00B0100 arc: C0 V02S0401 arc: C2 S1_V02N0601 arc: C5 V02N0201 arc: CE0 H00L0100 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 Q2 arc: D5 H00R0100 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: H01W0100 F2 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0301 arc: M1 H00L0000 arc: M2 V00T0000 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q6 arc: S1_V02S0701 Q5 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q2 word: SLICEB.K0.INIT 1100100000001000 word: SLICEC.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 1110111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C45:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 V01N0101 arc: A1 F7 arc: A2 H02E0501 arc: A3 E1_H01E0001 arc: A4 S1_V02N0301 arc: A5 N1_V01N0101 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B0 V02S0101 arc: B1 V01N0001 arc: B2 H00R0000 arc: B3 V02S0301 arc: B4 V02N0701 arc: B5 H02E0301 arc: B6 V00T0000 arc: B7 H02E0301 arc: C0 N1_V01N0001 arc: C2 N1_V01S0100 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 H02E0601 arc: C6 N1_V02S0001 arc: C7 N1_V02S0001 arc: CE0 V02N0201 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 F0 arc: D5 V02S0401 arc: D6 N1_V02S0601 arc: D7 N1_V02S0401 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q7 arc: E3_H06E0103 Q1 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 H02W0001 arc: M5 H02E0001 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q7 arc: N1_V02N0301 F3 arc: S1_V02S0201 F2 arc: S1_V02S0501 F5 arc: V00B0000 F6 word: SLICEB.K1.INIT 1100000010001000 word: SLICED.K0.INIT 0100000001110000 word: SLICEC.K1.INIT 1010000011000000 word: SLICEB.K0.INIT 1010001010000000 word: SLICED.K1.INIT 0101000000110000 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111101110 word: SLICEC.K0.INIT 0010000001110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R15C46:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02S0201 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 N1_V01S0000 arc: A0 F7 arc: A2 F5 arc: A3 E1_H02W0701 arc: A4 H02W0501 arc: A5 H02W0501 arc: A7 Q7 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 V02N0101 arc: B3 Q3 arc: B4 H00R0000 arc: B5 V02N0701 arc: B7 H02E0301 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 F4 arc: C3 N1_V01N0001 arc: C4 H02W0601 arc: C5 H02W0401 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 E1_H02W0101 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V00B0100 arc: D3 H02E0001 arc: D4 H02W0201 arc: D5 H01W0000 arc: D7 H00L0100 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F2 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q4 arc: H01W0000 Q7 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: V00T0100 F3 arc: V01S0100 Q1 word: SLICEB.K1.INIT 0010011100000000 word: SLICED.K1.INIT 0001000000010011 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K0.INIT 1010000010001000 word: SLICEC.K1.INIT 0101010000000100 word: SLICEB.K0.INIT 1111101100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C47:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 V02S0201 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00T0100 N1_V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 H01E0001 arc: W3_H06W0203 N3_V06S0203 arc: A0 V01N0101 arc: A2 H02E0501 arc: A3 H02W0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A7 V02N0301 arc: B0 N1_V02S0101 arc: B2 V02N0101 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H02W0301 arc: B7 N1_V01S0000 arc: C0 V02N0601 arc: C2 F4 arc: C3 H02E0601 arc: C4 E1_H02W0601 arc: C5 H02W0401 arc: C7 N1_V02S0001 arc: CE0 H02E0101 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D2 H01E0101 arc: D3 F2 arc: D4 V00B0000 arc: D5 V02S0401 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q0 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0301 arc: M5 H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: V00B0100 Q5 word: SLICEC.K1.INIT 0000010011000100 word: SLICED.K1.INIT 1100000011100000 word: SLICEA.K0.INIT 1111111111111101 word: SLICEC.K0.INIT 1010000011000000 word: SLICEB.K0.INIT 1111111000000000 word: SLICEB.K1.INIT 1111000001000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C48:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 N1_V02S0501 arc: A3 N1_V02S0501 arc: A4 E1_H01W0000 arc: A6 H02W0701 arc: A7 Q7 arc: B1 H02W0101 arc: B4 V02S0501 arc: B6 V02N0501 arc: B7 S1_V02N0501 arc: C1 F4 arc: C4 V02N0001 arc: C6 H02E0601 arc: C7 H02W0401 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D4 V01N0001 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F6 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0100 Q5 arc: H01W0000 Q7 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00T0100 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0501 Q5 arc: V01S0100 Q7 word: SLICEC.K0.INIT 0111011100110111 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1010101010101010 word: SLICEA.K1.INIT 0010101010101010 word: SLICEB.K0.INIT 1010101010101010 word: SLICEB.K1.INIT 1010101010101010 word: SLICED.K0.INIT 1110000001000000 word: SLICED.K1.INIT 1111101100111011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C49:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0401 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 N3_V06S0103 arc: A2 V00B0000 arc: A3 H01E0001 arc: A4 F5 arc: A5 H02W0701 arc: A6 V02N0301 arc: A7 Q7 arc: B2 V02N0101 arc: B3 V01N0001 arc: B4 E1_H02W0101 arc: B5 H02W0301 arc: B6 S1_V02N0701 arc: B7 V02S0701 arc: C2 N1_V01N0001 arc: C3 H02E0601 arc: C4 V00B0100 arc: C5 V02N0201 arc: C6 V00T0100 arc: C7 V02N0201 arc: CE1 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: D3 V01S0100 arc: D4 H00R0100 arc: D5 E1_H02W0001 arc: D6 V02S0601 arc: D7 E1_H02W0001 arc: E1_H01E0101 F2 arc: E1_H02E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F4 arc: H01W0100 F6 arc: LSR0 W1_H02E0301 arc: M2 V00T0000 arc: M7 H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q2 word: SLICEB.K0.INIT 0011001000010000 word: SLICED.K0.INIT 0101000101000000 word: SLICEB.K1.INIT 1100000010100000 word: SLICED.K1.INIT 0000000000110101 word: SLICEC.K1.INIT 0101001100000000 word: SLICEC.K0.INIT 0000110001001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C50:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02S0301 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 H01E0101 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0501 N3_V06S0303 arc: W3_H06W0003 E1_H01W0000 arc: A0 F5 arc: A1 E1_H01E0001 arc: A2 V02S0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 H02E0501 arc: B0 W1_H02E0101 arc: B1 H02E0101 arc: B2 N1_V02S0101 arc: B3 V02N0101 arc: B4 V00B0100 arc: B5 V02N0501 arc: B7 H02E0301 arc: C0 H02W0601 arc: C1 H00L0000 arc: C2 N1_V01N0001 arc: C3 E1_H02W0401 arc: C4 H02E0601 arc: C5 H02E0601 arc: C6 Q6 arc: C7 V01N0101 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V02S0001 arc: D2 H02W0001 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 N1_V02S0401 arc: D7 F2 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F4 arc: H01W0100 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M1 H00R0000 arc: M2 V00T0000 arc: M5 H00R0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q2 arc: S1_V02S0601 F6 arc: V01S0000 Q5 arc: V01S0100 Q1 arc: W1_H02W0301 Q1 arc: W1_H02W0701 Q5 word: SLICED.K0.INIT 1111000010101010 word: SLICEC.K0.INIT 0000110000001010 word: SLICEB.K1.INIT 0000000000000011 word: SLICEC.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 0000111000001111 word: SLICEA.K1.INIT 1101110000000000 word: SLICEB.K0.INIT 0000000000011101 word: SLICED.K1.INIT 0100010001000101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C51:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: A1 E1_H01E0001 arc: B0 V01N0001 arc: B1 H01W0100 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: E1_H01E0001 Q0 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0100 Q7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M3 H00L0100 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q3 arc: W3_H06W0003 Q3 word: SLICEA.K0.INIT 1100110010101010 word: SLICEA.K1.INIT 1010101011001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 .tile R15C52:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 W1_H02E0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02W0501 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: A0 V02S0501 arc: A2 V02N0501 arc: B0 H02W0301 arc: B2 V01N0001 arc: C0 H02W0401 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 S1_V02N0201 arc: E1_H02E0001 F0 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02W0001 arc: M5 H00L0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: N1_V02N0101 Q1 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0101111101010111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110010101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 .tile R15C53:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0601 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: A0 V02S0501 arc: A2 H02W0701 arc: A3 H02W0701 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 N1_V02S0101 arc: B2 H02W0101 arc: B6 V01S0000 arc: B7 V01S0000 arc: C0 N1_V02S0601 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C6 H02E0401 arc: C7 H02W0601 arc: CE1 H00L0100 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D6 S1_V02N0601 arc: D7 W1_H02E0001 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M2 V00B0100 arc: M3 H00R0000 arc: M5 H00R0100 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q5 arc: V00B0100 F7 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0101111101001111 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011001010 word: SLICED.K1.INIT 0000000000110101 word: SLICEB.K0.INIT 1100110011111010 word: SLICEB.K1.INIT 1111111111111010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C54:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N3_V06S0303 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0101 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 E3_H06W0003 arc: A0 N1_V02S0701 arc: A1 H00L0000 arc: A2 N1_V02S0501 arc: A3 H02E0701 arc: A4 N1_V01S0100 arc: A5 E1_H02W0501 arc: A6 H00R0000 arc: A7 Q7 arc: B0 W1_H02E0301 arc: B1 V00T0000 arc: B2 V02N0101 arc: B3 Q3 arc: B4 H00L0000 arc: B5 V00B0100 arc: B6 V02N0501 arc: B7 V00T0000 arc: C0 V02S0601 arc: C1 H00R0100 arc: C2 N1_V01N0001 arc: C3 N1_V01S0100 arc: C4 V00T0100 arc: C5 N1_V02S0201 arc: C6 H02E0401 arc: C7 N1_V02S0001 arc: CE0 S1_V02N0201 arc: CE1 W1_H02E0101 arc: CE2 E1_H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 E1_H02W0001 arc: D2 W1_H02E0001 arc: D3 N1_V02S0001 arc: D4 E1_H02W0001 arc: D5 V01N0001 arc: D6 W1_H02E0201 arc: D7 N1_V02S0601 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 Q7 arc: H01W0000 F5 arc: LSR0 H02E0301 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: M3 H00L0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q5 arc: S1_V02S0301 F1 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 F6 arc: W1_H02W0101 F3 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 0000000000000001 word: SLICEB.K0.INIT 0100000000000000 word: SLICEA.K1.INIT 1101100000000000 word: SLICEC.K0.INIT 1011100000000000 word: SLICED.K0.INIT 0011001100100011 word: SLICEB.K1.INIT 0001101100000000 word: SLICEC.K1.INIT 0001000000010101 word: SLICED.K1.INIT 0011000001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C55:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 N3_V06S0103 arc: H00R0100 V02S0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 F5 arc: A1 F5 arc: A2 F7 arc: A3 F7 arc: A7 E1_H01W0000 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H02E0301 arc: B3 H02E0301 arc: C0 H00L0100 arc: C2 F4 arc: C3 F4 arc: C4 V02S0201 arc: C5 E1_H02W0401 arc: C7 E1_H02W0401 arc: CE0 H00R0100 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0201 arc: D4 H02E0001 arc: D5 E1_H01W0100 arc: D7 H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M4 E1_H01E0101 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 word: SLICEC.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0000000001011111 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1100110010101010 word: SLICEB.K1.INIT 0000110100001101 word: SLICEB.K0.INIT 0000010100001101 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C56:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 H01E0001 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02N0401 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0501 V02S0501 arc: W3_H06W0103 N3_V06S0103 arc: A0 F5 arc: A1 H02E0701 arc: A2 V02S0501 arc: A3 V00T0000 arc: A4 V00T0000 arc: A5 V02S0301 arc: B0 E1_H02W0301 arc: B1 V00B0000 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 N1_V01S0000 arc: B5 V01S0000 arc: C0 E1_H01W0000 arc: C1 N1_V01N0001 arc: C2 N1_V02S0401 arc: C3 H00L0000 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: CE0 E1_H02W0101 arc: CE1 S1_V02N0201 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 H02W0001 arc: D2 Q2 arc: D3 V02S0201 arc: D4 H02E0201 arc: D5 H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 Q5 arc: H01W0000 Q6 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 E1_H02W0601 arc: M1 H00R0000 arc: M2 V00T0100 arc: M5 E1_H02W0001 arc: M6 W1_H02E0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F1 arc: V00T0000 Q2 arc: V01S0000 Q5 arc: V01S0100 F4 arc: W1_H02W0201 Q0 word: SLICEB.K0.INIT 0010000000101010 word: SLICEA.K1.INIT 1000100010001100 word: SLICEC.K0.INIT 0000000000110101 word: SLICEC.K1.INIT 0101001100000000 word: SLICEA.K0.INIT 1100111110001011 word: SLICEB.K1.INIT 1100000010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C57:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0601 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0000 arc: A2 E1_H01E0001 arc: A3 V00T0000 arc: A6 F7 arc: B0 H01W0100 arc: B2 N1_V02S0101 arc: B3 E1_H01W0100 arc: B4 H02W0301 arc: B6 V01S0000 arc: B7 N1_V01S0000 arc: C0 H02E0601 arc: C2 E1_H01W0000 arc: C3 N1_V01S0100 arc: C4 Q4 arc: C6 N1_V02S0201 arc: C7 H02E0401 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 N1_V02S0001 arc: D3 N1_V02S0201 arc: D4 N1_V02S0401 arc: D6 W1_H02E0201 arc: D7 V02S0401 arc: E1_H01E0001 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F0 arc: H01W0100 Q7 arc: LSR0 H02W0501 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q7 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q7 arc: V00T0100 F3 arc: V01S0000 F4 arc: V01S0100 F6 arc: W1_H02W0001 F2 word: SLICEB.K0.INIT 0000000000011101 word: SLICEC.K0.INIT 0000001111001111 word: SLICED.K1.INIT 0000001111110011 word: SLICEB.K1.INIT 0000101000100010 word: SLICEA.K0.INIT 1111110011111010 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1010000011000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C58:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 V02S0701 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: A0 N1_V02S0701 arc: A2 H01E0001 arc: A3 V00B0000 arc: A5 N1_V02S0101 arc: A6 V02S0301 arc: B0 V02N0101 arc: B1 W1_H02E0301 arc: B2 V02N0301 arc: B4 N1_V01S0000 arc: B5 F3 arc: B6 E1_H02W0301 arc: B7 N1_V02S0501 arc: C0 H02W0601 arc: C1 H00L0100 arc: C2 H00L0000 arc: C3 N1_V01S0100 arc: C4 N1_V02S0001 arc: C5 F4 arc: C6 V02N0201 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 F2 arc: D2 V02S0201 arc: D3 V02S0001 arc: D4 H02E0201 arc: D5 V02S0601 arc: D6 W1_H02E0001 arc: D7 S1_V02N0601 arc: E1_H01E0101 F0 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F0 arc: S1_V02S0501 F5 arc: S1_V02S0601 F6 arc: W1_H02W0001 F0 arc: W1_H02W0201 F0 word: SLICED.K1.INIT 0000000011110011 word: SLICEB.K1.INIT 1111101001010000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 0000010100010001 word: SLICEA.K0.INIT 1111001000100010 word: SLICED.K0.INIT 0001111010110100 word: SLICEB.K0.INIT 0011000000100010 word: SLICEA.K1.INIT 0000000000000011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C59:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00L0100 V02N0301 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 H01E0101 arc: A0 F5 arc: A1 F5 arc: A2 F5 arc: A3 F5 arc: A5 W1_H02E0701 arc: A7 E1_H01W0000 arc: B0 H01W0100 arc: B2 H01W0100 arc: B3 H00L0000 arc: B5 V01S0000 arc: C3 H02E0401 arc: CE2 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V01S0100 arc: D2 N1_V02S0001 arc: D3 V01S0100 arc: D5 V02N0601 arc: D7 V02N0601 arc: E1_H02E0401 Q6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V00T0100 F1 arc: V01S0000 Q5 arc: V01S0100 F7 word: SLICED.K1.INIT 0101010100000000 word: SLICEC.K1.INIT 0000000001110111 word: SLICEA.K0.INIT 0011001100010001 word: SLICEA.K1.INIT 0000000001010101 word: SLICEB.K0.INIT 0011001100010001 word: SLICEB.K1.INIT 0000000011010101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C60:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 V02S0401 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: A1 W1_H02E0501 arc: A4 H02W0701 arc: A5 V00B0000 arc: B1 H01W0100 arc: B4 H02E0301 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 W1_H02E0401 arc: C3 W1_H02E0401 arc: C4 N1_V02S0001 arc: C5 H02W0401 arc: C6 Q6 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 V00B0000 arc: D5 V02N0601 arc: D6 H02E0201 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H01W0000 Q5 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 H02W0601 arc: M3 H00R0000 arc: M4 E1_H01E0101 arc: M5 V01S0000 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V00B0000 F6 arc: V00T0100 Q3 arc: V01S0000 F4 word: SLICED.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0010111100000000 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICEC.K0.INIT 1011101110111000 word: SLICEC.K1.INIT 1111000010101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C61:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0401 H02W0401 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E3_H06W0103 arc: A0 V02S0701 arc: A1 N1_V02S0501 arc: A2 V00T0000 arc: A4 E1_H02W0701 arc: A7 V02S0101 arc: B1 H00R0100 arc: B2 H02W0101 arc: B4 N1_V01S0000 arc: B6 N1_V02S0701 arc: B7 V02N0501 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H02W0401 arc: C4 V00T0100 arc: C6 F4 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D2 H02W0001 arc: D4 E1_H02W0001 arc: D6 V02S0601 arc: D7 V02N0401 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F7 arc: V01S0100 Q2 arc: W3_H06W0003 F0 word: SLICEA.K1.INIT 0000000000010011 word: SLICEA.K0.INIT 0000010101010101 word: SLICEB.K0.INIT 0000010001000011 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000011101110111 word: SLICED.K0.INIT 0011000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R15C62:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 N1_V02S0401 arc: H01W0100 E3_H06W0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: A2 V02S0501 arc: A3 V02N0501 arc: A5 H02E0501 arc: B0 H02W0301 arc: B3 H00R0000 arc: B5 V02N0701 arc: C0 E1_H02W0601 arc: C1 H02W0601 arc: C2 V02N0601 arc: C3 V02N0601 arc: C5 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02W0201 arc: D2 H00R0000 arc: D3 N1_V01S0000 arc: D5 V01N0001 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: LSR1 V00T0100 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00T0100 F1 arc: W1_H02W0001 F0 arc: W1_H02W0201 F2 arc: W1_H02W0501 F5 word: SLICEA.K1.INIT 1111000011111111 word: SLICEA.K0.INIT 1111111100110101 word: SLICEC.K1.INIT 0011010100111111 word: SLICEB.K0.INIT 0000000001011111 word: SLICEB.K1.INIT 0000000100010001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R15C63:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02W0301 arc: N1_V02N0001 H02W0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 E1_H02W0501 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 N3_V06S0303 arc: A1 H00L0100 arc: A2 H01E0001 arc: A5 V00T0000 arc: A7 H02W0701 arc: B0 H02W0301 arc: B1 V02S0101 arc: B4 H00L0000 arc: B5 H00L0000 arc: B6 V02S0701 arc: B7 N1_V02S0501 arc: C1 N1_V01S0100 arc: C2 E1_H01W0000 arc: C4 V00T0000 arc: C5 E1_H02W0401 arc: C6 E1_H01E0101 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 F0 arc: D4 V02S0401 arc: D5 V02S0401 arc: D6 F0 arc: D7 H00L0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR1 V00T0100 arc: M0 E1_H02W0601 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0100 F6 arc: W1_H02W0001 Q2 arc: W1_H02W0201 F0 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 1111111111001111 word: SLICEA.K0.INIT 0011001100000000 word: SLICEA.K1.INIT 0101010000010000 word: SLICED.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0000000010100000 word: SLICEC.K0.INIT 0000000000111111 word: SLICEC.K1.INIT 0000000000000111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R15C64:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 V01N0101 arc: H00L0100 N1_V02S0301 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 E1_H02W0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0701 V02S0701 arc: A0 H00L0100 arc: A2 E1_H02W0701 arc: A3 H02E0701 arc: A4 F5 arc: B0 V02S0101 arc: B1 N1_V02S0301 arc: B4 N1_V01S0000 arc: B5 E1_H02W0301 arc: B6 N1_V01S0000 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 W1_H02E0401 arc: C3 W1_H02E0401 arc: C4 V00B0100 arc: D0 V00T0100 arc: D4 E1_H02W0001 arc: D5 V02S0601 arc: D6 E1_H02W0001 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00R0000 F6 arc: H01W0000 F1 arc: H01W0100 F4 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 N1_V01N0001 arc: N1_V01N0001 F5 arc: V01S0000 F1 arc: W1_H02W0101 F1 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICEC.K1.INIT 1100110000000000 word: SLICEA.K0.INIT 1011111010111111 word: SLICEA.K1.INIT 1100111111001111 word: SLICEB.K0.INIT 1010111110101111 word: SLICEB.K1.INIT 1010111110101111 word: SLICEC.K0.INIT 0000000000000100 word: SLICED.K0.INIT 0000000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 .tile R15C65:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 S1_V02N0201 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 arc: A0 H00L0000 arc: A3 V02S0701 arc: B2 V02S0101 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H01W0000 F6 arc: LSR0 V00T0000 arc: LSR1 V00B0100 arc: M1 H02E0001 arc: M3 H00L0100 arc: M4 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F4 arc: S1_V02S0301 Q3 arc: S1_V02S0601 Q4 arc: V01S0000 Q7 arc: W3_H06W0203 Q7 word: SLICED.K1.INIT 1111111111110000 word: SLICED.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 1111111111110000 word: SLICEB.K1.INIT 0101010101011010 word: SLICEB.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001010 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C66:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02S0001 arc: H00R0000 S1_V02N0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H06E0303 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 V06S0303 arc: A2 E1_H02W0501 arc: A5 Q5 arc: B5 H02W0301 arc: C2 H00L0000 arc: C3 E1_H01W0000 arc: C5 V00T0000 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 V02S0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V02S0201 arc: D3 V00B0100 arc: D5 F2 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q1 arc: E3_H06E0103 Q1 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00R0100 Q7 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 H00R0100 arc: M3 W1_H02E0201 arc: M5 V01S0000 arc: M6 H02E0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N3_V06N0003 F3 arc: S1_V02S0701 F5 arc: V00B0000 Q6 arc: V01S0000 Q3 word: SLICEA.K1.INIT 0000000000001110 word: SLICEA.K0.INIT 0000000000000000 word: SLICEB.K0.INIT 0000111101010101 word: SLICEC.K1.INIT 1000000010110000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C67:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02S0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 V01N0101 arc: V00B0100 V02S0301 arc: V00T0100 S1_V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N3_V06S0003 arc: A0 N1_V02S0501 arc: A4 E1_H01W0000 arc: A6 H02E0701 arc: B0 V02N0301 arc: B4 V02S0501 arc: B6 V00T0000 arc: C0 H00L0100 arc: C1 V02N0601 arc: C4 S1_V02N0201 arc: C6 Q6 arc: CE0 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00B0100 arc: D4 V01N0001 arc: D6 H02E0201 arc: E1_H01E0001 F0 arc: E1_H02E0001 F0 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: LSR1 V00T0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F6 arc: V00T0000 Q0 arc: W1_H02W0101 F1 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 0000000000100111 word: SLICEC.K0.INIT 0100000001001100 word: SLICEA.K0.INIT 1111001000100010 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R15C68:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 H01E0001 arc: H00L0000 V02S0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 H01E0001 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0501 arc: A2 V02N0501 arc: A3 V02N0701 arc: A4 N1_V01N0101 arc: A6 H02E0701 arc: A7 Q7 arc: B0 F3 arc: B1 E1_H01W0100 arc: B2 H02E0101 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H02E0301 arc: B6 V00T0000 arc: B7 H02E0301 arc: C0 H02W0401 arc: C1 E1_H01W0000 arc: C2 H02E0401 arc: C3 N1_V02S0601 arc: C4 V02N0201 arc: C5 H02E0401 arc: C6 E1_H01E0101 arc: C7 E1_H02W0401 arc: CE1 V02S0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 H02E0201 arc: D3 V01S0100 arc: D4 V02S0401 arc: D5 H02E0201 arc: D6 V01N0001 arc: D7 H00L0100 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: H01W0000 F0 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M0 E1_H02W0601 arc: M3 H00L0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: V00B0100 Q7 arc: V01S0100 Q3 word: SLICEB.K1.INIT 0000001000000111 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K1.INIT 1111110000110000 word: SLICED.K1.INIT 0000101100001000 word: SLICED.K0.INIT 1111110110101000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEB.K0.INIT 0101010000010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C69:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 W3_H06E0003 arc: A0 H00L0000 arc: A1 V01N0101 arc: A2 N1_V02S0701 arc: A3 F7 arc: A4 N1_V02S0301 arc: A5 H02W0701 arc: A6 N1_V02S0301 arc: A7 F5 arc: B0 V00T0000 arc: B1 F3 arc: B2 N1_V02S0301 arc: B3 E1_H02W0101 arc: B4 N1_V02S0701 arc: B5 H00L0000 arc: B6 N1_V02S0701 arc: B7 V02N0501 arc: C0 H02W0401 arc: C1 H00L0100 arc: C2 H00L0000 arc: C3 V02N0601 arc: C4 Q4 arc: C5 V00T0000 arc: C6 Q6 arc: C7 H02E0401 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 S1_V02N0201 arc: D2 Q2 arc: D3 H02E0001 arc: D4 V01N0001 arc: D5 H02E0201 arc: D6 S1_V02N0601 arc: D7 E1_H02W0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F4 arc: H01W0100 F6 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M0 H02E0601 arc: M2 H02E0601 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F1 arc: S1_V02S0401 Q4 arc: S1_V02S0601 Q6 arc: V00T0000 Q2 arc: V01S0100 Q4 arc: W1_H02W0201 F0 arc: W1_H02W0401 F4 word: SLICED.K0.INIT 0000001010001010 word: SLICEC.K0.INIT 0000000101000101 word: SLICEB.K0.INIT 0000100001001100 word: SLICEA.K0.INIT 1010000011000000 word: SLICEC.K1.INIT 1101100000000000 word: SLICED.K1.INIT 1100100011001100 word: SLICEB.K1.INIT 1010101010101000 word: SLICEA.K1.INIT 1100111000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C70:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02S0201 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 V02S0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 V02S0201 arc: V00T0000 H02E0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 N1_V02S0501 arc: A3 N1_V02S0501 arc: A4 S1_V02N0101 arc: A5 H02E0701 arc: A7 H02W0701 arc: B4 H02W0301 arc: B5 V00B0100 arc: B6 N1_V01S0000 arc: B7 V00B0100 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: C4 H02E0601 arc: C5 V00T0100 arc: C6 N1_V02S0201 arc: C7 V00T0100 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D5 H02E0201 arc: D6 H01W0000 arc: D7 V02N0401 arc: E1_H01E0001 F5 arc: E1_H02E0401 Q6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M1 V01S0100 arc: M2 V00T0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N3_V06N0203 F4 arc: S1_V02S0301 F1 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 F1 arc: V01S0100 F6 word: SLICEC.K1.INIT 0001101100000000 word: SLICEC.K0.INIT 0010000001110000 word: SLICED.K1.INIT 1010000010001000 word: SLICED.K0.INIT 1100111111000000 word: SLICEA.K0.INIT 0101010100000101 word: SLICEA.K1.INIT 0101010100000101 word: SLICEB.K0.INIT 0101000000000000 word: SLICEB.K1.INIT 0101000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R15C71:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V01N0101 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 N3_V06S0303 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 V01N0101 arc: V00B0100 V02S0301 arc: V00T0000 V02S0601 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V01N0101 arc: A0 E1_H01E0001 arc: A1 V02N0501 arc: A2 N1_V02S0701 arc: A3 V00B0000 arc: A4 N1_V02S0301 arc: A5 V02S0101 arc: A6 V00T0100 arc: A7 F5 arc: B0 F3 arc: B2 H02E0101 arc: B3 Q3 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 S1_V02N0701 arc: C0 S1_V02N0601 arc: C1 N1_V02S0601 arc: C2 H02E0401 arc: C3 N1_V02S0401 arc: C4 V00T0100 arc: C5 V02S0201 arc: C6 V01N0101 arc: C7 H02W0401 arc: CE1 W1_H02E0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D2 W1_H02E0201 arc: D3 V02N0201 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 V02S0401 arc: D7 V01N0001 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0501 arc: M0 H01E0001 arc: M3 H02E0201 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F7 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0100 F3 word: SLICEB.K1.INIT 0011010100000000 word: SLICEB.K0.INIT 0000000000100111 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K0.INIT 1010000011000000 word: SLICEC.K1.INIT 0000000000001101 word: SLICED.K1.INIT 1100110001000000 word: SLICEC.K0.INIT 1111010110100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R15C72:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 H02W0701 arc: V00B0100 H02W0701 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: A1 N1_V02S0701 arc: A2 V02S0701 arc: A3 F5 arc: A4 N1_V01S0100 arc: A5 V00T0000 arc: A6 F7 arc: A7 H02E0501 arc: B1 V02S0301 arc: B2 V02S0301 arc: B4 V00B0100 arc: B5 N1_V01S0000 arc: B6 V02N0501 arc: B7 V02S0501 arc: C0 V02N0601 arc: C1 N1_V02S0601 arc: C2 V02N0401 arc: C3 H02W0601 arc: C4 V02S0201 arc: C5 H02W0401 arc: C6 E1_H02W0401 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0001 arc: D2 V02S0201 arc: D3 V01S0100 arc: D4 H02W0001 arc: D5 V02S0601 arc: D6 F2 arc: D7 V02S0601 arc: E1_H01E0101 F1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0201 F0 arc: V01S0000 F3 arc: V01S0100 F4 arc: W1_H02W0101 F3 arc: W1_H02W0401 F6 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111111111110000 word: SLICEA.K1.INIT 0001000000010101 word: SLICED.K1.INIT 1010100000001000 word: SLICEB.K0.INIT 0000110100001000 word: SLICED.K0.INIT 1100110010001100 word: SLICEC.K1.INIT 1110000001000000 word: SLICEC.K0.INIT 0010001000110000 word: SLICEB.K1.INIT 1111000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R15C73:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 H01E0001 arc: H00L0100 H02E0301 arc: H00R0000 H02E0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V06S0203 arc: A0 H00L0000 arc: A2 E1_H01E0001 arc: A4 H02E0701 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H00R0000 arc: B4 H00R0000 arc: C0 F4 arc: C1 F4 arc: C2 H02E0401 arc: C4 Q4 arc: CE0 H02E0101 arc: CE1 V02S0201 arc: CE2 S1_V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 Q2 arc: D4 V00B0000 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H00L0000 F2 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0001 Q2 arc: S1_V02S0101 Q1 arc: V00B0000 Q6 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0201 F0 arc: W1_H02W0301 Q1 word: SLICEB.K0.INIT 0001000011010000 word: SLICEC.K0.INIT 0000000101000101 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C74:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 S3_V06N0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 S3_V06N0203 arc: S3_V06S0103 N1_V01S0100 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V02S0501 arc: W3_H06W0303 V06S0303 arc: B0 H02W0301 arc: C0 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: F0 F0_SLICE arc: H01W0000 F0 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0001 F0 arc: S3_V06S0003 Q0 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0000000000000011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R15C75:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V01N0101 arc: H00R0000 V02N0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H06E0003 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0100 V02N0501 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 V02S0701 arc: A1 E1_H02W0501 arc: A3 H02W0701 arc: A4 V00B0000 arc: B1 V02N0301 arc: B3 V02S0301 arc: B4 W1_H02E0301 arc: C1 V02S0401 arc: C3 V02S0401 arc: C4 E1_H02W0601 arc: CE1 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0000 F2 arc: H01W0000 F4 arc: LSR1 H02E0301 arc: M0 H02E0601 arc: M2 V00T0100 arc: M3 H00L0000 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0101 Q3 arc: N1_V02N0701 Q7 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111100010001000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111100010001000 word: SLICEC.K0.INIT 0001010100111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C76:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 S3_V06N0203 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02W0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0701 N1_V02S0701 arc: A1 H02W0501 arc: A3 V01N0101 arc: A4 N1_V02S0301 arc: A5 V02N0101 arc: A6 E1_H02W0701 arc: A7 W1_H02E0501 arc: B1 V01N0001 arc: B3 V02S0301 arc: B4 E1_H02W0301 arc: B5 N1_V02S0701 arc: B6 N1_V02S0701 arc: B7 N1_V02S0701 arc: C1 H02E0401 arc: C3 H02E0401 arc: C4 V00T0000 arc: C5 E1_H02W0601 arc: C6 V02N0001 arc: C7 V02N0001 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D3 S1_V02N0201 arc: D4 V02S0601 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 S1_V02N0401 arc: E1_H01E0101 F2 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 E1_H01E0101 arc: M5 V01S0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V02N0701 F5 arc: S1_V02S0601 F4 arc: S3_V06S0203 F4 arc: V00B0000 F6 arc: V00B0100 F7 arc: V01S0000 F0 word: SLICEC.K0.INIT 0010000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111100010001000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111100010001000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K1.INIT 0000011101110111 word: SLICED.K0.INIT 0000011101110111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C77:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0103 S3_V06N0103 arc: A1 H00R0000 arc: A2 E1_H02W0501 arc: A3 V00T0000 arc: A4 N1_V02S0101 arc: A5 V00T0100 arc: A7 V02S0301 arc: B1 E1_H01W0100 arc: B2 H00L0000 arc: B3 H00R0000 arc: B5 H02E0301 arc: B7 H02E0101 arc: C1 E1_H02W0401 arc: C2 V02N0401 arc: C3 E1_H02W0601 arc: C4 W1_H02E0601 arc: C5 V02S0201 arc: C7 V01N0101 arc: CE0 H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D2 V02N0201 arc: D3 W1_H02E0001 arc: D4 H02W0201 arc: D5 H02E0201 arc: D7 V00B0000 arc: E1_H01E0101 Q4 arc: E1_H02E0201 F0 arc: E1_H02E0701 F5 arc: E3_H06E0103 Q1 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 V01S0100 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 F2 arc: N1_V02N0301 F3 arc: S1_V02S0501 F5 arc: S3_V06S0303 F5 arc: V01S0100 F6 word: SLICEC.K1.INIT 0001000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1111100010001000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1110101011000000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 1010111110100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C78:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 E1_H01W0000 arc: A2 V00B0000 arc: A3 S1_V02N0701 arc: A4 V00T0100 arc: A5 V00T0000 arc: A7 H00R0000 arc: B0 E1_H02W0101 arc: B2 V02S0101 arc: B3 H02E0101 arc: B4 H01E0101 arc: B5 V02S0701 arc: B6 V02N0701 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F3 arc: V01S0100 Q2 arc: W1_H02W0701 F5 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C79:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 N1_V02S0201 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 H01E0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 H01E0001 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 W3_H06E0203 arc: A1 H00L0000 arc: A4 H02E0701 arc: A5 W1_H02E0501 arc: A7 H00R0000 arc: B0 N1_V02S0101 arc: B2 N1_V02S0301 arc: B3 V02S0301 arc: B6 N1_V02S0701 arc: CE1 E1_H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F7 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: LSR0 V00B0000 arc: M2 V00T0100 arc: M6 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F1 arc: N1_V02N0701 Q7 arc: S3_V06S0003 F0 arc: S3_V06S0303 F6 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C80:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02E0401 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H01E0101 arc: V00B0000 H02W0601 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: A3 V00T0000 arc: A5 H02E0501 arc: B0 E1_H02W0301 arc: B1 E1_H01W0100 arc: B2 E1_H02W0101 arc: B4 H00R0000 arc: B6 V00B0000 arc: B7 V02N0701 arc: E1_H01E0001 F4 arc: E1_H01E0101 F6 arc: E1_H02E0001 F0 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F7 arc: N1_V01N0101 F2 arc: V01S0000 F5 arc: V01S0100 F3 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R15C81:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H00R0100 V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 S1_V02N0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: A0 E1_H01E0001 arc: A5 S1_V02N0101 arc: A6 V02S0101 arc: A7 V02S0301 arc: B5 N1_V01S0000 arc: B6 V02S0701 arc: C5 H01E0001 arc: C7 V02S0201 arc: CE1 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D5 H02W0001 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 Q7 arc: E3_H06E0003 Q3 arc: F0 F0_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0100 Q6 arc: LSR0 V00B0000 arc: M3 H00R0000 arc: M4 H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: V01S0000 F0 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111100010001000 word: SLICED.K0.INIT 1010101011001100 word: SLICED.K1.INIT 1010101011110000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C82:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 H02E0001 arc: H00R0100 H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 S1_V02N0301 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0601 arc: A0 H02W0701 arc: A1 W1_H02E0501 arc: A2 H02W0701 arc: A3 H02W0701 arc: A5 V02S0101 arc: B2 V02S0301 arc: B3 H02E0301 arc: B5 H00L0000 arc: B6 N1_V02S0501 arc: C0 V02S0401 arc: C1 H00R0100 arc: C2 V02S0601 arc: C3 H02E0601 arc: C5 S1_V02N0001 arc: C6 W1_H02E0601 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 N1_V01S0000 arc: D5 W1_H02E0001 arc: D6 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H00R0000 F4 arc: H01W0000 Q2 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M4 V00T0100 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q0 arc: N1_V02N0501 Q5 arc: V01S0100 Q6 arc: W1_H02W0101 Q1 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q3 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1111100010001000 word: SLICED.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1111010110100000 word: SLICEB.K0.INIT 1101100011011000 word: SLICEA.K1.INIT 1111101000001010 word: SLICEB.K1.INIT 1101100011011000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C83:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 V01N0101 arc: H00L0000 V02N0001 arc: H00R0000 S1_V02N0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0601 W3_H06E0303 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02S0501 arc: A2 V00T0000 arc: A4 V00B0000 arc: A5 W1_H02E0701 arc: A6 H02W0701 arc: A7 H02E0701 arc: B2 H00R0000 arc: B3 V02N0101 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: E1_H02E0001 Q0 arc: E1_H02E0301 Q1 arc: E1_H02E0401 Q4 arc: E1_H02E0501 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02E0001 arc: M3 H02W0201 arc: M4 E1_H02W0401 arc: M5 H02W0001 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N3_V06N0303 F5 arc: S1_V02S0401 Q6 arc: S1_V02S0701 Q5 arc: S3_V06S0003 Q3 arc: V01S0000 Q4 arc: V01S0100 Q7 arc: W1_H02W0101 F3 arc: W1_H02W0301 Q1 arc: W1_H02W0401 F6 arc: W1_H02W0601 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICED.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001010 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C84:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 H01E0001 arc: H00L0100 H02E0101 arc: H00R0000 V02S0401 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V02S0701 arc: A3 V02N0701 arc: A4 H02E0701 arc: A5 V02N0301 arc: A6 H02W0501 arc: A7 S1_V02N0101 arc: B0 V00T0000 arc: B1 V01N0001 arc: B2 V02N0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F3 arc: LSR0 V00B0100 arc: M7 H00L0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: N1_V02N0401 F4 arc: S1_V02S0701 Q7 arc: V01S0000 Q7 arc: W1_H02W0301 F1 arc: W3_H06W0103 F2 word: SLICED.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEA.K0.INIT 1100110011000000 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C85:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H01W0000 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 W1_H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: A1 V01N0101 arc: A3 S1_V02N0501 arc: A6 H02W0701 arc: A7 S1_V02N0101 arc: B0 V01N0001 arc: B2 E1_H01W0100 arc: B4 V02N0701 arc: B5 E1_H02W0101 arc: E1_H01E0001 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F2 arc: N1_V02N0301 F3 arc: N1_V02N0501 F5 arc: N1_V02N0601 F6 arc: V01S0100 F1 word: SLICED.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEA.K0.INIT 1100110011000000 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R15C86:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0601 W3_H06E0303 arc: H00L0100 W1_H02E0101 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 W1_H02E0401 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 H02W0301 arc: V01S0100 S3_V06N0303 arc: W3_H06W0203 E1_H01W0000 arc: A0 H00R0000 arc: A4 H02E0501 arc: A5 Q5 arc: A7 Q7 arc: B6 V00B0000 arc: B7 H02E0101 arc: C4 Q4 arc: C5 W1_H02E0401 arc: C6 H02E0401 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D6 E1_H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F0 arc: H01W0100 F7 arc: LSR0 V00B0100 arc: LSR1 H02W0501 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: S1_V02S0501 Q5 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: W1_H02W0701 F5 word: SLICEB.K1.INIT 0000000000001110 word: SLICEB.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1010101011001100 word: SLICEC.K0.INIT 1111000010101010 word: SLICEC.K1.INIT 1010101011110000 word: SLICED.K0.INIT 1100110011110000 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R15C87:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 V02S0501 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0100 V02S0501 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 W3_H06E0203 arc: C3 H02W0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D3 H00R0000 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: H01W0000 Q0 arc: H01W0100 Q3 arc: LSR0 V00B0000 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: S1_V02S0001 Q0 arc: S3_V06S0003 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000111100000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R15C88:PLC2 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H02E0201 arc: S3_V06S0103 N3_V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 V02N0601 arc: C2 V02N0601 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: E1_H01E0101 Q2 arc: F2 F2_SLICE arc: LSR0 H02E0501 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 word: SLICEB.K0.INIT 0000111100000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R16C25:PLC2 arc: S1_V02S0001 H06W0003 .tile R16C27:PLC2 arc: S3_V06S0103 E3_H06W0103 .tile R16C28:PLC2 arc: N1_V02N0301 H02W0301 arc: S3_V06S0203 H06W0203 arc: W3_H06W0003 E3_H06W0003 .tile R16C29:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E3_H06W0203 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 N3_V06S0303 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 .tile R16C30:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0601 N3_V06S0303 arc: H00R0000 H02E0601 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06W0103 arc: V00B0000 E1_H02W0401 arc: V01S0100 N3_V06S0303 arc: A0 V02S0501 arc: A1 F7 arc: A2 V00B0000 arc: A7 V02S0301 arc: B0 H00R0100 arc: B2 H00R0000 arc: B7 H02W0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 H02E0401 arc: C7 E1_H02W0401 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 E1_H02W0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M0 H02W0601 arc: N1_V02N0001 F2 word: SLICED.K1.INIT 0000100001001100 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K0.INIT 1011000010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R16C31:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E3_H06E0003 H01E0001 arc: H00L0100 V02N0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02E0201 arc: W1_H02W0301 E1_H02W0201 arc: W3_H06W0203 E1_H02W0401 arc: A0 H00R0000 arc: A1 V02N0701 arc: A4 E1_H02W0701 arc: A5 V02S0301 arc: A7 H00R0000 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B3 V01N0001 arc: B4 V01S0000 arc: B5 V02S0701 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 V02N0601 arc: C3 E1_H01W0000 arc: C4 Q4 arc: C5 V02S0001 arc: C7 H02W0601 arc: CE0 W1_H02E0101 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H00R0000 arc: D3 H02W0001 arc: D4 E1_H02W0001 arc: D5 F0 arc: D7 H00R0100 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 V00T0000 arc: M0 V00T0100 arc: M1 H02E0001 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F7 arc: V00T0100 F3 arc: V01S0000 Q1 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 0000101000100010 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1111101101110011 word: SLICEC.K1.INIT 1110000001000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C32:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 W1_H02E0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H06W0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: A1 H02W0501 arc: A5 E1_H01W0000 arc: B1 H00R0100 arc: B5 V00B0100 arc: C1 E1_H01W0000 arc: C5 V02S0001 arc: CE1 V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D5 V02N0401 arc: E1_H02E0101 F1 arc: E1_H02E0501 F5 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H01W0000 Q6 arc: LSR0 V00B0000 arc: M2 V00T0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: W1_H02W0001 Q2 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q6 word: SLICEA.K1.INIT 1000100011000000 word: SLICEC.K1.INIT 1100000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C33:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 V06S0303 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 H02E0701 arc: A3 H02E0501 arc: A4 V02N0301 arc: A5 V02S0301 arc: A6 H02E0701 arc: A7 F5 arc: B0 H02E0101 arc: B2 V02S0301 arc: B3 V01N0001 arc: B4 V01S0000 arc: B5 V02S0501 arc: B6 V02N0701 arc: B7 H02W0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02S0601 arc: C3 F4 arc: C4 E1_H01E0101 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 H02E0401 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 Q2 arc: D3 V00B0100 arc: D4 H02E0001 arc: D5 V02S0601 arc: D6 H00R0100 arc: D7 F2 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: E1_H02E0001 F0 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M5 H02W0001 arc: M6 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: S1_V02S0501 Q7 arc: V00B0000 F6 arc: V00T0100 Q1 arc: V01S0000 Q6 arc: W1_H02W0501 Q5 word: SLICED.K0.INIT 0010001000110000 word: SLICEA.K0.INIT 1111101011001100 word: SLICEA.K1.INIT 1111101011111111 word: SLICEC.K0.INIT 0000000011011000 word: SLICEB.K1.INIT 1100110011001000 word: SLICEC.K1.INIT 0010001000001010 word: SLICEB.K0.INIT 0001000000010011 word: SLICED.K1.INIT 0000110000001101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C34:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W1_H02E0201 arc: H00L0000 S1_V02N0001 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H01E0001 arc: V00B0000 S1_V02N0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V01N0101 arc: W3_H06W0003 E3_H06W0003 arc: A0 H02W0701 arc: A1 V02N0501 arc: A2 F5 arc: A3 E1_H02W0701 arc: A4 F7 arc: A5 E1_H01W0000 arc: A6 H02E0701 arc: A7 E1_H02W0701 arc: B0 H01W0100 arc: B1 V02S0301 arc: B3 Q3 arc: B5 V01S0000 arc: B6 V00T0000 arc: B7 V01S0000 arc: C0 H02W0401 arc: C1 N1_V01N0001 arc: C2 E1_H02W0401 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C5 H02W0401 arc: C6 E1_H02W0601 arc: C7 H02E0601 arc: CE0 N1_V02S0201 arc: CE1 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00T0100 arc: D2 F0 arc: D3 V02S0201 arc: D4 V02N0401 arc: D5 V02N0601 arc: D6 H02E0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E1_H02E0701 Q7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M3 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: S1_V02S0601 F4 arc: V00T0000 F2 arc: V00T0100 Q3 arc: V01S0000 Q7 word: SLICEA.K0.INIT 1101000010000000 word: SLICEC.K1.INIT 0000110000001010 word: SLICEB.K0.INIT 0000000001010000 word: SLICED.K0.INIT 1010100011111101 word: SLICEA.K1.INIT 1100100001000000 word: SLICED.K1.INIT 0001000000010101 word: SLICEB.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 1111101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C35:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0701 H06W0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 V06S0303 arc: A0 V02S0501 arc: A1 W1_H02E0501 arc: A2 H01E0001 arc: A3 H02E0701 arc: A4 F5 arc: A5 V00B0000 arc: A6 E1_H02W0501 arc: B0 H02W0301 arc: B1 H00R0100 arc: B2 V02S0301 arc: B3 H01W0100 arc: B4 V02N0501 arc: B5 H02W0301 arc: B6 W1_H02E0301 arc: C0 N1_V02S0401 arc: C1 F4 arc: C2 H00L0100 arc: C3 V02N0601 arc: C4 N1_V02S0201 arc: C5 V02S0001 arc: C6 V00T0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 V02S0001 arc: D5 H02W0001 arc: D6 F2 arc: E3_H06E0103 F1 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 F3 arc: H01W0000 Q6 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0201 F0 word: SLICEA.K0.INIT 0000111000000100 word: SLICEB.K1.INIT 0000000010101100 word: SLICEB.K0.INIT 1100100011001100 word: SLICED.K0.INIT 1101000011000000 word: SLICEC.K1.INIT 0000111000000100 word: SLICEC.K0.INIT 0000000100000001 word: SLICEA.K1.INIT 1000110010001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C36:PLC2 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 W1_H02E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 arc: A0 V02S0701 arc: A1 E1_H01E0001 arc: A2 V02S0501 arc: A3 H02W0701 arc: A4 E1_H02W0701 arc: A5 E1_H01W0000 arc: A6 N1_V01N0101 arc: A7 H02W0701 arc: B0 H01W0100 arc: B2 V02S0301 arc: B3 H02E0101 arc: B4 H02W0301 arc: B5 E1_H02W0101 arc: B6 F3 arc: B7 V02S0501 arc: C0 N1_V01S0100 arc: C1 V02S0601 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 H02E0401 arc: C7 V02S0201 arc: CE0 H00L0000 arc: CE1 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 Q2 arc: D3 V01S0100 arc: D4 F0 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q6 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 Q6 arc: H01W0100 F2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: V01S0000 F7 arc: V01S0100 Q6 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q1 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0000000100100011 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 0010000001110000 word: SLICEC.K1.INIT 1100000010100000 word: SLICEB.K1.INIT 0000101100001000 word: SLICED.K0.INIT 0000000000010001 word: SLICED.K1.INIT 0000010000000111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C37:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 N1_V02S0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 W1_H02E0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 V02N0601 arc: A2 V00T0000 arc: A5 F7 arc: A7 Q7 arc: B2 H01W0100 arc: B7 H01E0101 arc: C2 V02N0601 arc: C5 V00B0100 arc: C7 V02S0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D5 F2 arc: D7 V02N0601 arc: E1_H01E0101 Q2 arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR1 H02W0301 arc: M1 H00L0100 arc: M2 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: V00T0000 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0501 F5 arc: W1_H02W0701 Q7 word: SLICEB.K0.INIT 1010110000000000 word: SLICED.K1.INIT 0000101000001100 word: SLICEC.K1.INIT 0000000000000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C38:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: H00R0100 H02E0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 E1_H01W0000 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 E1_H01W0000 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 N1_V02S0701 arc: A3 H02W0701 arc: A4 V02S0301 arc: B0 F3 arc: B2 E1_H01W0100 arc: B3 V02S0301 arc: B4 E1_H02W0301 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 H00R0100 arc: C3 H02E0601 arc: C4 H02E0601 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 E1_H01W0100 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: M0 H02W0601 arc: N1_V01N0101 F2 arc: V01S0000 F0 word: SLICEB.K0.INIT 0010000000101010 word: SLICEC.K0.INIT 0001000010110000 word: SLICEB.K1.INIT 0000000100001101 word: SLICEA.K0.INIT 1110111011100100 word: SLICEA.K1.INIT 1111111111110101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R16C39:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V06S0203 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00T0000 E1_H02W0201 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0501 arc: A1 E1_H02W0701 arc: A2 E1_H01E0001 arc: A3 H02W0701 arc: A4 N1_V01S0100 arc: A5 V02S0101 arc: B0 E1_H02W0101 arc: B2 V02S0301 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 V01S0000 arc: C0 F4 arc: C1 F4 arc: C2 H00L0000 arc: C3 W1_H02E0401 arc: C4 V02S0001 arc: C5 V02S0001 arc: CE1 N1_V02S0201 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 V02S0001 arc: D3 F0 arc: D4 V00B0000 arc: D5 V02S0601 arc: E1_H01E0001 Q6 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 V00T0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: V00B0100 F5 arc: V01S0000 Q5 arc: W1_H02W0001 Q2 word: SLICEC.K1.INIT 0000000001010011 word: SLICEB.K0.INIT 0100010000001100 word: SLICEC.K0.INIT 0000000000110101 word: SLICEA.K0.INIT 1110111011100010 word: SLICEA.K1.INIT 1111111111110101 word: SLICEB.K1.INIT 0000100000101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C3:PLC2 arc: W1_H02W0701 V06S0203 .tile R16C40:PLC2 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 N3_V06S0303 arc: V00B0100 V02S0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 V00T0000 arc: A4 H02E0701 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 H02E0301 arc: B4 H02E0301 arc: B6 V00T0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 E1_H02W0601 arc: C4 Q4 arc: C6 Q6 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V01S0100 arc: D4 H00L0100 arc: D6 V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0201 F0 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: V00B0000 F6 arc: V00T0000 Q2 arc: V01S0100 Q6 word: SLICED.K0.INIT 0011001100001111 word: SLICEA.K0.INIT 1110010011111111 word: SLICEA.K1.INIT 1110010000000000 word: SLICEB.K0.INIT 0001000000010011 word: SLICEC.K0.INIT 0000100001001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C41:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02W0401 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V06S0203 arc: A0 H01E0001 arc: A2 E1_H01E0001 arc: A3 V02S0501 arc: A4 H02W0501 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 W1_H02E0301 arc: B3 H01W0100 arc: B4 V02S0701 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H02W0601 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 H01E0101 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V02N0601 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F3 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F0 arc: V00T0100 Q1 word: SLICEB.K1.INIT 0101010000000100 word: SLICEC.K0.INIT 1010100010101010 word: SLICEB.K0.INIT 0000000100110001 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C42:PLC2 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0301 arc: H00R0100 H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: A0 E1_H01E0001 arc: A2 V02N0501 arc: A3 V02S0701 arc: A4 V00B0000 arc: A5 Q5 arc: B0 V02S0301 arc: B2 F3 arc: B3 H01W0100 arc: B4 N1_V01S0000 arc: B5 E1_H02W0301 arc: C0 V02N0601 arc: C2 V02S0601 arc: C3 E1_H02W0601 arc: C4 H02E0601 arc: C5 H02W0401 arc: CE0 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 H00R0000 arc: D3 W1_H02E0201 arc: D4 E1_H01W0100 arc: D5 H01W0000 arc: E1_H01E0001 Q5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 F4 arc: H01W0000 Q0 arc: H01W0100 F5 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F2 word: SLICEC.K1.INIT 0011001000000010 word: SLICEB.K1.INIT 1111111000001110 word: SLICEC.K0.INIT 1010101010101000 word: SLICEB.K0.INIT 1010101000001000 word: SLICEA.K0.INIT 0000000100110001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C43:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 N1_V02S0201 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 H02W0501 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 V01N0101 arc: A0 V02N0701 arc: A1 V01N0101 arc: A2 V02N0501 arc: A4 E1_H02W0701 arc: A5 N1_V01S0100 arc: A6 E1_H02W0701 arc: A7 E1_H02W0701 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 H02W0301 arc: B4 V02S0501 arc: B5 V02S0501 arc: B6 N1_V01S0000 arc: B7 V01S0000 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 V02N0401 arc: C4 V00T0000 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE1 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 Q2 arc: D4 V02S0401 arc: D5 V02N0401 arc: D6 N1_V02S0401 arc: D7 H01W0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F2 arc: LSR0 H02E0501 arc: M0 V00B0100 arc: M2 V00B0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: V00B0100 F5 arc: V01S0000 Q7 arc: V01S0100 Q7 word: SLICEB.K0.INIT 1100100000001000 word: SLICEC.K0.INIT 0000000100001011 word: SLICED.K0.INIT 0001000010110000 word: SLICEC.K1.INIT 0101010100110011 word: SLICEA.K0.INIT 1101111110001111 word: SLICEA.K1.INIT 1101000010000000 word: SLICED.K1.INIT 0001000010110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C44:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 N1_V01S0100 arc: H00R0100 H02E0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 V02S0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E1_H01W0000 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 V02S0701 arc: A3 H02W0701 arc: A4 N1_V01S0100 arc: A5 H02W0501 arc: A6 V02S0301 arc: A7 H02W0701 arc: B0 V00B0000 arc: B2 H00R0100 arc: B3 H02W0301 arc: B4 N1_V01S0000 arc: B5 V02N0501 arc: B6 H02E0301 arc: B7 V02S0701 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 N1_V01S0100 arc: C3 V02S0401 arc: C4 H02E0401 arc: C5 F4 arc: C6 H02W0401 arc: C7 N1_V02S0201 arc: D0 V01S0100 arc: D1 V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V01S0000 arc: D4 V02S0601 arc: D5 F2 arc: D6 S1_V02N0601 arc: D7 H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: V00T0100 F3 arc: V01S0100 F7 word: SLICED.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000010010001100 word: SLICED.K1.INIT 0000000000011011 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K0.INIT 0000111000000010 word: SLICEC.K0.INIT 1000101010000000 word: SLICEC.K1.INIT 1010101010100010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C45:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02E0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A2 F5 arc: A3 V02N0701 arc: A4 N1_V01S0100 arc: A5 H02E0501 arc: A6 N1_V01S0100 arc: A7 V02N0101 arc: B0 H02W0101 arc: B2 H02E0301 arc: B3 Q3 arc: B4 H02E0101 arc: B5 V01S0000 arc: B6 E1_H02W0101 arc: B7 V01S0000 arc: C0 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 V02S0401 arc: C4 V00T0000 arc: C5 V00B0100 arc: C6 V01N0101 arc: C7 V00B0100 arc: CE1 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 F2 arc: D5 V02N0401 arc: D6 S1_V02N0601 arc: D7 E1_H02W0201 arc: E1_H01E0101 F6 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0000 arc: M3 H00L0100 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 F3 arc: N1_V02N0501 F7 arc: V00B0100 Q7 arc: V00T0000 F0 arc: V01S0000 Q3 arc: V01S0100 Q7 word: SLICED.K1.INIT 0100010001010000 word: SLICED.K0.INIT 0101010101010001 word: SLICEC.K1.INIT 0100010001010000 word: SLICEA.K0.INIT 1010101010101000 word: SLICEB.K0.INIT 1100111111001010 word: SLICEC.K0.INIT 1100010011000000 word: SLICEB.K1.INIT 0000000000110101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C46:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 S1_V02N0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: V00B0100 W1_H02E0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 N1_V02S0401 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0501 arc: A1 F5 arc: A3 V02N0701 arc: A5 H02W0701 arc: B1 F3 arc: B3 V02N0101 arc: B5 V02N0501 arc: C0 E1_H02W0601 arc: C1 H02W0601 arc: C3 V02N0401 arc: C5 V01N0101 arc: D0 S1_V02N0201 arc: D1 H01E0101 arc: D3 V00B0100 arc: D5 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE word: SLICEA.K0.INIT 0000111100000101 word: SLICEC.K1.INIT 0101000001000100 word: SLICEB.K1.INIT 1100101000000000 word: SLICEA.K1.INIT 1111111000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R16C47:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 V02N0601 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0101 arc: V00B0000 V02N0001 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: A1 S1_V02N0501 arc: A3 H02E0701 arc: A4 V00T0100 arc: A5 H02E0501 arc: A6 H02W0701 arc: B1 V00B0000 arc: B3 H02W0101 arc: B4 H01E0101 arc: B5 H02W0301 arc: B6 V02S0701 arc: C1 W1_H02E0401 arc: C3 F4 arc: C4 V01N0101 arc: C5 H02W0401 arc: C6 V02S0001 arc: D1 H02W0201 arc: D3 V01S0100 arc: D4 V01N0001 arc: D5 S1_V02N0601 arc: D6 H02W0001 arc: E1_H01E0101 F6 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: M0 V00B0100 arc: M2 W1_H02E0601 arc: N1_V01N0101 F2 arc: V00B0100 F5 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 1000100010101000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000100111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R16C48:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 S1_V02N0301 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V06S0203 arc: A0 F5 arc: A1 V02S0501 arc: A2 V02S0701 arc: A3 V02N0701 arc: A5 V00B0000 arc: A6 H00R0000 arc: B0 E1_H02W0301 arc: B1 H02W0301 arc: B2 V02S0301 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 H02W0301 arc: B7 H01E0101 arc: C0 H02W0601 arc: C1 N1_V01S0100 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 E1_H01E0101 arc: C5 V02S0001 arc: C6 Q6 arc: C7 H02W0601 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 V00B0100 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 V02N0401 arc: D5 H02W0201 arc: D6 H00L0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q6 arc: E1_H02E0101 F1 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 H02E0301 arc: LSR1 H02W0501 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V02N0001 F0 arc: N1_V02N0101 F3 arc: V00B0000 Q6 word: SLICED.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 0000000010111000 word: SLICEB.K1.INIT 1111101001010000 word: SLICEC.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000011000000 word: SLICEB.K0.INIT 0000000100100011 word: SLICEC.K1.INIT 0101000000110000 word: SLICEA.K0.INIT 1100000011000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C49:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 S1_V02N0001 arc: H00R0000 N1_V02S0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0003 V06S0003 arc: W3_H06W0303 E1_H01W0100 arc: A0 F7 arc: A1 F7 arc: A2 V02S0701 arc: A3 V00T0000 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A7 Q7 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 E1_H02W0301 arc: B3 Q3 arc: B4 V02N0701 arc: B5 V02N0701 arc: B7 V00B0100 arc: C0 H00L0100 arc: C2 H00R0100 arc: C3 H00L0000 arc: C4 W1_H02E0601 arc: C5 W1_H02E0601 arc: C7 S1_V02N0001 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 E1_H02W0201 arc: D3 V02S0001 arc: D4 H00R0100 arc: D5 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0100 Q7 arc: H01W0000 Q3 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M0 H01E0001 arc: M3 H02W0201 arc: M4 H02E0401 arc: M5 E1_H02W0001 arc: M7 E1_H01W0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q5 arc: V00B0100 Q5 word: SLICEB.K1.INIT 0000101000001100 word: SLICED.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 1110111011110000 word: SLICEA.K1.INIT 1110111011111111 word: SLICEC.K0.INIT 1110000000100000 word: SLICEC.K1.INIT 1110111100101111 word: SLICEB.K0.INIT 0000110001000100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C50:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 V02S0001 arc: H00R0100 V02S0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V06S0003 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 N3_V06S0103 arc: A0 H00L0100 arc: A1 H02W0701 arc: A2 S1_V02N0501 arc: A3 H00L0100 arc: A4 F7 arc: A5 Q5 arc: A6 H02E0501 arc: A7 N1_V01S0100 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H02E0101 arc: B4 V02S0501 arc: B5 H02W0301 arc: B6 V02N0501 arc: B7 N1_V01S0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H02W0601 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C5 E1_H01E0101 arc: C6 H01E0001 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V00T0100 arc: D3 V02S0201 arc: D4 F0 arc: D5 H02W0201 arc: D6 V00B0000 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q1 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 F2 arc: H01W0100 Q7 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M1 V01S0100 arc: M5 V01S0000 arc: M6 H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F5 arc: N1_V02N0101 F3 arc: V00B0000 F4 arc: V01S0000 F2 arc: V01S0100 F2 arc: W1_H02W0001 Q2 arc: W1_H02W0201 F2 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICED.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 1110111111100000 word: SLICED.K0.INIT 0011100101101100 word: SLICEB.K0.INIT 1100000011101010 word: SLICEB.K1.INIT 1011100000000000 word: SLICEC.K1.INIT 0000110001000100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C51:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 V02S0301 arc: V00T0100 H02W0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A2 V00T0000 arc: B0 V02S0101 arc: B1 V02N0301 arc: C0 V02N0401 arc: C1 H00L0100 arc: C2 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V01S0100 arc: D2 V02N0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q5 arc: E1_H02E0001 Q2 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0100 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0301 arc: M2 V00B0100 arc: M4 E1_H01E0101 arc: M5 H02E0001 arc: M6 V00B0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: V00T0000 Q2 arc: V01S0000 Q6 arc: V01S0100 Q7 arc: W1_H02W0401 Q4 word: SLICEB.K0.INIT 0000111101010101 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100111111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R16C52:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 H02E0101 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 W1_H02E0301 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0501 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A2 V00B0000 arc: A7 V02N0101 arc: B7 V02S0501 arc: C2 H02E0601 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D7 N1_V02S0401 arc: E1_H02E0201 Q0 arc: E1_H02E0401 Q6 arc: E1_H02E0701 Q7 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q4 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M1 H00L0100 arc: M4 E1_H01E0101 arc: M5 E1_H02W0001 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V02N0501 Q5 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111101001010000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R16C53:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02N0401 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W3_H06W0003 V06S0003 arc: A0 F7 arc: A2 S1_V02N0501 arc: A3 V02S0501 arc: A4 V00T0000 arc: A5 V02S0101 arc: A7 V02N0301 arc: B1 H02E0101 arc: B2 V02N0101 arc: B3 Q3 arc: B4 V02N0701 arc: B7 H02W0301 arc: C0 E1_H01W0000 arc: C1 N1_V01S0100 arc: C2 V02S0401 arc: C4 V00T0100 arc: C5 F4 arc: C7 W1_H02E0401 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 W1_H02E0201 arc: D2 V01S0100 arc: D3 H02E0001 arc: D4 H00L0100 arc: D5 V01N0001 arc: D7 V00B0000 arc: E1_H01E0101 Q3 arc: E1_H02E0201 Q0 arc: E1_H02E0501 F5 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q5 arc: E3_H06E0003 F3 arc: E3_H06E0103 F1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: LSR1 E1_H02W0301 arc: M3 H02E0201 arc: M4 H02E0401 arc: M5 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S3_V06S0303 Q5 word: SLICEB.K1.INIT 0101010100110011 word: SLICEA.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 0010011100000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 0101111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R16C54:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 H01E0101 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 H02W0201 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02N0101 arc: V00T0100 V02N0501 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: A0 H02E0501 arc: A1 H02E0501 arc: A3 F5 arc: A4 H02W0701 arc: A5 V02S0301 arc: A7 N1_V02S0101 arc: B0 V02N0301 arc: B1 V02N0301 arc: B3 H00L0000 arc: B4 V02S0501 arc: B5 V01S0000 arc: B7 E1_H02W0101 arc: C0 V02N0601 arc: C1 V02N0601 arc: C3 N1_V02S0401 arc: C4 V00T0100 arc: C5 H02E0401 arc: C7 N1_V02S0201 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D3 N1_V01S0000 arc: D4 H02W0001 arc: D7 H00L0100 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F4 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H02E0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0001 F0 arc: V01S0000 F7 word: SLICED.K1.INIT 0010001100100000 word: SLICEC.K1.INIT 0000000100000001 word: SLICEB.K1.INIT 1100010011000000 word: SLICEA.K0.INIT 1111000011100000 word: SLICEA.K1.INIT 0000000011100000 word: SLICEC.K0.INIT 0000000001010001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C55:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0601 arc: N1_V02N0201 H06E0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 V06S0103 arc: W3_H06W0303 N1_V01S0100 arc: A4 E1_H01W0000 arc: A5 V02N0301 arc: B4 N1_V02S0701 arc: B5 H02E0101 arc: C4 V02N0201 arc: C5 V02N0201 arc: D4 V02N0401 arc: D5 E1_H01W0100 arc: E1_H01E0101 F4 arc: E1_H02E0401 F4 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 word: SLICEC.K0.INIT 1100101000110101 word: SLICEC.K1.INIT 1001101010010101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R16C56:PLC2 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0103 N3_V06S0103 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02S0101 arc: W3_H06W0303 V01N0101 arc: A0 V02N0501 arc: A5 H02E0701 arc: B0 W1_H02E0301 arc: B5 H00L0000 arc: B7 H02E0301 arc: C0 H02E0601 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D5 V02N0401 arc: D7 H02E0201 arc: E1_H02E0701 F5 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q3 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0701 Q7 arc: W1_H02W0401 Q4 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 word: SLICED.K1.INIT 0011000000111111 word: SLICEC.K1.INIT 0011001101010101 word: SLICEA.K0.INIT 1111111111101111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C57:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02N0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 V02S0101 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 S1_V02N0101 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H02W0301 arc: B3 H02W0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 H02E0601 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 F0 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F2 arc: E1_H02E0101 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 F2 arc: H01W0100 Q1 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V01S0000 F4 arc: V01S0100 F2 word: SLICEA.K0.INIT 1100110000110110 word: SLICEA.K1.INIT 0011001100110110 word: SLICEC.K0.INIT 0000000010100000 word: SLICEB.K0.INIT 1110000100101101 word: SLICEB.K1.INIT 0001111011010010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C58:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 S3_V06N0303 arc: H00R0000 H02E0601 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 H02E0501 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A1 W1_H02E0501 arc: A2 V00B0000 arc: B1 S1_V02N0101 arc: B4 V02N0501 arc: B5 H01E0101 arc: C1 H02W0401 arc: C2 H02E0401 arc: C4 H01E0001 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 H02E0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: E1_H02E0701 Q5 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q4 arc: LSR0 V00T0100 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q4 arc: N3_V06N0303 Q5 arc: S1_V02S0701 Q5 arc: V00B0000 Q6 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1001011001101001 word: SLICEC.K0.INIT 0011110011111111 word: SLICEB.K0.INIT 1010010111111111 word: SLICEC.K1.INIT 1100110011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C59:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 V01N0001 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: A1 V02N0701 arc: A3 V02S0701 arc: B1 H02E0101 arc: B3 W1_H02E0301 arc: C1 N1_V01N0001 arc: C3 S1_V02N0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D3 H01E0101 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H01W0000 Q2 arc: H01W0100 Q7 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 H02W0601 arc: M5 H02E0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: N1_V02N0301 Q1 arc: S3_V06S0003 F0 arc: S3_V06S0103 Q2 arc: W1_H02W0701 Q5 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1101000100101110 word: SLICEB.K1.INIT 0001000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C60:PLC2 arc: E1_H02E0501 V02N0501 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00T0100 V02S0701 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0601 V02N0601 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 N1_V02S0501 arc: A3 N1_V02S0501 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H02E0101 arc: B3 Q3 arc: C0 H00L0000 arc: C1 E1_H02W0401 arc: C2 V02N0401 arc: C3 H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0001 arc: D3 H02E0001 arc: E1_H01E0001 F0 arc: E1_H02E0001 F2 arc: E1_H02E0101 F3 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00R0100 Q5 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 V01S0100 arc: M2 N1_V01N0001 arc: M3 H00R0100 arc: M4 W1_H02E0401 arc: M5 E1_H02W0001 arc: M6 H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q7 word: SLICEB.K1.INIT 1000000010001010 word: SLICEA.K1.INIT 1000100000001010 word: SLICEA.K0.INIT 1000100000001010 word: SLICEB.K0.INIT 1010000000100010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R16C61:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06W0303 arc: V00B0000 W1_H02E0401 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: A0 V02N0501 arc: A2 V02N0501 arc: A6 H00L0000 arc: B0 V01N0001 arc: B2 H01W0100 arc: C0 N1_V01N0001 arc: C2 S1_V02N0601 arc: C6 N1_V02S0201 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 H00R0000 arc: D6 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H01W0100 Q5 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M2 V00T0000 arc: M5 H00R0100 arc: M7 W1_H02E0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 word: SLICED.K0.INIT 0101000001011111 word: SLICEA.K0.INIT 1000100010100000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1010000010001000 word: SLICEB.K1.INIT 1111111111111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C62:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0501 arc: A4 V00B0000 arc: A6 E1_H01W0000 arc: B0 V02S0101 arc: B4 V02S0701 arc: B6 V00T0000 arc: C0 V02S0401 arc: C4 V02N0201 arc: C6 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D4 V02N0601 arc: D6 H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M3 E1_H02W0201 arc: M4 E1_H01E0101 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q3 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1111111111111111 word: SLICED.K0.INIT 1000101100000000 word: SLICEC.K1.INIT 1111111111111111 word: SLICEC.K0.INIT 1110001000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C63:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0401 H01E0001 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0401 E3_H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A2 N1_V02S0501 arc: A5 V00B0000 arc: B0 V02N0101 arc: B2 H02E0101 arc: B5 H00R0000 arc: C0 H02E0401 arc: C2 H02E0401 arc: C5 W1_H02E0401 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V01S0100 arc: D5 N1_V02S0601 arc: E1_H01E0001 Q7 arc: E1_H02E0201 F2 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 Q3 arc: H01W0100 Q1 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 H01W0100 arc: M4 H02W0401 arc: M5 E1_H02W0001 arc: M6 E1_H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: V00B0100 F5 arc: V01S0100 Q6 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 1000101010000000 word: SLICEB.K1.INIT 1111111111111111 word: SLICEC.K1.INIT 1000101000000010 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C64:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 V01N0001 arc: H00R0100 V02N0701 arc: S1_V02S0701 N1_V01S0100 arc: V00B0100 V02S0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M4 H02E0401 arc: M7 W1_H02E0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: V01S0000 Q7 arc: V01S0100 Q4 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C65:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 E1_H01W0100 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: N1_V02N0401 N1_V01S0000 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H06W0003 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0203 V01N0001 arc: A0 H02W0501 arc: A3 F7 arc: A7 V02S0101 arc: B0 V02N0101 arc: B3 V02S0301 arc: C0 V02S0601 arc: C3 H02W0401 arc: C7 N1_V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D3 V02S0001 arc: D7 V00B0000 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q1 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M4 V00B0100 arc: M5 H02E0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V02N0001 Q2 arc: V00T0100 F3 arc: V01S0000 Q7 arc: V01S0100 Q5 arc: W3_H06W0103 Q1 arc: W3_H06W0303 Q5 word: SLICED.K1.INIT 0101000001011111 word: SLICEB.K1.INIT 1100000001010000 word: SLICEA.K0.INIT 1000100010100000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R16C66:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 N1_V02S0501 arc: B0 S1_V02N0301 arc: C0 H00R0100 arc: CE1 H02W0101 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: E1_H01E0001 F0 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: H00R0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M3 H02E0201 arc: M5 H00L0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0601 Q6 word: SLICEA.K0.INIT 1000100010100000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C67:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 H01E0001 arc: H00L0000 V02S0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0101 V06S0103 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V02N0601 arc: A0 N1_V02S0701 arc: A2 H00L0100 arc: A3 V00B0000 arc: A4 E1_H02W0701 arc: A7 V02S0301 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 E1_H02W0301 arc: B3 H02W0101 arc: B4 V01S0000 arc: B7 V01S0000 arc: C0 F4 arc: C1 F4 arc: C2 E1_H02W0401 arc: C3 V02N0401 arc: C4 Q4 arc: C7 S1_V02N0201 arc: CE0 V02S0201 arc: CE1 H00L0000 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D3 N1_V02S0201 arc: D4 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F7 arc: E1_H02E0201 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: V00B0000 Q4 arc: V01S0000 Q7 arc: V01S0100 Q1 word: SLICEC.K0.INIT 0000000000011011 word: SLICEB.K0.INIT 0000010011000100 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K1.INIT 0000111000000100 word: SLICEB.K1.INIT 0010001000110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C68:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0601 S3_V06N0303 arc: V00B0100 H02E0701 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06N0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H00L0100 arc: A3 H02E0501 arc: A4 E1_H02W0701 arc: A5 Q5 arc: A6 V02N0101 arc: A7 H00L0000 arc: B0 E1_H01W0100 arc: B2 H02E0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 H02W0301 arc: B6 H02E0301 arc: B7 V00T0000 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H01E0101 arc: C5 H02W0401 arc: C6 V02N0201 arc: C7 H02E0601 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02W0001 arc: D2 V01S0100 arc: D3 H02E0001 arc: D4 H01W0000 arc: D5 H01W0000 arc: D6 H02E0201 arc: D7 V02S0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q3 arc: H01W0100 Q5 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M5 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F2 arc: V00B0000 F6 arc: V00T0000 F0 arc: V01S0100 Q5 arc: W1_H02W0501 F5 arc: W3_H06W0203 F7 word: SLICEC.K1.INIT 0100000001001100 word: SLICED.K0.INIT 1110000000100000 word: SLICEA.K0.INIT 1110111111100000 word: SLICEA.K1.INIT 1111111110101111 word: SLICEB.K0.INIT 1110000000100000 word: SLICEB.K1.INIT 1010111111001111 word: SLICED.K1.INIT 0101011010100110 word: SLICEC.K0.INIT 1100010010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C69:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 V02S0001 arc: H00L0100 V02N0301 arc: H00R0100 V02N0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 W1_H02E0701 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02W0701 arc: A2 V00T0000 arc: A3 F7 arc: A5 Q5 arc: A6 H02W0701 arc: A7 V02N0101 arc: B0 H02E0101 arc: B2 W1_H02E0101 arc: B3 E1_H02W0101 arc: B5 W1_H02E0301 arc: B6 H02E0101 arc: B7 H02E0101 arc: C0 V02S0601 arc: C2 N1_V01S0100 arc: C3 H02E0401 arc: C5 V00T0100 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 W1_H02E0001 arc: D3 F0 arc: D5 V02S0601 arc: D6 V02S0401 arc: D7 W1_H02E0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 H02E0601 arc: M5 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F3 arc: V00B0000 F6 arc: V00T0000 Q2 arc: V01S0000 Q5 arc: V01S0100 Q5 arc: W1_H02W0001 F2 arc: W1_H02W0501 F5 word: SLICEC.K1.INIT 1011000010000000 word: SLICEB.K0.INIT 0010001000110000 word: SLICED.K0.INIT 0011000100100000 word: SLICEA.K0.INIT 0011011110111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K1.INIT 1100100000001000 word: SLICEB.K1.INIT 0011001011111110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C70:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02E0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 V01N0101 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 N1_V02S0701 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: B0 V02S0101 arc: B1 V02S0301 arc: B2 V02S0101 arc: B3 V02S0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 E1_H02W0001 arc: D2 N1_V01S0000 arc: D3 E1_H02W0001 arc: E1_H01E0001 Q4 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 H00L0100 arc: M2 H02W0601 arc: M4 V00B0100 arc: M7 W1_H02E0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: W3_H06W0103 F1 word: SLICEA.K0.INIT 0101010101100101 word: SLICEA.K1.INIT 0101010101100101 word: SLICEB.K0.INIT 0101101001101010 word: SLICEB.K1.INIT 0101010101100101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C71:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 H01E0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 N1_V02S0401 arc: A0 V02S0501 arc: A2 E1_H01E0001 arc: A3 H02W0701 arc: A5 E1_H01W0000 arc: A6 H02E0701 arc: A7 Q7 arc: B0 V00T0000 arc: B3 S1_V02N0101 arc: B5 S1_V02N0501 arc: B6 V00B0000 arc: B7 W1_H02E0301 arc: C0 N1_V02S0401 arc: C2 W1_H02E0601 arc: C3 V02S0401 arc: C4 H02W0601 arc: C5 H02W0601 arc: C6 E1_H01E0101 arc: C7 W1_H02E0401 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 Q2 arc: D3 F0 arc: D4 E1_H01W0100 arc: D5 S1_V02N0601 arc: D6 V02S0601 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F2 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F4 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 V00B0100 arc: M4 H02W0401 arc: M5 H02E0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V02N0501 F7 arc: V00T0000 Q2 arc: V01S0000 F7 arc: V01S0100 Q7 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0110000010100000 word: SLICED.K1.INIT 0001000000010011 word: SLICEA.K0.INIT 0101010000000100 word: SLICEB.K1.INIT 1010101010101000 word: SLICEB.K0.INIT 1010111110100000 word: SLICED.K0.INIT 0011001000010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C72:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H01W0100 arc: A0 F5 arc: A3 V02S0701 arc: A4 V02S0301 arc: A6 F5 arc: B1 F3 arc: B3 V02S0101 arc: B4 V02S0701 arc: C1 F4 arc: C2 E1_H02W0601 arc: C3 H02W0401 arc: C4 V00T0100 arc: C5 V00T0000 arc: C6 V02S0201 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00B0100 arc: D2 Q2 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 H02W0201 arc: D6 V02N0401 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q3 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR1 E1_H02W0501 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q2 arc: N1_V02N0001 Q0 arc: S1_V02S0701 F5 arc: V01S0000 Q3 arc: V01S0100 F6 arc: W1_H02W0301 F1 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000000010101010 word: SLICED.K0.INIT 0000101000000000 word: SLICEB.K1.INIT 1101100000000000 word: SLICEC.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 1111110000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R16C73:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W1_H02E0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 H02E0401 arc: V00B0100 N1_V02S0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 W3_H06E0203 arc: A0 H02W0701 arc: A1 F5 arc: A3 F7 arc: A4 N1_V01S0100 arc: A5 V02S0101 arc: A7 V02S0301 arc: B0 V02N0301 arc: B1 V00B0000 arc: B3 V01N0001 arc: B4 N1_V01S0000 arc: B5 N1_V02S0701 arc: B6 E1_H02W0101 arc: C0 H02E0401 arc: C1 H02E0601 arc: C3 V02N0401 arc: C4 W1_H02E0401 arc: C5 V02S0001 arc: C6 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V00B0100 arc: D3 V02S0201 arc: D4 N1_V02S0401 arc: D5 H00R0100 arc: D6 E1_H01W0100 arc: D7 H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F1 arc: LSR0 H02W0301 arc: M2 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0201 Q0 arc: S1_V02S0701 F7 arc: V00B0000 F4 word: SLICED.K0.INIT 0011001111110011 word: SLICED.K1.INIT 1010101000000000 word: SLICEA.K0.INIT 1111111111111110 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000111000000010 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1110001000000000 word: SLICEA.K1.INIT 0000111000001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R16C74:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 N1_V02S0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V02N0601 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A2 V00T0000 arc: B0 E1_H01W0100 arc: B2 E1_H01W0100 arc: C0 H00L0100 arc: C2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 H00R0000 arc: E1_H01E0001 Q5 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H00R0100 Q5 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: S1_V02S0201 Q2 arc: S3_V06S0103 Q2 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0011000100110000 word: SLICEB.K0.INIT 0011000000110010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R16C75:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0401 N1_V02S0401 arc: A0 H01E0001 arc: A1 N1_V02S0701 arc: A2 H01E0001 arc: A7 E1_H01W0000 arc: B0 V02N0101 arc: B4 W1_H02E0301 arc: B5 W1_H02E0301 arc: B6 W1_H02E0301 arc: B7 V00B0000 arc: C0 E1_H02W0401 arc: C2 N1_V02S0401 arc: C3 H00L0000 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D2 V02N0201 arc: D3 V00B0100 arc: D4 H02E0201 arc: D5 H02E0201 arc: D6 H02E0201 arc: D7 V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: E1_H02E0301 F1 arc: E1_H02E0501 F5 arc: E3_H06E0103 F2 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F1 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F1 arc: N1_V02N0201 F2 arc: N1_V02N0501 F7 arc: S1_V02S0101 F1 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: V01S0000 F1 arc: V01S0100 F3 arc: W1_H02W0101 F3 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICED.K1.INIT 0001001101011111 word: SLICEB.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000000100000001 word: SLICEB.K0.INIT 0000000010101111 word: SLICEC.K1.INIT 0011000000000000 word: SLICED.K0.INIT 0000110000000000 word: SLICEC.K0.INIT 0000001100000000 word: SLICEA.K1.INIT 1111111110101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R16C76:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 S1_V02N0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0701 W1_H02E0701 arc: V00T0000 V02N0601 arc: V00T0100 E1_H02W0101 arc: W1_H02W0601 H01E0001 arc: A2 S1_V02N0701 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 V02N0301 arc: A6 W1_H02E0501 arc: A7 Q7 arc: B0 H02W0101 arc: B2 V02N0101 arc: B3 S1_V02N0101 arc: B4 H02E0101 arc: B5 V00B0100 arc: B6 V01S0000 arc: B7 V02N0501 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F4 arc: H01W0100 F2 arc: LSR1 H02E0301 arc: M2 H02W0601 arc: M3 H02E0201 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: N1_V02N0301 F3 arc: V00B0000 Q4 arc: V00B0100 Q5 arc: V01S0000 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C77:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0301 H01E0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02W0101 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 W1_H02E0701 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B3 Q3 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0100 Q0 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 H02W0201 arc: M4 V00T0100 arc: M5 E1_H02W0001 arc: M6 E1_H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 F5 arc: N1_V02N0001 F2 arc: S1_V02S0101 F1 arc: S3_V06S0003 F0 arc: S3_V06S0203 F7 arc: V00B0000 Q4 arc: V01S0000 F6 arc: V01S0100 F3 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 1010101010101010 word: SLICEB.K1.INIT 1100110011001100 word: SLICEC.K0.INIT 1010101010101010 word: SLICEC.K1.INIT 1010101010101010 word: SLICED.K0.INIT 1010101010101010 word: SLICED.K1.INIT 1010101010101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C78:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0001 arc: H00L0100 E1_H02W0101 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H02E0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0701 V01N0101 arc: A0 H00R0000 arc: A4 V00T0000 arc: A7 Q7 arc: B1 V02S0301 arc: B2 H01W0100 arc: B3 Q3 arc: B5 V01S0000 arc: B6 S1_V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0101 F3 arc: E1_H02E0201 F2 arc: E1_H02E0501 F5 arc: E1_H02E0601 F6 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q1 arc: H01W0100 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 H02W0601 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: M5 H02E0001 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: V00T0000 Q0 arc: V01S0000 Q6 word: SLICEA.K0.INIT 1010101010101010 word: SLICEA.K1.INIT 1100110011001100 word: SLICEB.K0.INIT 1100110011001100 word: SLICEB.K1.INIT 1100110011001100 word: SLICEC.K0.INIT 1010101010101010 word: SLICEC.K1.INIT 1100110011001100 word: SLICED.K0.INIT 1100110011001100 word: SLICED.K1.INIT 1010101010101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C79:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 H01E0101 arc: H00L0000 V02S0201 arc: H00L0100 H02E0301 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 S1_V02N0701 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02E0101 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 V01N0101 arc: A5 V00T0100 arc: A7 V02N0101 arc: B0 V00T0000 arc: B5 E1_H02W0301 arc: B7 V02N0701 arc: C5 V02N0201 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 S1_V02N0401 arc: D7 E1_H02W0001 arc: E1_H02E0001 F0 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q3 arc: E1_H02E0701 F5 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q3 arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H00L0100 arc: M5 H00L0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: N1_V02N0601 F6 arc: S3_V06S0103 Q1 arc: V01S0000 Q2 arc: V01S0100 Q1 word: SLICEA.K0.INIT 1100110011001100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1110110010100000 word: SLICEC.K1.INIT 0001010100111111 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C80:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 H01E0001 arc: H00L0000 S1_V02N0201 arc: H00L0100 E1_H02W0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06W0203 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 W3_H06E0203 arc: A1 W1_H02E0701 arc: A2 N1_V02S0501 arc: A3 V01N0101 arc: A4 V02N0301 arc: A5 H02E0501 arc: A6 H00L0000 arc: A7 H00L0000 arc: B1 S1_V02N0101 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 V02N0701 arc: B5 H02W0301 arc: B6 H02W0301 arc: B7 H02W0301 arc: C1 E1_H02W0401 arc: C2 V02N0601 arc: C3 E1_H02W0401 arc: C4 V00T0100 arc: C5 E1_H02W0401 arc: C6 V02N0001 arc: C7 W1_H02E0601 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0001 arc: D2 V02N0201 arc: D3 V00B0100 arc: D4 N1_V02S0401 arc: D5 S1_V02N0601 arc: D6 W1_H02E0001 arc: D7 V01N0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0001 F0 arc: E1_H02E0301 F3 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 H02W0501 arc: M0 V00B0000 arc: M4 V00T0000 arc: M5 H00L0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: V00B0000 F4 word: SLICED.K0.INIT 0001010100111111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1110110010100000 word: SLICEB.K0.INIT 0001001101011111 word: SLICEB.K1.INIT 0000011101110111 word: SLICEC.K1.INIT 0001001101011111 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0001010100111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C81:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02N0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 W3_H06E0203 arc: A1 V02S0701 arc: A3 S1_V02N0501 arc: A5 V02N0301 arc: A7 S1_V02N0101 arc: B1 V00T0000 arc: B3 H00R0100 arc: B4 W1_H02E0101 arc: B5 N1_V01S0000 arc: B7 H02E0101 arc: C1 V02N0601 arc: C3 H02E0601 arc: C4 W1_H02E0401 arc: C5 V01N0101 arc: C7 V02S0201 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 V02N0201 arc: D4 H02W0001 arc: D5 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F5 arc: E1_H01E0101 F2 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F6 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H01W0100 arc: M4 E1_H01E0101 arc: M5 H02E0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 F0 arc: V01S0100 F4 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1110110010100000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111100010001000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1110110010100000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 0001001101011111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C82:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0701 N1_V02S0701 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 H02E0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 E1_H01W0000 arc: A1 H02E0501 arc: A3 H02E0501 arc: A4 V02N0101 arc: A7 H00R0000 arc: B1 V00T0000 arc: B3 S1_V02N0301 arc: B4 H00R0000 arc: C1 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 H02E0601 arc: C7 H02E0601 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D3 W1_H02E0201 arc: D5 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: LSR1 E1_H02W0301 arc: M0 H01E0001 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00B0100 arc: M5 H02W0001 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: S1_V02S0401 F4 arc: V01S0000 Q5 word: SLICED.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1110101011000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111100010001000 word: SLICEC.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1101100011011000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 .tile R16C83:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N3_V06S0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: A2 H00L0100 arc: A5 Q5 arc: B0 H01W0100 arc: B7 V00B0000 arc: C0 V02S0401 arc: C2 E1_H02W0601 arc: C5 V02N0001 arc: C7 V02N0001 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00T0100 arc: D2 V02N0001 arc: D5 V02S0401 arc: D7 H01W0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F2 arc: E1_H02E0601 Q6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: LSR0 H02E0301 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 H02W0001 arc: M6 H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F5 arc: S1_V02S0001 F0 arc: S1_V02S0201 Q2 arc: S1_V02S0401 Q4 arc: V00B0000 Q4 arc: V01S0000 Q1 arc: W1_H02W0601 Q6 word: SLICEB.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1100111111000000 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C84:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 H02E0101 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 N1_V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: A2 V02S0701 arc: A3 V02N0501 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 H01W0100 arc: B4 N1_V01S0000 arc: C0 N1_V02S0601 arc: C1 V02N0401 arc: C2 N1_V02S0601 arc: C4 V02N0001 arc: C6 V02N0001 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 H02E0001 arc: D4 H02E0001 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0101 F7 arc: E1_H02E0501 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q5 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q6 arc: N1_V02N0401 Q4 arc: S1_V02S0001 F0 arc: S1_V02S0301 Q1 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: V01S0100 F4 word: SLICED.K0.INIT 1010111110100000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111000011110000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1010101010101010 word: SLICEB.K0.INIT 1010111110100000 word: SLICED.K1.INIT 1010111110100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R16C85:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02N0401 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H02W0701 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H06E0303 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 N1_V02S0701 arc: A2 N1_V02S0701 arc: A4 V02S0301 arc: A5 Q5 arc: A7 W1_H02E0501 arc: B0 V02S0301 arc: B1 E1_H02W0101 arc: B6 V01S0000 arc: C2 H02E0401 arc: C4 Q4 arc: C5 W1_H02E0601 arc: C6 H02E0401 arc: C7 E1_H01E0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 V02N0001 arc: D3 V02N0201 arc: D4 S1_V02N0601 arc: D5 S1_V02N0601 arc: D6 S1_V02N0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q7 arc: E1_H02E0501 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M0 H02W0601 arc: M2 H02W0601 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F6 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: V01S0000 Q6 arc: V01S0100 F5 word: SLICEC.K0.INIT 1111000010101010 word: SLICED.K1.INIT 1111000010101010 word: SLICED.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1010101011110000 word: SLICEB.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111101001010000 word: SLICEA.K1.INIT 1100110011001100 word: SLICEA.K0.INIT 1110111001000100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C86:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 W1_H02E0601 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 H06E0203 arc: V00B0100 V02S0101 arc: V00T0000 V02N0601 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V02N0601 arc: A0 V02N0501 arc: A5 W1_H02E0501 arc: C0 N1_V02S0601 arc: C5 E1_H01E0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02E0201 arc: D5 H02E0001 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: LSR0 H02W0501 arc: M0 V00T0000 arc: M5 H00R0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0201 F0 arc: W1_H02W0701 F5 word: SLICEC.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1111010110100000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R16C87:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 W1_H02E0601 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 H06E0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: A0 H02E0501 arc: B0 V02S0301 arc: C4 E1_H02W0601 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 E1_H02W0201 arc: D4 E1_H02W0001 arc: E1_H01E0001 Q2 arc: E1_H02E0201 Q2 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 F0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 1110111000100010 word: SLICEA.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 0000111100000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R16C88:PLC2 arc: H00L0000 H02E0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00T0100 N1_V02S0701 arc: A0 H01E0001 arc: A2 V02N0701 arc: B0 V00T0000 arc: B2 H01W0100 arc: C0 V02N0401 arc: C2 H00L0000 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 S1_V02N0201 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H01W0100 Q7 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: V00T0000 Q2 word: SLICEB.K0.INIT 1000100011111000 word: SLICEA.K0.INIT 1110110010100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C13:PLC2 arc: E3_H06E0003 W3_H06E0303 arc: W3_H06W0203 E3_H06W0103 .tile R17C19:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: W3_H06W0103 E3_H06W0103 .tile R17C25:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: D2 V02S0001 arc: F2 F2_SLICE arc: W3_H06W0103 F2 word: SLICEB.K0.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 .tile R17C29:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E3_H06W0203 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0001 N3_V06S0003 .tile R17C2:PLC2 arc: S3_V06S0103 N3_V06S0003 .tile R17C30:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V06S0303 arc: H00L0100 V02N0101 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0701 H02W0701 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: A0 N1_V02S0701 arc: A1 H02W0501 arc: A2 H02E0501 arc: A3 E1_H01E0001 arc: A4 V00T0100 arc: A5 F7 arc: A6 V00T0100 arc: A7 E1_H01W0000 arc: B1 V01N0001 arc: B2 H02W0301 arc: B3 H00R0000 arc: B4 H00R0000 arc: B5 F3 arc: B6 V02S0701 arc: B7 H02W0301 arc: C0 F4 arc: C1 H02W0601 arc: C2 E1_H01W0000 arc: C3 N1_V01N0001 arc: C4 V02S0201 arc: C5 N1_V02S0001 arc: C6 Q6 arc: C7 V00T0000 arc: CE1 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F0 arc: D2 H02E0201 arc: D3 H02W0001 arc: D4 V02N0601 arc: D5 H02E0001 arc: D6 V02S0601 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q3 arc: E1_H02E0701 F5 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: LSR0 V00B0000 arc: M3 H00L0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: V00T0100 Q3 arc: V01S0000 F6 word: SLICED.K0.INIT 0000001100010001 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K1.INIT 0000110000001010 word: SLICEC.K1.INIT 1110000011110000 word: SLICEB.K0.INIT 1010000010001000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111001110100011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R17C31:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 E1_H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02W0701 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 E1_H01E0001 arc: A2 H02W0701 arc: A3 H02E0701 arc: A4 E1_H01W0000 arc: A5 F7 arc: A6 N1_V01N0101 arc: A7 H02W0701 arc: B0 H02W0301 arc: B1 Q1 arc: B2 E1_H01W0100 arc: B3 W1_H02E0301 arc: B4 H00L0000 arc: B6 V00T0000 arc: B7 H02W0301 arc: C0 N1_V01N0001 arc: C1 S1_V02N0601 arc: C2 H02W0401 arc: C3 F4 arc: C4 H02W0601 arc: C5 H02E0601 arc: C6 N1_V02S0001 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 F0 arc: D4 V02S0601 arc: D5 F2 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 Q4 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 E1_H02W0301 arc: M1 H00L0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F3 arc: S1_V02S0301 F1 arc: W1_H02W0301 Q1 arc: W1_H02W0501 F5 word: SLICEA.K1.INIT 0101001100000000 word: SLICEA.K0.INIT 0000000010101100 word: SLICEC.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1010101010101000 word: SLICED.K0.INIT 1010111000000000 word: SLICEB.K0.INIT 1010000010001000 word: SLICED.K1.INIT 0101010000000100 word: SLICEC.K1.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R17C32:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 V02N0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V06S0203 arc: A4 V02S0301 arc: A7 V00T0100 arc: B4 V01S0000 arc: B7 V00B0100 arc: C4 Q4 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 H02W0201 arc: D7 V02S0601 arc: E1_H01E0101 Q7 arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M1 H00L0100 arc: M3 H00L0100 arc: M4 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0401 F4 arc: S1_V02S0501 F7 arc: V00B0100 Q7 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: W1_H02W0301 Q1 arc: W1_H02W0401 Q4 arc: W1_H02W0601 Q4 word: SLICEC.K0.INIT 0001101100000000 word: SLICED.K1.INIT 0000001100000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C33:PLC2 arc: E1_H02E0401 V02S0401 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0301 W1_H02E0301 arc: V00B0000 V02N0001 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V06S0303 arc: A0 V02N0701 arc: A1 V02N0501 arc: A2 E1_H01E0001 arc: A3 F7 arc: A4 N1_V02S0301 arc: A5 H02W0701 arc: A6 E1_H02W0701 arc: A7 Q7 arc: B0 H02E0301 arc: B1 V00T0000 arc: B2 H01W0100 arc: B3 E1_H02W0301 arc: B4 H00L0000 arc: B6 V00B0100 arc: B7 H02W0301 arc: C0 H00L0000 arc: C1 E1_H02W0401 arc: C2 N1_V02S0601 arc: C3 H02E0601 arc: C4 Q4 arc: C5 F4 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE0 W1_H02E0101 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V00T0100 arc: D2 N1_V02S0201 arc: D3 N1_V02S0001 arc: D4 N1_V02S0601 arc: D5 F2 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F0 arc: H01W0100 Q7 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F1 arc: N1_V02N0401 F6 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0100 Q4 word: SLICEA.K1.INIT 1100000010100000 word: SLICED.K0.INIT 0101000001000100 word: SLICED.K1.INIT 0000000011100010 word: SLICEA.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 0000000011111011 word: SLICEC.K0.INIT 0010001000001010 word: SLICEB.K0.INIT 0000000001010011 word: SLICEC.K1.INIT 1010101010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C34:PLC2 arc: H00R0100 V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0601 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 H02E0501 arc: A1 H02E0501 arc: A7 Q7 arc: B0 E1_H02W0301 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C7 E1_H01E0101 arc: CE1 S1_V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0001 arc: D7 E1_H02W0001 arc: E1_H01E0101 Q2 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M2 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: V01S0100 F7 word: SLICED.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1101000011000000 word: SLICEA.K1.INIT 0101000000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R17C35:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N3_V06S0303 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 .tile R17C36:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A3 F7 arc: A7 N1_V02S0301 arc: B0 S1_V02N0301 arc: B1 Q1 arc: B3 H02W0101 arc: B6 V00B0100 arc: B7 N1_V02S0501 arc: C0 H00L0000 arc: C1 V02N0601 arc: C3 S1_V02N0401 arc: C6 Q6 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D3 N1_V01S0000 arc: D6 V02N0601 arc: D7 V02S0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00T0100 arc: M5 H00R0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 F6 arc: V00B0100 Q5 arc: W1_H02W0301 F3 word: SLICED.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICED.K1.INIT 0000100000101010 word: SLICEB.K1.INIT 1100000011010000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R17C37:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0101 E1_H02W0101 arc: S3_V06S0303 H01E0101 arc: V00B0100 V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 E1_H01E0001 arc: A1 S1_V02N0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 E1_H01W0000 arc: B0 H02E0301 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B3 H02E0301 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 Q4 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H02E0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M3 H02E0201 arc: M4 H02W0401 arc: M6 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: S3_V06S0003 F0 arc: V00B0000 F4 word: SLICEC.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011100011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R17C38:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 H01E0101 arc: V00B0000 E1_H02W0601 arc: V00B0100 E1_H02W0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V01N0001 arc: W3_H06W0203 E1_H02W0701 arc: A4 V00T0100 arc: A7 Q7 arc: B0 H01W0100 arc: C0 H00L0000 arc: C4 Q4 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D4 W1_H02E0001 arc: D7 W1_H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q3 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 H02W0401 arc: M6 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00T0100 Q1 arc: V01S0000 F4 arc: W1_H02W0701 F7 word: SLICEC.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111000010101010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R17C39:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W1_H02E0601 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 E1_H02W0501 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 .tile R17C3:PLC2 arc: W1_H02W0701 V06S0203 .tile R17C40:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 V06S0303 arc: H00L0100 H02W0101 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: V00B0000 N1_V02S0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 V00B0000 arc: B1 V00B0000 arc: C0 H02W0401 arc: C1 H02W0401 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: M0 H02W0601 word: SLICEA.K0.INIT 1011111110110011 word: SLICEA.K1.INIT 1000110010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R17C41:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N1_V02S0401 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 H00R0000 arc: A1 W1_H02E0701 arc: A2 H02W0701 arc: A3 E1_H01E0001 arc: A4 F7 arc: A5 E1_H02W0701 arc: A6 N1_V01N0101 arc: A7 F5 arc: B0 V02S0101 arc: B1 V02S0301 arc: B2 H01W0100 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B5 H02W0101 arc: B7 H01E0101 arc: C0 H02W0601 arc: C1 F4 arc: C2 E1_H02W0401 arc: C3 E1_H01W0000 arc: C4 V00T0000 arc: C5 N1_V02S0001 arc: C6 E1_H02W0401 arc: C7 H02E0601 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02W0201 arc: D2 V00B0100 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 H02E0201 arc: D6 E1_H01W0100 arc: D7 F2 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q0 arc: E1_H02E0701 Q5 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M3 E1_H02W0201 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: S1_V02S0101 F3 arc: V01S0100 F0 arc: W1_H02W0101 Q3 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000000100100011 word: SLICEB.K1.INIT 0100011100000000 word: SLICED.K0.INIT 0101000001011111 word: SLICEB.K0.INIT 0000000010101100 word: SLICEC.K1.INIT 1100000010100000 word: SLICED.K1.INIT 1100111111001010 word: SLICEC.K0.INIT 1100111000000000 word: SLICEA.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C42:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 V01N0001 arc: V00T0100 V02N0701 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V01N0101 arc: W3_H06W0303 E3_H06W0203 arc: A0 F5 arc: A1 F5 arc: A2 H01E0001 arc: A3 H02E0701 arc: A4 S1_V02N0101 arc: A5 Q5 arc: A6 V02N0301 arc: A7 S1_V02N0301 arc: B0 V00T0000 arc: B2 V02N0301 arc: B3 N1_V02S0301 arc: B4 V02S0701 arc: B5 W1_H02E0301 arc: B6 H01E0101 arc: B7 E1_H02W0301 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 V02S0401 arc: C4 E1_H01E0101 arc: C5 H02W0601 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 H02W0001 arc: D3 V00B0100 arc: D4 E1_H01W0100 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0101 Q1 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00T0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: S1_V02S0101 F3 arc: S1_V02S0301 F3 arc: V00B0000 F6 arc: V00B0100 Q5 arc: V00T0000 F2 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q1 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q5 word: SLICEB.K1.INIT 0000000100110001 word: SLICEC.K0.INIT 0000100000101010 word: SLICED.K0.INIT 0001000100000101 word: SLICEB.K0.INIT 0100010000001100 word: SLICED.K1.INIT 1110010000000000 word: SLICEC.K1.INIT 0000101000001100 word: SLICEA.K0.INIT 1100000011000101 word: SLICEA.K1.INIT 1111000011110101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C43:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V06S0303 arc: E3_H06E0003 V06S0003 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 N1_V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 V02N0301 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 H00R0000 arc: C0 F4 arc: C1 F4 arc: C2 F4 arc: C3 F4 arc: C4 S1_V02N0001 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 H01W0000 arc: E1_H01E0101 Q5 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00R0000 Q6 arc: H01W0000 Q3 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q6 arc: V01S0000 Q3 arc: V01S0100 Q6 arc: W1_H02W0701 Q5 word: SLICEC.K0.INIT 1111110111111000 word: SLICEC.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1101111100100000 word: SLICEA.K1.INIT 0101011110101000 word: SLICEB.K0.INIT 1000101001110101 word: SLICEB.K1.INIT 0000001011111101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C44:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 E3_H06W0203 arc: H00L0100 S1_V02N0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 V06S0303 arc: A0 H00L0000 arc: A5 Q5 arc: A6 F5 arc: B0 H01W0100 arc: B5 V02S0701 arc: B6 H02E0301 arc: C0 H02W0401 arc: C5 V02S0001 arc: CE0 W1_H02E0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D5 H01W0000 arc: D6 F0 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H01W0000 Q2 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M2 V00B0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: S1_V02S0201 Q0 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEC.K1.INIT 0000000100001101 word: SLICEA.K0.INIT 0101001100000000 word: SLICED.K0.INIT 1100110010001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C45:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 N1_V02S0001 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0303 V06N0303 arc: A0 H00R0000 arc: A1 F5 arc: A2 V00T0000 arc: A3 H00L0100 arc: A5 V02N0301 arc: A6 H02W0701 arc: A7 H02W0701 arc: B0 V02N0301 arc: B1 V02S0101 arc: B2 H01W0100 arc: B3 S1_V02N0301 arc: B4 H02W0301 arc: B5 V00B0100 arc: B6 H02E0301 arc: B7 V00B0100 arc: C0 S1_V02N0601 arc: C1 E1_H01W0000 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 E1_H01E0101 arc: C5 V00T0100 arc: C6 Q6 arc: C7 V02N0001 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F0 arc: D2 S1_V02N0001 arc: D3 V00B0100 arc: D4 F2 arc: D5 H02E0001 arc: D6 H01W0000 arc: D7 H00L0100 arc: E1_H01E0101 F3 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0000 Q0 arc: H01W0100 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M3 H02W0201 arc: M5 E1_H02W0001 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 F7 arc: V01S0100 F1 word: SLICEB.K0.INIT 0000000001010011 word: SLICEB.K1.INIT 0100000001001100 word: SLICEC.K0.INIT 1100110011000000 word: SLICEA.K0.INIT 0000000100110001 word: SLICEC.K1.INIT 0000101000100010 word: SLICEA.K1.INIT 1100111110001011 word: SLICED.K0.INIT 0011001000010000 word: SLICED.K1.INIT 1110000001000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C46:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 H06W0303 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 V06S0003 arc: W3_H06W0303 V06S0303 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 F5 arc: A5 N1_V01N0101 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 W1_H02E0101 arc: B1 E1_H01W0100 arc: B2 V02N0301 arc: B3 V01N0001 arc: B5 H02E0301 arc: B7 H02E0301 arc: C0 F4 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 E1_H01E0101 arc: C5 H02E0401 arc: C6 V02S0001 arc: C7 H02E0401 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V00T0100 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V02S0401 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0000 F2 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M1 H02W0001 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M5 H02W0001 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0101 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: V00B0000 F6 arc: V01S0000 F0 word: SLICED.K1.INIT 0000010011000100 word: SLICEC.K1.INIT 0001000000010011 word: SLICEC.K0.INIT 0000000011111010 word: SLICEA.K0.INIT 1111110010111000 word: SLICEA.K1.INIT 1110111011111111 word: SLICED.K0.INIT 1010111110100000 word: SLICEB.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1111001110111011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C47:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 V02N0001 arc: H00L0100 H02W0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 N3_V06S0303 arc: A2 V01N0101 arc: A3 V01N0101 arc: A4 F5 arc: A5 E1_H02W0701 arc: A7 V02N0101 arc: B1 S1_V02N0301 arc: B2 V02S0101 arc: B3 Q3 arc: B4 N1_V02S0501 arc: B5 S1_V02N0701 arc: B6 F3 arc: C1 H02E0401 arc: C2 E1_H02W0401 arc: C3 W1_H02E0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: C6 E1_H02W0601 arc: C7 E1_H01E0101 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 H02E0001 arc: D3 V02S0001 arc: D4 H00L0100 arc: D5 E1_H01W0100 arc: D6 V01N0001 arc: D7 V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F6 arc: LSR1 H02E0301 arc: M1 H00L0000 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: S1_V02S0301 Q1 arc: V00T0100 Q1 arc: V01S0000 F1 word: SLICEB.K1.INIT 0000000001010011 word: SLICED.K0.INIT 0000111100001100 word: SLICEA.K1.INIT 1111110000110000 word: SLICEB.K0.INIT 0010001100100000 word: SLICED.K1.INIT 0000000000000101 word: SLICEC.K1.INIT 1100010010000000 word: SLICEC.K0.INIT 1100110010001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C48:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: H00L0000 V02N0001 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H06W0103 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: A3 H02W0701 arc: B3 Q3 arc: C3 N1_V02S0601 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 V01S0100 arc: F3 F3_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q7 arc: S1_V02S0601 Q4 arc: V01S0000 Q0 arc: V01S0100 Q7 arc: W1_H02W0101 F3 word: SLICEB.K1.INIT 0000111000000100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C49:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: H00L0000 E1_H02W0001 arc: H00R0000 N1_V02S0401 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A4 V00T0100 arc: A5 F7 arc: B0 S1_V02N0301 arc: B1 V02S0301 arc: B4 S1_V02N0701 arc: B5 E1_H02W0101 arc: B7 V00B0000 arc: C0 H02E0401 arc: C1 H02E0401 arc: C4 Q4 arc: C5 V02S0001 arc: C7 H02W0401 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D4 H01W0000 arc: D5 V01N0001 arc: D7 H02E0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M3 H02W0201 arc: M4 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N3_V06N0303 F5 arc: S1_V02S0501 Q7 arc: V00B0000 F4 arc: V01S0000 Q3 word: SLICEA.K0.INIT 0000110001000100 word: SLICEC.K0.INIT 1010100000100000 word: SLICED.K1.INIT 0000000000000011 word: SLICEC.K1.INIT 1110000011101111 word: SLICEA.K1.INIT 1110001000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C50:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 N3_V06S0303 arc: W3_H06W0203 N3_V06S0203 arc: A0 H02E0701 arc: A1 F5 arc: A2 H02E0701 arc: A3 E1_H01E0001 arc: A4 H02W0501 arc: A6 S1_V02N0101 arc: A7 V02S0301 arc: B0 H01W0100 arc: B1 V00B0000 arc: B2 E1_H01W0100 arc: B3 V02S0101 arc: B4 E1_H02W0301 arc: B5 H01E0101 arc: B6 V01S0000 arc: B7 F3 arc: C0 N1_V01N0001 arc: C1 V02N0601 arc: C2 E1_H01W0000 arc: C3 N1_V01N0001 arc: C4 H02W0401 arc: C5 H02W0401 arc: C6 V02S0001 arc: C7 H02E0601 arc: CE1 H00L0000 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 V02N0201 arc: D4 F2 arc: D5 F0 arc: D6 H01W0000 arc: D7 H02E0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F7 arc: E1_H02E0501 Q5 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0301 arc: M3 H00L0100 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: V00B0000 F4 arc: V01S0000 Q6 arc: W1_H02W0401 F6 word: SLICED.K1.INIT 1010000010100010 word: SLICEB.K1.INIT 0000000001000111 word: SLICED.K0.INIT 0000111000000100 word: SLICEB.K0.INIT 1101100000000000 word: SLICEA.K0.INIT 0000000011011000 word: SLICEC.K1.INIT 0000000000000011 word: SLICEC.K0.INIT 1010101010001010 word: SLICEA.K1.INIT 1111010000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C51:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 W1_H02E0001 arc: H00L0100 E1_H02W0301 arc: H00R0100 E1_H02W0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0501 arc: A2 V02N0701 arc: A3 V00T0000 arc: A4 V00T0100 arc: A5 F7 arc: A6 F5 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 V02N0301 arc: B2 S1_V02N0301 arc: B3 V02S0101 arc: B4 H00R0000 arc: B5 H01E0101 arc: B6 V02N0501 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 W1_H02E0401 arc: C4 H02E0601 arc: C5 V02N0201 arc: C6 S1_V02N0001 arc: C7 V02N0001 arc: CE0 H00L0000 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 F0 arc: D2 V01S0100 arc: D3 V02S0201 arc: D4 E1_H02W0201 arc: D5 F2 arc: D6 V02S0401 arc: D7 H01W0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: V00T0000 Q0 arc: V01S0100 Q0 arc: W1_H02W0101 F1 word: SLICEC.K1.INIT 0000110001001100 word: SLICEB.K0.INIT 0000001000010011 word: SLICED.K1.INIT 0100000001110000 word: SLICED.K0.INIT 1010101100000000 word: SLICEA.K0.INIT 0000000011100100 word: SLICEC.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 0000000000001100 word: SLICEB.K1.INIT 0011001000000010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C52:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V06S0303 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 V06S0203 arc: E3_H06E0303 V06S0303 arc: H00L0000 H02W0001 arc: H00L0100 H02W0301 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 V02N0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 S1_V02N0701 arc: A3 V02N0701 arc: A4 S1_V02N0301 arc: A5 V00B0000 arc: A6 N1_V02S0101 arc: A7 V02S0101 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H01W0100 arc: B3 V02N0301 arc: B4 V01S0000 arc: B5 V02N0501 arc: B6 H02E0301 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 V02N0401 arc: C4 Q4 arc: C5 V01N0101 arc: C6 E1_H01E0101 arc: C7 F4 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 Q2 arc: D3 N1_V02S0201 arc: D4 V02N0401 arc: D5 F0 arc: D6 E1_H02W0201 arc: D7 F2 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q2 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0101 Q1 arc: S1_V02S0401 F6 arc: V00T0100 F3 arc: V01S0000 Q1 arc: V01S0100 Q4 word: SLICEB.K0.INIT 1110000001000000 word: SLICEC.K0.INIT 0000000011011000 word: SLICED.K1.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110010101010 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEC.K1.INIT 1100100001000000 word: SLICED.K0.INIT 0000101000100010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C53:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 E1_H02W0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: A1 H01E0001 arc: A2 F5 arc: A3 V00B0000 arc: A4 V00T0000 arc: A5 V02S0301 arc: A6 F7 arc: A7 Q7 arc: B1 V01N0001 arc: B3 H01W0100 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 H02E0101 arc: B7 V02S0701 arc: C0 V02N0401 arc: C1 H00R0100 arc: C2 F4 arc: C3 V02N0601 arc: C4 V02N0001 arc: C5 H02E0401 arc: C6 H02W0401 arc: CE0 N1_V02S0201 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V02N0201 arc: D2 V00T0100 arc: D3 H02W0201 arc: D4 S1_V02N0401 arc: D5 N1_V02S0601 arc: D6 F0 arc: D7 H01W0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q0 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M5 E1_H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q5 arc: V00T0000 Q0 arc: V01S0000 Q7 arc: V01S0100 F1 word: SLICEA.K0.INIT 1111010110100000 word: SLICED.K1.INIT 1110111000100010 word: SLICED.K0.INIT 0001000000010011 word: SLICEB.K1.INIT 0000010100000011 word: SLICEA.K1.INIT 1010000011100000 word: SLICEC.K1.INIT 1110010000000000 word: SLICEC.K0.INIT 0011000000100010 word: SLICEB.K0.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C54:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0203 H01E0001 arc: H00L0100 H02E0301 arc: H00R0000 V02N0601 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 N3_V06S0103 arc: A0 V01N0101 arc: A1 F7 arc: A2 E1_H02W0701 arc: A3 N1_V02S0701 arc: A4 V02S0301 arc: A5 V02N0101 arc: A6 H00L0000 arc: A7 Q7 arc: B0 H02W0101 arc: B2 F3 arc: B3 H00R0100 arc: B4 H02W0301 arc: B5 V02N0701 arc: B6 H01E0101 arc: B7 V02N0501 arc: C0 N1_V01N0001 arc: C1 S1_V02N0601 arc: C2 F4 arc: C3 H02W0401 arc: C4 N1_V02S0001 arc: C5 S1_V02N0001 arc: C6 E1_H02W0601 arc: C7 V01N0101 arc: CE0 V02N0201 arc: CE2 V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 F0 arc: D2 V00T0100 arc: D3 H02E0001 arc: D4 V02S0401 arc: D5 W1_H02E0001 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F6 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00R0100 Q7 arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M4 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F5 arc: V01S0100 F1 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1000100010100000 word: SLICED.K1.INIT 0000101100001000 word: SLICEA.K1.INIT 0000000001010000 word: SLICEB.K1.INIT 0100010101000000 word: SLICEC.K0.INIT 1101000010000000 word: SLICEB.K0.INIT 1111110100000000 word: SLICED.K0.INIT 1111001000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C55:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00B0100 E1_H02W0701 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 N3_V06S0303 arc: A0 F5 arc: A1 F5 arc: A2 H01E0001 arc: A3 H02E0701 arc: A4 H02W0501 arc: A5 E1_H02W0701 arc: A6 V00T0100 arc: A7 E1_H02W0701 arc: B0 V02N0101 arc: B2 W1_H02E0101 arc: B3 Q3 arc: B4 N1_V02S0701 arc: B5 V02N0501 arc: B6 V02N0501 arc: B7 V01S0000 arc: C0 F4 arc: C1 F4 arc: C2 H02W0401 arc: C3 N1_V01N0001 arc: C4 H02W0401 arc: C5 H02W0401 arc: C6 N1_V02S0001 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0201 arc: D2 V00B0100 arc: D3 N1_V02S0201 arc: D4 H01W0000 arc: D5 V02S0401 arc: D6 V02S0601 arc: D7 H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F0 arc: LSR0 H02E0501 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M1 H00L0000 arc: M3 H00L0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: S1_V02S0301 F3 arc: S1_V02S0401 Q6 arc: V00T0000 F2 arc: V01S0000 Q1 arc: V01S0100 F7 arc: W1_H02W0101 Q1 arc: W1_H02W0301 Q1 word: SLICEB.K1.INIT 0000000000011011 word: SLICEB.K0.INIT 0000000001010011 word: SLICED.K1.INIT 0010000000101010 word: SLICEC.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 0001000000010011 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K0.INIT 1101000010000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C56:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 N3_V06S0003 arc: A0 V01N0101 arc: A1 F7 arc: A2 S1_V02N0701 arc: A3 H01E0001 arc: A4 V02N0301 arc: A5 H02E0501 arc: A6 F5 arc: A7 S1_V02N0101 arc: B0 N1_V02S0101 arc: B1 V00B0000 arc: B2 H02W0101 arc: B3 N1_V02S0101 arc: B4 V02N0701 arc: B5 N1_V02S0501 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 N1_V01N0001 arc: C2 V02N0601 arc: C3 W1_H02E0401 arc: C4 V02S0001 arc: C5 H02W0401 arc: C6 E1_H01E0101 arc: C7 V01N0101 arc: CE1 V02N0201 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 N1_V02S0201 arc: D2 N1_V02S0001 arc: D3 H02W0201 arc: D4 N1_V02S0401 arc: D5 H00L0100 arc: D6 F0 arc: D7 H00R0100 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0100 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0100 arc: M2 V00T0000 arc: M3 H00L0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q3 arc: S1_V02S0101 Q3 arc: V00B0000 F4 arc: V01S0000 Q7 arc: V01S0100 Q3 arc: W1_H02W0301 F1 arc: W1_H02W0601 F6 arc: W3_H06W0103 Q2 word: SLICED.K1.INIT 0000000000100111 word: SLICEC.K0.INIT 0101000000110000 word: SLICEA.K1.INIT 0000000000010001 word: SLICEB.K1.INIT 0010001000110000 word: SLICEB.K0.INIT 1011100000000000 word: SLICEA.K0.INIT 0011000000100010 word: SLICEC.K1.INIT 0011001100100011 word: SLICED.K0.INIT 1010101010101000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C57:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 V02S0501 arc: H00R0000 S1_V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 V06S0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H02W0701 arc: B1 F3 arc: C1 N1_V01S0100 arc: C3 V02S0401 arc: CE1 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 V00B0100 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H01W0000 F3 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: M0 V00B0000 arc: M3 H00R0000 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0201 F0 arc: S1_V02S0101 F3 arc: V01S0100 Q3 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0110100110010110 word: SLICEB.K1.INIT 1111000000001111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R17C58:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: H00R0100 V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V06S0203 arc: A1 H00L0000 arc: A2 V02N0501 arc: A3 V02S0701 arc: A5 Q5 arc: A6 V02S0301 arc: B1 S1_V02N0301 arc: B2 V02S0301 arc: B5 V02N0701 arc: B6 F3 arc: C1 W1_H02E0401 arc: C3 V02N0601 arc: C5 V02N0201 arc: C6 V00B0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0001 arc: D2 V02S0001 arc: D3 S1_V02N0201 arc: D5 N1_V02S0401 arc: D6 V00B0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M5 V01S0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N3_V06N0303 Q6 arc: S1_V02S0701 F5 arc: V01S0000 F0 word: SLICEC.K1.INIT 1010000010010000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 0110100110010110 word: SLICEB.K0.INIT 1001100111111111 word: SLICEB.K1.INIT 0101101010100101 word: SLICED.K0.INIT 1001011011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C59:PLC2 arc: E1_H02E0501 V02S0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H02W0501 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0303 V06S0303 arc: B3 W1_H02E0301 arc: B7 V02N0701 arc: C0 E1_H01W0000 arc: C7 V02S0201 arc: CE0 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D3 S1_V02N0201 arc: D7 H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: LSR0 W1_H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F7 arc: V00T0100 F3 arc: V01S0000 Q0 word: SLICEA.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000000011001100 word: SLICED.K1.INIT 1100000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C60:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 V01N0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 H01E0001 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00T0000 V02N0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 N3_V06S0303 arc: A3 V00B0000 arc: A4 V00T0000 arc: A6 V02N0101 arc: B0 H02W0301 arc: B2 V02N0301 arc: B5 S1_V02N0501 arc: B7 H01E0101 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: V01S0100 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R17C61:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 V01N0001 arc: H00L0000 S1_V02N0201 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0301 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V06S0203 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0000 arc: M2 V00B0100 arc: M5 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q2 arc: V01S0000 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C62:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0601 H02W0601 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 H06W0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02W0701 arc: CE0 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q7 arc: E3_H06E0103 Q1 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M5 H00R0100 arc: M6 H02E0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q0 arc: N1_V02N0501 Q5 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C63:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02S0401 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: V00T0000 V02N0601 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02S0701 arc: W3_H06W0303 N3_V06S0303 arc: A0 W1_H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A7 H00L0000 arc: B2 H01W0100 arc: B7 W1_H02E0101 arc: C0 V02S0401 arc: C2 H00R0100 arc: C3 H00R0100 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 H00R0000 arc: D3 H00R0000 arc: D7 W1_H02E0001 arc: E1_H02E0201 F2 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 Q0 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: V01S0000 Q0 arc: W3_H06W0003 Q0 word: SLICED.K1.INIT 0000110100000101 word: SLICEA.K0.INIT 0000101000000000 word: SLICEB.K0.INIT 0000000011001110 word: SLICEB.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R17C64:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02W0101 arc: H00R0100 S1_V02N0501 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 N1_V02S0701 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 H02E0201 arc: V01S0100 S3_V06N0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: B3 Q3 arc: C3 S1_V02N0401 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 V00B0100 arc: F3 F3_SLICE arc: M3 H00L0100 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: S1_V02S0301 F3 arc: V00B0100 Q5 arc: V01S0000 Q6 word: SLICEB.K1.INIT 1100111111000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R17C65:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0701 H06W0203 arc: S1_V02S0401 S3_V06N0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0100 E1_H02W0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02N0401 arc: W3_H06W0203 S3_V06N0203 arc: A0 V02N0701 arc: B0 S1_V02N0301 arc: B1 S1_V02N0101 arc: C0 H00L0100 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: H01W0100 F0 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M1 H02W0001 arc: M3 H01W0100 arc: M4 V00T0100 arc: M5 E1_H02W0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0301 Q1 arc: V01S0100 Q3 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 0010000011111111 word: SLICEA.K1.INIT 0000000011001100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 .tile R17C66:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 W1_H02E0301 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 H06E0303 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 H02W0601 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 E3_H06W0003 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 H00L0100 arc: A4 V00T0000 arc: A5 V00T0000 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 V01N0001 arc: B3 W1_H02E0301 arc: B4 V02N0501 arc: B5 V02N0501 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C2 S1_V02N0401 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 H02E0201 arc: D4 V01N0001 arc: D5 V01N0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0000 F2 arc: H00R0000 F4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 V01S0100 arc: M2 H02W0601 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 V01S0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0301 Q1 arc: V01S0000 F0 arc: V01S0100 Q7 word: SLICEA.K0.INIT 0010000011111101 word: SLICEA.K1.INIT 0010000011110000 word: SLICEB.K0.INIT 0000111110001111 word: SLICEB.K1.INIT 0000000011001100 word: SLICEC.K0.INIT 0101110101010101 word: SLICEC.K1.INIT 0100110001000100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R17C67:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 S3_V06N0303 arc: V00B0100 V02S0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 V02N0601 arc: W3_H06W0203 E1_H01W0000 arc: A1 S1_V02N0501 arc: B1 H02E0301 arc: C1 V02S0401 arc: C4 S1_V02N0201 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D4 H02E0001 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V02N0601 Q4 arc: V01S0000 F0 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R17C68:PLC2 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: H00L0100 H02W0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 W1_H02E0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 S3_V06N0203 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 H02E0501 arc: A3 V02N0501 arc: A5 Q5 arc: A7 V02N0101 arc: B0 H01W0100 arc: B1 Q1 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B6 S1_V02N0501 arc: B7 V02N0701 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C2 H02E0401 arc: C3 V02N0601 arc: C5 E1_H01E0101 arc: C6 V02N0201 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 E1_H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D5 S1_V02N0601 arc: D6 F2 arc: D7 H02E0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q6 arc: E1_H02E0501 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F7 arc: H01W0100 Q1 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M5 H00R0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 F0 arc: V00B0100 F5 arc: V01S0100 F6 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICED.K0.INIT 1100000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1000000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R17C69:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 H02W0401 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06S0203 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C7 V02N0001 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D7 H01W0000 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0201 F0 arc: S3_V06S0003 F0 arc: V00B0100 F7 arc: V01S0000 F0 word: SLICED.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R17C70:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02S0301 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0701 N1_V02S0701 arc: V00T0000 S1_V02N0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 E1_H01W0000 arc: A2 V00B0000 arc: B3 Q3 arc: C2 N1_V01N0001 arc: C3 H00R0100 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V02N0001 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00R0100 Q5 arc: M2 V00T0000 arc: M3 H00L0100 arc: M4 V00T0000 arc: M5 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q2 arc: S1_V02S0201 F2 arc: V00B0000 Q4 arc: V01S0000 F3 word: SLICEB.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1010101011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R17C71:PLC2 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0001 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0701 H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: A0 H02E0501 arc: A1 H00L0000 arc: A2 F5 arc: A3 F7 arc: B0 F3 arc: B1 V02N0301 arc: B5 H02E0101 arc: C0 V02S0601 arc: C1 V02N0401 arc: C2 V02S0601 arc: C3 H00R0100 arc: C4 V02N0201 arc: C5 F4 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02W0201 arc: D3 V01S0100 arc: D4 S1_V02N0401 arc: D5 V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q0 arc: E1_H02E0501 F5 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0001 Q2 arc: V01S0100 Q0 arc: W3_H06W0103 Q2 word: SLICEB.K1.INIT 0101000001010101 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0000111100000011 word: SLICEA.K0.INIT 0000001100001011 word: SLICEB.K0.INIT 0000010100000101 word: SLICEA.K1.INIT 0000000000100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R17C72:PLC2 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 W1_H02E0101 arc: H00R0000 H02E0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 H02E0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S3_V06N0003 arc: A0 H00R0000 arc: A1 V01N0101 arc: A2 H00L0100 arc: A3 F5 arc: A4 H02W0501 arc: A6 F7 arc: A7 F5 arc: B0 W1_H02E0301 arc: B1 F3 arc: B2 V02N0101 arc: B3 H00L0000 arc: B4 V02S0701 arc: B5 W1_H02E0301 arc: B6 E1_H02W0301 arc: B7 S1_V02N0501 arc: C0 H02W0601 arc: C2 V02N0401 arc: C3 N1_V01S0100 arc: C4 E1_H02W0401 arc: C5 H02W0601 arc: C6 H02W0401 arc: C7 F4 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 E1_H02W0001 arc: D4 E1_H01W0100 arc: D5 E1_H02W0201 arc: D6 V01N0001 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0601 F6 arc: S1_V02S0601 F6 arc: V01S0000 F1 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0100000000000000 word: SLICEB.K0.INIT 1010101000101010 word: SLICEC.K1.INIT 0011111100000000 word: SLICEC.K0.INIT 1010001010100011 word: SLICED.K1.INIT 0000000000100000 word: SLICED.K0.INIT 0000000000101010 word: SLICEB.K1.INIT 0000000000000010 word: SLICEA.K1.INIT 1000100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 .tile R17C73:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V01N0101 arc: E3_H06E0303 V01N0101 arc: H00R0100 H02E0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 H06W0003 arc: S1_V02S0701 H02W0701 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02S0701 arc: A0 V02S0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0701 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H01W0100 arc: B5 E1_H02W0301 arc: C0 E1_H01W0000 arc: C1 V02S0401 arc: C2 S1_V02N0601 arc: C6 V00T0000 arc: C7 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 E1_H02W0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0201 arc: D5 H00R0100 arc: D6 W1_H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0501 F5 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q1 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F6 arc: S1_V02S0101 Q1 arc: S1_V02S0601 F6 arc: V00T0000 Q0 arc: V01S0100 F7 word: SLICEC.K1.INIT 1111111100110011 word: SLICEA.K1.INIT 0000000011110100 word: SLICEA.K0.INIT 1111011111110011 word: SLICEB.K0.INIT 0000011101110111 word: SLICEB.K1.INIT 0011001111111111 word: SLICED.K1.INIT 0000000011110000 word: SLICED.K0.INIT 0000000000001111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R17C74:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 S1_V02N0001 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0501 E1_H02W0501 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: A0 F7 arc: A3 F5 arc: A4 H02E0701 arc: A5 V02S0101 arc: B0 V01N0001 arc: B2 H02W0301 arc: B3 H02W0301 arc: C0 H00L0000 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V02S0201 arc: C7 F4 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V02N0401 arc: D5 H02E0201 arc: D7 H00R0100 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: LSR1 H02E0501 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0001 F2 arc: N3_V06N0003 Q0 arc: W1_H02W0701 F5 arc: W3_H06W0003 Q0 word: SLICEC.K1.INIT 0101010100000000 word: SLICEA.K0.INIT 1010101011101010 word: SLICEB.K0.INIT 0000110000000000 word: SLICEB.K1.INIT 1010111010101010 word: SLICED.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1010000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R17C75:PLC2 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02W0201 arc: H00R0000 V02N0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H06W0203 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V01S0100 arc: A0 H02W0501 arc: A2 V02S0501 arc: A3 V02N0501 arc: A4 V00B0000 arc: A5 H02W0701 arc: A6 H00R0000 arc: A7 H00L0000 arc: B2 V01N0001 arc: B3 S1_V02N0101 arc: B4 S1_V02N0701 arc: B5 S1_V02N0501 arc: B6 H02E0101 arc: B7 V00T0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0101 F3 arc: E1_H02E0501 F5 arc: E1_H02E0601 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: V01S0100 F2 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011100 word: SLICEC.K0.INIT 1001100110011100 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011100 word: SLICED.K1.INIT 1001100110011100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R17C76:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E1_H01W0000 arc: A0 S1_V02N0501 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 V00T0000 arc: A4 H02W0701 arc: A5 V00T0100 arc: A6 W1_H02E0501 arc: A7 W1_H02E0701 arc: B0 S1_V02N0101 arc: B1 V00B0000 arc: B2 N1_V02S0101 arc: B3 H00R0100 arc: B4 E1_H02W0301 arc: B5 H00L0000 arc: B6 E1_H02W0101 arc: B7 H02W0301 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: E1_H02E0001 F2 arc: E1_H02E0301 F3 arc: E1_H02E0501 F5 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: V01S0000 F6 arc: V01S0100 F4 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011100 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011100 word: SLICED.K1.INIT 1001100110011100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R17C77:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 H01E0001 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 V06S0303 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02N0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0701 N1_V02S0701 arc: A0 V02N0701 arc: A1 H00L0000 arc: A4 N1_V01S0100 arc: A5 V02S0301 arc: A6 H00R0000 arc: A7 V02S0101 arc: B0 V02N0301 arc: B1 V02N0101 arc: B4 E1_H02W0101 arc: B5 H00R0000 arc: B6 N1_V01S0000 arc: B7 E1_H02W0301 arc: C4 V02N0201 arc: C5 V00T0000 arc: C6 E1_H02W0401 arc: C7 V02N0201 arc: D4 E1_H02W0001 arc: D5 E1_H01W0100 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0101 F5 arc: E1_H02E0101 F1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: N1_V01N0001 F4 arc: N1_V01N0101 F7 arc: V01S0000 F6 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICED.K0.INIT 0000011101110111 word: SLICEC.K0.INIT 0001001101011111 word: SLICED.K1.INIT 0001001101011111 word: SLICEC.K1.INIT 0000011101110111 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R17C78:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: A2 E1_H02W0701 arc: A3 V00B0000 arc: A4 H02W0501 arc: A5 H02E0501 arc: A6 H02E0701 arc: A7 E1_H01W0000 arc: B0 E1_H02W0101 arc: B2 V02N0101 arc: B3 V02S0101 arc: B4 H00L0000 arc: B5 V00B0100 arc: B6 V02S0501 arc: B7 W1_H02E0101 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M3 H02W0201 arc: M5 H00L0100 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F3 arc: N1_V02N0301 Q3 arc: V01S0100 Q5 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C79:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00R0000 V02N0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 V01N0101 arc: A0 H02E0501 arc: A1 H02W0501 arc: A2 N1_V02S0501 arc: A3 V02S0701 arc: A4 V02N0101 arc: A5 N1_V02S0301 arc: A6 V02N0301 arc: A7 H02E0701 arc: B0 V00T0000 arc: B1 W1_H02E0301 arc: B2 H02E0101 arc: B3 H02E0301 arc: B4 N1_V02S0701 arc: B5 H00L0000 arc: B6 N1_V01S0000 arc: B7 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 V00T0100 arc: M2 H02E0601 arc: M5 H00R0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: S1_V02S0201 F0 arc: S1_V02S0501 F7 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W1_H02W0101 F3 arc: W1_H02W0301 F1 arc: W1_H02W0401 F6 arc: W1_H02W0501 Q5 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C7:PLC2 arc: E3_H06E0303 W3_H06E0303 arc: W3_H06W0303 E3_H06W0203 .tile R17C80:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 W1_H02E0201 arc: H00R0000 H02W0401 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 V01N0001 arc: A0 V02S0501 arc: A1 N1_V02S0701 arc: A3 E1_H02W0501 arc: A4 V02S0301 arc: A6 V02N0301 arc: B0 H02E0301 arc: B1 H02E0101 arc: B2 N1_V02S0301 arc: B5 V02S0701 arc: B7 V00T0000 arc: CE0 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: E1_H02E0501 Q7 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 E1_H02W0601 arc: M6 V00B0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: N1_V02N0001 F0 arc: N1_V02N0201 F2 arc: N1_V02N0701 F7 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q6 arc: V01S0000 F4 arc: V01S0100 Q6 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C81:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 H02W0001 arc: H00L0100 V02S0301 arc: H00R0100 H02E0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 V06S0203 arc: A0 E1_H02W0701 arc: A5 V00B0000 arc: A6 N1_V02S0301 arc: A7 N1_V02S0101 arc: B5 V02S0501 arc: B6 V02S0701 arc: B7 S1_V02N0701 arc: C5 V02S0201 arc: C6 S1_V02N0201 arc: C7 H01E0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V01N0001 arc: D6 V02N0401 arc: D7 W1_H02E0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F7 arc: E1_H02E0201 Q0 arc: E1_H02E0401 F6 arc: E1_H02E0601 Q6 arc: E3_H06E0103 Q2 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 Q1 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 E1_H01E0101 arc: M5 V01S0000 arc: M6 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F0 arc: N1_V02N0401 F4 arc: S1_V02S0101 Q3 arc: S1_V02S0401 F6 arc: S1_V02S0701 Q7 arc: V01S0100 Q5 arc: W1_H02W0401 F6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICED.K0.INIT 0000010000000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1110110010100000 word: SLICED.K1.INIT 0000011101110111 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C82:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02S0001 arc: V00T0000 H02W0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V06S0303 arc: A4 V00B0000 arc: A5 V02N0101 arc: A7 W1_H02E0501 arc: B0 W1_H02E0101 arc: B2 V02N0101 arc: B6 W1_H02E0101 arc: B7 N1_V02S0701 arc: C0 H00L0100 arc: C2 N1_V01N0001 arc: C3 S1_V02N0401 arc: C4 Q4 arc: C5 V00B0100 arc: C6 V02S0001 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: D4 W1_H02E0001 arc: D5 V00B0000 arc: D6 H01W0000 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 Q1 arc: H01W0000 Q1 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 W1_H02E0601 arc: M1 H02E0001 arc: M2 W1_H02E0601 arc: M3 H00R0000 arc: M4 E1_H01E0101 arc: M5 E1_H02W0001 arc: M6 N1_V01N0101 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F2 arc: N1_V02N0401 F4 arc: N1_V02N0701 F5 arc: S1_V02S0601 Q4 arc: S1_V02S0701 F7 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q6 word: SLICED.K0.INIT 1111110000001100 word: SLICEC.K0.INIT 1111010110100000 word: SLICEC.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1110001011100010 word: SLICEB.K1.INIT 1111000011110000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R17C83:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H06W0303 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 S1_V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 N1_V02S0701 arc: A1 E1_H01E0001 arc: A2 E1_H02W0501 arc: B0 V00T0000 arc: C0 E1_H02W0601 arc: C2 V02S0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D2 V02S0201 arc: D3 V02N0201 arc: E1_H01E0001 Q5 arc: E1_H02E0601 Q4 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q7 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 F2 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 H00L0000 arc: M2 H02W0601 arc: M3 H00L0100 arc: M4 V00B0100 arc: M5 V01S0000 arc: M6 E1_H02W0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q6 arc: S1_V02S0201 F0 arc: S1_V02S0501 Q5 arc: S1_V02S0701 Q7 arc: V01S0100 Q3 arc: W1_H02W0101 Q1 arc: W3_H06W0303 Q5 word: SLICEB.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111010110100000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1010101010101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R17C84:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 V02S0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06E0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 E1_H02W0601 arc: A4 N1_V02S0301 arc: A5 N1_V02S0301 arc: A6 V00T0100 arc: B0 V00T0000 arc: B2 H01W0100 arc: B7 E1_H02W0301 arc: C0 H02W0601 arc: C2 H02W0601 arc: C4 Q4 arc: C5 W1_H02E0401 arc: C6 Q6 arc: C7 N1_V02S0001 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 W1_H02E0001 arc: D2 V00T0100 arc: D3 E1_H02W0001 arc: D4 W1_H02E0001 arc: D5 H01W0000 arc: D6 H02W0001 arc: D7 H00L0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F0 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q5 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 E1_H02W0601 arc: M1 V01S0100 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: M4 E1_H01E0101 arc: M5 H00L0000 arc: M6 V00B0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0601 F6 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: V00T0100 Q3 arc: V01S0000 F7 arc: V01S0100 F2 arc: W1_H02W0501 Q7 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1111110000001100 word: SLICEC.K1.INIT 1111101001010000 word: SLICEC.K0.INIT 1111010110100000 word: SLICED.K1.INIT 1111110000001100 word: SLICED.K0.INIT 1010101011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R17C85:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: A1 S1_V02N0701 arc: A2 V02S0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 V00T0100 arc: A7 Q7 arc: B1 V00T0000 arc: C1 H02E0601 arc: C2 H02E0401 arc: C3 V02S0401 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 V02N0001 arc: C7 H01E0001 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 V00B0100 arc: D4 E1_H02W0201 arc: D5 V02S0401 arc: D6 W1_H02E0201 arc: D7 V02N0601 arc: E1_H01E0101 Q7 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F4 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0301 arc: M0 E1_H02W0601 arc: M2 H02W0601 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 H02E0001 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0501 F7 arc: S1_V02S0701 F5 arc: V00T0100 Q3 arc: V01S0000 F4 arc: V01S0100 F6 word: SLICEB.K1.INIT 1111000011110000 word: SLICEB.K0.INIT 1111000010101010 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1100100000001000 word: SLICED.K0.INIT 1010111110100000 word: SLICEC.K1.INIT 1010111110100000 word: SLICEC.K0.INIT 1010111110100000 word: SLICED.K1.INIT 1010101011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R17C86:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N3_V06S0303 arc: H00R0100 H02E0501 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02E0701 arc: V00B0100 V02N0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 V01N0101 arc: A2 W1_H02E0501 arc: A3 H02E0701 arc: A6 H02E0501 arc: B0 H02E0101 arc: B1 V01N0001 arc: B4 V02S0501 arc: B6 N1_V02S0501 arc: C1 S1_V02N0401 arc: C2 H00R0100 arc: C4 H02E0601 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0201 arc: D2 H01E0101 arc: D4 H00R0100 arc: D5 V02N0601 arc: D6 N1_V02S0401 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR0 H02W0301 arc: M0 W1_H02E0601 arc: M2 V00B0100 arc: M4 V00B0100 arc: M5 H02E0001 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F6 arc: N1_V02N0701 Q5 word: SLICED.K0.INIT 1101110110001000 word: SLICED.K1.INIT 1111111100000000 word: SLICEC.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1111101000001010 word: SLICEA.K0.INIT 0010001010101010 word: SLICEA.K1.INIT 0000110011001100 word: SLICEB.K1.INIT 1010101010101010 word: SLICEC.K0.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R17C87:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 V02S0601 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0201 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: A0 W1_H02E0501 arc: A2 W1_H02E0501 arc: B1 H02E0101 arc: B6 V01S0000 arc: C0 N1_V02S0401 arc: C2 V02S0401 arc: C3 H02E0401 arc: C6 E1_H02W0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 W1_H02E0201 arc: D6 V00B0000 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M2 H02E0601 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F0 arc: V01S0000 Q6 arc: V01S0100 F6 arc: W1_H02W0401 F6 word: SLICEB.K1.INIT 1111000011110000 word: SLICEA.K0.INIT 1111101001010000 word: SLICED.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110011001100 word: SLICEB.K0.INIT 1111010110100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R17C88:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0701 V02S0701 arc: H00R0000 H02E0601 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0201 arc: V00T0000 W1_H02E0201 arc: W1_H02W0201 E1_H01W0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H00L0000 Q0 arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M2 V00T0100 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: S1_V02S0201 Q2 arc: S1_V02S0501 Q5 arc: V00T0100 Q1 arc: V01S0000 Q2 word: SLICEA.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R18C24:PLC2 arc: S1_V02S0101 H06W0103 .tile R18C26:PLC2 arc: S3_V06S0103 H06W0103 .tile R18C27:PLC2 arc: W3_H06W0103 E3_H06W0003 .tile R18C29:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 N1_V02S0601 arc: W3_H06W0103 E3_H06W0003 .tile R18C30:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0401 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: A0 V02S0701 arc: A2 F5 arc: A3 F5 arc: A4 H02W0701 arc: A5 E1_H01W0000 arc: A6 H02W0701 arc: B0 E1_H02W0301 arc: B2 S1_V02N0301 arc: B4 S1_V02N0501 arc: B5 H00R0000 arc: B6 V00T0000 arc: C0 H02W0601 arc: C2 F4 arc: C3 F4 arc: C4 H02E0601 arc: C5 H02E0601 arc: C6 V00T0100 arc: D0 H00R0000 arc: D2 H02W0001 arc: D3 S1_V02N0001 arc: D4 E1_H01W0100 arc: D5 H02E0201 arc: D6 H00R0100 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: M0 V00B0000 arc: M2 V00B0100 arc: N1_V01N0001 F2 arc: V00B0000 F6 word: SLICEC.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 0011001000000010 word: SLICED.K0.INIT 0000110000001010 word: SLICEA.K0.INIT 0011101101111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111101111001000 word: SLICEB.K1.INIT 1111101011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R18C31:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 V06S0203 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 N1_V02S0401 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02W0101 arc: A0 F7 arc: A1 F7 arc: A2 V02S0701 arc: A3 V02S0501 arc: A4 V00B0000 arc: A6 E1_H01W0000 arc: A7 H00L0000 arc: B0 H00R0100 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 V02N0701 arc: B6 F3 arc: B7 V01S0000 arc: C0 F4 arc: C1 H00R0100 arc: C2 E1_H02W0401 arc: C3 N1_V02S0601 arc: C4 H02W0601 arc: C6 V00T0000 arc: C7 V02N0201 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V01S0100 arc: D2 H00R0000 arc: D3 H02W0001 arc: D4 V02N0601 arc: D6 H02E0001 arc: D7 V02N0601 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q4 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0601 F6 arc: V00B0000 Q4 arc: V01S0000 Q7 arc: V01S0100 F4 arc: W1_H02W0001 F2 arc: W1_H02W0201 Q2 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q7 word: SLICEB.K0.INIT 1000100010100000 word: SLICED.K1.INIT 0000010100000011 word: SLICEC.K0.INIT 0100010000001100 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K1.INIT 1100101000000000 word: SLICED.K0.INIT 0000111011111110 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C32:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 V06S0003 arc: A0 V02S0501 arc: A1 V02N0501 arc: A2 E1_H01E0001 arc: A3 H02W0501 arc: A4 H02W0501 arc: A5 H02W0501 arc: A7 H00R0000 arc: B0 V02N0101 arc: B2 H02W0101 arc: B3 V02S0301 arc: B4 V02N0701 arc: B5 V01S0000 arc: B7 N1_V02S0501 arc: C0 F4 arc: C1 F4 arc: C2 V02N0601 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V00T0100 arc: C7 E1_H01E0101 arc: CE0 V02S0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D3 H02E0001 arc: D4 H02W0001 arc: D5 S1_V02N0401 arc: D7 H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q1 arc: V01S0000 Q4 arc: W1_H02W0501 F5 arc: W1_H02W0601 Q6 word: SLICEC.K1.INIT 0000000010101100 word: SLICEC.K0.INIT 0001000100000011 word: SLICEB.K0.INIT 0000010011000100 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K1.INIT 0000010010001100 word: SLICEB.K1.INIT 0010001000110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C33:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 N1_V02S0401 arc: H00L0100 E1_H02W0101 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 N1_V02S0401 arc: V00T0000 N1_V02S0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 E1_H02W0501 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A5 Q5 arc: B0 V02N0301 arc: B1 Q1 arc: C0 H00L0000 arc: C1 H02W0401 arc: C5 V02N0001 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V02N0001 arc: D5 H00R0100 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H00R0100 Q7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00T0100 arc: M5 H00L0100 arc: M6 E1_H02W0401 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V00B0100 F5 arc: V01S0000 Q6 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C34:PLC2 arc: E1_H02E0101 V01N0101 arc: E3_H06E0203 V06N0203 arc: H00L0000 V02N0201 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W3_H06W0303 V01N0101 arc: A4 V00T0000 arc: B1 Q1 arc: C1 H00L0100 arc: C4 Q4 arc: CE0 S1_V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D4 E1_H02W0001 arc: E1_H01E0001 F4 arc: F1 F1_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0301 F1 arc: V00T0000 Q0 word: SLICEA.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000010101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R18C35:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0501 E3_H06W0303 arc: H00R0000 V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0501 H02W0501 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 W1_H02E0401 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 V02N0301 arc: B1 Q1 arc: C0 N1_V01N0001 arc: C1 H02W0601 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: F0 F5A_SLICE arc: H00L0100 Q3 arc: LSR0 V00B0000 arc: M0 H01E0001 arc: M1 H00R0100 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q1 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C36:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 S1_V02N0001 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 S3_V06N0103 arc: A0 H00L0100 arc: A1 H00L0100 arc: A5 Q5 arc: B0 H00R0100 arc: B1 Q1 arc: C0 N1_V01N0001 arc: C1 H00R0100 arc: C5 V02N0001 arc: CE0 H02W0101 arc: CE1 W1_H02E0101 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D5 E1_H01W0100 arc: E1_H01E0001 F0 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H00R0100 Q7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00L0000 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 H00L0000 arc: M6 H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: S1_V02S0101 Q3 arc: V00B0100 F5 arc: V01S0100 Q6 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1110010000000000 word: SLICEA.K1.INIT 1101100011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C37:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 S1_V02N0201 arc: H00R0000 H02W0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02W0401 arc: S3_V06S0203 H01E0001 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W3_H06W0203 E1_H01W0000 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 H00L0100 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H02E0101 arc: B3 V02N0301 arc: B4 V01S0000 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02E0601 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 V02N0001 arc: D3 E1_H02W0201 arc: D4 H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: H01W0100 Q5 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 H02W0601 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H02W0201 arc: M4 V00T0000 arc: M5 H02W0001 arc: M6 V00B0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: S3_V06S0003 F0 arc: V00B0000 F4 arc: V01S0000 Q4 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEC.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1000100011000000 word: SLICEB.K1.INIT 1011100011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C38:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 W3_H06E0203 arc: H00L0000 V02N0201 arc: H00R0000 H02W0401 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 H01E0101 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 W1_H02E0501 arc: A5 H02W0501 arc: A6 H02E0701 arc: A7 F5 arc: B0 V02N0301 arc: B1 W1_H02E0301 arc: B2 H01W0100 arc: B3 Q3 arc: B4 E1_H02W0301 arc: B5 E1_H02W0301 arc: B7 V02S0501 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 E1_H02W0401 arc: C3 W1_H02E0401 arc: C6 F4 arc: C7 H02E0401 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 E1_H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 V02N0001 arc: D3 W1_H02E0201 arc: D4 H02E0001 arc: D5 E1_H02W0001 arc: D6 N1_V02S0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0401 F6 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 F4 arc: H01W0100 Q3 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00T0000 arc: M6 H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F7 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: S1_V02S0401 F6 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: V01S0100 F7 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 arc: W3_H06W0203 F4 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1110001011111111 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 0001000100000000 word: SLICED.K0.INIT 1111111110100000 word: SLICEC.K1.INIT 0000000010001000 word: SLICED.K1.INIT 1011001110110011 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 .tile R18C39:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02E0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02E0601 arc: V00B0000 N1_V02S0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 V01N0001 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: B0 H00R0100 arc: B1 Q1 arc: B3 H02W0301 arc: B4 H02E0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C3 E1_H02W0401 arc: C4 V00T0100 arc: CE0 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D3 H02W0001 arc: D4 N1_V02S0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 F4 arc: H01W0100 F4 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M1 E1_H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: V00T0100 F3 arc: V01S0100 F0 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEB.K1.INIT 0000000000001100 word: SLICEC.K0.INIT 1100000011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R18C40:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02S0501 arc: H00L0100 H02W0301 arc: H00R0100 W1_H02E0501 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 W1_H02E0201 arc: S3_V06S0203 H06W0203 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 W3_H06E0203 arc: A0 H00L0000 arc: A7 Q7 arc: C0 V02N0401 arc: C7 V02N0001 arc: CE0 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D7 H02W0201 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: W1_H02W0501 F7 word: SLICED.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 1111000010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R18C41:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H02W0701 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A2 W1_H02E0501 arc: A3 H02W0501 arc: A4 F7 arc: A5 E1_H01W0000 arc: A6 N1_V02S0101 arc: A7 H02E0501 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 N1_V02S0101 arc: B4 W1_H02E0301 arc: B6 W1_H02E0101 arc: B7 V01S0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H02W0401 arc: C3 V02N0401 arc: C4 V02S0201 arc: C5 H02W0601 arc: C6 Q6 arc: C7 H02E0401 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 V00B0100 arc: D2 Q2 arc: D3 H02W0201 arc: D4 H02E0201 arc: D5 V02N0401 arc: D6 H01W0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q2 arc: E1_H02E0501 Q5 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 H02E0301 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M2 V00T0100 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N3_V06N0203 F4 arc: S3_V06S0003 F3 arc: S3_V06S0303 F5 arc: V00B0000 F6 arc: V01S0000 F0 word: SLICEC.K1.INIT 0000000010100000 word: SLICEB.K1.INIT 0000000000001010 word: SLICED.K0.INIT 0000001010001010 word: SLICEB.K0.INIT 0000000100100011 word: SLICEA.K0.INIT 1111111001010100 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 0000000000000001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C42:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 V01N0001 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0301 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0701 E3_H06W0203 arc: V00T0100 H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0701 arc: A2 H01E0001 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 F7 arc: A7 E1_H01W0000 arc: B0 V02S0301 arc: B1 V02S0101 arc: B2 H02W0301 arc: B4 E1_H02W0301 arc: B5 H01E0101 arc: B6 V02S0501 arc: B7 H01E0101 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 E1_H01W0000 arc: C4 H02E0601 arc: C5 V02N0001 arc: C6 F4 arc: C7 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 V02N0001 arc: D4 V02S0401 arc: D5 H00L0100 arc: D6 S1_V02N0601 arc: D7 V02S0401 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F2 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0100 F0 arc: M0 H02W0601 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q1 arc: N1_V02N0601 Q6 arc: N3_V06N0203 Q4 arc: V00B0100 F5 arc: V01S0100 Q3 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K1.INIT 0101000000110000 word: SLICEB.K0.INIT 1111111110111000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K1.INIT 0000110000001010 word: SLICEC.K0.INIT 1000100011000000 word: SLICED.K0.INIT 1100100011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R18C43:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0100 H02W0301 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N3_V06S0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 F7 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 N1_V02S0301 arc: A6 N1_V02S0301 arc: A7 N1_V01S0100 arc: B0 E1_H02W0101 arc: B1 F3 arc: B2 V02N0301 arc: B3 V02S0301 arc: B4 V01S0000 arc: B6 N1_V01S0000 arc: B7 H02W0301 arc: C0 H02E0601 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 H00R0100 arc: C4 E1_H02W0401 arc: C6 V00T0000 arc: C7 V02N0201 arc: CE0 H02E0101 arc: CE1 N1_V02S0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H00R0000 arc: D2 Q2 arc: D3 V00T0100 arc: D4 V02S0401 arc: D6 V02N0401 arc: D7 H00R0100 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F0 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M2 V00B0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F1 arc: N1_V02N0001 F0 arc: N1_V02N0201 F0 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 F2 arc: W1_H02W0001 F0 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 0010000000101010 word: SLICED.K0.INIT 0000010100010001 word: SLICEB.K0.INIT 0000010011000100 word: SLICEA.K0.INIT 1000100011111000 word: SLICEB.K1.INIT 0000000010101100 word: SLICED.K1.INIT 1100000010001000 word: SLICEA.K1.INIT 1111000011100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C44:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0201 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02W0701 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 H01E0101 arc: A0 V02S0501 arc: A2 V02S0501 arc: A4 F5 arc: A5 N1_V02S0101 arc: A7 N1_V01S0100 arc: B0 H02E0101 arc: B1 H02E0301 arc: B2 H00R0100 arc: B4 H02W0301 arc: B5 V02S0701 arc: B7 N1_V01S0000 arc: C0 V02N0601 arc: C1 H00L0000 arc: C2 H02E0401 arc: C4 V00T0000 arc: C5 V00B0100 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02E0201 arc: D2 H02E0001 arc: D4 F0 arc: D5 N1_V02S0601 arc: D7 H02E0001 arc: E1_H02E0401 F4 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q7 arc: M0 V00T0100 arc: M2 N1_V01N0001 arc: M6 V00B0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V02N0201 Q0 arc: V01S0000 Q7 arc: W1_H02W0001 Q0 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICEA.K1.INIT 0011000000000000 word: SLICED.K1.INIT 0101000000110000 word: SLICEB.K0.INIT 1111101011111100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 0101010000000100 word: SLICEA.K0.INIT 1110000000100000 word: SLICEC.K0.INIT 1100110010001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R18C45:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0401 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 F5 arc: A3 H00L0100 arc: A4 V02N0301 arc: A5 Q5 arc: A7 V02S0301 arc: B0 E1_H01W0100 arc: B2 V02S0301 arc: B3 V02N0301 arc: B4 V02N0701 arc: B5 V02N0701 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 E1_H01W0000 arc: C3 V02N0401 arc: C4 H02W0401 arc: C5 H02W0601 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 V02N0201 arc: D3 V00B0100 arc: D4 H02W0001 arc: D5 V01N0001 arc: D7 V00B0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M1 E1_H02W0001 arc: M3 H00L0000 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F7 arc: S1_V02S0101 Q3 arc: S1_V02S0501 Q5 arc: V00B0000 F4 arc: V01S0000 Q5 arc: V01S0100 Q3 arc: W1_H02W0101 Q1 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 0100011100000000 word: SLICEB.K1.INIT 0100000001001100 word: SLICEC.K0.INIT 0000010000010101 word: SLICED.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 0000000011001101 word: SLICEA.K0.INIT 1000101010001000 word: SLICEA.K1.INIT 0000101000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C46:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 V02N0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 H01E0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 N3_V06S0003 arc: W3_H06W0003 E1_H02W0001 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A2 H02W0501 arc: A3 H02E0501 arc: A4 V02N0301 arc: A5 N1_V02S0301 arc: A6 F7 arc: A7 F5 arc: B0 H02E0301 arc: B1 F3 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 V02N0501 arc: B5 V02S0701 arc: B6 E1_H02W0301 arc: B7 H02W0301 arc: C0 H02E0401 arc: C1 F4 arc: C2 V02S0401 arc: C3 H02E0601 arc: C4 H02E0401 arc: C5 V00T0100 arc: C6 V02N0001 arc: C7 W1_H02E0401 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0001 arc: D2 W1_H02E0001 arc: D3 V00B0100 arc: D4 V02N0601 arc: D5 V02N0601 arc: D6 H00R0100 arc: D7 F2 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F1 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M3 H00L0100 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S1_V02S0101 Q3 arc: S1_V02S0601 Q4 arc: V01S0000 Q0 arc: V01S0100 Q4 arc: W1_H02W0401 Q6 arc: W1_H02W0601 Q4 word: SLICEA.K0.INIT 0001000000010011 word: SLICEC.K0.INIT 0001000000010101 word: SLICEB.K1.INIT 0010000001110000 word: SLICEA.K1.INIT 1010101000000010 word: SLICEC.K1.INIT 0101000101000000 word: SLICEB.K0.INIT 1100101000000000 word: SLICED.K1.INIT 1111000011100000 word: SLICED.K0.INIT 1011101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C47:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0303 H01E0101 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 V02S0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V01N0101 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0501 arc: A2 V00B0000 arc: A4 F5 arc: A5 V02S0101 arc: A6 N1_V02S0301 arc: A7 Q7 arc: B0 S1_V02N0101 arc: B2 W1_H02E0301 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: C0 H02W0401 arc: C2 V02N0401 arc: C4 E1_H02W0601 arc: C5 V02N0001 arc: C6 E1_H01E0101 arc: C7 V00T0100 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 Q2 arc: D4 N1_V02S0601 arc: D5 V02N0401 arc: D6 V02S0401 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F4 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M2 V00T0000 arc: M3 H00R0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: N1_V02N0001 F0 arc: N1_V02N0201 Q0 arc: N1_V02N0401 F6 arc: V00B0000 Q6 arc: V00T0000 F0 arc: V00T0100 Q3 arc: V01S0000 F7 arc: V01S0100 Q5 arc: W1_H02W0101 Q3 arc: W1_H02W0501 Q7 word: SLICEB.K0.INIT 0000010011000100 word: SLICEC.K1.INIT 0011000001010000 word: SLICEC.K0.INIT 1111101000000000 word: SLICED.K1.INIT 1100000010001000 word: SLICEA.K0.INIT 1100000011101010 word: SLICED.K0.INIT 1010000010001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C48:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 V02S0201 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 F5 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V02N0301 arc: A5 V02N0301 arc: A6 V02S0301 arc: B1 N1_V02S0101 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 H02E0301 arc: B5 N1_V01S0000 arc: B6 V02S0501 arc: C0 H00L0000 arc: C1 F4 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 N1_V02S0001 arc: C6 V02N0001 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 E1_H02W0201 arc: E1_H01E0001 F6 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0301 F1 arc: V01S0000 F0 word: SLICEA.K0.INIT 0000000011110000 word: SLICED.K0.INIT 0000001100000101 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011100011111111 word: SLICEC.K1.INIT 0001000100000101 word: SLICEC.K0.INIT 0010001000001010 word: SLICEA.K1.INIT 1100100011111011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C49:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02S0701 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 E3_H06W0003 arc: A0 F7 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 H02E0701 arc: A6 H02E0501 arc: A7 S1_V02N0101 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 V02N0301 arc: B3 N1_V02S0301 arc: B4 H02W0101 arc: B6 H02W0301 arc: B7 V02S0501 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 N1_V02S0601 arc: C3 S1_V02N0401 arc: C4 S1_V02N0201 arc: C6 H02W0601 arc: C7 V00T0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D2 V02N0201 arc: D3 N1_V01S0000 arc: D4 E1_H01W0100 arc: D6 H00L0100 arc: D7 N1_V02S0401 arc: E1_H01E0001 F2 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H00R0000 F4 arc: H01W0000 Q5 arc: H01W0100 Q5 arc: M0 V00B0100 arc: M5 H02E0001 arc: M6 V00T0100 arc: M7 H00R0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: S3_V06S0203 Q7 arc: V01S0100 F7 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICEB.K0.INIT 0001000100000011 word: SLICEC.K0.INIT 1110000001000000 word: SLICED.K1.INIT 0100010101000000 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1111111111110011 word: SLICEB.K1.INIT 0000101100001000 word: SLICED.K0.INIT 0101010101010001 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R18C50:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 V06S0003 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 E1_H01E0001 arc: A3 H02E0701 arc: A4 N1_V02S0101 arc: A5 N1_V01N0101 arc: A6 F5 arc: A7 Q7 arc: B0 V01N0001 arc: B2 N1_V02S0101 arc: B3 H01W0100 arc: B4 H02W0301 arc: B5 V01S0000 arc: B6 V02S0501 arc: B7 V01S0000 arc: C0 F4 arc: C1 F4 arc: C2 H02W0401 arc: C3 H02E0601 arc: C4 Q4 arc: C5 V02N0001 arc: C6 H02E0401 arc: C7 N1_V02S0201 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 V02S0401 arc: D6 H00L0100 arc: D7 H02E0001 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 Q1 arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 V00B0100 arc: M0 H01E0001 arc: M1 H02W0001 arc: M2 N1_V01N0001 arc: M4 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: N1_V02N0601 F6 arc: V01S0000 Q2 arc: W1_H02W0101 Q1 arc: W1_H02W0501 F7 word: SLICEA.K0.INIT 1101110111011000 word: SLICEB.K0.INIT 0000010000000111 word: SLICEC.K0.INIT 0000100001001100 word: SLICED.K1.INIT 0000000010101100 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K1.INIT 1101100000000000 word: SLICEC.K1.INIT 0000101000001100 word: SLICED.K0.INIT 1111000011100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C51:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V01N0001 arc: H00L0100 E1_H02W0301 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0101 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0203 E3_H06W0203 arc: A0 H02W0501 arc: A2 H02W0501 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 V02N0101 arc: B3 H02W0301 arc: C1 E1_H01W0000 arc: C3 E1_H01W0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 H02W0001 arc: D3 V00B0100 arc: E1_H01E0001 F1 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: LSR0 W1_H02E0301 arc: M0 H02W0601 arc: M1 H00L0100 arc: M2 H02W0601 arc: M6 V00T0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 word: SLICEA.K0.INIT 0000000010111011 word: SLICEA.K1.INIT 0000000011110011 word: SLICEB.K0.INIT 0010001000000000 word: SLICEB.K1.INIT 0000000011000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R18C52:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V01N0101 arc: H00L0000 E1_H02W0001 arc: H00R0100 H02W0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00T0000 V02S0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V01N0001 arc: A0 F5 arc: A1 H02W0701 arc: A2 H00L0100 arc: A3 W1_H02E0701 arc: A4 H02W0501 arc: A5 N1_V02S0301 arc: A6 N1_V01S0100 arc: A7 V02S0101 arc: B0 F3 arc: B1 F3 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H02E0301 arc: B5 N1_V01S0000 arc: B6 N1_V01S0000 arc: B7 N1_V02S0701 arc: C0 H00R0100 arc: C2 H02E0601 arc: C3 N1_V01N0001 arc: C4 H02E0401 arc: C5 H02E0601 arc: C6 H02W0401 arc: C7 H02W0401 arc: CE0 N1_V02S0201 arc: CE1 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 V02N0201 arc: D3 V02N0001 arc: D4 E1_H02W0201 arc: D5 S1_V02N0601 arc: D6 V02N0401 arc: D7 V02S0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q1 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H00R0000 F4 arc: H01W0000 Q3 arc: H01W0100 Q4 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M1 H02W0001 arc: M3 H00R0000 arc: M6 V00B0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F6 arc: N1_V02N0301 Q3 arc: N1_V02N0601 F4 arc: N1_V02N0701 Q7 arc: V01S0000 F4 arc: V01S0100 F0 arc: W1_H02W0501 Q7 word: SLICEC.K0.INIT 1101010111000000 word: SLICED.K0.INIT 1100000010100000 word: SLICED.K1.INIT 1010111111001111 word: SLICEC.K1.INIT 0000001100000101 word: SLICEB.K1.INIT 0010011100000000 word: SLICEB.K0.INIT 0000001100000101 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1111111111101110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C53:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02N0701 arc: A1 W1_H02E0501 arc: A2 V00B0000 arc: A3 V00T0000 arc: A4 V00T0000 arc: A5 H02W0501 arc: A6 W1_H02E0501 arc: A7 Q7 arc: B0 V00B0000 arc: B1 H02W0301 arc: B2 H00R0100 arc: B3 Q3 arc: B4 V01S0000 arc: B5 N1_V02S0501 arc: B6 H01E0101 arc: B7 H02W0301 arc: C0 H02W0401 arc: C2 V02S0601 arc: C3 W1_H02E0601 arc: C4 V00B0100 arc: C5 F4 arc: C7 H02W0401 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 E1_H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H01E0101 arc: D2 V00B0100 arc: D3 H02E0201 arc: D4 V02S0601 arc: D5 F2 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q3 arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M0 H01E0001 arc: M3 H00R0000 arc: M4 H02E0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V00T0000 Q0 arc: V01S0000 Q3 arc: V01S0100 Q7 arc: W1_H02W0101 F3 arc: W1_H02W0301 F1 arc: W1_H02W0601 F6 word: SLICED.K1.INIT 1000110010000000 word: SLICEA.K0.INIT 0100010101000000 word: SLICEA.K1.INIT 1011101110001000 word: SLICED.K0.INIT 1010101011001100 word: SLICEC.K0.INIT 0000000011001010 word: SLICEB.K0.INIT 1100000010100000 word: SLICEC.K1.INIT 0101010101010001 word: SLICEB.K1.INIT 0000001100000101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C54:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V06S0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 V02N0301 arc: A5 N1_V01N0101 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: B4 H02W0301 arc: B5 V02N0501 arc: B6 H01E0101 arc: C0 W1_H02E0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 V02S0201 arc: C5 E1_H01E0101 arc: C6 H01E0001 arc: C7 V01N0101 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 E1_H02W0201 arc: D5 V01N0001 arc: D6 V02N0601 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q4 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 V00B0100 arc: M3 H02E0201 arc: M7 H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V02N0601 F4 arc: S1_V02S0301 Q3 arc: S1_V02S0501 Q7 arc: V00B0100 F5 arc: V01S0000 Q7 arc: V01S0100 F6 word: SLICED.K0.INIT 1111110000000000 word: SLICED.K1.INIT 1111101000001010 word: SLICEC.K1.INIT 0011000100100000 word: SLICEA.K0.INIT 0011011000110011 word: SLICEA.K1.INIT 0001111000001111 word: SLICEB.K0.INIT 0001111011110000 word: SLICEB.K1.INIT 0001111000001111 word: SLICEC.K0.INIT 1011001110100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C55:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 V02S0001 arc: H00L0100 H02E0101 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 H02W0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0701 arc: A2 H02W0701 arc: A4 H02W0701 arc: A6 H02W0701 arc: A7 H02W0701 arc: B0 E1_H01W0100 arc: B2 E1_H01W0100 arc: B4 H00R0000 arc: B6 V00T0000 arc: C0 V02N0401 arc: C2 V02N0401 arc: C4 N1_V02S0201 arc: C5 V00B0100 arc: C6 N1_V02S0201 arc: C7 N1_V02S0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 V00B0100 arc: D2 N1_V02S0201 arc: D3 V00B0100 arc: D4 H02W0001 arc: D6 V02N0401 arc: D7 E1_H01W0100 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 H02W0401 arc: M5 H02E0001 arc: M6 H02W0401 arc: M7 H00R0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0501 Q7 arc: V01S0000 Q7 word: SLICEA.K0.INIT 1010101010100010 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1010101010100010 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1010100010101010 word: SLICEC.K1.INIT 1111000011110000 word: SLICED.K0.INIT 0010101000100010 word: SLICED.K1.INIT 0000101010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C56:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 H02W0001 arc: H00L0100 H02E0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02W0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 N1_V01S0100 arc: A0 S1_V02N0501 arc: A4 V02S0101 arc: A6 F7 arc: A7 Q7 arc: B0 V01N0001 arc: B3 Q3 arc: B4 N1_V02S0501 arc: B6 F3 arc: C0 H02W0601 arc: C2 F4 arc: C3 W1_H02E0401 arc: C4 V02S0201 arc: C6 V02N0001 arc: C7 W1_H02E0401 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 N1_V01S0000 arc: D4 S1_V02N0601 arc: D6 H00R0100 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 H02W0501 arc: M3 H02E0201 arc: M4 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q4 arc: N1_V02N0301 Q3 arc: N1_V02N0701 Q7 arc: S1_V02S0001 Q0 arc: S1_V02S0201 F2 arc: V00B0000 Q4 arc: V01S0000 F6 arc: V01S0100 Q3 arc: W1_H02W0001 Q0 arc: W1_H02W0401 F6 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 word: SLICED.K1.INIT 0101000001011111 word: SLICEB.K1.INIT 0011000000111111 word: SLICED.K0.INIT 0000000011001010 word: SLICEB.K0.INIT 1111000000001111 word: SLICEC.K0.INIT 1100101000110101 word: SLICEA.K0.INIT 0110111101101111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C57:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0203 E3_H06W0103 arc: A2 H00L0100 arc: A4 N1_V01S0100 arc: A7 H02E0501 arc: B0 V00B0000 arc: B3 V02S0301 arc: B5 H00L0000 arc: B6 V01S0000 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H02E0401 Q6 arc: E1_H02E0701 Q7 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q3 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00T0000 arc: M3 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: S1_V02S0701 Q7 arc: V01S0000 Q0 arc: V01S0100 Q5 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R18C58:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 H02W0401 arc: V00T0000 H02W0201 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 E1_H02W0301 arc: A1 V02N0501 arc: A2 H02W0501 arc: A3 V00T0000 arc: A7 H00L0000 arc: B0 S1_V02N0301 arc: B4 H02W0301 arc: B5 H02E0301 arc: B6 V00B0000 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: S1_V02S0301 Q3 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q4 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R18C59:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: H00L0100 H02W0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0203 E1_H01W0000 arc: A0 E1_H01E0001 arc: A4 F5 arc: A5 W1_H02E0701 arc: A6 V02N0101 arc: A7 H00L0000 arc: B1 V02S0101 arc: B4 V02S0501 arc: B5 N1_V01S0000 arc: B6 H02E0301 arc: B7 V02N0701 arc: C4 V00B0100 arc: C5 V00B0100 arc: C6 W1_H02E0401 arc: C7 H01E0001 arc: CE0 H02W0101 arc: CE1 H02E0101 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D4 E1_H01W0100 arc: D5 H02E0201 arc: D6 E1_H02W0001 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q1 arc: H01W0100 F4 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: V01S0000 F6 arc: V01S0100 F7 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q4 arc: W1_H02W0501 Q5 word: SLICEC.K1.INIT 1001100110010110 word: SLICEC.K0.INIT 0010100000000000 word: SLICED.K0.INIT 1000010001001000 word: SLICED.K1.INIT 0000000000000100 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R18C60:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0701 E3_H06W0203 arc: A0 V02S0501 arc: A5 V00B0000 arc: A7 E1_H01W0000 arc: C1 N1_V01S0100 arc: C2 H00L0100 arc: C4 H02W0601 arc: C5 N1_V02S0201 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 Q2 arc: D4 V02S0401 arc: D5 H02E0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F5 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 F7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0401 Q4 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F2 arc: W3_H06W0203 Q4 word: SLICED.K1.INIT 1010000000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1010101000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K1.INIT 1010000000000000 word: SLICEB.K0.INIT 0000000000001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R18C61:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: H00L0100 H02W0301 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 E1_H02W0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0601 E1_H02W0601 arc: A1 H02W0501 arc: A4 H02W0701 arc: A6 H00R0000 arc: A7 H02W0501 arc: B1 V02S0301 arc: B3 Q3 arc: B4 H02W0301 arc: B7 H02W0301 arc: C0 E1_H02W0601 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00L0000 arc: C6 E1_H02W0601 arc: C7 V02S0001 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00T0100 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 E1_H02W0201 arc: D6 H00L0100 arc: D7 E1_H02W0201 arc: E1_H01E0101 F6 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0000 Q0 arc: H01W0100 F4 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F6 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q3 arc: V00T0100 Q3 arc: V01S0000 F2 arc: V01S0100 Q3 arc: W1_H02W0401 F6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 0000000010000000 word: SLICEB.K0.INIT 0000111100000000 word: SLICEC.K0.INIT 1000100000000000 word: SLICED.K1.INIT 1010100000100000 word: SLICEB.K1.INIT 0011110000000000 word: SLICED.K0.INIT 1010101011111010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C62:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06W0303 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 S3_V06N0203 arc: V00T0100 V02S0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A4 N1_V02S0301 arc: A5 Q5 arc: A6 N1_V02S0301 arc: B0 H01W0100 arc: B1 Q1 arc: B4 V02N0701 arc: B6 V02N0501 arc: C0 V02N0401 arc: C1 V02N0601 arc: C4 E1_H02W0601 arc: C5 V00T0000 arc: C6 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0201 arc: D4 H02W0001 arc: D5 V02N0601 arc: D6 H02W0001 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H01W0100 Q7 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0100 F5 arc: V00T0000 Q2 arc: W1_H02W0601 F6 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEC.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 0000100000000000 word: SLICED.K0.INIT 0000000010000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R18C63:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: E3_H06E0203 W1_H02E0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H06E0303 arc: S1_V02S0201 H02W0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0103 E3_H06W0103 .tile R18C64:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 H02W0401 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 E1_H02W0601 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: B0 H01W0100 arc: B1 Q1 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 N1_V01N0001 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0001 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H01W0100 Q1 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: S1_V02S0001 F2 arc: V00T0000 Q2 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K0.INIT 1111000010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R18C65:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 V02N0201 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 S1_V02N0201 arc: V00T0100 V02N0701 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V02S0401 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02W0701 arc: A2 H02W0701 arc: A3 V02N0701 arc: A5 E1_H01W0000 arc: A6 F5 arc: A7 Q7 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 V02N0301 arc: B3 V02N0301 arc: B5 H02W0101 arc: C0 H00L0000 arc: C2 H00L0000 arc: C3 H02W0401 arc: C5 H02W0601 arc: C6 N1_V02S0001 arc: C7 E1_H01E0101 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0201 arc: D2 V00T0100 arc: D3 V02N0201 arc: D5 H02W0001 arc: D7 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: E1_H02E0501 F5 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 E1_H02W0601 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 F6 arc: S1_V02S0701 F7 arc: V01S0000 F2 arc: W1_H02W0701 F5 word: SLICED.K1.INIT 1111000010101010 word: SLICEC.K1.INIT 0000001000000000 word: SLICED.K0.INIT 1010000010100000 word: SLICEB.K0.INIT 0010111100001111 word: SLICEB.K1.INIT 0010000010101010 word: SLICEA.K0.INIT 0000111110001111 word: SLICEA.K1.INIT 0000000011001100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 .tile R18C66:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A1 V02N0501 arc: A2 E1_H02W0701 arc: A6 F5 arc: B1 S1_V02N0301 arc: B2 V02N0301 arc: B3 E1_H01W0100 arc: B5 E1_H02W0301 arc: B6 V00T0000 arc: C1 H00L0000 arc: C2 H00R0100 arc: C3 H02W0401 arc: C5 E1_H02W0401 arc: C6 V02N0001 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D2 F0 arc: D5 F2 arc: D6 V01N0001 arc: D7 V01N0001 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M1 H00R0000 arc: M5 V01S0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N1_V02N0301 Q1 arc: V01S0000 F6 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1100000011000000 word: SLICEC.K1.INIT 1100000000000000 word: SLICED.K1.INIT 0000111100000000 word: SLICED.K0.INIT 0011101100110011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R18C67:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 H01E0001 arc: S1_V02S0301 E1_H02W0301 arc: V00B0100 H02E0701 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0601 H01E0001 arc: A0 H00L0100 arc: A1 H02E0501 arc: A3 E1_H02W0701 arc: A4 H02W0501 arc: A5 V00T0000 arc: A6 F7 arc: A7 V02N0101 arc: B0 V00B0000 arc: B1 Q1 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 H02W0101 arc: B6 N1_V01S0000 arc: B7 S1_V02N0701 arc: C0 H02E0601 arc: C1 N1_V01N0001 arc: C3 E1_H02W0401 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 F4 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D3 V00T0100 arc: D4 V01N0001 arc: D5 H02E0201 arc: D7 H02W0201 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 F2 arc: M0 E1_H02W0601 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: S1_V02S0001 F0 arc: V00B0000 Q6 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1111010111011101 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1000000010000000 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R18C68:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02W0001 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0701 N1_V02S0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02N0501 arc: W3_H06W0303 V06N0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A4 E1_H02W0501 arc: A5 E1_H02W0701 arc: A6 F5 arc: A7 E1_H02W0501 arc: B0 S1_V02N0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 V00B0100 arc: B5 H02E0301 arc: B6 S1_V02N0701 arc: C0 H00L0100 arc: C1 S1_V02N0601 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C4 E1_H02W0401 arc: C5 H02W0401 arc: C6 S1_V02N0001 arc: C7 E1_H02W0401 arc: CE0 N1_V02S0201 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 Q2 arc: D3 V01S0100 arc: D4 V02N0401 arc: D5 V02N0401 arc: D7 H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q4 arc: H01W0100 Q7 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 H02E0601 arc: M3 H00L0000 arc: M4 W1_H02E0401 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00T0100 F3 arc: V01S0100 Q6 arc: W1_H02W0401 F6 arc: W1_H02W0601 F4 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICED.K1.INIT 1010000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1000000010000000 word: SLICEC.K0.INIT 0000000000000001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R18C69:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H02E0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0303 E1_H01W0100 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 S3_V06N0103 arc: A0 E1_H01E0001 arc: A1 V01N0101 arc: A2 H00L0100 arc: A3 H00L0100 arc: A7 Q7 arc: B0 V02N0101 arc: B1 Q1 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 V02N0701 arc: C0 V02N0401 arc: C1 V02N0601 arc: C2 V02N0601 arc: C3 V02N0401 arc: C4 Q4 arc: C7 H02E0601 arc: CE0 E1_H02W0101 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 S1_V02N0001 arc: D2 V02N0201 arc: D3 V02N0001 arc: D4 V02N0601 arc: D7 V01N0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 H02W0601 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 F2 arc: S1_V02S0201 F0 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: V00B0100 F7 arc: V01S0000 F2 word: SLICED.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1100110011110000 word: SLICEB.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C70:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02S0201 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02N0701 arc: A0 H00L0100 arc: A1 S1_V02N0501 arc: A2 V01N0101 arc: A3 V01N0101 arc: A4 V02N0101 arc: A5 Q5 arc: B0 H02W0301 arc: B1 Q1 arc: B2 V02N0101 arc: B3 Q3 arc: C0 W1_H02E0601 arc: C1 E1_H01W0000 arc: C2 N1_V01N0001 arc: C3 W1_H02E0601 arc: C4 Q4 arc: C5 W1_H02E0601 arc: CE0 H02E0101 arc: CE1 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H01W0000 arc: D5 H00R0100 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 Q6 arc: H01W0100 F2 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q3 arc: S1_V02S0001 F0 arc: S1_V02S0401 F4 arc: V00B0100 F5 word: SLICEC.K0.INIT 1111101001010000 word: SLICEC.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R18C71:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 H02W0601 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0203 V06N0203 arc: A4 N1_V01N0101 arc: A5 E1_H02W0501 arc: A7 Q7 arc: B5 N1_V02S0501 arc: C4 Q4 arc: C5 E1_H02W0601 arc: C7 V00T0000 arc: CE0 V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 V02N0601 arc: D5 V00B0000 arc: D7 V02N0601 arc: E1_H02E0701 F5 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 H00L0100 arc: M4 V00T0100 arc: M5 H00R0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q3 arc: S1_V02S0501 F7 arc: V00T0000 Q2 arc: V01S0000 F4 arc: V01S0100 Q5 arc: W1_H02W0301 Q1 word: SLICEC.K1.INIT 0000001000000000 word: SLICEC.K0.INIT 1111000010101010 word: SLICED.K1.INIT 1010101011110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R18C72:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 H02W0201 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02E0401 arc: V00B0100 H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 S1_V02N0601 arc: A1 F7 arc: A2 V02S0501 arc: A6 V02N0301 arc: B0 V02S0301 arc: B1 V00B0000 arc: B4 V02S0701 arc: B6 V02S0501 arc: B7 F3 arc: C1 E1_H02W0401 arc: C2 N1_V02S0601 arc: C3 V02S0401 arc: C5 E1_H02W0401 arc: C6 Q6 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V02N0201 arc: D2 Q2 arc: D3 V00B0100 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 E1_H02W0001 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q2 arc: E1_H02E0501 F5 arc: E1_H02E0701 F7 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F1 arc: N3_V06N0203 F4 arc: S3_V06S0003 Q0 arc: S3_V06S0203 F4 arc: V00B0000 F4 arc: V01S0000 Q0 arc: V01S0100 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEC.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000000000110011 word: SLICED.K1.INIT 0011001100000011 word: SLICEA.K0.INIT 0000000011001100 word: SLICEB.K0.INIT 0101000010100000 word: SLICED.K0.INIT 0111100000000000 word: SLICEB.K1.INIT 0000000000001111 word: SLICEA.K1.INIT 0000000010101000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R18C73:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0103 arc: H00L0000 N1_V02S0201 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 S3_V06N0103 arc: A1 V02N0501 arc: A2 W1_H02E0701 arc: A3 V00B0000 arc: A4 H02E0701 arc: A6 V02S0301 arc: A7 V02S0101 arc: B0 V00T0000 arc: B2 H00R0000 arc: B4 F3 arc: B6 H02W0101 arc: B7 V02S0701 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 E1_H01W0000 arc: C3 V02N0601 arc: C4 H01E0001 arc: C6 V02N0001 arc: C7 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 V01S0100 arc: D3 V02S0001 arc: D4 V02S0601 arc: D6 V02N0601 arc: D7 V01N0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: E1_H02E0201 F0 arc: E1_H02E0601 F4 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: M0 V00T0100 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: N1_V01N0101 Q2 arc: N3_V06N0103 Q2 arc: S3_V06S0003 F0 arc: V01S0000 Q2 arc: V01S0100 F7 arc: W1_H02W0201 F0 word: SLICEB.K1.INIT 1111000001010000 word: SLICEA.K0.INIT 0000000000000011 word: SLICEA.K1.INIT 0000000010101111 word: SLICED.K0.INIT 0001000000000000 word: SLICED.K1.INIT 1100110000001000 word: SLICEB.K0.INIT 1111111110101110 word: SLICEC.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000001000100010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R18C74:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02N0401 arc: E3_H06E0103 V06S0103 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H01E0101 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06N0203 arc: W3_H06W0203 V06N0203 arc: A0 F7 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A4 V02N0101 arc: A6 H02W0501 arc: A7 E1_H02W0701 arc: B0 H00R0100 arc: B2 V01N0001 arc: B3 E1_H01W0100 arc: B4 H00L0000 arc: B6 F3 arc: B7 V00B0100 arc: C0 E1_H01W0000 arc: C1 H02W0601 arc: C2 H02E0401 arc: C3 W1_H02E0601 arc: C4 W1_H02E0601 arc: C6 V01N0101 arc: C7 V00T0100 arc: D0 E1_H02W0201 arc: D1 H02W0201 arc: D2 H00R0000 arc: D3 E1_H02W0001 arc: D4 E1_H02W0001 arc: D6 F0 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: M4 E1_H01E0101 arc: N1_V01N0001 F2 arc: W1_H02W0401 F6 word: SLICEB.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICED.K1.INIT 1000010000100001 word: SLICEC.K0.INIT 1010010110000100 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 0010000110000100 word: SLICEA.K0.INIT 1000000000000000 word: SLICED.K0.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R18C75:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 V06S0303 arc: H00L0000 S1_V02N0001 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0301 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: A1 V01N0101 arc: A3 V01N0101 arc: A4 V02N0301 arc: A5 E1_H02W0701 arc: A6 F7 arc: A7 V02S0301 arc: B1 H02W0101 arc: B2 F3 arc: B3 E1_H02W0301 arc: B4 V00B0100 arc: B5 H02W0301 arc: B6 S1_V02N0701 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C1 V02N0401 arc: C2 S1_V02N0401 arc: C3 H00L0000 arc: C4 V02S0001 arc: C5 E1_H02W0601 arc: C6 F4 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 S1_V02N0001 arc: D2 V00T0100 arc: D3 V02N0001 arc: D4 H02W0001 arc: D5 S1_V02N0401 arc: D6 V00B0000 arc: D7 S1_V02N0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q0 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 arc: V01S0000 F2 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0401 F6 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 0000000000001111 word: SLICEC.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1000000000000000 word: SLICEB.K0.INIT 1100000000001100 word: SLICEA.K1.INIT 1000001001000001 word: SLICEB.K1.INIT 1111010100110001 word: SLICEC.K1.INIT 1000010000100001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R18C76:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 E1_H02W0601 arc: A0 V02S0501 arc: A2 V02N0701 arc: A3 V01N0101 arc: A4 V02N0301 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: B2 V01N0001 arc: B3 Q3 arc: B4 V01S0000 arc: B5 H00L0000 arc: B6 V00B0000 arc: B7 V00T0000 arc: CE1 V02N0201 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F3 arc: LSR0 H02E0501 arc: LSR1 E1_H02W0301 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 H02E0401 arc: M7 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: V01S0100 Q2 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011010 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011010 word: SLICED.K1.INIT 1001100110011100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C77:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0100 V02S0501 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V06N0203 arc: A0 H00L0000 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 S1_V02N0701 arc: A4 E1_H02W0701 arc: A5 Q5 arc: A6 H02W0701 arc: A7 Q7 arc: B0 V00B0000 arc: B1 V01N0001 arc: B2 V02N0101 arc: B3 Q3 arc: B4 H02E0301 arc: B5 V02N0701 arc: B6 V01S0000 arc: B7 V02N0501 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F1 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 H00L0100 arc: M4 H02W0401 arc: M5 E1_H02W0001 arc: M6 V00B0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F2 arc: V00T0000 Q2 arc: V01S0000 Q6 arc: V01S0100 F0 arc: W1_H02W0501 F5 arc: W3_H06W0203 F7 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011100 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011010 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011010 word: SLICED.K1.INIT 1001100110011100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C78:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 V01N0101 arc: A0 V02S0501 arc: A1 H00L0000 arc: A5 E1_H02W0701 arc: A7 H02W0501 arc: B0 V00B0000 arc: B1 Q1 arc: B5 E1_H02W0101 arc: B7 V02S0701 arc: C5 H02W0401 arc: C7 E1_H02W0601 arc: CE0 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 H00R0100 arc: M4 V00T0100 arc: M6 H02E0401 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0401 F6 arc: V01S0000 Q7 arc: W1_H02W0101 F1 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1110110010100000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1110101011000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C79:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E1_H01W0000 arc: A2 H00L0100 arc: A3 V02S0701 arc: A4 S1_V02N0301 arc: A5 V00T0000 arc: A6 V02S0301 arc: A7 S1_V02N0101 arc: B0 V02S0101 arc: B2 V02N0301 arc: B3 W1_H02E0101 arc: B4 H00R0000 arc: B5 V00B0100 arc: B6 H02W0301 arc: B7 E1_H02W0101 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R18C80:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02N0201 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: V00B0000 V02S0201 arc: V00T0000 H02W0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 N1_V01S0100 arc: A0 V02N0501 arc: A1 S1_V02N0701 arc: A2 V02S0501 arc: A3 V00T0000 arc: A4 H02W0701 arc: A5 S1_V02N0301 arc: A6 W1_H02E0501 arc: A7 H02E0501 arc: B0 V00B0000 arc: B1 V02N0101 arc: B2 H00L0000 arc: B3 S1_V02N0101 arc: B4 S1_V02N0501 arc: B5 H02E0301 arc: B6 W1_H02E0101 arc: B7 V02N0701 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F1 arc: LSR1 E1_H02W0501 arc: M5 H00R0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N3_V06N0203 F4 arc: V01S0000 Q5 arc: V01S0100 F0 arc: W1_H02W0601 F6 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C81:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0201 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02E0301 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 N1_V01S0100 arc: A0 V02S0701 arc: A1 H02E0701 arc: A2 E1_H02W0701 arc: A3 V02N0501 arc: A4 N1_V02S0101 arc: B0 V00T0000 arc: B1 H02E0101 arc: B5 E1_H02W0101 arc: B6 H02W0101 arc: B7 E1_H02W0301 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F2 arc: E1_H02E0101 Q3 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 V00B0000 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00L0000 arc: M3 H00R0100 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F4 arc: N1_V02N0101 F3 arc: N1_V02N0501 F5 arc: N1_V02N0601 F6 arc: N3_V06N0003 F0 arc: S1_V02S0601 Q4 arc: V01S0000 Q3 arc: V01S0100 Q4 arc: W1_H02W0101 Q3 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q1 arc: W1_H02W0401 Q4 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C82:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0303 S3_V06N0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0303 N3_V06S0203 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 N3_V06S0203 arc: A4 N1_V01S0100 arc: B0 E1_H01W0100 arc: B4 H02E0101 arc: B5 N1_V01S0000 arc: C5 H01E0001 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D5 H02E0001 arc: E1_H01E0101 F4 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 H02E0301 arc: M5 H02W0001 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F0 arc: N1_V02N0501 Q5 arc: S1_V02S0501 F5 arc: V01S0000 F4 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICEC.K0.INIT 1010101011001100 word: SLICEC.K1.INIT 1100110011110000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C83:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02S0601 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00T0000 H02E0201 arc: V00T0100 H02E0301 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 V06S0003 arc: A0 W1_H02E0701 arc: A3 V02N0501 arc: A5 Q5 arc: A6 W1_H02E0501 arc: A7 E1_H02W0701 arc: B0 H02W0301 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 V02S0501 arc: C3 V02N0401 arc: C4 Q4 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D3 S1_V02N0001 arc: D4 W1_H02E0201 arc: D5 W1_H02E0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0101 F4 arc: E1_H02E0101 Q3 arc: E3_H06E0003 F0 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M2 N1_V01N0001 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: S1_V02S0501 F5 arc: S3_V06S0303 F5 arc: V01S0100 F0 arc: W1_H02W0001 F2 arc: W1_H02W0101 Q3 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1100000010001000 word: SLICED.K0.INIT 0101000011110000 word: SLICED.K1.INIT 0101000011110000 word: SLICEA.K0.INIT 1110111000100010 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1010101011001100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C84:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02S0601 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 H06E0303 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 N1_V01S0000 arc: A0 V02S0701 arc: A3 V01N0101 arc: A5 V02S0301 arc: A6 N1_V02S0301 arc: B1 V02N0301 arc: B3 V02S0301 arc: B5 S1_V02N0501 arc: C0 S1_V02N0601 arc: C1 S1_V02N0401 arc: C3 H00L0100 arc: C5 V02S0001 arc: C6 H02E0601 arc: CE0 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 S1_V02N0201 arc: D3 V02N0201 arc: D5 V01N0001 arc: D6 H02E0001 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H00L0000 F2 arc: LSR0 H02E0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 N1_V01N0001 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F4 arc: N1_V02N0401 Q6 arc: N3_V06N0103 Q1 arc: V01S0100 F6 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1011100000000000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1110000001000000 word: SLICEA.K0.INIT 0101000011110000 word: SLICEA.K1.INIT 0011000011110000 word: SLICED.K0.INIT 1010101011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C85:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02S0701 arc: H00L0100 E1_H02W0101 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 H02W0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0701 S1_V02N0701 arc: A1 V01N0101 arc: A4 V00T0000 arc: A5 E1_H02W0501 arc: A6 F5 arc: A7 F5 arc: B1 V02S0101 arc: B2 H02E0301 arc: B3 V02N0301 arc: B4 N1_V01S0000 arc: B5 S1_V02N0501 arc: C1 H00L0100 arc: C2 V02N0401 arc: C3 F4 arc: C4 H02E0601 arc: C5 S1_V02N0001 arc: C6 H02W0601 arc: C7 S1_V02N0201 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 H00R0000 arc: D3 H02E0001 arc: D4 V02N0601 arc: D5 H02W0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H00R0000 F4 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N3_V06N0103 Q1 arc: W1_H02W0001 F2 word: SLICEC.K0.INIT 0001001101011111 word: SLICEC.K1.INIT 0000011101110111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1011100000000000 word: SLICEB.K0.INIT 0011111100000000 word: SLICEB.K1.INIT 0011000011110000 word: SLICED.K0.INIT 0000101010101010 word: SLICED.K1.INIT 0000101010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C86:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H06E0303 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 E1_H01W0100 arc: S3_V06S0003 H06E0003 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0203 E1_H01W0000 arc: A2 F7 arc: A5 H02E0701 arc: A6 V02S0301 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 H02W0301 arc: B2 S1_V02N0301 arc: B3 Q3 arc: B4 V02S0701 arc: B5 V02N0501 arc: C0 V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0601 arc: C3 V02S0401 arc: C4 Q4 arc: C5 V02N0201 arc: C6 Q6 arc: C7 V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 V02S0001 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 S1_V02N0601 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M3 H00L0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: M7 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: S3_V06S0303 F6 arc: V01S0000 F4 arc: V01S0100 F7 word: SLICEC.K1.INIT 0000011101110111 word: SLICEB.K0.INIT 0000011101110111 word: SLICEA.K0.INIT 0011111100000000 word: SLICEA.K1.INIT 0011111100000000 word: SLICED.K0.INIT 1111000010101010 word: SLICED.K1.INIT 1010101011110000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R18C87:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 H01E0101 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 H01E0001 arc: A5 Q5 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B0 V02S0301 arc: B6 V02N0501 arc: C0 V02N0601 arc: C5 W1_H02E0401 arc: C6 H02E0601 arc: C7 E1_H02W0401 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V00B0000 arc: D6 V02S0401 arc: D7 V00B0000 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M2 V00T0000 arc: M5 H00L0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0601 F6 arc: S3_V06S0203 F7 arc: V00T0000 Q0 arc: V01S0000 F6 arc: V01S0100 Q2 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0000011101110111 word: SLICED.K1.INIT 1010101011110000 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1100000011000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.D0MUX 1 .tile R18C88:PLC2 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 H02E0601 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 V02S0201 arc: V00T0000 H02E0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 W3_H06E0303 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 H00L0100 arc: B0 V00T0000 arc: B1 H01W0100 arc: B2 S1_V02N0301 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 V02S0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V01S0000 arc: D2 N1_V01S0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H00L0100 Q1 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: M5 H00L0000 arc: M6 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0201 Q0 arc: S3_V06S0103 Q2 arc: V00B0100 Q7 arc: V01S0000 Q5 word: SLICEA.K0.INIT 1010111000001100 word: SLICEB.K0.INIT 1111100010001000 word: SLICEA.K1.INIT 1000111110001000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C23:PLC2 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 .tile R19C24:PLC2 arc: S1_V02S0001 E1_H02W0001 .tile R19C25:PLC2 arc: S3_V06S0003 E3_H06W0003 .tile R19C26:PLC2 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E3_H06W0103 arc: W1_H02W0001 E3_H06W0003 .tile R19C27:PLC2 arc: H01W0000 E3_H06W0103 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0303 E3_H06W0303 .tile R19C28:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0701 E1_H01W0100 arc: S3_V06S0003 E3_H06W0003 .tile R19C29:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: H01W0100 E3_H06W0303 arc: S1_V02S0101 H02E0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 .tile R19C30:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 W1_H02E0701 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 S3_V06N0003 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: A2 H00L0100 arc: C2 N1_V01N0001 arc: CE0 W1_H02E0101 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: F2 F2_SLICE arc: H00L0100 Q1 arc: LSR0 H02W0501 arc: M1 H00R0000 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: S1_V02S0201 F2 word: SLICEB.K0.INIT 1010111110100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R19C31:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 H02W0201 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 E1_H02W0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E1_H02W0001 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H02E0701 Q5 arc: LSR0 V00B0000 arc: M5 H00L0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C32:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02E0601 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 H02W0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 E1_H02W0501 arc: A3 E1_H01E0001 arc: A6 H02E0701 arc: B0 W1_H02E0301 arc: B1 H00R0100 arc: B2 H01W0100 arc: B3 Q3 arc: C0 H00R0100 arc: C1 E1_H02W0401 arc: C2 N1_V01N0001 arc: C3 E1_H02W0401 arc: C6 Q6 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D6 W1_H02E0001 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H00R0100 Q5 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 W1_H02E0401 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: V00B0000 F6 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEB.K0.INIT 1010000010001000 word: SLICEB.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R19C33:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 W1_H02E0201 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06W0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H02W0301 arc: B3 V02S0101 arc: B6 H02W0301 arc: B7 N1_V01S0000 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C6 Q6 arc: C7 H02W0601 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 V02S0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 E1_H02W0201 arc: D6 H02W0001 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: M3 W1_H02E0201 arc: M4 H02E0401 arc: M5 H00L0000 arc: M6 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: V00B0000 F6 arc: W1_H02W0501 F7 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011101111110011 word: SLICED.K1.INIT 1010110010101100 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 .tile R19C34:PLC2 arc: E1_H02E0101 V02S0101 arc: H00L0000 S1_V02N0001 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 E3_H06W0103 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0100 V02N0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A4 V00B0000 arc: A5 V02N0301 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 H02E0301 arc: B3 Q3 arc: B6 V02S0701 arc: C0 H00L0100 arc: C1 E1_H02W0401 arc: C2 H02W0401 arc: C3 H00R0100 arc: C4 H02W0401 arc: C5 H02E0401 arc: C6 H02E0601 arc: CE0 H02E0101 arc: CE1 V02N0201 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 E1_H02W0001 arc: D2 H02E0001 arc: D3 E1_H02W0001 arc: D4 V02S0401 arc: D5 V02N0601 arc: D6 V02N0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E1_H02E0001 F2 arc: E1_H02E0401 F6 arc: E1_H02E0501 Q7 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H00R0100 Q5 arc: H01W0100 F4 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 W1_H02E0601 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F5 arc: N1_V02N0201 F2 arc: S1_V02S0401 F4 arc: V01S0000 F5 arc: V01S0100 F6 arc: W1_H02W0001 Q2 arc: W1_H02W0701 F5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K1.INIT 1111101011110000 word: SLICEC.K0.INIT 1111101010101010 word: SLICED.K0.INIT 1100111100001111 word: SLICEB.K0.INIT 1111001100110011 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R19C35:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 H02E0501 arc: A3 H02E0501 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: B0 V00B0000 arc: B1 Q1 arc: B2 H02W0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V01S0000 arc: C0 H02W0401 arc: C1 H02W0601 arc: C2 N1_V01N0001 arc: C3 H02W0601 arc: C4 H02W0601 arc: C5 H02W0601 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 V02S0201 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0100 Q1 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00T0000 arc: M3 W1_H02E0201 arc: M4 E1_H02W0401 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q7 arc: V00B0000 Q6 arc: V01S0000 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICEC.K0.INIT 1010000011000000 word: SLICEC.K1.INIT 1010111111001111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R19C36:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 W1_H02E0001 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 E1_H01W0000 arc: A2 H00L0100 arc: A3 V02S0701 arc: A5 Q5 arc: A6 H02E0701 arc: A7 Q7 arc: B0 V02S0101 arc: B2 H02E0101 arc: B3 Q3 arc: B5 H00R0000 arc: C0 N1_V01N0001 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C6 V02S0001 arc: C7 E1_H01E0101 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CE2 W1_H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D5 V02S0601 arc: D6 E1_H01W0100 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q4 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 H02W0001 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0103 F2 arc: S3_V06S0303 F6 arc: V01S0100 F6 arc: W1_H02W0201 F0 arc: W1_H02W0501 F5 arc: W3_H06W0303 F6 word: SLICEC.K1.INIT 1100110010101010 word: SLICEA.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1010101011110000 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1101100011111111 word: SLICED.K0.INIT 1010111100001111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R19C37:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 V01N0001 arc: H00L0000 V02N0001 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00T0000 H02W0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0100 arc: A1 V02N0501 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A5 Q5 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H02E0301 arc: B3 Q3 arc: B4 H02E0301 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 E1_H02W0401 arc: C3 H02E0601 arc: C4 Q4 arc: C5 H02W0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 H02E0001 arc: D4 E1_H02W0001 arc: D5 H02E0001 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H02W0201 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: S1_V02S0001 F0 arc: S3_V06S0103 F2 arc: V00B0000 F4 arc: V00B0100 F5 arc: V00T0100 Q3 arc: V01S0100 Q7 word: SLICEC.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEC.K0.INIT 1111110000110000 word: SLICEB.K0.INIT 1110000000100000 word: SLICEB.K1.INIT 1100111110101111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R19C38:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02S0401 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H06W0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02W0701 arc: V00T0100 H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02S0701 arc: A2 E1_H01E0001 arc: A3 E1_H02W0501 arc: A4 E1_H02W0501 arc: A5 Q5 arc: A7 Q7 arc: B0 V02S0301 arc: B1 H02W0101 arc: B2 H01W0100 arc: B3 Q3 arc: B4 W1_H02E0301 arc: B5 W1_H02E0301 arc: B6 N1_V01S0000 arc: B7 W1_H02E0301 arc: C0 V02S0601 arc: C2 E1_H02W0401 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 Q6 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F0 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 H00R0100 arc: D5 W1_H02E0201 arc: D6 W1_H02E0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H00R0100 Q5 arc: H01W0000 F1 arc: H01W0100 Q3 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 E1_H01E0101 arc: M5 H02E0001 arc: M6 V00B0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F1 arc: N1_V02N0101 F1 arc: N1_V02N0701 F7 arc: S1_V02S0601 F4 arc: S3_V06S0103 F2 arc: V00T0000 Q0 arc: V01S0000 F0 arc: W1_H02W0101 F1 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1111010111011101 word: SLICED.K1.INIT 1110111000100010 word: SLICED.K0.INIT 1100110011110000 word: SLICEC.K0.INIT 1010001010000000 word: SLICEC.K1.INIT 1110001011111111 word: SLICEA.K0.INIT 0000000000000011 word: SLICEA.K1.INIT 1110111011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 .tile R19C39:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 V01N0001 arc: H00R0100 V02S0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S3_V06N0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N1_V01S0100 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 V01N0101 arc: A3 V02N0501 arc: A4 E1_H01W0000 arc: A5 Q5 arc: B0 V02S0101 arc: B1 Q1 arc: B7 H02E0301 arc: C0 H00L0100 arc: C1 H02E0601 arc: C2 H02E0401 arc: C3 W1_H02E0401 arc: C4 Q4 arc: C5 H02E0601 arc: C7 V02S0001 arc: CE0 H02E0101 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0201 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H02E0001 arc: D5 H01W0000 arc: D7 V02S0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 Q3 arc: H01W0100 Q2 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 H02W0001 arc: M4 V00T0000 arc: M5 V01S0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: S1_V02S0001 F2 arc: S3_V06S0003 F0 arc: S3_V06S0203 F7 arc: V00B0000 F4 arc: V01S0000 F3 arc: V01S0100 F3 arc: W1_H02W0201 F2 arc: W1_H02W0701 F5 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEC.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1010101011110000 word: SLICED.K1.INIT 0011000000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R19C40:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 S1_V02N0001 arc: H00L0100 H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H01E0101 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0701 arc: A2 S1_V02N0701 arc: A5 V02N0101 arc: A6 H00L0000 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0101 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 H02W0101 arc: C1 V02N0601 arc: C2 S1_V02N0401 arc: C5 V02N0001 arc: C6 V02N0201 arc: CE0 V02S0201 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 V02S0001 arc: D2 V02N0001 arc: D5 V01N0001 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F7 arc: LSR0 H02E0301 arc: LSR1 V00T0000 arc: M2 V00T0100 arc: M4 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0201 F0 arc: S3_V06S0003 F0 arc: V00B0000 F6 arc: V01S0000 F1 arc: V01S0100 F0 arc: W1_H02W0001 F0 arc: W1_H02W0301 Q1 arc: W3_H06W0003 F0 arc: W3_H06W0103 F1 word: SLICED.K1.INIT 1100110010101010 word: SLICEA.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1011101110001000 word: SLICEB.K0.INIT 0000000000000001 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1000000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R19C41:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 V02N0201 arc: H00L0100 H02E0301 arc: H00R0000 V02N0601 arc: N1_V02N0101 H06W0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0701 E3_H06W0203 arc: V00B0100 H02W0701 arc: V00T0100 H02W0101 arc: A0 V02S0701 arc: A3 N1_V02S0501 arc: A4 V02N0101 arc: A5 V02N0301 arc: A6 H00L0000 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 H02W0301 arc: B4 V02N0701 arc: B5 H01E0101 arc: B6 V02N0501 arc: B7 V02S0501 arc: C1 H02W0601 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V01N0101 arc: C5 V02N0001 arc: C6 S1_V02N0201 arc: C7 W1_H02E0401 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0201 arc: D2 H02W0201 arc: D3 H02W0001 arc: D4 V01N0001 arc: D5 V02N0401 arc: D6 V01N0001 arc: D7 V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F1 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F0 arc: N1_V02N0001 F0 arc: N1_V02N0301 F1 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 Q6 arc: V01S0000 Q4 arc: V01S0100 F0 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q3 arc: W1_H02W0201 F2 arc: W1_H02W0301 F3 arc: W1_H02W0401 Q4 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q7 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 1011101110001000 word: SLICEA.K1.INIT 1111001111000000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1010111110100000 word: SLICED.K1.INIT 1100000000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000000000100 word: SLICEC.K0.INIT 1000000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R19C42:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H01E0101 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A3 V02S0701 arc: A5 W1_H02E0501 arc: A6 V02N0301 arc: B0 H01W0100 arc: B1 S1_V02N0301 arc: B3 S1_V02N0101 arc: B5 V02S0701 arc: B6 V00T0000 arc: C0 H00L0000 arc: C1 H02W0601 arc: C3 S1_V02N0401 arc: C5 S1_V02N0001 arc: C6 V01N0101 arc: CE0 E1_H02W0101 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 E1_H02W0201 arc: D3 V02N0001 arc: D5 S1_V02N0401 arc: D6 H02E0001 arc: E1_H01E0001 F4 arc: E1_H02E0001 Q0 arc: E1_H02E0301 Q1 arc: E1_H02E0401 F6 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H01W0000 F6 arc: H01W0100 F2 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0100 arc: M2 H02E0601 arc: M4 V00B0000 arc: M5 E1_H02W0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V02N0501 Q7 arc: S1_V02S0501 Q5 arc: S1_V02S0601 F6 arc: V00B0000 F6 arc: V01S0000 Q5 arc: V01S0100 Q7 arc: W3_H06W0203 Q7 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1100111111001101 word: SLICEA.K1.INIT 1111000011111101 word: SLICED.K0.INIT 1000000000000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R19C43:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 H02W0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 E1_H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02E0401 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 S1_V02N0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: A0 V01N0101 arc: A2 V02N0501 arc: A3 S1_V02N0701 arc: A4 H02E0501 arc: A7 V02N0101 arc: B0 V02N0101 arc: B1 V02S0301 arc: B4 S1_V02N0501 arc: B5 H01E0101 arc: B7 V02S0701 arc: C0 F6 arc: C2 V02N0601 arc: C3 H02W0601 arc: C4 H01E0001 arc: C5 V02S0001 arc: C7 S1_V02N0201 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H01E0101 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 V01N0001 arc: D7 H02E0201 arc: E1_H01E0001 Q4 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q2 arc: H01W0100 F5 arc: LSR0 E1_H02W0301 arc: M6 H02E0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: S1_V02S0501 Q7 arc: S3_V06S0303 F5 arc: V01S0000 Q7 arc: V01S0100 Q7 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q7 arc: W3_H06W0303 F5 word: SLICEC.K1.INIT 0000110000001100 word: SLICEA.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1111000011111011 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111010011110101 word: SLICEB.K1.INIT 1111010110100000 word: SLICEB.K0.INIT 1010101011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C44:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: H00L0000 E1_H02W0201 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 E1_H02W0201 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 N3_V06S0103 arc: A0 H02E0701 arc: A1 E1_H01E0001 arc: A2 H02E0701 arc: A3 H02E0701 arc: A6 V00T0100 arc: B3 W1_H02E0301 arc: B5 H02E0301 arc: B6 N1_V01S0000 arc: C0 V02N0601 arc: C1 H00R0100 arc: C2 V02N0401 arc: C5 V02S0201 arc: C6 H02W0601 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H02E0201 arc: D2 H00R0000 arc: D3 V00B0100 arc: D5 H02W0201 arc: D6 V02S0401 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00R0000 Q6 arc: H01W0000 Q0 arc: H01W0100 Q3 arc: LSR0 H02W0301 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: S3_V06S0303 F5 arc: V01S0000 Q1 arc: V01S0100 F6 arc: W3_H06W0303 F5 word: SLICED.K0.INIT 1000010000100001 word: SLICEC.K1.INIT 1100000000000000 word: SLICEA.K0.INIT 1111101001010000 word: SLICEA.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1111101001010000 word: SLICEB.K1.INIT 1101110110001000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C45:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 H02W0201 arc: H00L0100 H02W0101 arc: H00R0100 V02S0501 arc: H01W0000 W3_H06E0103 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02S0701 arc: A0 W1_H02E0701 arc: A1 E1_H02W0501 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 H02W0501 arc: A5 V02S0101 arc: A7 E1_H02W0701 arc: B1 E1_H01W0100 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: B4 H02E0301 arc: B5 N1_V01S0000 arc: C0 H02E0601 arc: C1 F4 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 H02W0401 arc: C5 V00T0000 arc: C7 H02W0401 arc: CE0 H00L0000 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 F2 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 H00R0100 arc: D5 H00L0100 arc: D7 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q5 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M4 V00T0100 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: S1_V02S0601 Q4 arc: V00B0100 F7 arc: V01S0000 Q5 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111101001010000 word: SLICED.K1.INIT 0000010111110101 word: SLICEC.K1.INIT 0101000000110000 word: SLICEB.K0.INIT 1110010011111111 word: SLICEB.K1.INIT 1110010000000000 word: SLICEC.K0.INIT 1100100000001000 word: SLICEA.K1.INIT 1111111001010100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R19C46:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 N1_V02S0701 arc: A0 S1_V02N0501 arc: A1 F5 arc: A2 V00T0000 arc: A4 V02S0101 arc: A5 F7 arc: A6 V02S0101 arc: A7 H02W0701 arc: B2 H02W0301 arc: B4 N1_V02S0501 arc: B6 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 S1_V02N0401 arc: C1 H00L0000 arc: C2 H02W0601 arc: C4 H02W0601 arc: C5 F4 arc: C6 N1_V02S0001 arc: C7 H02W0601 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 V02N0001 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 N1_V02S0401 arc: D7 V02N0401 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M2 V00B0100 arc: M3 H00L0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: N3_V06N0203 Q7 arc: S1_V02S0701 Q7 arc: V01S0100 Q3 arc: W3_H06W0003 Q3 word: SLICEA.K0.INIT 1111101000001010 word: SLICEB.K0.INIT 1111110011111010 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0011000001010000 word: SLICED.K1.INIT 0000010100000011 word: SLICEC.K1.INIT 0000000011111010 word: SLICEA.K1.INIT 0101010100000101 word: SLICED.K0.INIT 0000101000001100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R19C47:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H02E0201 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0100 V02S0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02W0501 arc: A4 V00T0000 arc: A5 E1_H01W0000 arc: A6 V02S0101 arc: B0 S1_V02N0101 arc: B4 E1_H02W0301 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: C0 S1_V02N0401 arc: C4 V00B0100 arc: C5 S1_V02N0001 arc: C6 F4 arc: CE0 H02W0101 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D4 H01W0000 arc: D5 V02S0601 arc: D6 V00B0000 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 F0 arc: H01W0000 Q7 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M3 H00L0000 arc: M5 H00L0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: S1_V02S0501 Q5 arc: S1_V02S0701 F5 arc: V00T0000 Q0 arc: V01S0000 F0 arc: W1_H02W0301 Q3 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 1011111011010111 word: SLICEC.K0.INIT 0000101100001000 word: SLICED.K0.INIT 1010101011111100 word: SLICEA.K0.INIT 1100000011101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C48:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: H00R0000 V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W3_H06W0203 N1_V01S0000 arc: A2 V00T0000 arc: A4 V02S0301 arc: A6 N1_V01N0101 arc: B0 V02S0101 arc: B4 V02N0501 arc: B6 H02W0101 arc: C2 W1_H02E0401 arc: C4 H02W0401 arc: C6 V01N0101 arc: CE0 E1_H02W0101 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 H00R0000 arc: D4 V02S0601 arc: D6 N1_V02S0601 arc: E1_H01E0101 F4 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: LSR1 H02E0501 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q2 arc: V00T0000 Q0 arc: V01S0000 Q0 word: SLICEA.K0.INIT 1100110000000000 word: SLICEB.K0.INIT 1010111110100000 word: SLICEC.K0.INIT 1011010010000111 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000010010001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R19C49:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 H01E0101 arc: H00L0100 N1_V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 E1_H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0000 arc: A2 N1_V02S0701 arc: A4 V00B0000 arc: A5 V00T0000 arc: A6 H02W0701 arc: B0 E1_H02W0301 arc: B2 H02W0301 arc: B4 E1_H02W0301 arc: B6 V02S0701 arc: C0 E1_H01W0000 arc: C2 V02N0601 arc: C4 E1_H01E0101 arc: C5 F4 arc: C6 V02N0201 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 V00T0100 arc: D4 E1_H02W0201 arc: D5 H02W0001 arc: D6 E1_H01W0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q6 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0601 F6 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V00T0000 F0 arc: V01S0000 Q0 arc: V01S0100 Q2 word: SLICED.K0.INIT 1110000001000000 word: SLICEB.K0.INIT 1101000010000000 word: SLICEA.K0.INIT 0000001100010001 word: SLICEC.K0.INIT 0100010000001100 word: SLICEC.K1.INIT 0000010100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C50:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00L0100 H02E0301 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0001 arc: V00T0000 H02W0201 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H02W0701 arc: A2 H02W0501 arc: A3 F7 arc: A4 H02E0701 arc: A5 H02E0701 arc: A6 V00T0100 arc: A7 Q7 arc: B0 V02N0101 arc: B2 V02S0101 arc: B3 E1_H02W0301 arc: B4 F3 arc: B5 F3 arc: B6 V00B0100 arc: B7 H02W0301 arc: C0 E1_H02W0401 arc: C2 V02S0601 arc: C3 W1_H02E0601 arc: C4 H02E0601 arc: C5 N1_V02S0001 arc: C6 V00T0000 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 H02W0101 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 W1_H02E0201 arc: D4 V02N0601 arc: D5 S1_V02N0601 arc: D6 H02W0001 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 W1_H02E0301 arc: M0 H02W0601 arc: M1 H02E0001 arc: M4 V00B0000 arc: M5 H02E0001 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V02N0701 Q5 arc: S1_V02S0201 F2 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: W1_H02W0201 F0 arc: W1_H02W0301 Q1 arc: W1_H02W0501 Q7 word: SLICEA.K0.INIT 1011101111110011 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0101001100000000 word: SLICEB.K0.INIT 1000100011111000 word: SLICED.K1.INIT 0001000100000011 word: SLICEB.K1.INIT 0000000100000001 word: SLICEC.K0.INIT 1111111000000000 word: SLICEC.K1.INIT 0000000011100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C51:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 V02N0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0303 V06S0303 arc: A0 F5 arc: A3 V02N0701 arc: A5 V00B0000 arc: A7 V00T0100 arc: B0 V02N0301 arc: B2 V01N0001 arc: B3 H01W0100 arc: B5 V02S0701 arc: B7 V02S0701 arc: C2 H02W0601 arc: C3 E1_H01W0000 arc: C5 H02E0401 arc: C7 V02N0201 arc: CE0 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V02N0001 arc: D3 F2 arc: D5 E1_H01W0100 arc: D7 H01W0000 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 F0 arc: LSR1 H02W0501 arc: M1 H02W0001 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: S1_V02S0101 Q1 arc: S1_V02S0701 Q7 arc: V00B0100 F7 arc: V00T0100 Q1 arc: V01S0100 Q1 word: SLICED.K1.INIT 1011000010000000 word: SLICEC.K1.INIT 0101010000010000 word: SLICEB.K0.INIT 0000000000000011 word: SLICEA.K0.INIT 0000000001000100 word: SLICEB.K1.INIT 1010111110001101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C52:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02E0601 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 H01E0001 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 F7 arc: A2 F5 arc: A3 E1_H01E0001 arc: A5 N1_V02S0301 arc: A7 V02N0301 arc: B0 V00B0000 arc: B1 V00B0000 arc: B3 E1_H02W0301 arc: B5 V02N0701 arc: B7 H02W0301 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 H00R0100 arc: C3 H02E0401 arc: C5 H02W0601 arc: C7 H02W0401 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 H02W0001 arc: D3 V02N0201 arc: D5 E1_H01W0100 arc: D7 W1_H02E0201 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M3 H02W0201 arc: M4 V00T0000 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0101 F3 arc: S1_V02S0601 Q6 arc: V00T0100 Q3 arc: V01S0100 Q4 word: SLICED.K1.INIT 1011100000000000 word: SLICEA.K0.INIT 1111110010101010 word: SLICEA.K1.INIT 1111110011111111 word: SLICEC.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 0000000000000101 word: SLICEB.K1.INIT 1111000001000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C53:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 V06S0303 arc: H00L0000 S1_V02N0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: A0 F7 arc: A1 V02S0701 arc: A2 H02E0701 arc: A3 W1_H02E0701 arc: A4 N1_V01S0100 arc: A5 V02N0101 arc: A7 E1_H01W0000 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 V01N0001 arc: B3 H00R0000 arc: B4 W1_H02E0301 arc: B5 V02N0501 arc: B6 E1_H02W0101 arc: B7 H02W0101 arc: C0 V02S0401 arc: C2 N1_V02S0601 arc: C3 E1_H01W0000 arc: C4 V00T0000 arc: C5 V01N0101 arc: C6 E1_H01E0101 arc: C7 E1_H02W0601 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02W0201 arc: D2 Q2 arc: D3 V00B0100 arc: D4 V02S0601 arc: D5 V02N0601 arc: D6 N1_V02S0401 arc: D7 W1_H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q4 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M2 V00B0000 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F6 arc: S1_V02S0601 Q4 arc: V01S0000 F4 arc: V01S0100 Q2 arc: W1_H02W0001 F2 arc: W1_H02W0401 Q4 arc: W1_H02W0501 F5 word: SLICEC.K1.INIT 0100010001010000 word: SLICEB.K1.INIT 0101000001000100 word: SLICED.K0.INIT 0000000000000011 word: SLICEB.K0.INIT 0000111000000100 word: SLICEC.K0.INIT 0100000001001100 word: SLICED.K1.INIT 0000000001000111 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111101110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C54:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 V01N0101 arc: A1 S1_V02N0501 arc: A2 V02S0501 arc: A3 V02N0501 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: A6 V02N0301 arc: A7 V02S0301 arc: B0 V00B0000 arc: B1 F3 arc: B2 V02S0301 arc: B3 V02N0101 arc: B4 H02E0101 arc: B6 V00B0000 arc: B7 N1_V01S0000 arc: C0 E1_H02W0401 arc: C1 H02E0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C5 V00B0100 arc: C6 V01N0101 arc: C7 H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 F0 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 H02E0001 arc: D5 H01W0000 arc: D6 H02E0001 arc: D7 V02N0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 F7 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0501 arc: M1 W1_H02E0001 arc: M3 W1_H02E0201 arc: M5 W1_H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0401 Q6 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q3 arc: V01S0100 Q3 arc: W1_H02W0301 F1 arc: W1_H02W0401 F4 arc: W1_H02W0601 F6 word: SLICEC.K1.INIT 1111101001010000 word: SLICEC.K0.INIT 1100000010001000 word: SLICED.K0.INIT 0101000001000100 word: SLICEB.K0.INIT 1100000010100000 word: SLICEA.K0.INIT 0000101000001100 word: SLICEB.K1.INIT 1010000011000000 word: SLICEA.K1.INIT 0101010101000101 word: SLICED.K1.INIT 0101001100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C55:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0601 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N1_V02S0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A1 H00R0000 arc: A2 V02N0501 arc: A3 N1_V02S0701 arc: A5 N1_V02S0301 arc: A6 N1_V02S0301 arc: A7 V02N0301 arc: B0 H02W0101 arc: B1 F3 arc: B2 H02W0101 arc: B3 H00L0000 arc: B5 V01S0000 arc: B7 N1_V01S0000 arc: C0 N1_V01N0001 arc: C1 E1_H01W0000 arc: C3 V02S0401 arc: C5 H02W0601 arc: C6 V02N0001 arc: C7 H02E0401 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02N0201 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 N1_V02S0401 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q0 arc: E1_H02E0101 F3 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0100 F7 arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0301 Q1 arc: N1_V02N0401 F6 arc: S1_V02S0101 F3 arc: S1_V02S0701 F5 arc: W3_H06W0103 Q1 word: SLICED.K1.INIT 0010000001110000 word: SLICEC.K1.INIT 0000001100000111 word: SLICED.K0.INIT 1111000010100000 word: SLICEA.K0.INIT 1100001111111111 word: SLICEA.K1.INIT 1001011011111111 word: SLICEB.K0.INIT 1001100111111111 word: SLICEB.K1.INIT 1100001110011001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C56:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E3_H06W0003 arc: A0 F5 arc: A1 S1_V02N0701 arc: A2 F5 arc: A3 V00B0000 arc: A5 V02N0301 arc: A6 F7 arc: A7 H00L0000 arc: B1 H02E0101 arc: B2 E1_H01W0100 arc: B3 S1_V02N0101 arc: B5 V02S0501 arc: B7 E1_H02W0101 arc: C1 F4 arc: C2 V02S0601 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 V02N0201 arc: C6 E1_H02W0601 arc: C7 V02N0201 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H00R0000 arc: D2 H02E0001 arc: D3 H02E0201 arc: D4 V02N0401 arc: D5 H02W0201 arc: D7 H00R0100 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F4 arc: N1_V02N0401 F6 arc: S1_V02S0501 F7 arc: S1_V02S0601 F6 arc: V00B0100 F7 arc: V01S0000 Q1 arc: V01S0100 F5 arc: W3_H06W0103 Q1 word: SLICED.K1.INIT 1010100101011001 word: SLICEC.K1.INIT 1001101010010101 word: SLICEA.K0.INIT 1010101001010101 word: SLICEB.K0.INIT 1001111101101111 word: SLICEA.K1.INIT 0110100111111111 word: SLICEC.K0.INIT 0000111111110000 word: SLICEB.K1.INIT 0110100111111111 word: SLICED.K0.INIT 0101101001011010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C57:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02N0001 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0601 H01E0001 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 N3_V06S0003 arc: A1 V01N0101 arc: A3 V02N0501 arc: A5 F7 arc: A7 H00L0000 arc: B1 N1_V02S0101 arc: B2 W1_H02E0101 arc: B5 F3 arc: C1 E1_H01W0000 arc: C2 W1_H02E0601 arc: C3 H02E0601 arc: C5 N1_V02S0201 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 H01E0101 arc: D3 H02W0001 arc: D5 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: E1_H02E0601 Q4 arc: E3_H06E0203 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: M0 V00B0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0001 F2 arc: S1_V02S0201 F2 arc: S1_V02S0601 Q4 arc: S1_V02S0701 F5 word: SLICED.K1.INIT 1010010100000000 word: SLICEB.K1.INIT 0101000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1100001111000011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 .tile R19C58:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0501 arc: A6 H02E0501 arc: A7 N1_V01S0100 arc: B1 V02S0101 arc: B3 S1_V02N0301 arc: B6 V02S0501 arc: B7 N1_V02S0501 arc: C1 S1_V02N0601 arc: C3 H02W0401 arc: C4 H02E0401 arc: C6 V00T0000 arc: C7 N1_V02S0001 arc: CE1 N1_V02S0201 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D3 E1_H02W0201 arc: D4 N1_V02S0601 arc: D6 H00L0100 arc: D7 H00R0100 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q6 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M2 V00T0100 arc: M4 V00B0100 arc: M5 E1_H02W0001 arc: M6 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F4 arc: N1_V02N0001 Q2 arc: N1_V02N0501 Q5 arc: V01S0000 F4 arc: V01S0100 Q4 arc: W1_H02W0001 F0 arc: W1_H02W0601 F4 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K1.INIT 1111000011000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1010011010010101 word: SLICEC.K0.INIT 0000111111110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R19C59:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02E0201 arc: S3_V06S0103 N3_V06S0003 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02N0501 arc: A7 N1_V01S0100 arc: B0 N1_V02S0301 arc: B1 H02W0101 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 H02W0101 arc: B7 W1_H02E0101 arc: C0 H02W0601 arc: C1 V02S0401 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 V00T0000 arc: C5 V00T0000 arc: C6 V00T0100 arc: C7 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H00R0000 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V02S0601 arc: D5 V02S0601 arc: D6 V02S0401 arc: D7 H00R0100 arc: E1_H01E0101 F4 arc: E1_H02E0001 Q0 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F1 arc: MUXCLK0 CLK0 arc: N1_V01N0101 F4 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0000 Q0 arc: W1_H02W0601 F4 arc: W3_H06W0103 F2 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000110000000000 word: SLICED.K1.INIT 0000001000000000 word: SLICEB.K1.INIT 0011000000000000 word: SLICEB.K0.INIT 1100000000000000 word: SLICED.K0.INIT 0000000000110000 word: SLICEC.K0.INIT 0000001100000000 word: SLICEA.K1.INIT 0011000000000000 word: SLICEC.K1.INIT 0000110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R19C60:PLC2 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0401 H06E0203 arc: V00B0000 H02E0401 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H02W0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 S1_V02N0101 arc: B1 E1_H02W0301 arc: B2 H01W0100 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H00L0000 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 S1_V02N0201 arc: D2 E1_H02W0001 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M5 H00R0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: V00T0000 F2 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1011100011111111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R19C61:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V01N0101 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 V01N0101 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: A4 V00T0000 arc: A6 H02W0701 arc: B2 H00L0000 arc: B6 V00B0000 arc: C2 N1_V01N0001 arc: C4 Q4 arc: C6 W1_H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 H02W0001 arc: D4 H02W0001 arc: D6 H02W0201 arc: E3_H06E0303 F6 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00B0100 arc: M5 H00L0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: S1_V02S0401 F4 arc: S1_V02S0501 Q7 arc: V00T0000 Q0 arc: V01S0000 F2 arc: W1_H02W0401 F6 word: SLICED.K0.INIT 1010001011110011 word: SLICEB.K0.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000010101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R19C62:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W1_H02E0701 arc: H00L0100 H02E0101 arc: H00R0000 V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: V00B0100 H02E0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E1_H02W0301 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0101 Q1 arc: V01S0000 Q6 arc: V01S0100 Q2 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C63:PLC2 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 E1_H02W0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0401 E1_H02W0101 arc: B3 Q3 arc: B6 V00T0000 arc: C3 N1_V01N0001 arc: C6 Q6 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D6 H02E0001 arc: F3 F3_SLICE arc: F6 F6_SLICE arc: M0 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: S1_V02S0301 F3 arc: S1_V02S0601 F6 arc: V00T0000 Q0 word: SLICED.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1100110011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R19C64:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 W1_H02E0201 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 V02N0301 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A1 H00L0000 arc: B0 S1_V02N0301 arc: B1 Q1 arc: C0 H00L0100 arc: C1 S1_V02N0601 arc: CE0 N1_V02S0201 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0201 arc: F0 F5A_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R19C65:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0203 W3_H06E0203 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02N0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 E1_H02W0101 arc: A4 V00T0000 arc: A5 Q5 arc: B4 V00B0100 arc: B5 H00L0000 arc: C4 S1_V02N0001 arc: C5 S1_V02N0201 arc: CE0 H00R0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 S1_V02N0401 arc: D5 E1_H02W0001 arc: F4 F5C_SLICE arc: H00L0000 Q0 arc: H01W0100 F4 arc: M0 V00B0000 arc: M4 V00T0100 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: V00B0100 Q5 arc: V00T0000 Q0 word: SLICEC.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 1010111111001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R19C66:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 S3_V06N0103 arc: V00B0100 V02N0101 arc: V00T0100 H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 V02S0601 arc: A2 V00T0000 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00L0000 arc: A7 Q7 arc: B0 H02E0301 arc: B2 V02S0301 arc: B3 S1_V02N0301 arc: B4 V02N0701 arc: B5 S1_V02N0501 arc: B6 N1_V02S0501 arc: B7 S1_V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: H01W0100 F2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 H02E0601 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F4 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0100 F3 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C67:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 W1_H02E0201 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 E1_H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E3_H06W0203 arc: A0 H00L0000 arc: A1 H00L0100 arc: A2 H02E0701 arc: A3 H00L0100 arc: A4 E1_H01W0000 arc: A5 E1_H01W0000 arc: A6 E1_H01W0000 arc: A7 H00R0000 arc: B0 N1_V02S0301 arc: B1 N1_V02S0101 arc: B2 H02W0301 arc: B3 V02N0301 arc: B4 H02E0101 arc: B5 N1_V02S0501 arc: B6 V00T0000 arc: B7 H02W0301 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 F3 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: N1_V02N0101 F3 arc: N1_V02N0601 F4 arc: V01S0100 F2 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C68:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 H06W0303 arc: S3_V06S0103 N1_V02S0201 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 S3_V06N0003 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 H02W0701 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 V02N0101 arc: A7 H02E0501 arc: B0 N1_V02S0301 arc: B1 V00T0000 arc: B2 N1_V02S0101 arc: B3 Q3 arc: B4 V02S0701 arc: B5 N1_V02S0501 arc: B6 H02E0301 arc: B7 S1_V02N0501 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q3 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR1 V00T0100 arc: M3 H00R0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F1 arc: N1_V02N0101 F3 arc: N3_V06N0203 F7 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0201 F0 arc: W1_H02W0301 Q3 arc: W1_H02W0401 F6 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C69:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 H01E0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: V00B0000 V02N0201 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 E1_H01W0000 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 V02S0701 arc: A3 H01E0001 arc: A4 V00T0100 arc: A5 V00T0100 arc: A6 V00T0100 arc: A7 V02S0301 arc: B0 N1_V02S0301 arc: B1 N1_V02S0101 arc: B2 H02E0301 arc: B3 S1_V02N0301 arc: B4 N1_V02S0701 arc: B5 N1_V02S0501 arc: B6 V00T0000 arc: B7 H02E0301 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F7 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F1 arc: M1 H00R0100 arc: M3 H00L0000 arc: M5 H02W0001 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q1 arc: N1_V02N0701 Q5 arc: V01S0000 F4 arc: V01S0100 F2 arc: W1_H02W0301 F3 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C70:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02N0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02E0401 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 V06N0203 arc: A0 H02E0501 arc: A1 H02E0501 arc: A4 V00T0000 arc: A5 Q5 arc: A6 S1_V02N0301 arc: A7 Q7 arc: B0 N1_V02S0301 arc: B1 N1_V02S0101 arc: B4 W1_H02E0101 arc: B5 W1_H02E0101 arc: B6 V01S0000 arc: B7 W1_H02E0101 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C6 S1_V02N0201 arc: C7 V00T0100 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 W1_H02E0201 arc: D5 W1_H02E0001 arc: D6 H00L0100 arc: D7 W1_H02E0001 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H01W0000 F1 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F6 arc: V00T0000 Q0 arc: V00T0100 Q1 arc: V01S0000 Q7 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 1011100000000000 word: SLICEC.K1.INIT 1110001011111111 word: SLICED.K0.INIT 1110000001000000 word: SLICED.K1.INIT 1110001011111111 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C71:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 V02S0201 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 E1_H01W0100 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 V01N0101 arc: A0 H00L0100 arc: A1 H00R0000 arc: A2 E1_H01E0001 arc: A3 V02N0501 arc: A4 N1_V01S0100 arc: A5 E1_H01W0000 arc: A6 V02N0301 arc: A7 V02N0301 arc: B0 H01W0100 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B3 Q3 arc: B6 S1_V02N0501 arc: B7 S1_V02N0701 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D4 H01W0000 arc: D5 H00R0100 arc: D6 E1_H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H00R0100 Q5 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00T0100 arc: M3 H02E0201 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F7 arc: S3_V06S0003 F0 arc: V00B0000 F4 arc: V01S0100 F7 arc: W1_H02W0001 F2 arc: W1_H02W0501 F7 arc: W1_H02W0701 F5 arc: W3_H06W0203 F7 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1000000000000000 word: SLICEC.K0.INIT 1010111110100000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEC.K1.INIT 1010111110100000 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1110010011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R19C72:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0101 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 H02E0101 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0601 S3_V06N0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H02W0501 arc: A4 V02S0301 arc: A5 Q5 arc: B0 H02E0301 arc: B1 Q1 arc: B2 E1_H02W0301 arc: B4 V02N0701 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C2 S1_V02N0401 arc: C4 V00B0100 arc: C5 V00T0000 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 E1_H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 V00B0100 arc: D4 S1_V02N0401 arc: D5 E1_H02W0001 arc: E1_H01E0101 F4 arc: E1_H02E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 F2 arc: H00L0100 Q3 arc: H01W0000 Q7 arc: H01W0100 F0 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q2 arc: S1_V02S0501 F5 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0001 F2 arc: W1_H02W0401 F4 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 1000000000000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R19C73:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 H02E0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 S3_V06N0303 arc: W3_H06W0203 S3_V06N0203 arc: A0 F5 arc: A1 V02N0701 arc: A3 V02N0701 arc: A4 V00T0100 arc: A5 H02W0701 arc: A7 H00R0000 arc: B0 H00R0100 arc: B1 V02S0301 arc: B3 V02S0101 arc: B5 E1_H02W0301 arc: B7 V02S0701 arc: C0 V02N0601 arc: C1 V02N0401 arc: C3 V02N0401 arc: C4 Q4 arc: C5 W1_H02E0601 arc: C7 E1_H02W0601 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02N0001 arc: D3 V02N0001 arc: D4 H02W0001 arc: D5 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 F1 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F1 arc: H01W0100 F1 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F3 arc: V00T0100 Q1 arc: V01S0100 F1 arc: W1_H02W0001 Q2 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 1000000000000000 word: SLICEC.K1.INIT 0111011100000111 word: SLICED.K1.INIT 1010001011110011 word: SLICEA.K1.INIT 0100110011001100 word: SLICEB.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1111000010101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R19C74:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V01N0101 arc: E3_H06E0203 V06S0203 arc: H00R0000 H02W0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: V00B0100 H02W0501 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: A0 H02W0501 arc: A1 V01N0101 arc: A3 S1_V02N0501 arc: A4 E1_H01W0000 arc: A5 S1_V02N0301 arc: A6 E1_H01W0000 arc: A7 E1_H02W0501 arc: B0 V01N0001 arc: B1 E1_H01W0100 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B5 V00B0100 arc: B6 H02W0101 arc: B7 W1_H02E0101 arc: C0 V02N0401 arc: C1 W1_H02E0401 arc: C3 W1_H02E0401 arc: C4 V01N0101 arc: C5 E1_H02W0601 arc: C6 V00T0100 arc: C7 H02W0401 arc: D0 H00R0000 arc: D1 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: D6 S1_V02N0601 arc: D7 V01N0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: M2 V00T0000 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: N1_V02N0601 F6 arc: V00T0000 F0 arc: V01S0000 F1 arc: V01S0100 F4 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1001000000001001 word: SLICEA.K1.INIT 1001000000001001 word: SLICEC.K0.INIT 1001000000001001 word: SLICEC.K1.INIT 1000010000100001 word: SLICED.K1.INIT 1001000000001001 word: SLICED.K0.INIT 1001000000001001 word: SLICEA.K0.INIT 1000010000100001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R19C75:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00R0000 H02W0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02E0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 S3_V06N0203 arc: V00T0000 H02W0201 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E1_H01W0000 arc: A0 H02E0501 arc: A2 H02W0701 arc: A5 V00T0000 arc: A6 H00L0000 arc: A7 H00R0000 arc: B3 E1_H01W0100 arc: B4 H02W0301 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F4 arc: N1_V01N0101 F7 arc: V01S0000 F7 arc: W1_H02W0401 F6 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0101010101011010 word: SLICED.K1.INIT 0101010101011010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C76:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0003 W1_H02E0301 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 H06E0203 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H01E0101 arc: V00B0100 V02S0101 arc: V00T0100 V02S0501 arc: A1 H02W0701 arc: A4 V00B0000 arc: A5 Q5 arc: A7 E1_H01W0000 arc: B0 E1_H01W0100 arc: B2 H02W0301 arc: B3 H00R0000 arc: B6 E1_H02W0301 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q5 arc: E1_H02E0401 Q4 arc: E1_H02E0601 F4 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0301 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 E1_H02W0401 arc: M5 H00L0100 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: N1_V02N0301 Q1 arc: N1_V02N0401 F6 arc: N1_V02N0601 Q6 arc: S1_V02S0501 F7 arc: S1_V02S0601 Q6 arc: V00B0000 Q4 arc: V01S0000 Q0 arc: V01S0100 F3 arc: W1_H02W0001 Q0 arc: W1_H02W0101 F1 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q1 arc: W1_H02W0401 Q6 arc: W1_H02W0501 F5 arc: W1_H02W0601 F6 arc: W1_H02W0701 Q7 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0101010101011010 word: SLICEB.K0.INIT 0011001100111100 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0101010101011010 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0101010101011010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C77:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02E0401 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 V02S0101 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: A4 V00T0000 arc: A5 N1_V02S0101 arc: A6 H00R0000 arc: B0 V00T0000 arc: B1 Q1 arc: B4 V01S0000 arc: B5 H02E0101 arc: B6 H01E0101 arc: C4 Q4 arc: C5 V02S0001 arc: C6 Q6 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 H02W0001 arc: D5 H02W0201 arc: D6 H00L0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0100 F5 arc: H01W0000 Q5 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0301 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 V00T0100 arc: M3 E1_H02W0201 arc: M4 V00B0000 arc: M5 H00L0000 arc: M6 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F5 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q3 arc: N1_V02N0501 Q5 arc: S3_V06S0303 F6 arc: V00T0000 Q0 arc: V01S0000 Q5 arc: V01S0100 Q6 arc: W1_H02W0001 F0 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q6 arc: W1_H02W0701 Q7 arc: W3_H06W0103 F1 arc: W3_H06W0203 F4 word: SLICEC.K1.INIT 0000000010000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C78:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 V01N0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00B0100 N1_V02S0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V02S0601 arc: A5 H02E0701 arc: B0 V01N0001 arc: B5 V00B0100 arc: C1 H02E0601 arc: C5 V02S0201 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D5 H00R0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H01W0000 Q0 arc: H01W0100 Q1 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q0 arc: N1_V02N0501 F5 arc: S1_V02S0001 Q0 arc: W3_H06W0103 Q1 word: SLICEC.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 0000000011001100 word: SLICEA.K1.INIT 0000000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C79:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 V06S0103 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 S3_V06N0203 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S1_V02N0701 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 W1_H02E0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V02S0501 arc: A5 S1_V02N0301 arc: A6 V00T0100 arc: B5 H02W0301 arc: B6 H02E0301 arc: C5 E1_H01E0101 arc: C6 N1_V02S0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 V02N0401 arc: D6 H00R0100 arc: E1_H02E0401 Q6 arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: LSR0 V00T0000 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V02N0401 F4 arc: V00B0000 F6 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1110110010100000 word: SLICED.K0.INIT 0001010100111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C80:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 H01E0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 V01N0101 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 N1_V02S0601 arc: W1_H02W0301 N1_V01S0100 arc: A0 H02E0701 arc: B0 H02E0101 arc: B3 H02W0301 arc: B6 V00B0000 arc: C3 H00L0100 arc: C6 S1_V02N0001 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 N1_V01S0000 arc: D3 N1_V01S0000 arc: D6 N1_V02S0401 arc: E1_H02E0101 F3 arc: E1_H02E0401 F6 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: H00L0000 F0 arc: H00L0100 Q3 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M3 H00L0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0100 F6 word: SLICEA.K0.INIT 1010101011001100 word: SLICED.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R19C81:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 S1_V02N0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 H02W0601 arc: V00T0000 E1_H02W0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 E1_H02W0601 arc: A7 Q7 arc: B0 V00B0000 arc: C0 V02S0401 arc: C1 N1_V01S0100 arc: C7 S1_V02N0001 arc: CE0 V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D7 V02S0601 arc: E1_H02E0701 F7 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M1 H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: S3_V06S0103 Q1 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111000011110000 word: SLICED.K1.INIT 1010111110100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C82:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 H01E0101 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 S1_V02N0701 arc: A1 V02N0501 arc: A3 E1_H02W0501 arc: A5 H02W0701 arc: A7 V02N0301 arc: B1 H02E0101 arc: B3 V02N0101 arc: B5 H02E0101 arc: B6 S1_V02N0501 arc: B7 S1_V02N0501 arc: C1 S1_V02N0601 arc: C3 V02S0601 arc: C5 V02N0201 arc: C6 V00T0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0001 arc: D3 E1_H02W0201 arc: D5 S1_V02N0601 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H01W0000 F3 arc: H01W0100 Q5 arc: LSR1 V00T0000 arc: M0 E1_H02W0601 arc: M2 V00B0000 arc: M4 E1_H01E0101 arc: M5 H00L0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N3_V06N0103 Q2 arc: V00B0000 F4 arc: V00T0100 F3 word: SLICEB.K1.INIT 0001001101011111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1100100000001000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1000100011000000 word: SLICED.K0.INIT 0011000011110000 word: SLICED.K1.INIT 0111011100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C83:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0203 H01E0001 arc: H00L0000 H02E0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0401 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02N0601 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 E1_H01W0100 arc: A0 S1_V02N0701 arc: A2 V02S0701 arc: A3 H02E0701 arc: A4 W1_H02E0701 arc: A5 S1_V02N0101 arc: A6 H02E0501 arc: A7 V02S0301 arc: B2 V02N0101 arc: B3 V02N0301 arc: B4 V02N0501 arc: B5 H02E0101 arc: B6 W1_H02E0301 arc: B7 V02N0701 arc: CE0 H00L0000 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: E3_H06E0303 Q5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F2 arc: H01W0100 F7 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M5 H00R0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C84:PLC2 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 V02S0401 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06E0103 arc: V00B0000 V02S0201 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S1_V02N0601 arc: A2 H02E0501 arc: A5 N1_V02S0101 arc: A7 N1_V01S0100 arc: B0 V00B0000 arc: B1 V00T0000 arc: B3 V02S0301 arc: B4 H02E0101 arc: B6 N1_V02S0501 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F4 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: LSR1 V00T0100 arc: M2 H02E0601 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: S1_V02S0101 F1 arc: S1_V02S0301 F3 arc: W1_H02W0001 F2 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C85:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 V02S0001 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 S1_V02N0501 arc: A0 N1_V02S0701 arc: A3 V02S0701 arc: A4 V00T0000 arc: A6 H02W0501 arc: B1 V02S0101 arc: B2 E1_H02W0301 arc: B5 V02S0501 arc: B7 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: E1_H02E0601 F4 arc: E1_H02E0701 F5 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F6 arc: N1_V02N0001 F0 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R19C86:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: W1_H02W0501 N1_V01S0100 arc: A0 V02S0501 arc: A5 H02E0701 arc: A7 S1_V02N0101 arc: B5 H02W0101 arc: B7 H02W0101 arc: C5 H02E0401 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 E1_H02W0001 arc: D7 E1_H02W0201 arc: F0 F0_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 F4 arc: LSR1 H02E0301 arc: M1 H00R0000 arc: M2 N1_V01N0001 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F6 arc: N1_V02N0101 Q1 arc: N3_V06N0103 Q2 arc: V01S0100 F0 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1000110010000000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1100000010001000 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R19C87:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0701 V06S0203 arc: H00L0100 V02N0301 arc: H00R0100 H02E0501 arc: H01W0100 W3_H06E0303 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0100 W1_H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 S3_V06N0303 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A5 S1_V02N0101 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: B5 H02E0301 arc: B6 V00B0000 arc: B7 N1_V01S0000 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 V02N0601 arc: C5 W1_H02E0401 arc: C6 H02W0401 arc: C7 S1_V02N0001 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0001 arc: D3 H02E0001 arc: D5 W1_H02E0001 arc: D6 V02S0601 arc: D7 V02N0401 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H00R0000 F4 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 H02E0401 arc: M5 V01S0000 arc: M6 W1_H02E0401 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0101 Q3 arc: N3_V06N0203 Q7 arc: S1_V02S0301 Q3 arc: S3_V06S0003 Q3 arc: V01S0000 F2 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 0101010000010000 word: SLICEA.K1.INIT 1111111010111010 word: SLICEB.K0.INIT 0000101100001000 word: SLICEB.K1.INIT 1111101111111000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1000101010000000 word: SLICED.K0.INIT 0011111100000000 word: SLICED.K1.INIT 0000110011001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R19C88:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06E0203 arc: V00B0000 V02N0001 arc: V00T0100 N1_V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 H01E0101 arc: A0 H00L0100 arc: A1 N1_V02S0501 arc: A2 N1_V02S0501 arc: B0 H02E0101 arc: B1 V00T0000 arc: B2 V02N0101 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 V02N0401 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0001 arc: D2 N1_V01S0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: LSR0 H02E0301 arc: LSR1 V00B0000 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0501 Q7 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: S3_V06S0203 Q4 arc: V00T0000 Q2 word: SLICEB.K0.INIT 1100111000001010 word: SLICEA.K1.INIT 1110110010100000 word: SLICEA.K0.INIT 1110101011000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C24:PLC2 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E3_H06W0303 .tile R20C25:PLC2 arc: S1_V02S0701 N3_V06S0203 .tile R20C26:PLC2 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: W1_H02W0201 E3_H06W0103 .tile R20C27:PLC2 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S3_V06S0303 E3_H06W0303 .tile R20C28:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 E3_H06W0103 .tile R20C29:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 N3_V06S0303 arc: S3_V06S0003 H06W0003 .tile R20C2:PLC2 arc: W1_H02W0101 V06S0103 .tile R20C30:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02S0601 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02E0501 arc: S1_V02S0201 E1_H02W0201 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: W3_H06W0303 E1_H01W0100 .tile R20C31:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 H01E0101 arc: H00L0000 V02S0001 arc: H00R0000 H02E0601 arc: N1_V02N0101 H06W0103 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 N3_V06S0203 arc: V00T0000 V02S0601 arc: V00T0100 S1_V02N0701 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A5 Q5 arc: B0 S1_V02N0301 arc: B1 Q1 arc: B4 V00B0100 arc: C0 H00L0100 arc: C1 H02E0401 arc: C4 Q4 arc: C5 E1_H01E0101 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0100 F0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 H00L0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 H02W0001 arc: M6 W1_H02E0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0701 F5 arc: V00B0000 F4 arc: V00B0100 Q7 word: SLICEC.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEC.K1.INIT 1010101011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R20C32:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 V06N0303 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 E1_H02W0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 S3_V06N0303 arc: A1 V01N0101 arc: A2 H00L0100 arc: A3 H00L0100 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 V01S0000 arc: C0 S1_V02N0401 arc: C1 V02N0601 arc: C2 N1_V01S0100 arc: C3 V02S0601 arc: C4 Q4 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 E1_H02W0001 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 V02S0601 arc: E1_H01E0001 F1 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H01W0100 Q7 arc: LSR0 H02E0501 arc: LSR1 H02W0301 arc: M1 H02W0001 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 F4 arc: V01S0000 Q1 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1100101011111111 word: SLICEA.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R20C33:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V06N0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0201 E3_H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: V00T0000 V02N0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: A0 V01N0101 arc: A1 V01N0101 arc: A3 V02N0501 arc: A4 V02N0301 arc: A6 H00R0000 arc: B0 V01N0001 arc: B1 V02S0301 arc: B3 V02S0101 arc: B4 N1_V01S0000 arc: B5 V02S0501 arc: B7 H02E0301 arc: C0 V02S0601 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 V02N0601 arc: C4 V02N0201 arc: C5 S1_V02N0001 arc: C6 H02E0401 arc: C7 S1_V02N0001 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 V02N0001 arc: D3 V01S0100 arc: D4 S1_V02N0401 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0101 F3 arc: E1_H02E0201 Q2 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR0 V00T0000 arc: M0 H01E0001 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q2 arc: S1_V02S0701 F5 arc: S3_V06S0303 F5 arc: V01S0000 F7 arc: W3_H06W0103 Q2 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICEB.K0.INIT 1111000000001111 word: SLICEB.K1.INIT 1110100010001110 word: SLICEC.K0.INIT 1001011001101001 word: SLICEC.K1.INIT 1100111100001111 word: SLICED.K1.INIT 1100111100001111 word: SLICED.K0.INIT 1111101010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R20C34:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 S3_V06N0003 arc: H00L0000 W1_H02E0201 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S3_V06S0103 E1_H01W0100 arc: V00T0000 V02N0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 N1_V01S0100 arc: A0 H02W0701 arc: A2 H01E0001 arc: A3 H02E0701 arc: A4 V00T0100 arc: A5 V00T0000 arc: A6 V02N0101 arc: A7 N1_V01N0101 arc: B3 H00L0000 arc: B4 V02N0701 arc: B5 V02N0501 arc: B6 H01E0101 arc: B7 H02E0101 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H02E0101 Q3 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q6 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q7 arc: S3_V06S0003 Q3 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q5 arc: V01S0000 Q6 arc: V01S0100 Q5 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1010101010101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 .tile R20C35:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 V02N0201 arc: H00R0000 V02N0601 arc: N1_V02N0001 H02E0001 arc: N1_V02N0401 H02W0401 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 E3_H06W0303 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: A1 V01N0101 arc: A2 V02S0501 arc: A3 S1_V02N0501 arc: A4 H02W0701 arc: A5 H02W0501 arc: A6 V02N0101 arc: A7 V02S0101 arc: B0 H02E0301 arc: B1 S1_V02N0101 arc: B2 H02W0301 arc: B3 V01N0001 arc: B4 V02N0501 arc: B5 H00R0000 arc: B6 V02N0701 arc: B7 V00T0000 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q3 arc: E1_H02E0701 Q7 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q2 arc: S1_V02S0701 Q5 arc: S3_V06S0003 Q3 arc: S3_V06S0103 Q2 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q6 arc: V01S0000 Q7 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C36:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00R0000 V02N0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 H06W0103 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 E1_H02W0401 arc: V00T0000 V02N0401 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02N0501 arc: A1 H02W0501 arc: A2 V02N0701 arc: A3 V02S0701 arc: A4 E1_H02W0701 arc: A5 V00T0000 arc: A6 V02N0301 arc: A7 H00R0000 arc: B0 V01N0001 arc: B1 S1_V02N0101 arc: B2 V02N0101 arc: B3 S1_V02N0301 arc: B4 E1_H02W0301 arc: B5 H02W0301 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q2 arc: E1_H02E0101 Q3 arc: E1_H02E0201 Q0 arc: E1_H02E0501 Q5 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: LSR1 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: S1_V02S0401 Q6 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q3 arc: S3_V06S0103 Q1 arc: V01S0000 Q1 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C37:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0501 N1_V01S0100 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 H01E0101 arc: V00B0000 H02W0601 arc: V00T0000 V02N0601 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 N3_V06S0303 arc: A0 H00L0100 arc: A1 V01N0101 arc: A2 S1_V02N0501 arc: A3 S1_V02N0701 arc: A4 V00T0000 arc: A5 E1_H01W0000 arc: A6 E1_H02W0501 arc: A7 V02N0101 arc: B0 V01N0001 arc: B1 S1_V02N0101 arc: B2 H00R0000 arc: B3 V02S0301 arc: B4 N1_V01S0000 arc: B5 E1_H02W0101 arc: B6 V00B0000 arc: B7 V02N0501 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q2 arc: E1_H02E0201 Q0 arc: E1_H02E0601 Q4 arc: E1_H02E0701 Q5 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: S1_V02S0001 Q2 arc: S1_V02S0501 Q5 arc: S3_V06S0203 Q4 arc: V01S0000 Q6 arc: V01S0100 Q7 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C38:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 H02W0001 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 N1_V01S0000 arc: A0 F5 arc: A1 H00R0000 arc: A4 V02N0101 arc: A5 V02N0101 arc: A6 V02N0101 arc: A7 H02E0701 arc: B0 E1_H02W0301 arc: B1 V02N0301 arc: B4 V00B0100 arc: B5 H00L0000 arc: B6 V00B0100 arc: B7 V00B0000 arc: C4 V02N0201 arc: C5 E1_H02W0601 arc: C6 V02N0201 arc: C7 W1_H02E0601 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D4 S1_V02N0601 arc: D5 E1_H02W0201 arc: D6 S1_V02N0601 arc: D7 E1_H02W0001 arc: E1_H01E0101 Q1 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR0 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F7 arc: V01S0000 Q1 arc: V01S0100 Q0 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICEC.K1.INIT 1001011001101001 word: SLICED.K1.INIT 1010011001100101 word: SLICEC.K0.INIT 1111100110010000 word: SLICED.K0.INIT 1001011001101001 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C39:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0103 H01E0101 arc: H00L0000 E1_H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 H02E0401 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0601 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V06N0303 arc: W3_H06W0103 E1_H02W0201 arc: A2 E1_H02W0701 arc: A3 H02E0501 arc: A4 H02W0701 arc: A5 H02W0501 arc: A6 H02E0701 arc: A7 W1_H02E0501 arc: B0 V00T0000 arc: B2 W1_H02E0301 arc: B3 E1_H02W0101 arc: B4 H00R0000 arc: B5 H00L0000 arc: B6 V00B0100 arc: B7 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F4 arc: E3_H06E0003 F3 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M4 V00B0000 arc: M5 H00R0100 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q4 arc: N1_V02N0501 Q5 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C40:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06W0003 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02W0401 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: A0 H00L0100 arc: A1 H00L0000 arc: A2 V00T0000 arc: A3 H02E0501 arc: A4 V00B0000 arc: A5 V00T0100 arc: A6 E1_H02W0501 arc: A7 H00L0000 arc: B0 V02S0301 arc: B1 V02N0101 arc: B2 H02E0101 arc: B3 H00L0000 arc: B4 H00L0000 arc: B5 H00L0000 arc: B6 V00T0000 arc: B7 E1_H02W0301 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q5 arc: M4 V00B0100 arc: M5 H00R0000 arc: M7 H00R0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F0 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0401 F6 arc: N1_V02N0501 F5 arc: N1_V02N0601 Q4 arc: N1_V02N0701 Q7 arc: S1_V02S0501 F7 arc: V01S0000 F4 arc: V01S0100 F1 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C41:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 E3_H06W0303 arc: H00L0100 H02W0101 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0301 N1_V01S0100 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 N1_V01S0100 arc: A0 H00R0000 arc: A1 H00L0100 arc: A2 V00T0000 arc: A3 H02E0501 arc: A4 V00T0000 arc: A5 V00T0000 arc: A6 V02N0301 arc: A7 E1_H02W0501 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 S1_V02N0101 arc: B3 V02N0301 arc: B4 S1_V02N0501 arc: B5 H02E0101 arc: B6 V02N0501 arc: B7 V00T0000 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0100 arc: M1 H02W0001 arc: M2 H02W0601 arc: M3 H01W0100 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00B0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F4 arc: N1_V02N0001 F0 arc: N1_V02N0101 F3 arc: N1_V02N0501 F7 arc: N1_V02N0701 F5 arc: S1_V02S0101 F3 arc: S1_V02S0201 F2 arc: S1_V02S0401 F4 arc: S1_V02S0701 F7 arc: V01S0000 F5 arc: V01S0100 F1 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q3 arc: W1_H02W0301 Q1 arc: W1_H02W0501 Q7 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q5 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C42:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 H06W0003 arc: N3_V06N0203 H06W0203 arc: N3_V06N0303 H06W0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00T0000 H02W0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 N1_V01S0000 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 H02W0701 arc: A5 E1_H01W0000 arc: A6 E1_H02W0501 arc: A7 E1_H01W0000 arc: B0 H02E0301 arc: B1 E1_H02W0301 arc: B2 H02E0101 arc: B3 V02S0301 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V00T0000 arc: B7 V02N0501 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F4 arc: M6 V00B0000 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F0 arc: N1_V02N0301 F1 arc: S1_V02S0001 F2 arc: S1_V02S0101 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0601 F6 arc: S1_V02S0701 F7 arc: V01S0000 Q6 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C43:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0003 N3_V06S0003 arc: H00L0100 V02N0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E1_H01W0000 arc: A0 H00L0000 arc: A1 H00L0000 arc: A5 N1_V01N0101 arc: A7 E1_H02W0501 arc: B0 H02E0301 arc: B1 E1_H02W0101 arc: B5 V02N0501 arc: B7 V00B0000 arc: C5 F6 arc: C7 V02N0001 arc: CE0 V02S0201 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E3_H06E0103 F1 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q0 arc: H01W0000 Q0 arc: H01W0100 F0 arc: LSR0 E1_H02W0301 arc: M0 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: N1_V02N0501 Q5 arc: S1_V02S0101 F1 arc: S1_V02S0201 F0 arc: S1_V02S0301 F1 arc: V01S0000 F1 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K1.INIT 1111010111110001 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R20C44:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02W0601 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02W0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: A0 F5 arc: A1 E1_H02W0501 arc: A2 V00B0000 arc: A4 N1_V01S0100 arc: A5 E1_H01W0000 arc: A6 N1_V01N0101 arc: A7 E1_H02W0501 arc: B0 H00R0100 arc: B2 E1_H02W0101 arc: B4 V01S0000 arc: B5 V02N0701 arc: B6 E1_H02W0101 arc: B7 E1_H02W0301 arc: C0 F4 arc: C2 H00L0100 arc: C4 H02E0601 arc: C5 F6 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0201 arc: D2 H02W0201 arc: D4 E1_H02W0201 arc: D5 F2 arc: D6 E1_H02W0201 arc: D7 S1_V02N0601 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 F7 arc: H01W0000 Q0 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 H02W0401 arc: M5 H00R0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N1_V02N0301 Q3 arc: N1_V02N0701 Q5 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q6 arc: V00B0000 Q4 arc: V00T0100 F1 arc: V01S0000 Q6 arc: W1_H02W0001 Q0 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1000000000000000 word: SLICEA.K1.INIT 0000000010101010 word: SLICEB.K0.INIT 1101000000001101 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111001101010001 word: SLICED.K1.INIT 1000110000100011 word: SLICEC.K1.INIT 1001000000000000 word: SLICEC.K0.INIT 1000000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R20C45:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 S3_V06N0203 arc: A0 V01N0101 arc: A2 V00T0000 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B2 V02N0101 arc: B3 H01W0100 arc: B4 N1_V01S0000 arc: B5 V02N0701 arc: B6 V00B0000 arc: B7 V01S0000 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q7 arc: E1_H02E0101 Q1 arc: H01W0000 Q6 arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 H02W0001 arc: M6 H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: N3_V06N0203 Q7 arc: N3_V06N0303 Q5 arc: V00B0000 Q6 arc: V01S0000 Q1 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011010 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011010 word: SLICED.K0.INIT 1001100110011100 word: SLICED.K1.INIT 1001100110011010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C46:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N3_V06S0003 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0000 H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 V02S0701 arc: A0 S1_V02N0501 arc: A1 V02S0701 arc: A2 H02W0701 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 V00T0100 arc: A6 E1_H01W0000 arc: A7 Q7 arc: B0 N1_V02S0301 arc: B1 V02N0301 arc: B2 H00L0000 arc: B3 H01W0100 arc: B4 V02N0701 arc: B5 V00B0100 arc: B6 V01S0000 arc: B7 V00T0000 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q1 arc: E3_H06E0003 Q0 arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 E1_H02W0601 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M3 H00L0100 arc: M4 V00B0000 arc: M5 W1_H02E0001 arc: M6 E1_H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: S1_V02S0401 Q4 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q6 arc: V01S0100 Q3 arc: W1_H02W0501 Q5 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011010 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011100 word: SLICED.K1.INIT 1001100110011010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C47:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 H01E0101 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 N1_V01S0000 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V02S0501 arc: V00B0100 W1_H02E0701 arc: V00T0100 H02W0301 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V01N0101 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0701 arc: A1 E1_H01E0001 arc: A7 N1_V01N0101 arc: B0 H01W0100 arc: B1 V00B0000 arc: B4 W1_H02E0101 arc: B5 H02W0101 arc: B6 V01S0000 arc: C4 V02N0201 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D4 H02E0201 arc: D5 H02E0001 arc: D6 F2 arc: D7 H01W0000 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F7 arc: E3_H06E0303 F6 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q7 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 W1_H02E0601 arc: M3 H00R0000 arc: M6 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: V00B0000 Q6 arc: V00T0000 Q2 arc: V01S0000 Q1 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 arc: W1_H02W0401 Q4 arc: W1_H02W0501 Q5 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICED.K1.INIT 0000000000000101 word: SLICED.K0.INIT 0000000000110000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111110000001100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C48:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 N1_V01S0000 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 S3_V06N0303 arc: A0 H00L0100 arc: A1 F5 arc: A2 V02S0501 arc: A3 H00L0100 arc: A4 V02S0301 arc: A5 H02W0701 arc: A6 V02N0101 arc: A7 H00L0000 arc: B0 V00T0000 arc: B1 V02N0301 arc: B2 V02S0101 arc: B3 V02S0301 arc: B4 H02E0301 arc: B6 F3 arc: B7 V02N0701 arc: C0 H02W0401 arc: C1 E1_H02W0401 arc: C2 H02W0401 arc: C3 V02S0401 arc: C4 V00B0100 arc: C5 E1_H02W0601 arc: C6 F4 arc: C7 E1_H01E0101 arc: CE1 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D2 H00R0000 arc: D3 V00T0100 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 V02S0601 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q3 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0301 arc: M3 E1_H02W0201 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0401 Q6 arc: N1_V02N0601 Q6 arc: V01S0100 F7 arc: W3_H06W0103 F1 word: SLICEB.K1.INIT 1110001000000000 word: SLICEC.K0.INIT 0011001000010000 word: SLICED.K0.INIT 0101010101010100 word: SLICEB.K0.INIT 0000101000001100 word: SLICEA.K0.INIT 1100000010100000 word: SLICEC.K1.INIT 0000000000000101 word: SLICED.K1.INIT 1100110011001000 word: SLICEA.K1.INIT 1111000001000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C49:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0203 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A3 V02S0701 arc: A4 N1_V01S0100 arc: A5 H02E0501 arc: A6 N1_V01N0101 arc: A7 N1_V01S0100 arc: B0 F3 arc: B1 F3 arc: B2 V02S0301 arc: B3 N1_V02S0301 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: B7 V02N0501 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 H00L0000 arc: C3 F4 arc: C4 V00B0100 arc: C5 V02S0001 arc: C6 E1_H02W0601 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 N1_V01S0000 arc: D3 F2 arc: D4 V02S0601 arc: D5 N1_V02S0601 arc: D6 H02E0001 arc: D7 V02S0601 arc: E1_H01E0001 F5 arc: E1_H02E0401 Q4 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M1 H00R0000 arc: M3 H02W0201 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: N3_V06N0103 Q1 arc: S1_V02S0101 Q3 arc: S1_V02S0601 Q6 arc: V00B0000 Q6 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 0000110000111111 word: SLICEC.K0.INIT 0000010111110101 word: SLICEB.K1.INIT 0101000101000000 word: SLICEA.K0.INIT 0000001011111101 word: SLICEA.K1.INIT 0101011110101000 word: SLICED.K1.INIT 1100100000001000 word: SLICEC.K1.INIT 0101000001000100 word: SLICED.K0.INIT 0101001100000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C50:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 H01E0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 F5 arc: A1 F5 arc: A3 V00T0000 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 V02S0101 arc: A7 Q7 arc: B0 H02W0101 arc: B2 V02N0301 arc: B3 H02W0301 arc: B5 H02W0301 arc: B6 E1_H02W0301 arc: B7 H02W0301 arc: C0 H02E0601 arc: C1 N1_V01N0001 arc: C2 V02N0401 arc: C3 H02E0401 arc: C4 S1_V02N0001 arc: C5 H02W0601 arc: C6 F4 arc: C7 H02W0601 arc: CE0 W1_H02E0101 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V01S0100 arc: D3 H02E0201 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: D6 F2 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 H02E0301 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q7 arc: N1_V02N0001 F0 arc: S1_V02S0701 Q7 arc: V00T0100 F3 arc: V01S0000 Q2 arc: V01S0100 Q5 word: SLICEB.K0.INIT 0000001111001111 word: SLICEC.K0.INIT 0000010111110101 word: SLICED.K0.INIT 1010001010000000 word: SLICEB.K1.INIT 0000000100100011 word: SLICED.K1.INIT 0000010011000100 word: SLICEC.K1.INIT 0001000000010011 word: SLICEA.K0.INIT 1110111011110000 word: SLICEA.K1.INIT 1111101011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C51:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 E1_H02W0001 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: A4 W1_H02E0501 arc: A5 N1_V01S0100 arc: A6 H02E0501 arc: A7 N1_V01N0101 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 V02S0101 arc: B3 N1_V02S0301 arc: B5 V02S0701 arc: B6 V01S0000 arc: B7 H02W0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 E1_H02W0401 arc: C3 N1_V01S0100 arc: C4 Q4 arc: C5 V02S0201 arc: C6 V02N0001 arc: C7 S1_V02N0001 arc: CE2 N1_V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 V00T0100 arc: D3 H00R0000 arc: D4 E1_H01W0100 arc: D5 N1_V02S0401 arc: D6 F2 arc: D7 E1_H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q4 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M2 H02W0601 arc: M4 V00T0000 arc: M7 H02E0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q4 arc: V00B0000 F4 arc: V01S0000 F0 word: SLICEC.K1.INIT 0101001100000000 word: SLICED.K1.INIT 0000000010101100 word: SLICEC.K0.INIT 1111010110100000 word: SLICEA.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEB.K0.INIT 1101000010000000 word: SLICEB.K1.INIT 1110010011111111 word: SLICED.K0.INIT 1110000001000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C52:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02S0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 N3_V06S0203 arc: A0 F5 arc: A1 F5 arc: A2 N1_V02S0501 arc: A3 H00L0100 arc: A4 N1_V01S0100 arc: A5 V02S0301 arc: B0 F3 arc: B1 F3 arc: B2 H02W0301 arc: B3 V02S0301 arc: B4 H02E0301 arc: B5 H01E0101 arc: B6 V01S0000 arc: C0 H00R0100 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 H02E0601 arc: C4 Q4 arc: C5 H02E0401 arc: C6 Q6 arc: CE0 V02N0201 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 H02W0201 arc: D3 V01S0100 arc: D4 H02E0201 arc: D5 H01W0000 arc: D6 V02S0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M1 H00R0000 arc: M3 H00R0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: V00B0000 F4 arc: V01S0000 Q3 arc: V01S0100 Q6 arc: W1_H02W0101 Q1 arc: W1_H02W0401 Q4 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0001000100000011 word: SLICEB.K1.INIT 0100000001001100 word: SLICEC.K1.INIT 0001000000010101 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111011111110 word: SLICEB.K0.INIT 1110010000000000 word: SLICED.K0.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C53:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 W3_H06E0303 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 N3_V06S0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0701 arc: A1 V02S0701 arc: A2 E1_H01E0001 arc: A3 V02N0701 arc: A4 N1_V01S0100 arc: A7 H02W0701 arc: B0 H02W0301 arc: B1 H02E0101 arc: B2 W1_H02E0301 arc: B3 Q3 arc: B4 W1_H02E0301 arc: B5 F3 arc: B7 V00B0100 arc: C0 E1_H02W0401 arc: C1 H00L0000 arc: C2 V02N0601 arc: C3 V02S0601 arc: C4 Q4 arc: C5 F4 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00B0100 arc: D2 H02W0201 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 N1_V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 Q0 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F2 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 E1_H02W0601 arc: M3 H02E0201 arc: M4 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: S1_V02S0101 F1 arc: S1_V02S0201 F0 arc: V00B0100 Q7 arc: V01S0000 Q7 arc: V01S0100 F7 word: SLICEC.K0.INIT 0001000100000011 word: SLICEB.K1.INIT 0010011100000000 word: SLICEC.K1.INIT 0000000011111100 word: SLICEB.K0.INIT 0100010000001100 word: SLICED.K1.INIT 0001000100000101 word: SLICEA.K0.INIT 0000001010100010 word: SLICEA.K1.INIT 1010001010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C54:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 N1_V02S0701 arc: A3 E1_H01E0001 arc: A4 V00T0000 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 F3 arc: B3 H00L0000 arc: B4 V02S0501 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 F4 arc: C3 N1_V01S0100 arc: C4 V02S0201 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D3 H02E0001 arc: D4 V01N0001 arc: E1_H01E0001 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M1 H00R0100 arc: M3 W1_H02E0201 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0101 Q3 arc: S3_V06S0003 F0 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0301 Q1 arc: W1_H02W0601 Q6 word: SLICEB.K1.INIT 0001110100000000 word: SLICEC.K0.INIT 0000000000110101 word: SLICEB.K0.INIT 1010100010101000 word: SLICEA.K0.INIT 1100000011010000 word: SLICEA.K1.INIT 0000000000010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C55:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0100 V02N0301 arc: H00R0100 V02N0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0501 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A6 N1_V02S0301 arc: A7 N1_V02S0301 arc: B6 N1_V02S0701 arc: B7 N1_V02S0701 arc: C6 E1_H02W0401 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK3 CLK0 arc: N3_V06N0203 Q7 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1111111100000010 word: SLICED.K1.INIT 1111111101010111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R20C56:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0601 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 V01N0001 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H01E0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 H02W0601 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0601 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H02W0501 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A2 H02E0701 arc: A3 F7 arc: A5 N1_V02S0101 arc: A6 N1_V01S0100 arc: A7 E1_H01W0000 arc: B0 V00T0000 arc: B1 H02W0101 arc: B2 H02E0101 arc: B3 S1_V02N0301 arc: B4 H02E0101 arc: B5 V02N0501 arc: C0 S1_V02N0401 arc: C1 N1_V02S0601 arc: C2 N1_V01S0100 arc: C3 N1_V02S0601 arc: C4 N1_V02S0201 arc: C5 N1_V02S0001 arc: C7 F6 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 N1_V02S0201 arc: D2 H02E0201 arc: D3 E1_H02W0001 arc: D4 V00B0000 arc: D5 W1_H02E0001 arc: D6 H02W0001 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q2 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: N1_V02N0301 Q1 arc: S1_V02S0401 F6 arc: S1_V02S0701 Q5 arc: S3_V06S0103 Q1 arc: S3_V06S0303 Q5 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 1001011011111111 word: SLICEC.K0.INIT 0011110011000011 word: SLICEA.K0.INIT 0110100111111111 word: SLICED.K0.INIT 1010101001010101 word: SLICEA.K1.INIT 1001111101101111 word: SLICEC.K1.INIT 1001011011111111 word: SLICED.K1.INIT 0101101010100101 word: SLICEB.K1.INIT 1001111101101111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C57:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 N1_V02S0201 arc: H00R0100 V02S0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 N3_V06S0303 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: B0 V00B0000 arc: B1 W1_H02E0101 arc: B2 V02S0301 arc: C0 H02W0401 arc: C1 H00L0000 arc: C2 H02W0401 arc: C4 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 H02E0001 arc: D2 N1_V02S0201 arc: D4 H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: N3_V06N0003 Q0 arc: S3_V06S0103 Q2 arc: W3_H06W0103 Q1 word: SLICEB.K0.INIT 0011110011111111 word: SLICEA.K0.INIT 0110100111111111 word: SLICEC.K0.INIT 0000111111110000 word: SLICEA.K1.INIT 0110111110011111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C58:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0001 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00T0000 V02S0601 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00R0000 arc: B0 V00T0000 arc: C0 H00L0000 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: F0 F0_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 word: SLICEA.K0.INIT 1001111101101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C59:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 H02E0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: B0 V00T0000 arc: B3 Q3 arc: C0 H00R0100 arc: C3 N1_V01N0001 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D3 V02N0001 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: H00R0100 Q7 arc: M0 V00B0100 arc: M3 H00L0000 arc: M6 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V00T0000 Q0 arc: V01S0000 F0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R20C60:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E3_H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 V01N0101 arc: A0 H00L0100 arc: A1 H00L0100 arc: A5 Q5 arc: B0 V02N0301 arc: B1 V02N0101 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C5 V02N0001 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0001 arc: D5 H01W0000 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M3 H02E0201 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: V00B0100 F5 arc: W1_H02W0201 F0 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011101111110011 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R20C61:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 V01N0101 arc: H00L0000 W1_H02E0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 W1_H02E0701 arc: A3 E1_H01E0001 arc: A4 V00B0000 arc: A5 V00T0100 arc: B0 V02N0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 V02N0701 arc: B5 V02N0701 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: C3 W1_H02E0401 arc: C4 V00B0100 arc: C5 E1_H02W0601 arc: CE0 N1_V02S0201 arc: CE1 N1_V02S0201 arc: CE2 W1_H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02W0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 E1_H02W0201 arc: D5 H02W0201 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F4 arc: E1_H02E0401 F4 arc: E1_H02E0701 F5 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H00R0000 Q4 arc: H01W0000 F5 arc: H01W0100 Q3 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 W1_H02E0201 arc: M4 H02E0401 arc: M5 E1_H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F5 arc: N1_V02N0601 F4 arc: N1_V02N0701 F5 arc: V01S0000 Q7 arc: W1_H02W0201 F0 arc: W1_H02W0401 F4 arc: W3_H06W0103 F2 word: SLICEC.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K0.INIT 1010000010001000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R20C62:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0003 E1_H01W0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A6 N1_V01S0100 arc: A7 V02S0101 arc: B2 V02N0301 arc: B3 Q3 arc: B4 N1_V01S0000 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 Q4 arc: C6 Q6 arc: C7 V02N0001 arc: CE0 H02E0101 arc: CE1 N1_V02S0201 arc: CE2 H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V00T0100 arc: D3 V02N0001 arc: D4 V00B0000 arc: D6 V00B0000 arc: D7 H01W0000 arc: E1_H02E0601 F4 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q7 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00B0100 arc: M6 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0401 F6 arc: S1_V02S0701 F7 arc: V00T0100 Q3 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICED.K0.INIT 1111000010101010 word: SLICED.K1.INIT 1111101000001010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R20C63:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02N0501 arc: H00L0000 N1_V02S0201 arc: H00R0000 E1_H02W0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 W1_H02E0201 arc: S3_V06S0203 E1_H01W0000 arc: V00B0100 H02W0701 arc: V00T0000 V02S0601 arc: V00T0100 H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: A0 H00L0100 arc: A1 H00L0100 arc: A4 V00B0000 arc: B0 V02N0101 arc: B1 Q1 arc: C0 N1_V01N0001 arc: C1 V02N0401 arc: C4 Q4 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0201 arc: D4 V02N0601 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H01W0000 F0 arc: M0 V00T0000 arc: M1 H00L0000 arc: M3 H00L0000 arc: M4 V00B0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: V00B0000 Q6 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1010101011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R20C64:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N3_V06S0203 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 V01N0101 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 H06W0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06E0103 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 E1_H01E0001 arc: A4 V00T0000 arc: A6 H02W0701 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 H00R0100 arc: B3 Q3 arc: B4 W1_H02E0301 arc: B6 W1_H02E0301 arc: C0 N1_V01N0001 arc: C1 E1_H02W0601 arc: C2 V02N0601 arc: C3 E1_H02W0401 arc: C4 V00B0100 arc: C6 V00B0100 arc: CE0 V02S0201 arc: CE1 N1_V02S0201 arc: CE2 H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0001 arc: D2 E1_H02W0201 arc: D3 V02N0201 arc: D4 H02W0201 arc: D6 W1_H02E0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F4 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H00R0100 Q7 arc: H01W0100 F4 arc: M0 H01E0001 arc: M1 H02E0001 arc: M2 W1_H02E0601 arc: M3 H02E0201 arc: M4 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F4 arc: N1_V02N0601 F6 arc: S1_V02S0601 F6 arc: W1_H02W0601 F6 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 1000000000000000 word: SLICEC.K0.INIT 1000000000000000 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R20C65:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 H02E0001 arc: H00R0000 H02E0601 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 H06W0203 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 arc: A2 H00L0100 arc: A3 V02N0701 arc: A7 Q7 arc: B2 H00R0100 arc: B3 Q3 arc: C2 V02N0401 arc: C3 N1_V01N0001 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V02N0001 arc: D7 H01W0000 arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0000 Q1 arc: H01W0100 F2 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M5 H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: V00B0100 F7 word: SLICED.K1.INIT 1010111110100000 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1101110111110101 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R20C66:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 N3_V06S0103 arc: H00R0100 E1_H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H02W0601 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: B2 H00R0100 arc: B3 W1_H02E0301 arc: C2 V02N0401 arc: C3 H00R0100 arc: D2 V02S0201 arc: D3 V02S0201 arc: F2 F5B_SLICE arc: M2 V00T0100 arc: V01S0000 F2 word: SLICEB.K0.INIT 1100001000100000 word: SLICEB.K1.INIT 1110111110111100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R20C67:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 W3_H06E0103 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02N0301 arc: V00T0100 H02W0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 F5 arc: A1 F5 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 E1_H02W0501 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H00R0100 arc: B3 H00R0100 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 F6 arc: C1 F6 arc: C2 V02N0401 arc: C3 V02N0401 arc: C5 V02N0201 arc: C6 V02N0201 arc: C7 H02E0401 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 H02E0201 arc: D3 N1_V01S0000 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 V02N0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M2 V00T0100 arc: M6 V00T0100 arc: S1_V02S0201 F2 arc: S3_V06S0003 F0 arc: S3_V06S0103 F1 arc: V01S0000 F2 word: SLICEB.K0.INIT 1010010001000000 word: SLICEB.K1.INIT 1111110111011010 word: SLICED.K0.INIT 1010010001000000 word: SLICED.K1.INIT 1111110111011010 word: SLICEC.K1.INIT 1010011001100101 word: SLICEA.K1.INIT 1111100110010000 word: SLICEA.K0.INIT 1001011001101001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R20C68:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V01N0101 arc: E3_H06E0303 V01N0101 arc: H00L0000 H02E0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: V00B0000 E1_H02W0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00L0000 arc: A2 V00B0000 arc: A3 V02N0701 arc: A4 V00T0000 arc: A5 S1_V02N0101 arc: A6 H00R0000 arc: A7 H02E0701 arc: B2 W1_H02E0301 arc: B3 S1_V02N0301 arc: B4 E1_H02W0101 arc: B5 H02W0301 arc: B6 S1_V02N0701 arc: B7 S1_V02N0501 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F3 arc: M1 E1_H02W0001 arc: M2 V00T0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: S1_V02S0001 Q2 arc: S1_V02S0301 Q1 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q7 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q4 arc: W1_H02W0401 F4 arc: W3_H06W0203 F7 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C69:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 S1_V02N0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 E1_H02W0601 arc: V00T0000 S1_V02N0601 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00R0000 arc: A1 S1_V02N0501 arc: A2 V00B0000 arc: A3 E1_H02W0501 arc: A4 V02S0101 arc: A5 V02S0301 arc: A6 H00L0000 arc: A7 H02W0701 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 S1_V02N0101 arc: B3 H02W0301 arc: B4 W1_H02E0101 arc: B5 W1_H02E0301 arc: B6 V02S0701 arc: B7 V02S0501 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F2 arc: M3 E1_H02W0201 arc: MUXCLK1 CLK0 arc: S1_V02S0601 F4 arc: S3_V06S0003 F0 arc: S3_V06S0103 F1 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0000 Q3 arc: V01S0100 F1 arc: W1_H02W0601 F4 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C70:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00L0100 H02W0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0303 E1_H02W0601 arc: A0 H00R0000 arc: A1 S1_V02N0501 arc: A2 S1_V02N0501 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 V02N0101 arc: B1 V00B0000 arc: B2 H00L0000 arc: B6 W1_H02E0301 arc: B7 W1_H02E0101 arc: C6 V00T0100 arc: C7 V00T0100 arc: CE0 H00L0100 arc: CE1 V02S0201 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F2 arc: E1_H02E0101 Q1 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: H01W0100 F1 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M3 H00R0100 arc: M4 H02W0401 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q7 arc: S1_V02S0201 Q0 arc: S1_V02S0301 F1 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: V00T0100 Q3 arc: V01S0000 F2 arc: V01S0100 F2 arc: W1_H02W0201 F2 arc: W3_H06W0103 F2 word: SLICED.K0.INIT 1110001000000000 word: SLICED.K1.INIT 1110001011111111 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R20C71:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02E0201 arc: H00R0100 H02E0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 H01E0101 arc: V00B0000 H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S3_V06N0203 arc: A0 H00L0100 arc: A1 H01E0001 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 V02N0301 arc: A5 Q5 arc: A6 S1_V02N0301 arc: A7 H02W0701 arc: B0 H02E0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 V02N0501 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C4 E1_H01E0101 arc: C5 V02N0001 arc: C6 E1_H02W0601 arc: C7 S1_V02N0001 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 V00B0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 F7 arc: H01W0100 Q3 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 V00T0100 arc: M3 H02W0201 arc: M4 E1_H02W0401 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F6 arc: N1_V01N0101 F7 arc: S1_V02S0001 F2 arc: S1_V02S0201 F0 arc: S1_V02S0401 F4 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1000000000000000 word: SLICEB.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1101100000000000 word: SLICEC.K1.INIT 1100101011111111 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R20C72:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 E1_H02W0001 arc: H00R0100 V02N0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 H02W0601 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 V06N0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 E1_H02W0501 arc: A4 H02W0501 arc: A5 H02W0701 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B3 V02N0301 arc: B4 E1_H02W0301 arc: B5 E1_H02W0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 E1_H02W0601 arc: C3 W1_H02E0601 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: C6 Q6 arc: C7 V02N0001 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 H02W0001 arc: D3 N1_V01S0000 arc: D4 V00B0000 arc: D5 V01N0001 arc: D6 V02N0601 arc: D7 H01W0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F4 arc: E1_H02E0501 F5 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 F4 arc: H01W0000 Q5 arc: H01W0100 Q1 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M3 H00L0000 arc: M4 H02E0401 arc: M5 H02E0001 arc: M6 V00B0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0501 F5 arc: S1_V02S0001 F0 arc: S1_V02S0101 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: V01S0000 Q4 arc: V01S0100 Q2 arc: W1_H02W0501 F5 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0010000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 0101000000000000 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICED.K0.INIT 1111000010101010 word: SLICED.K1.INIT 1010111110100000 word: SLICEB.K1.INIT 1111110000110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R20C73:PLC2 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0201 arc: H00R0000 H02E0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V06N0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0701 arc: A5 H02E0701 arc: B0 H02W0301 arc: B3 Q3 arc: B5 H02W0301 arc: C0 V02N0401 arc: C3 H00R0100 arc: C5 S1_V02N0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D3 V02N0001 arc: D5 V02N0601 arc: E1_H01E0101 F5 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00R0100 Q5 arc: H01W0000 F0 arc: M0 V00B0100 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0201 F0 arc: S3_V06S0303 F5 arc: V01S0000 Q0 arc: V01S0100 Q6 arc: W1_H02W0201 F0 arc: W1_H02W0301 F3 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 0010000000000000 word: SLICEA.K0.INIT 1000000000000000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R20C74:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E3_H06E0003 S3_V06N0003 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A4 S1_V02N0101 arc: A6 H02W0701 arc: A7 S1_V02N0101 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B6 N1_V01S0000 arc: B7 H02W0101 arc: C0 E1_H02W0401 arc: C4 V01N0101 arc: C5 V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 V00T0100 arc: D3 V00B0100 arc: D5 W1_H02E0001 arc: D6 E1_H01W0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q1 arc: E1_H02E0601 Q4 arc: E3_H06E0103 Q2 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q7 arc: S1_V02S0701 F5 arc: V01S0000 Q3 arc: V01S0100 Q2 word: SLICEA.K1.INIT 0011001100000000 word: SLICEA.K0.INIT 0011000000110000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1010000010100000 word: SLICED.K1.INIT 1000100010001000 word: SLICED.K0.INIT 1000100000000000 word: SLICEC.K1.INIT 1111111100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R20C75:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 H06W0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 H01E0001 arc: A1 H00L0100 arc: A3 V02N0501 arc: A5 H02W0501 arc: B0 E1_H01W0100 arc: B1 V00B0000 arc: B2 V02N0301 arc: B4 H02W0301 arc: B5 N1_V01S0000 arc: B6 H02E0101 arc: B7 H02E0101 arc: C1 E1_H02W0401 arc: C5 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 N1_V02S0201 arc: CE2 N1_V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00B0100 arc: D2 V02S0201 arc: D3 E1_H02W0201 arc: D4 H00R0100 arc: D5 V02S0601 arc: D6 V02N0401 arc: D7 V01N0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q3 arc: E1_H02E0401 Q6 arc: E1_H02E0501 Q7 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F1 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q0 arc: N1_V02N0301 Q3 arc: S1_V02S0601 Q6 arc: V01S0000 Q3 arc: V01S0100 Q7 arc: W1_H02W0401 Q4 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000011001100 word: SLICEC.K0.INIT 0011001100000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1010101000000000 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1100110000000000 word: SLICEA.K1.INIT 1001000000001001 word: SLICEC.K1.INIT 1100010011110101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R20C76:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 H02E0201 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 W1_H02E0201 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0003 E1_H02W0301 arc: A0 H02E0701 arc: A7 H00L0000 arc: B2 H02E0101 arc: B3 V01N0001 arc: B4 W1_H02E0301 arc: B5 H01E0101 arc: B6 V00T0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F7 arc: S1_V02S0301 F3 arc: W1_H02W0401 F6 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C77:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V01N0101 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00R0000 V02N0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0001 arc: V00T0000 E1_H02W0201 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: A1 V02N0501 arc: A2 V00B0000 arc: A3 V00T0000 arc: A5 V02S0101 arc: A6 V02N0301 arc: A7 H00L0000 arc: B0 V02N0101 arc: B4 H00R0000 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F5 arc: S1_V02S0001 F2 arc: S1_V02S0301 F1 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: S1_V02S0701 F7 arc: V01S0000 F0 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C78:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0203 V01N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 N3_V06S0103 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 S3_V06N0303 arc: B0 H02W0301 arc: B1 V00B0000 arc: C5 H02E0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H00R0100 F5 arc: H01W0000 Q1 arc: LSR0 V00T0000 arc: M0 E1_H02W0601 arc: M1 H02W0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N3_V06N0103 Q1 arc: S1_V02S0501 F5 arc: S3_V06S0003 Q0 arc: S3_V06S0303 F5 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICEC.K1.INIT 1111000000000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C79:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 N1_V02S0401 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H06E0003 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 H02W0501 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W3_H06W0003 E1_H01W0000 arc: A1 H01E0001 arc: A3 H02W0701 arc: A4 F5 arc: A5 S1_V02N0301 arc: A6 H02E0701 arc: A7 W1_H02E0701 arc: B0 W1_H02E0301 arc: B3 V02N0101 arc: B4 V00B0100 arc: B5 H02W0101 arc: B6 H02W0301 arc: B7 E1_H02W0101 arc: C3 H02W0401 arc: C4 E1_H01E0101 arc: C5 V02N0001 arc: C6 V01N0101 arc: C7 E1_H02W0601 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D3 V02N0201 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: D6 V02N0601 arc: D7 V01N0001 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 F2 arc: LSR1 V00T0100 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0000 F6 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q1 arc: W3_H06W0203 F4 word: SLICEA.K1.INIT 0000000010101010 word: SLICEA.K0.INIT 0000000011001100 word: SLICED.K0.INIT 1000010000100001 word: SLICEC.K1.INIT 1001000000001001 word: SLICED.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000001001000001 word: SLICEC.K0.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R20C80:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06N0203 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: A0 V01N0101 arc: A2 W1_H02E0501 arc: A5 H02E0501 arc: B0 H02E0101 arc: B2 V02N0101 arc: B5 V00B0100 arc: B7 F3 arc: C0 W1_H02E0601 arc: C2 V02S0401 arc: C3 V02N0401 arc: C5 S1_V02N0201 arc: C7 H02E0601 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 H02E0201 arc: D3 H02E0001 arc: D5 V02N0601 arc: D7 V01N0001 arc: E1_H01E0101 F2 arc: E1_H02E0501 Q5 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 F0 arc: LSR0 V00T0100 arc: LSR1 V00T0000 arc: M4 E1_H01E0101 arc: M5 E1_H02W0001 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: S3_V06S0303 Q5 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0501 F7 arc: W3_H06W0203 F4 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1001000000001001 word: SLICED.K1.INIT 1100000000001100 word: SLICEB.K0.INIT 0000100110010000 word: SLICEB.K1.INIT 1111000000001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1000001001000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C81:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 E1_H02W0001 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V02N0601 arc: A2 S1_V02N0501 arc: A3 V00T0000 arc: B2 V02N0301 arc: B3 V01N0001 arc: C2 W1_H02E0401 arc: C3 W1_H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 S1_V02N0001 arc: D3 V02N0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q3 arc: E1_H02E0301 Q3 arc: F2 F5B_SLICE arc: H01W0100 F2 arc: LSR0 V00B0000 arc: M1 H00L0000 arc: M2 E1_H02W0601 arc: M3 H01W0100 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0601 Q4 arc: N3_V06N0103 Q1 arc: N3_V06N0303 Q6 arc: W1_H02W0501 Q7 word: SLICEB.K0.INIT 0000000011100010 word: SLICEB.K1.INIT 1111101011101110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C82:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 H01E0101 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02S0301 arc: H00R0100 V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 H06E0303 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 N1_V01S0000 arc: A1 H01E0001 arc: A3 E1_H02W0501 arc: A4 W1_H02E0701 arc: A5 V02N0101 arc: A6 F5 arc: A7 F5 arc: B1 V02S0101 arc: B3 V02S0101 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B6 V01S0000 arc: B7 H02W0301 arc: C1 E1_H02W0601 arc: C3 H00L0100 arc: C4 S1_V02N0001 arc: C5 V00T0100 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 H02W0001 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N3_V06N0103 Q1 arc: V00B0000 F6 word: SLICEC.K0.INIT 0000011101110111 word: SLICEC.K1.INIT 0001010100111111 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1100000010001000 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1100000010001000 word: SLICED.K0.INIT 0010001010101010 word: SLICED.K1.INIT 0010001010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C83:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 S1_V02N0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 H01E0101 arc: A0 S1_V02N0501 arc: A1 V02N0501 arc: A3 V02S0501 arc: A5 V02S0101 arc: A7 V02S0101 arc: B3 V02S0101 arc: B5 N1_V01S0000 arc: B7 H02E0101 arc: C0 H02E0401 arc: C1 H02E0401 arc: C3 H02E0601 arc: C5 H02E0601 arc: C7 V02N0001 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0201 arc: D3 V02S0001 arc: D5 H00L0100 arc: D7 V02S0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F6 arc: LSR0 V00B0000 arc: M0 H02E0601 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 E1_H01E0101 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N3_V06N0003 Q3 arc: W1_H02W0201 F2 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1000101010000000 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1010100000001000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1000110010000000 word: SLICEA.K0.INIT 0101000011110000 word: SLICEA.K1.INIT 0101000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C84:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 N1_V01S0100 arc: H00L0000 H02E0201 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00T0000 H02E0001 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: A0 H02E0701 arc: A2 V02N0701 arc: A3 W1_H02E0701 arc: A4 V00T0000 arc: A5 V02N0101 arc: A6 V02N0301 arc: A7 H02E0501 arc: B2 E1_H02W0101 arc: B3 W1_H02E0301 arc: B4 H00L0000 arc: B5 H02E0301 arc: B6 H02E0101 arc: B7 S1_V02N0501 arc: E1_H01E0001 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F3 arc: S1_V02S0201 F2 arc: V01S0000 F7 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C85:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H02E0501 arc: S1_V02S0101 E1_H02W0101 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0601 arc: W1_H02W0201 H01E0001 arc: A1 V02N0701 arc: A2 S1_V02N0701 arc: A3 V00B0000 arc: A4 V02S0301 arc: A5 V00T0000 arc: A6 V02N0101 arc: B0 H02E0101 arc: B7 V02N0501 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V01N0101 F5 arc: N1_V02N0701 F7 arc: V01S0000 F3 arc: V01S0100 F2 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R20C86:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0701 H01E0101 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0001 arc: W1_H02W0101 W3_H06E0103 arc: A2 H02W0501 arc: A3 V00T0000 arc: A4 V02N0301 arc: B0 V01N0001 arc: B1 H02E0301 arc: B5 V02S0701 arc: B6 H02W0301 arc: B7 S1_V02N0701 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q0 arc: E1_H02E0001 F2 arc: E1_H02E0501 Q5 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 Q4 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 E1_H02W0601 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 V01S0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F1 arc: N1_V02N0201 F0 arc: N1_V02N0401 F6 arc: V00T0100 Q3 arc: V01S0000 Q2 arc: V01S0100 F3 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R20C87:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 N3_V06S0203 arc: H00L0100 N1_V02S0101 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02N0001 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: A4 F7 arc: A5 V00B0000 arc: A7 N1_V02S0301 arc: B0 V01N0001 arc: B7 V00T0000 arc: C4 W1_H02E0401 arc: C5 E1_H01E0101 arc: C7 V02N0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 H02E0001 arc: D7 S1_V02N0601 arc: E1_H01E0101 F7 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: LSR1 V00T0100 arc: M4 H02W0401 arc: M5 H00L0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: S1_V02S0201 F0 arc: V01S0000 Q5 arc: V01S0100 Q5 word: SLICED.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0000101010101010 word: SLICEC.K1.INIT 0101000011110000 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R20C88:PLC2 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 V02N0001 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 V02N0301 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 W3_H06E0303 arc: A1 H00L0000 arc: A3 H02E0501 arc: A5 V02N0101 arc: B1 W1_H02E0301 arc: B3 V02N0101 arc: B5 H00L0000 arc: C1 H02E0401 arc: C3 H00L0000 arc: C5 S1_V02N0201 arc: CE0 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D3 V02S0201 arc: D5 V02S0401 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00R0000 F4 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F0 arc: N3_V06N0103 Q1 arc: N3_V06N0203 Q7 arc: N3_V06N0303 Q6 arc: V01S0100 F2 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1000100010100000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1100100001000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1110000000100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C22:PLC2 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 V01N0101 .tile R21C23:PLC2 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 V01N0001 .tile R21C24:PLC2 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E3_H06W0303 .tile R21C25:PLC2 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0701 H06W0203 .tile R21C26:PLC2 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: W1_H02W0201 V06S0103 .tile R21C27:PLC2 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 V01N0101 arc: V01S0000 S3_V06N0103 .tile R21C28:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02N0401 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 V01N0101 arc: V01S0000 S3_V06N0103 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 .tile R21C29:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: H01W0000 E3_H06W0103 arc: S1_V02S0601 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 .tile R21C30:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02N0701 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02W0301 arc: H00R0100 N1_V02S0701 arc: S1_V02S0201 H02W0201 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0301 arc: W3_H06W0303 E1_H01W0100 arc: A4 N1_V01N0101 arc: A5 Q5 arc: B4 V01S0000 arc: B5 V01S0000 arc: C4 V02N0201 arc: C5 N1_V02S0001 arc: CE0 V02S0201 arc: CE1 H02W0101 arc: CE2 N1_V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D4 S1_V02N0601 arc: D5 V02N0401 arc: F4 F5C_SLICE arc: LSR0 V00B0100 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M2 V00T0000 arc: M4 V00B0000 arc: M5 H00L0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: S1_V02S0001 Q2 arc: S1_V02S0701 Q7 arc: V01S0000 Q0 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 1100000010100000 word: SLICEC.K1.INIT 1100101011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C31:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 V02S0001 arc: N1_V02N0201 H06W0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 H06W0003 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 V02N0701 arc: A2 H00L0100 arc: A3 S1_V02N0701 arc: B2 H00R0100 arc: B3 Q3 arc: C2 S1_V02N0601 arc: C3 H00R0100 arc: CE1 V02S0201 arc: CE2 V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 H02E0201 arc: D3 V02N0201 arc: F2 F5B_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: H01W0100 F2 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0601 Q4 word: SLICEB.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 1101100011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R21C32:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W1_H02E0401 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 N1_V02S0001 arc: A0 V02S0701 arc: A2 V02N0701 arc: A3 V02N0501 arc: A4 H02W0501 arc: A5 E1_H02W0701 arc: A6 W1_H02E0701 arc: A7 W1_H02E0501 arc: B2 V02N0101 arc: B3 W1_H02E0101 arc: B4 W1_H02E0301 arc: B5 H02W0101 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: CE0 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: E1_H02E0401 F4 arc: E1_H02E0701 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 V00T0000 arc: M1 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0001 F2 arc: N1_V02N0601 Q6 arc: S1_V02S0301 F3 arc: S3_V06S0203 F7 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C33:PLC2 arc: E1_H02E0301 V01N0101 arc: E1_H02E0701 W3_H06E0203 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 H02E0701 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 H02W0401 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02N0601 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 V02S0701 arc: A0 E1_H02W0701 arc: A1 H02E0501 arc: A2 V02N0501 arc: A3 V00T0000 arc: A4 V00B0000 arc: A5 H02W0501 arc: A6 W1_H02E0701 arc: A7 W1_H02E0501 arc: B0 V02N0101 arc: B1 V02N0301 arc: B2 W1_H02E0301 arc: B3 W1_H02E0101 arc: B4 V02N0701 arc: B5 H02E0101 arc: B6 H02E0301 arc: B7 E1_H02W0301 arc: CE1 V02S0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: E1_H02E0101 F3 arc: E1_H02E0401 F6 arc: E1_H02E0501 F5 arc: E1_H02E0601 F4 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 V00T0100 arc: M3 H00R0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q3 arc: S3_V06S0003 F0 arc: S3_V06S0103 F2 arc: S3_V06S0303 F6 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C34:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06S0303 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0101 N1_V01S0100 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H01E0101 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02N0501 arc: A1 V02N0701 arc: A2 V02N0701 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 V02N0101 arc: B1 V02N0301 arc: B2 V02N0301 arc: B6 V00T0000 arc: B7 V00T0000 arc: C6 S1_V02N0201 arc: C7 S1_V02N0201 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0001 F0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V02N0401 F6 arc: N1_V02N0701 F7 arc: S3_V06S0103 F2 arc: V01S0100 F1 word: SLICED.K0.INIT 1110100010110010 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R21C35:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 S1_V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 E1_H02W0401 arc: H01W0000 E3_H06W0103 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 H06W0003 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00T0000 H02E0201 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 W1_H02E0501 arc: A2 E1_H01E0001 arc: A3 H02W0701 arc: A4 W1_H02E0501 arc: A5 S1_V02N0101 arc: A6 V02N0301 arc: A7 E1_H02W0501 arc: B0 W1_H02E0101 arc: B1 V02S0301 arc: B2 N1_V02S0301 arc: B3 Q3 arc: B4 S1_V02N0501 arc: B5 W1_H02E0101 arc: B6 V00T0000 arc: B7 V00B0000 arc: C0 H00L0000 arc: C1 H02W0601 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02W0601 arc: C5 S1_V02N0201 arc: C6 V02N0001 arc: C7 W1_H02E0401 arc: CE1 H02E0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 S1_V02N0001 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V02N0601 arc: D5 H02W0001 arc: D6 S1_V02N0401 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: LSR0 W1_H02E0301 arc: M2 H02E0601 arc: M3 H00R0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V02N0101 F1 arc: N1_V02N0401 F6 arc: N1_V02N0501 F5 arc: N1_V02N0601 F4 arc: N1_V02N0701 F7 arc: W3_H06W0103 F2 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1101100011111111 word: SLICEA.K1.INIT 1110101110000010 word: SLICED.K0.INIT 1001011001101001 word: SLICED.K1.INIT 1001011001101001 word: SLICEC.K1.INIT 1110110110000100 word: SLICEC.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R21C36:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 V06N0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 V02S0501 arc: A3 V00B0000 arc: A4 H02E0501 arc: A5 S1_V02N0301 arc: A6 E1_H01W0000 arc: A7 H02E0701 arc: B0 N1_V02S0301 arc: B1 Q1 arc: B2 E1_H02W0301 arc: B3 H00L0000 arc: B4 H00L0000 arc: B5 H02W0101 arc: B6 H02E0301 arc: B7 V02S0701 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 V02N0601 arc: C3 H02E0601 arc: C4 S1_V02N0001 arc: C5 W1_H02E0401 arc: C6 S1_V02N0001 arc: C7 S1_V02N0201 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 N1_V02S0001 arc: D2 V02N0001 arc: D3 H02W0201 arc: D4 E1_H01W0100 arc: D5 S1_V02N0401 arc: D6 E1_H02W0001 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: LSR0 V00B0100 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: N1_V02N0301 F3 arc: N1_V02N0401 F4 arc: N1_V02N0601 F6 arc: V01S0000 F0 arc: V01S0100 F0 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K0.INIT 1010011001100101 word: SLICEC.K0.INIT 1001011001101001 word: SLICEC.K1.INIT 1111100110010000 word: SLICED.K1.INIT 1001011001101001 word: SLICEB.K1.INIT 1111100110010000 word: SLICED.K0.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R21C37:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V06N0303 arc: W3_H06W0203 V01N0001 arc: A0 H00L0100 arc: A1 H00R0000 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: A4 H02E0701 arc: A5 S1_V02N0101 arc: A6 W1_H02E0501 arc: A7 H02E0701 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 N1_V02S0701 arc: B5 W1_H02E0301 arc: B6 S1_V02N0701 arc: B7 H02E0101 arc: C0 V02S0601 arc: C1 E1_H02W0401 arc: C2 F4 arc: C3 F4 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C6 V00B0100 arc: C7 V00T0100 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 V02N0401 arc: D5 E1_H01W0100 arc: D6 S1_V02N0401 arc: D7 V02N0401 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: M0 H02E0601 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: N1_V02N0301 F3 arc: N1_V02N0401 F6 arc: W1_H02W0201 F0 word: SLICEA.K0.INIT 1000111011000000 word: SLICEA.K1.INIT 1110111011010100 word: SLICED.K0.INIT 1110101110000010 word: SLICEC.K0.INIT 1011010000101101 word: SLICEB.K0.INIT 1110101110000010 word: SLICED.K1.INIT 1011010000101101 word: SLICEC.K1.INIT 1110110110000100 word: SLICEB.K1.INIT 1001011001101001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R21C38:PLC2 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06E0303 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H02W0701 arc: A0 S1_V02N0501 arc: A1 V02S0501 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 F7 arc: A6 F7 arc: A7 W1_H02E0501 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 E1_H02W0101 arc: B6 E1_H02W0101 arc: B7 V02S0501 arc: C0 H00R0100 arc: C1 E1_H02W0401 arc: C2 S1_V02N0601 arc: C3 E1_H02W0601 arc: C4 S1_V02N0001 arc: C6 S1_V02N0001 arc: C7 V02N0001 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 F2 arc: D6 F2 arc: D7 S1_V02N0401 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: M0 V00B0100 arc: M2 V00T0100 arc: N1_V01N0001 F4 arc: N1_V01N0101 F6 arc: W1_H02W0001 F0 word: SLICEA.K0.INIT 1110011000100000 word: SLICEA.K1.INIT 1111101111000010 word: SLICEB.K0.INIT 1011110000100000 word: SLICEB.K1.INIT 1111101111000010 word: SLICED.K1.INIT 1010011001100101 word: SLICEC.K0.INIT 1110110110000100 word: SLICED.K0.INIT 1001011001101001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R21C39:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 N1_V01S0000 arc: H00L0000 V02S0001 arc: H00R0000 V02S0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H06W0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 V02N0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0601 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 F7 arc: A3 V02N0701 arc: A4 F7 arc: A5 S1_V02N0101 arc: A6 S1_V02N0101 arc: A7 N1_V02S0301 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B2 S1_V02N0101 arc: B3 H00R0000 arc: B4 H02W0101 arc: B5 F3 arc: B6 F3 arc: B7 S1_V02N0701 arc: C0 V02N0601 arc: C1 V02N0401 arc: C2 E1_H01W0000 arc: C3 V02N0601 arc: C4 S1_V02N0201 arc: C5 S1_V02N0001 arc: C6 S1_V02N0001 arc: C7 V02N0001 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 F0 arc: D3 V02N0001 arc: D4 F0 arc: D5 H02W0201 arc: D6 E1_H02W0001 arc: D7 E1_H02W0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: M0 V00B0000 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: W1_H02W0601 F4 word: SLICEC.K1.INIT 1111100110010000 word: SLICEB.K1.INIT 1010011001100101 word: SLICED.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 1011110000100000 word: SLICEA.K1.INIT 1111101111000010 word: SLICED.K1.INIT 1100011001100011 word: SLICEB.K0.INIT 1111100110010000 word: SLICEC.K0.INIT 1001011001101001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R21C40:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 H02E0301 arc: H00R0000 V02S0601 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 N1_V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: A0 H02W0701 arc: A1 F7 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 W1_H02E0701 arc: A5 V02N0101 arc: A6 H02W0701 arc: A7 V00T0100 arc: B0 H02E0101 arc: B1 S1_V02N0101 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B6 H02E0101 arc: B7 E1_H02W0301 arc: C0 F4 arc: C1 H02E0601 arc: C2 S1_V02N0601 arc: C3 S1_V02N0401 arc: C4 V02N0201 arc: C5 E1_H02W0401 arc: C6 V00B0100 arc: C7 V02N0201 arc: D0 S1_V02N0201 arc: D1 F2 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 H02E0001 arc: D5 N1_V02S0601 arc: D6 F2 arc: D7 V02N0601 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 E1_H02W0601 arc: N1_V01N0001 F0 arc: N1_V01N0101 F6 arc: N1_V02N0601 F4 arc: S3_V06S0303 F5 arc: V00B0100 F7 arc: W1_H02W0701 F5 arc: W3_H06W0103 F1 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 1110101110000010 word: SLICED.K0.INIT 1110101110000010 word: SLICEC.K0.INIT 1010011001100101 word: SLICEB.K0.INIT 1101101001000000 word: SLICEB.K1.INIT 1111110110100100 word: SLICED.K1.INIT 1100011001100011 word: SLICEA.K1.INIT 1001011001101001 word: SLICEC.K1.INIT 1111101010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R21C41:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0303 H06W0303 arc: V00B0100 N1_V02S0101 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: A1 H00R0000 arc: A3 F7 arc: A4 F7 arc: A6 H02E0501 arc: A7 H02E0701 arc: B1 V02S0101 arc: B3 W1_H02E0101 arc: B4 H02E0101 arc: C1 N1_V01S0100 arc: C3 F4 arc: C4 H02E0601 arc: C6 V02S0201 arc: C7 V02N0001 arc: CE1 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 H01E0101 arc: D4 W1_H02E0201 arc: D6 N1_V02S0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M3 H00L0100 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0701 Q7 arc: S3_V06S0003 Q3 arc: V01S0000 Q7 arc: W1_H02W0501 Q7 arc: W3_H06W0003 F3 arc: W3_H06W0203 Q7 word: SLICEC.K0.INIT 0110100110010110 word: SLICED.K1.INIT 0000101010101111 word: SLICEB.K1.INIT 0101101011000011 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1010000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R21C42:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 V06N0103 arc: H00L0000 V02S0201 arc: H00R0000 H02W0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 N1_V02S0101 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 N1_V01S0000 arc: A0 H00R0000 arc: A3 N1_V02S0701 arc: A4 V02S0301 arc: A5 V00T0000 arc: A7 H02E0501 arc: B0 H00R0100 arc: B3 H00L0000 arc: B4 V02S0501 arc: B6 V02S0701 arc: B7 H01E0101 arc: C0 H02W0601 arc: C3 H02E0401 arc: C4 V00T0100 arc: C5 H01E0001 arc: C6 H02W0601 arc: C7 F4 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D3 S1_V02N0001 arc: D4 V02S0401 arc: D5 V00B0000 arc: D6 H02W0201 arc: D7 S1_V02N0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F7 arc: LSR0 V00B0100 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0601 F6 arc: N1_V02N0701 F7 arc: S3_V06S0303 F5 arc: V01S0100 Q0 word: SLICEC.K1.INIT 1010000000000000 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICED.K0.INIT 1100000000000000 word: SLICEA.K0.INIT 1111111100001011 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R21C43:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V06N0203 arc: H00R0000 H02E0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N1_V02S0501 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: A1 V02S0701 arc: A5 V02S0301 arc: A7 V02S0101 arc: B0 V02S0101 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 V02S0101 arc: B4 N1_V01S0000 arc: B5 V02S0701 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 V00B0100 arc: D0 V00T0100 arc: D1 H02E0201 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V00B0000 arc: D5 H02E0201 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 W1_H02E0201 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 word: SLICEA.K0.INIT 0011000000000000 word: SLICEA.K1.INIT 1010000000100000 word: SLICEB.K0.INIT 0011000000000000 word: SLICEB.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0011001100000000 word: SLICEC.K1.INIT 1100000001010000 word: SLICED.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0101010100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 .tile R21C44:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H06W0303 arc: V00T0000 E1_H02W0201 arc: W1_H02W0201 H01E0001 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: H01W0000 Q0 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: N3_V06N0003 Q0 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C45:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02S0101 arc: H00L0000 V02S0001 arc: H00R0000 H02W0401 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 W1_H02E0401 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A2 V02S0701 arc: A3 H02W0701 arc: A4 H02W0501 arc: A5 H02E0501 arc: A6 F5 arc: B0 V00B0000 arc: B1 V02N0301 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 V02S0701 arc: B5 H00L0000 arc: B6 F3 arc: C0 E1_H02W0601 arc: C1 W1_H02E0401 arc: C2 E1_H02W0401 arc: C3 V02N0401 arc: C4 V02S0001 arc: C5 W1_H02E0601 arc: C6 F4 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0201 arc: D2 H01E0101 arc: D3 W1_H02E0001 arc: D4 W1_H02E0201 arc: D5 V02N0401 arc: D6 F2 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M2 V00T0000 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N1_V02N0701 Q5 arc: V00B0100 Q5 arc: V01S0100 Q2 word: SLICEC.K1.INIT 1100111101000101 word: SLICEB.K1.INIT 1101110100001101 word: SLICEB.K0.INIT 1111001101010001 word: SLICEC.K0.INIT 1000110010101111 word: SLICED.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1100111111000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C46:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V02S0601 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 N1_V02S0301 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 V06S0203 arc: A0 S1_V02N0501 arc: A2 H02W0501 arc: A5 V02S0101 arc: A7 N1_V02S0301 arc: B0 N1_V02S0301 arc: B2 H02E0101 arc: B5 S1_V02N0701 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C2 E1_H02W0401 arc: C5 S1_V02N0201 arc: C7 N1_V02S0201 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 H00R0000 arc: D5 F0 arc: D7 H00R0100 arc: E1_H01E0001 F2 arc: E1_H02E0001 F2 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00R0100 Q7 arc: H01W0000 F2 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: S1_V02S0101 Q1 arc: S1_V02S0501 Q7 arc: V00B0100 F7 arc: V00T0000 Q2 arc: V01S0000 F2 word: SLICED.K1.INIT 0000001010100010 word: SLICEA.K0.INIT 1110111011111100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 1010100011111101 word: SLICEB.K0.INIT 1011001110100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C47:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 N3_V06S0103 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0003 E3_H06W0303 arc: A0 H02E0501 arc: C0 N1_V01N0001 arc: C5 E1_H01E0101 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D5 H00R0100 arc: E1_H01E0001 Q2 arc: E1_H02E0401 Q4 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 E1_H02W0501 arc: M2 V00B0100 arc: M4 V00B0000 arc: M5 W1_H02E0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q4 arc: V01S0000 Q0 arc: V01S0100 Q7 arc: W1_H02W0701 Q5 arc: W3_H06W0303 F5 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111000010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C48:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 H02W0201 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N1_V02S0601 arc: V00B0100 V02S0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: A0 H01E0001 arc: C0 H00L0000 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: F0 F0_SLICE arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 1010111110100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C49:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A2 V00T0000 arc: A3 S1_V02N0501 arc: A4 N1_V02S0301 arc: A5 N1_V01N0101 arc: A6 H00R0000 arc: A7 N1_V02S0301 arc: B0 E1_H01W0100 arc: B2 V02S0101 arc: B3 H00L0000 arc: B4 N1_V01S0000 arc: B5 F3 arc: B6 N1_V02S0701 arc: C0 W1_H02E0401 arc: C2 H02W0601 arc: C3 N1_V01S0100 arc: C5 V00T0100 arc: C6 V02N0001 arc: C7 V00T0000 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 N1_V02S0201 arc: D3 V00B0100 arc: D4 V02S0401 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 H00L0100 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0100 F6 arc: LSR0 E1_H02W0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 F2 arc: V01S0100 Q0 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 1111000011001100 word: SLICEC.K0.INIT 0001000110111011 word: SLICED.K1.INIT 0000010110101111 word: SLICED.K0.INIT 1100100000001000 word: SLICEB.K1.INIT 0000000011011000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEC.K1.INIT 0000000011101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C50:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 N3_V06S0003 arc: A0 V02S0501 arc: A2 H02E0501 arc: A3 F7 arc: A7 N1_V01S0100 arc: B0 E1_H02W0301 arc: B2 H00R0100 arc: B3 H02W0301 arc: B7 N1_V01S0000 arc: C0 S1_V02N0401 arc: C2 V02S0401 arc: C3 S1_V02N0601 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V01S0100 arc: D3 F2 arc: D7 H00L0100 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: M0 V00B0000 arc: M1 H02W0001 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0003 F0 arc: W1_H02W0301 F3 arc: W3_H06W0103 Q1 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0101111101010111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1110010000000000 word: SLICED.K1.INIT 0000000010101100 word: SLICEB.K1.INIT 1100110010001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R21C51:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 H02W0001 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0501 H02W0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V02N0501 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A2 V02S0701 arc: A4 V02S0301 arc: A5 V02S0101 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 H02W0101 arc: B4 N1_V02S0501 arc: B5 H02E0101 arc: C1 E1_H01W0000 arc: C2 H00R0100 arc: C4 N1_V02S0001 arc: C5 F4 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V00B0100 arc: D2 N1_V02S0001 arc: D4 H02W0201 arc: D5 V02N0601 arc: E1_H01E0101 F2 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V01S0000 Q1 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 1110111000100010 word: SLICEA.K1.INIT 1111110000110000 word: SLICEC.K0.INIT 1010001010000000 word: SLICEB.K0.INIT 0000000101010001 word: SLICEC.K1.INIT 0000010000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C52:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 N1_V02S0401 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0001 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V02S0301 arc: A5 V02S0301 arc: A7 H02W0701 arc: B0 V02N0301 arc: B1 H02W0301 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 E1_H02W0301 arc: B5 H02E0301 arc: B7 H02W0301 arc: C0 S1_V02N0401 arc: C1 V02N0601 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 V02N0001 arc: C5 V00T0000 arc: C7 F4 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 S1_V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H02E0201 arc: D5 E1_H02W0001 arc: D7 F2 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: M0 V00B0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0301 Q3 word: SLICEA.K0.INIT 1111111001010100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0010011100000000 word: SLICEB.K1.INIT 0010011111111111 word: SLICEC.K0.INIT 0101111100111111 word: SLICEC.K1.INIT 0100000001001100 word: SLICED.K1.INIT 0000010000010101 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R21C53:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 H01E0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H02W0701 arc: A3 S1_V02N0701 arc: A4 F7 arc: A5 H02W0701 arc: A6 F5 arc: A7 Q7 arc: B0 S1_V02N0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 E1_H01W0100 arc: B4 V02N0501 arc: B6 V02N0701 arc: B7 V00B0100 arc: C0 S1_V02N0601 arc: C3 F4 arc: C4 S1_V02N0201 arc: C5 E1_H01E0101 arc: C6 H02W0601 arc: C7 H02E0601 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02W0201 arc: D2 Q2 arc: D3 H02E0201 arc: D4 F0 arc: D5 H00L0100 arc: D6 F2 arc: D7 H01W0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q2 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 H02W0501 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M5 E1_H02W0001 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0301 F3 arc: S1_V02S0401 F6 arc: V00T0100 Q1 arc: W1_H02W0101 F1 word: SLICEA.K1.INIT 0101010100110011 word: SLICEC.K1.INIT 1111010110100000 word: SLICEB.K0.INIT 1101110110001000 word: SLICED.K0.INIT 0000000100110001 word: SLICEA.K0.INIT 0000101100001000 word: SLICED.K1.INIT 1011000010000000 word: SLICEC.K0.INIT 0011111100101110 word: SLICEB.K1.INIT 1000100010101000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C54:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02S0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 W1_H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0303 N3_V06S0303 arc: A1 E1_H01E0001 arc: A2 F5 arc: A3 V02N0701 arc: A4 H02W0501 arc: A5 V02S0101 arc: A6 V02S0101 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B1 V02N0101 arc: B2 H02E0101 arc: B3 V02S0101 arc: B4 V02S0701 arc: B5 V02N0701 arc: B6 N1_V01S0000 arc: C0 H02E0401 arc: C1 F6 arc: C2 S1_V02N0401 arc: C3 H00R0100 arc: C4 N1_V02S0201 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: C7 S1_V02N0001 arc: CE0 H00L0000 arc: CE1 S1_V02N0201 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 F2 arc: D2 V01S0100 arc: D3 S1_V02N0001 arc: D4 S1_V02N0601 arc: D5 S1_V02N0601 arc: D6 V02S0401 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F4 arc: H01W0100 F1 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M3 H00L0100 arc: M4 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q3 arc: S1_V02S0501 Q7 arc: S1_V02S0601 Q4 arc: V01S0000 F7 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 0000000101010001 word: SLICED.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1100001111111111 word: SLICED.K0.INIT 1110010000000000 word: SLICEC.K1.INIT 0011001000010000 word: SLICEB.K0.INIT 1110111100000000 word: SLICEB.K1.INIT 0101010000010000 word: SLICEA.K1.INIT 1111111000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C55:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 V06S0203 arc: A1 H02W0701 arc: B1 V00T0000 arc: B5 N1_V01S0000 arc: B7 N1_V01S0000 arc: C1 V02N0601 arc: C4 V02S0201 arc: C6 V02S0201 arc: D0 N1_V01S0000 arc: D1 V02S0201 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 H02W0601 arc: M1 H00R0000 arc: M2 H02W0601 arc: M3 H00R0100 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00B0000 arc: N3_V06N0003 F3 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 0111111100000000 word: SLICEB.K0.INIT 1111111100000000 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1111000011110000 word: SLICEC.K1.INIT 1100110011001100 word: SLICED.K0.INIT 1111000011110000 word: SLICED.K1.INIT 1100110011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C56:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 V01N0001 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02W0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V02N0501 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H02W0501 arc: A0 S1_V02N0501 arc: A1 E1_H02W0701 arc: A2 V02N0701 arc: A3 N1_V02S0501 arc: A4 V00T0100 arc: A5 S1_V02N0301 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 H01W0100 arc: B3 N1_V02S0101 arc: B4 N1_V02S0501 arc: B6 V02S0501 arc: C0 W1_H02E0401 arc: C1 S1_V02N0601 arc: C2 V02S0401 arc: C3 H00L0000 arc: C4 V00T0000 arc: C6 V02N0001 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0201 arc: D2 N1_V02S0001 arc: D3 H02W0201 arc: D4 W1_H02E0001 arc: D5 H00R0100 arc: D6 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: M0 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0201 Q2 arc: S3_V06S0103 Q2 arc: V01S0000 F0 arc: V01S0100 F0 arc: W1_H02W0301 Q3 arc: W1_H02W0601 F6 arc: W1_H02W0701 F5 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICED.K0.INIT 1100000000000000 word: SLICEC.K1.INIT 1010101000000000 word: SLICEB.K0.INIT 0110100111111111 word: SLICEB.K1.INIT 1001111101101111 word: SLICEC.K0.INIT 1001011011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C57:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V06S0203 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0301 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0003 arc: A1 E1_H01E0001 arc: A3 H00L0100 arc: A4 N1_V02S0101 arc: B1 N1_V02S0301 arc: B3 V02S0101 arc: B4 V00B0100 arc: C1 V02S0401 arc: C2 H02W0601 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 V02N0201 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0001 arc: D2 E1_H02W0001 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 E1_H02W0201 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q4 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M6 N1_V01N0101 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F0 arc: N1_V02N0501 F5 arc: S3_V06S0003 Q3 arc: W3_H06W0103 F2 arc: W3_H06W0203 Q4 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 1111111100001111 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1001011001101001 word: SLICEB.K1.INIT 1001011011111111 word: SLICEC.K0.INIT 1001011011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C58:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 V02S0401 arc: H00R0000 H02E0601 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 N1_V02S0701 arc: B0 H02E0301 arc: B2 H02E0301 arc: C0 V02N0401 arc: C2 V02N0401 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 H02E0201 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: LSR0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00T0000 F2 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000001111111111 word: SLICEA.K0.INIT 1110110010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C59:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 V02S0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 N1_V02S0701 arc: B0 V00B0000 arc: B4 H00L0000 arc: B5 S1_V02N0701 arc: C0 H02E0401 arc: C1 H00L0000 arc: C2 H00L0100 arc: C4 V00T0000 arc: C5 S1_V02N0001 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D5 H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H01W0000 F2 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: M1 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: S1_V02S0701 F5 arc: V00B0000 F4 arc: V00T0000 Q2 arc: V01S0000 F1 arc: W1_H02W0001 Q0 arc: W1_H02W0201 F2 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 1010111000001100 word: SLICEA.K1.INIT 1111111111110000 word: SLICEC.K0.INIT 0011000000110000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEC.K1.INIT 0011001100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R21C60:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0001 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0100 arc: A1 H02E0701 arc: A2 S1_V02N0501 arc: A3 S1_V02N0701 arc: A5 S1_V02N0301 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 H02W0301 arc: B3 Q3 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H02E0401 arc: C3 H02E0401 arc: C5 V00B0100 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02W0201 arc: D2 V00T0100 arc: D3 H02W0001 arc: D5 E1_H02W0001 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H01W0000 F0 arc: H01W0100 F0 arc: M0 H02E0601 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H02E0201 arc: M5 H02E0001 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F2 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101110111110101 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R21C61:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0000 H02W0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 H02W0601 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06N0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 E1_H02W0701 arc: A1 V02N0701 arc: A2 E1_H02W0501 arc: A3 N1_V02S0501 arc: A4 W1_H02E0501 arc: A5 Q5 arc: B0 V00T0000 arc: B1 S1_V02N0101 arc: B2 V02N0301 arc: B3 Q3 arc: B4 V00B0100 arc: B5 H02W0301 arc: C0 H02E0401 arc: C1 H02E0601 arc: C2 S1_V02N0601 arc: C4 E1_H01E0101 arc: C5 E1_H01E0101 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02N0201 arc: D2 V02S0201 arc: D3 H02W0001 arc: D4 H01W0000 arc: D5 H02E0201 arc: E1_H01E0101 Q7 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0100 F2 arc: M3 H00L0100 arc: M4 V00T0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F2 arc: N1_V02N0201 Q0 arc: S1_V02S0301 F1 arc: S3_V06S0103 F1 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: V00T0100 F3 arc: V01S0000 F1 arc: V01S0100 F4 arc: W3_H06W0003 Q0 word: SLICEA.K1.INIT 0010000000000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 0101010100000100 word: SLICEB.K1.INIT 1100110010101010 word: SLICEC.K0.INIT 1010000010001000 word: SLICEC.K1.INIT 1110001011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C62:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S1_V02N0301 arc: H00L0000 E1_H02W0201 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 V02N0301 arc: A7 V02N0301 arc: B0 E1_H02W0101 arc: B1 E1_H02W0301 arc: B2 E1_H02W0101 arc: B3 Q3 arc: B4 E1_H02W0101 arc: B5 E1_H02W0301 arc: B6 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 H02E0601 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 H01E0001 arc: C5 E1_H01E0101 arc: C6 H02E0401 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0001 arc: D2 V01S0100 arc: D3 E1_H02W0001 arc: D4 H00R0100 arc: D5 H02E0201 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0101 Q7 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 F6 arc: H00R0100 Q5 arc: H01W0000 F2 arc: H01W0100 F4 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 H02W0201 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00B0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q7 arc: N3_V06N0203 F7 arc: S3_V06S0303 F6 arc: V01S0100 Q3 arc: W1_H02W0201 F0 arc: W1_H02W0401 F6 arc: W1_H02W0601 F6 arc: W1_H02W0701 F7 word: SLICED.K1.INIT 1000000000000000 word: SLICED.K0.INIT 0010000000000000 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1111101101110011 word: SLICEB.K0.INIT 1100100001000000 word: SLICEB.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 1100100000001000 word: SLICEC.K1.INIT 1011101111110011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C63:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 N1_V02S0201 arc: H00R0100 H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H02E0101 arc: S3_V06S0103 H06W0103 arc: V00B0100 N1_V02S0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: B0 H01W0100 arc: B1 Q1 arc: C0 E1_H02W0401 arc: C1 E1_H02W0601 arc: CE0 E1_H02W0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: H00L0100 Q1 arc: H01W0000 F0 arc: H01W0100 Q5 arc: M0 V00B0100 arc: M1 H00L0000 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R21C64:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 H02E0201 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 H06W0303 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E1_H02W0201 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02S0501 arc: A3 V02S0501 arc: A5 E1_H02W0501 arc: A7 V02N0101 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: B4 H00R0000 arc: B5 V02N0501 arc: B7 E1_H02W0301 arc: C0 N1_V01N0001 arc: C1 E1_H02W0401 arc: C2 S1_V02N0601 arc: C3 S1_V02N0401 arc: C4 Q4 arc: C5 H02E0401 arc: C7 E1_H02W0601 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 W1_H02E0001 arc: D5 W1_H02E0201 arc: D7 W1_H02E0201 arc: E1_H01E0001 F5 arc: E1_H01E0101 F2 arc: E1_H02E0201 F2 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H00R0100 F5 arc: H01W0000 F7 arc: H01W0100 F0 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 H02E0601 arc: M3 H02E0201 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F7 arc: N3_V06N0303 F5 arc: V00B0000 F4 arc: V01S0000 F7 arc: V01S0100 F0 word: SLICED.K1.INIT 1000000000000000 word: SLICEC.K1.INIT 1000000000000000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEB.K0.INIT 1000001000101000 word: SLICEB.K1.INIT 1110101110111110 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R21C65:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 S3_V06N0003 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 S1_V02N0701 arc: A1 V02S0501 arc: A2 V00B0000 arc: A3 E1_H02W0501 arc: A4 F5 arc: A6 H02W0701 arc: A7 Q7 arc: B0 V02S0301 arc: B1 W1_H02E0301 arc: B2 E1_H01W0100 arc: B3 Q3 arc: B4 S1_V02N0501 arc: B5 H02E0301 arc: B6 V02N0501 arc: C0 V02N0601 arc: C1 F4 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C5 S1_V02N0001 arc: C6 F4 arc: C7 V00T0100 arc: CE0 W1_H02E0101 arc: CE1 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H01E0101 arc: D2 E1_H02W0201 arc: D3 H02W0001 arc: D4 H00R0100 arc: D5 S1_V02N0601 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 F2 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 H02E0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: S1_V02S0201 F0 arc: S1_V02S0301 F1 arc: S1_V02S0501 F5 arc: V00B0000 Q4 arc: V00B0100 F7 arc: V00T0100 Q1 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1101100011111111 word: SLICEC.K1.INIT 1111110011000000 word: SLICEC.K0.INIT 1001011001101001 word: SLICED.K0.INIT 1110110110000100 word: SLICEA.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1111100110010000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R21C66:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02E0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 H01E0101 arc: S3_V06S0203 N1_V01S0000 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H02W0501 arc: A1 H00L0100 arc: A4 N1_V02S0101 arc: A5 E1_H02W0501 arc: A7 E1_H02W0501 arc: B0 H02E0101 arc: B1 S1_V02N0101 arc: B2 H01W0100 arc: B3 W1_H02E0101 arc: B4 F3 arc: B5 H00R0000 arc: B7 V00B0000 arc: C0 H02E0401 arc: C1 E1_H02W0401 arc: C3 S1_V02N0401 arc: C4 S1_V02N0001 arc: C5 V02N0201 arc: C7 V02N0201 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 W1_H02E0001 arc: D2 H02W0201 arc: D3 V02N0001 arc: D4 W1_H02E0001 arc: D5 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: E1_H02E0001 F0 arc: E1_H02E0201 Q2 arc: E1_H02E0501 F7 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q2 arc: S1_V02S0701 F5 arc: S3_V06S0003 F0 arc: S3_V06S0103 Q2 arc: V00B0000 F4 arc: V00T0100 F3 arc: V01S0000 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0201 Q2 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 0011001111001100 word: SLICEB.K1.INIT 1111110011000000 word: SLICEC.K0.INIT 1001011001101001 word: SLICEC.K1.INIT 1111100110010000 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1000001000101000 word: SLICEA.K1.INIT 1111100111110110 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R21C67:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: H00L0000 N1_V02S0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 W1_H02E0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 S1_V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H01W0100 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H01E0001 arc: A3 H01E0001 arc: A4 F5 arc: A5 V00T0000 arc: A6 V02S0101 arc: A7 F5 arc: B0 H02W0101 arc: B1 E1_H01W0100 arc: B2 E1_H01W0100 arc: B3 Q3 arc: B4 V00B0100 arc: B5 H02W0301 arc: B6 H02E0101 arc: B7 N1_V01S0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 N1_V01N0001 arc: C3 E1_H01W0000 arc: C4 V02S0201 arc: C5 S1_V02N0201 arc: C6 V02N0001 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q3 arc: S1_V02S0701 F7 arc: V01S0100 F2 word: SLICEB.K0.INIT 1010001010000000 word: SLICEB.K1.INIT 1101111111010101 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICED.K0.INIT 1001011001101001 word: SLICEC.K1.INIT 1100011001100011 word: SLICEC.K0.INIT 1111100110010000 word: SLICED.K1.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R21C68:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 W1_H02E0201 arc: E3_H06E0203 H01E0001 arc: H00L0000 H02W0001 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 H02W0401 arc: V00T0000 W1_H02E0201 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02S0601 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0501 arc: A1 V02S0501 arc: A4 S1_V02N0301 arc: A5 S1_V02N0301 arc: A7 V02S0301 arc: B0 H01W0100 arc: B1 V00T0000 arc: B4 H00L0000 arc: B5 H00L0000 arc: C0 V02S0401 arc: C1 H00L0100 arc: C4 S1_V02N0201 arc: C5 S1_V02N0201 arc: C7 V02S0001 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 N1_V01S0000 arc: D3 V01S0100 arc: D4 H02E0001 arc: D5 H02E0001 arc: D7 H01W0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F0 arc: E1_H02E0101 Q3 arc: E1_H02E0301 Q3 arc: E1_H02E0401 F4 arc: E1_H02E0601 F4 arc: E1_H02E0701 F7 arc: E3_H06E0003 Q3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 H02E0301 arc: M0 V00B0000 arc: M4 E1_H02W0401 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q3 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q3 arc: S3_V06S0003 Q3 arc: V01S0000 Q3 arc: V01S0100 Q3 arc: W1_H02W0101 Q3 arc: W3_H06W0003 Q3 word: SLICED.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011111110110011 word: SLICEB.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1010010001000000 word: SLICEC.K1.INIT 1111110111011010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C69:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 H02E0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 E1_H02W0301 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E3_H06W0003 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 H01E0001 arc: A3 H01E0001 arc: A4 W1_H02E0701 arc: A5 S1_V02N0101 arc: A7 S1_V02N0101 arc: B0 H01W0100 arc: B1 Q1 arc: B2 W1_H02E0101 arc: B3 Q3 arc: B4 S1_V02N0501 arc: B5 H02W0301 arc: B6 H02E0301 arc: B7 V00B0000 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 H00L0100 arc: C3 W1_H02E0401 arc: C4 S1_V02N0201 arc: C5 H02E0601 arc: C6 Q6 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 W1_H02E0201 arc: D5 S1_V02N0601 arc: D6 S1_V02N0401 arc: D7 S1_V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0501 Q7 arc: E1_H02E0601 F6 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q1 arc: M0 V00T0000 arc: M1 V01S0100 arc: M2 V00B0100 arc: M3 H02W0201 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 word: SLICEA.K0.INIT 1110010000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEB.K0.INIT 1100010010000000 word: SLICEB.K1.INIT 1101111110001111 word: SLICED.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1110100010110010 word: SLICED.K1.INIT 1001011001101001 word: SLICEC.K0.INIT 1100011001100011 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R21C70:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 N1_V01S0000 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A1 S1_V02N0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 S1_V02N0301 arc: A7 Q7 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 W1_H02E0101 arc: B3 W1_H02E0301 arc: B4 W1_H02E0301 arc: B5 W1_H02E0101 arc: B6 W1_H02E0301 arc: B7 W1_H02E0101 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 V02S0201 arc: C5 V02S0201 arc: C6 V00B0100 arc: C7 S1_V02N0001 arc: CE0 S1_V02N0201 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 W1_H02E0201 arc: D7 W1_H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q3 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H02W0001 arc: M6 E1_H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q5 arc: V00B0100 Q7 arc: V01S0000 F2 arc: V01S0100 F0 word: SLICEA.K0.INIT 1010001010000000 word: SLICEA.K1.INIT 1110001011111111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011100011111111 word: SLICEC.K0.INIT 1011100000000000 word: SLICEC.K1.INIT 1011100011111111 word: SLICED.K0.INIT 1011100000000000 word: SLICED.K1.INIT 1110001011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R21C71:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 S1_V02N0001 arc: H00R0000 V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 N1_V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0701 V01N0101 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 W1_H02E0701 arc: A3 W1_H02E0501 arc: A4 V02N0301 arc: A5 H02W0701 arc: A7 E1_H02W0501 arc: B0 H02E0301 arc: B1 Q1 arc: B3 Q3 arc: B4 H02W0301 arc: B5 H02W0301 arc: B6 H02E0301 arc: B7 H02W0301 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 E1_H02W0401 arc: C5 V02N0001 arc: C6 S1_V02N0201 arc: C7 V02N0001 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D4 H02W0001 arc: D5 W1_H02E0001 arc: D6 H00R0100 arc: D7 H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F4 arc: E1_H02E0401 Q6 arc: E1_H02E0501 F7 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F7 arc: H01W0100 F4 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F5 arc: N1_V02N0101 F3 arc: V01S0000 F0 arc: V01S0100 F4 arc: W1_H02W0201 F2 arc: W1_H02W0401 Q4 arc: W1_H02W0501 F5 arc: W1_H02W0601 F6 arc: W3_H06W0203 F4 word: SLICED.K1.INIT 0010000000000000 word: SLICEC.K1.INIT 0010000000000000 word: SLICEC.K0.INIT 0010000000000000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K0.INIT 1010111110100000 word: SLICED.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1010110010101100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 .tile R21C72:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 V06S0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06E0303 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 V02S0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 W1_H02E0101 arc: B2 H01W0100 arc: B3 Q3 arc: B4 W1_H02E0101 arc: B5 W1_H02E0101 arc: B6 N1_V01S0000 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 W1_H02E0401 arc: C3 W1_H02E0601 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 Q6 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 H01W0000 arc: D5 H01W0000 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 Q3 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: M4 E1_H01E0101 arc: M5 H00R0000 arc: M6 V00B0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q5 arc: V01S0000 F2 arc: V01S0100 F4 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1100101011111111 word: SLICED.K1.INIT 1010101011110000 word: SLICEC.K0.INIT 1011100000000000 word: SLICEC.K1.INIT 1011100011111111 word: SLICEA.K0.INIT 1011000010000000 word: SLICEA.K1.INIT 1011111110001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R21C73:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: H00R0000 H02E0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06E0003 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 arc: A0 H02E0501 arc: A1 H02E0501 arc: B0 H02W0301 arc: B1 H02W0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: CE1 V02S0201 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: E1_H02E0101 Q3 arc: F0 F5A_SLICE arc: H00R0100 Q7 arc: H01W0000 F0 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M3 H00R0100 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011100011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C74:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 S1_V02N0001 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 H06W0103 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: A0 H02E0701 arc: A5 V00T0000 arc: A6 H00L0000 arc: B2 W1_H02E0301 arc: B3 H02W0101 arc: B4 S1_V02N0701 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F5 arc: N3_V06N0203 Q4 arc: S1_V02S0401 F6 arc: S3_V06S0203 Q4 arc: V01S0100 F3 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C75:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00T0000 V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 N1_V01S0000 arc: A0 H02W0701 arc: A1 H02E0501 arc: A3 V02S0501 arc: A4 E1_H01W0000 arc: A7 N1_V01S0100 arc: B2 H02E0301 arc: B5 N1_V01S0000 arc: B6 V00T0000 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F4 arc: E1_H02E0201 F0 arc: E1_H02E0501 Q7 arc: E3_H06E0003 Q3 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0501 arc: M1 H00L0100 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: M6 V00B0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F1 arc: N1_V02N0401 F6 arc: N1_V02N0501 F5 arc: S1_V02S0401 Q6 arc: S1_V02S0701 Q7 arc: V00T0100 Q1 arc: V01S0100 Q3 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C76:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0103 N1_V01S0100 arc: H00R0000 H02W0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0101 arc: V00T0100 E1_H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0103 E1_H02W0201 arc: A4 V02S0301 arc: A5 V00T0100 arc: B0 E1_H02W0301 arc: B1 V02S0101 arc: B5 H02W0301 arc: B6 H01E0101 arc: C5 N1_V02S0201 arc: C6 S1_V02N0001 arc: C7 S1_V02N0001 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: D5 V02N0401 arc: D7 H02E0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q7 arc: E1_H02E0101 F1 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0501 Q7 arc: S1_V02S0501 F5 arc: W1_H02W0701 Q7 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q6 word: SLICEC.K0.INIT 0000000010101010 word: SLICED.K0.INIT 1100000011000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICEC.K1.INIT 0100000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R21C77:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 E1_H02W0401 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: A0 V02S0701 arc: A3 V00T0000 arc: A5 V00T0100 arc: A7 V00T0100 arc: B1 V02S0301 arc: B5 V01S0000 arc: B7 V01S0000 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 H02W0401 arc: C5 H02E0401 arc: C6 V02N0201 arc: C7 N1_V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D4 V02S0601 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q1 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 F7 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q6 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q3 arc: N1_V02N0601 Q4 arc: N3_V06N0003 Q0 arc: N3_V06N0203 Q4 arc: S1_V02S0501 F5 arc: S3_V06S0203 F7 arc: S3_V06S0303 F5 arc: V01S0100 Q6 arc: W1_H02W0501 F5 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEC.K1.INIT 1000000000000000 word: SLICED.K1.INIT 0000010000000000 word: SLICEA.K1.INIT 0000110000001100 word: SLICEA.K0.INIT 0000101000001010 word: SLICEB.K0.INIT 0000111100000000 word: SLICEB.K1.INIT 0000101000001010 word: SLICEC.K0.INIT 0000111100000000 word: SLICED.K0.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C78:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 H02W0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 H01E0101 arc: W3_H06W0303 N1_V01S0100 arc: B2 W1_H02E0101 arc: C0 H02E0401 arc: C3 H02E0601 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q2 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q3 word: SLICEA.K0.INIT 0000000011110000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C79:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: V00T0000 S1_V02N0601 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 S1_V02N0701 arc: A0 S1_V02N0501 arc: A5 W1_H02E0501 arc: A6 E1_H02W0501 arc: B2 S1_V02N0101 arc: B3 H02E0101 arc: B4 E1_H02W0301 arc: B7 V00T0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0401 F4 arc: N1_V02N0601 F6 arc: V01S0100 F3 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0101010101011010 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C80:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 H02E0201 arc: H00L0100 H02E0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: V00B0100 H02E0701 arc: V00T0100 N1_V02S0701 arc: W1_H02W0201 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: A2 V00T0000 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H02W0701 arc: A7 Q7 arc: B0 V02N0101 arc: B1 Q1 arc: B3 Q3 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F0 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F1 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 W1_H02E0601 arc: M3 H00R0000 arc: M4 W1_H02E0401 arc: M5 H00L0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: N1_V02N0301 F3 arc: N1_V02N0401 F6 arc: N1_V02N0601 F4 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0401 Q4 arc: S1_V02S0701 Q5 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0101010101011010 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0101010101011010 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0101010101011010 word: SLICED.K1.INIT 0101010101011010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R21C81:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 W1_H02E0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: A5 N1_V02S0101 arc: A6 N1_V02S0101 arc: B0 V02S0301 arc: B1 Q1 arc: B5 N1_V02S0701 arc: B6 N1_V02S0701 arc: C5 V02N0201 arc: C6 V02N0201 arc: CE0 H00L0000 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: D6 H00R0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q7 arc: E1_H02E0701 F5 arc: E3_H06E0003 Q0 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M1 H00R0000 arc: M4 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: S3_V06S0303 F5 arc: V01S0000 F6 arc: V01S0100 Q4 arc: W1_H02W0201 F0 arc: W1_H02W0701 Q7 word: SLICEC.K1.INIT 0010000000000000 word: SLICED.K0.INIT 0100000000000000 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C82:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0601 V06S0303 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 S1_V02N0701 arc: A3 V02S0501 arc: A4 H02E0501 arc: A5 H02E0501 arc: A7 Q7 arc: B0 F3 arc: B1 F3 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: B6 H01E0101 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V00T0000 arc: C5 E1_H02W0601 arc: C6 Q6 arc: C7 H01E0001 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 E1_H02W0201 arc: D2 N1_V02S0001 arc: D3 H02W0001 arc: D4 F2 arc: D5 F2 arc: D6 E1_H02W0001 arc: D7 H02E0001 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 V01S0100 arc: M3 W1_H02E0201 arc: M4 V00B0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0101 Q1 arc: S1_V02S0201 F0 arc: S1_V02S0401 F6 arc: S1_V02S0501 F7 arc: V00T0100 Q3 arc: V01S0000 F4 word: SLICED.K1.INIT 1010101011110000 word: SLICED.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 0000011101110111 word: SLICEB.K1.INIT 0001001101011111 word: SLICEC.K0.INIT 0101111100000000 word: SLICEC.K1.INIT 0101111100000000 word: SLICEA.K0.INIT 0100010011001100 word: SLICEA.K1.INIT 0100010011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C83:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02W0101 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S3_V06N0203 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 W3_H06E0303 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: A5 V00B0000 arc: A6 H00R0000 arc: A7 N1_V02S0301 arc: B5 W1_H02E0301 arc: B6 N1_V02S0701 arc: B7 S1_V02N0701 arc: C0 W1_H02E0401 arc: C1 N1_V01N0001 arc: C2 S1_V02N0601 arc: C3 F6 arc: C5 W1_H02E0601 arc: C6 V02N0001 arc: C7 V02N0001 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 V02S0201 arc: D5 H00L0100 arc: D6 S1_V02N0401 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 H02W0401 arc: M6 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V02N0401 F4 arc: S1_V02S0401 Q6 arc: V00B0100 F7 arc: V01S0000 F0 arc: V01S0100 F6 word: SLICED.K1.INIT 0001010100111111 word: SLICEA.K0.INIT 0101111100000000 word: SLICEA.K1.INIT 0101000011110000 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1100100001000000 word: SLICEB.K0.INIT 0101111100000000 word: SLICEB.K1.INIT 0101000011110000 word: SLICED.K0.INIT 0000011101110111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C84:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: A0 H02E0501 arc: A1 N1_V02S0701 arc: A2 V02S0701 arc: A3 V00B0000 arc: A4 W1_H02E0501 arc: A5 E1_H02W0701 arc: A7 N1_V02S0301 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 S1_V02N0101 arc: B3 V02S0101 arc: B4 S1_V02N0501 arc: B5 S1_V02N0501 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 V02N0601 arc: C2 N1_V02S0401 arc: C3 S1_V02N0401 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 N1_V02S0001 arc: D4 F2 arc: D5 F2 arc: D7 H00L0100 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F1 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 V01S0100 arc: M4 V00T0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F3 arc: N1_V02N0001 Q0 arc: N3_V06N0103 Q1 arc: V01S0100 F6 arc: W1_H02W0401 F4 word: SLICEB.K0.INIT 0001001101011111 word: SLICEA.K0.INIT 0000011101110111 word: SLICEA.K1.INIT 0000011101110111 word: SLICEB.K1.INIT 0001001101011111 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 0111011100000000 word: SLICEC.K1.INIT 0111011100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C85:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0701 H06E0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A3 V02N0501 arc: A5 N1_V02S0101 arc: A6 H02E0501 arc: B3 H02E0101 arc: B5 H02E0301 arc: B7 N1_V01S0000 arc: C0 S1_V02N0601 arc: C1 N1_V01S0100 arc: C3 E1_H02W0401 arc: C5 S1_V02N0201 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D3 V00T0100 arc: D5 H00L0100 arc: D6 H02E0201 arc: D7 H00R0100 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q2 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 F0 arc: LSR0 V00T0000 arc: M0 V00B0100 arc: M2 V00B0000 arc: M3 W1_H02E0201 arc: M4 H02W0401 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: W1_H02W0401 F6 arc: W1_H02W0601 F4 word: SLICEB.K1.INIT 0000011101110111 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1000110010000000 word: SLICED.K0.INIT 0101000011110000 word: SLICED.K1.INIT 0011000011110000 word: SLICEA.K0.INIT 0101111100000000 word: SLICEA.K1.INIT 0101111100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R21C86:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 H02E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 V02S0701 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 H02W0501 arc: A5 H02W0501 arc: A6 V02N0101 arc: A7 N1_V01S0100 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H02E0301 arc: B3 S1_V02N0101 arc: B5 N1_V02S0501 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 E1_H02W0601 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 H02E0201 arc: D3 N1_V02S0201 arc: D4 F2 arc: D5 F2 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H01E0101 F3 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 F0 arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M4 V00T0100 arc: M6 V00T0100 arc: M7 H00L0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V02N0401 F6 word: SLICEA.K0.INIT 0000111000000010 word: SLICEA.K1.INIT 1111111011110010 word: SLICEB.K0.INIT 0001010100111111 word: SLICEB.K1.INIT 0001010100111111 word: SLICEC.K0.INIT 0101111100000000 word: SLICEC.K1.INIT 0111011100000000 word: SLICED.K0.INIT 0101000011110000 word: SLICED.K1.INIT 0101000011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R21C87:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V02N0701 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A5 H02E0501 arc: A7 V02N0101 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 N1_V02S0101 arc: B5 V00B0100 arc: B7 W1_H02E0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H00L0100 arc: C3 N1_V01S0100 arc: C5 V02N0001 arc: C7 S1_V02N0001 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 N1_V01S0000 arc: D3 V02N0201 arc: D5 V02N0601 arc: D7 H02E0001 arc: E1_H01E0101 F2 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 E1_H01E0101 arc: M5 V01S0000 arc: M6 H02E0401 arc: M7 E1_H01W0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q4 arc: N3_V06N0003 Q3 arc: S1_V02S0601 Q4 arc: S3_V06S0203 Q7 arc: V01S0000 F0 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0010001100100000 word: SLICEA.K1.INIT 1110111111101100 word: SLICEB.K0.INIT 0010001100100000 word: SLICEB.K1.INIT 1111111110111000 word: SLICEC.K1.INIT 0001010100111111 word: SLICED.K0.INIT 1111111111111111 word: SLICED.K1.INIT 1110000000100000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R21C88:PLC2 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 N1_V02S0501 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0601 V02N0601 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 H02E0701 arc: A5 H02E0701 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 S1_V02N0701 arc: B5 V02S0701 arc: C2 H00L0100 arc: C3 H00L0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H00R0100 arc: D5 H00R0100 arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0100 Q3 arc: H01W0000 F2 arc: LSR0 V00B0100 arc: M2 V00T0000 arc: M3 H02E0201 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V02N0601 F4 word: SLICEB.K0.INIT 0000000010111000 word: SLICEB.K1.INIT 1111111110111000 word: SLICEC.K0.INIT 0010001010101010 word: SLICEC.K1.INIT 0010001010101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 .tile R23C23:PLC2 arc: V00T0000 H02W0201 arc: A0 E1_H02W0501 arc: A1 H02W0501 arc: B0 H02W0101 arc: B1 E1_H02W0301 arc: C0 E1_H02W0601 arc: C1 S1_V02N0401 arc: D0 V02N0001 arc: D1 V02N0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: M0 V00T0000 arc: N1_V01N0001 F0 arc: N1_V01N0101 F0 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C24:PLC2 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 E1_H02W0501 .tile R23C25:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H01W0000 .tile R23C26:PLC2 arc: E1_H02E0501 V02S0501 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 S1_V02N0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 H01E0001 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 H02E0101 arc: A0 H00L0100 arc: A1 V02N0701 arc: B0 V02N0301 arc: B1 Q1 arc: C0 S1_V02N0601 arc: C1 H00L0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: H00L0100 Q3 arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H00L0000 arc: M3 H02E0201 arc: M4 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F0 arc: V01S0100 Q1 arc: W1_H02W0501 Q7 word: SLICEA.K0.INIT 1100100000001000 word: SLICEA.K1.INIT 1101110111110101 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C27:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 E1_H02W0001 arc: H00R0000 W1_H02E0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: V00B0000 V02S0201 arc: W1_H02W0201 V02S0201 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B0 S1_V02N0301 arc: B1 S1_V02N0101 arc: B2 H01W0100 arc: B3 Q3 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 V02N0601 arc: C3 V02N0601 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0100 Q3 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M3 H00R0000 arc: M4 W1_H02E0401 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1110001011111111 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R23C28:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S3_V06N0003 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W1_H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0701 H01E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V06N0303 .tile R23C29:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: S1_V02S0601 H06W0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0601 S1_V02N0601 .tile R23C30:PLC2 arc: E1_H02E0101 V06S0103 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 N1_V02S0201 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 E3_H06W0103 arc: V00T0100 V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 E1_H02W0401 arc: A1 N1_V02S0701 arc: B3 Q3 arc: C1 H00L0000 arc: C3 N1_V01N0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D3 S1_V02N0001 arc: E1_H01E0001 F3 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR1 V00T0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q1 arc: W3_H06W0103 F1 word: SLICEA.K1.INIT 1111000010101010 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R23C31:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 N1_V02S0001 arc: H00R0000 W1_H02E0601 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 W1_H02E0601 arc: V00B0100 S1_V02N0101 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E1_H01W0000 arc: A0 H00L0100 arc: A1 V02N0701 arc: A2 V00T0000 arc: B0 V02N0101 arc: B1 Q1 arc: B3 Q3 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 N1_V02S0601 arc: C3 N1_V01N0001 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 V00B0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: V00T0000 Q2 arc: V00T0100 F3 word: SLICEB.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1101110111110101 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C32:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: H00L0000 V02S0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0001 H02E0001 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0501 N1_V02S0501 arc: A0 V02N0701 arc: A1 S1_V02N0701 arc: A2 V02N0701 arc: A3 S1_V02N0701 arc: A5 V02N0101 arc: A6 H02W0701 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H01W0100 arc: B3 Q3 arc: B5 W1_H02E0101 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 S1_V02N0401 arc: C3 V02N0401 arc: C5 H02W0401 arc: C6 V01N0101 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 N1_V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V02N0001 arc: D2 V01S0100 arc: D3 V01S0100 arc: D5 E1_H02W0201 arc: D6 S1_V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H01W0000 F6 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M0 H01E0001 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 E1_H02W0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: N3_V06N0303 F5 arc: S1_V02S0401 F6 arc: S1_V02S0701 Q5 arc: S3_V06S0303 F6 arc: V00B0000 Q6 arc: V01S0000 Q5 arc: V01S0100 Q4 arc: W1_H02W0401 F6 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1010000010001000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEB.K0.INIT 1010100000001000 word: SLICEB.K1.INIT 1110111101001111 word: SLICEC.K1.INIT 1001011001101001 word: SLICED.K0.INIT 1111010101010101 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R23C33:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V02S0601 arc: V00T0000 H02W0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V01S0100 arc: A0 F7 arc: A1 N1_V02S0701 arc: A2 F5 arc: A3 V01N0101 arc: A4 F7 arc: A6 H02W0501 arc: A7 H00R0000 arc: B0 H02E0301 arc: B1 F3 arc: B2 H02W0301 arc: B3 H02W0101 arc: B4 H02E0301 arc: B5 H00R0000 arc: B6 N1_V02S0701 arc: B7 H02E0101 arc: C0 E1_H02W0401 arc: C1 H00R0100 arc: C2 H00L0100 arc: C3 S1_V02N0601 arc: C4 E1_H02W0601 arc: C5 V02N0001 arc: C6 S1_V02N0001 arc: C7 V00T0000 arc: D0 F2 arc: D1 S1_V02N0201 arc: D2 H02E0201 arc: D3 V00T0100 arc: D4 F2 arc: D5 E1_H02W0201 arc: D6 H01W0000 arc: D7 V01N0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: S1_V02S0501 F5 word: SLICEC.K1.INIT 1111110011000000 word: SLICED.K1.INIT 1001000001100000 word: SLICEB.K0.INIT 1001011001101001 word: SLICEB.K1.INIT 1001011001101001 word: SLICEC.K0.INIT 1001011001101001 word: SLICED.K0.INIT 1110100011010100 word: SLICEA.K0.INIT 1110100010001110 word: SLICEA.K1.INIT 1001011001101001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C34:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 W3_H06E0203 arc: H00L0000 H02E0001 arc: H00R0000 W1_H02E0601 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: V00B0000 W1_H02E0401 arc: V00T0000 H02W0001 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: A2 V00B0000 arc: A3 W1_H02E0501 arc: A4 H02W0701 arc: A5 W1_H02E0701 arc: A6 V02S0301 arc: A7 V02S0101 arc: B0 V00T0000 arc: B2 H00L0000 arc: B3 H01W0100 arc: B4 H00R0000 arc: B5 V02S0701 arc: B6 H02W0301 arc: B7 H02W0101 arc: E1_H01E0001 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: N1_V02N0601 F4 arc: S1_V02S0101 F3 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: S1_V02S0701 F7 arc: V01S0100 F7 arc: W1_H02W0201 F2 arc: W1_H02W0501 F5 word: SLICED.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001100 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R23C35:PLC2 arc: E1_H02E0101 V06S0103 arc: H00R0000 W1_H02E0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 N1_V02S0001 arc: V00B0000 W1_H02E0601 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 W3_H06E0203 arc: A0 H02E0501 arc: A1 H00R0000 arc: A2 W1_H02E0701 arc: A3 V02S0501 arc: A4 V00B0000 arc: A5 W1_H02E0501 arc: A6 E1_H01W0000 arc: A7 V02S0301 arc: B0 V02S0101 arc: B1 E1_H02W0101 arc: B2 W1_H02E0101 arc: B3 H01W0100 arc: B4 N1_V02S0701 arc: B5 V02S0701 arc: B6 H02E0101 arc: B7 N1_V02S0501 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: E1_H02E0301 F3 arc: E1_H02E0501 F5 arc: E1_H02E0601 F6 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F6 arc: N1_V01N0101 F7 arc: N1_V02N0101 F3 arc: N1_V02N0501 F5 arc: N3_V06N0303 F5 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: S1_V02S0301 F1 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: V01S0000 F6 arc: V01S0100 F0 word: SLICEC.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEA.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C36:PLC2 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 V06S0003 arc: H00L0000 V02S0201 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02S0001 arc: W1_H02W0401 V01N0001 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0000 arc: A1 W1_H02E0701 arc: A2 V00B0000 arc: A6 H02W0501 arc: A7 H02W0701 arc: B0 V02S0101 arc: B1 V00B0000 arc: B2 W1_H02E0301 arc: B6 V00T0000 arc: B7 V00T0000 arc: C6 N1_V02S0001 arc: C7 N1_V02S0001 arc: D6 V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0001 F2 arc: E1_H02E0101 F1 arc: E1_H02E0201 F2 arc: E1_H02E0301 F1 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F6 arc: N1_V02N0001 F2 arc: N1_V02N0501 F7 arc: S1_V02S0201 F2 arc: V00T0000 F0 word: SLICED.K0.INIT 1111100110010000 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R23C37:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0001 arc: H00R0100 S1_V02N0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0203 N1_V02S0701 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V01N0101 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 E1_H02W0701 arc: A3 E1_H02W0701 arc: A4 F7 arc: A5 S1_V02N0101 arc: A6 S1_V02N0101 arc: A7 H02E0701 arc: B0 V00B0000 arc: B1 Q1 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 H01E0101 arc: B5 H02E0101 arc: B6 H02E0101 arc: B7 H02W0301 arc: C0 S1_V02N0401 arc: C1 S1_V02N0601 arc: C2 N1_V02S0401 arc: C3 N1_V02S0401 arc: C4 N1_V02S0201 arc: C5 S1_V02N0201 arc: C6 S1_V02N0001 arc: C7 V02N0201 arc: CE0 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H01E0101 arc: D3 H02E0201 arc: D4 E1_H01W0100 arc: D5 V02S0601 arc: D6 V02S0601 arc: D7 N1_V02S0601 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 F6 arc: LSR1 V00T0000 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 H02E0601 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F4 arc: N1_V02N0001 F2 arc: N1_V02N0201 F0 arc: N1_V02N0701 F7 arc: N3_V06N0303 F5 arc: V00B0000 Q6 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICED.K0.INIT 1111100110010000 word: SLICEC.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1110011001000000 word: SLICEB.K1.INIT 1111110110011000 word: SLICED.K1.INIT 1001001111001001 word: SLICEC.K0.INIT 1001011001101001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R23C38:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 S3_V06N0003 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0103 V01N0101 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 W1_H02E0701 arc: A3 W1_H02E0701 arc: A4 H02W0701 arc: A5 H02W0701 arc: A6 E1_H02W0701 arc: A7 N1_V02S0301 arc: B0 H00R0100 arc: B1 H00R0100 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 H00L0000 arc: B6 N1_V02S0701 arc: B7 H02E0101 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C6 V00T0000 arc: C7 S1_V02N0001 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 F2 arc: D7 V02N0601 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F4 arc: M0 W1_H02E0601 arc: M2 V00B0100 arc: M4 V00B0000 arc: N1_V01N0001 F0 arc: N1_V01N0101 F6 arc: W1_H02W0701 F7 word: SLICEB.K0.INIT 1001011000000000 word: SLICEB.K1.INIT 1111111110010110 word: SLICED.K0.INIT 1110110110000100 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1011110000100000 word: SLICEA.K1.INIT 1111101111000010 word: SLICEC.K0.INIT 1011110000100000 word: SLICEC.K1.INIT 1111101111000010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R23C39:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0203 N1_V02S0701 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V06S0203 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V00T0100 arc: A5 N1_V02S0101 arc: A6 H02W0701 arc: A7 W1_H02E0501 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 N1_V02S0501 arc: B5 H02E0101 arc: B6 W1_H02E0101 arc: B7 H02W0101 arc: C0 H02W0401 arc: C1 V02N0401 arc: C2 H02W0601 arc: C3 V02N0401 arc: C4 V02N0001 arc: C5 F4 arc: C6 N1_V02S0201 arc: C7 F4 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02W0001 arc: D5 F0 arc: D6 H02E0201 arc: D7 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 V00B0100 arc: N1_V01N0001 F6 arc: N1_V02N0001 F2 arc: N1_V02N0501 F7 arc: N3_V06N0303 F5 word: SLICEB.K0.INIT 1011110000100000 word: SLICEB.K1.INIT 1111101111000010 word: SLICED.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 1101101001000000 word: SLICEA.K1.INIT 1111110110100100 word: SLICEC.K0.INIT 1010011001100101 word: SLICED.K1.INIT 1110110110000100 word: SLICEC.K1.INIT 1001011001101001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R23C40:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 H02W0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 V01N0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0303 N1_V02S0601 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 S1_V02N0701 arc: A3 S1_V02N0701 arc: A4 W1_H02E0701 arc: A5 N1_V02S0101 arc: A7 N1_V02S0101 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 V01N0001 arc: B3 W1_H02E0101 arc: B4 H02E0101 arc: B5 W1_H02E0301 arc: B6 V01S0000 arc: B7 W1_H02E0301 arc: C0 H00R0100 arc: C1 N1_V02S0401 arc: C2 W1_H02E0401 arc: C3 W1_H02E0401 arc: C4 V02N0201 arc: C5 F4 arc: C6 Q6 arc: C7 F4 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 V02N0201 arc: D4 H02E0201 arc: D5 F2 arc: D6 H02E0001 arc: D7 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M2 E1_H02W0601 arc: M5 H00L0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0201 F0 arc: V01S0000 Q5 word: SLICED.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1101101000001000 word: SLICEA.K1.INIT 1111101110011000 word: SLICEB.K0.INIT 1011110000001000 word: SLICEB.K1.INIT 1111110010001110 word: SLICEC.K0.INIT 1100011001100011 word: SLICED.K1.INIT 1110101110000010 word: SLICEC.K1.INIT 1001011001101001 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R23C41:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V06S0303 arc: H00L0000 V02N0001 arc: H00R0000 N1_V02S0601 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0401 H02W0401 arc: V00B0100 N1_V02S0301 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 V01N0101 arc: A0 H02W0701 arc: A1 H02W0501 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 V02N0101 arc: B3 Q3 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 N1_V01N0001 arc: C3 V02N0401 arc: CE0 H02E0101 arc: CE1 S1_V02N0201 arc: CE2 H00L0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: H01W0000 F2 arc: H01W0100 F2 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0301 arc: M0 H02E0601 arc: M1 H00R0000 arc: M2 E1_H02W0601 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F0 arc: N1_V02N0201 F0 arc: V00B0000 Q4 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1000100010100000 word: SLICEA.K1.INIT 1101110111110101 word: SLICEB.K0.INIT 1000100011000000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R23C42:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0101 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0401 N1_V02S0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 V06S0303 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 N1_V02S0701 arc: A3 V00B0000 arc: A4 V02S0101 arc: A6 V02S0101 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B3 Q3 arc: B4 V02S0501 arc: B6 N1_V02S0501 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 F4 arc: C4 H02E0601 arc: C6 H02E0601 arc: C7 S1_V02N0001 arc: CE0 S1_V02N0201 arc: CE1 H00L0100 arc: CE2 W1_H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V02S0001 arc: D3 S1_V02N0001 arc: D4 V02S0601 arc: D6 H02E0001 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q1 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 H02E0201 arc: M4 H02W0401 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0001 F2 arc: N1_V02N0601 F6 arc: S1_V02S0101 F3 arc: V00B0000 Q6 arc: V01S0000 F7 arc: V01S0100 F0 word: SLICEB.K1.INIT 1010101011001100 word: SLICED.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1000100010100000 word: SLICEA.K1.INIT 1101110111110101 word: SLICEC.K0.INIT 1000000000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICEB.K0.INIT 1010000000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R23C43:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: H00R0000 N1_V02S0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 N1_V01S0100 arc: A0 S1_V02N0701 arc: A1 S1_V02N0501 arc: B0 V02N0301 arc: B1 Q1 arc: C0 H00L0100 arc: C1 V02N0401 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: H00L0100 Q1 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M1 H00R0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 F0 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1100111110101111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C44:PLC2 arc: E1_H02E0501 V06S0303 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: W1_H02W0101 V02N0101 arc: A0 V02S0501 arc: A2 H00L0100 arc: A3 H02W0701 arc: A4 V00T0000 arc: A7 E1_H01W0000 arc: B2 E1_H01W0100 arc: B3 E1_H02W0101 arc: B4 H00L0000 arc: B7 F3 arc: C0 H02E0401 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 E1_H01E0101 arc: C7 V02S0201 arc: CE0 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 E1_H02W0201 arc: D3 V00B0100 arc: D4 N1_V02S0601 arc: D7 F2 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 arc: N3_V06N0203 F4 word: SLICEA.K0.INIT 1010111110100000 word: SLICEB.K1.INIT 0000000010101100 word: SLICEB.K0.INIT 1010100000001000 word: SLICED.K1.INIT 1010101010101000 word: SLICEC.K0.INIT 1111010000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R23C45:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 N1_V02S0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02E0501 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 N1_V02S0701 arc: A0 N1_V02S0701 arc: A1 H02W0701 arc: A2 F7 arc: A3 F7 arc: A4 F5 arc: A5 V00T0100 arc: A6 S1_V02N0301 arc: A7 N1_V01N0101 arc: B0 H02W0101 arc: B1 Q1 arc: B2 H02W0301 arc: B3 H02W0301 arc: B4 E1_H02W0301 arc: B5 V02N0701 arc: B6 V01S0000 arc: B7 S1_V02N0501 arc: C0 S1_V02N0601 arc: C1 N1_V02S0601 arc: C2 E1_H01W0000 arc: C4 N1_V02S0001 arc: C5 V02N0201 arc: C6 Q6 arc: C7 S1_V02N0201 arc: CE0 H00R0100 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00B0100 arc: D2 F0 arc: D3 F0 arc: D4 E1_H01W0100 arc: D5 V00B0000 arc: D6 S1_V02N0601 arc: D7 H02W0201 arc: E1_H01E0101 F1 arc: E1_H02E0001 F2 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q5 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M1 H00L0000 arc: M2 N1_V01N0001 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q5 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q1 arc: V01S0100 Q6 word: SLICEA.K1.INIT 0000001000000111 word: SLICEC.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 1111000010110000 word: SLICED.K0.INIT 0000101000100010 word: SLICED.K1.INIT 0001000011010000 word: SLICEA.K0.INIT 0000000001010011 word: SLICEB.K0.INIT 1111001111100010 word: SLICEB.K1.INIT 1111111111101110 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C46:PLC2 arc: E3_H06E0003 V06S0003 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V06S0203 arc: A0 V02S0701 arc: A2 V01N0101 arc: A4 N1_V01N0101 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 S1_V02N0301 arc: B2 E1_H01W0100 arc: B4 V00B0100 arc: B6 N1_V02S0501 arc: B7 N1_V02S0501 arc: C0 H02E0401 arc: C2 F4 arc: C4 Q4 arc: C6 V02N0201 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 H02W0001 arc: D4 H00L0100 arc: D6 V02N0601 arc: D7 H02E0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F6 arc: LSR0 V00T0000 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0201 F0 arc: N1_V02N0501 Q7 arc: V01S0000 Q7 arc: V01S0100 Q2 arc: W1_H02W0001 F2 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 0000100001001100 word: SLICED.K0.INIT 0000110100001000 word: SLICEC.K0.INIT 1100010010000000 word: SLICEB.K0.INIT 0101010111111100 word: SLICED.K1.INIT 0000000000110101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C47:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0201 H06W0103 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0001 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: A0 H00L0100 arc: A1 N1_V02S0501 arc: A2 F7 arc: A4 V02S0101 arc: A5 V00B0000 arc: A6 S1_V02N0301 arc: A7 H00L0000 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B4 V02N0701 arc: B5 N1_V01S0000 arc: B6 H01E0101 arc: B7 V02S0701 arc: C0 H02W0601 arc: C1 E1_H02W0601 arc: C2 N1_V02S0601 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 H01E0001 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 F0 arc: D4 F2 arc: D5 F2 arc: D6 S1_V02N0401 arc: D7 S1_V02N0601 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: M1 H00R0000 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: N1_V01N0101 Q1 arc: N3_V06N0203 F4 arc: W3_H06W0103 Q1 word: SLICED.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 0101010000000100 word: SLICEA.K0.INIT 0000000101010001 word: SLICED.K1.INIT 0000110001000100 word: SLICEB.K0.INIT 0000111100001010 word: SLICEC.K0.INIT 1000100010001010 word: SLICEC.K1.INIT 0000000000000100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R23C48:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 S1_V02N0001 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0301 arc: V00T0100 V02S0501 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 S1_V02N0601 arc: A0 H02W0501 arc: A1 F5 arc: A2 V02N0701 arc: A4 V00T0000 arc: A5 V02N0101 arc: B0 E1_H01W0100 arc: B1 E1_H02W0301 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 H00L0000 arc: B5 H02E0301 arc: C0 H02W0601 arc: C1 E1_H02W0401 arc: C2 F4 arc: C3 V02S0401 arc: C4 Q4 arc: C5 V01N0101 arc: CE0 H00L0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: D2 H00R0000 arc: D3 V02N0001 arc: D4 H02W0201 arc: D5 F0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F1 arc: H01W0100 Q4 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: V00T0000 Q0 arc: W1_H02W0001 Q0 word: SLICEC.K0.INIT 0000000010111000 word: SLICEB.K0.INIT 1110111000001111 word: SLICEB.K1.INIT 1111000011000000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 1111000011100000 word: SLICEA.K1.INIT 1011000010100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C49:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 E1_H01W0100 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 H06W0103 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 N3_V06S0303 arc: A0 F7 arc: A1 F7 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0101 arc: B7 E1_H02W0301 arc: C0 N1_V02S0601 arc: C1 N1_V02S0601 arc: C7 E1_H01E0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: M0 V00T0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V01S0000 Q5 arc: W1_H02W0501 Q5 word: SLICED.K1.INIT 0100010000001100 word: SLICEA.K0.INIT 0000000011110001 word: SLICEA.K1.INIT 0000000000000001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C50:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0203 N3_V06S0203 arc: H00R0000 N1_V02S0401 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02E0701 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02E0701 arc: A1 H00L0000 arc: A2 H02E0501 arc: A3 E1_H01E0001 arc: A4 V02S0301 arc: A5 V00T0000 arc: A6 H02W0701 arc: A7 V02N0101 arc: B0 H02W0301 arc: B2 H01W0100 arc: B3 H02E0301 arc: B4 V00B0100 arc: B6 V02N0501 arc: B7 F3 arc: C0 N1_V01N0001 arc: C1 E1_H02W0401 arc: C2 N1_V02S0601 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 W1_H02E0601 arc: C6 S1_V02N0001 arc: C7 F4 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02N0201 arc: D2 V02S0001 arc: D3 V02S0201 arc: D4 E1_H02W0201 arc: D5 E1_H01W0100 arc: D6 V02N0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F6 arc: E1_H02E0101 Q1 arc: E1_H02E0401 Q4 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0100 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M1 V01S0100 arc: M2 V00B0000 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F5 arc: S1_V02S0501 F7 arc: V00B0000 F6 arc: V00T0000 F0 arc: V01S0000 F6 arc: V01S0100 F6 arc: W1_H02W0301 F1 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000001100010001 word: SLICEC.K1.INIT 0000111100001010 word: SLICEB.K1.INIT 0100010000001100 word: SLICEC.K0.INIT 0000010100010001 word: SLICED.K1.INIT 0101010001010100 word: SLICED.K0.INIT 1000111110001000 word: SLICEB.K0.INIT 0000111000000100 word: SLICEA.K1.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C51:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 H02W0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0303 E3_H06W0203 arc: A1 F5 arc: A3 V01N0101 arc: A4 S1_V02N0301 arc: A5 W1_H02E0501 arc: A6 H00R0000 arc: A7 S1_V02N0301 arc: B0 N1_V02S0101 arc: B1 H00R0100 arc: B3 H02E0301 arc: B4 V00B0100 arc: B5 H02E0101 arc: B6 V00B0100 arc: B7 H02E0101 arc: C0 H00L0000 arc: C1 E1_H02W0401 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C5 H02E0601 arc: C6 W1_H02E0601 arc: C7 H02E0401 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V02S0001 arc: D3 V02S0001 arc: D4 V01N0001 arc: D5 N1_V02S0601 arc: D6 V01N0001 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F4 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 word: SLICED.K1.INIT 0001000100000101 word: SLICEC.K0.INIT 0010000000101010 word: SLICEB.K1.INIT 0000010011001100 word: SLICEA.K0.INIT 1111001111000000 word: SLICED.K0.INIT 1000101010000000 word: SLICEC.K1.INIT 0000000011011000 word: SLICEA.K1.INIT 1110111100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R23C52:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 V01N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H02W0601 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N3_V06S0303 arc: A6 H02W0501 arc: A7 H02W0501 arc: B6 H02E0301 arc: B7 H02W0101 arc: C6 V00T0100 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D6 H02E0001 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: H01W0000 Q7 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 H02E0601 arc: M1 V01S0100 arc: M2 V00B0100 arc: M3 H00R0100 arc: M5 H00L0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F6 arc: S1_V02S0001 Q2 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W3_H06W0103 Q1 word: SLICED.K0.INIT 0000001100010001 word: SLICED.K1.INIT 0000110000001010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R23C53:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00T0100 W1_H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: A0 H00R0000 arc: A2 V02N0501 arc: A3 H02W0701 arc: A4 F5 arc: A5 Q5 arc: A6 H02E0701 arc: A7 Q7 arc: B0 H01W0100 arc: B2 N1_V02S0101 arc: B3 Q3 arc: B4 V00B0100 arc: B5 V02N0501 arc: B6 N1_V02S0701 arc: B7 V02N0501 arc: C0 V02N0401 arc: C2 H00L0000 arc: C3 N1_V01N0001 arc: C4 H02W0601 arc: C5 V02N0001 arc: C6 F4 arc: C7 E1_H01E0101 arc: CE0 H00L0100 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 H02W0001 arc: D3 V00T0100 arc: D4 N1_V02S0401 arc: D5 H02W0201 arc: D6 F2 arc: D7 H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q5 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 H01E0001 arc: M1 E1_H02W0001 arc: M3 E1_H02W0201 arc: M5 E1_H02W0001 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V02N0201 F0 arc: V00B0100 F7 arc: V01S0000 Q3 arc: W1_H02W0101 Q1 arc: W1_H02W0501 Q7 word: SLICEB.K1.INIT 0010011100000000 word: SLICEC.K1.INIT 1100000010001000 word: SLICED.K1.INIT 0011000000100010 word: SLICEB.K0.INIT 1010100011111101 word: SLICEC.K0.INIT 0000000011101111 word: SLICED.K0.INIT 1001110000110110 word: SLICEA.K0.INIT 0001101111111111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C54:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02N0501 arc: E3_H06E0203 W3_H06E0103 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 E1_H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0501 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 N3_V06S0203 arc: A0 N1_V02S0501 arc: A2 V02N0701 arc: A6 H00L0000 arc: B0 V00T0000 arc: B2 N1_V02S0301 arc: B6 S1_V02N0501 arc: C0 N1_V02S0601 arc: C2 N1_V01N0001 arc: C6 Q6 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 S1_V02N0001 arc: D6 S1_V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: H01W0000 F2 arc: H01W0100 Q1 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 V01S0100 arc: M4 V00B0100 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F2 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q1 arc: N1_V02N0601 Q6 arc: V00B0000 F6 arc: V01S0100 Q4 arc: W1_H02W0001 F0 word: SLICED.K0.INIT 0001110100000000 word: SLICEA.K0.INIT 1111111111100010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111001000100010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C55:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02N0101 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 H01E0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 N1_V02S0701 arc: A5 N1_V02S0101 arc: A6 V02N0301 arc: B5 V00B0100 arc: B6 E1_H02W0101 arc: B7 V00T0000 arc: C5 S1_V02N0001 arc: C6 Q6 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 H01W0000 arc: D6 E1_H02W0001 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: E1_H02E0601 F6 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q5 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M2 V00T0100 arc: M3 H01W0100 arc: M5 V01S0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: S1_V02S0401 Q6 arc: V00T0100 Q3 arc: V01S0000 Q0 word: SLICED.K1.INIT 1100110011000000 word: SLICEC.K1.INIT 0000000001000001 word: SLICED.K0.INIT 0001110100000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C56:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H01E0001 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 V06S0303 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: B2 V02N0301 arc: B3 V02N0101 arc: C2 V02S0401 arc: C3 V02S0401 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0201 arc: D3 V02S0201 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0000 arc: M3 H00R0100 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 V00B0000 arc: M7 H00L0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0301 F3 arc: V01S0000 Q7 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111100011111 word: SLICEB.K1.INIT 1111111100010000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C57:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 W1_H02E0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0601 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A3 H02E0501 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 F3 arc: B3 Q3 arc: B6 E1_H02W0301 arc: B7 E1_H02W0301 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 S1_V02N0601 arc: C3 S1_V02N0401 arc: C6 H02W0401 arc: C7 H02W0401 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H00R0000 arc: D3 V02S0001 arc: D6 F2 arc: D7 F2 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0301 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q3 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M3 H00R0100 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N3_V06N0303 F6 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K1.INIT 0000000001010011 word: SLICEB.K0.INIT 0000000000110000 word: SLICED.K0.INIT 1111000011010000 word: SLICED.K1.INIT 1010000010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C58:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 H02W0001 arc: H00R0100 H02E0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A3 N1_V02S0501 arc: A4 F5 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: B0 H02E0301 arc: B1 H02E0301 arc: B3 V02N0301 arc: B4 V02N0701 arc: B5 N1_V02S0701 arc: B6 F3 arc: B7 N1_V02S0501 arc: C0 H02W0401 arc: C1 H02W0401 arc: C3 W1_H02E0401 arc: C4 V00B0100 arc: C5 V00T0100 arc: C6 H02E0401 arc: C7 H02W0401 arc: CE0 H00L0000 arc: CE1 E1_H02W0101 arc: CE2 V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D3 F0 arc: D4 H02W0201 arc: D5 S1_V02N0601 arc: D6 V02N0401 arc: D7 H00L0100 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q5 arc: E1_H02E0101 Q1 arc: E1_H02E0501 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 F4 arc: H01W0000 Q3 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00R0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N3_V06N0303 F6 arc: V00T0100 Q1 arc: V01S0100 F7 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICED.K1.INIT 0011001000000010 word: SLICEC.K1.INIT 1110001000000000 word: SLICEC.K0.INIT 0000111000001111 word: SLICEB.K1.INIT 1100010010000000 word: SLICED.K0.INIT 1100000011100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C59:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 W1_H02E0201 arc: H00L0000 H02W0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0701 arc: A2 H01E0001 arc: A4 H02E0501 arc: A6 F5 arc: B2 V02S0101 arc: B3 N1_V02S0101 arc: B4 H02E0101 arc: B5 H02E0101 arc: B6 S1_V02N0701 arc: C2 W1_H02E0601 arc: C3 F4 arc: C4 V00T0000 arc: C5 V02N0201 arc: C6 V00T0100 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 W1_H02E0001 arc: D3 F2 arc: D4 V02S0401 arc: D5 V00B0000 arc: D6 V02N0601 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: M1 H00R0100 arc: M2 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: V01S0100 F6 arc: W1_H02W0101 Q1 arc: W1_H02W0301 F3 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEC.K1.INIT 0011000000111111 word: SLICED.K0.INIT 1000100011000000 word: SLICEC.K0.INIT 0011000001010000 word: SLICEB.K0.INIT 0000000000011101 word: SLICEB.K1.INIT 0000000000000011 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R23C60:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0601 arc: H00R0100 H02W0501 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 N1_V02S0601 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 N1_V02S0101 arc: A5 Q5 arc: B0 H01W0100 arc: B2 N1_V02S0101 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02N0701 arc: C0 V02N0401 arc: C2 H02E0601 arc: C3 H00L0000 arc: C4 N1_V02S0001 arc: C5 N1_V02S0001 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 V01N0001 arc: D5 H00L0100 arc: E1_H01E0001 Q6 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q3 arc: H01W0100 Q0 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V02N0001 F0 arc: N1_V02N0201 F2 arc: N1_V02N0301 Q1 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: V01S0000 Q5 word: SLICEB.K0.INIT 1000100011000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICEC.K0.INIT 1010100000001000 word: SLICEC.K1.INIT 1100101011111111 word: SLICEA.K0.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R23C61:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 V06S0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 V02S0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 V01N0101 arc: A0 V02N0701 arc: A1 V02N0501 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 V02S0301 arc: A7 Q7 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 H02W0101 arc: B6 H02W0301 arc: B7 H02W0301 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 H02W0401 arc: C6 Q6 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 V02N0401 arc: D6 E1_H01W0100 arc: D7 H00R0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q1 arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 E1_H02W0401 arc: M6 W1_H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F0 arc: N1_V02N0201 F0 arc: V00B0000 F6 arc: V01S0100 F4 arc: W1_H02W0401 Q4 arc: W1_H02W0701 F7 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0010000000000000 word: SLICEA.K0.INIT 1110000000100000 word: SLICEA.K1.INIT 1110111100101111 word: SLICED.K1.INIT 1011101110001000 word: SLICED.K0.INIT 1111001111000000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1100111110101111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R23C62:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 V02S0201 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 H06W0103 arc: V00T0000 V02S0601 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 E3_H06W0003 arc: A2 H02E0701 arc: A3 H02W0701 arc: A4 H02E0501 arc: A5 V00T0000 arc: A6 V02S0301 arc: A7 W1_H02E0701 arc: B0 V02N0301 arc: B2 H02E0301 arc: B3 H02E0101 arc: B4 V02S0701 arc: B5 V02S0501 arc: B6 W1_H02E0101 arc: B7 W1_H02E0301 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F4 arc: E1_H02E0601 F4 arc: E3_H06E0003 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: M3 H02E0201 arc: M5 H00L0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0701 Q5 arc: S3_V06S0203 F7 arc: S3_V06S0303 F6 arc: V01S0000 F2 arc: V01S0100 F3 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C63:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 V06S0203 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 H01E0001 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H06W0203 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02E0701 arc: A1 V02S0701 arc: A2 V02S0501 arc: A3 H02W0701 arc: A4 V02S0101 arc: A5 V00T0000 arc: A6 V02S0301 arc: A7 H00L0000 arc: B0 H02E0101 arc: B1 H02W0101 arc: B2 N1_V02S0101 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H02E0301 arc: B6 E1_H02W0101 arc: B7 H02W0301 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0001 F2 arc: E1_H02E0301 F3 arc: E1_H02E0601 F4 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M1 H02E0001 arc: MUXCLK0 CLK0 arc: S1_V02S0101 F1 arc: S1_V02S0201 F0 arc: S1_V02S0301 Q1 arc: S1_V02S0401 F4 arc: S3_V06S0003 F0 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 F3 arc: V01S0100 F2 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C64:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H02E0601 arc: S3_V06S0303 H01E0101 arc: V00B0000 W1_H02E0401 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: A0 V02S0701 arc: A1 H02E0501 arc: A2 H02E0501 arc: A6 H02E0701 arc: A7 H02W0501 arc: B0 V02S0101 arc: B1 H02W0301 arc: B2 H02W0301 arc: B6 E1_H02W0101 arc: B7 V00B0000 arc: C6 V00B0100 arc: C7 S1_V02N0001 arc: D6 V02N0601 arc: D7 F2 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: E1_H02E0001 F0 arc: E1_H02E0301 F1 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F2 arc: N1_V02N0001 F2 arc: N1_V02N0101 F1 arc: S3_V06S0103 F2 arc: V00B0100 F7 arc: V01S0000 F1 arc: V01S0100 F7 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 word: SLICED.K1.INIT 1010011001100101 word: SLICED.K0.INIT 1110110110000100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R23C65:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V06N0303 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02S0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0601 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0303 E1_H01W0100 arc: V00T0000 E1_H02W0201 arc: V00T0100 N1_V02S0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0103 E1_H01W0100 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 V00T0000 arc: A3 V00T0000 arc: A5 V02N0301 arc: A6 H02W0701 arc: A7 S1_V02N0101 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: B4 H00R0000 arc: B5 H00L0000 arc: B6 V02N0501 arc: B7 W1_H02E0301 arc: C0 S1_V02N0601 arc: C1 H02W0401 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 S1_V02N0201 arc: C5 V02N0201 arc: C6 W1_H02E0401 arc: C7 F4 arc: D0 H02W0201 arc: D1 S1_V02N0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 W1_H02E0001 arc: D5 H00R0100 arc: D6 F0 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M0 V00T0100 arc: M2 V00B0000 arc: N1_V02N0701 F7 arc: V00B0000 F4 arc: V01S0000 F2 word: SLICEC.K0.INIT 1111110011000000 word: SLICEA.K0.INIT 1001011000000000 word: SLICEA.K1.INIT 1111100111110110 word: SLICED.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1001011000000000 word: SLICEB.K1.INIT 1111111110010110 word: SLICEC.K1.INIT 1001011001101001 word: SLICED.K0.INIT 1110110110000100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R23C66:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0203 W1_H02E0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 H06E0303 arc: V00T0000 V02N0401 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0303 E3_H06W0303 arc: A3 S1_V02N0501 arc: A4 W1_H02E0701 arc: A5 V02N0301 arc: A6 W1_H02E0501 arc: A7 S1_V02N0301 arc: B0 W1_H02E0101 arc: B2 S1_V02N0101 arc: B3 V01N0001 arc: B4 H02E0301 arc: B5 N1_V02S0501 arc: B6 H01E0101 arc: B7 V02N0701 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0301 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: N3_V06N0303 Q6 arc: V01S0000 Q5 arc: V01S0100 Q7 arc: W1_H02W0301 Q3 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1100110011001100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C67:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02N0201 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E3_H06W0303 arc: A0 H00L0000 arc: A1 W1_H02E0501 arc: A2 V01N0101 arc: A3 W1_H02E0701 arc: A4 V00T0000 arc: A5 S1_V02N0301 arc: A6 H02E0501 arc: A7 S1_V02N0101 arc: B0 W1_H02E0101 arc: B1 V02N0101 arc: B2 H02E0301 arc: B3 V02N0301 arc: B4 V02N0701 arc: B5 H00R0000 arc: B6 V02N0501 arc: B7 S1_V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q0 arc: N1_V02N0601 Q6 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: N3_V06N0203 Q7 arc: N3_V06N0303 Q5 arc: S1_V02S0501 Q7 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: S3_V06S0303 Q5 arc: V01S0000 Q7 arc: V01S0100 Q0 arc: W1_H02W0301 Q1 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C68:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H01E0001 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0401 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: A0 S1_V02N0501 arc: A1 V01N0101 arc: A2 N1_V02S0501 arc: A3 W1_H02E0701 arc: A4 V02N0301 arc: A5 S1_V02N0301 arc: A6 S1_V02N0101 arc: A7 H00R0000 arc: B0 E1_H02W0101 arc: B1 V00T0000 arc: B2 V01N0001 arc: B3 N1_V02S0301 arc: B4 V02N0501 arc: B5 S1_V02N0701 arc: B6 V02N0701 arc: B7 H02W0101 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q3 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: N1_V02N0101 Q1 arc: N1_V02N0501 Q7 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q2 arc: N3_V06N0303 Q5 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q2 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q4 arc: S3_V06S0203 Q7 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C69:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 N1_V02S0401 arc: H00L0000 E1_H02W0201 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 H01E0001 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 H02W0601 arc: V00T0000 V02N0401 arc: W1_H02W0101 V01N0101 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 V06S0303 arc: A0 H02W0701 arc: A1 W1_H02E0701 arc: A2 N1_V02S0701 arc: A3 V02N0701 arc: A4 E1_H02W0701 arc: A5 S1_V02N0301 arc: A6 H02W0501 arc: A7 V02N0101 arc: B0 V02N0301 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H00R0100 arc: B4 S1_V02N0701 arc: B5 W1_H02E0301 arc: B6 W1_H02E0101 arc: B7 E1_H02W0101 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q7 arc: E1_H02E0101 Q3 arc: E1_H02E0501 Q7 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q5 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q2 arc: S1_V02S0501 Q5 arc: S1_V02S0701 Q7 arc: S3_V06S0203 Q4 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0301 Q1 arc: W1_H02W0501 Q7 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C70:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 S3_V06N0103 arc: H00L0000 H02W0201 arc: H00R0000 N1_V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 H01E0001 arc: V00B0100 V02N0301 arc: V00T0000 H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 V06N0003 arc: W3_H06W0203 E1_H01W0000 arc: A0 H02W0501 arc: A1 F7 arc: A4 V02N0101 arc: A5 V02N0101 arc: A6 H00R0000 arc: A7 H00R0000 arc: B0 V00B0000 arc: B1 V00T0000 arc: B4 E1_H02W0301 arc: B5 E1_H02W0301 arc: B6 E1_H02W0301 arc: B7 E1_H02W0301 arc: C4 S1_V02N0001 arc: C5 H02E0401 arc: C6 H02E0401 arc: C7 S1_V02N0201 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: D6 V02N0401 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: V00B0000 F4 arc: W1_H02W0501 F5 word: SLICED.K1.INIT 1110100011010100 word: SLICEC.K0.INIT 1001011001101001 word: SLICED.K0.INIT 1110110110000100 word: SLICEC.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R23C71:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 N1_V01S0000 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 S3_V06N0103 arc: A0 H01E0001 arc: A2 F7 arc: A3 V00T0000 arc: A5 Q5 arc: A6 V00T0100 arc: A7 W1_H02E0501 arc: B0 H02E0101 arc: B1 Q1 arc: B2 H02E0101 arc: B3 V02N0101 arc: B4 W1_H02E0301 arc: B7 W1_H02E0301 arc: C0 F4 arc: C1 E1_H01W0000 arc: C2 F4 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 N1_V02S0001 arc: C6 Q6 arc: C7 E1_H01E0101 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 N1_V02S0001 arc: D2 F0 arc: D3 V02S0001 arc: D4 H02W0201 arc: D5 E1_H01W0100 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F7 arc: M1 H00R0000 arc: M2 H02E0601 arc: M3 H00L0100 arc: M5 H00L0100 arc: M6 V00B0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0101 F1 arc: N1_V02N0201 Q2 arc: N1_V02N0701 Q7 arc: N3_V06N0003 F3 arc: V00T0100 Q3 arc: W1_H02W0001 F2 arc: W1_H02W0301 F3 word: SLICEB.K1.INIT 0010000000000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEC.K1.INIT 1111101000001010 word: SLICED.K0.INIT 1111000010101010 word: SLICEA.K0.INIT 0110100110010110 word: SLICED.K1.INIT 1100011001100011 word: SLICEC.K0.INIT 0000110011001111 word: SLICEB.K0.INIT 0100111010110001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R23C72:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H01E0001 arc: N3_V06N0303 H06E0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0003 H06E0003 arc: V00B0000 S1_V02N0001 arc: V00B0100 W1_H02E0701 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 S3_V06N0203 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 V06N0303 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 H00L0100 arc: A3 H00L0100 arc: A7 Q7 arc: B0 V02N0301 arc: B1 S1_V02N0301 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V02S0401 arc: C3 N1_V02S0401 arc: C7 V00T0000 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0201 arc: D3 V02N0201 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F1 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 Q3 arc: H01W0000 Q5 arc: H01W0100 Q4 arc: M0 V00B0100 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 H02E0401 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F2 arc: N3_V06N0003 F0 arc: V00T0000 Q0 arc: V01S0000 F0 arc: V01S0100 F1 arc: W1_H02W0001 F0 arc: W1_H02W0101 F1 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0100000000000000 word: SLICEA.K1.INIT 0100000000000000 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1100100000001000 word: SLICEB.K1.INIT 1111101100111011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R23C73:PLC2 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V01N0001 arc: E3_H06E0103 W3_H06E0003 arc: H00R0000 V02S0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 H01E0101 arc: S1_V02S0501 W3_H06E0303 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V01N0101 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 V01N0101 arc: A2 V02N0701 arc: A3 V02N0501 arc: B2 H02E0101 arc: B3 H02E0101 arc: C2 V02N0601 arc: C3 V02N0401 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D2 H02W0001 arc: D3 H02W0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E3_H06E0003 Q3 arc: E3_H06E0203 Q7 arc: E3_H06E0303 Q6 arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H01W0100 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F2 arc: V00T0100 Q1 word: SLICEB.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1111001110111011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C74:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E3_H06E0203 W1_H02E0701 arc: H00R0000 H02E0401 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: V00T0000 H02W0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 V06S0303 arc: W3_H06W0103 N1_V01S0100 arc: B7 V02N0701 arc: C0 N1_V02S0401 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D7 H02W0201 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F7 F7_SLICE arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0001 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111111111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R23C75:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 W1_H02E0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0101 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: A1 V01N0101 arc: A6 N1_V02S0301 arc: A7 N1_V02S0301 arc: B1 V01N0001 arc: B6 V02S0701 arc: C0 N1_V02S0601 arc: C1 S1_V02N0401 arc: C6 V00B0100 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02N0001 arc: D7 H00R0100 arc: E1_H01E0101 F7 arc: E1_H02E0101 F1 arc: E3_H06E0003 Q0 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V01S0000 F6 arc: V01S0100 F7 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111000000000000 word: SLICED.K1.INIT 1111010110100000 word: SLICEA.K1.INIT 1000001001000001 word: SLICED.K0.INIT 1110010011100100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 .tile R23C76:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0303 H01E0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H02W0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 V02N0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 N1_V02S0501 arc: A1 V02N0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: B1 H02E0101 arc: C0 H02E0601 arc: C1 H02E0601 arc: C4 Q4 arc: C5 H02E0401 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: E1_H01E0001 F0 arc: E1_H02E0201 Q2 arc: E1_H02E0501 F5 arc: E1_H02E0701 F5 arc: E3_H06E0003 F0 arc: E3_H06E0103 Q1 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 F4 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 H02W0601 arc: M3 H02W0201 arc: M4 V00T0100 arc: M5 V01S0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N3_V06N0003 F0 arc: S1_V02S0201 F0 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S3_V06S0003 F0 arc: V00T0100 Q3 arc: V01S0000 Q7 word: SLICEA.K0.INIT 0000111100001111 word: SLICEA.K1.INIT 0000011100001011 word: SLICEC.K1.INIT 1010101011110000 word: SLICEC.K0.INIT 1111000010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C77:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 V02N0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0601 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02S0701 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02N0501 arc: A3 V02N0701 arc: B0 V02S0301 arc: B1 S1_V02N0301 arc: B2 V02N0101 arc: B3 S1_V02N0301 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 V02N0601 arc: C3 S1_V02N0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q1 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0100 F2 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H01W0100 arc: M4 H02W0401 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: V01S0000 Q6 word: SLICEA.K0.INIT 0010001000110000 word: SLICEA.K1.INIT 1110111011111100 word: SLICEB.K0.INIT 0000101000001100 word: SLICEB.K1.INIT 1110111011111100 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R23C78:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 V02N0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0103 S3_V06N0003 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A1 H00L0000 arc: A7 Q7 arc: B0 V02S0301 arc: B1 V02S0301 arc: C0 H02W0601 arc: C1 H02W0601 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CE1 N1_V02S0201 arc: CE2 E1_H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D7 H00L0100 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F7 arc: E1_H02E0401 Q6 arc: E1_H02E0601 Q4 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00B0100 arc: M5 H02E0001 arc: M6 H02E0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F0 arc: N1_V02N0101 Q1 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0011000000100010 word: SLICEA.K1.INIT 1111110011101110 word: SLICED.K1.INIT 1010111110100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C79:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 H06E0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 W3_H06E0303 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 H00L0100 arc: A6 E1_H02W0701 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C6 Q6 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 S1_V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D6 E1_H02W0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F6 arc: E1_H02E0001 F2 arc: E1_H02E0201 F0 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 Q5 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00B0000 arc: M5 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0601 Q6 word: SLICED.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 0011000000100010 word: SLICEA.K1.INIT 1111110011101110 word: SLICEB.K0.INIT 0011000000100010 word: SLICEB.K1.INIT 1111110011101110 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C80:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 H01E0101 arc: H00L0100 W1_H02E0101 arc: H00R0100 V02S0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 W3_H06E0203 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02S0301 arc: W3_H06W0303 V06S0303 arc: A1 N1_V02S0701 arc: A7 N1_V02S0101 arc: B0 N1_V02S0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B6 V02S0701 arc: C0 H00L0000 arc: C2 N1_V02S0401 arc: C3 V02S0401 arc: C6 Q6 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 N1_V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: E1_H02E0001 F2 arc: E1_H02E0101 F1 arc: E1_H02E0301 F3 arc: E1_H02E0401 F6 arc: E1_H02E0601 F6 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 Q4 arc: H01W0100 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M0 W1_H02E0601 arc: M1 H00R0100 arc: M2 N1_V01N0001 arc: M3 W1_H02E0201 arc: M4 V00T0000 arc: M5 H00L0100 arc: M6 V00T0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: V00B0100 Q7 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1100110010101010 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C81:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 S1_V02N0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S3_V06N0303 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 V01N0101 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: A0 W1_H02E0701 arc: A1 W1_H02E0701 arc: A2 V02N0501 arc: A3 V02N0701 arc: A4 H02E0501 arc: A5 H02W0701 arc: A6 F5 arc: A7 V00T0100 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: B4 H01E0101 arc: B5 W1_H02E0101 arc: B6 V01S0000 arc: B7 H02E0101 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 H02W0601 arc: C6 F4 arc: C7 H01E0001 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H02E0201 arc: D5 V02N0401 arc: D6 H00R0100 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: E1_H02E0401 Q4 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR1 V00B0000 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 E1_H01E0101 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q5 arc: N1_V02N0601 Q4 arc: S1_V02S0301 Q1 arc: S1_V02S0401 Q6 arc: V01S0000 F7 arc: V01S0100 Q7 arc: W3_H06W0003 Q3 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000000000001 word: SLICEC.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1000000000000000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 0011000000100010 word: SLICEA.K1.INIT 1111110011101110 word: SLICEB.K0.INIT 0010001100100000 word: SLICEB.K1.INIT 1110111111101100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C82:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 N1_V02S0001 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: V00B0000 N1_V02S0201 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A1 E1_H01E0001 arc: A2 V02S0501 arc: A3 V02S0501 arc: A5 V00T0000 arc: A7 V02S0301 arc: B1 H02E0301 arc: B2 H01W0100 arc: B3 H01W0100 arc: B5 N1_V02S0501 arc: B7 N1_V02S0701 arc: C1 S1_V02N0401 arc: C2 H00L0000 arc: C3 H00L0000 arc: C5 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D5 E1_H02W0001 arc: D7 V02N0401 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 H02E0601 arc: M3 E1_H02W0201 arc: M5 H00R0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: S1_V02S0001 F2 arc: V01S0000 Q1 arc: V01S0100 Q1 arc: W1_H02W0201 F0 arc: W1_H02W0501 F5 word: SLICED.K1.INIT 1110111001000100 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1111111111111111 word: SLICEA.K1.INIT 1110010000000000 word: SLICEB.K0.INIT 0000000011001010 word: SLICEB.K1.INIT 1111111111001010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C83:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 V02S0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0601 E1_H01W0000 arc: A2 H02E0701 arc: A3 H02W0701 arc: A4 W1_H02E0501 arc: A5 H02E0501 arc: A6 H02W0501 arc: A7 W1_H02E0701 arc: B0 E1_H02W0301 arc: B2 V02N0301 arc: B3 V02S0301 arc: B4 H02W0101 arc: B5 H00R0000 arc: B6 H02W0301 arc: B7 V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F6 arc: LSR0 V00B0000 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q2 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0301 F3 arc: N1_V02N0401 F4 arc: N1_V02N0701 F5 arc: V01S0100 Q1 arc: W1_H02W0501 F5 arc: W1_H02W0701 F7 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C84:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 S3_V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 W1_H02E0401 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 V06S0303 arc: A0 H00R0000 arc: A1 H02E0501 arc: A2 V02S0701 arc: A3 E1_H02W0701 arc: A4 V00T0100 arc: A5 V02N0301 arc: A6 H00L0000 arc: A7 E1_H01W0000 arc: B0 V02S0101 arc: B1 E1_H02W0301 arc: B2 W1_H02E0301 arc: B3 E1_H01W0100 arc: B4 V02N0501 arc: B5 W1_H02E0101 arc: B6 V00B0000 arc: B7 H02E0101 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 V02N0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F3 arc: E1_H02E0101 Q1 arc: E1_H02E0401 F4 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: M1 H02E0001 arc: M3 H01W0100 arc: M4 H02W0401 arc: M5 H00L0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: N1_V02N0001 F2 arc: N1_V02N0101 F1 arc: N1_V02N0201 F0 arc: N1_V02N0401 F6 arc: N3_V06N0303 F5 arc: S1_V02S0001 F2 arc: S1_V02S0401 F6 arc: S1_V02S0501 Q5 arc: S3_V06S0203 Q4 arc: V01S0000 Q3 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C85:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 H01E0001 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 N1_V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 H01E0101 arc: V00B0000 E1_H02W0601 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 H02W0501 arc: A1 N1_V02S0701 arc: A2 V00B0000 arc: A6 S1_V02N0301 arc: A7 H00R0000 arc: B0 N1_V02S0301 arc: B1 Q1 arc: B3 Q3 arc: B4 V02S0701 arc: B5 H00L0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E1_H02E0101 F3 arc: E1_H02E0201 F2 arc: E1_H02E0301 F1 arc: E1_H02E0401 F4 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00T0100 arc: M3 E1_H02W0201 arc: M5 H00L0100 arc: M6 H02W0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: N1_V02N0301 F1 arc: N1_V02N0401 Q6 arc: N1_V02N0701 Q7 arc: N3_V06N0003 Q3 arc: N3_V06N0103 Q2 arc: N3_V06N0203 F4 arc: S3_V06S0303 Q5 arc: V01S0000 F0 arc: V01S0100 Q2 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R23C86:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: H00L0000 N1_V02S0001 arc: H00L0100 W1_H02E0101 arc: H00R0100 V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W1_H02E0401 arc: V00B0000 S1_V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 E1_H02W0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02N0701 arc: A4 V02S0301 arc: A6 S1_V02N0101 arc: A7 W1_H02E0501 arc: B4 S1_V02N0501 arc: B5 H02W0301 arc: C4 W1_H02E0401 arc: C5 V00T0100 arc: C6 F4 arc: C7 F4 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D4 V01N0001 arc: D5 H02W0001 arc: D6 E1_H01W0100 arc: D7 V02S0401 arc: E1_H01E0101 F0 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q7 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 N1_V01N0001 arc: M3 H00L0100 arc: M4 V00B0000 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V02N0001 Q2 arc: N1_V02N0201 F0 arc: N1_V02N0401 F6 arc: V00T0100 Q3 arc: W1_H02W0501 F5 word: SLICEC.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 0001001101011111 word: SLICED.K0.INIT 0101000011110000 word: SLICED.K1.INIT 0101000011110000 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C87:PLC2 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 V02S0701 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02E0601 arc: H00R0100 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0601 H02E0601 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02S0701 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 S1_V02N0501 arc: A4 V00T0100 arc: A5 V00T0100 arc: A6 W1_H02E0701 arc: A7 V02S0301 arc: B0 V02N0101 arc: B1 V02N0301 arc: B2 H02E0301 arc: B4 V01S0000 arc: B5 V01S0000 arc: C0 S1_V02N0401 arc: C1 V02S0601 arc: C2 V02N0401 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 S1_V02N0201 arc: C7 S1_V02N0201 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 N1_V02S0001 arc: D2 H01E0101 arc: D4 S1_V02N0401 arc: D5 S1_V02N0401 arc: D6 F2 arc: D7 F2 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: LSR0 V00B0000 arc: LSR1 W1_H02E0501 arc: M0 W1_H02E0601 arc: M3 H00L0000 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: M7 H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00T0100 Q3 arc: V01S0000 Q5 arc: V01S0100 Q7 word: SLICEA.K0.INIT 0000000011001010 word: SLICEA.K1.INIT 1111110011111010 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1111110011111010 word: SLICEB.K0.INIT 0001001101011111 word: SLICED.K0.INIT 0101111100000000 word: SLICED.K1.INIT 0101111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R23C88:PLC2 arc: E1_H02E0701 V02S0701 arc: H00R0000 H02E0601 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 H06E0203 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02E0701 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 H01E0001 arc: CE0 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D2 N1_V01S0000 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: H01W0000 Q1 arc: LSR0 V00B0100 arc: M1 H00R0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 word: SLICEB.K0.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C23:PLC2 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H02W0201 .tile R24C24:PLC2 arc: E1_H02E0601 V02N0601 arc: H01W0000 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 .tile R24C25:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V02N0601 .tile R24C26:PLC2 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: V00T0000 H02W0201 arc: A0 H00L0000 arc: A1 H00L0000 arc: B0 V02N0101 arc: B1 Q1 arc: C0 H00L0100 arc: C1 E1_H02W0401 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: LSR1 V00T0000 arc: M0 W1_H02E0601 arc: M1 H00R0000 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100111110101111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R24C27:PLC2 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06W0303 arc: S1_V02S0301 N1_V02S0201 arc: W1_H02W0201 N1_V02S0201 .tile R24C28:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 N1_V01S0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 N1_V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 N1_V01S0000 .tile R24C29:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0401 E3_H06W0203 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0101 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: A0 H00L0100 arc: A1 H00R0000 arc: B0 V00B0000 arc: B1 Q1 arc: C0 H02W0401 arc: C1 E1_H01W0000 arc: CE0 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: F0 F5A_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 F0 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M1 H02E0001 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R24C30:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A1 H00R0000 arc: B0 V02N0301 arc: B1 Q1 arc: B3 Q3 arc: C0 H02E0401 arc: C1 V02N0601 arc: C3 N1_V01N0001 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H02E0001 arc: D3 V02N0001 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M3 W1_H02E0201 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: V00T0100 F3 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1110000000100000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R24C31:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0100 V02N0301 arc: H00R0100 H02E0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 N3_V06S0203 arc: A0 E1_H01E0001 arc: A1 H00R0000 arc: B0 H01W0100 arc: B1 Q1 arc: B3 Q3 arc: C0 H02E0401 arc: C1 V02N0601 arc: C3 N1_V01N0001 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 W1_H02E0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02E0201 arc: D3 V02N0001 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00R0000 Q6 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H00L0100 arc: M3 H00L0100 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V02N0001 F0 arc: V00T0100 F3 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R24C32:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 V01N0001 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0101 arc: W3_H06W0003 V06N0003 arc: A0 V02N0701 arc: A1 V02S0701 arc: A5 Q5 arc: A6 V02N0301 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 Q1 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C5 V02N0201 arc: C6 Q6 arc: C7 V02N0001 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V02N0001 arc: D5 H01W0000 arc: D6 H00L0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q2 arc: LSR0 H02W0501 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M5 H02E0001 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V02N0501 F7 arc: S1_V02S0701 F5 arc: V00B0000 F6 word: SLICED.K0.INIT 1111010110100000 word: SLICEA.K0.INIT 1100100001000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICED.K1.INIT 1010111110100000 word: SLICEC.K1.INIT 1010111110100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R24C33:PLC2 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 N1_V02S0201 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 V01N0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 H06W0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: A0 W1_H02E0701 arc: A2 V00T0000 arc: A3 V02N0501 arc: A4 V02N0101 arc: A5 N1_V02S0301 arc: A6 E1_H02W0501 arc: A7 N1_V02S0101 arc: B2 H00L0000 arc: B3 W1_H02E0101 arc: B4 W1_H02E0301 arc: B5 N1_V02S0501 arc: B6 V00B0000 arc: B7 V02S0701 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E3_H06E0203 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR1 V00B0100 arc: M3 W1_H02E0201 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F5 arc: N1_V02N0001 F2 arc: N1_V02N0301 F3 arc: S1_V02S0101 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0000 F4 arc: V01S0100 F4 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R24C34:PLC2 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0601 arc: H01W0100 E3_H06W0303 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H06W0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A1 W1_H02E0701 arc: A2 V02N0701 arc: A3 E1_H02W0501 arc: A4 V00T0000 arc: A5 E1_H02W0701 arc: A6 H00R0000 arc: A7 W1_H02E0501 arc: B0 V00B0000 arc: B1 V02N0301 arc: B2 H00L0000 arc: B3 W1_H02E0101 arc: B4 V02N0501 arc: B5 W1_H02E0301 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: E1_H01E0001 F7 arc: E1_H01E0101 F4 arc: E1_H02E0101 F1 arc: E1_H02E0201 F2 arc: E1_H02E0301 F3 arc: E1_H02E0401 F4 arc: E1_H02E0501 F7 arc: E1_H02E0601 F6 arc: E1_H02E0701 F5 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0001 F0 arc: S3_V06S0103 F1 arc: V01S0000 F1 arc: V01S0100 F0 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C35:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0001 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 H02W0601 arc: V00T0000 N1_V02S0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 H00L0000 arc: A1 H00R0000 arc: A2 V00B0000 arc: A6 V00T0100 arc: A7 E1_H02W0701 arc: B0 V00T0000 arc: B1 V00B0000 arc: B2 H00R0000 arc: B6 H01E0101 arc: B7 S1_V02N0701 arc: C6 E1_H02W0601 arc: C7 H02E0401 arc: D6 V02S0401 arc: D7 V02S0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F5D_SLICE arc: M6 H02W0401 arc: N1_V01N0001 F6 arc: N1_V02N0601 F6 arc: V01S0000 F2 arc: V01S0100 F0 word: SLICED.K0.INIT 1001011000000000 word: SLICED.K1.INIT 1111111110010110 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C36:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: H01W0000 E3_H06W0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 W1_H02E0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0501 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 H02E0501 arc: A5 W1_H02E0701 arc: A6 F7 arc: A7 S1_V02N0101 arc: B0 H02W0101 arc: B1 H02W0301 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 V02N0701 arc: B5 V02S0501 arc: B6 V02N0701 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C4 V00B0100 arc: C5 V02N0201 arc: C6 V00B0100 arc: C7 W1_H02E0401 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 H02W0201 arc: D7 H00R0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: M2 E1_H02W0601 arc: M4 E1_H01E0101 arc: N1_V01N0001 F2 arc: N3_V06N0003 F0 arc: N3_V06N0303 F6 arc: V01S0000 F4 word: SLICED.K1.INIT 1111101010100000 word: SLICEA.K0.INIT 1001011000000000 word: SLICEA.K1.INIT 1111111110010110 word: SLICED.K0.INIT 1001011001101001 word: SLICEB.K0.INIT 1001011000000000 word: SLICEB.K1.INIT 1111111110010110 word: SLICEC.K0.INIT 1000001000101000 word: SLICEC.K1.INIT 1110110111011110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C37:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V06S0203 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A0 W1_H02E0701 arc: A1 V02S0701 arc: A2 E1_H02W0501 arc: A3 F5 arc: A5 E1_H02W0501 arc: A6 F7 arc: A7 E1_H02W0701 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 W1_H02E0101 arc: B3 S1_V02N0301 arc: B4 H00R0000 arc: B6 V00T0000 arc: B7 N1_V02S0701 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 F4 arc: C3 H00L0000 arc: C4 E1_H02W0401 arc: C5 N1_V02S0201 arc: C6 E1_H02W0401 arc: CE0 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 H02E0001 arc: D3 H02W0201 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: LSR0 V00T0100 arc: M0 V00B0000 arc: M1 H00L0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 F3 arc: N3_V06N0103 F2 arc: N3_V06N0303 F6 arc: S1_V02S0101 Q1 arc: S1_V02S0501 F5 arc: V00B0000 F4 arc: V01S0100 F6 arc: W1_H02W0001 F2 word: SLICEC.K0.INIT 1111110011000000 word: SLICED.K1.INIT 1110111010001000 word: SLICEC.K1.INIT 1111101010100000 word: SLICEB.K0.INIT 1001011001101001 word: SLICED.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 1000001000101000 word: SLICEA.K1.INIT 1110101110111110 word: SLICEB.K1.INIT 1001011001101001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R24C38:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06S0203 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 N1_V02S0201 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A2 N1_V02S0501 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 N1_V02S0101 arc: A6 E1_H02W0501 arc: A7 E1_H02W0701 arc: B0 S1_V02N0301 arc: B2 N1_V02S0301 arc: B3 H02W0101 arc: B4 H00R0000 arc: B5 H02W0301 arc: B6 N1_V02S0701 arc: B7 V00B0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: N1_V01N0101 F3 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0501 F5 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 word: SLICED.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001100 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R24C39:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 V06N0003 arc: H00L0000 H02E0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 H06W0103 arc: S1_V02S0101 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S3_V06S0103 H06W0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0501 arc: A1 V02N0701 arc: A2 V00B0000 arc: A3 H00L0100 arc: A4 V02N0101 arc: A5 V02N0301 arc: A6 E1_H02W0701 arc: A7 E1_H02W0501 arc: B0 V02S0101 arc: B1 E1_H02W0101 arc: B2 W1_H02E0301 arc: B3 W1_H02E0101 arc: B4 N1_V02S0701 arc: B5 N1_V02S0501 arc: B6 V00T0000 arc: B7 V02S0701 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M5 H00L0000 arc: M6 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0001 F2 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q6 arc: S1_V02S0701 Q7 arc: V01S0000 F3 arc: V01S0100 Q3 arc: W1_H02W0001 F2 arc: W1_H02W0201 F2 arc: W1_H02W0401 F6 arc: W1_H02W0501 F7 arc: W1_H02W0601 F4 arc: W1_H02W0701 F5 arc: W3_H06W0003 F3 arc: W3_H06W0203 F4 word: SLICED.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEA.K0.INIT 0110011001101100 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C40:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 V06S0203 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0101 S1_V02N0101 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 H02E0601 arc: V00B0100 V02N0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E1_H01W0000 arc: A0 N1_V02S0501 arc: A1 N1_V02S0701 arc: A2 N1_V02S0701 arc: A6 V00T0100 arc: A7 N1_V02S0101 arc: B0 V00T0000 arc: B1 E1_H02W0301 arc: B2 V02S0101 arc: B6 V02N0501 arc: B7 H02E0301 arc: C6 H02W0601 arc: C7 E1_H01E0101 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D7 E1_H02W0201 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F2 arc: LSR1 V00B0000 arc: M3 H00L0100 arc: M4 V00B0100 arc: M5 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F2 arc: N1_V02N0001 F2 arc: N1_V02N0201 F2 arc: N1_V02N0701 F7 arc: S1_V02S0201 F0 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q5 arc: S3_V06S0303 F6 arc: V01S0000 F1 arc: V01S0100 F2 arc: W1_H02W0201 F0 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0303 F6 word: SLICEC.K1.INIT 0000000000001110 word: SLICEC.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEA.K0.INIT 0110011001101010 word: SLICED.K1.INIT 1100011001100011 word: SLICED.K0.INIT 1101010111010101 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 .tile R24C41:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V06S0303 arc: H00L0100 N1_V02S0301 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 N1_V02S0001 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00T0000 V02S0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H00R0000 arc: A4 H02E0701 arc: A5 H02E0501 arc: A6 H00L0000 arc: A7 H00L0000 arc: B0 H01W0100 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 H02E0401 arc: C4 V01N0101 arc: C5 V02S0201 arc: C6 V02N0001 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 V01S0100 arc: D4 V02S0401 arc: D5 S1_V02N0601 arc: D6 E1_H01W0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0501 Q5 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H01W0000 F5 arc: H01W0100 Q1 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 H02E0601 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 W1_H02E0401 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F4 arc: N1_V02N0201 F2 arc: N1_V02N0601 F4 arc: S1_V02S0201 F2 arc: S1_V02S0401 F4 arc: S3_V06S0303 F5 arc: V00B0100 Q7 arc: V01S0000 F4 arc: W1_H02W0001 F2 arc: W1_H02W0401 F4 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 1100101000000000 word: SLICED.K1.INIT 1100101011111111 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEC.K0.INIT 1111111110100000 word: SLICEB.K0.INIT 1111001100110011 word: SLICEC.K1.INIT 1010000011111111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R24C42:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 H01E0101 arc: H00R0000 E1_H02W0601 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 H01E0101 arc: V00B0000 H02E0601 arc: V00B0100 V02S0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V02S0701 arc: A0 H02E0501 arc: A1 H02E0501 arc: B0 E1_H01W0100 arc: B1 V00T0000 arc: C0 H00L0000 arc: C1 E1_H01W0000 arc: C2 H00L0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: N3_V06N0103 Q2 arc: S1_V02S0001 Q2 arc: S1_V02S0201 Q2 arc: S3_V06S0103 Q2 arc: V00T0000 Q2 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W3_H06W0003 F0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1011101111110011 word: SLICEB.K0.INIT 0000111111110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C43:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: H00L0000 W1_H02E0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0100 arc: A1 V01N0101 arc: A4 V00B0000 arc: B0 W1_H02E0301 arc: B1 Q1 arc: C0 V02N0601 arc: C1 V02N0401 arc: C4 Q4 arc: CE0 W1_H02E0101 arc: CE1 H00L0000 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02E0001 arc: D4 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M1 H02W0001 arc: M3 H00R0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0601 F4 arc: V00B0000 Q6 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEC.K0.INIT 1111000010101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R24C44:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 H02W0301 arc: V00B0100 V02S0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0601 V06S0303 arc: A1 H02W0701 arc: A4 V02N0101 arc: A6 V02S0101 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B4 H02W0101 arc: B6 E1_H02W0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C4 V00B0100 arc: C6 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D4 E1_H01W0100 arc: D6 V00B0000 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H01W0000 Q3 arc: H01W0100 Q5 arc: M0 W1_H02E0601 arc: M3 E1_H02W0201 arc: M5 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N3_V06N0003 F0 arc: N3_V06N0303 F6 arc: V00B0000 F4 arc: W3_H06W0003 Q3 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0011000000110011 word: SLICEA.K1.INIT 1011000010110001 word: SLICEC.K0.INIT 1100110010001100 word: SLICED.K0.INIT 1000101010001000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R24C45:PLC2 arc: E1_H02E0501 W1_H02E0401 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 V02N0101 arc: V00T0100 H02E0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0701 N3_V06S0203 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0701 arc: A3 V02N0701 arc: A6 V00T0100 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V01N0001 arc: B3 V01N0001 arc: B6 S1_V02N0501 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C6 V01N0101 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D6 V02S0401 arc: E1_H02E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H01W0100 F6 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 word: SLICEA.K0.INIT 0000001000000000 word: SLICEA.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 0000001010101010 word: SLICEB.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0100010001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R24C46:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 S1_V02N0301 arc: H00R0100 V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N1_V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V02S0601 arc: A0 V02N0501 arc: A1 V02N0701 arc: A2 V02N0501 arc: A3 V01N0101 arc: A4 E1_H01W0000 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 N1_V02S0101 arc: B3 N1_V02S0101 arc: B4 V02S0701 arc: C0 H00R0100 arc: C1 V02N0601 arc: C2 H00R0100 arc: C3 V02N0601 arc: C4 H02W0601 arc: D0 W1_H02E0001 arc: D1 V02N0001 arc: D2 W1_H02E0001 arc: D3 V02N0001 arc: D4 E1_H01W0100 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M4 V00T0100 arc: N1_V01N0101 F4 word: SLICEA.K0.INIT 0000111100001011 word: SLICEA.K1.INIT 0101010101010001 word: SLICEB.K0.INIT 0000110000001000 word: SLICEB.K1.INIT 0101010101010001 word: SLICEC.K0.INIT 0001111111011111 word: SLICEC.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C47:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 V02S0001 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 H06W0003 arc: N1_V02N0701 H06W0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 H02W0501 arc: A2 V02N0701 arc: A3 V00B0000 arc: A4 V02N0301 arc: A6 E1_H02W0501 arc: B0 E1_H01W0100 arc: B2 H01W0100 arc: B3 E1_H01W0100 arc: B4 V01S0000 arc: C0 N1_V01N0001 arc: C2 V02N0601 arc: C3 V02S0601 arc: C4 Q4 arc: C6 V00T0000 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 H02W0201 arc: D3 V00T0100 arc: D4 E1_H02W0001 arc: D6 F0 arc: E1_H01E0001 F4 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H01W0000 Q2 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: V00B0000 Q4 arc: V00T0000 F2 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W1_H02W0301 F3 word: SLICEC.K0.INIT 0001000100000101 word: SLICEB.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0011010100000000 word: SLICEA.K0.INIT 0000000000100111 word: SLICED.K0.INIT 1010101010100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C48:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V06S0003 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: A0 H02W0701 arc: A1 H00L0100 arc: A2 V00T0000 arc: A4 V02N0301 arc: A5 F7 arc: A6 V00T0100 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 H02W0301 arc: B2 V02S0301 arc: B3 Q3 arc: B4 W1_H02E0101 arc: B5 F3 arc: B6 V02N0501 arc: B7 V02S0701 arc: C0 H00L0000 arc: C1 H02E0601 arc: C2 E1_H01W0000 arc: C3 H02W0601 arc: C4 Q4 arc: C5 V02N0001 arc: C6 H02E0601 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 N1_V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02W0201 arc: D2 H02E0201 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 S1_V02N0601 arc: D6 V02N0401 arc: D7 H02W0001 arc: E1_H01E0101 F6 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0301 arc: M0 E1_H02W0601 arc: M3 E1_H02W0201 arc: M4 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F4 arc: N1_V01N0101 F2 arc: N1_V02N0101 F1 arc: S1_V02S0701 F5 arc: V00T0000 F0 arc: V00T0100 Q3 arc: V01S0100 Q0 word: SLICED.K0.INIT 0000000000011101 word: SLICEC.K0.INIT 0010001000001010 word: SLICEB.K1.INIT 0000111100110011 word: SLICED.K1.INIT 0011001101010101 word: SLICEC.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 0000110100001000 word: SLICEA.K1.INIT 0000000011100010 word: SLICEB.K0.INIT 0011001000110011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C49:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H01E0101 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 V01N0001 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 E1_H02W0301 arc: B5 S1_V02N0701 arc: B6 H02W0301 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V02S0001 arc: C5 E1_H01E0101 arc: C6 E1_H01E0101 arc: C7 V02S0001 arc: CE1 H02E0101 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 V01S0100 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 F6 arc: H01W0100 Q7 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H02W0201 arc: M4 V00B0100 arc: M5 H02W0001 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0601 F4 arc: S1_V02S0101 Q3 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: V00B0100 F7 word: SLICED.K1.INIT 1010111110100000 word: SLICEC.K0.INIT 0011011111110111 word: SLICEC.K1.INIT 0100011100000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100110111001100 word: SLICEB.K1.INIT 1100110111111111 word: SLICED.K0.INIT 1100100001000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C50:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 V02N0101 arc: H00R0000 V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0201 E1_H02W0201 arc: V00T0000 V02N0601 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 V01N0001 arc: A6 S1_V02N0301 arc: A7 S1_V02N0101 arc: B6 H02E0301 arc: B7 H02E0301 arc: C6 V02S0201 arc: C7 V02S0201 arc: D6 H00R0100 arc: D7 H00R0100 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M3 H00L0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00T0000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 1110111111111111 word: SLICED.K1.INIT 1110111100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R24C51:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02N0701 arc: H00R0000 H02W0601 arc: H00R0100 N1_V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N3_V06S0103 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 N3_V06S0303 arc: A0 E1_H01E0001 arc: A3 V00B0000 arc: A4 V02N0301 arc: A5 V00B0000 arc: B0 V02N0101 arc: B3 V02N0101 arc: B4 S1_V02N0701 arc: B5 H02E0301 arc: B6 H02W0101 arc: C0 H00L0000 arc: C3 H00L0100 arc: C4 Q4 arc: C5 W1_H02E0601 arc: C6 E1_H01E0101 arc: CE0 S1_V02N0201 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D3 V02N0001 arc: D4 V00B0000 arc: D5 H02W0001 arc: D6 F0 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H00L0100 Q3 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M0 H02E0601 arc: M3 H02E0201 arc: M4 H02E0401 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F4 arc: N1_V02N0301 Q3 arc: N1_V02N0501 F5 arc: S1_V02S0401 F6 arc: V00B0000 Q6 arc: W1_H02W0401 F6 word: SLICEC.K0.INIT 0000001010001010 word: SLICEB.K1.INIT 0100011100000000 word: SLICEA.K0.INIT 0000000001000111 word: SLICED.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1000110010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C52:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 S1_V02N0501 arc: H00R0100 N1_V02S0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0201 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0203 N1_V01S0000 arc: A2 V01N0101 arc: A5 V00T0000 arc: B2 V01N0001 arc: B5 W1_H02E0101 arc: C2 H00R0100 arc: C5 V02N0001 arc: D2 V00B0100 arc: D5 W1_H02E0001 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: M0 H02E0601 arc: M1 V01S0100 arc: M2 H02E0601 arc: M4 E1_H01E0101 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: N1_V01N0101 F5 arc: V00T0100 F1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1111111110101100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0100000000000000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C53:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 W1_H02E0301 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 H02W0501 arc: W1_H02W0501 N3_V06S0303 arc: A0 V02S0501 arc: A1 F7 arc: A2 F5 arc: A3 V02S0701 arc: A4 H02W0701 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 E1_H01W0000 arc: B0 V02S0101 arc: B2 H01W0100 arc: B3 H00L0000 arc: B4 E1_H02W0301 arc: B6 V00T0000 arc: B7 E1_H02W0301 arc: C0 H02W0401 arc: C1 V02S0401 arc: C2 H02W0601 arc: C3 N1_V01S0100 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 V02S0001 arc: CE0 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 V02S0001 arc: D4 E1_H01W0100 arc: D5 H00R0100 arc: D6 V02N0401 arc: D7 V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0001 F0 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F0 arc: H01W0100 F4 arc: LSR1 H02E0501 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: V00T0000 Q0 arc: V00T0100 F3 arc: V01S0000 F6 arc: V01S0100 F1 word: SLICEC.K1.INIT 1111000010101010 word: SLICEC.K0.INIT 1110111001000100 word: SLICEB.K0.INIT 0000001100000101 word: SLICEA.K0.INIT 1101110001010000 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K1.INIT 0000110000001010 word: SLICEA.K1.INIT 0000000000000101 word: SLICED.K0.INIT 0000001100000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R24C54:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V06S0203 arc: E3_H06E0203 H01E0001 arc: H00L0100 V02N0301 arc: H00R0100 V02S0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 H02W0501 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V01N0001 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V06S0203 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 H02E0501 arc: A3 H02E0501 arc: A4 V00T0000 arc: A5 E1_H02W0701 arc: A6 H00L0000 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 E1_H02W0301 arc: B3 E1_H02W0301 arc: B4 H01E0101 arc: B5 H01E0101 arc: B6 V00B0000 arc: B7 V02N0701 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 N1_V02S0401 arc: C3 N1_V02S0401 arc: C4 H02W0401 arc: C5 H02E0401 arc: C6 N1_V02S0001 arc: C7 V02S0001 arc: CE0 V02N0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 N1_V02S0401 arc: D5 V02S0601 arc: D6 H00L0100 arc: D7 H01W0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00B0100 arc: M4 W1_H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0701 F7 arc: V00B0000 F4 arc: W1_H02W0201 F0 word: SLICEB.K0.INIT 0000000000001110 word: SLICEB.K1.INIT 0000000011111110 word: SLICEC.K0.INIT 0000001010101010 word: SLICEC.K1.INIT 0001000000000000 word: SLICED.K0.INIT 0001000100000001 word: SLICEA.K0.INIT 1111000100000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICED.K1.INIT 0001000011010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R24C55:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V01N0101 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 V06S0303 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A2 H02W0501 arc: A3 V00B0000 arc: A4 H02E0701 arc: A5 V00T0000 arc: A6 F7 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 N1_V02S0101 arc: B3 Q3 arc: B4 V02S0501 arc: B5 V00B0100 arc: B6 F3 arc: B7 V00B0000 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 V02N0401 arc: C3 H02E0401 arc: C4 V01N0101 arc: C5 F4 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H02E0201 arc: D3 V02N0201 arc: D4 E1_H01W0100 arc: D5 H02W0201 arc: D6 V02N0401 arc: D7 V01N0001 arc: E1_H01E0101 F6 arc: E1_H02E0301 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M1 H02W0001 arc: M3 W1_H02E0201 arc: M5 W1_H02E0001 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0301 Q1 arc: S1_V02S0301 Q3 arc: S1_V02S0701 Q7 arc: V00T0000 F2 arc: V01S0000 Q5 arc: V01S0100 Q7 arc: W1_H02W0401 F6 arc: W1_H02W0501 F5 word: SLICEA.K1.INIT 0000000100000000 word: SLICED.K1.INIT 0010001100100000 word: SLICEB.K1.INIT 1000101010000000 word: SLICED.K0.INIT 0001000100000000 word: SLICEC.K0.INIT 0001000000010101 word: SLICEB.K0.INIT 0011010100000000 word: SLICEC.K1.INIT 1100100011111011 word: SLICEA.K0.INIT 1100110100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C56:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H02E0601 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 E1_H02W0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 H01E0101 arc: A0 H00L0100 arc: A2 V02N0501 arc: A4 H02W0701 arc: A5 N1_V01S0100 arc: A6 H02E0701 arc: A7 Q7 arc: B0 V02N0301 arc: B2 H02W0301 arc: B3 H01W0100 arc: B4 H02E0301 arc: B5 H02E0301 arc: B6 N1_V01S0000 arc: B7 V02S0501 arc: C0 S1_V02N0601 arc: C2 H02W0401 arc: C3 V02N0601 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 V00T0000 arc: C7 V02N0001 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 V01S0100 arc: D3 V02N0201 arc: D4 V02S0601 arc: D5 V02N0601 arc: D6 S1_V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0001 Q2 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 H00L0000 arc: M4 V00T0100 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V02N0201 F2 arc: N1_V02N0401 F4 arc: V00B0000 F6 arc: V00T0000 Q2 arc: V00T0100 F3 arc: V01S0000 Q5 arc: W1_H02W0001 F2 arc: W1_H02W0201 F0 arc: W1_H02W0501 Q5 word: SLICED.K0.INIT 0010011100000000 word: SLICEA.K0.INIT 1111111011110010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1011001110100000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEC.K0.INIT 1110010000000000 word: SLICEC.K1.INIT 1111010111011101 word: SLICED.K1.INIT 0000110001000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C57:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02S0501 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 H02W0601 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0501 H01E0101 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0701 H06E0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 F5 arc: A1 V02N0501 arc: A2 V00B0000 arc: A4 V00B0000 arc: A5 V02N0101 arc: A6 F7 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 H02E0101 arc: B3 H00L0000 arc: B4 N1_V02S0501 arc: B5 H00L0000 arc: B6 V02N0701 arc: B7 H02W0301 arc: C0 V02N0601 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C5 N1_V02S0001 arc: C7 H02W0401 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V00B0100 arc: D3 H02E0001 arc: D4 V02N0401 arc: D5 H02E0001 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F6 arc: LSR0 H02W0501 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M1 E1_H02W0001 arc: M2 H02E0601 arc: M4 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N1_V02N0001 F0 arc: S1_V02S0001 Q2 arc: V00B0000 Q4 arc: V00B0100 Q7 arc: V01S0000 Q1 arc: V01S0100 F4 word: SLICED.K1.INIT 1000110010000000 word: SLICED.K0.INIT 0000000000010001 word: SLICEB.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 1100100000001000 word: SLICEC.K1.INIT 0000000100001011 word: SLICEC.K0.INIT 0000110001000100 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1111111111101110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C58:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V01N0101 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0203 E1_H01W0000 arc: A0 V02S0501 arc: A2 V02N0501 arc: A3 V00B0000 arc: A4 N1_V02S0101 arc: A5 H02W0701 arc: A6 F5 arc: A7 N1_V02S0101 arc: B0 V02N0301 arc: B1 F3 arc: B2 V02N0101 arc: B3 Q3 arc: B4 H00L0000 arc: B5 V00B0100 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 Q4 arc: C5 H02W0601 arc: C6 W1_H02E0401 arc: C7 E1_H01E0101 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02S0001 arc: D2 Q2 arc: D3 V00T0100 arc: D4 H02E0001 arc: D5 V02N0601 arc: D6 H02W0201 arc: D7 H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: E1_H02E0301 Q3 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F1 arc: H01W0100 F7 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0501 arc: M0 W1_H02E0601 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0401 F6 arc: S1_V02S0001 Q0 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0100 Q7 arc: W1_H02W0201 F2 word: SLICEB.K1.INIT 0000000000110101 word: SLICEA.K0.INIT 1011100000000000 word: SLICEB.K0.INIT 0000111000000010 word: SLICEA.K1.INIT 0000000011111100 word: SLICEC.K1.INIT 0000000010101100 word: SLICED.K0.INIT 0000000000000101 word: SLICED.K1.INIT 0000000000011011 word: SLICEC.K0.INIT 0001101100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R24C59:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0601 V02S0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 H02E0601 arc: V00T0100 W1_H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0303 N1_V01S0100 arc: A0 H02E0701 arc: A1 H02E0701 arc: A3 V00B0000 arc: A4 V00T0100 arc: A6 H02E0501 arc: B0 F3 arc: B3 H02E0301 arc: B4 H02E0101 arc: B6 H02E0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: C3 H02E0401 arc: C4 H02E0601 arc: C6 H02E0401 arc: D0 H00R0000 arc: D1 H00R0000 arc: D3 H02E0201 arc: D4 W1_H02E0201 arc: D6 E1_H02W0001 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00R0000 F4 arc: H01W0000 F0 arc: M0 H01E0001 arc: V01S0000 F6 arc: W3_H06W0003 F0 word: SLICEB.K1.INIT 0000000011011000 word: SLICEC.K0.INIT 0000010000000111 word: SLICEA.K0.INIT 1111001110100011 word: SLICEA.K1.INIT 1111000010100000 word: SLICED.K0.INIT 0100010001010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R24C60:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: H00L0100 H02E0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 H06W0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06E0103 arc: V00B0000 S1_V02N0001 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 W3_H06E0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A5 Q5 arc: B0 H01W0100 arc: B1 Q1 arc: B2 E1_H01W0100 arc: B3 Q3 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 H00L0000 arc: C3 E1_H01W0000 arc: C5 V01N0101 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D5 E1_H02W0001 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H01W0100 Q1 arc: M0 V00B0100 arc: M1 H00L0100 arc: M2 V00T0000 arc: M3 H02W0201 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 V00T0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0401 Q4 arc: N1_V02N0701 Q7 arc: V00B0100 F5 arc: W1_H02W0201 F0 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 1100110011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R24C61:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0201 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 H02W0001 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0601 N1_V01S0000 arc: A0 H02W0701 arc: A1 H00L0100 arc: A2 V00B0000 arc: A4 S1_V02N0101 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 V02N0101 arc: B4 H02E0101 arc: C0 E1_H02W0601 arc: C1 E1_H02W0401 arc: C2 V02N0601 arc: C4 S1_V02N0201 arc: CE0 H00R0000 arc: CE1 N1_V02S0201 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02E0201 arc: D2 V00B0100 arc: D4 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: H01W0100 Q2 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 W1_H02E0601 arc: M3 H00L0000 arc: M5 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F2 arc: N1_V02N0501 Q7 arc: N1_V02N0601 F4 arc: N1_V02N0701 Q7 arc: N3_V06N0103 F2 arc: S1_V02S0601 F4 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: V01S0100 F4 word: SLICEC.K0.INIT 0100000000000000 word: SLICEB.K0.INIT 0000000010000000 word: SLICEA.K0.INIT 1010100000100000 word: SLICEA.K1.INIT 1011100011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R24C62:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V06S0303 arc: H00L0000 N1_V02S0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 H02E0201 arc: S1_V02S0501 N1_V02S0401 arc: V00T0000 S1_V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 V06S0203 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 S1_V02N0101 arc: A5 Q5 arc: A6 V02S0301 arc: A7 S1_V02N0101 arc: B0 V02S0301 arc: B1 Q1 arc: B2 E1_H02W0301 arc: B3 Q3 arc: B4 V02N0501 arc: B7 W1_H02E0101 arc: C0 H00L0100 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 H02E0601 arc: C5 E1_H01E0101 arc: C6 Q6 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 E1_H02W0201 arc: D2 V01S0100 arc: D3 E1_H02W0201 arc: D4 S1_V02N0401 arc: D5 V02S0601 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q7 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F4 arc: H01W0100 F7 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 H02E0401 arc: M5 H00L0000 arc: M6 H02E0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N1_V02N0001 F2 arc: N1_V02N0701 F7 arc: N3_V06N0203 F7 arc: S1_V02S0601 F4 arc: V00B0000 Q4 arc: V00B0100 F5 arc: V01S0000 F7 arc: V01S0100 Q3 arc: W1_H02W0601 F4 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0100000000000000 word: SLICED.K1.INIT 0100000000000000 word: SLICED.K0.INIT 1111010110100000 word: SLICEC.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K0.INIT 1100100000001000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R24C63:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E3_H06W0303 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 H06W0203 arc: V00B0000 W1_H02E0401 arc: V00T0100 H02W0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V06N0103 arc: W3_H06W0103 E3_H06W0003 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 F7 arc: A3 F7 arc: A4 F5 arc: A6 V02S0301 arc: A7 H02W0501 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 E1_H02W0301 arc: B3 S1_V02N0301 arc: B4 H02E0301 arc: B5 E1_H02W0101 arc: B7 E1_H02W0101 arc: C0 E1_H02W0601 arc: C1 E1_H02W0401 arc: C2 F4 arc: C3 F4 arc: C4 V02N0001 arc: C5 V02N0201 arc: C6 Q6 arc: C7 S1_V02N0001 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 V02N0601 arc: D5 H02E0001 arc: D6 E1_H02W0001 arc: D7 H02E0201 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: M0 H01E0001 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 V00T0100 arc: M5 V01S0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: S1_V02S0601 F6 arc: V00T0000 Q2 arc: V01S0100 F2 arc: W1_H02W0401 Q4 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q4 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICED.K0.INIT 1010101011110000 word: SLICEC.K1.INIT 1111110011000000 word: SLICED.K1.INIT 1001000001100000 word: SLICEC.K0.INIT 1001011001101001 word: SLICEB.K1.INIT 1110101110000010 word: SLICEB.K0.INIT 1001011001101001 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R24C64:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 S1_V02N0101 arc: H00R0100 H02W0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V01N0101 arc: A0 H00R0000 arc: A1 H00R0000 arc: A4 V00T0000 arc: A5 V00T0000 arc: A6 S1_V02N0301 arc: A7 E1_H02W0701 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B3 V02S0301 arc: B4 V02N0501 arc: B5 V02N0501 arc: B6 H02W0101 arc: B7 F3 arc: C0 N1_V01N0001 arc: C1 E1_H02W0601 arc: C3 H02E0601 arc: C4 H02E0401 arc: C5 E1_H02W0401 arc: C6 V01N0101 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 E1_H02W0201 arc: D3 V02N0201 arc: D4 S1_V02N0401 arc: D5 V02S0601 arc: D6 W1_H02E0001 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 F4 arc: M0 V00B0000 arc: M1 H00L0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V02N0001 F0 arc: V00T0100 F3 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K1.INIT 1111110011000000 word: SLICED.K0.INIT 1001011001101001 word: SLICEC.K0.INIT 1001011000000000 word: SLICEC.K1.INIT 1111100111110110 word: SLICED.K1.INIT 1001011001101001 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R24C65:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V02S0401 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 V02S0301 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: V00T0100 W1_H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 V06S0303 arc: A0 W1_H02E0701 arc: A1 W1_H02E0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 F7 arc: A5 V02S0301 arc: A6 W1_H02E0501 arc: A7 E1_H02W0701 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 W1_H02E0101 arc: B5 W1_H02E0101 arc: B6 E1_H02W0101 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 S1_V02N0201 arc: C6 S1_V02N0001 arc: C7 V01N0101 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V01N0001 arc: D5 V01N0001 arc: D6 W1_H02E0001 arc: D7 W1_H02E0201 arc: E1_H01E0101 F6 arc: E1_H02E0201 F2 arc: E1_H02E0601 F4 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: M2 N1_V01N0001 arc: N1_V01N0001 F7 arc: N1_V02N0001 F0 arc: N1_V02N0201 F0 arc: V00B0100 F5 word: SLICED.K1.INIT 1111101010100000 word: SLICEC.K1.INIT 1110111010001000 word: SLICEC.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 1001000001100000 word: SLICEA.K1.INIT 1111100111110110 word: SLICEB.K0.INIT 1001000001100000 word: SLICEB.K1.INIT 1111100111110110 word: SLICED.K0.INIT 1110110110000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R24C66:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 N1_V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 V06S0103 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: A1 N1_V02S0701 arc: A2 V01N0101 arc: A3 H00L0100 arc: A4 F7 arc: A5 F7 arc: A7 V02S0101 arc: B1 V00T0000 arc: B2 V02S0301 arc: B3 V01N0001 arc: B4 H02E0101 arc: B5 V00B0100 arc: B7 W1_H02E0101 arc: C0 W1_H02E0401 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 W1_H02E0601 arc: C4 H02E0401 arc: C5 E1_H02W0401 arc: C6 W1_H02E0401 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D4 H02E0201 arc: D5 H02E0201 arc: D6 E1_H02W0201 arc: D7 H00R0100 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR1 H02W0301 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F5 arc: N1_V02N0201 F2 arc: N1_V02N0301 F1 arc: N3_V06N0003 Q0 arc: V01S0100 F0 word: SLICED.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1001011000000000 word: SLICEB.K1.INIT 1111111110010110 word: SLICEA.K0.INIT 1111000000001111 word: SLICEC.K0.INIT 1110110110000100 word: SLICEC.K1.INIT 1001011001101001 word: SLICEA.K1.INIT 1001011001101001 word: SLICED.K0.INIT 0000111100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C67:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 S1_V02N0501 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 H02W0501 arc: V00B0000 V02N0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 V02N0501 arc: A3 E1_H02W0501 arc: A4 S1_V02N0101 arc: A5 H02E0701 arc: A6 H02E0701 arc: A7 N1_V02S0101 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 E1_H02W0301 arc: B3 E1_H02W0101 arc: B4 E1_H02W0101 arc: B5 H00R0000 arc: B6 N1_V02S0701 arc: B7 H02E0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 H02W0601 arc: C3 W1_H02E0601 arc: C4 W1_H02E0601 arc: C5 E1_H02W0401 arc: C6 E1_H02W0401 arc: C7 V00T0000 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02S0201 arc: D3 F0 arc: D4 F0 arc: D5 W1_H02E0001 arc: D6 W1_H02E0001 arc: D7 H02E0001 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: M4 V00T0100 arc: M7 E1_H02W0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F4 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0401 F6 arc: N1_V02N0601 Q4 arc: N1_V02N0701 F5 arc: V00T0000 F2 word: SLICEA.K0.INIT 1000010001001000 word: SLICEA.K1.INIT 1110110111011110 word: SLICEB.K0.INIT 1001110000111001 word: SLICED.K1.INIT 1110110110000100 word: SLICEC.K0.INIT 1110110110000100 word: SLICEB.K1.INIT 1001011001101001 word: SLICED.K0.INIT 1111100110010000 word: SLICEC.K1.INIT 1001011001101001 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C68:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 V06S0003 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 H01E0101 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0303 E1_H02W0501 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 H00L0100 arc: A3 V00T0000 arc: A4 S1_V02N0101 arc: A5 S1_V02N0101 arc: A6 S1_V02N0101 arc: A7 N1_V02S0301 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 E1_H02W0101 arc: B3 H00R0100 arc: B4 F3 arc: B5 F3 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 V02N0601 arc: C3 V02S0401 arc: C4 W1_H02E0401 arc: C5 W1_H02E0401 arc: C6 E1_H02W0601 arc: C7 W1_H02E0601 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0001 arc: D3 V02N0201 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 F0 arc: D7 V01N0001 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: M0 V00B0100 arc: N1_V01N0001 F7 arc: N1_V01N0101 F2 arc: N1_V02N0401 F4 arc: N1_V02N0701 F5 word: SLICEA.K0.INIT 1100001000100000 word: SLICEA.K1.INIT 1111101110111100 word: SLICED.K1.INIT 1110110110000100 word: SLICEB.K0.INIT 1001011001101001 word: SLICED.K0.INIT 1001011001101001 word: SLICEB.K1.INIT 1010011001100101 word: SLICEC.K0.INIT 1111100110010000 word: SLICEC.K1.INIT 1001011001101001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C69:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0203 N1_V02S0401 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A1 H02W0701 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 V00B0000 arc: A5 H02W0701 arc: A6 N1_V01S0100 arc: A7 N1_V01S0100 arc: B0 V02S0101 arc: B1 E1_H02W0301 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 S1_V02N0701 arc: B5 E1_H02W0301 arc: B6 V02S0501 arc: B7 V02S0501 arc: C0 V02S0601 arc: C1 F4 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V02N0201 arc: C5 F4 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE0 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 F2 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 F2 arc: D6 V02S0601 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: M0 V00T0000 arc: M2 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F5 arc: N1_V02N0301 F1 arc: V01S0000 Q0 word: SLICEA.K0.INIT 1010011001100101 word: SLICED.K0.INIT 1100001000100000 word: SLICED.K1.INIT 1111101110111100 word: SLICEB.K0.INIT 1100001000001000 word: SLICEB.K1.INIT 1110111110111100 word: SLICEC.K0.INIT 1100011001100011 word: SLICEA.K1.INIT 1110110110000100 word: SLICEC.K1.INIT 1001011001101001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R24C70:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02S0501 arc: H00L0000 H02E0001 arc: H00L0100 V02S0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 W1_H02E0301 arc: V00B0000 N1_V02S0001 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: A0 V02S0701 arc: A2 N1_V02S0701 arc: A3 N1_V02S0501 arc: A4 W1_H02E0701 arc: A5 W1_H02E0501 arc: A6 N1_V02S0301 arc: A7 E1_H02W0501 arc: B2 H02E0301 arc: B3 H00R0100 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 V00T0000 arc: CE0 H00L0100 arc: CE1 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: M0 H02E0601 arc: M2 H02E0601 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: V01S0000 Q0 arc: V01S0100 Q3 arc: W1_H02W0201 F2 arc: W1_H02W0501 F5 arc: W3_H06W0003 F3 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C71:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02W0401 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E1_H01W0000 arc: A0 H00L0000 arc: A1 E1_H02W0501 arc: A2 N1_V02S0701 arc: A3 N1_V02S0501 arc: A4 H02W0701 arc: A5 W1_H02E0501 arc: A6 H00R0000 arc: A7 V02N0301 arc: B0 N1_V02S0101 arc: B1 N1_V02S0301 arc: B2 H02E0101 arc: B3 V02S0101 arc: B4 V02N0501 arc: B5 E1_H02W0101 arc: B6 H02E0301 arc: B7 V00T0000 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F6 arc: M3 H00R0100 arc: MUXCLK1 CLK0 arc: S1_V02S0101 Q3 arc: V01S0000 F7 arc: V01S0100 F0 arc: W1_H02W0101 F1 arc: W1_H02W0401 F4 arc: W1_H02W0501 F5 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 arc: W3_H06W0303 F5 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C72:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 N1_V02S0201 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 W1_H02E0001 arc: V00B0000 N1_V02S0001 arc: V00T0000 H02W0201 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A1 E1_H02W0701 arc: A2 V00B0000 arc: B0 N1_V02S0101 arc: B1 N1_V02S0301 arc: B2 N1_V02S0301 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: M2 V00T0000 arc: MUXCLK1 CLK0 arc: N1_V01N0101 F2 arc: N1_V02N0201 Q2 arc: V01S0000 F2 arc: V01S0100 F2 arc: W1_H02W0101 F1 arc: W1_H02W0201 F2 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R24C73:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0000 S1_V02N0201 arc: H00R0000 H02E0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 N1_V02S0301 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 N1_V02S0701 arc: A4 V00T0100 arc: B3 V01N0001 arc: C0 E1_H01W0000 arc: C2 E1_H01W0000 arc: C4 Q4 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 V02N0001 arc: D3 V00B0100 arc: D4 H02W0001 arc: E1_H01E0001 F0 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H01W0000 F3 arc: H01W0100 F0 arc: M3 H00L0000 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0101 F0 arc: N3_V06N0103 F2 arc: V00T0100 Q3 arc: V01S0100 F0 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 1010101011110000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 1100110011111111 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R24C74:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 V06S0203 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 H02W0101 arc: V00B0000 V02S0201 arc: W1_H02W0001 V06S0003 arc: W1_H02W0701 N1_V02S0701 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 E1_H02W0501 arc: B0 V02N0101 arc: B2 V02S0101 arc: C0 H00L0000 arc: C2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 F2 arc: D2 W1_H02E0201 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H00L0000 F2 arc: H01W0000 Q0 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: W3_H06W0103 F1 word: SLICEA.K1.INIT 1010101000000000 word: SLICEA.K0.INIT 1100111000001010 word: SLICEB.K0.INIT 1101101111100111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R24C75:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 V06S0303 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 H02W0601 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 N1_V01S0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: A0 H02W0701 arc: A3 V02S0701 arc: A5 N1_V01S0100 arc: A6 H02W0501 arc: B2 V02S0101 arc: B4 N1_V01S0000 arc: B7 V02S0501 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E1_H02E0601 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q3 arc: LSR0 W1_H02E0301 arc: M3 H02E0201 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F5 arc: V01S0100 Q3 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0101010101011010 word: SLICED.K1.INIT 0011001100111100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C76:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 V06N0203 arc: H00L0100 V02S0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 H02E0601 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N1_V01S0100 arc: A3 V00T0000 arc: A4 S1_V02N0101 arc: B3 H02E0301 arc: B4 H01E0101 arc: C3 F4 arc: C4 S1_V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 V00B0000 arc: E1_H02E0501 Q5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00R0100 Q7 arc: H01W0000 Q6 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M2 E1_H02W0601 arc: M3 H00L0100 arc: M5 H00R0100 arc: M6 H02E0401 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0301 F3 arc: S1_V02S0201 Q2 arc: V01S0000 Q0 arc: V01S0100 Q3 word: SLICEC.K0.INIT 1000001001000001 word: SLICEB.K1.INIT 0110000001100000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C77:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 N1_V01S0000 arc: H00L0100 V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H06W0003 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0103 E1_H01W0100 arc: A0 H02E0501 arc: A1 H02E0501 arc: B0 H01W0100 arc: B1 H01W0100 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: E1_H02E0101 Q1 arc: F0 F5A_SLICE arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 H02E0601 arc: M3 H00R0100 arc: M5 W1_H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0101 Q3 arc: N1_V02N0201 F0 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: V01S0000 Q3 word: SLICEA.K0.INIT 0000101000001100 word: SLICEA.K1.INIT 1111101011111100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C78:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0201 arc: H00L0100 H02W0101 arc: H00R0100 H02W0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 H06W0003 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V06S0303 arc: A0 V02N0501 arc: A1 V02N0701 arc: A6 F5 arc: A7 E1_H01W0000 arc: B1 V00B0000 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B5 H02W0101 arc: B7 V02N0501 arc: C1 E1_H01W0000 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 E1_H02W0401 arc: C7 V00T0000 arc: CE0 S1_V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 F2 arc: D4 E1_H02W0201 arc: D5 E1_H01W0100 arc: D6 V02N0401 arc: D7 F2 arc: E1_H01E0001 F7 arc: E1_H01E0101 F4 arc: E1_H02E0001 Q0 arc: E1_H02E0101 F1 arc: E1_H02E0401 F4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M2 V00T0100 arc: M5 H00L0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F1 arc: N1_V02N0001 Q0 arc: N3_V06N0203 F7 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S1_V02S0501 F5 arc: S1_V02S0701 Q5 arc: V00B0000 F4 arc: V00B0100 F7 arc: V01S0000 F4 arc: V01S0100 Q0 arc: W1_H02W0401 F6 arc: W3_H06W0103 F1 word: SLICEB.K1.INIT 0000110000001100 word: SLICEC.K1.INIT 0000000000110011 word: SLICEA.K1.INIT 0000010000000000 word: SLICEB.K0.INIT 0011000000110000 word: SLICED.K0.INIT 1010101000000000 word: SLICED.K1.INIT 1101000011110000 word: SLICEA.K0.INIT 0101010100000000 word: SLICEC.K0.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R24C79:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V01N0101 arc: H00L0000 E1_H02W0201 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0501 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 N1_V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 E1_H02W0601 arc: A0 H01E0001 arc: A1 H01E0001 arc: A3 V00T0000 arc: A4 V00T0000 arc: A5 F7 arc: A6 V02N0301 arc: A7 H02E0701 arc: B0 V02N0301 arc: B1 Q1 arc: B3 H00R0100 arc: B4 H02W0101 arc: B5 H01E0101 arc: B6 H01E0101 arc: C3 H02E0401 arc: C4 Q4 arc: C6 V00T0100 arc: C7 V00T0000 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02W0001 arc: D3 H02E0001 arc: D4 H02E0001 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: E3_H06E0003 F3 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q0 arc: H01W0100 Q4 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0000 arc: M3 W1_H02E0201 arc: M6 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q1 arc: N3_V06N0003 Q0 arc: N3_V06N0203 Q4 arc: S1_V02S0201 Q0 arc: S1_V02S0601 F6 arc: V00T0000 Q0 arc: V01S0000 F5 arc: V01S0100 Q7 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q1 word: SLICEB.K1.INIT 0000000001000000 word: SLICED.K0.INIT 0000000010000000 word: SLICEA.K0.INIT 0010001010001000 word: SLICEC.K0.INIT 0100100011000000 word: SLICED.K1.INIT 1010000000000000 word: SLICEC.K1.INIT 0000000010001000 word: SLICEA.K1.INIT 0010001010001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 .tile R24C80:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 H01E0101 arc: H00L0000 H02W0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 V01N0001 arc: V00B0000 V02N0001 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A2 V02N0701 arc: A3 H02E0701 arc: A4 V02N0301 arc: A5 V00B0000 arc: B6 V02N0501 arc: B7 E1_H02W0301 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q0 arc: E1_H02E0301 Q1 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 V00T0100 arc: M3 H02E0201 arc: M5 H00R0100 arc: M6 E1_H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F4 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: V00B0100 Q7 arc: V01S0000 Q5 arc: V01S0100 Q6 arc: W3_H06W0003 F3 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C81:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 V06S0303 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H01E0101 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06S0303 arc: A1 H02W0501 arc: A2 V02N0501 arc: A4 H02E0701 arc: A6 H02W0701 arc: B0 V02N0101 arc: B3 V02S0301 arc: B5 V02N0701 arc: B7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q7 arc: E1_H02E0501 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F5 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M3 H02W0201 arc: M4 V00T0100 arc: M5 V01S0000 arc: M6 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q3 arc: S1_V02S0001 F2 arc: S1_V02S0301 Q3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: S3_V06S0003 Q3 arc: S3_V06S0103 F1 arc: V01S0000 Q0 arc: V01S0100 Q4 arc: W3_H06W0003 Q3 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C82:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 N1_V01S0100 arc: V00B0100 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 arc: A1 V01N0101 arc: A4 V00B0000 arc: A5 Q5 arc: A7 Q7 arc: B0 V01N0001 arc: B2 S1_V02N0101 arc: B3 Q3 arc: B6 H02W0101 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F0 arc: E1_H02E0201 F2 arc: E1_H02E0301 F3 arc: E1_H02E0401 F4 arc: E1_H02E0501 F7 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M3 H00R0000 arc: M4 H02W0401 arc: M5 H00L0000 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F1 arc: N1_V01N0101 F6 arc: N1_V02N0101 Q3 arc: N3_V06N0303 Q5 arc: V00B0000 Q4 arc: V01S0000 Q7 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R24C83:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: H00L0000 V02N0201 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H01E0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E1_H01W0100 arc: A0 S1_V02N0501 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: A6 H02E0701 arc: A7 Q7 arc: B4 V02S0501 arc: B5 V02S0501 arc: B6 H02W0301 arc: B7 H02W0301 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: C6 S1_V02N0001 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: H01W0100 Q7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H00L0100 arc: M4 H02E0401 arc: M5 H02E0001 arc: M6 V00T0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: V00B0100 Q5 arc: W1_H02W0401 F4 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000101000001100 word: SLICEC.K1.INIT 1111101011111100 word: SLICED.K0.INIT 0000111000000010 word: SLICED.K1.INIT 1111111011110010 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C84:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: H00L0100 W1_H02E0101 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 H01E0101 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 S1_V02N0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V02S0501 arc: A3 V02S0501 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: E1_H01E0001 F0 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 F2 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 H00L0100 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: V01S0000 Q6 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000000011100010 word: SLICEA.K1.INIT 1111111111100010 word: SLICEB.K0.INIT 0000000011100010 word: SLICEB.K1.INIT 1111111111100010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C85:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 W3_H06E0303 arc: H00L0000 H02W0201 arc: H00L0100 W1_H02E0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02E0101 arc: S1_V02S0601 W3_H06E0303 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 E1_H02W0101 arc: B3 E1_H02W0101 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H02E0601 arc: C3 H02E0601 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0001 arc: D3 V02N0001 arc: E1_H01E0101 Q5 arc: E1_H02E0301 Q1 arc: E1_H02E0401 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 F0 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 V00B0000 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: V01S0000 F2 word: SLICEA.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 1111111110111000 word: SLICEB.K0.INIT 0000000010111000 word: SLICEB.K1.INIT 1111111110111000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C86:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0601 V01N0001 arc: H00L0000 H02W0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 N1_V02S0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V02N0401 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 N1_V01S0000 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H02E0401 arc: C3 H02E0401 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 S1_V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F4 arc: E1_H02E0101 Q1 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q7 arc: H01W0100 F2 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M3 H02E0201 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0001 F0 arc: N1_V02N0401 Q4 arc: N3_V06N0203 F4 arc: S3_V06S0203 F4 word: SLICEC.K0.INIT 0000000000110011 word: SLICEA.K0.INIT 0000101100001000 word: SLICEA.K1.INIT 1111101111111000 word: SLICEB.K0.INIT 0000000010111000 word: SLICEB.K1.INIT 1111111110111000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C87:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0201 N1_V02S0201 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: B0 H02E0101 arc: B1 H02E0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 H01E0101 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M1 H02E0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0201 F0 arc: N1_V02N0501 Q7 arc: S3_V06S0103 Q2 word: SLICEB.K0.INIT 1010111110100000 word: SLICEA.K0.INIT 0000000010101100 word: SLICEA.K1.INIT 1111111110101100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R24C88:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 V06S0203 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 N3_V06S0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02S0401 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0001 Q0 arc: S1_V02S0301 Q1 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R25C23:PLC2 arc: N1_V02N0401 E1_H01W0000 .tile R25C24:PLC2 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0601 E3_H06W0303 .tile R25C25:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 E3_H06W0103 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 E3_H06W0303 .tile R25C26:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V01N0001 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E1_H02W0601 .tile R25C27:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 V02N0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 E3_H06W0003 arc: V00T0000 E1_H02W0001 arc: B1 Q1 arc: C1 N1_V01N0001 arc: CE0 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: F1 F1_SLICE arc: H01W0000 F1 arc: LSR1 H02W0501 arc: M1 E1_H02W0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R25C28:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V02S0201 arc: N1_V02N0001 E1_H02W0001 arc: S1_V02S0501 H06W0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0301 .tile R25C29:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 E3_H06W0303 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 H06W0303 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0001 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: B0 H01W0100 arc: B1 H01W0100 arc: B4 H00L0000 arc: C0 H02W0401 arc: C1 N1_V01N0001 arc: C4 Q4 arc: CE0 H02E0101 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02S0201 arc: D4 H02W0001 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0601 F4 arc: N3_V06N0003 F0 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 1100110011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R25C30:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V02S0601 arc: H00L0000 N1_V02S0001 arc: H00R0100 E1_H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E1_H01W0100 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A5 Q5 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H01W0100 arc: C2 H00L0100 arc: C3 H00L0100 arc: C5 E1_H01E0101 arc: CE0 N1_V02S0201 arc: CE1 H02W0101 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H00R0000 arc: D2 V02S0201 arc: D3 V02S0201 arc: D5 H02E0001 arc: E1_H01E0101 Q0 arc: E1_H02E0701 F5 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00B0000 arc: M3 H02W0201 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N3_V06N0103 F2 word: SLICEA.K1.INIT 1110111001000100 word: SLICEB.K0.INIT 1101100000000000 word: SLICEB.K1.INIT 1101100011111111 word: SLICEC.K1.INIT 1010101011110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R25C31:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0101 arc: H00R0000 H02W0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 V02S0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0701 arc: A1 H02W0701 arc: A3 S1_V02N0701 arc: A4 V00T0000 arc: A5 Q5 arc: B0 H02E0301 arc: B1 Q1 arc: B3 Q3 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C4 Q4 arc: C5 W1_H02E0601 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CE2 W1_H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D3 W1_H02E0001 arc: D4 W1_H02E0201 arc: D5 H00R0100 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 Q7 arc: H01W0100 F3 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M1 V01S0100 arc: M2 H02E0601 arc: M3 H00L0100 arc: M4 V00B0000 arc: M5 H00L0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: S1_V02S0501 F5 arc: V00T0000 Q2 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K1.INIT 1010101011001100 word: SLICEC.K0.INIT 1111000010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R25C32:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V06S0303 arc: E3_H06E0103 H01E0101 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H06W0203 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0100 V02S0101 arc: V00T0100 S1_V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: A0 E1_H01E0001 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 N1_V01S0100 arc: B0 W1_H02E0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H01W0100 arc: B5 H02W0301 arc: B6 W1_H02E0301 arc: C0 H02W0601 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: C5 S1_V02N0001 arc: C6 Q6 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D6 E1_H01W0100 arc: E1_H01E0001 Q1 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 F5 arc: H01W0100 Q4 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M1 V01S0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0701 F5 arc: V00B0000 F6 arc: W1_H02W0501 F5 arc: W1_H02W0701 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1111110000110000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEC.K1.INIT 1011001110110011 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 .tile R25C33:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 N1_V02S0001 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 N1_V01S0100 arc: A5 F7 arc: A7 V02S0101 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B2 H02W0101 arc: B3 H02W0101 arc: B5 N1_V01S0000 arc: B6 H02E0101 arc: C0 H00L0100 arc: C1 E1_H02W0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 H02W0401 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 N1_V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 S1_V02N0401 arc: D7 H02E0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00T0000 arc: M6 E1_H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0601 F4 arc: N3_V06N0103 F2 arc: N3_V06N0303 F5 arc: S1_V02S0401 Q4 arc: V00B0000 F4 arc: W1_H02W0401 Q6 arc: W1_H02W0601 Q6 arc: W3_H06W0003 F0 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1111101010100000 word: SLICED.K1.INIT 1111101010100000 word: SLICEC.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1000001000101000 word: SLICEB.K1.INIT 1110101110111110 word: SLICED.K0.INIT 1100000011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R25C34:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 H01E0101 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 N3_V06S0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 V02S0301 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 H01W0100 arc: B1 Q1 arc: B2 N1_V02S0101 arc: B3 N1_V02S0301 arc: B6 H02E0101 arc: B7 H02E0101 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C5 S1_V02N0001 arc: C6 V02S0201 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D5 V02S0401 arc: D6 N1_V02S0601 arc: D7 N1_V02S0601 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0000 F6 arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00B0100 arc: M4 V00T0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V02N0201 F2 arc: N3_V06N0003 F0 arc: S1_V02S0701 F5 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEC.K1.INIT 1111101010100000 word: SLICED.K0.INIT 1001011000000000 word: SLICED.K1.INIT 1111111110010110 word: SLICEB.K0.INIT 1000010001001000 word: SLICEB.K1.INIT 1110110111011110 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C35:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 N1_V02S0001 arc: H00R0000 H02E0601 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: A4 F7 arc: A5 W1_H02E0701 arc: A6 F7 arc: A7 F5 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 V02S0701 arc: B7 H02E0101 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 H02W0601 arc: C6 H02W0401 arc: C7 V00T0100 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 W1_H02E0001 arc: D5 V02S0401 arc: D6 W1_H02E0001 arc: D7 V02S0601 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: M2 V00B0100 arc: N1_V01N0101 F6 arc: N3_V06N0203 F4 arc: S1_V02S0001 F2 arc: V00B0100 F5 arc: V01S0000 F0 arc: V01S0100 F0 word: SLICEC.K1.INIT 1110111010001000 word: SLICEB.K0.INIT 1001011000000000 word: SLICEB.K1.INIT 1111111110010110 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1000010001001000 word: SLICEA.K1.INIT 1110110111011110 word: SLICED.K0.INIT 1111100110010000 word: SLICEC.K0.INIT 1001011001101001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R25C36:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02N0601 arc: H00L0100 N1_V02S0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 H02E0701 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 W1_H02E0501 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V06S0203 arc: A1 S1_V02N0501 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 W1_H02E0701 arc: A5 W1_H02E0701 arc: A6 V02S0301 arc: A7 V02S0301 arc: B1 H02W0101 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 H02E0301 arc: B7 H02E0301 arc: C1 N1_V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 E1_H02W0601 arc: C5 E1_H02W0401 arc: C6 V02S0001 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 N1_V01S0000 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D4 V02S0401 arc: D5 V02S0401 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F2 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR1 V00T0000 arc: M2 H02E0601 arc: M4 V00B0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 arc: N1_V02N0601 F6 arc: N3_V06N0003 Q0 arc: N3_V06N0103 F1 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q0 arc: S1_V02S0401 F6 arc: S3_V06S0003 Q0 arc: V01S0000 Q0 arc: V01S0100 Q0 arc: W1_H02W0401 F4 arc: W1_H02W0601 F4 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000000011111111 word: SLICEC.K0.INIT 1000001000101000 word: SLICEC.K1.INIT 1110101110111110 word: SLICED.K0.INIT 1001011000000000 word: SLICED.K1.INIT 1111111110010110 word: SLICEA.K1.INIT 1110101110000010 word: SLICEB.K0.INIT 1101101001000000 word: SLICEB.K1.INIT 1111110110100100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C37:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06W0203 arc: N3_V06N0203 H01E0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 E3_H06W0003 arc: W3_H06W0203 N3_V06S0203 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A2 F5 arc: A3 F5 arc: A4 V02N0101 arc: A5 H02E0501 arc: A6 N1_V01N0101 arc: A7 V02S0301 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 N1_V02S0301 arc: B3 S1_V02N0101 arc: B5 N1_V02S0501 arc: B7 W1_H02E0301 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 V02S0201 arc: C5 W1_H02E0401 arc: C6 Q6 arc: C7 F4 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H01E0101 arc: D3 H01E0101 arc: D4 E1_H02W0001 arc: D5 H02W0001 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 W1_H02E0001 arc: M3 H00R0100 arc: M5 H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0001 F0 arc: N1_V02N0201 F0 arc: N3_V06N0003 F3 arc: N3_V06N0103 F2 arc: S1_V02S0401 F6 arc: S1_V02S0701 Q5 arc: V01S0000 Q1 arc: W1_H02W0401 F4 arc: W1_H02W0701 F7 word: SLICED.K0.INIT 1010101011110000 word: SLICEC.K0.INIT 1111101010100000 word: SLICED.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1001000001100000 word: SLICEA.K1.INIT 1111100111110110 word: SLICEC.K1.INIT 1100011001100011 word: SLICEB.K0.INIT 1110110110000100 word: SLICEB.K1.INIT 1001011001101001 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C38:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H06E0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02N0501 arc: A4 V00T0100 arc: A6 F5 arc: A7 N1_V01N0101 arc: B0 N1_V02S0101 arc: B1 N1_V02S0301 arc: B2 E1_H02W0301 arc: B3 V02N0101 arc: B5 H02E0101 arc: B6 W1_H02E0301 arc: B7 S1_V02N0501 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 H02E0601 arc: C3 E1_H02W0401 arc: C4 Q4 arc: C5 V02S0001 arc: C6 V02S0201 arc: C7 N1_V02S0201 arc: CE0 E1_H02W0101 arc: CE1 H02W0101 arc: CE2 H00L0000 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V01S0100 arc: D3 V02S0201 arc: D4 W1_H02E0201 arc: D5 E1_H02W0201 arc: D6 E1_H02W0001 arc: D7 F0 arc: E1_H01E0001 Q2 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 W1_H02E0601 arc: M4 V00T0000 arc: M5 H00R0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F2 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0601 F4 arc: N3_V06N0203 F7 arc: S1_V02S0601 Q6 arc: V00B0100 F5 arc: V00T0100 Q1 arc: V01S0000 Q6 arc: V01S0100 F3 word: SLICEC.K0.INIT 1010101011110000 word: SLICEC.K1.INIT 1111110011000000 word: SLICEB.K1.INIT 1111110011000000 word: SLICED.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 1000010001001000 word: SLICEA.K1.INIT 1110110111011110 word: SLICEB.K0.INIT 1001011001101001 word: SLICED.K1.INIT 1110110110000100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R25C39:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 H06E0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 H06E0003 arc: V00B0100 H02W0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06S0203 arc: A0 E1_H01E0001 arc: A1 E1_H02W0701 arc: A2 E1_H02W0701 arc: A3 H00L0100 arc: A4 V02S0301 arc: A5 Q5 arc: A7 H02E0701 arc: B0 V02S0101 arc: B1 Q1 arc: B2 H02E0301 arc: B3 V02S0101 arc: B5 S1_V02N0701 arc: B6 V02S0701 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H00L0100 arc: C3 W1_H02E0401 arc: C4 W1_H02E0401 arc: C6 W1_H02E0401 arc: C7 E1_H01E0101 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 V02S0601 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q7 arc: E1_H02E0601 F6 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: M5 H00R0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F2 arc: V00B0000 F4 arc: V01S0000 Q4 word: SLICEC.K1.INIT 1010101011001100 word: SLICED.K1.INIT 1111000010101010 word: SLICEC.K0.INIT 1010111110100000 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1111010111011101 word: SLICEB.K0.INIT 1010100000100000 word: SLICEB.K1.INIT 1111101100111011 word: SLICED.K0.INIT 1111110000001100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R25C40:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V01N0001 arc: H00L0000 N1_V02S0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0003 N3_V06S0003 arc: A0 H00L0100 arc: A1 E1_H02W0701 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 H02E0701 arc: A5 V02S0301 arc: A6 E1_H01W0000 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 V02S0701 arc: B7 E1_H02W0301 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C5 E1_H01E0101 arc: C6 Q6 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0001 arc: D2 W1_H02E0201 arc: D3 E1_H02W0001 arc: D4 H02E0001 arc: D5 W1_H02E0201 arc: D6 E1_H02W0001 arc: D7 H01W0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q4 arc: H01W0100 Q3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00T0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F4 arc: N3_V06N0003 F0 arc: V00B0100 F7 arc: V01S0000 F6 arc: W1_H02W0701 F5 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICED.K1.INIT 1011101110001000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1111010111011101 word: SLICEC.K1.INIT 1010101011110000 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICED.K0.INIT 1111000010101010 word: SLICEC.K0.INIT 1000100011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 .tile R25C41:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V02N0701 arc: H00L0000 S1_V02N0001 arc: H00L0100 N1_V02S0101 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0701 V02S0701 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A1 V02S0501 arc: A2 V02S0501 arc: A3 H02W0701 arc: A6 V02N0301 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H02W0301 arc: B3 Q3 arc: C0 H02W0401 arc: C1 H00R0100 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C6 N1_V02S0201 arc: C7 V02N0001 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 V00T0100 arc: D3 H02W0001 arc: D6 S1_V02N0401 arc: D7 H02W0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F6 arc: H00R0100 Q5 arc: H01W0000 Q6 arc: H01W0100 Q5 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0301 arc: M0 E1_H02W0601 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 V01S0000 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V02N0401 F6 arc: S1_V02S0401 F6 arc: S1_V02S0601 F6 arc: V00B0100 F7 arc: V00T0100 Q3 arc: V01S0100 F6 arc: W1_H02W0401 F6 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1101110111110101 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1010100000100000 word: SLICEB.K1.INIT 1101110111110101 word: SLICED.K0.INIT 1111010101010101 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R25C42:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: H00L0000 S1_V02N0201 arc: H00R0100 V02N0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 N1_V01S0000 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 V06S0303 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B0 V02N0301 arc: B1 Q1 arc: B2 H00R0000 arc: B3 Q3 arc: C0 H02E0401 arc: C1 N1_V01S0100 arc: C2 N1_V01N0001 arc: C3 N1_V01S0100 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V01S0100 arc: D2 V02S0201 arc: D3 H00R0000 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: H00R0000 Q4 arc: H01W0000 Q6 arc: H01W0100 F0 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 W1_H02E0001 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N3_V06N0103 F2 arc: S1_V02S0701 Q5 arc: V01S0100 Q6 word: SLICEB.K0.INIT 1110010000000000 word: SLICEB.K1.INIT 1101111110001111 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101111110001111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R25C43:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: H00L0100 W1_H02E0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H01E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0303 N3_V06S0303 arc: A0 E1_H01E0001 arc: A1 H02E0501 arc: B0 V00B0000 arc: B1 Q1 arc: B2 V01N0001 arc: C0 H02E0401 arc: C1 N1_V01N0001 arc: C2 H00L0000 arc: CE0 W1_H02E0101 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 H02E0001 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M4 V00B0100 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: N1_V02N0501 Q7 arc: N1_V02N0601 Q6 arc: N1_V02N0701 Q7 arc: V00B0000 Q4 arc: V00T0000 F2 arc: W3_H06W0003 F0 word: SLICEB.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1101110111110101 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R25C44:PLC2 arc: H00L0000 E1_H02W0201 arc: S1_V02S0001 H02W0001 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 E1_H02W0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N3_V06S0303 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 V02N0501 arc: A1 H02E0501 arc: A2 F7 arc: A3 V00T0000 arc: A4 H02E0501 arc: A5 Q5 arc: A6 F5 arc: A7 H02E0501 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 N1_V02S0301 arc: B3 H00R0100 arc: B4 V00B0100 arc: B5 H02E0101 arc: B7 V02N0501 arc: C0 H02E0401 arc: C1 H00R0100 arc: C2 F4 arc: C3 H02W0601 arc: C4 S1_V02N0201 arc: C5 H02E0401 arc: C6 V02S0001 arc: C7 V00T0100 arc: CE0 W1_H02E0101 arc: CE1 V02N0201 arc: CE2 N1_V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0201 arc: D3 H02W0001 arc: D4 H02W0201 arc: D5 H02E0201 arc: D6 F0 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0100 Q3 arc: LSR0 H02E0301 arc: LSR1 H02W0501 arc: M0 E1_H02W0601 arc: M3 E1_H02W0201 arc: M5 H00L0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V02N0001 F2 arc: N1_V02N0101 F1 arc: S1_V02S0301 Q3 arc: S1_V02S0501 Q7 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 F3 arc: V01S0100 Q7 word: SLICEB.K1.INIT 0011010100000000 word: SLICEC.K1.INIT 0101001100000000 word: SLICEA.K0.INIT 0000000000110101 word: SLICED.K0.INIT 1111000010100000 word: SLICED.K1.INIT 1110010000000000 word: SLICEC.K0.INIT 0000110100001000 word: SLICEB.K0.INIT 0000000100000001 word: SLICEA.K1.INIT 1110010000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C45:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N3_V06S0303 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N3_V06S0303 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: A6 V02N0101 arc: A7 Q7 arc: B0 H02W0101 arc: B3 H02W0101 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 H02W0101 arc: B7 H02W0101 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 V00B0100 arc: C7 V01N0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 V00T0100 arc: M5 E1_H02W0001 arc: M6 V00T0100 arc: M7 H02W0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q7 arc: S1_V02S0701 Q7 arc: V00B0100 Q7 word: SLICEA.K0.INIT 0000000011001100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000000110011 word: SLICEC.K0.INIT 0000000001000111 word: SLICEC.K1.INIT 0000000001000111 word: SLICED.K0.INIT 0000000000011101 word: SLICED.K1.INIT 0000000001000111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C46:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02W0201 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 N3_V06S0203 arc: A1 H02E0501 arc: A3 F5 arc: A4 N1_V02S0301 arc: A5 Q5 arc: A6 H02E0501 arc: A7 V00T0100 arc: B0 V02S0301 arc: B1 V00T0000 arc: B2 V02S0301 arc: B3 V01N0001 arc: B4 V02N0701 arc: B5 E1_H02W0301 arc: B6 E1_H02W0301 arc: B7 S1_V02N0501 arc: C0 H00R0100 arc: C1 H02W0401 arc: C2 H02E0401 arc: C3 H00L0100 arc: C4 V01N0101 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 H02W0601 arc: CE0 H02E0101 arc: CE1 N1_V02S0201 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0001 arc: D2 Q2 arc: D3 V00B0100 arc: D4 F2 arc: D5 N1_V02S0401 arc: D6 H02E0201 arc: D7 V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q7 arc: H01W0100 F4 arc: LSR0 H02W0501 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M2 V00B0000 arc: M5 E1_H02W0001 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V02N0101 F3 arc: N1_V02N0401 F4 arc: S1_V02S0001 Q2 arc: S1_V02S0701 Q7 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V01S0000 F1 arc: V01S0100 F6 word: SLICED.K0.INIT 0001101100000000 word: SLICEA.K1.INIT 0000000000100111 word: SLICEA.K0.INIT 0000110000111111 word: SLICEB.K0.INIT 0000110000111111 word: SLICEC.K0.INIT 1100010010000000 word: SLICED.K1.INIT 0011001000010000 word: SLICEC.K1.INIT 1010000011000000 word: SLICEB.K1.INIT 1100110011001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C47:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 S1_V02N0001 arc: H00R0000 H02E0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 N3_V06S0303 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02N0501 arc: A0 H00R0000 arc: A2 V00B0000 arc: A4 V00T0000 arc: B0 H00R0100 arc: B4 E1_H02W0301 arc: C0 V02S0601 arc: C2 E1_H02W0401 arc: C4 H01E0001 arc: CE0 H02W0101 arc: CE1 H00L0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 Q2 arc: D4 F2 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0000 F0 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M2 H02E0601 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: V00B0000 Q6 arc: V01S0000 F0 arc: W1_H02W0001 Q0 arc: W1_H02W0401 Q6 arc: W1_H02W0601 Q6 word: SLICEB.K0.INIT 0000010111110101 word: SLICEC.K0.INIT 0101000101000000 word: SLICEA.K0.INIT 1101110001010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C48:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02N0301 arc: H00R0000 N1_V02S0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: A0 V01N0101 arc: A2 V02N0501 arc: A6 H00L0000 arc: B0 V01N0001 arc: B2 H00R0000 arc: B6 H02E0301 arc: C0 N1_V02S0601 arc: C2 H02W0601 arc: C6 V00B0100 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 V00T0100 arc: D6 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H00L0000 F0 arc: H01W0000 Q3 arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M0 H02E0601 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q2 arc: N3_V06N0003 Q3 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEB.K0.INIT 1011000010000000 word: SLICEA.K0.INIT 0000000010101100 word: SLICED.K0.INIT 1111000010110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R25C49:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 N1_V01S0100 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: S3_V06S0003 N3_V06S0003 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 V06S0303 arc: W3_H06W0203 E1_H01W0000 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 F5 arc: A5 V00T0100 arc: A6 F7 arc: A7 V02S0101 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 V00B0100 arc: B5 V02S0701 arc: B7 H02E0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 H02W0401 arc: C5 V02S0201 arc: C6 H02W0401 arc: C7 V02S0201 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 H00R0100 arc: D5 V02S0601 arc: D6 H01W0000 arc: D7 V02S0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: LSR0 V00T0000 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0000 arc: M5 H00L0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V02N0601 F4 arc: V00B0000 F6 arc: V00B0100 F7 arc: W1_H02W0501 Q5 word: SLICEC.K1.INIT 0011010100000000 word: SLICED.K1.INIT 0000000001010011 word: SLICED.K0.INIT 1111000010100000 word: SLICEC.K0.INIT 0000000000011111 word: SLICEA.K0.INIT 0000000001000000 word: SLICEA.K1.INIT 0000000001000000 word: SLICEB.K0.INIT 0000110001001100 word: SLICEB.K1.INIT 0000000001000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C50:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V06S0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02E0101 arc: H00R0100 H02E0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N1_V02S0501 arc: W3_H06W0003 N3_V06S0003 arc: A0 F7 arc: A1 F7 arc: A2 F7 arc: A3 H02E0701 arc: A4 V00T0100 arc: A6 S1_V02N0301 arc: A7 S1_V02N0301 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H01W0100 arc: B3 H00L0000 arc: B4 H02E0301 arc: B6 E1_H02W0101 arc: B7 E1_H02W0101 arc: C0 F4 arc: C1 F4 arc: C2 H00L0100 arc: C3 F4 arc: C4 V02N0201 arc: C6 F4 arc: CE1 H02W0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 V01S0100 arc: D4 E1_H02W0201 arc: D6 V01N0001 arc: D7 V01N0001 arc: E1_H01E0101 Q3 arc: E1_H02E0101 F1 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q4 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 W1_H02E0201 arc: M4 E1_H01E0101 arc: M5 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q3 arc: N1_V02N0601 F6 arc: N3_V06N0303 Q5 arc: V01S0100 F7 word: SLICEA.K0.INIT 0000000011111110 word: SLICEA.K1.INIT 0000000011111110 word: SLICEB.K0.INIT 0000000000001110 word: SLICEB.K1.INIT 0011001100110010 word: SLICEC.K0.INIT 0000000011100010 word: SLICED.K1.INIT 1100110010001000 word: SLICED.K0.INIT 0000001100000111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R25C51:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00L0100 H02W0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 H02W0401 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 V02S0401 arc: W3_H06W0103 E1_H01W0100 arc: A1 H00L0000 arc: B0 H02W0301 arc: B1 F3 arc: B3 V01N0001 arc: C0 E1_H01W0000 arc: C1 H00L0100 arc: C3 N1_V01N0001 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 N1_V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V02S0201 arc: D3 H02W0001 arc: E1_H01E0001 F1 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H00L0000 F0 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M3 E1_H02W0201 arc: M4 H02E0401 arc: M6 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q0 arc: S1_V02S0201 Q0 arc: V00B0100 Q7 word: SLICEA.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K1.INIT 0000001100000101 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C52:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: H00R0100 N1_V02S0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0303 arc: V00T0100 H02E0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 H02E0701 arc: B0 V02N0301 arc: B1 V01N0001 arc: B2 V02N0101 arc: B3 V01N0001 arc: B4 H02E0101 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 N1_V02S0001 arc: C5 V01N0101 arc: C6 H01E0001 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 V02N0401 arc: D5 E1_H02W0201 arc: D6 H02W0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 F1 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q4 arc: LSR1 H02W0501 arc: M0 H01E0001 arc: M1 H02W0001 arc: M2 V00T0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: S1_V02S0401 F4 arc: V01S0000 F4 arc: V01S0100 F4 arc: W1_H02W0401 F4 word: SLICEA.K0.INIT 0000000000000010 word: SLICEA.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 1010000010100010 word: SLICEB.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000000001111 word: SLICEC.K0.INIT 1111010001000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C53:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 N3_V06S0203 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 .tile R25C54:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V02N0701 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00T0100 E1_H02W0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: A0 H00L0100 arc: A4 H02W0501 arc: A6 V02N0301 arc: A7 V00T0100 arc: B0 W1_H02E0101 arc: B4 V02S0701 arc: B5 V02S0701 arc: B6 V02N0501 arc: B7 H02E0301 arc: C0 H02W0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: C7 S1_V02N0001 arc: D0 V02N0001 arc: D4 E1_H01W0100 arc: D5 H00R0100 arc: D6 V01N0001 arc: D7 H02W0201 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M4 E1_H02W0401 arc: N1_V01N0001 F1 arc: N3_V06N0203 F7 word: SLICEA.K0.INIT 0011001100110010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000001000100 word: SLICED.K1.INIT 1111010111000101 word: SLICEC.K0.INIT 1111111001010100 word: SLICEC.K1.INIT 1111111111111100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R25C55:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 E1_H02W0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02E0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 S1_V02N0301 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E1_H01W0000 arc: A0 F7 arc: A1 H00L0000 arc: A2 H02W0701 arc: A3 V02N0501 arc: A5 Q5 arc: A6 F5 arc: A7 H02W0701 arc: B1 Q1 arc: B2 V02S0301 arc: B3 V02S0301 arc: B6 S1_V02N0701 arc: B7 V02S0701 arc: C0 H02W0601 arc: C1 N1_V01S0100 arc: C2 E1_H02W0601 arc: C3 E1_H02W0401 arc: C4 S1_V02N0001 arc: C5 V02N0201 arc: C6 V01N0101 arc: C7 E1_H02W0601 arc: CE0 H00L0100 arc: CE1 N1_V02S0201 arc: CE2 V02S0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 E1_H02W0001 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 V02N0601 arc: D5 H00R0100 arc: D6 V02N0401 arc: D7 V02S0401 arc: E1_H01E0001 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M1 H02W0001 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V02N0601 F4 arc: S1_V02S0701 Q5 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q7 arc: W1_H02W0001 Q2 arc: W1_H02W0201 F0 arc: W1_H02W0401 F4 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000010111110101 word: SLICED.K0.INIT 0000000010111000 word: SLICEB.K0.INIT 1000101010000000 word: SLICED.K1.INIT 0100010101000000 word: SLICEA.K0.INIT 0000000001010000 word: SLICEB.K1.INIT 0010000000101010 word: SLICEA.K1.INIT 0000000000011011 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R25C56:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V01N0001 arc: H00R0100 H02E0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: A0 F5 arc: A1 F5 arc: A2 H02E0501 arc: A3 V02N0701 arc: A4 W1_H02E0701 arc: A5 Q5 arc: A7 N1_V01N0101 arc: B0 F3 arc: B2 V02N0101 arc: B3 S1_V02N0101 arc: B4 N1_V02S0501 arc: B5 V01S0000 arc: B7 V01S0000 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 S1_V02N0401 arc: C3 V02N0401 arc: C4 V01N0101 arc: C5 V02N0201 arc: C7 V02N0201 arc: CE0 W1_H02E0101 arc: CE1 N1_V02S0201 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 F0 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 H00L0100 arc: D7 V02S0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q3 arc: E1_H02E0101 Q1 arc: E1_H02E0501 Q7 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F2 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H02E0001 arc: M3 W1_H02E0201 arc: M5 H02E0001 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q1 arc: V00B0100 F7 word: SLICEC.K0.INIT 0000001100010001 word: SLICEB.K1.INIT 0100010101000000 word: SLICEC.K1.INIT 0000101100001000 word: SLICED.K1.INIT 1110000000100000 word: SLICEA.K0.INIT 1111110010101100 word: SLICEA.K1.INIT 1111111110101111 word: SLICEB.K0.INIT 0001111010110100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C57:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 V06S0003 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0100 V02S0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N3_V06S0203 arc: A0 H01E0001 arc: A1 H01E0001 arc: A3 N1_V02S0701 arc: A4 V00T0100 arc: A6 F7 arc: A7 H00L0000 arc: B0 V01N0001 arc: B3 Q3 arc: B4 V01S0000 arc: B6 F3 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C3 V02N0601 arc: C4 Q4 arc: C7 V02N0001 arc: CE1 H02W0101 arc: CE2 S1_V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D3 V02N0201 arc: D4 V02N0601 arc: D6 H02W0001 arc: D7 H01W0000 arc: E1_H01E0101 F0 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q3 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M3 H00R0100 arc: M4 H02E0401 arc: M7 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: S1_V02S0401 Q4 arc: V00B0000 F4 word: SLICEB.K1.INIT 0011000001010000 word: SLICED.K1.INIT 0000000100001101 word: SLICED.K0.INIT 1110111000000000 word: SLICEC.K0.INIT 0001110100000000 word: SLICEA.K0.INIT 1111101011001100 word: SLICEA.K1.INIT 1111101011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C58:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 H02W0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 V02S0701 arc: A1 V02N0501 arc: A2 F7 arc: A3 V00T0000 arc: A4 V00T0100 arc: A5 H02E0701 arc: A6 N1_V02S0301 arc: A7 N1_V02S0101 arc: B0 H00R0100 arc: B1 Q1 arc: B2 H00L0000 arc: B4 H00R0000 arc: B5 W1_H02E0301 arc: B6 H01E0101 arc: B7 V00B0000 arc: C0 S1_V02N0601 arc: C1 H02E0401 arc: C2 F4 arc: C3 F4 arc: C4 S1_V02N0001 arc: C5 V02S0201 arc: C6 V02N0001 arc: C7 S1_V02N0001 arc: CE0 H00L0100 arc: CE1 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V01S0100 arc: D2 F0 arc: D3 F0 arc: D4 V02N0401 arc: D5 V02S0401 arc: D6 E1_H01W0100 arc: D7 V02N0401 arc: E1_H01E0001 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: LSR1 H02E0301 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M3 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F5 arc: N3_V06N0303 F6 arc: V01S0000 Q1 arc: V01S0100 Q3 arc: W1_H02W0201 F2 word: SLICEA.K1.INIT 0001000000010101 word: SLICED.K0.INIT 0001000010110000 word: SLICEC.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 0000110000001010 word: SLICEC.K0.INIT 1010000011000000 word: SLICED.K1.INIT 1010000011000000 word: SLICEB.K0.INIT 1110111011100010 word: SLICEB.K1.INIT 1111111111110101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C59:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 V06N0103 arc: H00L0000 H02E0201 arc: H00R0000 V02S0601 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: A0 E1_H01E0001 arc: A3 W1_H02E0501 arc: A4 H02E0501 arc: A5 W1_H02E0501 arc: A6 F5 arc: A7 H02E0501 arc: B0 V01N0001 arc: B1 F3 arc: B3 H00L0000 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 V00B0100 arc: B7 H02E0101 arc: C0 F4 arc: C1 F4 arc: C3 W1_H02E0401 arc: C4 N1_V02S0001 arc: C5 H02E0601 arc: C6 N1_V02S0201 arc: C7 H02E0601 arc: D0 V02N0001 arc: D1 V02N0201 arc: D3 N1_V02S0001 arc: D4 V00B0000 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 F0 arc: M0 H01E0001 arc: V01S0100 F6 word: SLICEC.K0.INIT 0101000000110000 word: SLICEB.K1.INIT 0000000000110101 word: SLICEA.K0.INIT 1111101011001100 word: SLICEA.K1.INIT 1111110011111111 word: SLICED.K1.INIT 1010000011000000 word: SLICEC.K1.INIT 0000111000000010 word: SLICED.K0.INIT 1100110010001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R25C60:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0203 V06S0203 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: S1_V02S0701 N1_V02S0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: A2 V00B0000 arc: A3 V00B0000 arc: B2 S1_V02N0301 arc: B3 S1_V02N0101 arc: C2 H00L0100 arc: C3 H00L0100 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 N1_V02S0201 arc: D3 V02S0001 arc: F2 F5B_SLICE arc: H00L0100 Q3 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 H02E0401 arc: M7 E1_H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q7 arc: N3_V06N0103 F2 arc: V00B0000 Q4 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011101111110011 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C61:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V06S0203 arc: H00L0100 H02W0301 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0101 N1_V01S0100 arc: W3_H06W0203 E1_H01W0000 arc: B0 H01W0100 arc: B1 Q1 arc: B4 V01S0000 arc: C0 H00L0000 arc: C1 H02W0601 arc: C4 H02W0601 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 S1_V02N0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V00B0100 arc: D4 V00B0000 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: H00L0000 Q0 arc: H01W0100 Q6 arc: M0 V00T0000 arc: M1 H00R0100 arc: M2 V00T0100 arc: M4 H02W0401 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0401 F4 arc: V00B0000 Q4 arc: V00B0100 Q7 arc: V01S0000 Q2 arc: W3_H06W0103 F1 word: SLICEA.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1100110011110000 word: SLICEC.K0.INIT 1100111111000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R25C62:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0303 V01N0101 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H06W0303 arc: V00B0100 V02N0101 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N1_V02S0601 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 V00T0000 arc: A6 W1_H02E0701 arc: B0 H01W0100 arc: B1 Q1 arc: B6 V00B0100 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C6 W1_H02E0401 arc: CE0 V02S0201 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D6 V02N0401 arc: E1_H01E0101 F6 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H00R0000 Q6 arc: H01W0000 F0 arc: H01W0100 Q1 arc: M0 H01E0001 arc: M1 H00R0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: S1_V02S0201 F2 arc: V00T0000 Q2 word: SLICED.K0.INIT 0010000000000000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEB.K0.INIT 1010101011110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R25C63:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 H02W0001 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0301 H06W0003 arc: V00B0100 H02E0501 arc: V00T0000 V02S0601 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 F5 arc: B0 V02S0101 arc: B1 S1_V02N0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 V02S0701 arc: B5 N1_V02S0701 arc: B7 V02S0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V00B0100 arc: C5 H02W0601 arc: C7 N1_V02S0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 N1_V02S0601 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F7 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 N1_V01N0001 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 F5 arc: N1_V02N0401 F4 arc: S1_V02S0001 F2 arc: S1_V02S0501 F7 arc: V01S0000 F2 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICEC.K1.INIT 1111110011000000 word: SLICED.K1.INIT 1111110011000000 word: SLICEC.K0.INIT 1001011001101001 word: SLICEB.K0.INIT 1001000001100000 word: SLICEB.K1.INIT 1111100111110110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C64:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 H01E0101 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 N1_V02S0001 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V06N0003 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A2 V00T0000 arc: A3 V02S0501 arc: A4 H02W0501 arc: A5 H02W0701 arc: A6 V02S0101 arc: A7 W1_H02E0701 arc: B0 V00B0000 arc: B2 E1_H02W0301 arc: B3 W1_H02E0301 arc: B4 E1_H02W0101 arc: B5 W1_H02E0101 arc: B6 H02W0301 arc: B7 H02W0101 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F7 arc: N1_V01N0101 F2 arc: N1_V02N0101 F3 arc: N1_V02N0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F7 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: V01S0000 F7 arc: W1_H02W0201 F2 arc: W1_H02W0401 F6 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R25C65:PLC2 arc: E1_H02E0301 V01N0101 arc: E3_H06E0003 V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H01E0001 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 N1_V01S0000 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 E1_H01W0100 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02W0501 arc: A1 H02W0701 arc: A2 V02S0701 arc: A3 V02S0501 arc: A4 N1_V02S0101 arc: A5 H02E0501 arc: A6 W1_H02E0701 arc: A7 W1_H02E0501 arc: B0 V02S0301 arc: B1 V02S0101 arc: B2 H02E0301 arc: B3 E1_H02W0101 arc: B4 W1_H02E0301 arc: B5 W1_H02E0101 arc: B6 E1_H02W0301 arc: B7 V00T0000 arc: E1_H01E0001 F2 arc: E1_H02E0001 F0 arc: E1_H02E0501 F7 arc: E1_H02E0601 F6 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F4 arc: N1_V01N0001 F1 arc: N1_V01N0101 F0 arc: N1_V02N0101 F3 arc: N1_V02N0201 F2 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0701 F5 arc: V01S0000 F6 arc: V01S0100 F0 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R25C66:PLC2 arc: E1_H02E0401 N1_V02S0401 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0301 E1_H02W0301 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02W0501 arc: A1 W1_H02E0701 arc: A2 H02W0701 arc: A6 N1_V02S0301 arc: B0 V02S0101 arc: B1 V02S0301 arc: B2 V02S0301 arc: B6 F1 arc: B7 V02S0701 arc: C6 V00T0100 arc: C7 N1_V02S0001 arc: D6 H00R0100 arc: D7 F0 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0001 F0 arc: E1_H02E0201 F2 arc: E1_H02E0601 F6 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: N1_V02N0001 F2 arc: N1_V02N0601 F6 arc: N1_V02N0701 F7 arc: N3_V06N0103 F2 arc: V01S0000 F2 arc: V01S0100 F2 arc: W1_H02W0001 F2 word: SLICED.K1.INIT 1111110011000000 word: SLICED.K0.INIT 1001011001101001 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R25C67:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 H01E0101 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: A0 V02N0701 arc: A1 W1_H02E0501 arc: A3 F5 arc: A5 W1_H02E0501 arc: A6 F5 arc: A7 N1_V02S0301 arc: B0 V00B0000 arc: B1 S1_V02N0301 arc: B2 H02W0301 arc: B3 E1_H02W0301 arc: B4 N1_V02S0501 arc: B5 N1_V02S0501 arc: B6 V02N0701 arc: B7 V02S0501 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 N1_V02S0601 arc: C3 E1_H02W0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 E1_H02W0601 arc: C7 F4 arc: CE1 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 V02N0001 arc: D4 H00R0100 arc: D5 F2 arc: D6 V02N0601 arc: D7 H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: E1_H02E0201 F0 arc: E1_H02E0601 F4 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0000 arc: M3 H00L0000 arc: MUXCLK1 CLK0 arc: N1_V02N0101 F3 arc: V00T0000 F2 arc: V01S0000 Q3 word: SLICEB.K0.INIT 1111110011000000 word: SLICEC.K0.INIT 1111110011000000 word: SLICEC.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1000001000101000 word: SLICEA.K1.INIT 1111111110010110 word: SLICED.K1.INIT 1001011001101001 word: SLICED.K0.INIT 1111100110010000 word: SLICEB.K1.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R25C68:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 N1_V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V02S0301 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 F7 arc: A3 F7 arc: A4 V02S0301 arc: A5 V02S0301 arc: A6 V02N0301 arc: A7 V02S0301 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 E1_H02W0101 arc: B3 V02N0101 arc: B4 H02E0101 arc: B5 H00L0000 arc: B6 V02S0701 arc: B7 H02E0101 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 F4 arc: C3 F4 arc: C4 N1_V02S0201 arc: C5 N1_V02S0001 arc: C6 H01E0001 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 H02E0201 arc: D7 W1_H02E0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 V00T0100 arc: M4 V00B0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F2 arc: N1_V02N0001 F0 arc: N1_V02N0301 F3 arc: N1_V02N0401 F6 arc: S1_V02S0201 Q2 arc: S1_V02S0701 Q7 arc: V01S0000 Q1 word: SLICEA.K0.INIT 1000010001001000 word: SLICEA.K1.INIT 1110110111011110 word: SLICEC.K0.INIT 1001100001000000 word: SLICEC.K1.INIT 1111110111011010 word: SLICED.K1.INIT 1101001001001011 word: SLICEB.K1.INIT 1111100110010000 word: SLICEB.K0.INIT 1001011001101001 word: SLICED.K0.INIT 1110110110000100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R25C69:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 H02W0101 arc: H00R0000 H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0501 arc: A1 H00L0100 arc: A2 W1_H02E0701 arc: A3 V00B0000 arc: A4 V00T0000 arc: A5 W1_H02E0501 arc: A6 N1_V02S0301 arc: A7 H00R0000 arc: B0 H02E0301 arc: B1 V02S0101 arc: B2 V02N0301 arc: B3 H02W0101 arc: B4 N1_V02S0701 arc: B5 N1_V02S0701 arc: B6 W1_H02E0301 arc: B7 V00B0100 arc: C0 H02E0601 arc: C1 F6 arc: C2 H02E0401 arc: C3 F6 arc: C4 N1_V02S0001 arc: C5 V02S0001 arc: C6 H02E0601 arc: C7 N1_V02S0001 arc: D0 H02W0201 arc: D1 F0 arc: D2 W1_H02E0201 arc: D3 F0 arc: D4 H02E0201 arc: D5 H02W0201 arc: D6 H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H01W0100 F3 arc: M4 V00T0100 arc: M6 V00T0100 arc: W1_H02W0101 F1 word: SLICEC.K0.INIT 1100001000100000 word: SLICEC.K1.INIT 1111101111100110 word: SLICED.K0.INIT 1100001000001000 word: SLICED.K1.INIT 1111110111011010 word: SLICEA.K0.INIT 1001101001011001 word: SLICEB.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1001011001101001 word: SLICEA.K1.INIT 1110100011010100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R25C70:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0201 N1_V02S0201 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0701 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A4 V02N0101 arc: A5 Q5 arc: A6 V02S0301 arc: A7 Q7 arc: B0 N1_V02S0101 arc: B1 Q1 arc: B2 V02N0101 arc: B3 Q3 arc: B4 E1_H02W0301 arc: B6 V00B0100 arc: B7 V02N0501 arc: C0 H02E0601 arc: C2 E1_H02W0401 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C5 V02S0001 arc: C6 V01N0101 arc: C7 V02S0001 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 V02S0001 arc: D2 V02N0001 arc: D3 W1_H02E0001 arc: D4 V02N0601 arc: D5 H02W0001 arc: D6 H02E0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F4 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 F2 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 E1_H02W0601 arc: M3 H00R0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0401 F6 arc: S1_V02S0101 F1 arc: V00B0100 Q7 arc: V00T0000 F0 arc: V00T0100 F3 word: SLICEA.K1.INIT 1100110010101010 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1101100000000000 word: SLICED.K1.INIT 1010110011111111 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1010011001100101 word: SLICEB.K0.INIT 1111100110010000 word: SLICEC.K0.INIT 1001011001101001 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R25C71:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V06N0103 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 N1_V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 N1_V01S0100 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 V02S0101 arc: A5 V02S0101 arc: A6 V02S0301 arc: A7 Q7 arc: B0 H02W0101 arc: B1 Q1 arc: B2 V02S0301 arc: B3 H02W0101 arc: B4 V01S0000 arc: B5 V01S0000 arc: B6 H02E0301 arc: B7 H02E0101 arc: C0 N1_V01N0001 arc: C1 S1_V02N0401 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V02S0001 arc: C5 S1_V02N0001 arc: C6 V01N0101 arc: C7 V01N0101 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02S0001 arc: D2 V02S0201 arc: D3 S1_V02N0001 arc: D4 H02W0201 arc: D5 S1_V02N0401 arc: D6 W1_H02E0201 arc: D7 H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F4 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q3 arc: H01W0100 Q7 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 W1_H02E0001 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F2 arc: V01S0000 Q5 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011101111110011 word: SLICEC.K0.INIT 1010110000000000 word: SLICEC.K1.INIT 1010110011111111 word: SLICED.K0.INIT 1101100000000000 word: SLICED.K1.INIT 1011100011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R25C72:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02N0401 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0501 E1_H02W0501 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V06N0303 arc: W3_H06W0103 V01N0101 arc: A5 V02N0301 arc: A7 E1_H02W0501 arc: B0 V00T0000 arc: B1 Q1 arc: B3 V02N0301 arc: B7 V02N0701 arc: C0 H00L0100 arc: C1 H00R0100 arc: C3 V02N0601 arc: C5 E1_H02W0401 arc: C7 V02N0001 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H02E0001 arc: D3 E1_H02W0201 arc: D5 E1_H02W0201 arc: D7 S1_V02N0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0000 Q4 arc: H01W0100 F7 arc: M0 V00B0100 arc: M1 H00L0000 arc: M3 H02W0201 arc: M4 V00B0000 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F7 arc: N1_V02N0001 F0 arc: N1_V02N0301 F3 arc: N1_V02N0701 F7 arc: S1_V02S0101 F3 arc: S1_V02S0401 Q6 arc: V00T0000 Q0 arc: V01S0100 F7 arc: W1_H02W0701 Q7 arc: W3_H06W0303 F5 word: SLICEB.K1.INIT 0000001100000000 word: SLICEC.K1.INIT 0000000010100000 word: SLICED.K1.INIT 0000100000000000 word: SLICEA.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R25C73:PLC2 arc: E1_H02E0501 N1_V02S0501 arc: N1_V02N0401 W1_H02E0401 arc: N3_V06N0103 H01E0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 H01E0101 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 H01E0001 arc: W3_H06W0303 N1_V01S0100 arc: C0 H00L0000 arc: C6 E1_H01E0101 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D6 V02S0601 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H00R0000 Q6 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V02N0001 F0 arc: N1_V02N0201 Q0 word: SLICED.K0.INIT 1111111111110000 word: SLICEA.K0.INIT 0000111100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R25C74:PLC2 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 V06N0003 arc: H00L0000 E1_H02W0201 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H01E0101 arc: S1_V02S0701 H02W0701 arc: V00B0100 V02S0101 arc: V00T0000 V02N0601 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V01N0101 arc: W3_H06W0303 V06S0303 arc: A0 H00L0100 arc: B0 V00B0000 arc: B1 V00B0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: F0 F5A_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 V01S0100 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0100 Q7 arc: W3_H06W0003 F0 word: SLICEA.K1.INIT 1111111111111100 word: SLICEA.K0.INIT 1010101011111100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C75:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0401 V01N0001 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H06W0003 arc: S3_V06S0103 N1_V01S0100 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H01E0001 arc: B1 V00B0000 arc: C1 N1_V01N0001 arc: CE0 E1_H02W0101 arc: CE1 H00L0100 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 V00T0100 arc: E1_H01E0001 Q0 arc: F1 F1_SLICE arc: H01W0000 Q6 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 H02W0601 arc: M1 H00R0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V02N0001 Q2 arc: V00B0000 Q4 arc: V00T0100 Q1 arc: V01S0000 F1 word: SLICEA.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C76:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 N1_V02S0701 arc: S1_V02S0201 N1_V02S0201 arc: V00B0100 H02W0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A3 V00T0000 arc: A5 N1_V01S0100 arc: B3 Q3 arc: B5 V01S0000 arc: C5 V02S0201 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D3 N1_V01S0000 arc: D5 H01W0000 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 Q5 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M1 H00L0100 arc: M2 V00B0100 arc: M3 H00L0000 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: S1_V02S0701 F5 arc: V00T0000 Q2 arc: V01S0000 Q1 arc: V01S0100 F3 word: SLICEB.K1.INIT 0000000000010001 word: SLICEC.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C77:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 V01N0101 arc: H00L0000 E1_H02W0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00B0100 V02S0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 N1_V02S0701 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: B0 H01W0100 arc: B1 H01W0100 arc: C0 V02N0601 arc: C1 V02N0601 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 S1_V02N0001 arc: E1_H01E0001 Q1 arc: E1_H02E0001 F0 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 H02E0001 arc: M3 H02W0201 arc: M4 V00T0100 arc: M5 H02W0001 arc: M6 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0701 Q7 arc: V00T0100 Q3 arc: V01S0100 Q6 word: SLICEA.K0.INIT 0000110000001010 word: SLICEA.K1.INIT 1111110011111010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C78:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V00B0000 arc: A4 N1_V01S0100 arc: A5 N1_V01S0100 arc: A6 N1_V01S0100 arc: A7 V02S0301 arc: B0 S1_V02N0301 arc: B1 Q1 arc: B2 V02S0301 arc: B4 N1_V01S0000 arc: B5 N1_V01S0000 arc: B6 N1_V01S0000 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 N1_V01S0100 arc: C3 F4 arc: C5 V02S0201 arc: C6 V02S0001 arc: C7 F4 arc: CE0 S1_V02N0201 arc: CE1 H02E0101 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 S1_V02N0001 arc: D2 N1_V01S0000 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0201 F0 arc: E1_H02E0401 Q4 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F6 arc: H01W0100 F6 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M0 W1_H02E0601 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 V01S0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: N1_V02N0401 F4 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: S3_V06S0303 F5 arc: V00T0000 Q2 arc: V01S0000 Q3 arc: V01S0100 Q1 arc: W1_H02W0701 F7 arc: W3_H06W0003 F3 word: SLICED.K0.INIT 0000100000000000 word: SLICEB.K0.INIT 0000010000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEC.K1.INIT 0000000010000000 word: SLICEC.K0.INIT 0100010000000000 word: SLICED.K1.INIT 1010000010100000 word: SLICEA.K0.INIT 0000111000000010 word: SLICEA.K1.INIT 1111110011111010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C79:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 V02S0601 arc: E3_H06E0103 H01E0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0103 H06W0103 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: A4 H02E0501 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 H02E0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 H02E0001 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F4 arc: E1_H02E0701 Q7 arc: E3_H06E0003 Q3 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0000 F2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: M6 H02W0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N1_V02N0401 Q4 arc: N3_V06N0203 Q7 arc: V00T0000 F0 arc: V01S0100 Q1 word: SLICEC.K0.INIT 1000000000000000 word: SLICEB.K0.INIT 0000110000001010 word: SLICEB.K1.INIT 1111110011111010 word: SLICEA.K0.INIT 0010001000110000 word: SLICEA.K1.INIT 1110111011111100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C80:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0303 H01E0101 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02N0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02S0601 arc: V00T0100 H02W0101 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02S0701 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 H02W0501 arc: A3 H02W0501 arc: A4 V02N0301 arc: A5 V02N0301 arc: B0 S1_V02N0101 arc: B1 S1_V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 N1_V01S0000 arc: B5 N1_V01S0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 W1_H02E0401 arc: C3 W1_H02E0401 arc: C4 S1_V02N0001 arc: C5 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 V01N0001 arc: D5 V01N0001 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0000 F0 arc: H00R0000 F4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 H00L0000 arc: M2 V00T0000 arc: M3 H00R0000 arc: M4 V00B0100 arc: M5 V01S0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q5 arc: N3_V06N0303 Q5 arc: V01S0000 F2 word: SLICEA.K0.INIT 0000101000001100 word: SLICEA.K1.INIT 1111101011111100 word: SLICEB.K0.INIT 0011000000100010 word: SLICEB.K1.INIT 1111110011101110 word: SLICEC.K0.INIT 0101010000000100 word: SLICEC.K1.INIT 1111111010101110 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C81:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 N3_V06S0103 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A3 H02E0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 H01W0100 arc: B3 E1_H02W0101 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 H02E0601 arc: C3 H00R0100 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 S1_V02N0001 arc: CE0 W1_H02E0101 arc: CE1 N1_V02S0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 S1_V02N0401 arc: E1_H01E0001 Q7 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H00R0100 Q7 arc: H01W0000 F2 arc: H01W0100 Q3 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 V00T0000 arc: M3 H00L0100 arc: M4 V00T0100 arc: M5 H02E0001 arc: M6 H02E0401 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q5 arc: N1_V02N0201 F0 arc: N1_V02N0401 F4 arc: N3_V06N0303 F6 word: SLICED.K0.INIT 0000000011110000 word: SLICEA.K0.INIT 0010001100100000 word: SLICEA.K1.INIT 1110111111101100 word: SLICEC.K0.INIT 0011000000100010 word: SLICEC.K1.INIT 1111110011101110 word: SLICEB.K0.INIT 0000110000001010 word: SLICEB.K1.INIT 1110111011111100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C82:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 V02N0501 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 H06E0103 arc: V00B0000 N1_V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 V02S0701 arc: A3 V01N0101 arc: B0 N1_V02S0101 arc: B1 H02W0101 arc: B2 V01N0001 arc: B3 H02W0101 arc: C0 W1_H02E0601 arc: C1 N1_V02S0401 arc: C2 W1_H02E0601 arc: C3 V02S0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: E1_H01E0101 Q3 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: E3_H06E0303 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0000 F0 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 V01S0000 arc: M6 E1_H02W0401 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q5 arc: N1_V02N0701 Q7 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q5 arc: V01S0000 F2 arc: V01S0100 Q4 word: SLICEA.K0.INIT 0000101000001100 word: SLICEA.K1.INIT 1110111011111100 word: SLICEB.K0.INIT 0000110000001010 word: SLICEB.K1.INIT 1110111011111100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C83:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 V06S0103 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 H02W0201 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0201 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 S1_V02N0601 arc: A1 V01N0101 arc: A2 V02N0701 arc: A3 V02N0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: B0 V01N0001 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 V01S0000 arc: B5 V01S0000 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V02N0001 arc: C5 V02N0001 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02S0001 arc: D3 W1_H02E0201 arc: D4 V00B0000 arc: D5 W1_H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F4 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00R0100 Q7 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0501 arc: M2 V00T0000 arc: M3 H02E0201 arc: M4 V00T0100 arc: M5 H00L0100 arc: M6 V00B0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: S1_V02S0001 Q0 arc: S1_V02S0301 Q1 arc: V01S0000 Q6 word: SLICEA.K1.INIT 0000000010101010 word: SLICEA.K0.INIT 0000000011001100 word: SLICEB.K0.INIT 0010001000110000 word: SLICEB.K1.INIT 1110111011111100 word: SLICEC.K0.INIT 0000101000001100 word: SLICEC.K1.INIT 1111101011111100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C84:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06N0203 arc: H00L0000 H02E0001 arc: H00L0100 V02S0101 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: A0 S1_V02N0501 arc: A1 H02E0701 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A5 S1_V02N0101 arc: B0 H01W0100 arc: B1 S1_V02N0301 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: C0 H00L0000 arc: C1 S1_V02N0401 arc: C2 H00L0000 arc: C3 N1_V01S0100 arc: C5 S1_V02N0001 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02N0001 arc: D2 N1_V01S0000 arc: D3 H02E0001 arc: D5 V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F2 arc: E1_H02E0501 F5 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00R0000 Q4 arc: H00R0100 Q5 arc: H01W0100 Q1 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N3_V06N0303 F5 arc: W1_H02W0001 F0 arc: W3_H06W0303 F5 word: SLICEC.K1.INIT 0000000000000101 word: SLICEB.K0.INIT 0000101100001000 word: SLICEB.K1.INIT 1111111110111000 word: SLICEA.K0.INIT 0000110000001010 word: SLICEA.K1.INIT 1111111110111000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C85:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 N1_V02S0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 H06E0103 arc: S1_V02S0301 W1_H02E0301 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0303 E1_H01W0100 arc: B0 H02W0301 arc: B2 H02W0301 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 V02S0001 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: LSR0 V00T0000 arc: LSR1 V00T0100 arc: M4 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q2 arc: V00B0100 Q7 word: SLICEB.K0.INIT 1100110000000000 word: SLICEA.K0.INIT 0011001100000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 .tile R25C86:PLC2 arc: E1_H02E0001 V06N0003 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0701 arc: H01W0100 W3_H06E0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0301 N3_V06S0003 arc: V00B0000 H02E0401 arc: V00B0100 V02N0101 arc: W1_H02W0301 N3_V06S0003 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C3 N1_V01N0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V02S0201 arc: D3 V02S0201 arc: E1_H02E0501 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H01W0000 Q7 arc: LSR0 V00B0100 arc: LSR1 V00B0000 arc: M5 H02W0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0701 Q5 arc: S1_V02S0101 Q3 arc: S1_V02S0201 Q0 arc: V01S0000 Q7 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0000111100000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R25C87:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V01N0001 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06E0303 arc: N3_V06N0103 S1_V02N0201 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 V01N0101 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02N0201 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: A0 H02E0501 arc: A2 E1_H01E0001 arc: B0 H01W0100 arc: B2 V01N0001 arc: C0 H02W0601 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 V01S0100 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H01W0100 Q7 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M1 H02W0001 arc: M4 V00B0100 arc: M5 V01S0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0001 F0 arc: V01S0000 Q1 arc: V01S0100 Q5 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 1011101110001000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 1100000011101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R25C88:PLC2 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 S1_V02N0601 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N3_V06S0103 arc: V00B0100 V02N0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 E1_H01E0001 arc: B1 H01W0100 arc: C0 V02N0401 arc: C1 H02E0601 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0001 arc: E1_H01E0001 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0100 Q7 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M3 H00L0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1111110000001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C26:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E3_H06W0103 .tile R26C27:PLC2 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 H06W0103 .tile R26C28:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 S1_V02N0401 arc: N3_V06N0303 E3_H06W0303 .tile R26C29:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02W0701 .tile R26C30:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 H02E0001 arc: H00R0000 H02W0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0301 V06S0003 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H01W0000 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: B0 H00R0100 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: CE0 E1_H02W0101 arc: CE1 H02W0101 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 F0 arc: H01W0100 Q3 arc: LSR0 V00B0100 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 W1_H02E0201 arc: M5 E1_H02W0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEB.K0.INIT 1010000010001000 word: SLICEB.K1.INIT 1111010111011101 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C31:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V06S0203 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 N1_V02S0701 arc: A0 H00L0100 arc: A1 H02E0701 arc: A2 H02E0701 arc: A3 E1_H01E0001 arc: A6 H02W0701 arc: B0 H02E0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: C0 H02W0401 arc: C1 E1_H01W0000 arc: C2 N1_V01N0001 arc: C3 H02E0601 arc: C6 Q6 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D6 H02E0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F2 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H01W0000 F0 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 E1_H02W0201 arc: M4 H02E0401 arc: M5 H00L0000 arc: M6 V00B0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: V00B0000 F6 word: SLICED.K0.INIT 1111000010101010 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEB.K0.INIT 1110010000000000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C32:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0303 V06S0303 arc: H00L0000 E1_H02W0201 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0201 E1_H02W0201 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0303 N3_V06S0303 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 V02N0601 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 V02S0501 arc: A4 H02E0501 arc: B0 H01W0100 arc: B1 Q1 arc: B2 V02S0301 arc: B3 Q3 arc: C0 N1_V01N0001 arc: C1 N1_V02S0401 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 Q4 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02S0201 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 V02S0401 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H01W0000 Q6 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H02E0201 arc: M4 H02E0401 arc: M5 V01S0000 arc: M6 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: V00B0000 F4 arc: W1_H02W0401 Q6 arc: W1_H02W0701 Q5 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEC.K0.INIT 1010101011110000 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1101100011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C33:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 V02N0101 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 E3_H06W0303 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0601 N3_V06S0303 arc: A1 H00R0000 arc: A5 Q5 arc: A6 H02W0701 arc: A7 N1_V02S0301 arc: B0 N1_V02S0301 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: B4 N1_V02S0501 arc: B6 H02W0301 arc: B7 V02S0701 arc: C0 V02N0401 arc: C2 H00R0100 arc: C3 N1_V01N0001 arc: C4 H02W0601 arc: C5 V02S0001 arc: C6 F4 arc: C7 S1_V02N0201 arc: CE0 W1_H02E0101 arc: CE1 V02S0201 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 N1_V02S0601 arc: D5 H01W0000 arc: D6 N1_V02S0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: H00R0100 Q7 arc: H01W0000 Q0 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M3 H02E0201 arc: M4 V00B0000 arc: M5 H02W0001 arc: M6 H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V02N0101 F3 arc: N1_V02N0201 F0 arc: N1_V02N0401 F6 arc: N3_V06N0303 F6 arc: S1_V02S0201 F0 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: S3_V06S0003 F0 arc: S3_V06S0203 F7 arc: V01S0000 F1 arc: V01S0100 F0 arc: W1_H02W0001 F2 arc: W1_H02W0701 F7 arc: W3_H06W0003 F0 word: SLICEA.K1.INIT 1100110010101010 word: SLICEC.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111110011000000 word: SLICED.K0.INIT 1001011001101001 word: SLICED.K1.INIT 1000111110001111 word: SLICEA.K0.INIT 1100111100001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R26C34:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 H01E0101 arc: H00L0000 V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 E1_H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N1_V01S0000 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0201 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 N1_V01S0000 arc: A0 N1_V02S0701 arc: A1 V02S0501 arc: A2 H02E0701 arc: A3 E1_H01E0001 arc: A4 E1_H02W0701 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 N1_V02S0101 arc: B0 V01N0001 arc: B1 V02N0301 arc: B2 H00R0000 arc: B3 N1_V02S0101 arc: B4 V01S0000 arc: B5 V01S0000 arc: B7 W1_H02E0301 arc: C0 V02S0401 arc: C1 N1_V02S0401 arc: C2 H02W0401 arc: C3 W1_H02E0401 arc: C4 E1_H01E0101 arc: C5 E1_H02W0601 arc: C6 Q6 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 F0 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D6 E1_H02W0001 arc: D7 F0 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M0 H01E0001 arc: M1 H00L0000 arc: M3 H00L0100 arc: M4 E1_H02W0401 arc: M5 H00L0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N3_V06N0003 F3 arc: N3_V06N0203 F7 arc: V00T0000 F2 arc: V01S0000 Q3 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 1111000010101010 word: SLICEC.K0.INIT 1110010000000000 word: SLICEC.K1.INIT 1010110011111111 word: SLICEA.K0.INIT 1001000001100000 word: SLICEA.K1.INIT 1110101110111110 word: SLICEB.K0.INIT 1001011001101001 word: SLICEB.K1.INIT 1111100110010000 word: SLICED.K1.INIT 1001011001101001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R26C35:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0100 V02S0101 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 H06W0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0401 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V02S0601 arc: A2 F5 arc: A4 F5 arc: A5 S1_V02N0101 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 V02N0101 arc: B1 Q1 arc: B2 V02S0301 arc: B3 N1_V02S0101 arc: B4 N1_V01S0000 arc: B5 F3 arc: B6 V02S0701 arc: B7 H02W0101 arc: C0 N1_V02S0601 arc: C1 V02S0401 arc: C2 N1_V01S0100 arc: C3 V02N0401 arc: C4 V02S0201 arc: C5 N1_V02S0201 arc: C6 V00B0100 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V01S0100 arc: D2 V02N0201 arc: D3 N1_V02S0001 arc: D4 V00B0000 arc: D5 E1_H02W0001 arc: D6 H02W0201 arc: D7 H02W0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M1 H00L0100 arc: M3 H00L0100 arc: M5 H00L0100 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: N1_V02N0001 F0 arc: N1_V02N0401 F4 arc: N3_V06N0303 F6 arc: V00B0100 Q5 arc: V00T0100 F1 arc: V01S0000 F0 arc: V01S0100 Q3 word: SLICEA.K1.INIT 1100111111000000 word: SLICED.K0.INIT 1011100000000000 word: SLICED.K1.INIT 1011100011111111 word: SLICEA.K0.INIT 1111110011000000 word: SLICEB.K1.INIT 1111110011000000 word: SLICEC.K1.INIT 1001011001101001 word: SLICEC.K0.INIT 1110110110000100 word: SLICEB.K0.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R26C36:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 H01E0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V01S0100 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 N1_V01S0100 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 V00B0000 arc: A4 N1_V02S0301 arc: A5 F7 arc: A7 H02E0501 arc: B0 N1_V02S0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H02E0301 arc: B5 V02N0701 arc: B7 W1_H02E0101 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 N1_V01N0001 arc: C4 N1_V02S0001 arc: C5 H02E0401 arc: C7 F4 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D5 V02S0401 arc: D7 H00R0100 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q7 arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 W1_H02E0601 arc: M3 H02W0201 arc: M5 H02E0001 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V02N0401 F4 arc: N3_V06N0203 F7 arc: N3_V06N0303 F5 arc: V00T0100 Q1 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1000110010000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 1110100011101000 word: SLICED.K1.INIT 1001011001101001 word: SLICEC.K1.INIT 1110110110000100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R26C37:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0103 N1_V01S0100 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 N1_V01S0100 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0701 V02N0701 arc: A0 H00L0100 arc: A1 H02E0701 arc: B0 H02E0301 arc: B1 Q1 arc: B2 N1_V02S0101 arc: B3 Q3 arc: B6 V02S0701 arc: C0 N1_V01N0001 arc: C1 H02W0401 arc: C2 H00L0000 arc: C3 H02E0601 arc: C6 Q6 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V01S0100 arc: D2 H02E0001 arc: D3 N1_V01S0000 arc: D6 H02E0001 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 H02W0601 arc: M3 H00R0100 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N3_V06N0003 F0 arc: V00T0000 F2 arc: V01S0100 Q4 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101111110001111 word: SLICEB.K1.INIT 1111110000001100 word: SLICED.K0.INIT 1100110011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R26C38:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 W1_H02E0601 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H02E0501 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H06W0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0203 E1_H01W0000 arc: A0 N1_V02S0501 arc: A1 W1_H02E0501 arc: A4 V00T0100 arc: A5 Q5 arc: A6 W1_H02E0501 arc: B0 W1_H02E0301 arc: B1 Q1 arc: B4 V00B0100 arc: B5 W1_H02E0301 arc: C0 V02S0601 arc: C1 N1_V02S0401 arc: C4 W1_H02E0401 arc: C5 V00T0100 arc: C6 Q6 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 N1_V01S0000 arc: D4 N1_V02S0601 arc: D5 N1_V02S0401 arc: D6 E1_H01W0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: LSR0 H02W0301 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M1 H00R0100 arc: M3 H02E0201 arc: M4 E1_H01E0101 arc: M5 H02E0001 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0001 F0 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0100 Q1 word: SLICED.K0.INIT 1111010110100000 word: SLICEC.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 1011100011111111 word: SLICEA.K0.INIT 1010001010000000 word: SLICEA.K1.INIT 1110111101001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R26C39:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V06S0203 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 H01E0001 arc: H00L0000 H02W0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06E0203 arc: V00B0100 N1_V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W3_H06W0303 N3_V06S0303 arc: A0 E1_H01E0001 arc: A1 H02E0701 arc: A2 V01N0101 arc: A3 V01N0101 arc: A5 Q5 arc: A6 V02S0301 arc: A7 Q7 arc: B0 V02S0301 arc: B1 Q1 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 V02S0701 arc: B5 N1_V01S0000 arc: B6 V01S0000 arc: B7 V00B0100 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 S1_V02N0001 arc: C5 V02S0001 arc: C6 V02S0201 arc: C7 V02S0001 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00L0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V02S0201 arc: D4 S1_V02N0401 arc: D6 E1_H01W0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F4 arc: E3_H06E0103 F2 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q3 arc: H01W0000 F0 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 H02W0001 arc: M2 N1_V01N0001 arc: M3 E1_H02W0201 arc: M4 H02E0401 arc: M5 H02W0001 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 arc: V01S0000 Q7 arc: V01S0100 F4 arc: W1_H02W0601 F4 word: SLICED.K0.INIT 1110000001000000 word: SLICED.K1.INIT 1111101100111011 word: SLICEC.K1.INIT 1100101011001010 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1110001011111111 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 1100111100001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R26C40:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 V06S0303 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: A0 H00L0100 arc: A1 E1_H02W0701 arc: A3 H02W0701 arc: A4 V02S0101 arc: A5 H02W0501 arc: A7 Q7 arc: B0 H00R0100 arc: B1 Q1 arc: B2 H02W0301 arc: B5 V02S0701 arc: B6 E1_H02W0101 arc: C0 E1_H02W0401 arc: C1 H00R0100 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 H02E0601 arc: C5 V02S0001 arc: C6 Q6 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 N1_V02S0601 arc: D6 H01W0000 arc: D7 E1_H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F3 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: H00R0000 F4 arc: H00R0100 Q5 arc: H01W0000 Q3 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 V00T0100 arc: M3 H02E0201 arc: M4 H02E0401 arc: M5 W1_H02E0001 arc: M6 H02W0401 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F4 arc: S1_V02S0101 F3 arc: S1_V02S0201 F2 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V00B0000 F6 arc: V00T0000 Q2 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0101 F3 arc: W1_H02W0201 F2 arc: W3_H06W0003 F3 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICED.K1.INIT 1111000010101010 word: SLICED.K0.INIT 1111110000110000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEC.K0.INIT 1010111100001111 word: SLICEB.K1.INIT 1010111100001111 word: SLICEB.K0.INIT 1100111100001111 word: SLICEC.K1.INIT 1000111110001111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 .tile R26C41:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02S0601 arc: H00L0000 V02N0201 arc: H00R0000 N1_V02S0401 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0601 H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02S0701 arc: A0 N1_V02S0501 arc: A1 N1_V02S0701 arc: A2 V02S0701 arc: A3 V02S0501 arc: A5 N1_V02S0301 arc: B0 H00R0100 arc: B1 Q1 arc: B4 V01S0000 arc: B5 H02W0301 arc: C0 H00L0100 arc: C1 H00R0100 arc: C2 E1_H02W0601 arc: C3 N1_V02S0601 arc: C4 Q4 arc: C5 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 N1_V02S0201 arc: CE2 V02S0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V02S0001 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H02W0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0101 F3 arc: E1_H02E0201 F2 arc: E1_H02E0501 F5 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H00L0000 arc: M2 H02E0601 arc: M3 H00L0000 arc: M4 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F2 arc: N1_V02N0001 Q2 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: S3_V06S0103 F2 arc: S3_V06S0303 F5 arc: V00B0000 F4 arc: V01S0000 Q3 arc: V01S0100 F3 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1010000010001000 word: SLICEA.K1.INIT 1101110111110101 word: SLICEB.K0.INIT 1010000011111111 word: SLICEB.K1.INIT 1010000011111111 word: SLICEC.K1.INIT 1011001110110011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 .tile R26C42:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02S0201 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 W3_H06E0203 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0601 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 N3_V06S0303 arc: A2 V02S0701 arc: A3 V02S0701 arc: A5 Q5 arc: B0 H01W0100 arc: B2 V02S0301 arc: B3 V02S0301 arc: B6 V01S0000 arc: C0 N1_V01N0001 arc: C2 H00L0100 arc: C3 H00L0100 arc: C5 V02S0001 arc: C6 V02S0001 arc: CE0 H02W0101 arc: CE1 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0201 arc: D5 H01W0000 arc: D6 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 Q1 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V02N0701 F5 arc: V00B0000 F6 arc: V01S0000 Q6 word: SLICEA.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111101000001010 word: SLICED.K0.INIT 1111110000001100 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1110001011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C43:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N3_V06S0003 arc: S3_V06S0003 N3_V06S0003 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 V02N0701 arc: A5 Q5 arc: C5 V00T0100 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D5 H02E0001 arc: F5 F5_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F5 arc: V00T0100 Q1 word: SLICEC.K1.INIT 1010101011110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R26C44:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 N1_V01S0000 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 H02E0201 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 E1_H01W0100 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W3_H06W0203 E1_H02W0701 arc: A1 V02S0501 arc: B1 V02S0301 arc: C1 V02S0601 arc: D1 V02S0001 arc: E1_H01E0101 F1 arc: F1 F1_SLICE word: SLICEA.K1.INIT 0011010100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R26C45:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 H02W0001 arc: N3_V06N0203 H06W0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02S0001 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0601 V06S0303 arc: A0 F5 arc: A2 W1_H02E0701 arc: A4 N1_V01S0100 arc: A5 N1_V01S0100 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H02E0101 arc: B4 H02W0101 arc: B5 V02S0701 arc: C0 F4 arc: C1 F4 arc: C2 N1_V02S0601 arc: C4 V02S0001 arc: C5 V00B0100 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 V01S0100 arc: D4 H00L0100 arc: D5 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H01W0000 Q2 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M1 E1_H02W0001 arc: M5 E1_H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: N1_V02N0101 Q1 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: S1_V02S0001 F2 arc: S1_V02S0201 F2 arc: V00B0100 Q5 arc: V01S0000 Q2 word: SLICEC.K1.INIT 0000000000011011 word: SLICEC.K0.INIT 0000001000000111 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 1011101000110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C46:PLC2 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 N3_V06S0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 N3_V06S0003 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 E1_H02W0601 arc: A0 H00L0100 arc: A2 V02S0701 arc: A3 V02S0701 arc: A4 V02N0101 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 H01W0100 arc: B3 H02E0301 arc: B4 V02N0501 arc: B5 H02W0301 arc: B6 H02E0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 V02S0401 arc: C3 V02N0601 arc: C4 V02S0001 arc: C5 V00T0000 arc: C6 V02S0001 arc: C7 N1_V02S0001 arc: CE1 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 W1_H02E0201 arc: D3 H02E0001 arc: D4 V02S0401 arc: D5 F2 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 F3 arc: H01W0000 Q2 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 H02W0601 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: V00B0000 F4 arc: V01S0000 Q7 arc: V01S0100 Q2 word: SLICED.K0.INIT 0000000001000111 word: SLICEB.K1.INIT 0001110100000000 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K1.INIT 0101000001011111 word: SLICEC.K0.INIT 0010001000110000 word: SLICEB.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 0000111100001011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C47:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 E1_H02W0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 N3_V06S0303 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 E3_H06W0103 arc: A0 E1_H02W0701 arc: A1 F5 arc: A5 N1_V01N0101 arc: A6 V02S0101 arc: B0 H02W0301 arc: B1 V01N0001 arc: B2 H00R0000 arc: B5 H02E0301 arc: B6 E1_H02W0101 arc: C0 N1_V01S0100 arc: C1 H02E0401 arc: C2 V02S0601 arc: C5 H01E0001 arc: C6 N1_V02S0001 arc: D0 V00B0100 arc: D1 V02N0201 arc: D2 F0 arc: D5 V00B0000 arc: D6 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: N1_V02N0601 F6 arc: N3_V06N0103 F1 word: SLICEC.K1.INIT 0010001000001010 word: SLICEA.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1010000011000000 word: SLICEB.K0.INIT 0000000000000011 word: SLICED.K0.INIT 1100000011100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R26C48:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0203 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N1_V01S0100 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0701 arc: A1 V02N0501 arc: A2 V02S0501 arc: A3 E1_H01E0001 arc: A4 V02S0101 arc: A5 Q5 arc: A6 F5 arc: A7 V02S0301 arc: B0 E1_H01W0100 arc: B1 H00R0100 arc: B2 H01W0100 arc: B3 S1_V02N0301 arc: B4 V02N0501 arc: B5 V00B0100 arc: B6 F3 arc: B7 V00B0100 arc: C0 V02S0601 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 H02W0401 arc: C5 V02S0001 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 F2 arc: D2 V00T0100 arc: D3 N1_V02S0001 arc: D4 F0 arc: D5 V02S0401 arc: D6 V02N0601 arc: D7 V02S0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M1 E1_H02W0001 arc: M3 H00L0000 arc: M5 E1_H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: V00B0100 Q7 arc: V01S0000 F1 word: SLICEA.K0.INIT 0101001100000000 word: SLICED.K1.INIT 0000101000100010 word: SLICEB.K0.INIT 0000000000100111 word: SLICEC.K0.INIT 1000100010001010 word: SLICEA.K1.INIT 0101000001110000 word: SLICEC.K1.INIT 1010110000000000 word: SLICEB.K1.INIT 0000000010111000 word: SLICED.K0.INIT 0001000100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C49:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V01N0101 arc: H00R0000 V02S0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0100 H02W0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: W3_H06W0203 N3_V06S0203 arc: A0 H02E0501 arc: A1 F5 arc: A2 F7 arc: A4 V00T0000 arc: A5 V02N0301 arc: A6 H00L0000 arc: A7 Q7 arc: B0 H02W0301 arc: B1 E1_H01W0100 arc: B2 F3 arc: B3 Q3 arc: B4 E1_H02W0301 arc: B5 V02N0701 arc: B6 V02S0701 arc: C0 N1_V02S0401 arc: C1 V02N0601 arc: C2 H02W0401 arc: C3 H00R0100 arc: C4 E1_H02W0401 arc: C5 V02N0001 arc: C6 V00B0100 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00T0100 arc: D2 N1_V02S0201 arc: D3 V02S0001 arc: D4 H01W0000 arc: D5 V01N0001 arc: D6 V01N0001 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 Q5 arc: H01W0000 Q7 arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M3 H02W0201 arc: M5 H02W0001 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0201 F0 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: W1_H02W0101 F1 arc: W1_H02W0401 F4 arc: W1_H02W0601 F6 arc: W1_H02W0701 Q5 word: SLICEC.K0.INIT 0001000000010011 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000001100000101 word: SLICEA.K0.INIT 1111001000100010 word: SLICEC.K1.INIT 1010110000000000 word: SLICED.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 1100110011001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C50:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 H02E0401 arc: V00T0000 H02E0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0101 arc: W3_H06W0203 N1_V01S0000 arc: A0 H00L0100 arc: A1 H00R0000 arc: A2 V02N0501 arc: A3 E1_H01E0001 arc: A4 V00T0100 arc: A5 N1_V01N0101 arc: A6 V00T0100 arc: A7 H00L0000 arc: B0 V02S0101 arc: B1 F3 arc: B2 V02N0101 arc: B3 H02E0301 arc: B4 H02E0301 arc: B5 H02W0301 arc: B6 H02W0301 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 F4 arc: C3 S1_V02N0601 arc: C4 Q4 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0001 arc: D2 N1_V02S0201 arc: D3 V00B0100 arc: D4 V01N0001 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 H01W0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q4 arc: H01W0100 F1 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M3 H02E0201 arc: M4 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0201 F2 arc: S1_V02S0501 F5 arc: V00B0100 Q7 arc: V00T0100 Q3 arc: V01S0000 F6 arc: V01S0100 F0 word: SLICEC.K1.INIT 0000001100010001 word: SLICED.K0.INIT 0000110001000100 word: SLICED.K1.INIT 0001000010110000 word: SLICEA.K0.INIT 0000000001010011 word: SLICEB.K0.INIT 0011001101010101 word: SLICEB.K1.INIT 0000111000000010 word: SLICEC.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 0000000011111101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C51:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: H00R0100 H02W0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 V02S0001 arc: V00T0000 V02S0601 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 V06S0003 arc: A2 F5 arc: A3 V00T0000 arc: A5 W1_H02E0501 arc: A6 N1_V01N0101 arc: A7 N1_V01N0101 arc: B3 N1_V02S0101 arc: B5 V00B0100 arc: B6 V00B0000 arc: B7 V00B0000 arc: C2 E1_H02W0401 arc: C3 W1_H02E0601 arc: C5 H02E0601 arc: C6 V02S0201 arc: C7 N1_V02S0001 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V01S0100 arc: D3 H02E0001 arc: D5 N1_V02S0601 arc: D6 V02S0601 arc: D7 H01W0000 arc: E1_H01E0001 F2 arc: E1_H02E0501 F7 arc: E1_H02E0601 F6 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR0 H02W0501 arc: M7 H00R0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: V00B0100 Q7 arc: V01S0100 F3 word: SLICEC.K1.INIT 1101000010000000 word: SLICEB.K1.INIT 0000000010101100 word: SLICEB.K0.INIT 0000000000000101 word: SLICED.K1.INIT 0000010010001100 word: SLICED.K0.INIT 0000000100100011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C52:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0701 N1_V01S0100 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 N1_V01S0100 arc: A4 N1_V02S0101 arc: A5 V02S0101 arc: A6 N1_V02S0101 arc: A7 Q7 arc: B0 N1_V02S0101 arc: B1 N1_V02S0101 arc: B2 E1_H01W0100 arc: B3 N1_V02S0101 arc: C0 E1_H01W0000 arc: C1 H00R0100 arc: C2 H00L0000 arc: C3 H00R0100 arc: C4 V02S0201 arc: C5 N1_V02S0201 arc: C6 V02S0201 arc: C7 V02S0201 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 E1_H01W0100 arc: D5 H00R0100 arc: D6 E1_H01W0100 arc: D7 V00B0000 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H00R0100 Q7 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M5 E1_H02W0001 arc: M6 V00B0100 arc: M7 H00R0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F3 arc: N1_V02N0101 F3 arc: N1_V02N0301 F3 arc: S1_V02S0701 Q7 word: SLICEA.K0.INIT 0000001100000000 word: SLICEA.K1.INIT 0000110000000000 word: SLICEB.K0.INIT 0000001100000000 word: SLICEB.K1.INIT 0011111100000000 word: SLICEC.K0.INIT 1010000011110000 word: SLICEC.K1.INIT 0000000010100000 word: SLICED.K0.INIT 1010000011110000 word: SLICED.K1.INIT 0101000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C53:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0701 V06S0203 arc: H00L0000 H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0501 N3_V06S0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0100 H02W0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0401 V06S0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A3 H01E0001 arc: A4 F5 arc: A5 Q5 arc: A6 N1_V02S0101 arc: A7 N1_V02S0101 arc: B0 H02W0301 arc: B3 Q3 arc: B4 F3 arc: B5 W1_H02E0301 arc: B6 N1_V01S0000 arc: B7 V00B0000 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C3 V02S0401 arc: C4 V02N0001 arc: C5 V00T0100 arc: C6 E1_H02W0401 arc: C7 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 N1_V02S0201 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D3 W1_H02E0001 arc: D5 V02S0401 arc: D6 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 H00R0000 arc: M3 H02E0201 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: V00B0000 F4 arc: V00T0000 F0 arc: V00T0100 Q1 arc: W1_H02W0101 Q3 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K1.INIT 0101001100000000 word: SLICEC.K1.INIT 0001000100000011 word: SLICEC.K0.INIT 0001000000010000 word: SLICED.K0.INIT 1010101010101000 word: SLICED.K1.INIT 0000000010101000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C54:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 W1_H02E0301 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N1_V01S0100 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V06S0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0501 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A3 V02S0701 arc: A4 H02E0701 arc: A5 Q5 arc: A6 E1_H01W0000 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B2 N1_V02S0301 arc: B3 Q3 arc: B4 H00L0000 arc: B5 V02S0701 arc: B6 V02S0501 arc: B7 V00B0100 arc: C0 E1_H02W0401 arc: C1 N1_V02S0601 arc: C2 E1_H02W0401 arc: C3 V02S0401 arc: C4 V02N0001 arc: C5 V02S0001 arc: C6 F4 arc: C7 V00T0000 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V01S0100 arc: D2 V01S0100 arc: D3 H02E0201 arc: D4 F2 arc: D5 V02N0601 arc: D6 W1_H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 V00T0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V02N0301 F1 arc: N3_V06N0303 F6 arc: V00B0100 Q5 arc: V01S0000 Q7 arc: V01S0100 Q3 arc: W1_H02W0301 F3 arc: W1_H02W0701 F5 word: SLICED.K1.INIT 1010000011000000 word: SLICEA.K1.INIT 0000110100001000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEB.K0.INIT 0000101100001000 word: SLICEC.K0.INIT 1111000011010000 word: SLICED.K0.INIT 1000100011001000 word: SLICEC.K1.INIT 0001000011010000 word: SLICEB.K1.INIT 0000000100001011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C55:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V06S0203 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 H01E0101 arc: A0 E1_H01E0001 arc: A1 F5 arc: A2 V00T0000 arc: A3 V02S0701 arc: A5 V00T0100 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 V02N0101 arc: B2 V02S0101 arc: B3 V02S0101 arc: B5 V02S0701 arc: B6 N1_V02S0501 arc: B7 V01S0000 arc: C0 H02W0401 arc: C1 H00L0000 arc: C2 N1_V01S0100 arc: C3 N1_V01N0001 arc: C5 H02W0401 arc: C6 E1_H01E0101 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H02W0001 arc: D2 V00B0100 arc: D3 V00B0100 arc: D5 V02S0401 arc: D6 F2 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F3 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 F1 arc: LSR0 V00B0000 arc: LSR1 H02W0301 arc: M1 W1_H02E0001 arc: M2 H02E0601 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F7 arc: V00T0000 Q2 arc: W1_H02W0401 F6 arc: W1_H02W0601 F6 word: SLICED.K1.INIT 0001110100011101 word: SLICEC.K1.INIT 0000110100001000 word: SLICEA.K0.INIT 1110000000100000 word: SLICEA.K1.INIT 1100110011001000 word: SLICEB.K1.INIT 0000000001000111 word: SLICEB.K0.INIT 0001110100000000 word: SLICED.K0.INIT 0000000000000011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C56:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02N0501 arc: H00L0100 V02S0101 arc: H00R0000 W1_H02E0401 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0601 arc: V00T0100 H02W0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W3_H06W0003 N3_V06S0003 arc: A0 S1_V02N0701 arc: A2 H00L0100 arc: A3 H02W0701 arc: A5 V02N0101 arc: A6 F5 arc: A7 Q7 arc: B0 H02W0101 arc: B2 H02E0101 arc: B3 H01W0100 arc: B5 V00B0100 arc: B6 F3 arc: B7 V02S0701 arc: C0 V02N0401 arc: C2 H00R0100 arc: C3 V02S0401 arc: C5 V00T0100 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 S1_V02N0201 arc: CE2 N1_V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D2 Q2 arc: D3 V00T0100 arc: D5 V02S0401 arc: D6 V02N0601 arc: D7 H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: E1_H02E0001 F0 arc: E1_H02E0201 F0 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 Q7 arc: H01W0000 F0 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0301 arc: M2 N1_V01N0001 arc: M5 V01S0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 F2 arc: N1_V02N0501 Q5 arc: V00B0100 Q5 arc: V01S0000 F0 arc: V01S0100 Q0 arc: W1_H02W0201 F0 arc: W1_H02W0701 Q5 word: SLICED.K1.INIT 0001110100000000 word: SLICEB.K0.INIT 1100100001000000 word: SLICEA.K0.INIT 1000111110001000 word: SLICEB.K1.INIT 1010000011000000 word: SLICEC.K1.INIT 0000000010101100 word: SLICED.K0.INIT 0000000000010001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C57:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02N0701 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: H00R0100 H02E0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 H06W0203 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 H02W0601 arc: V00T0000 V02S0401 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 V01N0001 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: A4 N1_V01N0101 arc: A6 H02W0501 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B2 N1_V02S0101 arc: B3 N1_V02S0301 arc: B4 H02W0101 arc: B6 V00T0000 arc: B7 H02W0101 arc: C0 F4 arc: C1 E1_H01W0000 arc: C2 H00L0100 arc: C3 V02N0401 arc: C4 Q4 arc: C6 S1_V02N0201 arc: C7 V00T0000 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 Q2 arc: D3 V01S0100 arc: D4 H02W0001 arc: D6 H01W0000 arc: D7 H02W0001 arc: E1_H01E0001 Q4 arc: E1_H02E0101 F3 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 F0 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M2 W1_H02E0601 arc: M4 W1_H02E0401 arc: M7 H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q2 arc: N1_V02N0701 Q7 arc: V00B0100 F7 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000000100110001 word: SLICED.K1.INIT 1100000010001000 word: SLICEC.K0.INIT 0010001000110000 word: SLICEA.K0.INIT 1111101011011000 word: SLICEA.K1.INIT 1111110111111101 word: SLICEB.K1.INIT 0000111000000010 word: SLICED.K0.INIT 1000101010000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C58:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 N1_V02S0101 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V02S0701 arc: A1 H00L0100 arc: A3 V02N0501 arc: A7 Q7 arc: B1 V02S0301 arc: B3 H02E0301 arc: B7 V01S0000 arc: C1 N1_V01S0100 arc: C3 N1_V01S0100 arc: C7 N1_V02S0201 arc: CE0 H02W0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D1 N1_V01S0000 arc: D3 N1_V01S0000 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q0 arc: E1_H02E0701 Q7 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F7 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: V01S0000 Q0 arc: W1_H02W0301 F1 word: SLICED.K1.INIT 1100000010100000 word: SLICEA.K1.INIT 0101010000010000 word: SLICEB.K1.INIT 0101010000010000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C59:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: H00L0000 V02N0001 arc: H00R0100 H02E0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02N0601 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: A0 V02S0701 arc: A2 V00B0000 arc: A3 H01E0001 arc: A5 H02E0701 arc: A7 H02E0701 arc: B0 H00R0100 arc: B2 W1_H02E0101 arc: B3 H01W0100 arc: B5 H01E0101 arc: B7 H01E0101 arc: C0 N1_V01S0100 arc: C2 N1_V02S0401 arc: C3 H00L0000 arc: C5 V00B0100 arc: C7 E1_H02W0401 arc: D0 F2 arc: D2 V00T0100 arc: D3 V02S0201 arc: D5 V02S0401 arc: D7 H02E0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M0 V00T0000 arc: N1_V01N0001 F5 arc: N3_V06N0003 F0 arc: V00T0100 F3 word: SLICEC.K1.INIT 0011000001010000 word: SLICED.K1.INIT 1100101000000000 word: SLICEB.K1.INIT 0000111000001111 word: SLICEB.K0.INIT 1111111000000000 word: SLICEA.K0.INIT 0101010111011111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R26C60:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0203 E3_H06W0203 arc: V01S0100 N3_V06S0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A5 Q5 arc: C5 V02N0001 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D5 H00R0100 arc: F5 F5_SLICE arc: H00R0100 Q7 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0501 F5 word: SLICEC.K1.INIT 1111101000001010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R26C61:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 E3_H06W0003 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H06W0303 arc: V00T0100 V02N0701 arc: W1_H02W0401 V06S0203 arc: W1_H02W0701 V06S0203 arc: W3_H06W0203 V06S0203 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 E1_H01E0001 arc: A3 E1_H02W0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: B0 H01W0100 arc: B1 Q1 arc: B2 V02N0101 arc: B3 Q3 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 E1_H01W0000 arc: C3 H02W0601 arc: C4 Q4 arc: C5 V02N0001 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H02E0201 arc: D2 V02N0001 arc: D3 V02N0201 arc: D4 H02W0201 arc: D5 E1_H01W0100 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q6 arc: N3_V06N0003 F0 arc: V00B0000 F4 arc: V00B0100 F5 arc: V01S0000 Q7 word: SLICEC.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEC.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1010110011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C62:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V06S0203 arc: H00L0000 S1_V02N0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H02W0201 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0601 V01N0001 arc: W3_H06W0103 V01N0101 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 H00L0100 arc: A3 E1_H01E0001 arc: A4 V02N0101 arc: A5 Q5 arc: A6 E1_H02W0501 arc: A7 S1_V02N0101 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 V02N0301 arc: B3 Q3 arc: B4 W1_H02E0101 arc: B6 H02E0101 arc: B7 H02E0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 N1_V01N0001 arc: C3 V02N0401 arc: C4 H02W0401 arc: C5 V00T0100 arc: C6 W1_H02E0401 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 W1_H02E0201 arc: D3 V02N0001 arc: D4 H02W0201 arc: D5 V01N0001 arc: D6 H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q6 arc: E1_H02E0201 F0 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0000 Q6 arc: H01W0100 Q4 arc: M0 E1_H02W0601 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F4 arc: N1_V02N0001 F2 arc: N1_V02N0701 F5 arc: S1_V02S0401 F4 arc: S1_V02S0501 F7 arc: S1_V02S0601 F6 arc: S3_V06S0303 F6 arc: V00T0100 Q1 arc: V01S0000 F7 arc: W1_H02W0401 F6 word: SLICED.K1.INIT 0001000000000000 word: SLICED.K0.INIT 0000000000100000 word: SLICEC.K0.INIT 0000000001000000 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1010111111001111 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1001011000000000 word: SLICEA.K1.INIT 1111111110010110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R26C63:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V06S0303 arc: H00L0100 H02W0101 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 V01N0001 arc: V00B0000 H02E0601 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 H01E0101 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 H02E0501 arc: A4 V02S0301 arc: A5 Q5 arc: A7 H02W0701 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H02E0101 arc: B3 Q3 arc: B4 W1_H02E0101 arc: B7 N1_V02S0701 arc: C0 N1_V02S0401 arc: C1 N1_V02S0401 arc: C2 H02W0401 arc: C3 H00R0100 arc: C4 S1_V02N0201 arc: C5 V02N0001 arc: CE0 V02N0201 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 N1_V01S0000 arc: D2 V00B0100 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 H01W0000 arc: D7 H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00R0100 Q7 arc: H01W0000 Q0 arc: M0 V00T0000 arc: M3 H00L0100 arc: M5 E1_H02W0001 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F1 arc: N1_V02N0601 F4 arc: V00B0100 F7 arc: V01S0100 F4 arc: W1_H02W0501 F5 word: SLICEC.K0.INIT 0000001000000000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K1.INIT 1010111110100000 word: SLICED.K1.INIT 1110111010001000 word: SLICEB.K0.INIT 1001011001101001 word: SLICEA.K1.INIT 1111100110010000 word: SLICEA.K0.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R26C64:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0601 V06S0303 arc: E3_H06E0103 V06S0103 arc: H00L0000 E1_H02W0001 arc: H00R0100 V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 E3_H06W0303 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0701 arc: A1 W1_H02E0701 arc: A2 V02N0501 arc: A3 H00L0100 arc: A4 W1_H02E0501 arc: A5 N1_V02S0301 arc: A6 F5 arc: A7 F5 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B2 H00R0000 arc: B3 V02N0301 arc: B5 V02S0501 arc: B6 N1_V02S0701 arc: B7 N1_V02S0701 arc: C0 W1_H02E0401 arc: C1 H02W0401 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C4 H02W0601 arc: C5 W1_H02E0401 arc: C6 H02W0401 arc: C7 H02W0401 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02S0601 arc: D5 V00B0000 arc: D6 W1_H02E0201 arc: D7 W1_H02E0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: M0 V00B0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q4 arc: N1_V02N0201 F2 arc: N3_V06N0103 F2 arc: V00B0000 F4 word: SLICEB.K0.INIT 1110010000000000 word: SLICEB.K1.INIT 1011100011111111 word: SLICEC.K0.INIT 1111101010100000 word: SLICEC.K1.INIT 1001011001101001 word: SLICEA.K0.INIT 1000001000101000 word: SLICEA.K1.INIT 1111100111110110 word: SLICED.K0.INIT 1110110110000100 word: SLICED.K1.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R26C65:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 E1_H01W0100 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 V01N0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 V06N0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H01E0001 arc: A1 E1_H02W0701 arc: A2 V02S0501 arc: A3 W1_H02E0501 arc: A4 E1_H02W0501 arc: A5 E1_H02W0501 arc: A6 V00T0100 arc: B0 H02W0301 arc: B1 V00T0000 arc: B2 H00R0100 arc: B3 E1_H02W0301 arc: B4 V02S0701 arc: B5 V02S0701 arc: B6 F3 arc: B7 H02W0101 arc: C0 H00L0100 arc: C1 N1_V02S0601 arc: C2 W1_H02E0601 arc: C3 N1_V01S0100 arc: C4 W1_H02E0601 arc: C5 W1_H02E0601 arc: C6 H01E0001 arc: C7 W1_H02E0401 arc: D0 V02S0201 arc: D1 N1_V02S0001 arc: D2 V00B0100 arc: D3 W1_H02E0001 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: D6 V02S0601 arc: D7 V02S0401 arc: E1_H01E0101 F7 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: M4 E1_H01E0101 arc: N1_V01N0101 F1 arc: N1_V02N0001 F2 arc: N3_V06N0003 F0 arc: N3_V06N0303 F6 arc: V00B0100 F7 arc: V00T0000 F2 word: SLICED.K1.INIT 1111110011000000 word: SLICEB.K1.INIT 1001011001101001 word: SLICEB.K0.INIT 1001011001101001 word: SLICEC.K0.INIT 1001011000000000 word: SLICEC.K1.INIT 1111111110010110 word: SLICED.K0.INIT 1111100110010000 word: SLICEA.K0.INIT 1001011001101001 word: SLICEA.K1.INIT 1001011001101001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R26C66:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0303 H06W0303 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0100 arc: A1 S1_V02N0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 H02E0501 arc: A6 V02S0301 arc: A7 V02S0301 arc: B0 V02N0301 arc: B1 Q1 arc: B2 V02N0101 arc: B3 Q3 arc: B6 V02N0701 arc: B7 V02N0501 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 H02E0601 arc: C6 V02S0001 arc: C7 W1_H02E0601 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0001 arc: D2 V00T0100 arc: D3 V02N0201 arc: D4 H00R0100 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F5D_SLICE arc: H00L0100 Q1 arc: H01W0100 Q5 arc: M0 E1_H02W0601 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M3 E1_H02W0201 arc: M5 H02E0001 arc: M6 V00B0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: V00B0000 F4 arc: V00T0100 Q3 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101110111110101 word: SLICEB.K0.INIT 1000110010000000 word: SLICEB.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1111101010100000 word: SLICED.K0.INIT 1000010001001000 word: SLICED.K1.INIT 1110110111011110 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R26C67:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V06N0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0401 N1_V01S0000 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H02W0601 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 H02E0501 arc: A3 H02W0701 arc: A4 H02W0501 arc: A5 V02S0101 arc: A7 N1_V02S0101 arc: B0 H02W0301 arc: B1 Q1 arc: B2 V02S0301 arc: B3 N1_V02S0101 arc: B4 H00R0000 arc: B5 V02N0701 arc: B6 V01S0000 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 V02S0601 arc: C3 W1_H02E0401 arc: C4 H02E0401 arc: C5 E1_H02W0401 arc: C6 Q6 arc: C7 W1_H02E0401 arc: CE0 W1_H02E0101 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 H01E0101 arc: D3 F2 arc: D4 H02E0201 arc: D5 V02S0401 arc: D6 V02N0601 arc: D7 F2 arc: E1_H02E0401 F4 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M4 V00T0100 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F3 arc: N1_V02N0501 F7 arc: V00B0000 F6 arc: V01S0000 Q5 arc: W3_H06W0003 F0 word: SLICED.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K0.INIT 1001011001101001 word: SLICEC.K0.INIT 1010010001000000 word: SLICEC.K1.INIT 1111101111100110 word: SLICEB.K1.INIT 1110100011010100 word: SLICED.K1.INIT 1001011001101001 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R26C68:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 E1_H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 E1_H02W0301 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0301 E3_H06W0003 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 N3_V06S0303 arc: A0 V02S0501 arc: A1 S1_V02N0701 arc: A2 H00L0100 arc: A3 V02N0701 arc: A4 V02N0301 arc: A5 Q5 arc: B0 V02N0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B5 V02S0701 arc: B7 N1_V01S0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 W1_H02E0601 arc: C3 S1_V02N0401 arc: C4 Q4 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0001 arc: D3 V02N0201 arc: D4 E1_H01W0100 arc: D5 V01N0001 arc: D7 V01N0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F2 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q1 arc: V00B0000 F4 arc: V00B0100 F5 arc: V01S0100 Q6 word: SLICEC.K1.INIT 1010101011001100 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICED.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1111010110100000 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R26C69:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0701 V06S0203 arc: H00L0000 V02N0001 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02E0301 arc: V00B0000 N1_V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02N0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0303 V01N0101 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 N1_V02S0701 arc: A3 N1_V02S0701 arc: A5 N1_V02S0101 arc: A6 F7 arc: A7 V02S0301 arc: B0 V02N0301 arc: B1 Q1 arc: B2 V02S0101 arc: B3 V02S0301 arc: B4 V01S0000 arc: B5 H02W0101 arc: B6 H02W0101 arc: B7 N1_V02S0701 arc: C0 H00L0100 arc: C1 H02E0401 arc: C2 N1_V02S0601 arc: C3 E1_H01W0000 arc: C4 Q4 arc: C5 W1_H02E0401 arc: C6 W1_H02E0601 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 H02W0201 arc: D3 V02S0201 arc: D4 H02E0201 arc: D5 H01W0000 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 F7 arc: H01W0100 Q5 arc: M0 H01E0001 arc: M1 H02E0001 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 H02W0001 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N1_V02N0601 F6 arc: S1_V02S0501 Q7 arc: S1_V02S0601 F4 arc: S1_V02S0701 Q7 arc: V01S0000 Q3 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1100110011110000 word: SLICED.K0.INIT 1001011001101001 word: SLICEB.K0.INIT 1001100001000000 word: SLICEB.K1.INIT 1111110111011010 word: SLICED.K1.INIT 1100011001100011 word: SLICEC.K1.INIT 1110100010110010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R26C70:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E3_H06E0103 V06N0103 arc: H00L0000 S1_V02N0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02W0201 arc: S3_V06S0003 H06E0003 arc: V00B0100 V02S0101 arc: V00T0100 W1_H02E0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0103 V06N0103 arc: W3_H06W0303 E1_H02W0501 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 W1_H02E0701 arc: A3 W1_H02E0701 arc: A4 F5 arc: A5 W1_H02E0701 arc: A6 F5 arc: A7 S1_V02N0301 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 V01S0000 arc: B5 E1_H02W0301 arc: B6 V01S0000 arc: B7 S1_V02N0501 arc: C0 W1_H02E0401 arc: C1 W1_H02E0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 N1_V02S0201 arc: C5 V02S0201 arc: C6 N1_V02S0201 arc: C7 V00T0100 arc: CE0 H02W0101 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 F2 arc: D5 H02E0201 arc: D6 F2 arc: D7 V02N0401 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F7 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q1 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 H02W0601 arc: M3 H00L0000 arc: M5 H02W0001 arc: M6 H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q5 arc: N1_V02N0501 Q5 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: N3_V06N0303 F6 arc: W1_H02W0501 F7 word: SLICED.K1.INIT 0000010000000000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEB.K0.INIT 1010010001000000 word: SLICEB.K1.INIT 1111110111011010 word: SLICEC.K1.INIT 1100011001100011 word: SLICED.K0.INIT 1111100110010000 word: SLICEC.K0.INIT 1001011001101001 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R26C71:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S1_V02N0401 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 V01N0001 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 V01N0101 arc: A3 V01N0101 arc: A4 E1_H02W0501 arc: A6 E1_H01W0000 arc: A7 H02W0701 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H02E0301 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 H02E0401 arc: C6 H01E0001 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 N1_V02S0001 arc: D3 V02N0001 arc: D4 E1_H02W0201 arc: D6 V01N0001 arc: D7 V01N0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F4 arc: E3_H06E0003 F0 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 Q7 arc: H01W0000 F4 arc: H01W0100 Q3 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M3 H00L0100 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q5 arc: N1_V02N0401 F6 arc: N1_V02N0501 F7 arc: N1_V02N0601 Q4 arc: V01S0000 F4 word: SLICEC.K0.INIT 0010000000000000 word: SLICED.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICEB.K0.INIT 1010000010001000 word: SLICEB.K1.INIT 1111010111011101 word: SLICED.K0.INIT 1111000010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R26C72:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: H00L0000 W1_H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 V01N0101 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A6 E1_H01W0000 arc: A7 Q7 arc: B0 V02N0101 arc: B1 Q1 arc: B2 E1_H02W0301 arc: B3 Q3 arc: B4 V02N0701 arc: B5 E1_H02W0101 arc: B6 V02S0501 arc: C0 N1_V01N0001 arc: C1 H02E0601 arc: C2 E1_H02W0601 arc: C3 V02N0601 arc: C4 Q4 arc: C5 E1_H02W0601 arc: C6 V00T0000 arc: C7 H02E0401 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0201 arc: D2 E1_H02W0201 arc: D3 H02E0001 arc: D4 E1_H02W0001 arc: D5 E1_H02W0201 arc: D6 V02N0401 arc: D7 V01N0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F6 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 E1_H02W0401 arc: M5 W1_H02E0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F5 arc: N1_V02N0401 F6 arc: N3_V06N0303 F5 arc: V00B0100 F7 arc: W1_H02W0401 F4 arc: W1_H02W0501 F5 arc: W1_H02W0701 Q5 arc: W3_H06W0103 F2 word: SLICEC.K1.INIT 1100000000000000 word: SLICEB.K0.INIT 0000000000110000 word: SLICED.K0.INIT 0000100000000000 word: SLICED.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEC.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000011001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R26C73:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0301 W1_H02E0301 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0201 H06E0103 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 H06W0003 arc: S3_V06S0003 W3_H06E0003 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 H01E0001 arc: W3_H06W0303 E1_H01W0100 arc: B3 H02W0101 arc: C0 S1_V02N0401 arc: C3 H02W0601 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D3 H02W0201 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: H01W0000 F3 arc: M3 H00R0000 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0001 Q0 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q4 arc: S1_V02S0201 Q0 word: SLICEB.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C74:PLC2 arc: E1_H02E0201 H01E0001 arc: E3_H06E0103 N3_V06S0103 arc: E3_H06E0203 H01E0001 arc: H00R0100 E1_H02W0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 E1_H01W0000 arc: A0 H02W0701 arc: B0 V02N0301 arc: C0 H00L0000 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: H00L0000 Q0 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 Q0 arc: N3_V06N0003 Q0 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 0000111000001010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C75:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 N3_V06S0303 arc: H00R0100 H02W0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 H06W0203 arc: V00T0000 S1_V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 V02N0701 arc: A0 V02N0701 arc: A6 V02N0301 arc: A7 V02N0301 arc: B0 V02N0301 arc: B6 V02N0701 arc: B7 V02N0701 arc: C0 V02N0601 arc: C6 E1_H02W0401 arc: C7 V01N0101 arc: CE0 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D6 V01N0001 arc: D7 H02W0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q0 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N3_V06N0003 Q0 arc: N3_V06N0203 Q7 arc: N3_V06N0303 Q6 arc: S1_V02S0701 Q7 arc: V01S0000 Q6 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1110110000000000 word: SLICED.K1.INIT 1110000011000000 word: SLICEA.K0.INIT 1110000010100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C76:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H02W0501 arc: V00B0000 H02W0601 arc: V00T0000 W1_H02E0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W3_H06W0003 V06S0003 arc: A0 V01N0101 arc: A1 V02N0501 arc: A3 V02S0701 arc: A5 H02E0701 arc: B0 V00B0000 arc: B1 V00B0000 arc: B3 V02N0101 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C3 N1_V01S0100 arc: C5 V02S0201 arc: CE2 V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D3 V01S0100 arc: D5 V02N0401 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M2 H02E0601 arc: M5 V01S0000 arc: M7 E1_H01W0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0001 F0 arc: S1_V02S0701 F5 arc: V00B0100 Q7 arc: V01S0100 Q5 arc: W1_H02W0501 F5 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000100000 word: SLICEC.K1.INIT 1111010100000000 word: SLICEA.K0.INIT 0101000001011100 word: SLICEA.K1.INIT 0101111101011100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C77:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N3_V06S0303 arc: S3_V06S0003 E1_H01W0000 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0601 arc: V00T0000 E1_H02W0001 arc: V00T0100 E1_H02W0301 arc: W1_H02W0401 V06S0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0701 arc: B0 H01W0100 arc: C0 N1_V01S0100 arc: CE0 H00R0000 arc: CE2 V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: H01W0000 Q6 arc: H01W0100 Q1 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H00R0100 arc: M4 H02E0401 arc: M6 H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V01S0000 F0 arc: W1_H02W0601 Q4 word: SLICEA.K0.INIT 0000000000000001 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C78:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02E0001 arc: H00L0100 V02S0101 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 N3_V06S0203 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: A0 V01N0101 arc: B0 E1_H02W0101 arc: B1 V01N0001 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: E1_H01E0001 Q7 arc: E1_H02E0001 Q0 arc: E1_H02E0401 Q6 arc: E1_H02E0501 Q5 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q5 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0301 arc: M3 H00L0000 arc: M5 H00R0000 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q7 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: N3_V06N0103 F1 arc: N3_V06N0203 Q7 arc: N3_V06N0303 Q6 arc: S1_V02S0301 Q3 arc: S3_V06S0303 Q6 arc: V01S0000 F1 arc: W1_H02W0401 Q6 arc: W1_H02W0501 Q7 arc: W3_H06W0203 Q7 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 0111011101110111 word: SLICEA.K1.INIT 1100110000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C79:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H02W0301 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 N3_V06S0303 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 N3_V06S0103 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 W3_H06E0303 arc: A0 V02S0501 arc: A1 V02S0501 arc: B0 H02W0301 arc: B1 H02W0301 arc: C0 H02E0601 arc: C1 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V01S0100 arc: E1_H01E0001 F0 arc: E1_H02E0301 Q3 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: H01W0000 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 H02W0601 arc: M3 H00L0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V00T0000 Q2 arc: V01S0100 Q1 word: SLICEA.K0.INIT 0010001000110000 word: SLICEA.K1.INIT 1110111111101100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C80:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 W3_H06E0203 arc: H00L0100 H02E0101 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 H02E0501 arc: S3_V06S0003 N3_V06S0303 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0100 H02E0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 N3_V06S0303 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: C2 H02E0601 arc: C3 H02E0601 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 V02N0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q6 arc: F2 F5B_SLICE arc: H01W0000 Q5 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H02E0201 arc: M5 H00L0100 arc: M6 H02E0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q1 arc: N1_V02N0001 F2 arc: V01S0100 Q7 word: SLICEB.K0.INIT 0011000000100010 word: SLICEB.K1.INIT 1111110011101110 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C81:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02S0101 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N3_V06S0203 arc: B0 E1_H02W0301 arc: B2 E1_H01W0100 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 S1_V02N0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 V00T0100 arc: M4 V00B0000 arc: M5 H02W0001 arc: M6 V00B0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0701 Q5 arc: S1_V02S0001 Q2 arc: V00B0000 Q6 arc: V01S0000 Q0 word: SLICEB.K0.INIT 0000000011001100 word: SLICEA.K0.INIT 0000000011001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C82:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0303 V06N0303 arc: H00L0000 V02N0001 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02W0501 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0201 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: A2 V01N0101 arc: A4 V00B0000 arc: B0 V02N0101 arc: B3 V01N0001 arc: B5 H00L0000 arc: B6 V02N0501 arc: B7 H01E0101 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 F6 arc: H01W0100 F7 arc: LSR0 H02W0501 arc: M3 H00R0000 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q3 arc: S1_V02S0301 F3 arc: S1_V02S0501 F5 arc: V01S0000 F4 word: SLICED.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001100 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C83:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 V02N0001 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0501 E1_H02W0501 arc: V00B0000 V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 N3_V06S0103 arc: A2 H02W0501 arc: A3 V00B0000 arc: A4 V02N0301 arc: A6 V02N0101 arc: A7 S1_V02N0301 arc: B0 V02S0301 arc: B1 V00T0000 arc: B5 H00L0000 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M1 H02E0001 arc: M3 H00R0000 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F0 arc: N1_V02N0301 Q3 arc: N1_V02N0701 Q5 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: V01S0000 F6 arc: V01S0100 F7 arc: W1_H02W0301 F1 word: SLICED.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEA.K0.INIT 1100110011000000 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C84:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0103 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 V01N0001 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V02N0701 arc: A4 V02S0301 arc: C2 H02E0601 arc: C4 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: E1_H01E0001 Q0 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q0 arc: S1_V02S0601 Q4 arc: V00T0000 Q2 word: SLICEA.K1.INIT 0000000000001110 word: SLICEA.K0.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEC.K0.INIT 1010000010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.D0MUX 1 .tile R26C85:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V01N0001 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0401 W3_H06E0203 arc: V00B0100 E1_H02W0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V06S0303 arc: A0 H01E0001 arc: A2 H01E0001 arc: A4 V00B0000 arc: B0 S1_V02N0101 arc: B2 H02W0301 arc: B4 H02W0301 arc: C0 F4 arc: C2 H00L0000 arc: C4 S1_V02N0201 arc: CE0 V02N0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 H02E0001 arc: D4 H00R0100 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0000 Q0 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M2 V00T0100 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: S1_V02S0001 F2 arc: V00B0000 Q4 word: SLICEC.K0.INIT 1100100000001000 word: SLICEA.K0.INIT 1111111111111000 word: SLICEB.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1111100010001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C86:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 V01N0101 arc: S3_V06S0303 N3_V06S0203 arc: V00B0100 H02W0701 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 H01E0101 arc: A0 E1_H01E0001 arc: A2 F5 arc: A5 N1_V01N0101 arc: B0 V02N0301 arc: B2 H01W0100 arc: B5 H02E0101 arc: C0 N1_V01N0001 arc: C2 S1_V02N0601 arc: C5 V02N0201 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 V00B0100 arc: D5 H01W0000 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: H01W0000 Q5 arc: H01W0100 Q5 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M1 H00L0100 arc: M5 H00L0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q7 arc: S1_V02S0001 F0 arc: S1_V02S0301 Q1 arc: V01S0000 Q1 arc: V01S0100 Q1 word: SLICEC.K1.INIT 1110000000100000 word: SLICEB.K0.INIT 1111111111101010 word: SLICEA.K0.INIT 1111100010001000 word: SLICEA.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C87:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 N3_V06S0303 arc: H00L0000 V02S0001 arc: H00R0000 V02N0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: A0 H00L0100 arc: B0 S1_V02N0301 arc: B3 H02E0301 arc: C0 H02E0601 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D3 S1_V02N0201 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00T0100 arc: M5 V01S0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q5 arc: S1_V02S0001 F0 arc: S1_V02S0501 Q5 arc: S3_V06S0103 Q2 arc: V01S0000 Q3 word: SLICEA.K0.INIT 1111100010001000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K1.INIT 1100110000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R26C88:PLC2 arc: H00L0000 H02E0001 arc: H00R0100 W1_H02E0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 V01N0001 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0501 H02E0501 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A2 V00B0000 arc: B0 H02E0301 arc: B2 V01N0001 arc: C0 N1_V01N0001 arc: C2 V02N0401 arc: CE0 H00L0000 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D2 V01S0100 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H00R0000 Q6 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M5 H00R0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: S3_V06S0003 Q0 arc: V00B0000 Q6 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1110101011000000 word: SLICEB.K0.INIT 1111001000100010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C27:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: N3_V06N0103 H06W0103 .tile R27C28:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 N1_V02S0501 arc: N3_V06N0103 H06W0103 .tile R27C29:PLC2 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02W0101 arc: B6 H02W0301 arc: C6 Q6 arc: CE0 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D6 H01W0000 arc: F6 F6_SLICE arc: H01W0000 Q1 arc: LSR0 V00B0100 arc: LSR1 V00T0100 arc: M1 H00R0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0601 F6 word: SLICED.K0.INIT 1111001111000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R27C30:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 V02S0701 arc: H00L0100 V02S0301 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 H02W0401 arc: V00B0100 S1_V02N0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W3_H06W0103 E1_H01W0100 arc: A7 Q7 arc: B0 H01W0100 arc: C0 H00L0000 arc: C7 N1_V02S0001 arc: CE0 H00L0100 arc: CE1 V02S0201 arc: CE2 V02S0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D7 H01W0000 arc: F0 F0_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M2 V00B0000 arc: M5 H00R0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0001 F0 arc: N1_V02N0701 F7 word: SLICED.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 1111000011001100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R27C31:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 S1_V02N0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00L0100 arc: A1 H00R0000 arc: B0 V00B0000 arc: B1 Q1 arc: C0 H02W0401 arc: C1 H02W0401 arc: CE0 N1_V02S0201 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: F0 F5A_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00R0100 arc: M5 H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0701 Q5 arc: V00B0000 Q6 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C32:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02S0201 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0303 N3_V06S0303 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0401 N1_V02S0401 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 E1_H01E0001 arc: A6 V02N0101 arc: B0 N1_V02S0101 arc: B1 Q1 arc: B2 H00R0100 arc: B3 Q3 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C2 N1_V02S0401 arc: C3 N1_V02S0601 arc: C6 H02W0401 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 N1_V02S0001 arc: D2 H02W0201 arc: D3 E1_H02W0201 arc: D6 N1_V02S0401 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H00R0100 Q5 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H02E0201 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N3_V06N0003 F0 arc: V00B0000 F6 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICED.K0.INIT 1010101011110000 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1010110011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C33:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 V02N0001 arc: H00R0000 N1_V02S0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 V01N0001 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 E1_H01W0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02S0701 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 arc: A2 H00L0100 arc: A3 H00L0100 arc: B0 V00T0000 arc: B2 H00R0100 arc: B3 N1_V02S0301 arc: C0 N1_V01N0001 arc: C2 E1_H02W0401 arc: C3 H00R0100 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D2 V00B0100 arc: D3 E1_H02W0001 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M2 V00T0100 arc: M3 H02E0201 arc: M4 H02E0401 arc: M5 H00L0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N3_V06N0103 F2 arc: V00T0000 Q0 arc: V01S0100 Q4 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1110001011111111 word: SLICEA.K0.INIT 1100110011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R27C34:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 N3_V06S0103 arc: H00L0000 E1_H02W0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 N3_V06S0203 arc: V00B0100 V02S0101 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 E3_H06W0303 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A5 Q5 arc: B0 H00R0100 arc: B1 Q1 arc: C0 H00L0000 arc: C1 H00R0100 arc: C5 V00T0000 arc: CE0 H02E0101 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D5 E1_H02W0001 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H00R0100 Q7 arc: H01W0000 F0 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 H02E0601 arc: M1 H02E0001 arc: M2 V00B0100 arc: M5 W1_H02E0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0501 F5 arc: V00T0000 Q2 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEC.K1.INIT 1111000010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R27C35:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0501 E3_H06W0303 arc: H00L0100 H02E0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 E3_H06W0303 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 H02W0501 arc: A4 H02E0501 arc: A7 H02E0501 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H02E0101 arc: B4 V00B0100 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 V02S0601 arc: C4 N1_V02S0001 arc: C7 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 N1_V01S0000 arc: D4 F2 arc: D7 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0301 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0601 F4 arc: N3_V06N0003 F0 arc: N3_V06N0203 F7 arc: V01S0100 Q6 word: SLICEA.K0.INIT 1110010000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEB.K0.INIT 1001011001101001 word: SLICEC.K0.INIT 1110100010110010 word: SLICED.K1.INIT 1001011001101001 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R27C36:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02E0101 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0701 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0103 V06S0103 arc: A3 V00B0000 arc: A5 Q5 arc: A7 Q7 arc: B3 Q3 arc: C5 N1_V02S0001 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D3 N1_V02S0201 arc: D5 H01W0000 arc: D7 V02S0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q2 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M1 H00L0100 arc: M2 V00B0100 arc: M3 H00R0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: S1_V02S0501 F5 arc: V00B0000 Q6 word: SLICEC.K1.INIT 1010111110100000 word: SLICEB.K1.INIT 1100110010101010 word: SLICED.K1.INIT 1111000010101010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R27C37:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 E1_H02W0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V02S0601 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 N3_V06S0003 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V00B0000 arc: A7 Q7 arc: B0 H00R0100 arc: B1 H00R0100 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 H00L0000 arc: C7 E1_H01E0101 arc: CE0 H02W0101 arc: CE1 V02S0201 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 H02E0001 arc: D2 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q3 arc: E1_H02E0501 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H00R0100 Q5 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H02E0201 arc: M5 H00R0000 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N3_V06N0003 F0 arc: V00B0000 Q6 word: SLICEB.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C38:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 N1_V02S0101 arc: V00B0100 H02E0501 arc: V00T0000 H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0203 N1_V01S0000 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 V00B0000 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: C0 N1_V01N0001 arc: C1 V02S0401 arc: C2 V02S0401 arc: C3 V02S0401 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 H01E0001 arc: M1 H02W0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 E1_H02W0401 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: V00B0000 Q4 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1100111110101111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C39:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 V01N0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 N3_V06S0203 arc: V00B0100 V02N0301 arc: V00T0100 V02N0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N3_V06S0203 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A6 E1_H01W0000 arc: B0 V00T0000 arc: B1 Q1 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C6 Q6 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D6 V02S0401 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M3 H00R0100 arc: M5 H00R0000 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0401 F6 arc: N1_V02N0701 Q5 arc: N3_V06N0003 F0 arc: V00T0000 Q2 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1010101011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R27C40:PLC2 arc: E1_H02E0401 V06S0203 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0401 N3_V06S0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 E1_H02W0201 arc: V00B0000 H02E0401 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0303 N3_V06S0303 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: B0 E1_H02W0101 arc: B1 N1_V02S0301 arc: B3 Q3 arc: C0 H00L0100 arc: C1 H00R0100 arc: C3 N1_V01N0001 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 E1_H02W0201 arc: D3 H02E0001 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00B0000 arc: M3 H02E0201 arc: M5 H02W0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N3_V06N0003 F0 arc: V00T0100 F3 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1110001011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C41:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0501 V02S0501 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: S1_V02S0001 N3_V06S0003 arc: V00B0000 H02W0601 arc: V00B0100 V02N0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 V06S0003 arc: W3_H06W0303 V06S0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 H02W0101 arc: B1 H02W0101 arc: B3 Q3 arc: C0 H00R0100 arc: C1 H00R0100 arc: C3 N1_V01N0001 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 N1_V02S0001 arc: D3 N1_V02S0001 arc: E1_H01E0101 F0 arc: E1_H02E0401 Q6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H00R0100 Q5 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00L0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: V00T0100 F3 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1111001110111011 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C42:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0103 H01E0101 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0601 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 H06E0003 arc: N3_V06N0103 H06E0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0601 N1_V02S0301 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 V06S0103 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: B0 H00R0100 arc: B1 Q1 arc: B3 Q3 arc: C0 N1_V01N0001 arc: C1 H00R0100 arc: C3 H02E0401 arc: CE0 V02S0201 arc: CE1 S1_V02N0201 arc: CE2 S1_V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0001 arc: D3 N1_V02S0001 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00R0100 Q5 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 E1_H02W0601 arc: M1 H00L0100 arc: M3 H00R0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V02N0001 F0 arc: N1_V02N0101 F3 arc: N1_V02N0401 Q6 word: SLICEB.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1010000010001000 word: SLICEA.K1.INIT 1101110111110101 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C43:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 N1_V02S0401 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0501 N1_V01S0100 arc: V00B0000 V02N0201 arc: V00B0100 V02S0101 arc: V00T0100 H02E0101 arc: A2 V00T0000 arc: B0 H01W0100 arc: C0 H00L0000 arc: C2 H00L0100 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 H02E0001 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H01W0100 Q6 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F0 arc: V00T0000 Q2 word: SLICEB.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1100110011110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R27C44:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 V01N0101 arc: V00B0000 H02E0401 arc: V00T0000 V02N0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0601 H01E0001 arc: A7 Q7 arc: C3 H02W0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D6 E1_H01W0100 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q7 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H02E0201 arc: M4 H02E0401 arc: M5 H02E0001 arc: M6 H02E0401 arc: M7 H00R0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000111100001111 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011111111 word: SLICED.K1.INIT 0101010101010101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C45:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 N1_V02S0501 arc: H00L0000 V02S0001 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0601 H02W0601 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0401 N3_V06S0203 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 H01E0001 arc: A3 H01E0001 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 N1_V02S0301 arc: A7 N1_V01N0101 arc: B0 E1_H01W0100 arc: B1 V02S0101 arc: B2 E1_H01W0100 arc: B3 V02S0101 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 H01E0101 arc: B7 N1_V01S0000 arc: C0 H02E0601 arc: C1 E1_H01W0000 arc: C2 H02E0601 arc: C3 E1_H01W0000 arc: C4 S1_V02N0201 arc: C5 S1_V02N0201 arc: C6 Q6 arc: CE1 N1_V02S0201 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V02S0601 arc: D5 V02S0601 arc: D6 N1_V02S0601 arc: D7 V02S0601 arc: E1_H01E0101 F7 arc: E1_H02E0101 Q3 arc: E3_H06E0103 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 F6 arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 E1_H01E0101 arc: M5 H00L0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: S1_V02S0601 F4 arc: V01S0000 Q3 arc: W1_H02W0601 Q6 word: SLICED.K0.INIT 0000010100010001 word: SLICEA.K0.INIT 0001111000001111 word: SLICEA.K1.INIT 0011011000110011 word: SLICEB.K0.INIT 0001111011110000 word: SLICEB.K1.INIT 0011011000110011 word: SLICED.K1.INIT 1100110010101010 word: SLICEC.K0.INIT 1100000010100000 word: SLICEC.K1.INIT 1100111110101111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C46:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02S0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N1_V02S0501 arc: V00B0000 H02W0401 arc: V00B0100 N1_V02S0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: A2 E1_H01E0001 arc: A5 H02E0501 arc: A7 Q7 arc: B2 V02S0101 arc: B5 W1_H02E0301 arc: B7 H02E0101 arc: C2 N1_V01N0001 arc: C5 V02N0201 arc: C7 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 N1_V02S0201 arc: D5 H02E0001 arc: D7 H00L0100 arc: E1_H01E0001 Q3 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F1 arc: H01W0100 F1 arc: LSR0 H02E0301 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 H02E0201 arc: M5 H00L0000 arc: M7 H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: S1_V02S0101 Q3 arc: S1_V02S0701 F5 arc: V01S0000 Q7 arc: V01S0100 Q5 word: SLICEC.K1.INIT 0000000100001011 word: SLICED.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 1111111100000000 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 0100010000001100 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C47:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0701 N3_V06S0203 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H02E0701 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00T0100 H02W0301 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 V02N0501 arc: A1 V02N0701 arc: A2 F5 arc: A3 H02W0501 arc: A4 V00T0100 arc: A5 F7 arc: A6 N1_V02S0301 arc: A7 H02W0701 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 F3 arc: B3 V02N0301 arc: B4 N1_V02S0501 arc: B5 E1_H02W0301 arc: B6 V00B0000 arc: B7 N1_V02S0501 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 F4 arc: C3 H00L0100 arc: C4 Q4 arc: C5 E1_H02W0601 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V02S0001 arc: D3 H02W0201 arc: D4 V02N0601 arc: D5 V02S0401 arc: D6 S1_V02N0601 arc: D7 H00L0100 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 H02E0501 arc: M0 H02W0601 arc: M4 E1_H02W0401 arc: M7 E1_H01W0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: S1_V02S0001 F0 arc: S1_V02S0401 Q4 arc: V00B0100 Q7 arc: V01S0100 Q7 word: SLICED.K1.INIT 0100011100000000 word: SLICEB.K1.INIT 0000000100001011 word: SLICEC.K0.INIT 0000001010001010 word: SLICEC.K1.INIT 1111000100000000 word: SLICEB.K0.INIT 0000001010101010 word: SLICED.K0.INIT 1100000011000100 word: SLICEA.K0.INIT 1100100000001000 word: SLICEA.K1.INIT 1111101100111011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C48:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 N1_V01S0000 arc: H00R0000 V02N0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 N3_V06S0203 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 N1_V02S0501 arc: A0 V02S0701 arc: A2 V00T0000 arc: A7 H00L0000 arc: B0 E1_H02W0101 arc: B2 V02N0301 arc: B4 H00L0000 arc: B7 V00B0000 arc: C0 S1_V02N0401 arc: C2 H00L0000 arc: C4 Q4 arc: C7 V00B0100 arc: CE0 N1_V02S0201 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 V02S0201 arc: D4 H02W0001 arc: D7 N1_V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F0 arc: H01W0100 F0 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M2 N1_V01N0001 arc: M4 H02W0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q4 arc: S1_V02S0001 F2 arc: S1_V02S0701 Q7 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V01S0000 F0 arc: W1_H02W0201 Q2 arc: W1_H02W0601 F4 arc: W1_H02W0701 Q7 word: SLICED.K1.INIT 0000010100000011 word: SLICEB.K0.INIT 0100010000001100 word: SLICEA.K0.INIT 1011001110100000 word: SLICEC.K0.INIT 1100110011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C49:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02N0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: A0 E1_H02W0701 arc: A1 V02N0701 arc: A2 V02S0501 arc: A3 F5 arc: A4 E1_H01W0000 arc: A5 F7 arc: A6 E1_H01W0000 arc: A7 V02N0301 arc: B0 H02E0301 arc: B1 F3 arc: B2 V01N0001 arc: B3 H00R0100 arc: B4 E1_H02W0301 arc: B5 V02N0501 arc: B6 V01S0000 arc: B7 H02W0301 arc: C0 H02E0401 arc: C1 H02E0601 arc: C2 H02W0401 arc: C3 H02W0601 arc: C4 Q4 arc: C5 F4 arc: C6 S1_V02N0001 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 V00B0100 arc: D2 V01S0100 arc: D3 V01S0100 arc: D4 V02S0401 arc: D5 H02W0201 arc: D6 H02W0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F0 arc: E1_H02E0401 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: LSR0 V00T0100 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V02N0601 F6 arc: N3_V06N0103 F1 arc: S1_V02S0001 Q0 arc: V01S0000 Q4 arc: W1_H02W0201 F2 word: SLICED.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 0001000100000011 word: SLICEC.K1.INIT 0000000011001101 word: SLICEB.K1.INIT 0000001010101010 word: SLICEA.K1.INIT 0000000101010101 word: SLICEB.K0.INIT 0000101000100010 word: SLICEA.K0.INIT 1111010001000100 word: SLICED.K0.INIT 0000000010101100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C50:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H01E0001 arc: S3_V06S0303 N3_V06S0203 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 H02E0501 arc: A3 H02E0501 arc: A4 V02N0101 arc: A5 H02E0501 arc: A7 Q7 arc: B0 V02N0101 arc: B1 V01N0001 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 S1_V02N0701 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 H02E0601 arc: C5 V01N0101 arc: C7 H02E0401 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0201 arc: D2 V02N0201 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0101 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0701 F7 arc: N3_V06N0103 F1 arc: W1_H02W0301 Q3 word: SLICEA.K0.INIT 0000111100001110 word: SLICEA.K1.INIT 0000111100001110 word: SLICEB.K0.INIT 0000010100000100 word: SLICEB.K1.INIT 0000111100001110 word: SLICEC.K0.INIT 1100111111001010 word: SLICEC.K1.INIT 1111111111111010 word: SLICED.K1.INIT 0101010100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C51:PLC2 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 W3_H06E0103 arc: H00L0100 H02W0301 arc: H00R0100 H02W0701 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 N1_V02S0501 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0701 N3_V06S0203 arc: A0 V01N0101 arc: A2 H02E0701 arc: A3 H02W0701 arc: A4 F5 arc: A5 E1_H01W0000 arc: A6 E1_H01W0000 arc: A7 Q7 arc: B0 F3 arc: B1 V01N0001 arc: B2 H02E0301 arc: B3 V02N0101 arc: B4 S1_V02N0701 arc: B5 H02E0301 arc: B6 V00T0000 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 V02N0001 arc: C5 H02W0601 arc: C6 H02W0601 arc: C7 V02S0001 arc: CE1 H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 V00T0100 arc: D4 F2 arc: D5 V02S0601 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H02E0401 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M3 H02W0201 arc: M7 H02W0201 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: V00B0000 F6 arc: V00T0100 Q3 arc: V01S0000 F7 arc: V01S0100 F7 word: SLICED.K1.INIT 0001000000010011 word: SLICED.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 0101000101000000 word: SLICEA.K0.INIT 1111101000110011 word: SLICEA.K1.INIT 1111110000000000 word: SLICEB.K0.INIT 0011000000100010 word: SLICEC.K1.INIT 1000100011000000 word: SLICEC.K0.INIT 1111000011100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C52:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 V02N0501 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0100 H02W0501 arc: N1_V02N0501 H02E0501 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 V06S0203 arc: A0 V02S0501 arc: A1 H02W0701 arc: A2 V02N0701 arc: A3 V02S0701 arc: A4 S1_V02N0301 arc: A5 E1_H02W0501 arc: A6 F5 arc: A7 H02W0701 arc: B0 W1_H02E0301 arc: B1 F3 arc: B2 V02N0101 arc: B3 W1_H02E0301 arc: B4 H02W0301 arc: B6 V00B0100 arc: B7 E1_H02W0301 arc: C0 V02S0401 arc: C1 N1_V01N0001 arc: C2 H00L0000 arc: C3 H00L0100 arc: C4 V02S0001 arc: C5 H02W0601 arc: C6 H02E0601 arc: C7 F4 arc: CE1 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00T0100 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: D6 V00B0000 arc: D7 F2 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M3 E1_H02W0201 arc: M6 H02W0401 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N3_V06N0303 F6 arc: V00B0100 F7 arc: V01S0000 Q6 arc: V01S0100 Q3 arc: W1_H02W0601 Q6 word: SLICEA.K0.INIT 0011000000100010 word: SLICEB.K1.INIT 1000100011000000 word: SLICEA.K1.INIT 0000000011111101 word: SLICEC.K1.INIT 0000000000000101 word: SLICEB.K0.INIT 1010000011000000 word: SLICEC.K0.INIT 0000111000000100 word: SLICED.K1.INIT 1100110011000100 word: SLICED.K0.INIT 1111000001000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C53:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 E1_H02W0201 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 W1_H02E0501 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0701 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S1_V02N0701 arc: A0 H02W0701 arc: A2 N1_V02S0501 arc: A3 H02W0701 arc: A4 E1_H01W0000 arc: A5 H02W0701 arc: A6 H00R0000 arc: A7 F5 arc: B0 V02N0301 arc: B2 E1_H01W0100 arc: B3 V02N0301 arc: B4 V02S0501 arc: B5 N1_V02S0501 arc: B6 V00B0000 arc: B7 F3 arc: C0 H02W0401 arc: C2 H00L0100 arc: C3 V02N0401 arc: C4 S1_V02N0001 arc: C5 V02N0201 arc: C6 V02N0201 arc: C7 H02W0601 arc: CE0 S1_V02N0201 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V00B0100 arc: D3 V02N0001 arc: D4 H02E0001 arc: D5 V01N0001 arc: D6 H02E0001 arc: D7 F0 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F6 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M1 H02W0001 arc: M3 H02W0201 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: S1_V02S0601 Q4 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0000 Q6 arc: V01S0100 Q1 arc: W1_H02W0301 Q1 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 0001101100000000 word: SLICEA.K0.INIT 1111111010111010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 0000010000010101 word: SLICEC.K1.INIT 0000001010001010 word: SLICED.K1.INIT 1110000011101111 word: SLICED.K0.INIT 1100000010001000 word: SLICEC.K0.INIT 0000101000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C54:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 H02W0601 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0203 H06E0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 H00R0000 arc: A1 S1_V02N0701 arc: A6 H02E0701 arc: B0 V02N0101 arc: B1 E1_H02W0101 arc: C0 V02S0401 arc: C1 V02S0401 arc: C6 W1_H02E0401 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V01S0100 arc: D6 V02N0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F1 arc: S1_V02S0101 Q1 arc: S3_V06S0103 F1 arc: V01S0000 F0 arc: W1_H02W0001 F0 arc: W1_H02W0201 F0 word: SLICED.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1000100011111000 word: SLICEA.K1.INIT 1011101000110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C55:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 N1_V01S0100 arc: H00R0000 N1_V02S0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0103 N3_V06S0003 arc: V00B0100 E1_H02W0701 arc: V00T0000 H02W0001 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N3_V06S0303 arc: A0 H02W0701 arc: B0 H01W0100 arc: C0 H02E0601 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: H01W0000 F0 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 V00B0100 arc: M2 V00B0000 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N3_V06N0103 Q2 arc: S1_V02S0001 F0 arc: V00B0000 Q4 arc: W1_H02W0601 Q4 word: SLICEA.K0.INIT 1100000011101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C56:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 H02W0501 arc: V00T0000 H02E0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0701 V06S0203 arc: A0 F5 arc: A1 F5 arc: A3 V00B0000 arc: A4 V00T0100 arc: A5 N1_V01N0101 arc: A6 W1_H02E0501 arc: A7 Q7 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B3 H02E0301 arc: B4 N1_V02S0701 arc: B5 V00B0100 arc: B6 F3 arc: C0 F4 arc: C1 F4 arc: C3 H00L0100 arc: C4 Q4 arc: C5 E1_H02W0601 arc: C6 V02N0001 arc: C7 E1_H01E0101 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D3 F0 arc: D4 H02W0001 arc: D5 E1_H01W0100 arc: D6 W1_H02E0001 arc: D7 H00R0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q4 arc: E1_H02E0301 Q3 arc: E1_H02E0501 Q7 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 H02E0501 arc: LSR1 E1_H02W0501 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 N1_V01N0001 arc: M3 E1_H02W0201 arc: M4 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q7 arc: N1_V02N0301 Q1 arc: V00T0100 Q1 arc: V01S0100 Q2 arc: W1_H02W0001 Q2 word: SLICEC.K0.INIT 0000000001000111 word: SLICEC.K1.INIT 0000010011000100 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111011111110 word: SLICEB.K1.INIT 0000001010001010 word: SLICED.K0.INIT 0000000000000001 word: SLICED.K1.INIT 0101010100001111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C57:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: E3_H06E0203 N3_V06S0203 arc: H00L0100 H02E0301 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0501 H02W0501 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 V06S0003 arc: A0 H02E0701 arc: A1 F7 arc: A2 H02W0701 arc: A4 H02E0501 arc: A5 Q5 arc: A6 F5 arc: A7 V02S0301 arc: B0 S1_V02N0101 arc: B1 V00B0000 arc: B2 E1_H01W0100 arc: B4 V00B0100 arc: B5 H02W0101 arc: B6 H02W0301 arc: B7 H01E0101 arc: C0 H00L0100 arc: C1 F4 arc: C2 H00R0100 arc: C4 H02E0401 arc: C5 H01E0001 arc: C6 W1_H02E0401 arc: C7 H02E0401 arc: CE0 W1_H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 E1_H02W0001 arc: D2 H00R0000 arc: D4 V02S0601 arc: D6 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q0 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 H02W0501 arc: M2 V00T0100 arc: M5 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F2 arc: N3_V06N0103 F2 arc: S1_V02S0001 F0 arc: S1_V02S0201 F0 arc: V00B0100 Q5 arc: V01S0000 F6 arc: V01S0100 F1 word: SLICEC.K1.INIT 0100011101000111 word: SLICED.K0.INIT 1011100000000000 word: SLICEB.K0.INIT 1111111000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1100000011101010 word: SLICED.K1.INIT 0000101000001100 word: SLICEC.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 0011001000110011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C58:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 H02E0201 arc: H00R0100 E1_H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H06E0103 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0001 H01E0001 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: V00B0100 N1_V02S0101 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02S0601 arc: A0 V02S0501 arc: A1 H00L0100 arc: A2 H02E0501 arc: A3 V00T0000 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A7 S1_V02N0301 arc: B0 H02E0101 arc: B1 V00T0000 arc: B2 H02E0101 arc: B3 Q3 arc: B4 V02N0501 arc: B5 H01E0101 arc: B7 V00B0100 arc: C0 H00L0100 arc: C1 V02S0401 arc: C2 H02E0401 arc: C3 V02N0401 arc: C4 W1_H02E0601 arc: C5 N1_V02S0001 arc: C7 E1_H01E0101 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D2 H01E0101 arc: D3 N1_V02S0001 arc: D4 V02S0401 arc: D5 V02N0401 arc: D7 F2 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q5 arc: H01W0100 F3 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M0 H01E0001 arc: M3 H02E0201 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q5 arc: V00T0000 Q0 arc: V01S0000 F7 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 0000000101000101 word: SLICEA.K0.INIT 0000100000101010 word: SLICED.K1.INIT 1000100010001100 word: SLICEB.K1.INIT 1100000010100000 word: SLICEC.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 0011000000100010 word: SLICEA.K1.INIT 1010110000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C59:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 W1_H02E0201 arc: H00L0100 H02E0301 arc: H00R0000 H02E0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 H06W0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 H02W0401 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 N1_V02S0301 arc: A0 E1_H01E0001 arc: A1 F5 arc: A2 H02E0501 arc: A3 F7 arc: A4 V00T0100 arc: A5 Q5 arc: A6 H02W0701 arc: A7 H02E0501 arc: B0 H01W0100 arc: B1 V02S0301 arc: B2 H00R0100 arc: B3 H02W0301 arc: B4 S1_V02N0701 arc: B6 H02W0301 arc: B7 V00B0100 arc: C1 H02E0401 arc: C2 E1_H02W0401 arc: C3 S1_V02N0401 arc: C4 H01E0001 arc: C5 E1_H01E0101 arc: C6 F4 arc: C7 E1_H02W0401 arc: CE0 V02S0201 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 F0 arc: D2 Q2 arc: D3 F2 arc: D4 H00L0100 arc: D5 H02E0001 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q0 arc: H01W0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: M2 V00T0000 arc: M5 H00L0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V02N0601 F6 arc: S1_V02S0501 Q7 arc: V00B0100 Q7 arc: V00T0100 F3 arc: V01S0000 Q5 arc: V01S0100 Q0 arc: W1_H02W0101 F1 word: SLICEA.K0.INIT 1100110010101010 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K1.INIT 0100000001110000 word: SLICEB.K0.INIT 1000101010000000 word: SLICED.K1.INIT 0100010101000000 word: SLICEB.K1.INIT 1100110010001100 word: SLICEC.K0.INIT 1010101010101000 word: SLICED.K0.INIT 1010001010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C60:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 H06E0203 arc: V00B0100 V02N0301 arc: V00T0000 W1_H02E0201 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N1_V02S0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V00B0000 arc: B0 H01W0100 arc: B1 H01W0100 arc: C0 V02N0401 arc: C1 V02N0601 arc: C2 H00L0000 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0100 Q7 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0003 F0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K0.INIT 1010101011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R27C61:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 E3_H06W0303 arc: H00L0000 H02W0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 V01N0001 arc: V00B0000 S1_V02N0201 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V01N0001 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A5 V02N0101 arc: B0 H02W0301 arc: B1 H02W0301 arc: B4 N1_V01S0000 arc: B5 H02W0101 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C4 Q4 arc: C5 W1_H02E0601 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D4 H02W0001 arc: D5 V02S0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 F5 arc: M0 H01E0001 arc: M1 E1_H02W0001 arc: M3 H00R0000 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: S3_V06S0303 F5 arc: V01S0100 F5 arc: W1_H02W0701 F5 word: SLICEC.K1.INIT 0001000000000000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICEC.K0.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R27C62:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 E1_H02W0001 arc: H00R0100 H02W0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 N3_V06S0003 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0203 E3_H06W0103 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 H02E0501 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H00R0000 arc: B3 H00R0000 arc: B5 V00B0100 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C5 V02S0201 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D5 N1_V02S0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H01W0000 F5 arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 H02E0601 arc: M3 H00L0000 arc: M4 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 F5 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: S1_V02S0701 F5 word: SLICEC.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1100101011111111 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C63:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 S1_V02N0501 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0103 H01E0101 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 E1_H01W0000 arc: V00T0100 H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 N1_V01S0100 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A4 V00T0100 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H02E0301 arc: B4 V02S0501 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H00L0000 arc: C4 V02N0201 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 V00B0100 arc: D4 H02W0201 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F4 arc: E1_H02E0301 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0100 Q7 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 H02W0601 arc: M3 E1_H02W0201 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F4 arc: N3_V06N0003 F0 arc: V00B0100 Q5 arc: V00T0000 F2 arc: V01S0100 F4 word: SLICEC.K0.INIT 0000100000000000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C64:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 H01E0101 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 S1_V02N0601 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A3 E1_H02W0701 arc: A4 V00T0100 arc: A5 Q5 arc: A7 V02N0101 arc: B0 H02W0301 arc: B1 E1_H02W0101 arc: B3 W1_H02E0101 arc: B4 V00B0100 arc: B5 H02W0301 arc: B6 H02E0301 arc: B7 E1_H02W0301 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C3 V02N0401 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 Q6 arc: C7 E1_H02W0401 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H02W0001 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 E1_H02W0201 arc: D6 H02W0001 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F6 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F3 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H00L0000 arc: M4 E1_H01E0101 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q2 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: V00B0100 Q5 arc: V01S0000 F3 arc: V01S0100 Q2 arc: W1_H02W0101 F3 arc: W1_H02W0701 F7 word: SLICEB.K1.INIT 0000100000000000 word: SLICED.K1.INIT 0100000000000000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1111001110111011 word: SLICED.K0.INIT 1100110011110000 word: SLICEC.K0.INIT 1010000010001000 word: SLICEC.K1.INIT 1110001011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R27C65:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 W1_H02E0201 arc: H00R0100 H02E0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0301 N3_V06S0003 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 E1_H02W0501 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 H02W0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 V00T0000 arc: A6 V02S0101 arc: B0 V02S0101 arc: B1 H02E0101 arc: B2 H00R0000 arc: B3 H00R0000 arc: B6 H02E0101 arc: C0 H02E0601 arc: C1 H02E0401 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 Q4 arc: C6 V00B0100 arc: CE0 V02N0201 arc: CE1 W1_H02E0101 arc: CE2 H00L0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02S0201 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 H02W0001 arc: D6 S1_V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0000 F0 arc: H01W0100 F2 arc: M0 V00T0100 arc: M2 V00B0000 arc: M3 H02E0201 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F1 arc: N3_V06N0303 F6 arc: S1_V02S0101 F1 arc: S1_V02S0201 F0 arc: S1_V02S0401 F6 arc: V00B0000 F4 arc: V00T0000 Q0 arc: V01S0000 F1 arc: V01S0100 F6 arc: W1_H02W0101 F1 word: SLICEA.K0.INIT 0000000010000000 word: SLICED.K0.INIT 0010000000000000 word: SLICEA.K1.INIT 0010000000000000 word: SLICEC.K0.INIT 1111000010101010 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C66:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 H01E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0203 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A6 V00T0100 arc: B0 H01W0100 arc: B1 Q1 arc: C0 V02N0401 arc: C1 V02N0401 arc: C6 Q6 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D6 E1_H02W0001 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: H01W0000 F0 arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H00R0000 arc: M3 H00R0000 arc: M4 E1_H02W0401 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 F6 arc: V00T0100 Q3 word: SLICED.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C67:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 E1_H02W0201 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 E1_H02W0201 arc: V00B0100 H02W0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 V00B0000 arc: B0 H02E0101 arc: B1 H02W0301 arc: B2 H02W0301 arc: B3 Q3 arc: C0 H00L0100 arc: C1 H00L0100 arc: C3 V02S0401 arc: CE0 H00L0000 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02E0201 arc: D2 Q2 arc: D3 H02W0001 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: M0 V00T0100 arc: M1 W1_H02E0001 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 V00B0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F2 arc: N3_V06N0003 F0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1110001011111111 word: SLICEB.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1110111000100010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 .tile R27C68:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 W1_H02E0101 arc: E3_H06E0003 N3_V06S0003 arc: H00L0000 H02W0201 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 N3_V06S0003 arc: V00B0100 V02N0301 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E1_H02W0401 arc: W3_H06W0103 E1_H02W0101 arc: A0 V01N0101 arc: A1 V02N0701 arc: A2 V01N0101 arc: A3 V00B0000 arc: B0 W1_H02E0101 arc: B1 Q1 arc: B2 H00R0000 arc: B3 Q3 arc: B6 V02N0701 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C6 Q6 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 W1_H02E0201 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D6 V01N0001 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H00R0100 Q5 arc: H01W0000 F0 arc: H01W0100 F2 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 H02W0601 arc: M3 H02E0201 arc: M4 V00T0100 arc: M5 H02E0001 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q4 arc: V01S0100 Q1 word: SLICED.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 1100100001000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEB.K0.INIT 1110010000000000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C69:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: H00L0000 V02N0001 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0601 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0701 V06S0203 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02S0701 arc: A3 V02S0501 arc: A4 V02S0301 arc: A5 V02S0301 arc: A7 V02S0301 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H02E0301 arc: B3 Q3 arc: B4 H02W0301 arc: B5 H02W0301 arc: B6 V02N0701 arc: B7 W1_H02E0301 arc: C0 V02N0601 arc: C1 H02E0401 arc: C2 H02E0401 arc: C3 V02N0401 arc: C4 V02S0001 arc: C5 E1_H02W0601 arc: C6 Q6 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 W1_H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 V00T0100 arc: D3 H02E0001 arc: D4 H02E0201 arc: D5 E1_H02W0001 arc: D6 H02E0001 arc: D7 H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F4 arc: H01W0100 F4 arc: M0 H01E0001 arc: M1 H00L0000 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: M4 W1_H02E0401 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F0 arc: N1_V02N0501 F7 arc: N1_V02N0601 F4 arc: N3_V06N0103 F2 arc: S1_V02S0501 F5 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0100 F5 arc: W1_H02W0501 F5 arc: W1_H02W0601 F6 arc: W3_H06W0203 F7 word: SLICEC.K1.INIT 0001000000000000 word: SLICED.K1.INIT 0000010000000000 word: SLICEC.K0.INIT 0001000000000000 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICED.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C70:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: H00L0000 V02S0001 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02W0401 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0003 E1_H01W0000 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: A7 V02N0301 arc: B0 W1_H02E0301 arc: B1 H02E0101 arc: B2 W1_H02E0301 arc: B3 H02E0101 arc: B4 W1_H02E0301 arc: B5 H02E0101 arc: B7 H02E0301 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C5 V00B0100 arc: C7 E1_H02W0401 arc: CE0 W1_H02E0101 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 W1_H02E0001 arc: D2 H02E0201 arc: D3 W1_H02E0001 arc: D4 H02E0201 arc: D5 W1_H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q1 arc: H01W0100 F7 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q6 arc: V00B0100 Q5 arc: V01S0000 F7 word: SLICED.K1.INIT 0001000000000000 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011101111110011 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1011101111110011 word: SLICEC.K0.INIT 1110001000000000 word: SLICEC.K1.INIT 1111001110111011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R27C71:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 N3_V06S0003 arc: E3_H06E0103 H01E0101 arc: H00L0000 S1_V02N0201 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 V01N0001 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 V01N0101 arc: S1_V02S0001 N3_V06S0003 arc: V00B0100 S1_V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0003 V01N0001 arc: W3_H06W0103 V01N0101 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 V01N0101 arc: A0 E1_H01E0001 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 V02S0301 arc: A5 V02S0301 arc: A7 V02S0301 arc: B0 V00B0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 V02N0701 arc: B5 V02N0701 arc: B7 V02N0701 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 V02S0601 arc: C3 V02S0601 arc: C4 V02N0001 arc: C5 V02N0001 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 E1_H01W0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: E1_H02E0501 F5 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H00R0100 F5 arc: H01W0000 F4 arc: H01W0100 Q6 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M2 V00B0100 arc: M3 H02W0201 arc: M4 V00T0000 arc: M6 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0103 F2 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: V00B0000 Q4 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0501 Q7 arc: W1_H02W0701 F7 word: SLICEC.K1.INIT 0000100000000000 word: SLICED.K1.INIT 0000010000000000 word: SLICEC.K0.INIT 0000100000000000 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1010110011111111 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1100101011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C72:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: H00L0000 S1_V02N0201 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0401 N1_V02S0101 arc: S3_V06S0003 N1_V01S0000 arc: V00T0100 W1_H02E0101 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 E1_H01W0000 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A2 V02S0501 arc: A5 N1_V02S0101 arc: B0 H02E0301 arc: B1 Q1 arc: B2 V02S0301 arc: B3 V02S0301 arc: B5 E1_H02W0301 arc: C0 H00L0100 arc: C1 V02N0401 arc: C3 V02S0601 arc: C5 H02W0401 arc: CE0 E1_H02W0101 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02E0001 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D5 V02N0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F5 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0000 F2 arc: H01W0100 F3 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M3 H00R0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F3 arc: N1_V02N0601 Q6 arc: N1_V02N0701 Q5 arc: N3_V06N0003 F3 arc: V01S0100 F3 arc: W1_H02W0001 F2 arc: W1_H02W0501 F5 arc: W3_H06W0003 F0 word: SLICEC.K1.INIT 0000000010000000 word: SLICEB.K0.INIT 0000000001000100 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICEB.K1.INIT 0000110000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R27C73:PLC2 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0103 H06E0103 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: W1_H02W0101 H01E0101 arc: W1_H02W0601 V02N0601 arc: A0 H00R0000 arc: A2 V00T0000 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0101 arc: B2 H01W0100 arc: B4 E1_H02W0101 arc: B5 E1_H02W0301 arc: C0 E1_H02W0601 arc: C1 E1_H02W0401 arc: C4 V02N0201 arc: C5 V02N0201 arc: C7 V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 H02W0001 arc: D4 S1_V02N0401 arc: D5 V02N0401 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0000 F4 arc: H01W0000 F4 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0701 F7 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0701 F5 arc: V00T0000 Q2 arc: V01S0100 Q7 arc: W1_H02W0401 F4 arc: W1_H02W0501 F5 arc: W1_H02W0701 F5 arc: W3_H06W0203 F7 arc: W3_H06W0303 F5 word: SLICEB.K0.INIT 1010101011001100 word: SLICEC.K0.INIT 0011000000000000 word: SLICEC.K1.INIT 0000000011000000 word: SLICEA.K0.INIT 1010101011101010 word: SLICEA.K1.INIT 0000000011000000 word: SLICED.K1.INIT 1010000010100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.D1MUX 1 .tile R27C74:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N3_V06N0103 H06E0103 arc: V00T0000 V02N0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 H01E0001 arc: A0 V02S0701 arc: B0 H02W0301 arc: C0 E1_H01W0000 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: LSR0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0201 Q0 arc: N3_V06N0003 Q0 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 1110000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C75:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0401 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 V02S0301 arc: W1_H02W0101 V01N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V01N0001 arc: A0 V02N0501 arc: A6 N1_V01S0100 arc: B2 H02E0301 arc: B3 V02N0301 arc: B4 N1_V01S0000 arc: B5 H01E0101 arc: B7 V02S0701 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: LSR1 V00B0100 arc: M7 H00R0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 F7 arc: N1_V02N0601 F6 arc: S1_V02S0701 Q7 arc: V01S0000 F3 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C76:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: H00L0000 V02S0001 arc: H00R0000 H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 N3_V06S0303 arc: W1_H02W0701 V02S0701 arc: A6 N1_V01S0100 arc: B5 H02W0301 arc: B6 H02E0101 arc: C4 Q4 arc: C5 V02N0001 arc: C6 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D5 H00R0100 arc: D6 V00B0000 arc: E1_H02E0601 F6 arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: LSR0 H02E0501 arc: M7 H00L0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: N3_V06N0203 Q7 arc: S1_V02S0701 F5 arc: V00B0000 Q4 arc: V01S0000 F6 word: SLICEC.K0.INIT 0000111100000000 word: SLICED.K0.INIT 1110001000011101 word: SLICEC.K1.INIT 0011111100001111 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R27C77:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0100 V02N0301 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0301 H02W0301 arc: V00B0100 H02W0501 arc: W1_H02W0301 V01N0101 arc: A0 H00L0100 arc: A2 F7 arc: A3 F5 arc: A6 V02N0301 arc: B0 V02N0101 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B3 V01N0001 arc: B4 W1_H02E0301 arc: B5 W1_H02E0301 arc: B7 N1_V01S0000 arc: C0 H02E0601 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 W1_H02E0601 arc: C6 V01N0101 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 V02N0001 arc: D2 H02E0001 arc: D3 V00B0100 arc: D4 S1_V02N0401 arc: D5 V02N0601 arc: D6 V02N0401 arc: D7 V02S0401 arc: E1_H01E0101 F7 arc: E3_H06E0003 F3 arc: E3_H06E0203 F4 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N3_V06N0003 Q0 arc: N3_V06N0303 F6 arc: S1_V02S0501 F7 arc: V00T0100 F1 arc: V01S0100 F4 arc: W1_H02W0601 F6 word: SLICED.K1.INIT 0000001100001111 word: SLICEC.K0.INIT 0000000000001100 word: SLICEC.K1.INIT 0000000011111100 word: SLICED.K0.INIT 1111101000000000 word: SLICEB.K1.INIT 0100000001010000 word: SLICEA.K1.INIT 0000001111111111 word: SLICEB.K0.INIT 0000000001000000 word: SLICEA.K0.INIT 1111111100001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C78:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0701 N1_V02S0701 arc: H00R0100 V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0201 E1_H01W0000 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: A0 H02E0501 arc: A1 V02N0501 arc: A2 V02S0501 arc: A4 V00T0000 arc: B0 S1_V02N0301 arc: B1 Q1 arc: B2 H02W0301 arc: C0 V02N0601 arc: C1 V02N0401 arc: C2 H00L0000 arc: C4 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 N1_V01S0000 arc: D2 V02N0001 arc: D4 H00R0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q2 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H00L0000 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: S1_V02S0001 Q0 arc: S1_V02S0101 Q1 arc: S3_V06S0103 Q2 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 F4 arc: V01S0100 Q1 word: SLICEC.K0.INIT 0000111100000101 word: SLICEA.K0.INIT 0101000101010000 word: SLICEB.K0.INIT 1111111111011100 word: SLICEA.K1.INIT 0101010100000100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C79:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0001 N3_V06S0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H01E0001 arc: S3_V06S0003 N1_V01S0000 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 E1_H02W0601 arc: B0 E1_H01W0100 arc: B1 V02N0101 arc: C0 E1_H02W0401 arc: C1 E1_H01W0000 arc: CE0 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H00R0000 arc: E1_H01E0001 Q0 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q6 arc: LSR0 H02W0301 arc: LSR1 E1_H02W0301 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 word: SLICEA.K1.INIT 1111000011000000 word: SLICEA.K0.INIT 1100110011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C80:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0701 V01N0101 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02W0601 arc: S1_V02S0201 E1_H01W0000 arc: V00B0000 V02N0001 arc: V00T0000 S1_V02N0401 arc: W1_H02W0301 N3_V06S0003 arc: A0 H02E0501 arc: A2 V00T0000 arc: A3 H01E0001 arc: A5 V02N0101 arc: B4 H02E0301 arc: B6 V02N0701 arc: B7 V00B0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: V01S0000 F7 word: SLICED.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 0000000000001010 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 .tile R27C81:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0203 N3_V06S0203 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0601 N3_V06S0303 arc: A2 H02E0701 arc: B0 V02N0101 arc: B1 V00T0000 arc: C6 H02W0401 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D6 V02S0601 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H01W0000 F2 arc: LSR0 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0101 F1 arc: V01S0000 F0 word: SLICEC.K1.INIT 0000000000001110 word: SLICEC.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEA.K0.INIT 1100110011000000 word: SLICED.K0.INIT 0000111100000000 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R27C82:PLC2 arc: E1_H02E0601 V01N0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S1_V02N0701 arc: V00B0000 W1_H02E0401 arc: W1_H02W0401 V01N0001 arc: A2 V02S0501 arc: A3 F5 arc: A4 V00T0000 arc: A5 V00T0000 arc: A6 V00T0100 arc: A7 V02S0301 arc: B1 V02N0101 arc: B2 V02N0301 arc: B3 H00R0100 arc: B4 H02W0301 arc: B5 H00L0000 arc: B6 V00B0100 arc: C0 V02N0601 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 F4 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V00T0100 arc: D3 E1_H02W0001 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 E1_H01W0100 arc: D7 V02N0401 arc: E1_H02E0001 Q0 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H00R0100 Q7 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q0 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 F3 word: SLICEB.K0.INIT 0010001000100010 word: SLICEC.K0.INIT 0000000000000001 word: SLICED.K0.INIT 0010000000000000 word: SLICEA.K1.INIT 0000000000110011 word: SLICED.K1.INIT 0000000010101010 word: SLICEA.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0000000010000000 word: SLICEB.K1.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R27C83:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0003 V01N0001 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 S3_V06N0103 arc: V00B0000 W1_H02E0601 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 W3_H06E0203 arc: A2 V02S0501 arc: A4 V02N0101 arc: A6 F7 arc: A7 N1_V01N0101 arc: B4 H00L0000 arc: B6 V01S0000 arc: B7 V00T0000 arc: C0 N1_V01S0100 arc: C1 H02E0601 arc: C3 V02S0401 arc: C4 E1_H01E0101 arc: C5 H02E0401 arc: C6 E1_H01E0101 arc: C7 N1_V02S0001 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V01S0000 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H00L0100 arc: D5 H02E0001 arc: D6 H01W0000 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q3 arc: H01W0000 Q0 arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: S1_V02S0501 F5 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEA.K1.INIT 0000111100000000 word: SLICED.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000010 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 0000000010101010 word: SLICEA.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 0000100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R27C84:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V01N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S1_V02N0001 arc: V00B0000 H02E0601 arc: W1_H02W0701 S1_V02N0701 arc: A1 H00L0000 arc: A6 V02N0101 arc: B1 H02E0301 arc: B2 V02N0101 arc: B3 S1_V02N0301 arc: B6 V02N0501 arc: B7 H02W0101 arc: C1 H00L0100 arc: C3 E1_H01W0000 arc: C4 E1_H01E0101 arc: C5 E1_H01E0101 arc: C6 E1_H02W0601 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0201 arc: D2 V02S0001 arc: D3 S1_V02N0201 arc: D4 H02E0001 arc: D5 H02E0001 arc: D6 E1_H01W0100 arc: D7 W1_H02E0001 arc: E1_H01E0101 F7 arc: E1_H02E0101 Q1 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F3 arc: H01W0100 F3 arc: LSR0 V00B0000 arc: LSR1 E1_H02W0301 arc: M0 H01E0001 arc: M1 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q2 arc: N3_V06N0303 F6 arc: S1_V02S0501 F5 arc: S3_V06S0303 F5 arc: V01S0000 F4 arc: W1_H02W0001 F0 arc: W1_H02W0101 F3 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 0011001100000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 0000111100000000 word: SLICED.K1.INIT 0011000011000000 word: SLICED.K0.INIT 0000100000000000 word: SLICEB.K1.INIT 0000000000110000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0100000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R27C85:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 N1_V02S0201 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0301 H02E0301 arc: V00B0000 N1_V02S0001 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 H02E0101 arc: W1_H02W0101 V01N0101 arc: A0 F5 arc: A3 F7 arc: A4 V02N0101 arc: A5 Q5 arc: B0 V02N0101 arc: B5 H02W0101 arc: B6 V02N0701 arc: C0 H02E0601 arc: C2 H02W0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 V02N0201 arc: C6 F4 arc: C7 S1_V02N0201 arc: CE0 E1_H02W0101 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V02N0001 arc: D3 H02E0201 arc: D4 V02N0601 arc: D5 W1_H02E0201 arc: D6 F2 arc: D7 F2 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q6 arc: E1_H02E0101 F3 arc: E1_H02E0701 Q7 arc: E3_H06E0203 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 H02E0301 arc: M4 V00T0100 arc: M5 H00R0100 arc: M6 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: N3_V06N0203 F7 arc: N3_V06N0303 F6 arc: S1_V02S0001 F2 arc: S1_V02S0201 F2 arc: V01S0000 F2 arc: V01S0100 Q0 word: SLICEC.K0.INIT 1111010100000000 word: SLICED.K0.INIT 1100000011110000 word: SLICEC.K1.INIT 1100101000000000 word: SLICEA.K0.INIT 1111111011111010 word: SLICED.K1.INIT 0000000011110000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEB.K1.INIT 0000101010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C86:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: H00L0100 W1_H02E0101 arc: H00R0000 H02E0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 W1_H02E0301 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 H01E0101 arc: A0 E1_H02W0701 arc: A2 V00T0000 arc: A3 H02E0501 arc: A4 E1_H02W0701 arc: A5 E1_H02W0701 arc: A7 Q7 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 W1_H02E0101 arc: B5 N1_V01S0000 arc: B6 H02E0101 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C2 N1_V01S0100 arc: C3 H00L0100 arc: C4 E1_H02W0401 arc: C5 V00T0100 arc: C6 H02E0401 arc: C7 E1_H02W0401 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 V01S0100 arc: D3 W1_H02E0001 arc: D4 V02S0401 arc: D5 V00B0000 arc: D6 H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F6 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q4 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0501 arc: M6 V00B0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q6 arc: N3_V06N0303 F6 arc: S1_V02S0201 Q0 arc: V01S0000 F6 arc: V01S0100 Q5 word: SLICEC.K1.INIT 1111010001000100 word: SLICEC.K0.INIT 1111010001000100 word: SLICED.K1.INIT 0100110001011111 word: SLICEB.K1.INIT 1110101011000000 word: SLICEB.K0.INIT 1110101011000000 word: SLICEA.K0.INIT 0101111100001111 word: SLICED.K0.INIT 0000110011001100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C87:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 W1_H02E0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 E1_H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: A0 W1_H02E0701 arc: A1 V02S0501 arc: B0 V00T0000 arc: B1 H01W0100 arc: C0 H02W0401 arc: C1 H02W0401 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0201 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0100 Q3 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0101 Q1 arc: V01S0000 Q0 arc: V01S0100 Q4 word: SLICEA.K1.INIT 1100000011101010 word: SLICEA.K0.INIT 1111001000100010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R27C88:PLC2 arc: H00L0000 H02E0001 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: N1_V02N0201 H02E0201 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 W1_H02E0201 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 H02E0701 arc: A2 F5 arc: A5 V02N0101 arc: B0 H02E0301 arc: B2 H00R0100 arc: C0 V02N0601 arc: C2 F4 arc: C4 V02N0201 arc: C5 V02N0201 arc: CE0 H00L0000 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 V01S0100 arc: D4 S1_V02N0401 arc: D5 S1_V02N0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 Q7 arc: H01W0000 F5 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M4 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q4 arc: N1_V02N0401 F4 arc: N1_V02N0601 F4 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0401 F4 arc: W1_H02W0701 F5 word: SLICEC.K1.INIT 0000010101010101 word: SLICEC.K0.INIT 0000111100000000 word: SLICEB.K0.INIT 1101010111000000 word: SLICEA.K0.INIT 1111100010001000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C25:PLC2 arc: N3_V06N0003 E3_H06W0003 .tile R28C28:PLC2 arc: N1_V02N0401 E3_H06W0203 arc: N3_V06N0303 E3_H06W0303 .tile R28C29:PLC2 arc: N1_V02N0001 E3_H06W0003 arc: N3_V06N0203 E3_H06W0203 .tile R28C30:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 E3_H06W0203 arc: H00L0100 N1_V02S0301 arc: H00R0000 V02N0401 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: V00B0000 V02N0001 arc: V00T0000 H02W0001 arc: B6 V01S0000 arc: C6 Q6 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 V02S0601 arc: F6 F6_SLICE arc: LSR1 V00B0000 arc: M5 H02W0001 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: V01S0000 Q5 word: SLICED.K0.INIT 1100110011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R28C31:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06S0303 arc: H00L0000 V02S0201 arc: H00L0100 V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 N1_V02S0701 arc: V00B0000 V02S0201 arc: V00T0000 V02N0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0001 V02S0001 arc: W3_H06W0003 E1_H01W0000 arc: A0 V01N0101 arc: A1 V01N0101 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B3 Q3 arc: C0 H02W0401 arc: C1 H02W0401 arc: C3 N1_V01N0001 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0201 arc: D3 H02W0201 arc: D7 H02E0001 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: M1 H02W0001 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 E1_H02W0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V02N0101 F3 arc: N3_V06N0003 F0 arc: V00B0100 Q5 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEB.K1.INIT 1111000011001100 word: SLICED.K1.INIT 1111000010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R28C32:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 N1_V01S0100 arc: H00L0000 V02S0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02W0501 arc: V00B0100 H02E0701 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06S0203 arc: A2 V02S0501 arc: A3 H02W0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: B0 H01W0100 arc: B2 V02S0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V01S0000 arc: C0 V02N0401 arc: C2 N1_V01N0001 arc: C3 E1_H02W0601 arc: C4 V02S0201 arc: C5 N1_V02S0001 arc: CE0 V02N0201 arc: CE1 H02W0101 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 S1_V02N0201 arc: D3 N1_V02S0001 arc: D4 N1_V02S0401 arc: D5 V02S0601 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 F4 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M0 H02E0601 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 V00B0100 arc: M5 E1_H02W0001 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q5 arc: N1_V02N0101 Q1 arc: N3_V06N0103 F2 arc: V01S0000 Q7 word: SLICEA.K0.INIT 1100110011110000 word: SLICEC.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 1100111110101111 word: SLICEB.K0.INIT 1101100000000000 word: SLICEB.K1.INIT 1010110011111111 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C33:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 N3_V06S0303 arc: H00L0000 H02E0201 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H01E0001 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 N1_V01S0100 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A5 Q5 arc: B2 E1_H02W0101 arc: B3 Q3 arc: B4 V00B0100 arc: B5 V01S0000 arc: C2 H00L0100 arc: C3 E1_H02W0401 arc: C4 Q4 arc: CE0 H02W0101 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q0 arc: E1_H02E0501 F5 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02E0601 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M5 H00L0000 arc: M6 H02E0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N3_V06N0103 F2 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V01S0000 Q6 word: SLICEC.K0.INIT 1100110011110000 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1010110011111111 word: SLICEC.K1.INIT 1100110010101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 .tile R28C34:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 E1_H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0501 H02W0501 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 E1_H02W0301 arc: A0 S1_V02N0701 arc: A1 S1_V02N0501 arc: A4 W1_H02E0701 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 V01N0001 arc: B4 V01S0000 arc: B5 H01E0101 arc: B6 E1_H02W0301 arc: B7 E1_H02W0101 arc: C0 N1_V01N0001 arc: C1 H02W0401 arc: C2 H00L0000 arc: C4 N1_V02S0001 arc: C5 S1_V02N0201 arc: C6 V01N0101 arc: C7 V01N0101 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 S1_V02N0201 arc: D2 E1_H02W0001 arc: D4 E1_H02W0201 arc: D5 E1_H02W0001 arc: D6 E1_H02W0201 arc: D7 E1_H02W0001 arc: E1_H02E0301 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00L0000 Q2 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H00L0100 arc: M2 H02W0601 arc: M3 H02W0201 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q7 arc: N3_V06N0003 F0 arc: V00T0000 F2 arc: V01S0000 Q5 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 1010110000000000 word: SLICEC.K1.INIT 1100111110101111 word: SLICEB.K0.INIT 1100110011110000 word: SLICED.K0.INIT 1011100000000000 word: SLICED.K1.INIT 1011101111110011 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R28C35:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 N1_V02S0201 arc: H00R0000 H02W0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0601 H02W0601 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02N0601 arc: A0 H00L0100 arc: A1 V02S0501 arc: A2 V02N0701 arc: A3 V02N0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A7 Q7 arc: B0 H02W0301 arc: B1 Q1 arc: B2 H02W0301 arc: B3 Q3 arc: B4 H02W0301 arc: B5 S1_V02N0701 arc: B6 H02E0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 N1_V01N0001 arc: C3 S1_V02N0401 arc: C4 V01N0101 arc: C5 V01N0101 arc: C6 Q6 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02S0201 arc: D2 S1_V02N0001 arc: D3 H02W0001 arc: D4 S1_V02N0401 arc: D5 H02W0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 H02W0401 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q5 arc: N3_V06N0103 F2 arc: V00B0000 F6 arc: V00B0100 F7 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 word: SLICED.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICED.K1.INIT 1010101011110000 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1100111110101111 word: SLICEC.K0.INIT 1011100000000000 word: SLICEC.K1.INIT 1011101111110011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C36:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 V06S0003 arc: H00L0000 H02W0201 arc: H00R0000 V02S0401 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0701 N1_V02S0701 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 V02N0501 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 V06S0203 arc: W3_H06W0303 V06S0303 arc: A0 E1_H01E0001 arc: A1 N1_V02S0501 arc: A2 H00L0100 arc: A3 N1_V02S0501 arc: A4 V02S0101 arc: B0 V02S0301 arc: B1 Q1 arc: B2 V02S0301 arc: B3 Q3 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 Q4 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 H02W0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 V01N0001 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: V00B0000 F4 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 1111010110100000 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1101100011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C37:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V02N0701 arc: H00L0000 N1_V02S0001 arc: H00R0000 V02S0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 E1_H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V01N0101 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 V01N0101 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 V02S0501 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H02E0301 arc: B3 Q3 arc: B4 H02E0301 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 Q4 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 S1_V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 V02S0001 arc: D4 V02N0601 arc: E1_H01E0001 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00T0000 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: V00B0000 F4 word: SLICEC.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100101011111111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1101110111110101 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C38:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 W1_H02E0301 arc: H00R0100 N1_V02S0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0601 E1_H02W0601 arc: A0 H00R0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 E1_H01E0001 arc: B0 W1_H02E0301 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B6 V02N0501 arc: C0 N1_V01N0001 arc: C1 S1_V02N0601 arc: C2 N1_V02S0401 arc: C3 N1_V02S0401 arc: C6 Q6 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 W1_H02E0001 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D6 W1_H02E0001 arc: E1_H01E0001 Q5 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 word: SLICEB.K0.INIT 1010000011000000 word: SLICEB.K1.INIT 1100111110101111 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R28C39:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 N3_V06S0203 arc: H00L0000 H02E0201 arc: H00R0000 V02S0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 H02W0601 arc: V00B0000 V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 N3_V06S0203 arc: W3_H06W0003 E1_H02W0001 arc: A0 E1_H01E0001 arc: A1 N1_V02S0701 arc: A2 H00L0100 arc: A3 N1_V02S0701 arc: A4 H02W0501 arc: A5 Q5 arc: B0 H00R0100 arc: B1 Q1 arc: B2 H01W0100 arc: B3 Q3 arc: B4 V01S0000 arc: B5 H02E0301 arc: C0 H02E0601 arc: C1 H00R0100 arc: C2 H02E0601 arc: C3 N1_V01N0001 arc: C4 V02S0201 arc: C5 V02S0201 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 S1_V02N0201 arc: D2 V02S0201 arc: D3 S1_V02N0201 arc: D4 H02E0001 arc: D5 E1_H01W0100 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0100 Q3 arc: H00R0100 Q7 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 H02E0401 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: N3_V06N0203 F4 arc: V01S0000 Q5 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1110010011111111 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1110010011111111 word: SLICEC.K0.INIT 1100000010100000 word: SLICEC.K1.INIT 1011111110001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C40:PLC2 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H02W0501 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0303 N1_V01S0100 arc: A0 H00R0000 arc: A1 H00R0000 arc: A5 Q5 arc: B0 S1_V02N0101 arc: B1 Q1 arc: B2 H00L0000 arc: C0 H00L0100 arc: C1 W1_H02E0601 arc: C2 N1_V01N0001 arc: C5 V00T0100 arc: CE0 V02N0201 arc: CE1 H02W0101 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V02S0201 arc: D2 H02E0001 arc: D5 W1_H02E0001 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 V00B0100 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N3_V06N0003 F0 arc: S1_V02S0701 F5 arc: V00T0000 F2 arc: V00T0100 Q3 arc: W1_H02W0501 Q7 word: SLICEC.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R28C41:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0601 V02N0601 arc: H00L0000 V02S0001 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0103 N1_V02S0101 arc: S3_V06S0303 N1_V02S0501 arc: V00T0100 H02W0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V06S0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A5 Q5 arc: B0 H01W0100 arc: B1 Q1 arc: C0 H02W0601 arc: C1 H02W0401 arc: C5 E1_H01E0101 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D5 H02W0001 arc: E1_H01E0101 Q7 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00L0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N3_V06N0003 F0 arc: V00B0100 F5 word: SLICEC.K1.INIT 1111000010101010 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1100111110101111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R28C42:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N3_V06N0003 V01N0001 arc: S1_V02S0201 N3_V06S0103 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V06S0303 .tile R28C43:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0501 V02S0501 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02E0301 arc: H00R0000 W1_H02E0601 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02E0301 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0301 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: W1_H02W0201 N1_V02S0201 arc: A2 E1_H01E0001 arc: A3 H02E0501 arc: B1 Q1 arc: B2 H00R0100 arc: B3 Q3 arc: C1 N1_V01N0001 arc: C2 H02E0601 arc: C3 H00R0100 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: E1_H01E0001 Q3 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H00R0100 Q7 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N3_V06N0103 F2 arc: V00T0100 F1 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1111010111011101 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C44:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 E1_H02W0101 arc: A0 F5 arc: A1 F5 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 H02W0501 arc: A5 Q5 arc: A7 Q7 arc: B0 H01W0100 arc: B2 V02N0301 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 H02W0301 arc: B7 V02S0501 arc: C0 F4 arc: C1 N1_V01N0001 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 H02W0401 arc: C5 H02W0601 arc: C7 H02W0601 arc: CE0 N1_V02S0201 arc: CE1 H02E0101 arc: CE2 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 H00L0100 arc: D5 H01W0000 arc: D7 H02W0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F7 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q1 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q7 arc: S1_V02S0701 Q5 arc: V01S0000 Q5 arc: V01S0100 Q3 word: SLICEC.K0.INIT 0000100001001100 word: SLICED.K1.INIT 0011010100000000 word: SLICEC.K1.INIT 0001000000010011 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K0.INIT 1100010010000000 word: SLICEB.K1.INIT 1111011110110011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C45:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V06S0203 arc: H00L0000 N1_V02S0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 H02E0501 arc: S1_V02S0001 H06W0003 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: A0 H01E0001 arc: A1 F5 arc: A2 H02W0501 arc: A3 V02N0501 arc: A4 S1_V02N0301 arc: A6 F7 arc: A7 E1_H01W0000 arc: B0 V02S0101 arc: B1 V00T0000 arc: B2 E1_H01W0100 arc: B3 Q3 arc: B5 E1_H02W0101 arc: B6 H02W0301 arc: C0 H02E0601 arc: C1 V02N0601 arc: C2 V02N0401 arc: C3 H02E0601 arc: C4 E1_H02W0401 arc: C5 E1_H01E0101 arc: C6 F4 arc: C7 V00T0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02S0001 arc: D2 H02E0201 arc: D3 E1_H02W0201 arc: D4 E1_H01W0100 arc: D5 F2 arc: D6 H02W0201 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR0 H02E0501 arc: M3 H00L0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: N3_V06N0103 F1 arc: V00T0000 F0 arc: V00T0100 Q3 word: SLICEC.K0.INIT 0000101001011111 word: SLICED.K1.INIT 0000111101010101 word: SLICED.K0.INIT 0000000010111000 word: SLICEB.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 0000000010101100 word: SLICEC.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 1000110010000000 word: SLICEA.K1.INIT 1101110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C46:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 N1_V02S0201 arc: H00L0100 V02S0301 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02S0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V06S0003 arc: A0 F5 arc: A1 F5 arc: A3 H02E0701 arc: A4 V00T0000 arc: A5 N1_V01N0101 arc: A6 N1_V01S0100 arc: A7 N1_V01S0100 arc: B0 F3 arc: B3 Q3 arc: B4 H02E0101 arc: B5 H02E0301 arc: B6 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C3 H02E0601 arc: C4 V02N0001 arc: C5 H02E0601 arc: C6 H02E0601 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V01S0100 arc: D3 W1_H02E0001 arc: D4 N1_V02S0601 arc: D5 H01W0000 arc: D6 H02E0001 arc: D7 V02N0401 arc: E1_H01E0001 Q3 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00L0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q1 arc: V00B0000 F6 arc: V00T0000 F0 arc: V01S0100 F3 arc: W1_H02W0501 Q5 arc: W1_H02W0701 F7 word: SLICED.K0.INIT 0011010100000000 word: SLICEB.K1.INIT 0000001010100010 word: SLICEC.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 0011010100000000 word: SLICED.K1.INIT 1100110010101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C47:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V02S0701 arc: H00R0000 V02N0401 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02W0501 arc: V00B0000 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02N0501 arc: A1 H02W0701 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 V00B0000 arc: A6 H00R0000 arc: A7 N1_V01S0100 arc: B2 V01N0001 arc: B3 V02N0301 arc: B4 N1_V02S0501 arc: B6 V02N0701 arc: B7 E1_H02W0301 arc: C1 N1_V01S0100 arc: C2 V02S0401 arc: C3 V02S0401 arc: C4 V02N0001 arc: C6 F4 arc: C7 H02E0401 arc: D1 E1_H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 F2 arc: D6 N1_V02S0601 arc: D7 V02S0401 arc: E1_H01E0001 F7 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M2 V00T0100 arc: N3_V06N0303 F6 arc: V00T0100 F1 word: SLICED.K1.INIT 0000000100110001 word: SLICEA.K1.INIT 1010101011110000 word: SLICEB.K0.INIT 1000100011000000 word: SLICEB.K1.INIT 1011101111110011 word: SLICEC.K0.INIT 1110000000100000 word: SLICED.K0.INIT 1111001000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R28C48:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 N1_V02S0201 arc: H00L0100 H02E0301 arc: H00R0100 V02S0701 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 H02E0501 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 N1_V01S0000 arc: A0 N1_V02S0501 arc: A2 H01E0001 arc: A4 N1_V02S0101 arc: B0 H02W0301 arc: B2 H02W0101 arc: B4 H02W0301 arc: B5 V02N0501 arc: C0 H00L0000 arc: C2 F4 arc: C4 Q4 arc: C5 V00T0100 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 F0 arc: D4 H00R0100 arc: D5 F2 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0000 Q6 arc: H01W0000 Q4 arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N3_V06N0303 F5 word: SLICEA.K0.INIT 1111111011001110 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000100001001100 word: SLICEB.K0.INIT 1100100011111011 word: SLICEC.K1.INIT 1111110000001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C49:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 E1_H02W0301 arc: H00R0000 V02S0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06E0203 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 H02W0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 H01E0101 arc: A0 F5 arc: A1 V01N0101 arc: A4 V00T0100 arc: A5 N1_V01N0101 arc: A6 H02W0501 arc: A7 Q7 arc: B0 V01N0001 arc: B2 H00L0000 arc: B3 V02N0301 arc: B4 E1_H02W0301 arc: B5 V02N0701 arc: B6 V00B0100 arc: C0 F4 arc: C1 F4 arc: C2 V02N0601 arc: C3 H00L0000 arc: C4 H02W0401 arc: C5 V02S0001 arc: C6 S1_V02N0001 arc: C7 H02E0401 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 H00R0100 arc: D5 H00L0100 arc: D6 V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0100 Q7 arc: H01W0000 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M0 E1_H02W0601 arc: M1 H02W0001 arc: M2 H02W0601 arc: M4 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q2 arc: S1_V02S0701 Q7 arc: V00B0100 F7 arc: V00T0100 Q1 arc: V01S0000 F3 arc: V01S0100 Q1 word: SLICED.K1.INIT 0101010100001111 word: SLICEB.K0.INIT 1111110000001100 word: SLICED.K0.INIT 0101010000000100 word: SLICEC.K1.INIT 0000000000011101 word: SLICEC.K0.INIT 0100000001001100 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K1.INIT 1111110000110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C50:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 N3_V06S0303 arc: S1_V02S0601 N3_V06S0303 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02S0601 arc: A1 H00L0100 arc: A3 H00L0100 arc: A4 F5 arc: A5 H02W0701 arc: A7 H00L0000 arc: B1 H01W0100 arc: B3 H01W0100 arc: B4 H01E0101 arc: B5 H02E0301 arc: B7 H02W0301 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C7 V00T0000 arc: CE1 W1_H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 E1_H02W0201 arc: D5 H02W0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M3 H00R0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: N1_V02N0101 F1 arc: N1_V02N0301 F1 arc: S1_V02S0101 Q3 arc: V01S0000 Q3 arc: V01S0100 F4 word: SLICEC.K1.INIT 1110111000100010 word: SLICEC.K0.INIT 0000010100000011 word: SLICEA.K0.INIT 1111000011110000 word: SLICEA.K1.INIT 0011000001010000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011000001010000 word: SLICED.K1.INIT 0100000001001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C51:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 H02W0001 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0101 H02W0101 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 H01E0001 arc: A0 E1_H01E0001 arc: A1 H02W0701 arc: A2 H02W0701 arc: A3 W1_H02E0501 arc: A6 H00L0000 arc: A7 Q7 arc: B0 F3 arc: B1 H02W0101 arc: B2 V02N0301 arc: B3 E1_H01W0100 arc: B6 H02W0101 arc: C0 N1_V02S0401 arc: C1 H02W0601 arc: C2 H02E0601 arc: C3 H02W0601 arc: C6 S1_V02N0201 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 N1_V02S0201 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H02W0201 arc: D2 H02W0001 arc: D3 H00R0000 arc: D6 E1_H01W0100 arc: D7 H01W0000 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F1 arc: N1_V02N0001 F0 arc: N1_V02N0401 F6 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q4 arc: S1_V02S0701 F7 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 arc: W1_H02W0701 Q7 word: SLICEA.K1.INIT 0100010000001100 word: SLICED.K0.INIT 0001000000010011 word: SLICED.K1.INIT 1111101000001010 word: SLICEB.K1.INIT 0000000011100100 word: SLICEB.K0.INIT 1011000010000000 word: SLICEA.K0.INIT 0000000011101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C52:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 H02E0701 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: S3_V06S0303 N3_V06S0303 arc: V00B0000 E1_H02W0601 arc: V00T0100 V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V06S0203 arc: A0 F7 arc: A1 F7 arc: A2 H02E0701 arc: A3 H02W0501 arc: A4 H02E0701 arc: A5 E1_H01W0000 arc: A7 H02E0701 arc: B0 F3 arc: B2 H02E0301 arc: B3 V02S0101 arc: B4 H02E0301 arc: B5 H02E0301 arc: B7 V00T0000 arc: C0 F4 arc: C1 F4 arc: C2 N1_V01S0100 arc: C3 W1_H02E0401 arc: C4 Q4 arc: C5 H02W0401 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 N1_V01S0000 arc: D3 H02E0001 arc: D4 H01W0000 arc: D5 H00R0100 arc: D7 H02E0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M1 E1_H02W0001 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: V00B0100 F5 arc: V00T0000 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q7 word: SLICEB.K0.INIT 0000100001001100 word: SLICEC.K1.INIT 0100010000001100 word: SLICEB.K1.INIT 0000000000110101 word: SLICEC.K0.INIT 0000001000010011 word: SLICED.K1.INIT 0001101100000000 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C53:PLC2 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02N0701 arc: H00L0000 H02W0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0301 H02W0301 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 N1_V02S0401 arc: V00B0100 V02S0101 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V06S0303 arc: A0 F7 arc: A1 W1_H02E0501 arc: A4 N1_V01N0101 arc: A5 S1_V02N0301 arc: A6 N1_V02S0301 arc: A7 H02W0701 arc: B0 V02N0301 arc: B4 N1_V01S0000 arc: B5 H00R0000 arc: B6 N1_V02S0701 arc: B7 W1_H02E0301 arc: C0 W1_H02E0601 arc: C1 V02N0401 arc: C4 V00T0100 arc: C5 V01N0101 arc: C6 H01E0001 arc: C7 V02S0201 arc: CE1 H00L0100 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D4 H00R0100 arc: D5 E1_H02W0201 arc: D6 F0 arc: D7 V02S0601 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M2 H02W0601 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q2 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: N3_V06N0303 F5 arc: V00B0000 F4 arc: W1_H02W0401 Q4 arc: W1_H02W0701 Q7 word: SLICEC.K0.INIT 0101000000110000 word: SLICED.K1.INIT 0000001000010011 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K0.INIT 0000100000101010 word: SLICEC.K1.INIT 1010000010101000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C54:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 V02S0601 arc: H00L0100 N1_V02S0101 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02W0601 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0701 H02W0701 arc: V00B0000 E1_H02W0401 arc: V00B0100 N1_V02S0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V06S0203 arc: W3_H06W0303 N3_V06S0303 arc: A0 V02S0701 arc: A1 N1_V02S0701 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A4 E1_H01W0000 arc: A5 V02S0101 arc: A6 V02S0301 arc: A7 H02E0701 arc: B0 V02N0301 arc: B1 V02S0101 arc: B2 H02W0301 arc: B3 H00R0000 arc: B4 H02W0101 arc: B5 H02W0301 arc: B6 V02N0501 arc: B7 F3 arc: C0 E1_H01W0000 arc: C1 V02S0401 arc: C2 N1_V02S0601 arc: C3 N1_V01N0001 arc: C4 V00T0100 arc: C5 V02N0001 arc: C6 F4 arc: CE0 N1_V02S0201 arc: CE1 V02S0201 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V00B0000 arc: D5 V02N0401 arc: D6 V02N0601 arc: D7 F2 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q6 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0501 arc: M1 H00L0100 arc: M3 H00L0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: S1_V02S0201 F0 arc: S1_V02S0301 Q3 arc: S1_V02S0501 F5 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 Q6 arc: W1_H02W0401 F6 word: SLICEC.K1.INIT 0000010100000011 word: SLICEA.K1.INIT 0001000010110000 word: SLICEA.K0.INIT 0000000100100011 word: SLICEC.K0.INIT 0000000011100010 word: SLICED.K0.INIT 1010100010101010 word: SLICEB.K1.INIT 1000100010100000 word: SLICEB.K0.INIT 0101000001000100 word: SLICED.K1.INIT 0000000000010001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C55:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0501 V06S0303 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 S1_V02N0401 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N3_V06S0103 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0601 N3_V06S0303 arc: W1_H02W0701 N3_V06S0203 arc: A0 N1_V02S0701 arc: A3 F7 arc: A4 S1_V02N0301 arc: A5 N1_V01N0101 arc: A6 V02N0101 arc: A7 Q7 arc: B0 V00T0000 arc: B2 S1_V02N0101 arc: B3 N1_V02S0101 arc: B4 N1_V02S0701 arc: B5 N1_V02S0701 arc: B6 F3 arc: B7 H01E0101 arc: C0 N1_V01N0001 arc: C2 N1_V02S0601 arc: C3 F4 arc: C4 V01N0101 arc: C5 N1_V02S0001 arc: C6 V02N0001 arc: C7 V00T0000 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 Q2 arc: D3 F0 arc: D4 V02S0401 arc: D5 V02S0401 arc: D6 H02W0201 arc: D7 N1_V02S0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q2 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F2 arc: LSR0 H02E0501 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H00L0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: N3_V06N0303 F6 arc: S1_V02S0501 Q7 arc: W1_H02W0301 Q3 word: SLICEA.K0.INIT 1111111011011100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000011101 word: SLICED.K1.INIT 0101000000110000 word: SLICEB.K1.INIT 1100100011111011 word: SLICED.K0.INIT 0010011111011000 word: SLICEC.K1.INIT 0100011100000000 word: SLICEB.K0.INIT 1111001111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C56:PLC2 arc: H00L0000 H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0401 E1_H01W0000 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V02S0501 arc: A0 N1_V02S0501 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 V00T0000 arc: A5 N1_V01N0101 arc: A6 H02W0701 arc: A7 Q7 arc: B0 V00B0000 arc: B2 H02E0101 arc: B3 H02E0301 arc: B4 H02E0301 arc: B6 H01E0101 arc: B7 E1_H02W0301 arc: C0 N1_V02S0401 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 H02W0401 arc: C5 S1_V02N0001 arc: C6 V02S0201 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 V00B0000 arc: D5 H01W0000 arc: D6 N1_V02S0601 arc: D7 N1_V02S0601 arc: E1_H01E0001 F7 arc: E1_H02E0001 F2 arc: E1_H02E0501 F5 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M0 H01E0001 arc: M1 H00L0100 arc: M2 V00T0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: S1_V02S0001 F0 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0701 Q7 arc: V00B0000 Q4 arc: V01S0000 F4 arc: V01S0100 F6 word: SLICED.K0.INIT 0000000000011011 word: SLICED.K1.INIT 0101001100000000 word: SLICEC.K0.INIT 0001000000010101 word: SLICEA.K0.INIT 1111110111111000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1100111110101111 word: SLICEC.K1.INIT 1111101000001010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C57:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 V06S0303 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0501 W1_H02E0501 arc: V00B0100 H02E0501 arc: V00T0100 N1_V02S0701 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 N3_V06S0003 arc: A0 H02E0701 arc: A1 H02E0701 arc: A3 F5 arc: A5 V00T0000 arc: A7 H02W0701 arc: B0 H01W0100 arc: B1 Q1 arc: B3 V02N0301 arc: B5 H02W0101 arc: B7 N1_V01S0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C3 N1_V01S0100 arc: C5 V02N0001 arc: C7 V01N0101 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D3 V01S0100 arc: D5 H02E0001 arc: D7 H00R0100 arc: E1_H01E0101 Q1 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N3_V06N0003 F3 arc: N3_V06N0203 F7 arc: V00T0000 F0 word: SLICED.K1.INIT 1111111001010100 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEC.K1.INIT 1011000010000000 word: SLICEB.K1.INIT 1011101000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C58:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: H00R0100 V02S0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H06E0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 H02W0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 N3_V06S0203 arc: A0 V02N0501 arc: A1 V02N0701 arc: A2 H02W0701 arc: A4 V02N0101 arc: B0 H00R0100 arc: B2 E1_H01W0100 arc: B4 H02W0101 arc: C0 E1_H01W0000 arc: C1 H00R0100 arc: C2 F4 arc: C4 V00B0100 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 N1_V01S0000 arc: D4 V01N0001 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: M0 E1_H02W0601 arc: W1_H02W0001 F2 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0000001010101010 word: SLICEB.K0.INIT 1010001010100000 word: SLICEA.K0.INIT 1100000011010001 word: SLICEA.K1.INIT 1111000011110101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R28C59:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 V02S0201 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 V01N0001 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: V00T0000 H02E0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 V06S0103 arc: W1_H02W0701 N1_V02S0701 arc: A0 H00L0100 arc: A2 V02S0501 arc: A3 H00L0100 arc: A4 V00T0100 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 H02E0501 arc: B0 H02E0301 arc: B1 V02N0301 arc: B2 W1_H02E0101 arc: B3 H00R0100 arc: B4 N1_V01S0000 arc: B5 N1_V02S0501 arc: B6 H02E0301 arc: B7 V00B0100 arc: C0 N1_V01N0001 arc: C1 F4 arc: C2 N1_V01S0100 arc: C3 N1_V01N0001 arc: C4 W1_H02E0401 arc: C5 W1_H02E0401 arc: C6 Q6 arc: C7 E1_H02W0401 arc: CE0 V02N0201 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 F2 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: D4 N1_V02S0401 arc: D5 V00B0000 arc: D6 H02E0201 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q5 arc: S1_V02S0301 Q3 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 Q0 arc: V01S0100 F7 arc: W1_H02W0101 F3 arc: W1_H02W0501 F5 word: SLICEB.K1.INIT 0000000000011101 word: SLICEC.K1.INIT 0100000001001100 word: SLICEB.K0.INIT 0000000001000111 word: SLICEC.K0.INIT 0010000000101010 word: SLICEA.K1.INIT 1100110011000000 word: SLICEA.K0.INIT 0000000000011101 word: SLICED.K0.INIT 0100011100000000 word: SLICED.K1.INIT 1000101010000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C60:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 N1_V01S0000 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 E1_H01W0000 arc: V00B0100 V02N0101 arc: V00T0100 H02E0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V02S0701 arc: A6 H00L0000 arc: A7 Q7 arc: B1 Q1 arc: C1 N1_V01N0001 arc: C6 Q6 arc: C7 V00T0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V02S0001 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: E1_H02E0601 F6 arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M5 H02W0001 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N1_V02N0301 F1 arc: V00T0000 Q2 word: SLICED.K1.INIT 1010101011110000 word: SLICEA.K1.INIT 1111000011001100 word: SLICED.K0.INIT 1111000010101010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R28C61:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 W1_H02E0201 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 N1_V01S0100 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0203 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02N0401 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 N1_V02S0101 arc: A5 V02S0301 arc: B0 H00R0100 arc: B1 H02W0301 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 V02S0501 arc: B5 H02W0101 arc: B6 V02N0501 arc: C0 H02E0401 arc: C1 H00R0100 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V00T0000 arc: C5 W1_H02E0601 arc: C6 Q6 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H02E0201 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 V02S0401 arc: D5 H02W0201 arc: D6 H02W0001 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: H00R0100 Q5 arc: H01W0000 F0 arc: H01W0100 F4 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 H02E0601 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 W1_H02E0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F4 arc: N3_V06N0103 F2 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: V00B0000 F6 arc: V01S0100 F4 arc: W1_H02W0501 F5 arc: W1_H02W0601 F4 word: SLICEC.K1.INIT 0000000000100000 word: SLICEC.K0.INIT 0000000000001000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1110001011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R28C62:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V01S0100 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 S1_V02N0601 arc: V00B0000 V02N0001 arc: V00T0000 V02N0401 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0701 V02S0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 V02S0301 arc: B3 Q3 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H02W0201 arc: D3 V02S0001 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: H01W0000 F2 arc: H01W0100 Q5 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H02E0201 arc: M5 H00R0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q3 arc: N3_V06N0003 F0 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1010111111001111 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C63:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 H02W0001 arc: H00R0000 H02W0401 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06W0203 arc: V00B0000 V02N0001 arc: V00T0000 H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 E1_H01E0001 arc: A3 E1_H01E0001 arc: B0 H02E0301 arc: B1 V02S0101 arc: B2 H02E0301 arc: B3 V02S0101 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: CE0 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02E0001 arc: D2 V02S0201 arc: D3 V02S0001 arc: E1_H01E0001 Q3 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: H00R0100 Q5 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M3 H00L0000 arc: M5 W1_H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011101111110011 word: SLICEB.K0.INIT 1110001000000000 word: SLICEB.K1.INIT 1111001110111011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C64:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02E0601 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 E1_H01W0000 arc: V00B0000 V02N0201 arc: V00T0000 S1_V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 N1_V01S0000 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A1 N1_V02S0501 arc: A2 H00L0100 arc: A3 V02N0501 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B2 H00R0100 arc: B3 Q3 arc: B6 V02N0701 arc: C0 N1_V01S0100 arc: C1 E1_H02W0601 arc: C2 E1_H02W0401 arc: C3 E1_H02W0601 arc: C6 Q6 arc: C7 V01N0101 arc: CE0 N1_V02S0201 arc: CE1 W1_H02E0101 arc: CE2 H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02S0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0100 Q1 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00B0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: V00B0100 F7 arc: V01S0100 Q5 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1010101011110000 word: SLICEB.K0.INIT 1100000010100000 word: SLICEB.K1.INIT 1010111111001111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C65:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0401 E3_H06W0203 arc: H00L0100 V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E3_H06W0003 arc: N3_V06N0003 H01E0001 arc: N3_V06N0103 H01E0101 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02N0201 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 V02N0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H01E0001 arc: A1 H00L0000 arc: A4 V00T0100 arc: A5 Q5 arc: A6 V02S0301 arc: B0 V00T0000 arc: B1 Q1 arc: B4 V00B0100 arc: B5 V01S0000 arc: C0 H02W0601 arc: C1 H02W0401 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 Q6 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 V01N0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 V00B0000 arc: M3 E1_H02W0201 arc: M4 E1_H02W0401 arc: M5 H00L0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F6 arc: N3_V06N0203 F4 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V00T0100 Q3 arc: V01S0000 Q3 word: SLICEA.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 1100111110101111 word: SLICED.K0.INIT 1111010110100000 word: SLICEC.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 1010110011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C66:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 V02N0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 V01N0001 arc: N3_V06N0303 H01E0101 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 N1_V01S0000 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A4 N1_V02S0301 arc: A7 V00T0100 arc: B0 H01W0100 arc: B1 Q1 arc: B2 V02S0101 arc: B3 V02S0301 arc: B4 V02S0501 arc: B7 V02S0501 arc: C0 N1_V01N0001 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 V00T0100 arc: C7 N1_V02S0201 arc: CE0 V02N0201 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V02S0001 arc: D2 E1_H02W0001 arc: D3 V02S0201 arc: D4 W1_H02E0201 arc: D7 W1_H02E0201 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H00R0100 Q5 arc: H01W0000 F4 arc: H01W0100 Q7 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: M5 W1_H02E0001 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N3_V06N0103 F2 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0001 F0 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 word: SLICED.K1.INIT 0000000010000000 word: SLICEC.K0.INIT 0000000010000000 word: SLICEA.K0.INIT 1100110011110000 word: SLICEB.K0.INIT 1100000010001000 word: SLICEB.K1.INIT 1110001011111111 word: SLICEA.K1.INIT 1010101011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 .tile R28C67:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02N0501 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H06E0303 arc: N3_V06N0303 H06W0303 arc: S1_V02S0301 H06W0003 arc: V00B0100 H02W0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 H01E0001 arc: A5 Q5 arc: B0 H00R0100 arc: C0 H00L0000 arc: C5 V00T0100 arc: CE0 H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D5 H02W0001 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H00R0100 Q7 arc: M0 V00B0100 arc: M1 H00L0100 arc: M5 H00L0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0501 F5 arc: V00T0100 Q1 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1100110011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R28C68:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: H00R0000 H02W0401 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0601 E1_H01W0000 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 E1_H01E0001 arc: A3 V00B0000 arc: A5 Q5 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 Q3 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 W1_H02E0401 arc: C3 W1_H02E0601 arc: C5 V02S0001 arc: CE0 V02S0201 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 V01S0100 arc: D3 V02S0001 arc: D5 V01N0001 arc: E1_H01E0001 Q3 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: M0 V00T0100 arc: M1 H02W0001 arc: M2 V00B0100 arc: M3 E1_H02W0201 arc: M4 H02E0401 arc: M5 E1_H02W0001 arc: M6 E1_H02W0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q4 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: V00B0000 Q6 arc: V00B0100 F5 arc: V01S0100 Q6 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICEC.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 1100111110101111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R28C69:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0103 N1_V01S0100 arc: H00R0000 E1_H02W0401 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E1_H02W0301 arc: A0 H00L0100 arc: A1 H00L0100 arc: A4 V00T0100 arc: A5 Q5 arc: A6 N1_V02S0301 arc: B0 V02S0301 arc: B1 H02E0301 arc: B6 H02W0301 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C4 Q4 arc: C5 V02S0001 arc: C6 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D4 H02E0001 arc: D5 V00B0000 arc: D6 E1_H02W0201 arc: E1_H01E0001 F6 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H01W0000 F6 arc: H01W0100 F6 arc: M0 V00B0100 arc: M1 H02W0001 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N3_V06N0003 F0 arc: N3_V06N0203 F4 arc: V00B0000 Q6 arc: V00T0100 Q3 arc: W1_H02W0401 F6 word: SLICED.K0.INIT 0001000000000000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1110001011111111 word: SLICEC.K0.INIT 1111000010101010 word: SLICEC.K1.INIT 1010111110100000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R28C70:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0203 H01E0001 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 V01N0001 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 H00L0100 arc: A5 Q5 arc: A7 H02E0501 arc: B0 V02S0301 arc: B1 Q1 arc: B5 E1_H02W0301 arc: B7 H02E0301 arc: C0 N1_V01N0001 arc: C1 E1_H02W0601 arc: C7 E1_H02W0401 arc: CE0 V02S0201 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02S0001 arc: D5 W1_H02E0001 arc: D7 H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q2 arc: H01W0100 Q6 arc: M0 V00B0100 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M5 H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q1 arc: N1_V02N0701 F5 arc: V01S0000 F7 arc: V01S0100 F7 word: SLICED.K1.INIT 0001000000000000 word: SLICEC.K1.INIT 1010101011001100 word: SLICEA.K0.INIT 1011100000000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R28C71:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0103 N1_V01S0100 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 V01N0001 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02S0701 arc: W3_H06W0203 V01N0001 arc: A0 S1_V02N0501 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: C1 V02N0601 arc: CE0 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q1 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q1 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q0 arc: N3_V06N0103 Q1 arc: V01S0000 Q0 arc: V01S0100 Q0 arc: W1_H02W0301 Q1 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1000100000100010 word: SLICEA.K1.INIT 1100000000110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R28C72:PLC2 arc: H00L0100 W1_H02E0301 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 H01E0001 arc: N3_V06N0303 H01E0101 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: A0 H02E0501 arc: A2 H02E0501 arc: A4 V00T0000 arc: A7 Q7 arc: B0 H02E0301 arc: B2 H02E0301 arc: C0 V02S0401 arc: C2 N1_V02S0401 arc: C4 Q4 arc: C7 V00T0100 arc: CE0 H00L0000 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V00B0100 arc: D4 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 F4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0100 F2 arc: M0 V00B0000 arc: M1 H00L0100 arc: M3 H00R0100 arc: M4 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F7 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: V00T0000 Q0 arc: V00T0100 Q1 arc: W1_H02W0001 F0 arc: W1_H02W0301 Q3 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0100000000000000 word: SLICEB.K0.INIT 0100000000000000 word: SLICEC.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1111000010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R28C73:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 N1_V01S0100 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 E1_H02W0401 arc: W1_H02W0101 V02N0101 arc: W1_H02W0701 V02S0701 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: LSR1 V00B0000 arc: M3 E1_H02W0201 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: V01S0000 Q3 arc: W1_H02W0301 Q3 arc: W3_H06W0003 Q3 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C74:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 H02W0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0701 N1_V02S0601 arc: A5 V00T0100 arc: B3 H02W0101 arc: B5 H02E0301 arc: C0 H02W0401 arc: C3 H00L0000 arc: C5 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D3 H02E0201 arc: D5 S1_V02N0601 arc: E1_H02E0001 Q0 arc: E1_H02E0501 F5 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: MUXCLK0 CLK0 arc: N3_V06N0003 Q0 arc: V00T0100 F3 word: SLICEB.K1.INIT 0000000011001111 word: SLICEA.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0010001000000010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C75:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0701 N3_V06S0203 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02E0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H02W0501 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 N3_V06S0203 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 S1_V02N0501 arc: A5 V00B0000 arc: B0 V00B0000 arc: B5 S1_V02N0701 arc: C0 H02E0601 arc: C5 H02E0401 arc: CE0 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D5 E1_H02W0001 arc: E1_H01E0001 F0 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N3_V06N0003 Q0 arc: V01S0000 F0 word: SLICEC.K1.INIT 0010011100000000 word: SLICEA.K0.INIT 1011100000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C76:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0601 N1_V01S0000 arc: H00R0000 V02N0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 H02E0001 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H01E0001 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0001 arc: W1_H02W0501 N3_V06S0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00R0000 arc: A2 F7 arc: A7 W1_H02E0501 arc: B0 V02N0301 arc: B2 V02N0301 arc: B4 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 H02E0401 arc: C2 V02N0601 arc: C4 V00T0000 arc: C7 V01N0101 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 V02N0001 arc: D4 H02E0201 arc: D7 W1_H02E0001 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0201 Q0 arc: N3_V06N0003 Q0 arc: V01S0000 F4 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 1100000000000000 word: SLICEA.K0.INIT 1110000010100000 word: SLICED.K1.INIT 0000001000001010 word: SLICEB.K0.INIT 0000001000001010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R28C77:PLC2 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0003 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 N1_V02S0601 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02E0101 arc: W1_H02W0101 H01E0101 arc: A1 S1_V02N0701 arc: A2 S1_V02N0501 arc: A4 W1_H02E0501 arc: A7 V00T0100 arc: B1 V02S0301 arc: B2 H01W0100 arc: B4 H02E0101 arc: B7 W1_H02E0101 arc: C1 V02N0601 arc: C2 N1_V01S0100 arc: C4 H02E0601 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D2 W1_H02E0001 arc: D4 W1_H02E0201 arc: D7 H00R0100 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: N1_V02N0201 F0 arc: N1_V02N0401 F4 arc: W1_H02W0001 Q2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000100000000000 word: SLICEC.K0.INIT 0101000100010001 word: SLICED.K1.INIT 0000000011110111 word: SLICEB.K0.INIT 1011001111111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R28C78:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V06S0303 arc: H00L0000 V02S0001 arc: H00R0100 N1_V02S0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 N1_V02S0601 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: A0 H00R0000 arc: A1 H00R0000 arc: B1 H00R0100 arc: C0 H00R0100 arc: C1 H00L0000 arc: C2 N1_V01S0100 arc: C4 Q4 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 V00B0100 arc: D4 W1_H02E0001 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: E3_H06E0103 F2 arc: E3_H06E0203 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H00R0000 Q4 arc: M0 V00B0000 arc: M4 E1_H01E0101 arc: MUXCLK2 CLK0 arc: N1_V02N0001 F2 arc: N1_V02N0601 F4 arc: N3_V06N0203 F4 arc: V01S0000 Q4 word: SLICEC.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1111000011111010 word: SLICEA.K1.INIT 1111110011111110 word: SLICEB.K0.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R28C79:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: H00L0000 H02E0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06W0003 arc: S1_V02S0001 H06W0003 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: W1_H02W0401 E1_H02W0101 arc: A7 Q7 arc: B0 V02S0101 arc: B7 V00T0000 arc: C7 V00T0100 arc: CE0 V02S0201 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D7 V01N0001 arc: E1_H01E0001 Q5 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M2 V00B0000 arc: M3 H01W0100 arc: M4 V00B0100 arc: M5 H00R0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00T0000 Q2 arc: V00T0100 Q3 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 1111111100110011 word: SLICED.K1.INIT 0000000100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R28C80:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0003 W3_H06E0003 arc: H00R0000 W1_H02E0601 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0701 V01N0101 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02W0101 arc: V00B0000 N1_V02S0201 arc: V00T0100 H02W0101 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0501 N1_V02S0501 arc: A1 V02S0501 arc: A4 V00T0000 arc: B0 H02W0101 arc: B2 H02W0101 arc: B3 H02W0101 arc: B4 H00L0000 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 V02N0001 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V00T0100 arc: D2 N1_V01S0000 arc: D3 V02S0201 arc: D4 H01W0000 arc: E1_H01E0101 Q0 arc: E1_H02E0601 F4 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00L0000 Q0 arc: H01W0000 Q3 arc: LSR0 V00B0000 arc: LSR1 H02E0301 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: N1_V02N0101 Q1 arc: V00T0000 Q2 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1111110000000000 word: SLICEB.K0.INIT 1111110000000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K1.INIT 1111110000000000 word: SLICEC.K0.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R28C81:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: H00L0000 H02W0201 arc: H00R0100 H02E0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 W1_H02E0301 arc: N3_V06N0203 H06E0203 arc: S1_V02S0001 E1_H02W0001 arc: V00B0000 H02E0601 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N1_V02S0301 arc: A1 F5 arc: A5 V00T0100 arc: A7 V02S0301 arc: B0 N1_V02S0101 arc: B1 H00R0100 arc: C1 H00L0000 arc: C5 S1_V02N0201 arc: C7 V02S0001 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H02W0001 arc: D5 V00B0000 arc: D7 V01N0001 arc: E3_H06E0103 Q1 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q1 arc: N3_V06N0103 Q1 arc: V00T0100 Q1 arc: V01S0000 Q0 arc: V01S0100 Q1 word: SLICED.K1.INIT 0101000000000000 word: SLICEC.K1.INIT 0000000000001010 word: SLICEA.K0.INIT 1111111111001100 word: SLICEA.K1.INIT 0010001100100010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R28C82:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0601 W1_H02E0601 arc: H00L0100 E1_H02W0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0201 E3_H06W0103 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0100 arc: A3 H02W0501 arc: A4 V02N0101 arc: A6 E1_H01W0000 arc: A7 H00L0000 arc: B0 W1_H02E0101 arc: B1 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 N1_V01S0000 arc: C0 V02N0601 arc: C1 V02N0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V02N0001 arc: C6 E1_H02W0601 arc: C7 V00T0000 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 H02W0001 arc: D2 N1_V01S0000 arc: D3 V02N0201 arc: D4 V02N0401 arc: D6 V02N0401 arc: D7 E1_H01W0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0101 F1 arc: E1_H02E0201 Q2 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 F7 arc: H01W0100 F0 arc: LSR0 V00T0100 arc: LSR1 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F1 arc: N1_V02N0101 F1 arc: N1_V02N0301 F1 arc: N1_V02N0401 F6 arc: N1_V02N0601 F6 arc: S1_V02S0001 Q0 arc: S1_V02S0401 F4 arc: V01S0000 Q0 arc: V01S0100 F3 arc: W1_H02W0101 F3 arc: W1_H02W0201 Q0 arc: W3_H06W0003 F3 word: SLICED.K1.INIT 0000000000000101 word: SLICED.K0.INIT 0000000000000101 word: SLICEA.K0.INIT 1111110100000000 word: SLICEA.K1.INIT 0000000000000011 word: SLICEB.K1.INIT 0000001000000000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEC.K0.INIT 0001001101011111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX INV enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R28C83:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E3_H06E0103 V01N0101 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: V00T0000 H02W0201 arc: W1_H02W0201 H01E0001 arc: A0 F5 arc: A2 E1_H02W0701 arc: A5 E1_H01W0000 arc: A7 V02N0101 arc: B0 W1_H02E0301 arc: B6 V02N0701 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 E1_H02W0401 arc: C2 H02W0601 arc: C3 H02E0601 arc: C4 Q4 arc: C6 H01E0001 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 H00R0000 arc: D3 H02W0201 arc: D4 H00R0100 arc: D5 H02W0001 arc: D6 E1_H02W0001 arc: D7 V01N0001 arc: E1_H01E0001 F3 arc: E1_H01E0101 F0 arc: E1_H02E0001 Q2 arc: E1_H02E0501 F7 arc: E1_H02E0601 F6 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q4 arc: M0 V00B0000 arc: M4 E1_H01E0101 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F5 arc: S1_V02S0001 Q2 arc: S1_V02S0101 F3 arc: V00B0000 F4 arc: V01S0000 F3 arc: V01S0100 Q4 arc: W1_H02W0001 Q2 arc: W1_H02W0501 F7 word: SLICEC.K1.INIT 0000000001010101 word: SLICEC.K0.INIT 0000000011110000 word: SLICED.K0.INIT 0000110000000000 word: SLICED.K1.INIT 0000000000010101 word: SLICEB.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0000010000001111 word: SLICEA.K1.INIT 0000111100001111 word: SLICEB.K0.INIT 0000000011110101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R28C84:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02E0601 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: A1 H00L0100 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: A6 H00L0000 arc: A7 H00L0000 arc: B1 V00T0000 arc: B2 H02E0301 arc: B4 W1_H02E0101 arc: B5 E1_H02W0101 arc: B6 H02E0301 arc: B7 V00T0000 arc: C0 H00L0000 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 Q2 arc: D3 V01S0100 arc: D4 V00B0000 arc: D5 H00L0100 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: E1_H02E0501 F5 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H01W0000 Q1 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: S1_V02S0401 F6 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: V01S0100 F4 arc: W1_H02W0001 Q2 arc: W1_H02W0101 F3 arc: W1_H02W0301 Q1 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 1111101111111111 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 0110101000000000 word: SLICEB.K0.INIT 0000110011000000 word: SLICED.K1.INIT 1111000010110000 word: SLICEB.K1.INIT 0000111111111111 word: SLICEC.K0.INIT 0000000000000100 word: SLICEC.K1.INIT 1100110010001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C85:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 W1_H02E0701 arc: H00R0000 H02W0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 H02E0501 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 N1_V02S0401 arc: A0 F7 arc: A2 W1_H02E0701 arc: A5 E1_H01W0000 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B2 V02N0301 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: B7 V00T0000 arc: C0 H02W0601 arc: C1 F4 arc: C2 H02E0601 arc: C4 V02N0001 arc: C5 H02E0401 arc: C7 H02W0601 arc: CE0 H00L0100 arc: CE1 W1_H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 H01E0101 arc: D2 S1_V02N0001 arc: D4 H02E0201 arc: D5 H02E0201 arc: D7 W1_H02E0201 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V02N0601 F4 arc: S1_V02S0301 F1 arc: V01S0000 F4 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 1111111111101010 word: SLICEB.K0.INIT 1101111111001111 word: SLICEC.K0.INIT 1111000000110000 word: SLICED.K1.INIT 1110001000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K1.INIT 0001010101010101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET SET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R28C86:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 H02E0701 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0501 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 H02E0501 arc: A2 F5 arc: A4 H02E0701 arc: A7 F5 arc: B0 V02S0101 arc: B4 H02E0301 arc: B5 H00R0000 arc: B7 F3 arc: C0 H00L0000 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 V02S0201 arc: C5 V02N0201 arc: C6 V02S0201 arc: C7 H02E0401 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 H00R0000 arc: D3 V02N0201 arc: D4 W1_H02E0001 arc: D5 H02W0201 arc: D6 W1_H02E0001 arc: D7 H00L0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0501 F7 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F2 arc: H01W0100 F7 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M4 V00T0000 arc: M5 H02E0001 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N3_V06N0203 F7 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S3_V06S0203 Q4 arc: V00T0000 F0 arc: V01S0000 Q6 arc: V01S0100 F7 arc: W1_H02W0101 F3 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 1010000000100000 word: SLICEA.K1.INIT 1111111111111111 word: SLICEA.K0.INIT 1110110010100000 word: SLICEB.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 1100110000001100 word: SLICEB.K0.INIT 0000010101010101 word: SLICEC.K0.INIT 0111000001110111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R28C87:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 W3_H06E0203 arc: H00R0000 V02N0401 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0101 H06E0103 arc: S1_V02S0701 W3_H06E0203 arc: V00B0100 V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: A0 V02S0701 arc: A1 N1_V02S0501 arc: B0 S1_V02N0301 arc: B1 V02S0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 S1_V02N0001 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M2 E1_H02W0601 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 word: SLICEA.K1.INIT 1110110010100000 word: SLICEA.K0.INIT 1110110010100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R28C88:PLC2 arc: H00L0000 V02S0201 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 H01E0101 arc: S3_V06S0103 H06E0103 arc: V00B0000 S1_V02N0201 arc: V00T0100 V02N0701 arc: W1_H02W0101 H01E0101 arc: W1_H02W0401 V02N0401 arc: A0 H02E0701 arc: A1 V01N0101 arc: B0 V00T0000 arc: C1 H00L0100 arc: CE0 W1_H02E0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H00L0100 Q3 arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: M3 H01W0100 arc: M4 V00B0000 arc: M5 H00R0100 arc: M6 H02W0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1010101011001100 word: SLICEA.K1.INIT 1010101011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C28:PLC2 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0103 .tile R29C30:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02W0401 .tile R29C31:PLC2 arc: E1_H02E0701 E3_H06W0203 arc: H00R0000 H02W0601 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0701 N3_V06S0203 arc: V00B0000 H02W0601 arc: V00T0100 V02N0501 arc: W1_H02W0401 N3_V06S0203 arc: B6 V01S0000 arc: C6 Q6 arc: CE0 V02S0201 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D6 E1_H02W0001 arc: F6 F6_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M1 H00R0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N1_V02N0601 F6 arc: V01S0000 Q1 word: SLICED.K0.INIT 1100110011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R29C32:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V06S0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0001 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V06S0103 arc: W1_H02W0601 V06S0303 arc: B2 H00R0000 arc: C2 H00L0000 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 S1_V02N0201 arc: E1_H01E0001 F2 arc: F2 F2_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0401 Q6 word: SLICEB.K0.INIT 1111000011001100 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R29C33:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V06S0203 arc: H00R0000 H02W0601 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 V02S0601 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 V00T0000 arc: B1 V02N0101 arc: C0 N1_V02S0601 arc: C1 H00L0000 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 S1_V02N0001 arc: F0 F5A_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: LSR1 V00T0100 arc: M0 H01E0001 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N3_V06N0003 F0 arc: V00T0000 Q2 word: SLICEA.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 1011101111110011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C34:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V06S0103 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0601 S1_V02N0601 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: V00B0000 E1_H02W0601 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 S1_V02N0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 E1_H02W0601 arc: M2 V00T0000 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q4 arc: V01S0100 Q2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C35:PLC2 arc: H00L0000 W1_H02E0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 H06W0003 arc: V00T0100 N1_V02S0701 arc: W1_H02W0601 H01E0001 arc: B1 Q1 arc: C1 H00L0100 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: E1_H01E0001 F1 arc: F1 F1_SLICE arc: H00L0100 Q3 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0301 arc: M1 H00L0000 arc: M2 V00T0100 arc: M3 W1_H02E0201 arc: M6 E1_H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q2 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 word: SLICEA.K1.INIT 1100110011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R29C36:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06S0103 arc: E1_H02E0401 V06S0203 arc: H00R0100 V02S0701 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 N3_V06S0203 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02S0101 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V02S0701 arc: A7 Q7 arc: C7 S1_V02N0001 arc: CE0 V02S0201 arc: CE2 W1_H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D7 H01W0000 arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 V00B0100 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M4 V00B0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V02N0501 F7 word: SLICED.K1.INIT 1111101000001010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R29C37:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V06S0103 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 N3_V06S0203 arc: H00L0000 S1_V02N0001 arc: H00R0000 H02W0401 arc: H00R0100 H02W0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0203 N3_V06S0203 arc: A5 Q5 arc: B1 Q1 arc: C1 H00L0100 arc: C5 V00B0100 arc: CE0 H02W0101 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D5 H02E0001 arc: F1 F1_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M1 H00L0000 arc: M3 H00L0000 arc: M5 H02W0001 arc: M6 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0301 F1 arc: N1_V02N0601 Q6 arc: V00B0100 Q7 word: SLICEC.K1.INIT 1010101011110000 word: SLICEA.K1.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R29C38:PLC2 arc: H00L0000 E1_H02W0201 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02W0201 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V06S0303 arc: W3_H06W0003 E1_H02W0301 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: B0 H00R0100 arc: B1 Q1 arc: B3 Q3 arc: C0 V02N0401 arc: C1 W1_H02E0401 arc: C3 N1_V01N0001 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 W1_H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02N0201 arc: D3 V02S0001 arc: E1_H01E0001 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: H00L0100 Q1 arc: H00R0100 Q5 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M1 H02E0001 arc: M3 H02E0201 arc: M5 H02E0001 arc: M6 V00B0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V02N0501 Q7 arc: N3_V06N0003 F0 arc: V00T0100 F3 word: SLICEB.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C39:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 N3_V06S0003 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0203 E1_H01W0000 arc: V00B0100 E1_H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: A2 V00B0000 arc: A7 Q7 arc: C2 H00L0000 arc: C7 S1_V02N0001 arc: CE0 S1_V02N0201 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D7 H01W0000 arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0001 F2 arc: N1_V02N0701 F7 arc: V00B0000 Q4 word: SLICED.K1.INIT 1111101000001010 word: SLICEB.K0.INIT 1111000010101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R29C40:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02W0001 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0303 S3_V06N0303 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V06S0203 arc: W3_H06W0003 E1_H02W0301 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 H01W0100 arc: B1 Q1 arc: B6 V00B0100 arc: C0 V02S0601 arc: C1 E1_H02W0401 arc: C6 Q6 arc: CE0 H02W0101 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D6 H02E0001 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 F0 arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M1 H00R0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00B0000 F6 arc: V00B0100 Q5 word: SLICED.K0.INIT 1111000011001100 word: SLICEA.K0.INIT 1100101000000000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C41:PLC2 arc: E1_H02E0101 V06S0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V06S0303 arc: H00R0000 H02E0601 arc: N1_V02N0001 H02W0001 arc: N1_V02N0601 H02E0601 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V02S0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 V02N0101 arc: B1 Q1 arc: C0 N1_V01N0001 arc: C1 V02N0401 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: H00L0100 Q3 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M1 H02E0001 arc: M3 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q1 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1010111111001111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C42:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V01S0000 arc: H00R0000 W1_H02E0601 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0303 H01E0101 arc: V00B0000 V02S0201 arc: V00B0100 H02W0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 V06S0003 arc: W3_H06W0103 V06S0103 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 V02N0101 arc: B1 H00R0100 arc: C0 H00R0100 arc: C1 N1_V02S0601 arc: CE0 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V02N0201 arc: F0 F5A_SLICE arc: H00L0100 Q1 arc: H00R0100 Q5 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M1 H02W0001 arc: M5 H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F0 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1100101011111111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C43:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 S1_V02N0601 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S3_V06N0303 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: W1_H02W0001 V06S0003 arc: W1_H02W0501 S3_V06N0303 arc: A5 Q5 arc: C5 V00T0000 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D5 H02E0001 arc: F5 F5_SLICE arc: LSR1 V00B0000 arc: M2 V00B0100 arc: M5 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: V00T0000 Q2 arc: W1_H02W0701 F5 word: SLICEC.K1.INIT 1111000010101010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R29C44:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0301 N1_V02S0301 arc: H00L0100 V02S0301 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02E0501 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: A0 V02S0701 arc: A1 F5 arc: A2 V00B0000 arc: A4 N1_V02S0101 arc: A7 V02S0301 arc: B0 N1_V02S0101 arc: B1 H02E0301 arc: B2 H02W0101 arc: B4 V02S0501 arc: B5 V02S0501 arc: B7 N1_V01S0000 arc: C0 N1_V01S0100 arc: C1 H02E0601 arc: C2 N1_V01N0001 arc: C4 V00T0000 arc: C5 V00B0100 arc: D0 H02E0001 arc: D1 V01S0100 arc: D2 F0 arc: D4 H00L0100 arc: D5 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: V00B0000 F4 arc: V01S0100 F7 word: SLICEC.K1.INIT 0011001100001111 word: SLICED.K1.INIT 0101010100110011 word: SLICEA.K1.INIT 1110000000100000 word: SLICEA.K0.INIT 0010001000110000 word: SLICEC.K0.INIT 1010100000001000 word: SLICEB.K0.INIT 0011001100100011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R29C45:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0001 arc: H00L0100 N1_V02S0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02W0701 arc: V00B0000 V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: A2 V00T0000 arc: A5 Q5 arc: A7 N1_V01N0101 arc: B2 V02N0301 arc: B5 S1_V02N0501 arc: B7 H02E0101 arc: C2 N1_V01N0001 arc: C5 S1_V02N0201 arc: C7 H02W0401 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H02W0001 arc: D5 H01W0000 arc: D7 H01W0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0501 F5 arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 H02W0301 arc: M2 V00B0000 arc: M5 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: V00T0000 Q2 word: SLICEC.K1.INIT 0100000001110000 word: SLICEB.K0.INIT 1100000010001000 word: SLICED.K1.INIT 1000110010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C46:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 H01E0001 arc: H00L0000 V02S0201 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 arc: W1_H02W0701 S3_V06N0203 arc: A0 H02E0501 arc: A2 H02E0701 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A6 V02N0301 arc: B0 F3 arc: B1 F3 arc: B2 H02W0301 arc: B3 V02S0301 arc: B4 V01S0000 arc: B5 H01E0101 arc: B6 V00B0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C4 V00T0100 arc: C5 F4 arc: C6 Q6 arc: CE1 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 V00B0100 arc: D2 H02W0001 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 H02W0201 arc: D6 H00L0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F6 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0301 arc: M0 H02W0601 arc: M3 H00R0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: V00T0100 Q3 arc: V01S0000 Q6 arc: V01S0100 Q6 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0001000000010101 word: SLICEB.K1.INIT 0001000000010011 word: SLICED.K0.INIT 0101010000010000 word: SLICEC.K0.INIT 0000000011100100 word: SLICEC.K1.INIT 0000000000000011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C47:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 V01N0101 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H02E0701 arc: V00B0000 H02E0401 arc: V00T0100 E1_H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0501 V01N0101 arc: W3_H06W0203 N3_V06S0203 arc: A0 F5 arc: A1 F5 arc: A2 E1_H01E0001 arc: A3 H02E0501 arc: A4 F7 arc: A5 H02E0501 arc: A6 V02S0101 arc: A7 V02N0301 arc: B0 V00T0000 arc: B2 V02S0301 arc: B3 S1_V02N0301 arc: B4 F3 arc: B5 V00B0100 arc: B6 V02S0501 arc: B7 E1_H02W0301 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 H00L0000 arc: C3 H00L0000 arc: C4 V02N0001 arc: C5 S1_V02N0001 arc: C6 Q6 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CE1 H02E0101 arc: CE2 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 V02N0201 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 E1_H02W0201 arc: D6 H01W0000 arc: D7 V02N0401 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q5 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0301 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 V00B0000 arc: M5 H00R0100 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0401 F4 arc: V00B0100 Q5 arc: V00T0000 F2 arc: V01S0100 Q6 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q1 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 0000001010001010 word: SLICEC.K1.INIT 0011000001010000 word: SLICEB.K0.INIT 0001000100000011 word: SLICEA.K0.INIT 1110000011101111 word: SLICEA.K1.INIT 1111000010100000 word: SLICEB.K1.INIT 0010001000110000 word: SLICED.K1.INIT 1110001000000000 word: SLICEC.K0.INIT 0000000011101111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C48:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 V02S0501 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N3_V06S0303 arc: V00B0000 H02W0601 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0401 N1_V02S0401 arc: A0 H02W0701 arc: A3 V00B0000 arc: B0 V02S0101 arc: B2 F3 arc: B3 H02W0301 arc: C0 E1_H02W0601 arc: C2 E1_H01W0000 arc: C3 V02N0401 arc: D0 F2 arc: D2 H02E0001 arc: D3 V02S0201 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: N3_V06N0003 F0 word: SLICEB.K1.INIT 0000101100001000 word: SLICEB.K0.INIT 0000000000000011 word: SLICEA.K0.INIT 1100000011001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R29C49:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 N3_V06S0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V02S0701 arc: H00L0000 H02E0001 arc: H00L0100 H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0501 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V06S0303 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 V02S0501 arc: A3 H02W0501 arc: A4 N1_V01S0100 arc: A5 E1_H02W0701 arc: A6 N1_V01S0100 arc: A7 H00L0000 arc: B0 F3 arc: B1 F3 arc: B2 E1_H01W0100 arc: B3 V02S0301 arc: B5 E1_H02W0301 arc: B6 V02S0701 arc: B7 H02W0301 arc: C0 H00L0100 arc: C2 V02S0601 arc: C3 E1_H02W0601 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C6 N1_V02S0201 arc: C7 H02W0401 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V02S0201 arc: D2 V01S0100 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 H02E0201 arc: D6 H00R0100 arc: D7 F2 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 F5 arc: N1_V02N0401 F4 arc: W1_H02W0601 Q4 arc: W1_H02W0701 F7 word: SLICEC.K0.INIT 0101010100001111 word: SLICEC.K1.INIT 0000001000010011 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111101110 word: SLICEB.K1.INIT 0000010011000100 word: SLICED.K0.INIT 1010000011000000 word: SLICEB.K0.INIT 1010000011000000 word: SLICED.K1.INIT 0101010101010001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C50:PLC2 arc: E1_H02E0601 N1_V02S0601 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0100 H02E0701 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00B0100 V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 V02S0501 arc: V01S0000 N3_V06S0103 arc: V01S0100 N3_V06S0303 arc: W1_H02W0001 V06S0003 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N3_V06S0003 arc: A0 H02E0501 arc: A1 H02E0501 arc: A3 H02W0701 arc: A4 V02S0101 arc: A5 H02W0701 arc: A6 V00T0100 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 H02E0301 arc: B5 N1_V01S0000 arc: B6 E1_H02W0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C3 H02W0401 arc: C4 E1_H01E0101 arc: C5 V00B0100 arc: C6 V00T0000 arc: C7 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0001 arc: D3 V00B0100 arc: D4 V02S0601 arc: D5 H01W0000 arc: D6 F0 arc: D7 H01W0000 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: M0 H02E0601 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0501 F7 arc: W1_H02W0101 F3 arc: W1_H02W0401 F4 arc: W1_H02W0501 Q7 arc: W1_H02W0601 F6 arc: W1_H02W0701 F5 word: SLICED.K1.INIT 0101000001011111 word: SLICEB.K1.INIT 0000000000100111 word: SLICEC.K1.INIT 0000001000000111 word: SLICEA.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 1101100011111111 word: SLICEC.K0.INIT 0000000010111000 word: SLICED.K0.INIT 1101000010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C51:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0601 V06S0303 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0701 E1_H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 V06S0203 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A2 V00T0000 arc: A3 F5 arc: A5 V02S0101 arc: A7 N1_V01S0100 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 V02N0101 arc: B5 V00B0100 arc: B7 V00T0000 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 H02W0601 arc: C3 H02W0401 arc: C5 V02N0201 arc: C7 S1_V02N0001 arc: CE1 S1_V02N0201 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V02S0001 arc: D3 F2 arc: D5 V02S0401 arc: D7 V02N0601 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M0 V00T0100 arc: M2 H02E0601 arc: M5 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: W1_H02W0501 F7 word: SLICEC.K1.INIT 0000110100001000 word: SLICEB.K0.INIT 1100100000001000 word: SLICEB.K1.INIT 0000000001010000 word: SLICED.K1.INIT 0101000000110000 word: SLICEA.K0.INIT 1110000001000000 word: SLICEA.K1.INIT 1110111101001111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C52:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 V06S0303 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 N1_V02S0601 arc: A1 H00R0000 arc: A2 V00T0000 arc: A4 V00B0000 arc: A5 H02W0701 arc: A6 S1_V02N0101 arc: B1 Q1 arc: B2 E1_H02W0101 arc: B4 H02W0301 arc: B5 V00B0100 arc: B6 V02N0701 arc: C1 H02E0601 arc: C2 H02W0401 arc: C4 V02S0201 arc: C5 F4 arc: C6 E1_H01E0101 arc: CE0 H02E0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 V02S0201 arc: D4 H01W0000 arc: D5 F2 arc: D6 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q1 arc: E1_H02E0601 F6 arc: E1_H02E0701 F5 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00R0000 Q6 arc: H01W0000 Q1 arc: LSR0 E1_H02W0501 arc: M1 H00R0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 word: SLICEA.K1.INIT 0000000000110101 word: SLICED.K0.INIT 0011000100100000 word: SLICEB.K0.INIT 1000100010100000 word: SLICEC.K0.INIT 0011001000000010 word: SLICEC.K1.INIT 0011001100110001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C53:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: V00B0000 H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 V02S0501 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 N3_V06S0203 arc: A0 F5 arc: A1 F5 arc: A2 V00T0000 arc: A3 H02W0701 arc: A4 H02W0701 arc: A5 V02S0301 arc: A6 H02E0701 arc: A7 E1_H01W0000 arc: B0 F3 arc: B1 F3 arc: B2 E1_H01W0100 arc: B3 Q3 arc: B4 H02E0101 arc: B5 V01S0000 arc: B6 S1_V02N0701 arc: B7 H02W0101 arc: C0 H00R0100 arc: C2 V02N0401 arc: C3 H02W0401 arc: C4 V02S0201 arc: C5 H02W0401 arc: C6 F4 arc: C7 V02S0001 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0001 arc: D2 V02S0201 arc: D3 W1_H02E0001 arc: D4 H02E0001 arc: D5 E1_H01W0100 arc: D6 F2 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q5 arc: E1_H02E0301 Q3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 H01E0001 arc: M3 H00L0100 arc: M5 E1_H02W0001 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F6 arc: V01S0000 Q5 word: SLICEA.K1.INIT 1111111111101110 word: SLICED.K1.INIT 0011000001010000 word: SLICEC.K1.INIT 0000001010100010 word: SLICEB.K1.INIT 0000000000110101 word: SLICEA.K0.INIT 1111000011101110 word: SLICEB.K0.INIT 1101100000000000 word: SLICEC.K0.INIT 0000110000001010 word: SLICED.K0.INIT 1010101010101000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C54:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H02W0701 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06S0303 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 F5 arc: A3 F5 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 V02N0101 arc: A7 Q7 arc: B0 V02N0301 arc: B2 H02W0301 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 V00B0000 arc: B7 H01E0101 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 F4 arc: C3 S1_V02N0601 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 H01E0001 arc: C7 V02N0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00B0100 arc: D2 S1_V02N0001 arc: D3 V01S0100 arc: D4 N1_V02S0401 arc: D5 N1_V02S0401 arc: D6 F0 arc: D7 N1_V02S0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 Q7 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0501 arc: M0 H02W0601 arc: M1 H02W0001 arc: M2 W1_H02E0601 arc: M3 H02E0201 arc: M5 H02W0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: N3_V06N0303 F6 arc: V01S0000 Q1 arc: V01S0100 F7 arc: W1_H02W0101 Q1 arc: W1_H02W0701 Q5 word: SLICEA.K1.INIT 1111111111111010 word: SLICEA.K0.INIT 1111111000110010 word: SLICED.K0.INIT 0000001010001010 word: SLICEC.K0.INIT 1100000010100000 word: SLICED.K1.INIT 0101000000110000 word: SLICEC.K1.INIT 0000001100000101 word: SLICEB.K0.INIT 0000111111101110 word: SLICEB.K1.INIT 0000111100001010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C55:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0303 N3_V06S0303 arc: H00R0000 H02E0601 arc: H00R0100 V02S0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N3_V06S0303 arc: N3_V06N0303 S3_V06N0203 arc: V00B0100 N1_V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 H01E0101 arc: A0 H02E0501 arc: A2 H02W0501 arc: A4 E1_H02W0501 arc: B0 E1_H02W0301 arc: B2 H02W0301 arc: B4 V02S0501 arc: C0 S1_V02N0401 arc: C2 H00R0100 arc: C4 V00T0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 V02N0201 arc: D4 V00B0000 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: LSR1 V00T0000 arc: M4 V00B0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q4 arc: V00B0000 Q4 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 0100000001001100 word: SLICEC.K0.INIT 0010000001110000 word: SLICEB.K0.INIT 1010000010001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C56:PLC2 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 W1_H02E0701 arc: V00B0100 N1_V02S0101 arc: V00T0100 V02N0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 N3_V06S0203 arc: A0 E1_H01E0001 arc: A2 S1_V02N0501 arc: A3 H02E0501 arc: A4 V02N0101 arc: A5 V02S0101 arc: A6 V02S0101 arc: A7 F5 arc: B0 H02E0301 arc: B1 S1_V02N0101 arc: B2 H02W0101 arc: B3 V02S0301 arc: B4 H02W0101 arc: B5 V02S0701 arc: B6 H02W0301 arc: B7 F3 arc: C0 N1_V01S0100 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 V02S0401 arc: C4 Q4 arc: C5 S1_V02N0201 arc: C6 H02W0401 arc: C7 V02S0001 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 Q2 arc: D3 S1_V02N0201 arc: D4 S1_V02N0401 arc: D5 S1_V02N0601 arc: D6 N1_V02S0401 arc: D7 V02N0601 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q2 arc: E1_H02E0401 Q4 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q4 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F0 arc: V00B0000 F6 arc: V01S0100 Q1 word: SLICED.K0.INIT 0100000001001100 word: SLICEB.K0.INIT 0000000100100011 word: SLICEC.K0.INIT 0000110001000100 word: SLICEA.K0.INIT 1111001111100010 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K1.INIT 0000000000011011 word: SLICEC.K1.INIT 0011000001010000 word: SLICED.K1.INIT 1110111000001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C57:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V01N0001 arc: H00L0000 H02E0201 arc: H00R0100 H02E0501 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H01E0101 arc: N3_V06N0303 E3_H06W0303 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 S1_V02N0501 arc: A2 H02E0701 arc: A3 H02W0501 arc: A4 F5 arc: A5 V02N0301 arc: A7 H02W0501 arc: B1 F3 arc: B2 H02E0101 arc: B3 H00L0000 arc: B4 V02S0501 arc: B7 H02E0101 arc: C1 E1_H02W0401 arc: C3 H00R0100 arc: C4 H02W0401 arc: C5 H02E0601 arc: C7 H02E0401 arc: D1 V00B0100 arc: D2 H02W0201 arc: D3 V02N0201 arc: D4 F2 arc: D5 H02E0201 arc: D7 V01N0001 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F4 arc: N1_V02N0301 F1 arc: V00B0100 F7 word: SLICEB.K0.INIT 0011001101010101 word: SLICEC.K1.INIT 0000101001011111 word: SLICEC.K0.INIT 0010001100100000 word: SLICED.K1.INIT 1010000010001000 word: SLICEB.K1.INIT 0100010001010000 word: SLICEA.K1.INIT 0000000000000011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R29C58:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 N3_V06S0303 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: N1_V01N0001 N3_V06S0003 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 H06E0303 arc: N3_V06N0203 S3_V06N0103 arc: V00B0000 E1_H02W0401 arc: V00T0000 N1_V02S0401 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: A1 N1_V02S0501 arc: A2 V02N0501 arc: A3 F5 arc: A4 V00T0100 arc: A5 Q5 arc: A6 V02N0301 arc: A7 Q7 arc: B1 Q1 arc: B2 N1_V02S0301 arc: B3 H01W0100 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 N1_V02S0501 arc: B7 S1_V02N0701 arc: C1 H02E0601 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C4 V02S0001 arc: C5 H02E0401 arc: C6 V00B0100 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D2 V02N0001 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 H00R0100 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 Q5 arc: H01W0100 F4 arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M5 H02E0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0501 F7 arc: N1_V02N0701 F7 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q2 arc: V01S0100 Q2 word: SLICEC.K1.INIT 0100000001001100 word: SLICEC.K0.INIT 0000001100000101 word: SLICEB.K1.INIT 0000000011110001 word: SLICED.K1.INIT 1110000000100000 word: SLICEB.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 0101010000000100 word: SLICED.K0.INIT 1100010010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C59:PLC2 arc: H00R0100 H02E0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0401 N3_V06S0203 arc: A0 H00R0000 arc: A4 V02S0301 arc: B0 V02N0301 arc: B1 V01N0001 arc: B4 N1_V01S0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C4 E1_H02W0401 arc: D0 H01E0101 arc: D1 H00R0000 arc: D4 H00R0100 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: H00R0000 F4 arc: M0 H01E0001 arc: N1_V01N0001 F0 word: SLICEC.K0.INIT 0000000011001010 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1111111111110011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R29C60:PLC2 arc: N1_V02N0101 H06W0103 arc: N3_V06N0203 H06W0203 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N1_V02S0401 .tile R29C61:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0501 V02S0501 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H06W0303 arc: V00B0100 V02S0101 arc: W1_H02W0401 N3_V06S0203 arc: B0 V00T0000 arc: C0 H00L0000 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: H00L0000 Q2 arc: M0 V00B0100 arc: M2 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0501 Q7 arc: V00T0000 Q0 word: SLICEA.K0.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R29C62:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: H00R0100 H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: V00B0000 E1_H02W0601 arc: W1_H02W0001 N1_V02S0001 arc: A4 N1_V02S0301 arc: C4 Q4 arc: CE0 H00R0100 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D4 H01W0000 arc: F4 F4_SLICE arc: H01W0000 Q0 arc: M0 E1_H02W0601 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V02N0401 F4 word: SLICEC.K0.INIT 1111010110100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 .tile R29C63:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 E1_H01W0000 arc: H00R0000 V02S0401 arc: N1_V02N0501 E1_H01W0100 arc: V00B0100 H02W0701 arc: W1_H02W0101 E1_H02W0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A2 V00B0000 arc: B0 V00T0000 arc: C0 H00R0100 arc: C2 H00L0000 arc: CE0 V02S0201 arc: CE1 E1_H02W0101 arc: CE2 N1_V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 H02E0001 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: H00R0100 Q7 arc: M0 H02W0601 arc: M2 V00B0100 arc: M4 H02W0401 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0001 F2 arc: V00B0000 Q4 arc: V00T0000 Q0 word: SLICEA.K0.INIT 1100110011110000 word: SLICEB.K0.INIT 1010101011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R29C64:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 V02S0401 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0701 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 E3_H06W0303 arc: V00B0000 V02S0001 arc: V00T0000 H02W0001 arc: V00T0100 N1_V02S0501 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 N1_V02S0501 arc: A1 N1_V02S0501 arc: B0 N1_V02S0101 arc: B1 Q1 arc: B2 E1_H01W0100 arc: C0 H00L0100 arc: C1 H02W0601 arc: C2 H00L0000 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00T0100 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: M0 H01E0001 arc: M1 H02E0001 arc: M2 V00B0000 arc: M4 V00T0000 arc: M5 H00R0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0101 Q4 arc: N1_V02N0201 F2 arc: N1_V02N0701 Q5 arc: V00B0100 Q7 word: SLICEA.K0.INIT 1100100001000000 word: SLICEA.K1.INIT 1110111101001111 word: SLICEB.K0.INIT 1111000011001100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R29C65:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: H00L0000 V02S0001 arc: H00L0100 E1_H02W0301 arc: H00R0000 N1_V02S0401 arc: H00R0100 V02S0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 E3_H06W0303 arc: V00B0100 H02W0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 H00L0100 arc: A1 H00L0100 arc: B0 N1_V02S0301 arc: B1 H02W0101 arc: C0 E1_H02W0401 arc: C1 E1_H02W0601 arc: CE0 V02S0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 N1_V02S0001 arc: E1_H02E0301 Q1 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: H01W0100 Q4 arc: M0 V00B0100 arc: M1 H02W0001 arc: M4 H02E0401 arc: M5 H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q5 arc: N3_V06N0003 F0 word: SLICEA.K0.INIT 1110001000000000 word: SLICEA.K1.INIT 1111001110111011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C66:PLC2 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 H06W0003 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 N1_V01S0100 arc: A0 H02E0701 arc: A1 H02E0701 arc: A5 Q5 arc: A7 Q7 arc: B0 N1_V02S0101 arc: B1 N1_V02S0301 arc: B6 V00B0000 arc: B7 H02E0301 arc: C0 H00L0000 arc: C1 H00L0000 arc: C5 N1_V02S0001 arc: C6 Q6 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 N1_V02S0201 arc: D5 H00L0100 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: F0 F5A_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00T0100 arc: M5 H02E0001 arc: M6 V00T0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 F0 arc: N1_V02N0401 F6 arc: V00B0000 Q4 arc: V00B0100 F5 word: SLICED.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1110001011111111 word: SLICED.K1.INIT 1100110010101010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 .tile R29C67:PLC2 arc: E1_H02E0301 V02S0301 arc: H00L0000 N1_V02S0201 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0103 H06W0103 arc: N3_V06N0203 S3_V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0701 E1_H02W0701 arc: CE0 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: M1 E1_H02W0001 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: W1_H02W0301 Q1 arc: W1_H02W0401 Q6 arc: W1_H02W0601 Q6 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C68:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: H00L0000 E1_H02W0201 arc: H00R0000 E1_H02W0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H06W0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 H06W0003 arc: N3_V06N0103 H06W0103 arc: V00B0100 N1_V02S0301 arc: V00T0100 H02E0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 E1_H02W0301 arc: A5 Q5 arc: A7 Q7 arc: C5 N1_V02S0001 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D5 H01W0000 arc: D7 H00L0100 arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: M0 V00T0100 arc: M1 H00L0000 arc: M3 H02W0201 arc: M5 H02W0001 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0701 F7 arc: W1_H02W0501 F5 word: SLICEC.K1.INIT 1010111110100000 word: SLICED.K1.INIT 1111101000001010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R29C69:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0601 N1_V01S0000 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0401 E3_H06W0203 arc: V00B0000 V02N0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A5 Q5 arc: B3 Q3 arc: C3 N1_V01N0001 arc: C5 V00T0000 arc: CE1 V02S0201 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D3 H02E0001 arc: D5 H02E0001 arc: E1_H01E0001 F5 arc: F3 F3_SLICE arc: F5 F5_SLICE arc: M2 V00B0000 arc: M3 H00R0000 arc: M5 H02W0001 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: N1_V01N0001 Q6 arc: N1_V02N0301 F3 arc: V00T0000 Q2 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K1.INIT 1010101011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R29C70:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0103 N1_V01S0100 arc: H00L0100 V02N0101 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 E1_H01W0100 arc: V00B0000 H02E0601 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A1 V01N0101 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: C0 S1_V02N0401 arc: C2 H00L0100 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q2 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0000 Q2 arc: H01W0100 Q1 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0201 Q2 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q2 arc: V01S0000 Q0 arc: V01S0100 Q1 arc: W1_H02W0001 Q0 arc: W3_H06W0003 Q0 word: SLICEA.K1.INIT 1000100000100010 word: SLICEA.K0.INIT 1100000000110000 word: SLICEB.K0.INIT 1100000000110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R29C71:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 V01N0001 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H06W0103 arc: V00B0000 W1_H02E0601 arc: V00T0000 V02N0601 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0303 N1_V01S0100 arc: A1 V01N0101 arc: B0 V00T0000 arc: B2 W1_H02E0101 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 E1_H02W0401 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 V02N0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q2 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0000 Q2 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q0 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: V01S0100 Q2 arc: W1_H02W0001 Q2 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1100000000001100 word: SLICEA.K1.INIT 1010000000001010 word: SLICEB.K0.INIT 1100001100000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R29C72:PLC2 arc: H00L0000 V02S0001 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 H01E0001 arc: W1_H02W0101 E1_H01W0100 arc: A0 V02N0501 arc: A3 V00B0000 arc: B0 H02W0101 arc: B3 Q3 arc: C0 E1_H01W0000 arc: CE1 V02S0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D3 H02E0001 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: H01W0100 F3 arc: M3 H02E0201 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: V00B0000 Q6 word: SLICEB.K1.INIT 1010101011001100 word: SLICEA.K0.INIT 1111101111111010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R29C73:PLC2 arc: H00L0000 H02E0001 arc: H00R0000 V02S0401 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N3_V06N0203 S3_V06N0103 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 N1_V01S0000 arc: A0 E1_H01E0001 arc: B0 F3 arc: C0 V02N0601 arc: C1 V02N0601 arc: C3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V01S0100 arc: D3 E1_H02W0001 arc: E1_H01E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: H01W0000 F1 arc: H01W0100 F1 arc: MUXCLK0 CLK0 arc: N1_V02N0101 F1 arc: V01S0000 F3 arc: V01S0100 Q0 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0000000011001110 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R29C74:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0501 V01N0101 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00T0000 W1_H02E0001 arc: W3_H06W0103 E1_H01W0100 arc: A2 H01E0001 arc: C6 V00T0000 arc: CLK0 G_HPBX0000 arc: D2 V02S0001 arc: D6 V00B0000 arc: E1_H01E0101 F6 arc: E3_H06E0103 Q1 arc: F2 F2_SLICE arc: F6 F6_SLICE arc: LSR1 H02W0301 arc: M1 H02W0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N3_V06N0103 Q1 arc: S1_V02S0001 F2 word: SLICEB.K0.INIT 0101010111111111 word: SLICED.K0.INIT 0000111111111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C75:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 V02S0401 arc: H01W0100 E3_H06W0303 arc: N1_V01N0001 N3_V06S0003 arc: S1_V02S0201 N1_V02S0701 arc: V00T0000 H02W0001 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0301 H01E0101 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A2 E1_H01E0001 arc: B2 H02E0101 arc: B3 Q3 arc: C1 N1_V02S0601 arc: C2 V02S0401 arc: C3 V02S0401 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: E1_H01E0001 Q3 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q3 arc: E1_H02E0601 Q6 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: E3_H06E0303 Q6 arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H00L0000 F2 arc: H01W0000 Q3 arc: M2 V00T0000 arc: M3 H00L0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: N1_V02N0601 Q6 arc: N3_V06N0103 Q1 arc: W1_H02W0401 Q6 word: SLICEB.K0.INIT 0000111100000010 word: SLICEB.K1.INIT 0000111100001100 word: SLICEA.K1.INIT 0000111100000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C76:PLC2 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0601 H02E0601 arc: N3_V06N0303 S3_V06N0303 arc: V00T0000 V02S0401 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 N3_V06S0003 arc: W3_H06W0003 E3_H06W0003 arc: A0 H01E0001 arc: A3 F5 arc: A6 W1_H02E0501 arc: A7 W1_H02E0501 arc: B0 W1_H02E0101 arc: B1 H02E0301 arc: B3 W1_H02E0101 arc: B6 N1_V01S0000 arc: B7 N1_V01S0000 arc: C0 H00R0100 arc: C1 H02W0601 arc: C3 N1_V01N0001 arc: C5 H01E0001 arc: C6 H02E0601 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 H00R0000 arc: D3 H00R0000 arc: D5 H00R0100 arc: D6 V02S0401 arc: D7 V02S0601 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 V00T0100 arc: M0 V00T0000 arc: M2 V00B0000 arc: M5 V01S0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F5 arc: V00B0000 F6 arc: V00B0100 F7 arc: V01S0000 F0 word: SLICEC.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000001100100011 word: SLICED.K1.INIT 0000000000010011 word: SLICEB.K0.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000000001000 word: SLICEA.K0.INIT 1000000011111111 word: SLICEA.K1.INIT 1100000011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C77:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0601 V06S0303 arc: H00R0000 V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H02E0601 arc: N3_V06N0103 H06E0103 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0100 V02S0501 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02N0601 arc: A2 V00T0000 arc: B2 H01W0100 arc: C2 H00L0100 arc: CE0 W1_H02E0101 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: F2 F2_SLICE arc: H00L0100 Q1 arc: H01W0000 Q3 arc: H01W0100 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M1 V01S0100 arc: M2 V00B0100 arc: M3 W1_H02E0201 arc: M4 V00B0000 arc: M6 H02W0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: N1_V02N0001 F2 arc: V00T0000 Q0 arc: V01S0100 Q6 word: SLICEB.K0.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C78:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V06S0303 arc: E1_H02E0701 V02S0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 H06W0303 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 N1_V02S0101 arc: V00B0000 H02E0601 arc: V00T0000 H02W0001 arc: W1_H02W0401 V01N0001 arc: C3 V02N0601 arc: CE0 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D3 N1_V01S0000 arc: E1_H02E0001 Q0 arc: F3 F3_SLICE arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M0 H02W0601 arc: M5 H02E0001 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0301 F3 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q5 word: SLICEB.K1.INIT 1111000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C79:PLC2 arc: E1_H02E0001 V06S0003 arc: E3_H06E0003 V06S0003 arc: H00L0000 V02S0001 arc: H00R0100 S1_V02N0501 arc: N3_V06N0303 S3_V06N0203 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 H02E0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0601 V06S0303 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B7 V02N0501 arc: C0 H02E0401 arc: C7 E1_H01E0101 arc: CE0 H00L0000 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D7 H00L0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M3 H02E0201 arc: M4 V00B0000 arc: M5 H02W0001 arc: M6 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: V01S0000 Q5 word: SLICEA.K0.INIT 0000000011111100 word: SLICED.K1.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C80:PLC2 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 H02W0301 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H01E0001 arc: N3_V06N0103 W3_H06E0103 arc: V00B0100 V02S0101 arc: V00T0000 H02E0001 arc: W1_H02W0001 V06S0003 arc: B0 H02W0301 arc: B2 H02W0101 arc: C0 N1_V02S0401 arc: C2 H00L0100 arc: C7 V02S0001 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V00B0100 arc: D7 H02W0001 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: LSR0 W1_H02E0501 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: S1_V02S0501 F7 word: SLICEA.K0.INIT 1111000011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1111000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 .tile R29C81:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H01W0000 W3_H06E0103 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 W3_H06E0303 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 N1_V01S0100 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: B0 E1_H02W0101 arc: B2 E1_H02W0101 arc: C0 E1_H02W0601 arc: C2 H02W0401 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 V02S0001 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 arc: V00T0000 F2 arc: V01S0000 Q0 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 1111000011110011 word: SLICEA.K0.INIT 0000000011111100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C82:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00L0100 H02W0301 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 S3_V06N0203 arc: V00B0000 V02N0201 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0401 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: A1 H00L0100 arc: A3 V01N0101 arc: A5 N1_V01N0101 arc: A7 Q7 arc: B0 H02W0301 arc: B1 H02E0301 arc: B2 E1_H01W0100 arc: B3 E1_H01W0100 arc: B4 H02E0301 arc: B5 E1_H02W0101 arc: C1 H00L0000 arc: C3 H02E0401 arc: C4 V02N0201 arc: C5 H02E0401 arc: C6 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02N0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V02S0601 arc: D5 V01N0001 arc: D6 E1_H01W0100 arc: D7 E1_H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0001 F0 arc: E1_H02E0401 F6 arc: E1_H02E0601 F4 arc: E3_H06E0203 F7 arc: E3_H06E0303 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: LSR0 V00T0100 arc: M0 V00T0000 arc: M2 V00B0000 arc: M7 H02E0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: N3_V06N0303 F5 arc: V00B0100 Q7 word: SLICEB.K0.INIT 0011001100000000 word: SLICEB.K1.INIT 0011001100110010 word: SLICEC.K1.INIT 0100010001000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEA.K0.INIT 1111111100110011 word: SLICEA.K1.INIT 1111010100110001 word: SLICED.K1.INIT 0000000001010101 word: SLICED.K0.INIT 1111000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R29C83:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0301 E1_H02W0301 arc: N3_V06N0203 H06E0203 arc: V00B0000 V02S0201 arc: W1_H02W0601 V02N0601 arc: A0 W1_H02E0701 arc: A1 F5 arc: A3 V02N0701 arc: A4 V00T0000 arc: A5 N1_V01S0100 arc: A6 H00R0000 arc: A7 N1_V01S0100 arc: B0 V02S0101 arc: B2 E1_H02W0301 arc: B3 W1_H02E0101 arc: B4 V02S0501 arc: B6 V02N0501 arc: B7 F3 arc: C0 S1_V02N0601 arc: C2 H00L0000 arc: C3 V02N0401 arc: C4 H01E0001 arc: C6 H02E0601 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0001 arc: D2 E1_H02W0201 arc: D3 V02S0001 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 V02S0601 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q1 arc: E1_H02E0201 Q0 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q2 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F5 arc: N1_V02N0101 Q1 arc: N1_V02N0201 Q2 arc: N1_V02N0701 F7 arc: N3_V06N0103 Q2 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 F4 arc: V01S0100 Q0 arc: W1_H02W0101 Q1 arc: W1_H02W0301 Q1 word: SLICEC.K0.INIT 0011000100110011 word: SLICEB.K1.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000100 word: SLICED.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 0000001000000000 word: SLICEA.K1.INIT 0000000010101010 word: SLICEC.K1.INIT 1010101000000000 word: SLICEB.K0.INIT 0000001100110011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 .tile R29C84:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 H01E0001 arc: H00L0000 H02W0001 arc: H00L0100 V02N0101 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 H06E0003 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 H02E0201 arc: V00B0000 V02S0001 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 N1_V01S0000 arc: A0 F5 arc: A1 V02S0501 arc: A2 H00L0100 arc: A4 V00T0000 arc: A7 V02N0101 arc: B2 V02S0101 arc: B4 H00L0000 arc: B5 H02E0301 arc: B7 H02E0101 arc: C1 V02S0601 arc: C2 H02E0601 arc: C3 W1_H02E0601 arc: C4 V02N0201 arc: C5 V02N0001 arc: C6 W1_H02E0401 arc: C7 E1_H02W0601 arc: D0 V00T0100 arc: D1 V02N0201 arc: D2 V02S0201 arc: D3 H02E0001 arc: D4 F2 arc: D5 V00B0000 arc: D6 V02S0401 arc: D7 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: E1_H02E0301 F3 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: V00B0100 F7 arc: V01S0000 F3 word: SLICEA.K0.INIT 0101010100000000 word: SLICEB.K1.INIT 0000000011110000 word: SLICEC.K0.INIT 1111111000000000 word: SLICEB.K0.INIT 1100110001001100 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K1.INIT 0000000000000011 word: SLICED.K1.INIT 1100010011001100 word: SLICED.K0.INIT 0000111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 .tile R29C85:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V02N0701 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H06E0303 arc: S1_V02S0601 N1_V02S0301 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 W3_H06E0003 arc: A0 W1_H02E0701 arc: A1 F5 arc: A3 F7 arc: A4 V02S0101 arc: A5 V02N0101 arc: A6 V02N0301 arc: A7 H02E0701 arc: B0 V02S0101 arc: B3 V02S0101 arc: B4 H02E0101 arc: B5 W1_H02E0301 arc: B6 W1_H02E0301 arc: C0 F4 arc: C1 H02E0401 arc: C3 E1_H02W0401 arc: C4 Q4 arc: C5 N1_V02S0001 arc: C6 H02E0601 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0201 arc: D1 V02N0201 arc: D3 H01E0101 arc: D4 H02E0201 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 H01W0000 arc: E1_H01E0001 F1 arc: E1_H02E0401 F6 arc: E3_H06E0003 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q0 arc: LSR0 H02W0301 arc: LSR1 V00T0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V00T0100 F1 arc: V01S0000 F1 arc: W1_H02W0001 Q0 word: SLICEC.K0.INIT 1000100011000000 word: SLICEB.K0.INIT 1111111111111111 word: SLICEB.K1.INIT 1111111111101010 word: SLICED.K1.INIT 0101010100000000 word: SLICEA.K1.INIT 0000000000000101 word: SLICED.K0.INIT 0011000000010000 word: SLICEC.K1.INIT 0000000000010000 word: SLICEA.K0.INIT 1111111111111000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET SET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R29C86:PLC2 arc: E3_H06E0203 N1_V01S0000 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 W3_H06E0303 arc: A0 W1_H02E0501 arc: A1 F7 arc: A2 H01E0001 arc: A4 V00B0000 arc: A7 H02E0701 arc: B0 V02S0101 arc: B1 W1_H02E0301 arc: B2 H00L0000 arc: B4 V02S0701 arc: B7 V01S0000 arc: C0 H02E0401 arc: C1 W1_H02E0401 arc: C2 V02S0601 arc: C4 V02N0001 arc: C7 N1_V02S0001 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H02E0201 arc: D2 W1_H02E0001 arc: D4 E1_H02W0201 arc: D7 H02E0001 arc: E1_H01E0001 Q6 arc: E1_H02E0501 Q5 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M4 V00T0000 arc: M5 H02W0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V01S0000 F4 arc: V01S0100 Q2 word: SLICED.K1.INIT 1100100011001100 word: SLICEC.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0100010111001111 word: SLICEA.K0.INIT 1111111011111111 word: SLICEB.K0.INIT 1111111111010101 word: SLICEA.K1.INIT 1111111111111101 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET SET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET SET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R29C87:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V06S0103 arc: E1_H02E0301 W1_H02E0301 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0301 W1_H02E0301 arc: V00B0100 H02W0701 arc: V00T0000 V02N0601 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0701 V02S0701 arc: A2 H02E0501 arc: A6 V00T0100 arc: B2 H01W0100 arc: C6 V02N0201 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D2 V02N0201 arc: D6 H01W0000 arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H01W0000 Q0 arc: H01W0100 Q5 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M5 H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00T0100 Q1 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICED.K0.INIT 1010111110100000 word: SLICEB.K0.INIT 1100110010101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R29C88:PLC2 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 H06E0003 arc: V00T0100 V02N0701 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H01W0100 arc: B0 V00B0000 arc: C0 H00L0000 arc: C4 V02S0201 arc: C5 V02S0201 arc: C7 V02S0201 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: E1_H01E0101 F4 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 H02E0301 arc: LSR1 H02W0301 arc: M2 N1_V01N0001 arc: M3 H00L0100 arc: M4 H02W0401 arc: M5 H00R0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q3 arc: S1_V02S0501 F5 arc: V00B0000 Q6 arc: W1_H02W0701 Q5 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 0000111100001111 word: SLICED.K1.INIT 0000111100001111 word: SLICEC.K0.INIT 0000111100001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C29:PLC2 arc: E1_H02E0501 V01N0101 .tile R2C30:PLC2 arc: E1_H02E0501 V02N0501 arc: S1_V02S0201 E1_H01W0000 arc: V00T0100 V02N0501 arc: A0 H02W0501 arc: A2 H02E0501 arc: A4 V00B0000 arc: A5 Q5 arc: A7 Q7 arc: B3 Q3 arc: B6 V01S0000 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: S1_V02S0701 Q7 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C31:PLC2 arc: S1_V02S0501 S3_V06N0303 arc: W1_H02W0501 S3_V06N0303 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00R0000 arc: A7 Q7 arc: B0 V00T0000 arc: B1 Q1 arc: B2 H00L0000 arc: B3 Q3 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q3 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q6 arc: H01W0000 Q0 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00B0000 Q4 arc: V00T0000 Q0 arc: V01S0000 Q1 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C32:PLC2 arc: S1_V02S0701 E1_H01W0100 arc: V00T0100 H02E0101 arc: A0 H00L0000 arc: A1 H00L0100 arc: A4 V00T0100 arc: A5 H02E0501 arc: B4 H01E0101 arc: B5 H00L0000 arc: C4 H01E0001 arc: C5 H02E0601 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D5 H00L0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0501 F5 arc: V01S0000 F4 word: SLICEC.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C33:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H02W0401 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 H02W0001 arc: B0 H02W0301 arc: B2 H02W0301 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V02N0201 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q2 word: SLICEB.K0.INIT 1100110000000000 word: SLICEA.K0.INIT 1100110000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 .tile R2C34:PLC2 arc: N1_V01N0101 S3_V06N0203 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 S3_V06N0203 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 .tile R2C35:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: H00R0000 H02W0401 arc: H01W0100 E3_H06W0303 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E3_H06W0303 arc: V00B0100 W1_H02E0501 arc: A0 F5 arc: A1 F5 arc: B0 H01W0100 arc: C5 E1_H02W0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 V00B0100 arc: D5 V02N0601 arc: E1_H01E0101 F1 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F5 F5_SLICE arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 arc: S1_V02S0001 F0 arc: S1_V02S0301 Q1 arc: V01S0100 F0 word: SLICEC.K1.INIT 0000000000001111 word: SLICEA.K0.INIT 0010001000100010 word: SLICEA.K1.INIT 0000000010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C36:PLC2 arc: E3_H06E0303 S3_V06N0303 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H06W0203 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0301 S3_V06N0003 arc: A5 H02E0501 arc: B0 E1_H02W0301 arc: B5 V02N0701 arc: C0 V02N0401 arc: C5 E1_H02W0601 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H01E0101 arc: D5 V02N0401 arc: E1_H01E0001 F0 arc: E1_H02E0101 F1 arc: E1_H02E0301 Q1 arc: E3_H06E0003 F0 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: H00R0000 F4 arc: H01W0000 F4 arc: LSR0 H02W0501 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0101 F1 arc: S1_V02S0201 Q0 arc: S1_V02S0301 F1 arc: S1_V02S0401 F4 arc: S3_V06S0003 F0 arc: S3_V06S0103 F1 arc: S3_V06S0203 F4 arc: V01S0000 F0 arc: V01S0100 Q1 arc: W1_H02W0401 F4 word: SLICEA.K0.INIT 1100000000000000 word: SLICEA.K1.INIT 0000000011111111 word: SLICEC.K0.INIT 1111111111111111 word: SLICEC.K1.INIT 1110101010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R2C37:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 H01E0001 arc: H00R0000 V02N0601 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H06W0303 arc: V00T0100 S1_V02N0501 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S1_V02N0501 arc: B0 H02E0301 arc: CE0 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: F0 F0_SLICE arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: M4 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: V01S0000 Q0 arc: V01S0100 Q4 word: SLICEA.K0.INIT 1100110000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C38:PLC2 arc: S1_V02S0501 E1_H02W0501 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 E1_H02W0301 arc: A2 V02N0701 arc: A3 V02N0701 arc: B0 V00B0000 arc: B4 W1_H02E0301 arc: C0 V02N0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: CE0 E1_H02W0101 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 E1_H02W0201 arc: D3 S1_V02N0201 arc: D4 H01W0000 arc: E1_H01E0001 F2 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q3 arc: LSR0 V00T0000 arc: LSR1 H02E0501 arc: M2 H02E0601 arc: M3 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: S1_V02S0001 Q0 arc: S1_V02S0401 Q4 word: SLICEA.K0.INIT 1100111111000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICEB.K0.INIT 1010111110100000 word: SLICEB.K1.INIT 1111111110100000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C39:PLC2 arc: E1_H02E0501 V01N0101 arc: H00R0000 V02N0601 arc: S1_V02S0301 H06E0003 arc: V00B0100 E1_H02W0501 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02N0501 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 H00L0100 arc: B0 E1_H02W0101 arc: B1 E1_H01W0100 arc: B2 S1_V02N0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 S1_V02N0601 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00B0100 arc: D2 V02N0201 arc: D3 V02N0201 arc: E1_H01E0001 Q0 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q1 arc: LSR0 W1_H02E0501 arc: M2 W1_H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0001 Q0 arc: W1_H02W0201 F2 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1100111111000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111101011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R2C40:PLC2 arc: H00R0000 S1_V02N0601 arc: S1_V02S0401 E3_H06W0203 arc: V00T0000 W1_H02E0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 S3_V06N0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00R0000 arc: A3 H01E0001 arc: A7 V02N0101 arc: B2 V02N0301 arc: B4 H02E0301 arc: B5 S1_V02N0701 arc: B6 V00T0000 arc: E1_H01E0101 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F4 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C41:PLC2 arc: V00B0000 V02N0001 arc: V00T0000 V02N0601 arc: W1_H02W0101 H01E0101 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A4 V00T0000 arc: A5 W1_H02E0501 arc: B0 V01N0001 arc: B2 S1_V02N0101 arc: B3 V02N0301 arc: B6 V00B0000 arc: B7 V02N0501 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0001 F2 arc: S1_V02S0101 F3 arc: S1_V02S0201 F0 arc: S1_V02S0301 F1 arc: S1_V02S0401 F6 arc: S1_V02S0701 F5 arc: V01S0000 F7 arc: V01S0100 F4 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C42:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 V02N0201 arc: V01S0000 S3_V06N0103 arc: A0 V01N0101 arc: A4 V00B0000 arc: A5 V02N0301 arc: A6 H02W0501 arc: A7 E1_H01W0000 arc: B1 V02N0101 arc: B2 V01N0001 arc: B3 E1_H01W0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: E1_H02E0301 F3 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F0 arc: S1_V02S0201 F2 arc: S1_V02S0501 F5 arc: V01S0100 F4 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R2C43:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 V02N0601 arc: H00R0000 V02N0401 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 H06W0303 arc: V00T0100 S1_V02N0501 arc: B0 E1_H01W0100 arc: B1 H02W0301 arc: B4 V02N0501 arc: B5 V02N0501 arc: B6 H02E0301 arc: C4 H01E0001 arc: C5 H02E0601 arc: C6 V02N0201 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D4 E1_H02W0201 arc: D5 E1_H02W0001 arc: D6 V02N0601 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F1 arc: E1_H02E0001 F0 arc: E1_H02E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q4 arc: H01W0100 Q6 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: M3 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V01S0100 Q6 arc: W1_H02W0501 Q5 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1100110011110000 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R2C44:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02N0501 arc: H00R0000 H02W0601 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H02W0601 arc: S3_V06S0003 H01E0001 arc: V00B0000 V02N0201 arc: V00T0000 W1_H02E0001 arc: W3_H06W0003 E1_H01W0000 arc: A0 E1_H02W0701 arc: A3 V02N0701 arc: A4 V00B0000 arc: B1 V02N0101 arc: B2 S1_V02N0301 arc: B5 H02W0101 arc: B6 H02E0101 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 H02E0401 arc: C5 V02N0201 arc: C7 V00B0100 arc: CE0 E1_H02W0101 arc: CE1 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H01E0101 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: H01W0100 Q0 arc: LSR0 H02E0301 arc: LSR1 H02E0501 arc: M2 V00T0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 V01S0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: S1_V02S0301 Q3 arc: V00B0100 Q5 arc: V01S0000 F4 arc: V01S0100 Q7 arc: W1_H02W0301 Q1 word: SLICEA.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1111101000001010 word: SLICED.K0.INIT 1100110000000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111101010101010 word: SLICEC.K0.INIT 1111101001010000 word: SLICEC.K1.INIT 1111110011001100 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C45:PLC2 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 S1_V02N0301 arc: H00R0100 S1_V02N0501 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0501 W1_H02E0501 arc: V00T0000 H02E0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A2 V00B0000 arc: A6 H02W0501 arc: B1 V00B0000 arc: B3 Q3 arc: B4 H01E0101 arc: B5 H01E0101 arc: B6 V02S0701 arc: C0 N1_V01N0001 arc: C1 E1_H01W0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 H02E0401 arc: C5 S1_V02N0001 arc: C6 V01N0101 arc: C7 E1_H01E0101 arc: CE0 H00L0100 arc: CE1 E1_H02W0101 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V01S0100 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 H02E0001 arc: D7 H02W0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F3 arc: E1_H02E0001 F2 arc: E1_H02E0101 Q3 arc: E1_H02E0301 F1 arc: E1_H02E0401 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F1 arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M3 H00R0100 arc: M4 V00T0000 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F2 arc: S1_V02S0001 F2 arc: S1_V02S0101 F1 arc: V00B0000 Q6 arc: V00T0100 Q3 arc: V01S0000 F3 arc: V01S0100 Q6 arc: W3_H06W0103 F2 arc: W3_H06W0203 F7 word: SLICEB.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 0000000000001010 word: SLICED.K1.INIT 1111000000000000 word: SLICEA.K1.INIT 0000001100000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111110011110000 word: SLICED.K0.INIT 1111111111111110 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R2C46:PLC2 arc: S1_V02S0101 H01E0101 arc: V00B0000 H02E0401 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0701 S1_V02N0701 arc: A1 F5 arc: A2 V00T0000 arc: A6 H00L0000 arc: A7 H02W0701 arc: B0 H02E0101 arc: B1 H02E0301 arc: B2 V01N0001 arc: B6 H02E0101 arc: C0 H02E0401 arc: C1 E1_H01W0000 arc: C2 F4 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 V02N0001 arc: C6 H02E0401 arc: C7 H01E0001 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0201 arc: D2 F0 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 F0 arc: D6 E1_H01W0100 arc: D7 V00B0000 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR1 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: S1_V02S0701 F7 arc: S3_V06S0003 F3 arc: S3_V06S0303 F6 arc: V00B0100 F7 arc: V01S0000 F1 arc: V01S0100 Q2 arc: W1_H02W0501 F5 arc: W3_H06W0003 F0 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 1111000000000000 word: SLICED.K0.INIT 0000001000000000 word: SLICEB.K1.INIT 0000111100000000 word: SLICEA.K0.INIT 0000000011000000 word: SLICEC.K1.INIT 0000111100000000 word: SLICEA.K1.INIT 0000000000010101 word: SLICEB.K0.INIT 1111100011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R2C47:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V06N0303 arc: E3_H06E0003 S3_V06N0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 V01N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 S3_V06N0303 arc: B6 W1_H02E0301 arc: C5 V02N0001 arc: C6 E1_H01E0101 arc: C7 V02N0001 arc: D5 V02N0401 arc: D6 W1_H02E0001 arc: D7 V02N0601 arc: E1_H01E0101 F7 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F7 arc: S1_V02S0501 F5 arc: V01S0000 F6 arc: W1_H02W0701 F5 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000011110000 word: SLICED.K0.INIT 1111000011000000 word: SLICEC.K1.INIT 0000000000001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R2C48:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 E3_H06W0103 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 E1_H02W0001 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0303 H06W0303 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 S1_V02N0501 arc: A0 H02E0501 arc: A1 H02W0701 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 E1_H01W0000 arc: A5 N1_V01N0101 arc: A6 H00L0000 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 H02E0301 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 H02W0301 arc: B5 V02N0501 arc: B6 V00B0000 arc: B7 H02W0301 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 V02S0201 arc: C5 E1_H02W0601 arc: C6 V02N0201 arc: C7 V02S0201 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 H02E0001 arc: D3 H02E0001 arc: D4 V00B0000 arc: D5 F0 arc: D6 H01W0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M2 V00T0000 arc: M4 H02E0401 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F2 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: V00B0000 Q4 arc: V01S0000 F7 arc: V01S0100 F4 word: SLICED.K1.INIT 0100000001110000 word: SLICEC.K0.INIT 0000000100001101 word: SLICED.K0.INIT 1010100000001000 word: SLICEA.K0.INIT 1000101010000000 word: SLICEA.K1.INIT 1011111110110011 word: SLICEB.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1100101011111111 word: SLICEC.K1.INIT 1000110010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C49:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0301 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: V00B0000 S1_V02N0201 arc: V00B0100 S1_V02N0301 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V06N0303 arc: A0 H00L0000 arc: B0 H00R0100 arc: B6 W1_H02E0101 arc: C0 E1_H02W0601 arc: C6 H01E0001 arc: CE0 E1_H02W0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D6 F0 arc: F0 F0_SLICE arc: F6 F6_SLICE arc: H00R0100 Q5 arc: H01W0000 Q0 arc: H01W0100 Q5 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: V01S0000 F6 arc: W1_H02W0001 Q0 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 0000110100001000 word: SLICED.K0.INIT 0000000000001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C50:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0501 V02N0501 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H06W0203 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0601 V02N0601 arc: A0 H02W0501 arc: A7 V00T0100 arc: B0 H00R0100 arc: B7 H02E0301 arc: C0 V02N0401 arc: C7 V01N0101 arc: D0 H02E0201 arc: D7 E1_H02W0001 arc: F0 F5A_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: M0 E1_H02W0601 arc: S1_V02S0001 F0 word: SLICED.K1.INIT 0000000011111011 word: SLICEA.K0.INIT 0011001100110111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R2C51:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: H00L0000 H02E0001 arc: H00R0100 S1_V02N0701 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02N0501 arc: A3 H02E0501 arc: A4 V02N0301 arc: A5 V02S0101 arc: A6 H00R0000 arc: A7 N1_V01N0101 arc: B0 H02E0101 arc: B1 H02E0101 arc: B3 Q3 arc: B4 N1_V01S0000 arc: B5 E1_H02W0301 arc: B6 E1_H02W0301 arc: B7 V02S0501 arc: C0 F4 arc: C1 H02W0401 arc: C3 V02N0401 arc: C4 Q4 arc: C5 V01N0101 arc: C6 E1_H02W0401 arc: C7 E1_H02W0601 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D3 V01S0100 arc: D4 H00L0100 arc: D5 V01N0001 arc: D6 H00L0100 arc: D7 E1_H01W0100 arc: E1_H01E0001 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: LSR0 V00B0000 arc: M0 V00B0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F3 arc: S1_V02S0001 F0 arc: V01S0000 F7 arc: V01S0100 Q4 arc: W1_H02W0501 F5 word: SLICEC.K0.INIT 0101000101000000 word: SLICEA.K0.INIT 1111001111100010 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K0.INIT 0010001100100000 word: SLICEC.K1.INIT 0011000100100000 word: SLICEB.K1.INIT 0101010000000100 word: SLICED.K1.INIT 1100110010001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C52:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0103 W3_H06E0003 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 S3_V06N0303 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 H06E0303 arc: V00B0100 H02E0501 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 V01N0001 arc: A0 H02W0501 arc: A4 V00T0000 arc: A5 Q5 arc: A6 V02N0101 arc: B0 V00T0000 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 V00B0000 arc: C0 V02N0401 arc: C4 H02W0401 arc: C5 H02E0601 arc: C6 H01E0001 arc: CE0 H02E0101 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D4 H02W0001 arc: D5 H01W0000 arc: D6 V02N0601 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q0 arc: H01W0100 F0 arc: LSR0 E1_H02W0501 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: V00B0000 F4 arc: V00T0000 Q0 arc: V01S0000 Q5 arc: V01S0100 Q5 arc: W1_H02W0601 F6 arc: W1_H02W0701 F5 word: SLICEC.K1.INIT 1100100000001000 word: SLICEC.K0.INIT 1010110000000000 word: SLICED.K0.INIT 1010100010101010 word: SLICEA.K0.INIT 1101000010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C53:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V01N0101 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 S3_V06N0203 arc: V00B0100 V02N0101 arc: V00T0000 E1_H02W0201 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V06N0303 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 S3_V06N0203 arc: A0 V01N0101 arc: A3 F5 arc: A4 N1_V01N0101 arc: A5 V00B0000 arc: B0 V01N0001 arc: B1 V01N0001 arc: B3 E1_H02W0301 arc: B4 H02W0101 arc: C0 V02N0601 arc: C1 V02N0401 arc: C3 H02E0601 arc: C4 V00T0000 arc: C5 H02W0401 arc: D0 H02W0001 arc: D1 H02W0001 arc: D3 F0 arc: D4 V02S0401 arc: D5 H02W0001 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: M0 V00B0100 arc: S1_V02S0301 F3 arc: V00B0000 F4 word: SLICEA.K0.INIT 1110111011110000 word: SLICEA.K1.INIT 1111110011111111 word: SLICEC.K0.INIT 1110010000000000 word: SLICEC.K1.INIT 0000000000000101 word: SLICEB.K1.INIT 1110000011101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R2C54:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02S0201 arc: H00L0100 V02N0301 arc: H00R0100 W1_H02E0501 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 H06W0203 arc: S3_V06S0203 H01E0001 arc: V00B0000 H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0103 V06N0103 arc: W3_H06W0203 S3_V06N0203 arc: A0 F7 arc: A1 F7 arc: A2 V00T0000 arc: A3 S1_V02N0701 arc: A4 V02N0101 arc: A5 H02E0501 arc: A6 H02E0701 arc: A7 V00T0100 arc: B0 F3 arc: B1 F3 arc: B2 H01W0100 arc: B3 Q3 arc: B4 V01S0000 arc: B6 H02E0301 arc: B7 S1_V02N0701 arc: C0 E1_H01W0000 arc: C2 H02W0401 arc: C3 V02S0401 arc: C4 Q4 arc: C5 F4 arc: C6 V00T0100 arc: C7 E1_H02W0401 arc: CE0 E1_H02W0101 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 V01S0100 arc: D4 V02N0401 arc: D5 F2 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0301 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0501 F5 arc: S3_V06S0003 F0 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 Q4 arc: W1_H02W0101 Q3 arc: W1_H02W0401 F6 word: SLICEB.K1.INIT 0000001010100010 word: SLICED.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111101110 word: SLICED.K0.INIT 0011001000010000 word: SLICEC.K0.INIT 1110010000000000 word: SLICEB.K0.INIT 0100010101000000 word: SLICEC.K1.INIT 0000000000000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C55:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06E0103 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: A0 H02E0501 arc: A1 H02W0701 arc: A2 V00B0000 arc: A3 F5 arc: A4 N1_V01N0101 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 W1_H02E0501 arc: B0 W1_H02E0301 arc: B1 Q1 arc: B2 V02N0101 arc: B3 H02E0301 arc: B4 V00B0100 arc: B5 W1_H02E0301 arc: B6 E1_H02W0101 arc: C0 W1_H02E0601 arc: C1 N1_V01N0001 arc: C2 V02N0401 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C6 H02W0401 arc: C7 F4 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D3 F0 arc: D4 V02N0401 arc: D5 H02W0201 arc: D6 V00B0000 arc: D7 F2 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F1 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M1 H00R0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q1 arc: V00B0000 Q6 arc: V01S0000 F7 arc: V01S0100 Q1 arc: W1_H02W0301 F3 word: SLICED.K0.INIT 0000010011000100 word: SLICEA.K1.INIT 0000000000011011 word: SLICEC.K1.INIT 1000100011000000 word: SLICEA.K0.INIT 0010001100100000 word: SLICEB.K1.INIT 0000000001000100 word: SLICEB.K0.INIT 1011000010000000 word: SLICEC.K0.INIT 0000000011100010 word: SLICED.K1.INIT 0000000000001010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C56:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 V02N0201 arc: S1_V02S0001 H06E0003 arc: S1_V02S0301 H06E0003 arc: V00B0000 H02W0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 V06N0203 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 S3_V06N0003 arc: A0 V01N0101 arc: A1 V02N0701 arc: A2 E1_H02W0701 arc: A3 V02N0701 arc: A7 H02W0701 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 V01N0001 arc: B3 E1_H02W0101 arc: B5 H00L0000 arc: B7 F3 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 V02N0401 arc: C3 V02N0401 arc: C5 H02W0401 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 V02N0201 arc: D3 V02N0001 arc: D5 V01N0001 arc: D7 F2 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: N1_V01N0101 F0 arc: V00B0100 F5 word: SLICEC.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 0000111000000010 word: SLICEA.K1.INIT 1111111011110010 word: SLICEB.K0.INIT 1101000010000000 word: SLICEB.K1.INIT 0000111000000010 word: SLICED.K1.INIT 0000000000010001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 .tile R2C57:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00L0100 H02E0301 arc: H00R0100 H02E0501 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 E1_H02W0701 arc: A3 H02W0701 arc: A4 N1_V01N0101 arc: A5 V02N0101 arc: A6 F5 arc: A7 Q7 arc: B0 V02S0101 arc: B1 Q1 arc: B2 F3 arc: B3 Q3 arc: B4 V02N0701 arc: B5 E1_H02W0301 arc: B6 H01E0101 arc: B7 V02S0701 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 V02N0601 arc: C3 V02N0401 arc: C4 Q4 arc: C5 E1_H02W0401 arc: C6 E1_H01E0101 arc: CE0 H00L0000 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02S0001 arc: D2 H00R0000 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 V01N0001 arc: D6 F2 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H02E0101 Q3 arc: E1_H02E0301 Q1 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 Q4 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 W1_H02E0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q7 arc: V00B0000 Q4 arc: V00B0100 F7 arc: V00T0100 Q1 arc: V01S0100 Q1 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0001000111011101 word: SLICEA.K0.INIT 1111011110110011 word: SLICEA.K1.INIT 1110010000000000 word: SLICEB.K1.INIT 1101000010000000 word: SLICEC.K0.INIT 0011000000100010 word: SLICEB.K0.INIT 1111000011010000 word: SLICEC.K1.INIT 1100110011001000 word: SLICED.K0.INIT 1011000010100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C58:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 S3_V06N0203 arc: H00R0100 W1_H02E0501 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 W3_H06E0103 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0001 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 V06N0203 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 S3_V06N0203 arc: A0 H00L0000 arc: A1 H01E0001 arc: A2 F5 arc: A3 F5 arc: A4 V00B0000 arc: A5 V00T0000 arc: A6 V00T0100 arc: A7 H02E0501 arc: B0 H01W0100 arc: B1 V02S0101 arc: B2 H02W0101 arc: B4 S1_V02N0701 arc: B5 H02E0101 arc: B6 V00T0000 arc: B7 H02E0301 arc: C0 H02E0401 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V02N0201 arc: C6 V02N0201 arc: C7 V02N0201 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 F0 arc: D2 H00R0000 arc: D3 H02W0201 arc: D4 H02E0001 arc: D5 W1_H02E0001 arc: D6 H01W0000 arc: D7 H02W0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q0 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 F6 arc: H01W0000 Q4 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 H02W0601 arc: M3 H00R0100 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: S1_V02S0001 F2 arc: V00B0000 Q6 arc: V00T0100 Q3 arc: V01S0100 F1 word: SLICEA.K0.INIT 1010110000000000 word: SLICEC.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 1011101110111000 word: SLICED.K1.INIT 0000001100000101 word: SLICEC.K1.INIT 0010000001110000 word: SLICED.K0.INIT 0000010000000111 word: SLICEB.K0.INIT 1111101111001000 word: SLICEB.K1.INIT 1111101011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C59:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0100 E1_H02W0101 arc: H00R0000 W1_H02E0601 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V06N0203 arc: A0 H00L0100 arc: A1 H02W0501 arc: A4 V02N0101 arc: A6 H00R0000 arc: B0 V02N0101 arc: B1 V02N0301 arc: B4 E1_H02W0101 arc: B6 H01E0101 arc: C0 H02E0601 arc: C1 F4 arc: C4 H01E0001 arc: C6 V02N0201 arc: D0 H01E0101 arc: D1 F0 arc: D4 H02E0001 arc: D6 H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: W1_H02W0301 F1 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 0001000010110000 word: SLICEA.K0.INIT 0101010000010000 word: SLICEC.K0.INIT 1100100001000000 word: SLICEA.K1.INIT 0101010101010001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R2C60:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0701 arc: S1_V02S0101 H06E0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V02N0501 arc: W3_H06W0103 E1_H01W0100 arc: A0 V02S0701 arc: A1 V02N0701 arc: A2 V00T0000 arc: A4 V02N0101 arc: A5 F7 arc: A6 H02E0701 arc: A7 V02N0101 arc: B0 V02N0301 arc: B1 H02E0301 arc: B2 H01W0100 arc: B4 V01S0000 arc: B5 H02E0101 arc: B6 S1_V02N0701 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 V02N0401 arc: C4 Q4 arc: C5 F4 arc: C6 H01E0001 arc: C7 V00B0100 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 S1_V02N0201 arc: D2 N1_V01S0000 arc: D4 H02W0201 arc: D5 V02N0601 arc: D6 V02S0601 arc: D7 H02W0201 arc: E1_H01E0101 F1 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q7 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: S1_V02S0001 F0 arc: S1_V02S0701 F5 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V01S0000 Q0 arc: V01S0100 F2 word: SLICEB.K0.INIT 0011010100000000 word: SLICEA.K0.INIT 0000000000011101 word: SLICED.K0.INIT 0100000001001100 word: SLICEA.K1.INIT 0011001000000010 word: SLICEC.K0.INIT 0000000011100100 word: SLICED.K1.INIT 1110010000000000 word: SLICEC.K1.INIT 0000000011111011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C61:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0201 arc: H00R0100 H02E0701 arc: H01W0100 W3_H06E0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06E0103 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0701 E1_H02W0601 arc: A0 H02W0701 arc: A3 V00T0000 arc: A6 H00L0000 arc: B0 W1_H02E0301 arc: B3 E1_H02W0301 arc: B6 H02W0301 arc: C0 H00R0100 arc: C3 H02E0401 arc: C6 E1_H01E0101 arc: D0 H02E0201 arc: D3 H01E0101 arc: D6 F0 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: M0 W1_H02E0601 arc: V01S0100 F6 word: SLICEA.K0.INIT 1111111010111010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 1100110011001000 word: SLICED.K0.INIT 0000001100000111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R2C62:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02W0401 arc: H00R0100 H02W0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0100 V02N0701 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V02N0701 arc: A0 F5 arc: A1 H00L0100 arc: A2 V01N0101 arc: A3 V02N0701 arc: A4 V02N0301 arc: A5 Q5 arc: A6 N1_V01N0101 arc: B0 E1_H01W0100 arc: B1 H02E0301 arc: B2 H01W0100 arc: B3 V02N0101 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 H02E0101 arc: C0 F4 arc: C1 H00L0000 arc: C2 E1_H02W0401 arc: C3 N1_V01N0001 arc: C4 V02N0001 arc: C5 E1_H01E0101 arc: C6 Q6 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 F2 arc: D2 V00T0100 arc: D3 E1_H02W0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 H02E0201 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 F3 arc: H01W0100 Q6 arc: LSR1 V00B0100 arc: M5 H00R0100 arc: M6 V00B0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: S1_V02S0401 F6 arc: V01S0000 F0 arc: W1_H02W0301 F1 word: SLICEC.K1.INIT 0000001100010001 word: SLICEC.K0.INIT 0000110001000100 word: SLICEA.K0.INIT 0000010011001100 word: SLICEB.K0.INIT 0101001100000000 word: SLICEB.K1.INIT 0001000100000101 word: SLICEA.K1.INIT 0011000001110000 word: SLICED.K0.INIT 0011000000100010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C63:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 V02N0001 arc: V00T0000 H02E0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V06N0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 S3_V06N0203 arc: A0 V02N0501 arc: A1 E1_H01E0001 arc: A2 V01N0101 arc: A5 V02N0301 arc: A6 F5 arc: A7 V02N0101 arc: B0 V02N0301 arc: B1 V00T0000 arc: B2 E1_H02W0101 arc: B5 V02N0701 arc: B6 H02E0301 arc: B7 N1_V01S0000 arc: C0 V02N0401 arc: C1 E1_H02W0401 arc: C2 V02N0401 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 V01N0101 arc: D0 E1_H02W0201 arc: D1 F2 arc: D2 V02N0201 arc: D5 V02N0601 arc: D6 W1_H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: W1_H02W0301 F1 word: SLICED.K1.INIT 0000000101000101 word: SLICEC.K1.INIT 0101001100000000 word: SLICED.K0.INIT 1100110000000100 word: SLICEA.K0.INIT 1100101000000000 word: SLICEB.K0.INIT 0011001000000010 word: SLICEA.K1.INIT 0011001100100011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R2C64:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02S0501 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0201 arc: H00R0000 E1_H02W0401 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H06E0003 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 E1_H01W0000 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 H02W0501 arc: A7 H02E0501 arc: B2 V01N0001 arc: B4 V00B0100 arc: B7 V01S0000 arc: C2 H00R0100 arc: C3 H00R0100 arc: C4 E1_H02W0601 arc: C7 H02W0601 arc: CE0 V02N0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 F2 arc: D7 H00L0100 arc: E1_H02E0301 Q1 arc: E1_H02E0701 Q7 arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 F7 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0501 arc: M1 E1_H02W0001 arc: M2 V00T0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 Q7 arc: V01S0100 F4 word: SLICED.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 1110111011100100 word: SLICEB.K1.INIT 1111111111110101 word: SLICEC.K0.INIT 1000110010001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C65:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0100 H02E0701 arc: H01W0000 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V06N0203 arc: A0 F5 arc: A1 H02W0501 arc: A2 S1_V02N0501 arc: A3 H02W0501 arc: A4 H02E0701 arc: A5 V00T0100 arc: A7 N1_V01N0101 arc: B0 H02W0301 arc: B1 Q1 arc: B2 V02N0101 arc: B3 H02E0301 arc: B4 H02E0301 arc: B5 H00L0000 arc: B7 E1_H02W0301 arc: C0 F4 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H00R0100 arc: C4 V01N0101 arc: C5 V01N0101 arc: C7 E1_H01E0101 arc: CE0 H02E0101 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02W0201 arc: D2 V00T0100 arc: D3 H02W0201 arc: D4 H01W0000 arc: D5 H01W0000 arc: D7 E1_H02W0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M1 H02W0001 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 F0 arc: S1_V02S0501 F7 arc: V00T0100 Q1 arc: V01S0000 F3 arc: V01S0100 F1 arc: W1_H02W0001 F2 word: SLICEA.K1.INIT 0000000011011000 word: SLICEB.K1.INIT 1110010000000000 word: SLICEC.K1.INIT 0000000010101100 word: SLICEC.K0.INIT 1010110000000000 word: SLICEA.K0.INIT 1100110011001000 word: SLICED.K1.INIT 1010101010001010 word: SLICEB.K0.INIT 0101010000010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C66:PLC2 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 H01E0101 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 H00L0100 arc: A3 F5 arc: A4 V02N0101 arc: A5 Q5 arc: A6 E1_H01W0000 arc: A7 Q7 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 E1_H02W0101 arc: B3 H02W0101 arc: B4 V02N0701 arc: B5 V02S0501 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 W1_H02E0401 arc: C3 N1_V01N0001 arc: C4 V01N0101 arc: C5 V02N0201 arc: C6 F4 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 V02S0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V01S0100 arc: D3 F0 arc: D4 E1_H02W0201 arc: D5 H00L0100 arc: D6 H02W0201 arc: D7 V02N0401 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F2 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q2 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F3 arc: H01W0100 F6 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00T0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: V01S0000 Q2 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1110111111101100 word: SLICEA.K1.INIT 0010001100100000 word: SLICED.K1.INIT 1010000011000000 word: SLICEC.K1.INIT 0000101100001000 word: SLICEB.K1.INIT 1111101111001000 word: SLICEB.K0.INIT 0000111000000010 word: SLICEC.K0.INIT 0000000011100100 word: SLICED.K0.INIT 1010101010101000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C67:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0201 arc: H00R0000 S1_V02N0601 arc: N1_V01N0101 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 H02E0101 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 V06N0303 arc: A0 V02N0501 arc: A1 V02N0701 arc: A2 H02E0701 arc: A4 F5 arc: A5 V00T0100 arc: A7 H00R0000 arc: B0 V02N0101 arc: B1 V02N0301 arc: B2 H00L0000 arc: B4 V01S0000 arc: B5 E1_H02W0101 arc: B7 E1_H02W0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: C4 W1_H02E0401 arc: C5 H01E0001 arc: C7 V00B0100 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 H02E0201 arc: D4 V00B0000 arc: D5 S1_V02N0601 arc: D7 H02E0001 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: M0 H02W0601 arc: V01S0000 F7 arc: V01S0100 F0 arc: W1_H02W0001 F2 word: SLICEA.K0.INIT 0011010100000000 word: SLICEA.K1.INIT 0011010111111111 word: SLICEB.K0.INIT 1000110010000000 word: SLICED.K1.INIT 1010001010000000 word: SLICEC.K1.INIT 0000000011100010 word: SLICEC.K0.INIT 1110111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R2C68:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0301 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02S0601 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: A0 H02W0701 arc: A1 F7 arc: A2 V02S0701 arc: A3 H02E0501 arc: A4 V02N0101 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 H02W0301 arc: B1 H02E0101 arc: B2 V02N0101 arc: B3 Q3 arc: B4 V02S0701 arc: B7 V00B0100 arc: C0 F4 arc: C2 V02N0401 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C6 V01N0101 arc: C7 H02W0601 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 F2 arc: D2 H02W0201 arc: D3 S1_V02N0201 arc: D4 V00B0000 arc: D6 H01W0000 arc: D7 V02N0401 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0000 arc: M3 H00L0100 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: S1_V02S0001 F0 arc: V00B0100 Q7 arc: V00T0100 Q3 arc: V01S0000 F1 arc: W1_H02W0601 F6 word: SLICED.K1.INIT 0000010100000011 word: SLICEB.K0.INIT 0011010100000000 word: SLICEA.K1.INIT 0011001100100010 word: SLICED.K0.INIT 0101000001011111 word: SLICEC.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 0000000011011000 word: SLICEA.K0.INIT 1111111000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C69:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 V01N0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 W1_H02E0601 arc: V00T0000 V02S0601 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 H01E0101 arc: A0 V01N0101 arc: A1 V02N0501 arc: A2 W1_H02E0501 arc: A3 S1_V02N0701 arc: A4 V00T0100 arc: A5 V02N0301 arc: B0 V02S0101 arc: B1 E1_H02W0101 arc: B2 V01N0001 arc: B3 S1_V02N0301 arc: B4 S1_V02N0501 arc: C0 V02N0401 arc: C1 F4 arc: C2 H00L0000 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C5 E1_H01E0101 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 H02E0201 arc: D3 V02S0001 arc: D4 H02E0201 arc: D5 F0 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: LSR0 V00T0000 arc: M0 W1_H02E0601 arc: M3 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q0 arc: S1_V02S0701 F5 arc: V00T0100 Q3 arc: V01S0000 Q3 word: SLICEB.K1.INIT 0001101100000000 word: SLICEA.K0.INIT 0000000100110001 word: SLICEC.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 0000000011100100 word: SLICEC.K0.INIT 1010110000000000 word: SLICEA.K1.INIT 0101010101010001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C70:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0203 arc: H00L0100 W1_H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 W1_H02E0501 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 H06W0203 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0401 arc: V00T0100 V02N0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W3_H06W0203 E1_H01W0000 arc: A0 V01N0101 arc: A3 S1_V02N0501 arc: A4 H02E0501 arc: A6 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 F3 arc: B1 V01N0001 arc: B3 H02E0101 arc: B4 H02E0101 arc: B6 V00B0100 arc: B7 E1_H02W0101 arc: C0 F4 arc: C1 F4 arc: C3 V02N0601 arc: C4 Q4 arc: C6 H02E0401 arc: C7 E1_H02W0401 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H02W0001 arc: D3 V02N0201 arc: D4 H01W0000 arc: D6 W1_H02E0201 arc: D7 H01W0000 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M4 V00B0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: S1_V02S0401 F6 arc: V00B0100 Q7 arc: V01S0000 F7 arc: W3_H06W0003 F0 word: SLICEC.K0.INIT 0000000100100011 word: SLICEB.K1.INIT 0000001100010001 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K1.INIT 0011001000000010 word: SLICED.K0.INIT 0000000011001010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C71:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0501 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 H06E0203 arc: V00B0100 V02N0101 arc: V00T0000 H02E0001 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0701 S3_V06N0203 arc: A0 W1_H02E0701 arc: A1 H02E0501 arc: A2 F5 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 W1_H02E0501 arc: B0 H01W0100 arc: B1 Q1 arc: B2 V02N0301 arc: B3 V01N0001 arc: B4 W1_H02E0101 arc: B5 V02N0701 arc: B6 W1_H02E0101 arc: B7 H02E0101 arc: C0 N1_V01N0001 arc: C1 W1_H02E0401 arc: C2 F4 arc: C3 F4 arc: C4 V01N0101 arc: C5 V00T0100 arc: C6 E1_H02W0601 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 V02N0401 arc: D5 W1_H02E0201 arc: D6 H02W0201 arc: D7 V02N0601 arc: E1_H01E0001 F7 arc: E1_H02E0301 Q1 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 Q5 arc: LSR0 H02E0301 arc: LSR1 E1_H02W0501 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 V00B0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q6 arc: V00B0000 F6 arc: V00T0100 Q1 arc: V01S0000 F0 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0001000100000011 word: SLICEC.K1.INIT 0000000001000111 word: SLICED.K0.INIT 0000010010001100 word: SLICEB.K0.INIT 1011101110111000 word: SLICEB.K1.INIT 1111111111111100 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 1010110011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C72:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H02E0601 arc: V00T0000 V02N0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 H01E0001 arc: A3 F5 arc: A4 V00T0100 arc: A5 H02E0701 arc: B3 H00R0000 arc: B4 H01E0101 arc: B5 H01E0101 arc: C3 F4 arc: C4 V00T0000 arc: C5 V02N0201 arc: D3 H02W0001 arc: D4 H00R0100 arc: D5 V02N0401 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: V01S0100 F3 word: SLICEC.K1.INIT 0001110100000000 word: SLICEC.K0.INIT 0000000100001101 word: SLICEB.K1.INIT 0011011100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R2C73:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 W3_H06E0203 arc: W1_H02W0001 H01E0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: W3_H06W0203 E3_H06W0203 .tile R2C74:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 E1_H02W0001 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: S1_V02S0401 E1_H01W0000 arc: V00B0100 H02W0501 arc: V00T0000 V02S0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 E1_H01E0001 arc: A1 F5 arc: A2 H02W0501 arc: A3 S1_V02N0701 arc: A5 Q5 arc: A6 E1_H02W0501 arc: A7 Q7 arc: B0 H01W0100 arc: B1 F3 arc: B2 H00R0000 arc: B3 Q3 arc: B4 W1_H02E0301 arc: B5 H02E0301 arc: B6 V00B0000 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: C3 H02W0401 arc: C4 E1_H01E0101 arc: C5 H02W0401 arc: C6 H02E0601 arc: C7 H02W0601 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 F0 arc: D5 V02N0601 arc: D6 E1_H01W0100 arc: D7 H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q7 arc: LSR0 V00T0000 arc: LSR1 H02W0301 arc: M3 H00L0000 arc: M5 E1_H02W0001 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: S1_V02S0101 Q3 arc: S1_V02S0301 F1 arc: V00B0000 F4 arc: V01S0000 Q5 arc: V01S0100 F7 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000010100000011 word: SLICEB.K0.INIT 1010100000100000 word: SLICEA.K0.INIT 0000000011001010 word: SLICEC.K0.INIT 0000000000000011 word: SLICED.K0.INIT 1010100011111101 word: SLICEB.K1.INIT 1010100000001000 word: SLICEC.K1.INIT 0000000011001010 word: SLICEA.K1.INIT 0000000100000001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C75:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 V01N0001 arc: E3_H06E0203 V01N0001 arc: H00R0000 V02N0601 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V06N0303 arc: A0 E1_H01E0001 arc: A1 V01N0101 arc: A2 F5 arc: A3 F5 arc: A4 V02N0301 arc: A5 V02N0301 arc: A6 H02E0501 arc: A7 H02E0701 arc: B0 H02E0101 arc: B2 H00R0100 arc: B4 V02N0701 arc: B5 H02E0301 arc: B6 V00T0000 arc: B7 V02N0501 arc: C0 F6 arc: C1 F4 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 E1_H02W0401 arc: C5 W1_H02E0401 arc: C6 E1_H02W0401 arc: C7 E1_H01E0101 arc: D0 H00R0000 arc: D1 W1_H02E0201 arc: D2 S1_V02N0201 arc: D3 V01S0100 arc: D4 V02N0401 arc: D5 W1_H02E0001 arc: D6 S1_V02N0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F2 arc: H01W0100 F0 arc: M0 V00B0000 arc: M2 V00B0100 arc: V01S0100 F7 word: SLICEC.K0.INIT 1010000011000000 word: SLICED.K0.INIT 1011000010000000 word: SLICEA.K0.INIT 1111110010111000 word: SLICEA.K1.INIT 1111101011111111 word: SLICEC.K1.INIT 0101001100000000 word: SLICED.K1.INIT 0000001000000111 word: SLICEB.K0.INIT 1110111111100000 word: SLICEB.K1.INIT 1111111110101111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R2C76:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 W3_H06E0203 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 E1_H01W0100 .tile R2C77:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 E1_H02W0401 arc: H01W0100 W3_H06E0303 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 W3_H06E0303 arc: V00T0000 W1_H02E0201 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: A0 F7 arc: A2 W1_H02E0501 arc: A3 V00T0000 arc: A4 F5 arc: A5 W1_H02E0501 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B1 H02W0301 arc: B2 H00R0100 arc: B3 Q3 arc: B5 V02S0701 arc: B6 V02N0701 arc: B7 V01S0000 arc: C0 H02W0401 arc: C1 E1_H01W0000 arc: C2 V02N0601 arc: C3 N1_V01N0001 arc: C4 W1_H02E0401 arc: C5 V00B0100 arc: C6 H02W0601 arc: C7 W1_H02E0601 arc: CE0 H02W0101 arc: CE1 H02E0101 arc: CE2 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 H02E0201 arc: D3 W1_H02E0001 arc: D4 F2 arc: D5 H02E0201 arc: D6 V02S0401 arc: D7 W1_H02E0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q7 arc: E1_H02E0301 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F6 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M1 H02W0001 arc: M3 H00L0000 arc: M5 H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: V00B0100 Q5 arc: V00T0100 F3 arc: V01S0000 Q1 arc: V01S0100 F0 word: SLICEB.K1.INIT 0000101000100010 word: SLICED.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K0.INIT 1110000000100000 word: SLICEC.K1.INIT 1110010000000000 word: SLICEB.K0.INIT 0000000011100100 word: SLICEC.K0.INIT 0000000001010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C78:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V01N0101 arc: H00L0000 S1_V02N0001 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H02E0701 arc: V00B0100 H02E0701 arc: V00T0000 V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0601 W3_H06E0303 arc: A0 H02E0701 arc: A1 V02N0701 arc: A2 H02E0501 arc: A3 H00L0100 arc: A4 N1_V01S0100 arc: A5 F7 arc: A7 Q7 arc: B0 H02E0301 arc: B1 V00B0000 arc: B2 E1_H02W0301 arc: B3 V02N0301 arc: B4 V01S0000 arc: B6 H02W0301 arc: B7 V00B0000 arc: C0 W1_H02E0401 arc: C1 V02N0401 arc: C2 H00L0100 arc: C3 N1_V01S0100 arc: C4 V02S0201 arc: C5 H02E0401 arc: C6 W1_H02E0601 arc: C7 E1_H02W0401 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V00B0000 arc: D5 F2 arc: D6 F0 arc: D7 H02E0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 F6 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F4 arc: H01W0100 F3 arc: LSR0 W1_H02E0501 arc: LSR1 H02W0501 arc: M1 H00L0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: S1_V02S0501 F5 arc: V00B0000 Q4 arc: V00T0100 Q1 arc: V01S0000 Q7 arc: W1_H02W0301 F3 arc: W1_H02W0401 F4 word: SLICEB.K1.INIT 0000010000000111 word: SLICEC.K0.INIT 0010000000101010 word: SLICEA.K1.INIT 1110010000000000 word: SLICEA.K0.INIT 0100010101000000 word: SLICED.K0.INIT 0000000000001100 word: SLICED.K1.INIT 1010000011000000 word: SLICEB.K0.INIT 0011000100100000 word: SLICEC.K1.INIT 0000000000000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C79:PLC2 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 W1_H02E0701 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0203 H06E0203 arc: V00B0100 W1_H02E0701 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V02S0501 arc: A0 S1_V02N0701 arc: A2 H02E0501 arc: A3 H00L0100 arc: A4 H02E0701 arc: A6 H00R0000 arc: A7 F5 arc: B0 F3 arc: B1 F3 arc: B2 H02E0101 arc: B3 V01N0001 arc: B4 V02N0501 arc: B5 H02E0301 arc: B6 V02N0701 arc: B7 H01E0101 arc: C0 F4 arc: C1 F4 arc: C2 V02N0401 arc: C3 H00R0100 arc: C4 V02N0001 arc: C5 H01E0001 arc: C6 V02N0201 arc: C7 W1_H02E0601 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 V00B0100 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 F2 arc: D6 H00R0100 arc: D7 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: V00B0000 F6 arc: W3_H06W0203 F7 word: SLICEC.K0.INIT 1010110000000000 word: SLICEB.K1.INIT 0000110000001010 word: SLICED.K0.INIT 0000000011001010 word: SLICEA.K0.INIT 1111110010101010 word: SLICEA.K1.INIT 1111110011111111 word: SLICEB.K0.INIT 0000000010101100 word: SLICEC.K1.INIT 0000000000000011 word: SLICED.K1.INIT 1110000011101111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R2C80:PLC2 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H06E0303 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 .tile R2C81:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0701 W3_H06E0203 arc: H00R0000 E1_H02W0601 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: A0 E1_H01E0001 arc: B0 V01N0001 arc: C0 H02E0601 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: F0 F0_SLICE arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0001 Q0 arc: V01S0000 Q0 word: SLICEA.K0.INIT 1100110011011000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R2C82:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V06N0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: S1_V02S0501 V01N0101 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02W0001 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 V00T0000 arc: B0 V02N0301 arc: B1 E1_H02W0301 arc: B2 S1_V02N0301 arc: B3 S1_V02N0301 arc: C0 V02N0601 arc: C1 H02W0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 H02W0001 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: LSR0 H02W0301 arc: LSR1 V00B0000 arc: M2 E1_H02W0601 arc: M3 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: S1_V02S0101 Q1 arc: V00T0100 Q3 arc: V01S0000 Q0 word: SLICEA.K0.INIT 1111000111100000 word: SLICEA.K1.INIT 1111000011100100 word: SLICEB.K0.INIT 1110111111000101 word: SLICEB.K1.INIT 1100110011001111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R2C83:PLC2 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 H01E0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0501 arc: H01W0100 W3_H06E0303 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 V06N0003 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 W1_H02E0701 arc: A2 H02W0501 arc: A3 S1_V02N0701 arc: B0 V01N0001 arc: B2 H00R0000 arc: C0 S1_V02N0601 arc: C2 V02N0601 arc: C3 V02N0601 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 V00T0100 arc: D3 V00B0100 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: LSR0 V00T0000 arc: LSR1 W1_H02E0301 arc: M2 H02W0601 arc: M3 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: S1_V02S0201 Q0 arc: V00T0100 Q3 arc: V01S0000 F2 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1100110011011000 word: SLICEB.K0.INIT 1111110110001101 word: SLICEB.K1.INIT 1010101010101111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R2C84:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 W1_H02E0301 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 E1_H01E0001 arc: A2 S1_V02N0701 arc: B0 S1_V02N0101 arc: B1 H02E0301 arc: B2 H00R0000 arc: B3 H02E0301 arc: C0 V02N0601 arc: C1 H00L0100 arc: C2 V02N0601 arc: C3 S1_V02N0401 arc: CE0 V02N0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: E1_H01E0001 Q1 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00R0000 Q6 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 F0 word: SLICEB.K0.INIT 1110101011001111 word: SLICEB.K1.INIT 1111000011110011 word: SLICEA.K0.INIT 1110110010101111 word: SLICEA.K1.INIT 1111000011110011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R2C85:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: A0 H02E0501 arc: A2 H02E0501 arc: B0 S1_V02N0301 arc: B1 V00B0000 arc: B2 V02N0301 arc: B3 V02N0301 arc: C0 H02W0601 arc: C1 E1_H02W0401 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 H02E0401 arc: CE0 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02N0001 arc: D2 V02S0201 arc: D3 H00R0000 arc: D4 H01W0000 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q4 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M1 H00L0100 arc: M2 H02E0601 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: S1_V02S0001 F0 arc: S1_V02S0201 F2 arc: V01S0000 Q4 arc: V01S0100 Q6 word: SLICEC.K0.INIT 0000000011110000 word: SLICEA.K0.INIT 1111110110001101 word: SLICEA.K1.INIT 1111111100000011 word: SLICEB.K0.INIT 1111110110001101 word: SLICEB.K1.INIT 1100110011001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R2C86:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06N0203 arc: H00R0000 E1_H02W0601 arc: H00R0100 S1_V02N0701 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V00T0100 V02S0501 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V06N0303 arc: A0 H00L0100 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 N1_V01N0101 arc: B0 E1_H01W0100 arc: B2 H01W0100 arc: B4 S1_V02N0701 arc: B5 S1_V02N0701 arc: C0 S1_V02N0601 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 H02W0401 arc: C5 H02W0401 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 V02N0601 arc: D5 V02N0601 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H00L0100 Q1 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 H01E0001 arc: M1 V01S0100 arc: M2 H02W0601 arc: M3 H00R0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: S1_V02S0001 F2 arc: S1_V02S0101 Q1 arc: V01S0000 F0 arc: V01S0100 F4 word: SLICEA.K1.INIT 0000000000000000 word: SLICEA.K0.INIT 1000010010100101 word: SLICEB.K0.INIT 1110110010101111 word: SLICEB.K1.INIT 1010101010101111 word: SLICEC.K0.INIT 1110101011001111 word: SLICEC.K1.INIT 1100110011001111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R2C87:PLC2 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 S1_V02N0001 arc: H00R0000 H02W0601 arc: S1_V02S0001 E1_H01W0000 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 S1_V02N0601 arc: A0 S1_V02N0701 arc: A1 V02N0501 arc: A2 H02E0701 arc: A3 H02E0701 arc: B0 V00B0000 arc: B2 H00R0100 arc: C0 V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 E1_H02W0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00R0100 Q5 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 N1_V01N0101 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F0 arc: S1_V02S0201 F2 arc: V00B0000 Q4 arc: V01S0000 Q6 word: SLICEA.K0.INIT 1110110011110101 word: SLICEA.K1.INIT 1010101010101111 word: SLICEB.K0.INIT 1111110110001101 word: SLICEB.K1.INIT 1111111100000101 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R2C88:PLC2 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 H02E0701 arc: W1_H02W0601 V02N0601 arc: A2 H02E0501 arc: A3 H02E0501 arc: B2 H01W0100 arc: C2 H02E0401 arc: C3 H02E0401 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D2 H02W0001 arc: D3 H02W0001 arc: F2 F5B_SLICE arc: H01W0100 Q5 arc: LSR0 V00B0100 arc: M2 H02E0601 arc: M5 H00R0100 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: S1_V02S0201 F2 word: SLICEB.K0.INIT 1110110010101111 word: SLICEB.K1.INIT 1010101010101111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R30C30:PLC2 arc: N1_V02N0201 N3_V06S0103 .tile R30C31:PLC2 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N3_V06S0303 .tile R30C32:PLC2 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 .tile R30C33:PLC2 arc: E1_H02E0601 V06S0303 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06W0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0601 V06S0303 .tile R30C34:PLC2 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: W1_H02W0201 E1_H02W0201 .tile R30C35:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 .tile R30C36:PLC2 arc: E1_H02E0201 N3_V06S0103 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: W1_H02W0201 N3_V06S0103 arc: W3_H06W0103 N3_V06S0103 .tile R30C37:PLC2 arc: N1_V02N0201 H02E0201 arc: N1_V02N0601 E1_H02W0601 .tile R30C38:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 H06W0203 .tile R30C39:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: W1_H02W0601 N1_V02S0601 .tile R30C40:PLC2 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 S1_V02N0601 .tile R30C41:PLC2 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: W3_H06W0203 V01N0001 .tile R30C42:PLC2 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 .tile R30C43:PLC2 arc: N1_V01N0001 N3_V06S0003 .tile R30C45:PLC2 arc: N1_V02N0301 H02W0301 .tile R30C46:PLC2 arc: N1_V02N0301 N3_V06S0003 arc: W1_H02W0301 N3_V06S0003 .tile R30C47:PLC2 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 V01N0001 .tile R30C48:PLC2 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 .tile R30C49:PLC2 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02W0601 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N3_V06S0303 .tile R30C50:PLC2 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H02W0201 arc: W1_H02W0601 V06S0303 .tile R30C51:PLC2 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 S1_V02N0601 arc: V01S0000 N3_V06S0103 .tile R30C52:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 N3_V06S0203 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 .tile R30C53:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: E1_H02E0601 V06S0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 .tile R30C54:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 .tile R30C55:PLC2 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0601 N3_V06S0303 .tile R30C56:PLC2 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H02W0701 .tile R30C57:PLC2 arc: E1_H02E0301 N3_V06S0003 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02W0301 arc: W1_H02W0001 N3_V06S0003 arc: W1_H02W0101 N3_V06S0103 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0701 N3_V06S0203 .tile R30C58:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 N1_V01S0100 arc: W1_H02W0301 N3_V06S0003 .tile R30C59:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N1_V01S0000 .tile R30C61:PLC2 arc: N1_V02N0601 S1_V02N0601 .tile R30C62:PLC2 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 .tile R30C63:PLC2 arc: N3_V06N0103 S1_V02N0101 .tile R30C64:PLC2 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 E3_H06W0203 .tile R30C65:PLC2 arc: H01W0000 E3_H06W0103 arc: N3_V06N0103 E3_H06W0103 .tile R30C66:PLC2 arc: W1_H02W0201 V06S0103 .tile R30C69:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02N0601 arc: N1_V02N0001 H02W0001 .tile R30C70:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V01N0101 arc: H00R0100 N1_V02S0501 arc: N1_V02N0501 N1_V01S0100 arc: V00B0000 H02E0401 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 N1_V01S0000 arc: W3_H06W0203 N1_V01S0000 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 arc: V01S0000 Q2 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C71:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: H00R0100 H02E0501 arc: V00B0000 V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02E0101 arc: W3_H06W0103 N1_V01S0100 arc: C2 E1_H02W0401 arc: CE0 H02W0101 arc: CE1 H02W0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D2 V02N0201 arc: E1_H01E0101 F2 arc: F2 F2_SLICE arc: LSR0 V00T0000 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: M2 V00T0100 arc: M3 H00R0100 arc: M6 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0501 Q7 arc: N1_V02N0601 Q6 word: SLICEB.K0.INIT 1111000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C72:PLC2 arc: E1_H02E0001 V06S0003 arc: N1_V02N0501 H02E0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 V06S0003 .tile R30C73:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 E1_H01W0100 arc: V00B0100 V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: A6 N1_V01N0101 arc: CLK0 G_HPBX0000 arc: D6 H02E0001 arc: E1_H02E0401 Q6 arc: F6 F6_SLICE arc: LSR1 V00B0000 arc: M6 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V02N0601 Q6 arc: V00B0000 F6 word: SLICED.K0.INIT 1111111101010101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C74:PLC2 arc: E1_H02E0701 N1_V02S0701 arc: V00B0000 V02S0001 arc: CLK0 G_HPBX0000 arc: E3_H06E0303 Q6 arc: H01W0100 Q6 arc: LSR1 V00B0000 arc: M6 H02E0401 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q6 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C75:PLC2 arc: E1_H02E0301 N1_V02S0301 arc: H00L0100 V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0501 arc: V00T0000 N1_V02S0601 arc: A5 Q5 arc: B5 E1_H02W0301 arc: C5 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 H01W0000 arc: E1_H01E0101 Q4 arc: E1_H02E0701 F5 arc: F5 F5_SLICE arc: H01W0000 Q0 arc: LSR0 V00T0000 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M3 H00R0100 arc: M4 V00B0100 arc: M5 H02W0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: N3_V06N0003 Q3 word: SLICEC.K1.INIT 0000000000000001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C76:PLC2 arc: V00B0000 V02N0001 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0401 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H02E0001 Q0 arc: LSR0 E1_H02W0501 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0001 Q0 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C77:PLC2 arc: H00L0000 N1_V02S0201 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 W1_H02E0701 arc: V00B0100 N1_V02S0101 arc: C6 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D6 H02W0201 arc: E1_H01E0101 F6 arc: F6 F6_SLICE arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 W1_H02E0301 arc: M1 E1_H02W0001 arc: M3 H01W0100 arc: M5 H00L0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q5 word: SLICED.K0.INIT 1111000011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C78:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0501 N3_V06S0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: S1_V02S0101 E1_H02W0101 arc: V00B0100 V02S0301 arc: V01S0100 N3_V06S0303 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 H01E0101 arc: B5 V02N0701 arc: CLK0 G_HPBX0000 arc: D5 V02S0401 arc: E3_H06E0103 Q1 arc: F5 F5_SLICE arc: LSR1 V00B0100 arc: M1 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0701 F5 word: SLICEC.K1.INIT 1100110011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C79:PLC2 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E1_H02W0301 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 V06S0003 arc: CE0 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: H00L0100 Q1 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M1 H00R0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0501 Q7 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C80:PLC2 arc: V00T0100 V02S0501 arc: CLK0 G_HPBX0000 arc: LSR1 V00T0100 arc: M1 H02W0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: W1_H02W0101 Q1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C81:PLC2 arc: E1_H02E0701 V06S0203 arc: N1_V02N0201 H06E0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 N3_V06S0103 arc: W1_H02W0301 N3_V06S0003 .tile R30C82:PLC2 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0701 H02E0701 arc: A0 H02E0701 arc: C0 N1_V02S0401 arc: C2 E1_H02W0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D2 N1_V02S0001 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 word: SLICEA.K0.INIT 0101010100000101 word: SLICEB.K0.INIT 1111000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 .tile R30C83:PLC2 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 .tile R30C84:PLC2 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V06S0303 arc: E3_H06E0203 W3_H06E0103 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 N3_V06S0003 arc: N3_V06N0103 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0601 V06S0303 arc: C0 N1_V01N0001 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: H01W0000 Q0 arc: MUXCLK0 CLK0 arc: N1_V02N0001 Q0 arc: N3_V06N0003 Q0 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C85:PLC2 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0601 N1_V02S0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0701 H01E0101 .tile R30C86:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 H02E0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 W1_H02E0601 arc: C0 W1_H02E0401 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 word: SLICEA.K0.INIT 1111000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET SET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C87:PLC2 arc: E1_H02E0301 V02S0301 arc: H00L0000 V02N0001 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 H06E0003 arc: N3_V06N0203 H06E0203 arc: S3_V06S0203 N3_V06S0103 arc: V00B0000 H02W0601 arc: V00B0100 E1_H02W0501 arc: W1_H02W0501 V06S0303 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q6 arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: M5 H00R0100 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: V01S0000 Q5 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R30C88:PLC2 arc: E1_H02E0701 N3_V06S0203 arc: H00R0000 W1_H02E0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0601 W1_H02E0601 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0601 N1_V01S0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: LSR0 H02E0301 arc: LSR1 V00T0000 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00B0100 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0201 Q2 arc: N1_V02N0701 Q5 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R31C31:PLC2 arc: N3_V06N0303 H06W0303 .tile R31C32:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N3_V06N0303 S1_V02N0601 .tile R31C33:PLC2 arc: N1_V02N0001 N3_V06S0003 .tile R31C34:PLC2 arc: N1_V02N0601 N3_V06S0303 arc: W3_H06W0303 E1_H02W0601 .tile R31C35:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: N1_V02N0001 N3_V06S0003 arc: N3_V06N0003 E3_H06W0003 .tile R31C36:PLC2 arc: E3_H06E0003 N3_V06S0003 arc: E3_H06E0203 H01E0001 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H02W0201 arc: W1_H02W0601 N3_V06S0303 .tile R31C37:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 arc: W1_H02W0201 N3_V06S0103 .tile R31C38:PLC2 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0601 H06W0303 .tile R31C39:PLC2 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 E1_H02W0201 arc: N3_V06N0203 H06E0203 .tile R31C40:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 .tile R31C41:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: W1_H02W0201 V06S0103 arc: W3_H06W0003 N3_V06S0003 arc: W3_H06W0303 V06S0303 .tile R31C42:PLC2 arc: N1_V02N0001 N3_V06S0003 .tile R31C43:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R31C45:PLC2 arc: E1_H02E0601 N3_V06S0303 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0701 N3_V06S0203 .tile R31C46:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 H02E0601 .tile R31C47:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 H02E0401 .tile R31C49:PLC2 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0301 N3_V06S0003 arc: W1_H02W0001 N3_V06S0003 .tile R31C51:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N3_V06S0003 .tile R31C52:PLC2 arc: E1_H02E0501 V06S0303 arc: N1_V02N0101 N3_V06S0103 arc: V01S0100 N3_V06S0303 .tile R31C53:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 N3_V06S0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0701 N3_V06S0203 .tile R31C54:PLC2 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 N3_V06S0303 .tile R31C55:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N3_V06S0303 arc: W1_H02W0201 N3_V06S0103 .tile R31C56:PLC2 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 N3_V06S0303 .tile R31C57:PLC2 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 N3_V06S0303 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 N3_V06S0303 .tile R31C58:PLC2 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 N3_V06S0203 .tile R31C65:PLC2 arc: N1_V02N0101 N3_V06S0103 .tile R31C66:PLC2 arc: N3_V06N0203 E3_H06W0203 .tile R31C69:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R31C70:PLC2 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 N1_V01S0000 .tile R31C71:PLC2 arc: N1_V02N0201 H02W0201 .tile R31C72:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: N3_V06N0103 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 .tile R31C73:PLC2 arc: N1_V02N0101 H02E0101 .tile R31C75:PLC2 arc: N1_V02N0001 H06W0003 arc: N1_V02N0301 H06W0003 arc: N3_V06N0103 H06W0103 .tile R31C76:PLC2 arc: N1_V02N0001 N1_V01S0000 .tile R31C78:PLC2 arc: E1_H02E0501 N3_V06S0303 arc: N1_V01N0001 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: V00B0100 V02S0101 arc: V00T0100 V02S0701 arc: W3_H06W0003 N3_V06S0003 arc: CLK0 G_HPBX0000 arc: LSR1 V00T0100 arc: M2 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V02N0001 Q2 arc: W3_H06W0103 Q2 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R31C79:PLC2 arc: N1_V02N0501 H02E0501 .tile R31C83:PLC2 arc: N1_V02N0601 E1_H02W0601 .tile R31C85:PLC2 arc: W1_H02W0601 N1_V02S0601 .tile R31C87:PLC2 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0601 N1_V01S0000 .tile R31C88:PLC2 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N3_V06S0203 arc: N1_V02N0401 E1_H01W0000 arc: S3_V06S0203 N3_V06S0103 .tile R32C32:PLC2 arc: N1_V02N0101 N3_V06S0103 .tile R32C40:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R32C41:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 N3_V06S0003 arc: N1_V02N0601 N3_V06S0303 .tile R32C51:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R32C52:PLC2 arc: N1_V02N0301 N1_V01S0100 .tile R32C56:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R32C61:PLC2 arc: N1_V02N0601 S1_V02N0301 .tile R32C62:PLC2 arc: E1_H02E0101 V06S0103 arc: N1_V02N0601 N3_V06S0303 .tile R32C63:PLC2 arc: N1_V02N0101 H02E0101 .tile R32C70:PLC2 arc: N1_V02N0301 N3_V06S0003 .tile R32C73:PLC2 arc: N1_V02N0301 N3_V06S0003 .tile R32C77:PLC2 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0501 N3_V06S0303 .tile R32C79:PLC2 arc: N1_V02N0401 N3_V06S0203 arc: W1_H02W0001 N3_V06S0003 .tile R32C86:PLC2 arc: N1_V02N0501 N3_V06S0303 .tile R32C87:PLC2 arc: N1_V02N0201 N3_V06S0103 .tile R32C88:PLC2 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0701 H02W0701 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 F4 arc: E1_H02E0101 F3 arc: E1_H02E0201 F2 arc: E1_H02E0501 F7 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE word: SLICED.K1.INIT 0000000011111111 word: SLICEB.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 0000000011111111 word: SLICEC.K0.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 .tile R33C32:PLC2 arc: N1_V02N0601 N3_V06S0303 .tile R33C61:PLC2 arc: V01S0100 N3_V06S0303 .tile R33C70:PLC2 arc: N3_V06N0003 S1_V02N0301 .tile R33C83:PLC2 arc: N3_V06N0103 S1_V02N0201 .tile R33C87:PLC2 arc: N1_V02N0501 S3_V06N0303 .tile R35C28:PLC2 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 .tile R35C34:PLC2 arc: N1_V01N0101 S3_V06N0203 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 .tile R35C40:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R35C43:PLC2 arc: N3_V06N0303 S3_V06N0203 .tile R35C46:PLC2 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 .tile R35C55:PLC2 arc: N3_V06N0203 S3_V06N0103 .tile R35C58:PLC2 arc: N3_V06N0103 S3_V06N0103 .tile R35C64:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R35C67:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R35C70:PLC2 arc: N1_V02N0301 S3_V06N0003 .tile R35C73:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R35C76:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R35C79:PLC2 arc: N3_V06N0203 S3_V06N0103 .tile R35C82:PLC2 arc: E1_H02E0201 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 .tile R35C83:PLC2 arc: N1_V02N0201 H02E0201 .tile R35C88:PLC2 arc: N3_V06N0203 S3_V06N0103 arc: S3_V06S0103 N3_V06S0003 .tile R36C87:PLC2 arc: S3_V06S0303 N3_V06S0203 .tile R38C88:PLC2 arc: E1_H02E0101 N3_V06S0103 arc: N3_V06N0003 E1_H01W0000 arc: C7 S1_V02N0201 arc: D1 S1_V02N0201 arc: E1_H01E0101 F1 arc: E1_H02E0501 F7 arc: F1 F1_SLICE arc: F7 F7_SLICE word: SLICED.K1.INIT 0000111100001111 word: SLICEA.K1.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 .tile R39C87:PLC2 arc: N3_V06N0303 S1_V02N0501 .tile R3C29:PLC2 arc: E1_H02E0201 V02N0201 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 Q0 arc: V00B0100 F7 word: SLICED.K1.INIT 1111111100001111 word: SLICEA.K0.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C30:PLC2 arc: H00L0100 V02S0301 arc: N1_V02N0501 H01E0101 arc: S1_V02S0601 V01N0001 arc: V00B0100 H02W0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: A1 E1_H02W0501 arc: A4 V00T0100 arc: A7 N1_V01S0100 arc: B1 H00R0100 arc: B4 N1_V01S0000 arc: B7 V00T0000 arc: C0 E1_H01W0000 arc: C1 E1_H02W0601 arc: C4 V02S0201 arc: C7 H01E0001 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H00R0000 arc: D4 H02W0001 arc: D7 H00L0100 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 F7 arc: H01W0100 F1 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0101 F1 word: SLICED.K1.INIT 0000000000010000 word: SLICEC.K0.INIT 0000000000000001 word: SLICEA.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111000000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 .tile R3C31:PLC2 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0701 V06N0203 arc: A0 V02S0501 arc: A3 E1_H02W0701 arc: A6 E1_H02W0501 arc: B2 V02N0301 arc: B4 E1_H02W0101 arc: B5 H02W0101 arc: B7 H01E0101 arc: E1_H02E0101 F3 arc: E1_H02E0401 F4 arc: E1_H02E0501 F7 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: S1_V02S0501 F5 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C32:PLC2 arc: E1_H02E0301 V01N0101 arc: V00T0000 E1_H02W0201 arc: W1_H02W0101 V01N0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: A1 V02S0701 arc: A4 V02N0301 arc: B0 V01N0001 arc: B2 E1_H02W0301 arc: B3 V02N0101 arc: B5 S1_V02N0501 arc: B6 E1_H02W0101 arc: B7 V00T0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: E1_H02E0001 F2 arc: E1_H02E0201 F0 arc: E1_H02E0401 F6 arc: E1_H02E0501 F7 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0001 F0 arc: S1_V02S0701 F5 arc: V01S0000 F4 arc: V01S0100 F3 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C33:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: H00L0000 V02N0201 arc: N1_V02N0101 H01E0101 arc: S1_V02S0001 H06E0003 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E1_H01W0000 arc: V00B0000 V02S0201 arc: V00T0000 V02S0401 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0501 V02N0501 arc: A4 H02W0701 arc: A5 V02N0301 arc: A6 V02N0301 arc: B0 V00B0000 arc: B1 E1_H01W0100 arc: B4 V02N0701 arc: B5 H01E0101 arc: B6 H02E0301 arc: B7 W1_H02E0101 arc: C4 H01E0001 arc: C5 V02N0001 arc: C6 V02S0001 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D4 F0 arc: D5 H02E0201 arc: D6 V02N0401 arc: D7 H02W0001 arc: E1_H01E0001 F4 arc: E1_H02E0301 F1 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: N1_V02N0201 F0 arc: V01S0100 F6 arc: W1_H02W0701 Q7 word: SLICED.K0.INIT 1000010000100001 word: SLICED.K1.INIT 1100110000000000 word: SLICEC.K1.INIT 1001000000001001 word: SLICEC.K0.INIT 1000010000100001 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C34:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V06N0303 arc: H00L0100 E1_H02W0301 arc: H00R0100 E1_H02W0501 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 E1_H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0701 V01N0101 arc: A1 H00L0000 arc: A4 W1_H02E0501 arc: A5 H02E0701 arc: A6 V00T0100 arc: A7 S1_V02N0301 arc: B0 V02N0301 arc: B1 V01N0001 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 V02N0501 arc: B5 H00R0000 arc: B6 V00B0000 arc: B7 H02E0101 arc: C1 N1_V01N0001 arc: C4 E1_H02W0401 arc: C5 H01E0001 arc: C6 W1_H02E0401 arc: C7 H02E0401 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0001 arc: D2 V00T0100 arc: D3 W1_H02E0001 arc: D4 W1_H02E0001 arc: D5 H02W0201 arc: D6 S1_V02N0401 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 F4 arc: H01W0000 F1 arc: H01W0100 Q2 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: S1_V02S0201 Q0 arc: S1_V02S0701 F5 arc: V01S0000 Q7 arc: V01S0100 F6 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q3 word: SLICEA.K1.INIT 1000001001000001 word: SLICEA.K0.INIT 1100110000000000 word: SLICEB.K0.INIT 1100110000000000 word: SLICEB.K1.INIT 1100110000000000 word: SLICEC.K0.INIT 1000010000100001 word: SLICED.K1.INIT 1001000000001001 word: SLICED.K0.INIT 1000001001000001 word: SLICEC.K1.INIT 1000000000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R3C35:PLC2 arc: H00L0100 V02S0301 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0601 E1_H01W0000 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: W1_H02W0201 H01E0001 arc: A0 V02S0501 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 V00T0100 arc: B5 E1_H02W0101 arc: B6 E1_H02W0101 arc: B7 E1_H02W0301 arc: C0 E1_H01W0000 arc: C2 H02E0401 arc: C3 W1_H02E0401 arc: C5 E1_H01E0101 arc: C6 V00B0100 arc: C7 H02E0601 arc: CE0 V02S0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 H02E0001 arc: D3 H02E0001 arc: D5 E1_H02W0001 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0501 arc: M4 V00B0000 arc: M5 H00L0100 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: S1_V02S0401 F6 arc: S1_V02S0701 F5 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 F7 arc: W1_H02W0101 Q3 word: SLICEC.K1.INIT 0000110001110111 word: SLICED.K0.INIT 0001000111001111 word: SLICED.K1.INIT 1000010000100001 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 1111111111111010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C36:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: H00R0100 V02N0501 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 H06W0203 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S3_V06S0003 H06W0003 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 V02S0501 arc: A1 V02S0701 arc: A4 S1_V02N0301 arc: A5 V00T0000 arc: A6 F5 arc: B2 H01W0100 arc: B5 H02W0101 arc: B6 S1_V02N0701 arc: C0 V02N0601 arc: C1 E1_H02W0401 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 H02W0401 arc: C5 V02N0001 arc: C6 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 V00T0100 arc: D3 V00B0100 arc: D4 E1_H01W0100 arc: D5 V02S0601 arc: D6 V00B0000 arc: E1_H01E0001 F1 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F1 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0301 arc: M5 E1_H02W0001 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: S1_V02S0101 F1 arc: S1_V02S0601 F6 arc: S3_V06S0103 F1 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V01S0000 F1 arc: V01S0100 F1 arc: W1_H02W0001 Q0 arc: W1_H02W0301 Q1 word: SLICEA.K0.INIT 1010101000001010 word: SLICEA.K1.INIT 1010000000000000 word: SLICEC.K1.INIT 0001000011010000 word: SLICEC.K0.INIT 0000000000001010 word: SLICED.K0.INIT 1111111000000000 word: SLICEB.K0.INIT 1100000011000000 word: SLICEB.K1.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C37:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 H01E0001 arc: H00R0100 E1_H02W0501 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 E1_H02W0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H02E0301 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V02N0501 arc: A0 H02E0501 arc: A3 V00T0000 arc: A4 V02N0101 arc: A7 V00T0100 arc: B1 H02E0301 arc: B2 H02E0301 arc: B3 V02N0301 arc: B4 H00L0000 arc: B7 F3 arc: C1 N1_V01N0001 arc: C3 V02N0401 arc: C4 V02N0201 arc: C7 F4 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 V01S0100 arc: D3 N1_V01S0000 arc: D4 S1_V02N0401 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0000 Q6 arc: H01W0100 F7 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: M4 E1_H02W0401 arc: M6 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 Q7 word: SLICEC.K0.INIT 1111110100000000 word: SLICEB.K1.INIT 0000000100110001 word: SLICED.K1.INIT 0010000000110000 word: SLICEA.K0.INIT 1010101000000000 word: SLICEA.K1.INIT 1100000011000000 word: SLICEB.K0.INIT 1100110000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C38:PLC2 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W1_H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 H02W0501 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0101 arc: A2 V02N0701 arc: A3 S1_V02N0501 arc: A4 V00T0000 arc: B0 W1_H02E0301 arc: B4 H02E0301 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V00T0100 arc: CE0 H00R0100 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 H02E0201 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: LSR1 H02E0501 arc: M2 W1_H02E0601 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: W1_H02W0001 F2 arc: W1_H02W0601 F4 word: SLICEC.K0.INIT 0001000100000011 word: SLICEA.K0.INIT 1100110000000000 word: SLICEB.K0.INIT 1111101000001010 word: SLICEB.K1.INIT 1111101010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C39:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 W1_H02E0601 arc: H00L0000 V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02W0501 arc: A1 H02W0501 arc: A3 V02N0501 arc: A5 V00B0000 arc: A6 E1_H02W0701 arc: B0 S1_V02N0101 arc: B1 S1_V02N0301 arc: B2 H00R0000 arc: B3 H00R0000 arc: B4 H00L0000 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V00T0000 arc: C5 E1_H02W0601 arc: C6 E1_H02W0401 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D2 S1_V02N0001 arc: D4 V02N0401 arc: D5 E1_H02W0201 arc: D6 N1_V02S0401 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H00R0000 Q6 arc: H01W0000 F4 arc: LSR0 H02E0501 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: W1_H02W0001 F0 arc: W1_H02W0201 F2 word: SLICEA.K0.INIT 0000001100010011 word: SLICEA.K1.INIT 0000000000010000 word: SLICED.K0.INIT 1010111110100000 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111101011110000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1110101011101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 .tile R3C40:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: H00L0100 H02W0301 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S1_V02N0201 arc: S3_V06S0003 E3_H06W0003 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0701 E1_H01W0100 arc: A2 E1_H02W0501 arc: A3 E1_H02W0501 arc: A5 H02E0701 arc: A7 V02N0301 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 E1_H02W0301 arc: B7 V00T0000 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C2 V02N0401 arc: C4 V02N0001 arc: C6 W1_H02E0601 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V01S0100 arc: D2 E1_H02W0201 arc: D3 E1_H02W0201 arc: D4 E1_H02W0201 arc: D5 H00L0100 arc: D6 H00R0100 arc: D7 V00B0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0100 F4 arc: LSR0 H02W0501 arc: LSR1 W1_H02E0501 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: V00B0000 Q6 arc: V00T0000 Q0 arc: V01S0100 Q3 arc: W1_H02W0301 Q1 arc: W1_H02W0501 F7 word: SLICED.K1.INIT 0100010101000000 word: SLICED.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1110111011001100 word: SLICEB.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1110111011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C41:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 E1_H01W0000 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 V02S0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02S0701 arc: W3_H06W0203 E3_H06W0203 arc: A2 V00T0000 arc: A4 N1_V01S0100 arc: A6 W1_H02E0501 arc: A7 W1_H02E0501 arc: B0 E1_H02W0101 arc: B1 V02S0301 arc: B3 V02S0101 arc: B5 N1_V01S0000 arc: C0 H02E0601 arc: C1 H02W0401 arc: C2 V02N0601 arc: C3 H02W0601 arc: C4 E1_H01E0101 arc: C5 E1_H01E0101 arc: C6 V02N0001 arc: C7 V01N0101 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H00R0000 arc: D2 H00R0000 arc: D3 H00R0000 arc: D4 H02W0001 arc: D5 V02N0401 arc: D6 V01N0001 arc: D7 V02N0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q4 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q2 arc: N1_V02N0301 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q4 arc: S1_V02S0201 Q0 arc: S1_V02S0701 Q7 arc: V01S0000 Q6 arc: W1_H02W0101 Q1 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1100110011110000 word: SLICEB.K0.INIT 1010101011110000 word: SLICEC.K1.INIT 1100111111000000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1010111110100000 word: SLICED.K1.INIT 1111010110100000 word: SLICED.K0.INIT 1111101001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C42:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02S0201 arc: H00L0100 V02S0101 arc: H00R0100 W1_H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 E1_H01W0100 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0601 H06W0303 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 V02S0001 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 S3_V06N0303 arc: A1 V02S0501 arc: A5 H02W0701 arc: A6 V00T0100 arc: A7 V00T0100 arc: B0 S1_V02N0101 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 N1_V02S0101 arc: B4 H02E0101 arc: B5 H02E0101 arc: C0 N1_V01S0100 arc: C2 H00L0000 arc: C3 H02E0401 arc: C4 V02N0201 arc: C6 V00T0000 arc: C7 E1_H02W0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 H01E0101 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 H01W0000 arc: D6 H01W0000 arc: D7 H01W0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 F4 arc: H01W0100 Q0 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0501 arc: M4 V00B0000 arc: M5 H02W0001 arc: M6 V00B0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q3 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q1 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 Q5 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1100111111000000 word: SLICEA.K1.INIT 1010101011001100 word: SLICEB.K0.INIT 1111000011001100 word: SLICED.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1111101011110000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1110111010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C43:PLC2 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 V06N0303 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 E3_H06W0103 arc: V00B0000 V02S0001 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0501 V06N0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 S3_V06N0203 arc: A0 H02E0701 arc: B1 S1_V02N0101 arc: B2 V02S0101 arc: B4 H02W0301 arc: B5 E1_H02W0301 arc: B6 H01E0101 arc: B7 S1_V02N0701 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 W1_H02E0401 arc: C4 Q4 arc: C5 V00T0000 arc: C6 V01N0101 arc: C7 W1_H02E0601 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 V02N0201 arc: D4 V02S0601 arc: D5 S1_V02N0601 arc: D6 H02E0201 arc: D7 H02E0001 arc: E1_H01E0001 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M1 V01S0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0401 F6 arc: S1_V02S0401 Q4 arc: S1_V02S0701 Q5 arc: V01S0100 F0 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q5 word: SLICEB.K0.INIT 1100111111000000 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1111110011001100 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1111110011001100 word: SLICEC.K1.INIT 1100111111000000 word: SLICEC.K0.INIT 0000111111001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C44:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: H00L0000 V02N0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: V00B0000 W1_H02E0601 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V06N0203 arc: W3_H06W0003 E1_H01W0000 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A3 N1_V02S0501 arc: A6 E1_H02W0701 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 V02S0301 arc: B3 H02E0301 arc: B4 H02W0101 arc: B7 V02S0501 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 W1_H02E0601 arc: C3 N1_V01N0001 arc: C4 W1_H02E0601 arc: C5 H01E0001 arc: C6 V02N0201 arc: C7 V00T0000 arc: CE1 H00L0000 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D3 H02E0201 arc: D5 V00B0000 arc: D6 E1_H01W0100 arc: D7 H02E0201 arc: E1_H01E0001 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F0 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V02N0401 Q6 arc: V00B0100 F7 arc: V00T0000 Q2 arc: V01S0100 Q6 word: SLICED.K1.INIT 1100110011110000 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1011101111110011 word: SLICEB.K1.INIT 1000100011000000 word: SLICEC.K0.INIT 1100000011000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEB.K0.INIT 1100000011000000 word: SLICED.K0.INIT 1111000010101010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C45:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 N1_V02S0701 arc: H00R0000 S1_V02N0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 S3_V06N0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0401 arc: V00T0100 H02W0301 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V02S0501 arc: A1 E1_H02W0701 arc: A2 V00B0000 arc: A3 E1_H01E0001 arc: A5 V02S0301 arc: A6 E1_H01W0000 arc: A7 V02S0301 arc: B1 F3 arc: B2 H00R0100 arc: B3 V02S0101 arc: B4 H02E0101 arc: B5 H02E0101 arc: B6 N1_V01S0000 arc: C1 H02W0601 arc: C2 S1_V02N0401 arc: C3 E1_H01W0000 arc: C4 H02W0401 arc: C5 H02W0401 arc: CE0 V02S0201 arc: CE1 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0201 arc: D2 F0 arc: D3 V02S0001 arc: D4 E1_H01W0100 arc: D5 E1_H01W0100 arc: D6 H01W0000 arc: D7 V02N0401 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F3 arc: E1_H02E0001 Q2 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR0 H02E0301 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M1 H00R0000 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F7 arc: S1_V02S0401 F6 arc: V01S0000 F6 arc: V01S0100 F4 arc: W1_H02W0101 Q1 arc: W3_H06W0103 Q2 arc: W3_H06W0303 F6 word: SLICEB.K1.INIT 0101000001000000 word: SLICED.K0.INIT 1000100000000000 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0001000100000001 word: SLICEC.K0.INIT 1100000011111111 word: SLICEC.K1.INIT 1110101011111111 word: SLICED.K1.INIT 0000000010101010 word: SLICEB.K0.INIT 1100111011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R3C46:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V06N0203 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 H02E0201 arc: H00R0000 V02N0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 H01E0001 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H01E0101 arc: S3_V06S0103 E1_H01W0100 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0101 V01N0101 arc: W1_H02W0501 V06N0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A1 V02S0701 arc: A2 F7 arc: A3 V00B0000 arc: A4 H02W0501 arc: A5 H02E0701 arc: A7 F5 arc: B1 H02W0301 arc: B2 H00L0000 arc: B3 V02S0301 arc: B5 V00B0100 arc: B6 V00T0000 arc: B7 V00B0000 arc: C1 H00L0000 arc: C2 S1_V02N0601 arc: C3 S1_V02N0401 arc: C4 V02N0001 arc: C5 V00T0000 arc: C6 H02E0601 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 W1_H02E0201 arc: D2 F0 arc: D3 N1_V01S0000 arc: D4 V02S0401 arc: D5 H02E0001 arc: D6 H02E0001 arc: D7 V01N0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F3 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q2 arc: N1_V02N0001 Q2 arc: S1_V02S0001 Q0 arc: V00B0000 F4 arc: V00T0000 Q2 arc: V01S0000 F6 arc: W1_H02W0301 F1 arc: W1_H02W0401 F6 arc: W1_H02W0601 F6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q2 word: SLICED.K0.INIT 0000000011000000 word: SLICEA.K1.INIT 0001000100010101 word: SLICEB.K1.INIT 1010001000000000 word: SLICEC.K1.INIT 0011001101011111 word: SLICEC.K0.INIT 0000101010101010 word: SLICEA.K0.INIT 0000000010101010 word: SLICED.K1.INIT 0000000000001000 word: SLICEB.K0.INIT 0111010101010101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R3C47:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V06N0003 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V06N0203 arc: E1_H02E0601 V06N0303 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0301 arc: H00R0100 V02S0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H01E0001 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06W0303 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 V02N0301 arc: V00T0000 V02S0601 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0103 E3_H06W0103 arc: A0 V02S0501 arc: A1 F5 arc: A2 H02W0701 arc: A3 H02W0701 arc: A4 H02E0501 arc: A5 S1_V02N0101 arc: A6 V02S0301 arc: A7 F5 arc: B0 S1_V02N0301 arc: B1 S1_V02N0101 arc: B2 V01N0001 arc: B5 V02S0501 arc: B6 H02E0301 arc: B7 W1_H02E0101 arc: C0 H00L0100 arc: C1 H00L0000 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C5 V02S0001 arc: C6 V00T0000 arc: C7 H01E0001 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 H01E0101 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 W1_H02E0001 arc: D6 H00R0100 arc: D7 W1_H02E0001 arc: E1_H01E0001 F2 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F4 arc: LSR1 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0000 F6 arc: W1_H02W0501 F7 arc: W1_H02W0701 F5 arc: W3_H06W0203 F4 word: SLICEC.K1.INIT 1000000010000000 word: SLICED.K1.INIT 0101010100010101 word: SLICEA.K1.INIT 0101000101010101 word: SLICEC.K0.INIT 1010101000000000 word: SLICED.K0.INIT 1111000111110011 word: SLICEA.K0.INIT 1110110010100000 word: SLICEB.K0.INIT 1111101011001100 word: SLICEB.K1.INIT 1111101011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R3C48:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 E1_H01W0000 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02E0601 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 H02E0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 W3_H06E0103 arc: A0 V02S0501 arc: A2 H00L0100 arc: A3 H02W0701 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 H02W0701 arc: A7 V00T0100 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H01W0100 arc: B4 E1_H02W0301 arc: B5 E1_H02W0101 arc: B7 V01S0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H02W0401 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE0 H02W0101 arc: CE1 W1_H02E0101 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 N1_V01S0000 arc: D2 N1_V02S0001 arc: D3 V00T0100 arc: D4 E1_H02W0201 arc: D5 H02W0001 arc: D6 H00R0100 arc: D7 E1_H02W0201 arc: E1_H01E0101 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0000 F4 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00B0000 arc: M5 H02E0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q7 arc: N1_V02N0101 F3 arc: N1_V02N0401 F6 arc: S1_V02S0201 F0 arc: V00B0100 F5 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: W1_H02W0701 F7 word: SLICEC.K1.INIT 0000110001000100 word: SLICEB.K0.INIT 0000001100000101 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1111111111110011 word: SLICEC.K0.INIT 1000100011000000 word: SLICED.K1.INIT 0000110000001010 word: SLICEB.K1.INIT 1111010110100000 word: SLICED.K0.INIT 1111101001010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C49:PLC2 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: H00R0100 S1_V02N0501 arc: S1_V02S0201 S3_V06N0103 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A3 V00T0000 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 F5 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B2 V02S0101 arc: B3 H02E0101 arc: B4 E1_H02W0101 arc: B5 E1_H02W0301 arc: B6 V00B0100 arc: B7 E1_H02W0301 arc: C0 H02E0601 arc: C1 H02W0601 arc: C2 F4 arc: C3 H02E0401 arc: C4 V02S0001 arc: C5 E1_H02W0401 arc: C6 E1_H01E0101 arc: C7 E1_H02W0401 arc: CE0 H00R0100 arc: CE2 V02N0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V00T0100 arc: D2 F0 arc: D3 N1_V01S0000 arc: D4 V01N0001 arc: D5 V01N0001 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0301 arc: M1 W1_H02E0001 arc: M5 W1_H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: S3_V06S0003 F3 arc: V00T0000 F2 arc: V01S0000 F1 arc: V01S0100 Q5 word: SLICED.K1.INIT 1100100000001000 word: SLICEC.K1.INIT 0010001100100000 word: SLICED.K0.INIT 0000010000000100 word: SLICEC.K0.INIT 0000101100001000 word: SLICEA.K0.INIT 1110001000000000 word: SLICEB.K0.INIT 0000000000000011 word: SLICEB.K1.INIT 1100111110001011 word: SLICEA.K1.INIT 1100000010100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C50:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02N0201 arc: H00R0000 H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 V02N0001 arc: V00B0100 V02S0101 arc: V00T0000 V02S0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0303 S3_V06N0303 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 F7 arc: A4 V02N0101 arc: A5 V02S0301 arc: A6 H02E0701 arc: A7 V02N0301 arc: B0 H02W0301 arc: B1 H02W0301 arc: B3 Q3 arc: B4 S1_V02N0701 arc: B5 H02W0101 arc: B6 V02S0701 arc: B7 H02E0301 arc: C0 H02W0401 arc: C1 H02E0601 arc: C2 S1_V02N0401 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V00T0000 arc: C6 V02N0001 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0201 arc: D2 H02W0201 arc: D3 S1_V02N0201 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V02S0601 arc: D7 V00B0000 arc: E1_H01E0001 F4 arc: E1_H01E0101 F0 arc: E1_H02E0201 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M3 H00L0000 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: N1_V02N0701 F5 arc: V00T0100 F3 word: SLICEA.K0.INIT 0010001100100000 word: SLICEA.K1.INIT 1110111011111100 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K1.INIT 1010001010000000 word: SLICED.K0.INIT 0000000011100010 word: SLICEC.K0.INIT 1010001010000000 word: SLICED.K1.INIT 0101010000000100 word: SLICEB.K0.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C51:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H02W0501 arc: V00B0000 H02W0601 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V06N0203 arc: A0 E1_H02W0501 arc: A1 E1_H01E0001 arc: A2 F5 arc: A3 H02E0501 arc: A4 V00T0000 arc: A5 F7 arc: A6 H02E0701 arc: A7 Q7 arc: B0 V00T0000 arc: B1 V02N0101 arc: B2 H00L0000 arc: B3 Q3 arc: B4 N1_V02S0701 arc: B5 H02W0301 arc: B6 H02W0101 arc: B7 E1_H02W0101 arc: C0 N1_V01N0001 arc: C1 F4 arc: C2 V02S0401 arc: C3 S1_V02N0401 arc: C4 Q4 arc: C5 E1_H02W0401 arc: C6 V00B0100 arc: C7 E1_H01E0101 arc: CE0 H02E0101 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H01E0101 arc: D2 N1_V01S0000 arc: D3 N1_V02S0001 arc: D4 S1_V02N0601 arc: D5 F0 arc: D6 E1_H02W0001 arc: D7 V02N0601 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q7 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M3 H00R0000 arc: M4 V00T0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q0 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0100 F1 arc: W3_H06W0103 F2 word: SLICEB.K1.INIT 1100101000000000 word: SLICEC.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 1111111000110010 word: SLICED.K0.INIT 1101100000000000 word: SLICEA.K0.INIT 0100010001010000 word: SLICED.K1.INIT 1110001000000000 word: SLICEC.K1.INIT 1100110011001000 word: SLICEB.K0.INIT 1011000010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C52:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0001 arc: H00R0000 V02S0401 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0601 H06W0303 arc: V00B0100 H02E0701 arc: V00T0100 V02S0501 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V06N0303 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E1_H02W0201 arc: A0 E1_H02W0501 arc: A1 E1_H01E0001 arc: A2 V00B0000 arc: A3 F7 arc: A4 V00B0000 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 H02W0701 arc: B0 H00R0100 arc: B1 E1_H02W0301 arc: B2 H02W0301 arc: B3 V02N0101 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 H02E0301 arc: B7 V02N0701 arc: C0 S1_V02N0401 arc: C1 H02W0401 arc: C2 E1_H02W0401 arc: C3 F4 arc: C4 N1_V02S0201 arc: C5 E1_H01E0101 arc: C6 H02E0401 arc: C7 V02S0001 arc: CE0 E1_H02W0101 arc: CE1 H02E0101 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F2 arc: D2 Q2 arc: D3 S1_V02N0001 arc: D4 H02W0001 arc: D5 H02E0201 arc: D6 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 F6 arc: LSR0 V00T0100 arc: LSR1 W1_H02E0301 arc: M0 W1_H02E0601 arc: M2 V00B0100 arc: M5 W1_H02E0001 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q2 arc: N1_V02N0101 F3 arc: V00B0000 Q6 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W1_H02W0301 F1 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 1000110010000000 word: SLICEC.K1.INIT 0011000000100010 word: SLICED.K1.INIT 0000110100001000 word: SLICEC.K0.INIT 1100101000000000 word: SLICEB.K1.INIT 1111111000000000 word: SLICEA.K0.INIT 0101010000000100 word: SLICEB.K0.INIT 1110000000100000 word: SLICEA.K1.INIT 0011001100100011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C53:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0401 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 W1_H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0301 V01N0101 arc: S1_V02S0701 N1_V02S0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 H02W0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 S3_V06N0203 arc: A0 H00L0100 arc: A2 V00T0000 arc: A3 H02E0701 arc: A5 Q5 arc: A6 V00T0100 arc: A7 Q7 arc: B0 E1_H02W0101 arc: B2 H01W0100 arc: B3 H00L0000 arc: B5 H00R0000 arc: B6 V02S0701 arc: B7 V00T0000 arc: C0 H02W0401 arc: C2 W1_H02E0601 arc: C3 V02S0401 arc: C5 W1_H02E0401 arc: C6 V02S0001 arc: C7 S1_V02N0201 arc: CE0 V02N0201 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 W1_H02E0201 arc: D3 V02S0001 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F5 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0000 Q5 arc: H01W0100 Q7 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: M5 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 F6 arc: N1_V02N0401 F6 arc: V00B0100 F7 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 Q5 word: SLICEB.K0.INIT 0000001100000101 word: SLICEC.K1.INIT 0000010011000100 word: SLICED.K0.INIT 1011000010000000 word: SLICEB.K1.INIT 0000000010101100 word: SLICED.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 0100111101111111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C54:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 H02W0301 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06E0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 W1_H02E0601 arc: V00T0000 V02S0401 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E1_H02W0401 arc: A0 F5 arc: A1 F5 arc: A2 E1_H02W0701 arc: A3 N1_V02S0701 arc: A4 V02N0301 arc: A5 S1_V02N0301 arc: A6 N1_V01N0101 arc: A7 E1_H02W0701 arc: B0 F3 arc: B2 H02W0101 arc: B3 Q3 arc: B4 S1_V02N0701 arc: B5 V00B0100 arc: B6 S1_V02N0701 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 E1_H01E0101 arc: C5 V01N0101 arc: C6 V01N0101 arc: C7 S1_V02N0201 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V00T0100 arc: D2 V02N0201 arc: D3 H02W0001 arc: D4 H02E0001 arc: D5 S1_V02N0401 arc: D6 H02E0001 arc: D7 V01N0001 arc: E1_H01E0101 Q3 arc: E1_H02E0201 F2 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M1 H00R0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q5 arc: S3_V06S0003 F0 arc: V00B0100 Q5 arc: V00T0100 F3 arc: V01S0000 Q3 arc: V01S0100 Q1 word: SLICEC.K1.INIT 0010001000001010 word: SLICEB.K1.INIT 0000000000100111 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 0000000011100010 word: SLICED.K0.INIT 1011100000000000 word: SLICED.K1.INIT 1000101010000000 word: SLICEB.K0.INIT 0101010000010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C55:PLC2 arc: E1_H02E0301 V02N0301 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 V06N0303 arc: H00L0100 V02S0301 arc: H00R0000 V02S0401 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0101 H02W0101 arc: S1_V02S0501 N1_V02S0401 arc: V00B0000 V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E1_H01W0100 arc: A4 H02E0701 arc: A6 V00T0100 arc: A7 H02E0501 arc: B0 V02N0101 arc: B4 E1_H02W0301 arc: B6 H02E0301 arc: B7 N1_V01S0000 arc: C0 E1_H02W0401 arc: C4 V00T0000 arc: C6 V01N0101 arc: C7 F4 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D4 W1_H02E0201 arc: D6 H02W0201 arc: D7 H02E0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F0 arc: S3_V06S0203 F7 arc: V01S0000 F6 word: SLICEA.K0.INIT 1111110000001100 word: SLICED.K0.INIT 0100011100000000 word: SLICEC.K0.INIT 0011001011111110 word: SLICED.K1.INIT 1110111000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C56:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 V06N0203 arc: H00L0000 E1_H02W0201 arc: H00R0000 V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H01E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06E0103 arc: V00B0000 H02E0601 arc: V00T0000 S1_V02N0601 arc: V00T0100 W1_H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0701 S3_V06N0203 arc: A1 V02N0701 arc: A2 E1_H01E0001 arc: A3 V02N0701 arc: A4 H02W0701 arc: A5 S1_V02N0101 arc: A6 F5 arc: A7 V02S0301 arc: B1 V02N0101 arc: B2 V02S0301 arc: B3 E1_H02W0301 arc: B4 N1_V02S0701 arc: B6 W1_H02E0301 arc: B7 V00B0100 arc: C1 E1_H02W0601 arc: C2 V02N0601 arc: C3 F4 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C6 H02W0601 arc: C7 H01E0001 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 H02W0001 arc: D2 Q2 arc: D3 V02N0001 arc: D4 E1_H01W0100 arc: D5 F2 arc: D6 E1_H02W0001 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F7 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 V00B0000 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M2 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q7 arc: N1_V02N0201 Q0 arc: N1_V02N0701 Q7 arc: S1_V02S0101 F1 arc: S3_V06S0003 F3 arc: V00B0100 Q7 word: SLICEC.K0.INIT 1100111111001010 word: SLICEB.K1.INIT 1101100000000000 word: SLICEA.K1.INIT 1110111011100100 word: SLICEB.K0.INIT 1100100000001000 word: SLICED.K1.INIT 0101000001000100 word: SLICEC.K1.INIT 0000000000001010 word: SLICED.K0.INIT 1111111000110010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C57:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 E1_H02W0401 arc: V00T0000 W1_H02E0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0303 S3_V06N0303 arc: A0 E1_H01E0001 arc: A1 E1_H02W0701 arc: A2 E1_H01E0001 arc: A3 V02N0501 arc: A5 Q5 arc: A7 S1_V02N0101 arc: B0 E1_H02W0301 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B3 H02E0101 arc: B5 H00R0000 arc: B6 E1_H02W0101 arc: B7 V00B0100 arc: C0 H00L0000 arc: C1 E1_H02W0401 arc: C2 V02N0401 arc: C3 H02E0601 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: C7 S1_V02N0201 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V01S0100 arc: D2 Q2 arc: D3 E1_H02W0001 arc: D5 V00B0000 arc: D6 F0 arc: D7 H01W0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: H01W0100 F2 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0301 arc: M1 W1_H02E0001 arc: M2 V00T0000 arc: M5 W1_H02E0001 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0101 F1 arc: V00B0100 Q7 arc: V00T0100 F3 arc: V01S0100 Q7 arc: W1_H02W0601 F6 arc: W1_H02W0701 F7 word: SLICED.K1.INIT 1010100000001000 word: SLICEB.K0.INIT 0000101100001000 word: SLICEA.K0.INIT 0010001000110000 word: SLICEB.K1.INIT 1110001000000000 word: SLICED.K0.INIT 0000000000000011 word: SLICEC.K1.INIT 0010001000110000 word: SLICEA.K1.INIT 1000101010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C58:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0201 arc: H00R0100 S1_V02N0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 E1_H02W0601 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 V02S0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 S3_V06N0003 arc: A0 W1_H02E0501 arc: A2 V02N0501 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 H02W0701 arc: A6 N1_V01N0101 arc: A7 H02W0701 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02W0301 arc: B3 H02E0101 arc: B4 W1_H02E0101 arc: B5 V01S0000 arc: B6 H02E0301 arc: B7 V02N0501 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 H00L0100 arc: C3 H02E0401 arc: C4 E1_H01E0101 arc: C5 H02W0401 arc: C6 S1_V02N0001 arc: C7 H02W0401 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CE2 S1_V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 V00B0100 arc: D2 W1_H02E0201 arc: D3 V01S0100 arc: D4 H02W0001 arc: D5 V00B0000 arc: D6 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F3 arc: H01W0100 F0 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0301 arc: M0 H02W0601 arc: M1 E1_H02W0001 arc: M3 H02E0201 arc: M5 E1_H02W0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: S1_V02S0501 F5 arc: V00B0000 Q6 arc: V01S0000 Q5 arc: V01S0100 Q1 arc: W1_H02W0501 F7 arc: W1_H02W0601 F6 word: SLICEB.K1.INIT 0010001100100000 word: SLICED.K0.INIT 1110000000100000 word: SLICEB.K0.INIT 0011000000100010 word: SLICEC.K0.INIT 1110001000000000 word: SLICEA.K0.INIT 1100100011111011 word: SLICEA.K1.INIT 1100110011000000 word: SLICED.K1.INIT 0101010000000100 word: SLICEC.K1.INIT 1010100000001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C59:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 W3_H06E0103 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0103 E3_H06W0103 .tile R3C60:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V06N0003 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02N0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 V02S0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 S3_V06N0303 arc: A0 F7 arc: A1 F7 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 V00T0100 arc: A5 Q5 arc: A6 F5 arc: A7 S1_V02N0301 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H01W0100 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 V02S0701 arc: B7 V00B0100 arc: C0 N1_V01S0100 arc: C2 S1_V02N0601 arc: C3 V02N0401 arc: C4 V00T0000 arc: C5 V00B0100 arc: C6 F4 arc: C7 S1_V02N0201 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 H02W0201 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M5 H02W0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V02N0701 Q7 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 Q5 word: SLICEB.K0.INIT 0101000000110000 word: SLICED.K1.INIT 0000000101010001 word: SLICEA.K0.INIT 1111001111100010 word: SLICEA.K1.INIT 1111111111101110 word: SLICEB.K1.INIT 1011000010000000 word: SLICEC.K0.INIT 1110001000000000 word: SLICEC.K1.INIT 0000000010111000 word: SLICED.K0.INIT 1100110011001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C61:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 H01E0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00L0100 S1_V02N0101 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0501 W3_H06E0303 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 E1_H02W0401 arc: V00T0000 H02E0001 arc: V00T0100 V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: A0 H02E0701 arc: A1 F5 arc: A2 H00L0100 arc: A3 V01N0101 arc: A4 N1_V01N0101 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 V02S0301 arc: B0 H02W0301 arc: B1 F3 arc: B2 H00R0000 arc: B3 H02E0301 arc: B4 H02W0101 arc: B5 H02W0101 arc: B6 H02E0101 arc: B7 V02N0701 arc: C0 N1_V01S0100 arc: C1 N1_V01N0001 arc: C2 V02N0601 arc: C3 F4 arc: C4 V02S0001 arc: C5 V02S0001 arc: C6 H02E0601 arc: C7 V00B0100 arc: CE0 W1_H02E0101 arc: CE1 H00L0000 arc: CE2 E1_H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02S0201 arc: D2 Q2 arc: D3 V02S0201 arc: D4 H01W0000 arc: D5 S1_V02N0401 arc: D6 H01W0000 arc: D7 V00B0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0100 arc: M2 V00T0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q2 arc: S1_V02S0201 F2 arc: S1_V02S0501 Q5 arc: V00B0100 Q5 arc: V01S0100 F6 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000100001101 word: SLICEC.K0.INIT 0000111000000010 word: SLICEC.K1.INIT 1011000010000000 word: SLICED.K1.INIT 0100010001010000 word: SLICEB.K1.INIT 1100110011001000 word: SLICEA.K1.INIT 1100100011001100 word: SLICEA.K0.INIT 1100111000001010 word: SLICEB.K0.INIT 0000110100001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C62:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00R0000 V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0201 H01E0001 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 W1_H02E0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02W0001 arc: V00T0100 H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 E1_H02W0601 arc: A1 W1_H02E0501 arc: A2 V02N0701 arc: A3 H00L0100 arc: A5 S1_V02N0101 arc: A6 F5 arc: A7 V02N0301 arc: B1 S1_V02N0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B5 F3 arc: B6 V00B0000 arc: B7 H01E0101 arc: C1 N1_V01N0001 arc: C2 H02E0601 arc: C3 H02W0601 arc: C5 V00B0100 arc: C6 S1_V02N0201 arc: C7 V00T0100 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 F2 arc: D2 H02E0201 arc: D3 V01S0100 arc: D5 V02S0401 arc: D6 H00R0100 arc: D7 H02E0201 arc: E3_H06E0303 F6 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q3 arc: S1_V02S0101 F1 arc: V01S0100 Q0 word: SLICEB.K0.INIT 1110001000000000 word: SLICED.K1.INIT 0000000010101100 word: SLICEA.K1.INIT 1010101010100010 word: SLICEB.K1.INIT 1110000000100000 word: SLICEC.K1.INIT 1111000011010000 word: SLICED.K0.INIT 1100000011100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C63:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0301 arc: H00R0000 V02S0401 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 E1_H02W0401 arc: V00B0000 V02N0201 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 S3_V06N0303 arc: A0 W1_H02E0701 arc: A2 V02N0501 arc: A4 V00T0000 arc: A5 F7 arc: A7 V00T0100 arc: B0 V02N0301 arc: B4 W1_H02E0101 arc: B7 W1_H02E0101 arc: C0 H02E0601 arc: C2 V02N0601 arc: C4 Q4 arc: C5 F4 arc: C7 V00B0100 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 H02W0001 arc: D4 W1_H02E0201 arc: D5 S1_V02N0601 arc: D7 W1_H02E0201 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0301 arc: M0 V00B0000 arc: M1 V01S0100 arc: M4 H02W0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q2 arc: N1_V02N0201 Q2 arc: N1_V02N0301 Q1 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 F2 arc: W1_H02W0001 F2 arc: W1_H02W0701 F5 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0011111100111011 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1011100000000000 word: SLICEC.K0.INIT 0000000010111000 word: SLICEC.K1.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C64:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0601 arc: H00R0100 V02S0701 arc: N1_V02N0201 S1_V02N0701 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H02E0601 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 N1_V01S0100 arc: V00B0000 H02W0401 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 H01E0001 arc: A0 V02N0701 arc: A1 E1_H01E0001 arc: A4 N1_V01N0101 arc: A5 H02W0501 arc: A6 V02N0101 arc: A7 H02W0501 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H01W0100 arc: B4 V00B0100 arc: B5 H02E0101 arc: B6 V01S0000 arc: B7 H02E0101 arc: C0 V02N0401 arc: C1 H02E0401 arc: C2 H02E0401 arc: C4 V02S0201 arc: C5 V00T0100 arc: C6 H02W0401 arc: C7 V00B0100 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0001 arc: D2 V00B0100 arc: D4 V00B0000 arc: D5 V02N0401 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F6 arc: E1_H02E0201 F0 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 E1_H02W0601 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q2 arc: N1_V02N0701 F7 arc: V00B0100 Q7 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: V01S0100 Q1 word: SLICEB.K0.INIT 1111110000001100 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1010110011111111 word: SLICED.K0.INIT 1100101000000000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1010100000100000 word: SLICED.K1.INIT 0101000101000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C65:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 H02E0701 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 V02S0201 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0701 arc: A2 V02N0701 arc: A3 V00T0000 arc: A4 S1_V02N0301 arc: A5 N1_V01N0101 arc: A7 F5 arc: B0 H01W0100 arc: B2 N1_V02S0301 arc: B3 S1_V02N0101 arc: B4 F3 arc: B5 V01S0000 arc: B7 V02S0701 arc: C0 H02E0601 arc: C2 H02E0401 arc: C3 N1_V01S0100 arc: C4 S1_V02N0001 arc: C5 E1_H01E0101 arc: C7 V02N0001 arc: CE0 S1_V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 F0 arc: D3 N1_V01S0000 arc: D4 V02S0601 arc: D5 V00B0000 arc: D7 H00R0100 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q1 arc: E1_H02E0101 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M1 H00L0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: S3_V06S0203 F4 arc: V01S0000 Q5 arc: W3_H06W0103 Q2 word: SLICEB.K1.INIT 1110111011100010 word: SLICEC.K0.INIT 1010100000001000 word: SLICEC.K1.INIT 1101100000000000 word: SLICED.K1.INIT 0000111100001011 word: SLICEA.K0.INIT 0011001100110111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 1000100011111000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C66:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 S3_V06N0303 arc: H00L0100 H02W0301 arc: H00R0000 S1_V02N0601 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 V02N0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0601 V02N0601 arc: W3_H06W0303 S3_V06N0303 arc: A0 V01N0101 arc: A3 H01E0001 arc: A5 V00T0100 arc: A7 H02W0701 arc: B0 V00T0000 arc: B1 V01N0001 arc: B5 V00B0100 arc: B7 H02E0101 arc: C0 H02W0601 arc: C1 H00R0100 arc: C3 S1_V02N0401 arc: C5 H02E0401 arc: C7 V02N0201 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 S1_V02N0001 arc: D3 H01E0101 arc: D5 H02E0201 arc: D7 W1_H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F0 arc: H01W0100 F0 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: M2 V00B0000 arc: M5 V01S0000 arc: M6 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 Q1 arc: N1_V02N0301 F3 arc: N1_V02N0701 Q5 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 F1 arc: W1_H02W0001 Q0 arc: W1_H02W0301 F1 arc: W1_H02W0701 F5 arc: W3_H06W0003 F0 word: SLICEB.K1.INIT 0101000001011111 word: SLICEA.K0.INIT 1100101011001010 word: SLICEA.K1.INIT 1111000011001100 word: SLICEC.K1.INIT 0000000010101100 word: SLICED.K1.INIT 1110000001000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C67:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02S0301 arc: H00R0100 W1_H02E0701 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 W1_H02E0401 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: V00B0000 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V06N0203 arc: A1 F7 arc: A3 V00B0000 arc: A4 E1_H01W0000 arc: A7 N1_V01S0100 arc: B0 E1_H02W0301 arc: B1 H02E0301 arc: B3 V02N0301 arc: B4 H00R0000 arc: B7 V02S0701 arc: C0 V02N0401 arc: C1 E1_H02W0601 arc: C3 V02S0401 arc: C4 V02S0201 arc: C7 F4 arc: CE0 H02W0101 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02E0201 arc: D3 V02S0001 arc: D4 H01W0000 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q0 arc: E1_H02E0201 F0 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 Q0 arc: H01W0100 F0 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0501 arc: M2 H02E0601 arc: M3 H01W0100 arc: M5 V01S0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F0 arc: N1_V02N0101 Q3 arc: N1_V02N0301 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: S3_V06S0103 F2 arc: V00T0000 F0 arc: V01S0000 F0 arc: V01S0100 F0 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111011110110011 word: SLICEA.K0.INIT 1111110000110000 word: SLICEC.K0.INIT 0000000100001011 word: SLICED.K1.INIT 1110111011100010 word: SLICEA.K1.INIT 0001110100000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C68:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: H01W0000 W3_H06E0103 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02W0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 S3_V06N0203 arc: V00T0000 H02W0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 E1_H02W0401 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 S1_V02N0701 arc: A3 H01E0001 arc: A4 F5 arc: A5 E1_H01W0000 arc: A6 V02S0301 arc: A7 V02N0101 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B2 V02N0101 arc: B3 H02W0101 arc: B4 F3 arc: B5 V02N0501 arc: B6 V02N0501 arc: B7 V02N0501 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 S1_V02N0201 arc: C5 V00B0100 arc: C6 V00B0100 arc: C7 H02W0401 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 H02E0001 arc: D3 V02N0201 arc: D5 S1_V02N0401 arc: D6 H01W0000 arc: D7 V02S0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F2 arc: E1_H02E0501 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F6 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M5 H00L0000 arc: M7 H02E0201 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: S3_V06S0003 F0 arc: V00B0100 Q7 arc: V01S0000 F4 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1100000011000100 word: SLICEA.K1.INIT 0000000000000100 word: SLICEB.K0.INIT 0000000100100011 word: SLICED.K1.INIT 0000001010100010 word: SLICED.K0.INIT 0000101000100010 word: SLICEC.K1.INIT 1110010000000000 word: SLICEB.K1.INIT 0000000010111000 word: SLICEC.K0.INIT 0000000100000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C69:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0101 arc: H00R0100 H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0601 H06E0303 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00T0000 W1_H02E0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: A0 H02E0501 arc: A1 H01E0001 arc: A3 E1_H01E0001 arc: A4 V02N0101 arc: A5 H02W0501 arc: A6 F5 arc: A7 Q7 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B3 Q3 arc: B4 V00B0100 arc: B5 N1_V01S0000 arc: B6 H02W0301 arc: B7 H02W0101 arc: C0 E1_H01W0000 arc: C1 H00R0100 arc: C3 S1_V02N0401 arc: C4 E1_H02W0601 arc: C5 E1_H02W0601 arc: C6 F4 arc: C7 E1_H01E0101 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D3 S1_V02N0001 arc: D4 H02E0201 arc: D5 H02E0201 arc: D6 E1_H01W0100 arc: D7 H01W0000 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 E1_H02W0501 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M1 H00L0000 arc: M3 W1_H02E0201 arc: M4 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: S1_V02S0701 F7 arc: V00B0100 Q7 arc: V00T0100 F3 arc: V01S0100 Q4 arc: W1_H02W0201 F0 arc: W1_H02W0601 F6 word: SLICEA.K1.INIT 1111111011111110 word: SLICEB.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 1111001111100010 word: SLICEC.K1.INIT 0101001100000000 word: SLICEC.K0.INIT 0000000000110101 word: SLICED.K0.INIT 1100100011111011 word: SLICED.K1.INIT 1100000010001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C70:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 W1_H02E0601 arc: V00B0000 V02N0001 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 H01E0101 arc: A0 H00L0100 arc: A2 H00L0100 arc: A3 W1_H02E0701 arc: A4 V02S0301 arc: A5 Q5 arc: A6 H02E0701 arc: A7 N1_V02S0101 arc: B0 W1_H02E0101 arc: B2 V01N0001 arc: B3 E1_H01W0100 arc: B4 V02N0701 arc: B5 V01S0000 arc: B6 S1_V02N0701 arc: B7 W1_H02E0101 arc: C0 H02W0601 arc: C2 H02E0401 arc: C3 F4 arc: C4 V01N0101 arc: C5 H02E0401 arc: C6 V01N0101 arc: C7 H02W0601 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D2 H02E0001 arc: D3 N1_V01S0000 arc: D4 W1_H02E0201 arc: D5 H02E0001 arc: D6 S1_V02N0601 arc: D7 V01N0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q5 arc: E1_H02E0101 F3 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q1 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F0 arc: LSR0 V00T0100 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 V00B0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F6 arc: N1_V02N0101 Q1 arc: N1_V02N0701 F5 arc: V00B0100 F7 arc: V01S0000 Q7 arc: V01S0100 Q1 word: SLICEB.K0.INIT 0000000000110101 word: SLICED.K0.INIT 0000100000101010 word: SLICEC.K1.INIT 0101001100000000 word: SLICEC.K0.INIT 1010000010001000 word: SLICEB.K1.INIT 1100110011001000 word: SLICED.K1.INIT 0000010011000100 word: SLICEA.K0.INIT 1110111111101100 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C71:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0201 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 S3_V06N0203 arc: W1_H02W0101 V02S0101 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0003 E1_H01W0000 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 H02W0501 arc: A3 H02E0701 arc: A4 H02E0701 arc: A5 H02W0701 arc: A6 F7 arc: A7 V02S0301 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 N1_V02S0301 arc: B3 E1_H02W0301 arc: B4 H02W0301 arc: B5 N1_V01S0000 arc: B6 V02S0501 arc: B7 H02E0301 arc: C0 V02N0401 arc: C1 V02N0601 arc: C2 H00L0100 arc: C4 H01E0001 arc: C5 H02W0601 arc: C6 V02S0001 arc: C7 W1_H02E0601 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D3 H01E0101 arc: D4 H02W0201 arc: D5 F0 arc: D6 V00B0000 arc: D7 H02W0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q6 arc: E1_H02E0201 Q2 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F5 arc: H01W0100 F6 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 H02E0601 arc: M5 H02E0001 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q5 arc: N1_V02N0001 F2 arc: V00B0000 F4 arc: V00T0100 F3 arc: V01S0000 Q6 word: SLICEB.K0.INIT 0000100001001100 word: SLICEC.K0.INIT 1100000010001000 word: SLICED.K1.INIT 0101000001000100 word: SLICED.K0.INIT 0000111100001011 word: SLICEB.K1.INIT 1110111000100010 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1011101111110011 word: SLICEC.K1.INIT 1110000001000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C72:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02W0301 arc: H00R0100 H02E0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H06E0203 arc: V00T0000 V02S0601 arc: V00T0100 H02E0301 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0303 arc: A0 V02S0501 arc: A2 H01E0001 arc: A3 H02E0701 arc: A4 N1_V01S0100 arc: A5 V00T0100 arc: A6 H02E0501 arc: B0 E1_H02W0101 arc: B2 H02W0301 arc: B3 H02E0301 arc: B4 W1_H02E0101 arc: B5 V02S0501 arc: B6 F3 arc: C0 H00R0100 arc: C2 E1_H02W0401 arc: C3 H00L0100 arc: C4 V00T0000 arc: C5 H01E0001 arc: C6 H02W0401 arc: D0 H02E0201 arc: D2 H02E0201 arc: D3 V02S0201 arc: D4 F0 arc: D5 E1_H02W0201 arc: D6 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F4 arc: M0 V00B0100 arc: V00B0100 F5 arc: V01S0100 F6 word: SLICEC.K1.INIT 0001110100000000 word: SLICEA.K0.INIT 1111111011011100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0001000100010011 word: SLICEB.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 1011000010000000 word: SLICED.K0.INIT 0101010101000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R3C73:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 H01E0101 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 V01N0101 arc: V00B0100 V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: A0 F5 arc: A1 H02E0501 arc: A2 V02N0501 arc: A3 V02N0701 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: A7 Q7 arc: B0 V02S0301 arc: B1 Q1 arc: B2 H02W0101 arc: B3 Q3 arc: B4 V01S0000 arc: B5 H02E0301 arc: B6 F3 arc: B7 V02S0501 arc: C1 V02N0601 arc: C2 E1_H02W0601 arc: C3 H02W0401 arc: C4 H02W0401 arc: C5 V02N0001 arc: C6 F4 arc: C7 H02E0401 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 E1_H02W0201 arc: D4 E1_H02W0201 arc: D5 H02W0201 arc: D6 V02S0401 arc: D7 H02E0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M1 H00R0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q4 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q1 word: SLICEA.K1.INIT 0000001000000111 word: SLICED.K1.INIT 0011000001010000 word: SLICEB.K0.INIT 0000101100001000 word: SLICEC.K1.INIT 1000100011000000 word: SLICEA.K0.INIT 0000000001000100 word: SLICEB.K1.INIT 0000101000001100 word: SLICEC.K0.INIT 1010000011000000 word: SLICED.K0.INIT 0000001100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C74:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 V01N0001 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02E0701 arc: V00B0000 E1_H02W0401 arc: V00T0100 N1_V02S0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 V01N0001 arc: W1_H02W0701 V02N0701 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A2 H02W0701 arc: A3 V01N0101 arc: A4 V02S0301 arc: A6 F7 arc: A7 H02W0701 arc: B0 V00T0000 arc: B2 V02S0101 arc: B3 V02N0101 arc: B4 V02N0501 arc: B6 F3 arc: B7 V00B0100 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 W1_H02E0601 arc: C7 H02W0401 arc: CE0 V02N0201 arc: CE1 H00L0000 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 Q2 arc: D3 W1_H02E0001 arc: D4 V02S0401 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0101 Q7 arc: E1_H02E0501 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M0 H01E0001 arc: M1 H00R0000 arc: M2 V00B0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q2 arc: S1_V02S0001 F0 arc: V00B0100 Q7 arc: V00T0000 F2 arc: V01S0000 F6 arc: V01S0100 Q1 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 0001000010110000 word: SLICEA.K0.INIT 1111111001010100 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K1.INIT 0000001000000111 word: SLICEB.K1.INIT 0011000001010000 word: SLICED.K0.INIT 0000000000010001 word: SLICEC.K0.INIT 1111101111001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C75:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0301 H06E0003 arc: V00B0100 N1_V02S0301 arc: V00T0000 V02N0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S3_V06N0203 arc: A0 H02E0501 arc: A1 V02S0701 arc: A2 F5 arc: A3 S1_V02N0501 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H02E0501 arc: A7 E1_H02W0701 arc: B0 W1_H02E0301 arc: B1 H02W0301 arc: B2 F3 arc: B3 Q3 arc: B4 H00L0000 arc: B5 S1_V02N0501 arc: B6 V02N0701 arc: B7 E1_H02W0101 arc: C0 V02S0401 arc: C1 H02E0601 arc: C3 H02W0601 arc: C4 E1_H01E0101 arc: C5 V00T0100 arc: C6 Q6 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H01E0101 arc: D2 W1_H02E0201 arc: D3 V01S0100 arc: D4 V02S0401 arc: D5 S1_V02N0401 arc: D6 H01W0000 arc: D7 H02W0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: LSR0 V00B0100 arc: LSR1 H02W0501 arc: M1 H00R0000 arc: M3 H00R0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F4 arc: N1_V02N0001 F0 arc: N1_V02N0101 F1 arc: N1_V02N0301 Q1 arc: N1_V02N0501 Q5 arc: N1_V02N0601 F4 arc: N1_V02N0701 Q5 arc: V00B0000 Q6 arc: V00T0100 Q1 arc: V01S0000 F6 arc: W3_H06W0203 F7 word: SLICED.K1.INIT 0101000000110000 word: SLICEC.K1.INIT 0001110100000000 word: SLICEB.K1.INIT 0000000000100111 word: SLICEB.K0.INIT 0001000100000000 word: SLICEC.K0.INIT 0000000011100010 word: SLICEA.K0.INIT 0000110000001010 word: SLICED.K0.INIT 0000000000011101 word: SLICEA.K1.INIT 0010000001110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C76:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00R0100 H02W0501 arc: N1_V02N0401 H02W0401 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 V02S0201 arc: V00B0100 E1_H02W0701 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 H01E0001 arc: W3_H06W0103 E1_H01W0100 arc: A0 F5 arc: A1 F5 arc: A2 V00B0000 arc: A3 V01N0101 arc: A4 V02N0301 arc: A5 V02N0101 arc: A6 F7 arc: A7 E1_H01W0000 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 V02N0301 arc: B3 H00R0100 arc: B4 V02S0701 arc: B5 H02W0301 arc: B7 V00T0000 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 E1_H01W0000 arc: C3 V02S0601 arc: C4 V01N0101 arc: C5 W1_H02E0601 arc: C6 F4 arc: C7 V00B0100 arc: D0 F2 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 W1_H02E0201 arc: D5 V02S0601 arc: D6 E1_H02W0001 arc: D7 H00R0100 arc: E1_H01E0101 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 V00T0100 arc: S1_V02S0001 F0 arc: V00T0100 F3 word: SLICEC.K0.INIT 1100000010001000 word: SLICED.K1.INIT 0000111000000010 word: SLICED.K0.INIT 0000000000000101 word: SLICEB.K1.INIT 0101001100000000 word: SLICEB.K0.INIT 0000000000100111 word: SLICEC.K1.INIT 0011000001010000 word: SLICEA.K0.INIT 1110111111100000 word: SLICEA.K1.INIT 1110111111101111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 .tile R3C77:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 S1_V02N0301 arc: H00R0000 W1_H02E0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02E0301 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 N1_V01S0100 arc: A0 H00L0000 arc: A1 F7 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 N1_V01N0101 arc: A5 V00T0100 arc: A7 F5 arc: B0 W1_H02E0301 arc: B1 E1_H01W0100 arc: B2 V01N0001 arc: B3 Q3 arc: B4 H02E0301 arc: B5 V02N0701 arc: C0 H00R0100 arc: C1 V02S0601 arc: C2 V02N0401 arc: C3 V02N0601 arc: C4 Q4 arc: C5 V01N0101 arc: C7 F4 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 W1_H02E0101 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H01E0101 arc: D2 W1_H02E0201 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 V02S0401 arc: D7 H02W0001 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 Q7 arc: H01W0000 Q0 arc: H01W0100 F1 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: S1_V02S0301 F3 arc: V00B0000 Q4 arc: V01S0000 F0 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q7 word: SLICEA.K0.INIT 0000001100010001 word: SLICEB.K1.INIT 0011010100000000 word: SLICEC.K0.INIT 1011100000000000 word: SLICEC.K1.INIT 0000000011011000 word: SLICED.K1.INIT 0000010100000000 word: SLICEA.K1.INIT 1111001110100011 word: SLICEB.K0.INIT 0000000001010011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C78:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 V02S0301 arc: H00L0000 V02N0201 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 H01E0001 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 H02W0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 H02W0201 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V02S0701 arc: A0 F5 arc: A1 F5 arc: A2 F7 arc: A3 V02N0501 arc: A4 V00T0100 arc: A5 V02N0301 arc: A6 E1_H02W0501 arc: A7 V02N0301 arc: B0 V01N0001 arc: B2 F3 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: B5 V02S0701 arc: B6 V02S0501 arc: B7 H02E0101 arc: C0 F4 arc: C1 F4 arc: C2 W1_H02E0401 arc: C3 E1_H02W0601 arc: C4 V01N0101 arc: C5 W1_H02E0601 arc: C6 V00T0000 arc: C7 E1_H02W0601 arc: CE1 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 E1_H02W0201 arc: D6 V02S0601 arc: D7 H02E0201 arc: E1_H02E0101 Q3 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F0 arc: LSR0 H02E0301 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M3 W1_H02E0201 arc: M7 W1_H02E0201 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: V01S0000 F2 arc: W3_H06W0303 F6 word: SLICEC.K1.INIT 0010001000110000 word: SLICEC.K0.INIT 1011100000000000 word: SLICEA.K0.INIT 1111101011001100 word: SLICEA.K1.INIT 1111101011111111 word: SLICEB.K1.INIT 1010000011000000 word: SLICED.K1.INIT 0000101000001100 word: SLICEB.K0.INIT 0001000000010000 word: SLICED.K0.INIT 1111010111000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C79:PLC2 arc: E1_H02E0501 V02S0501 arc: H00L0000 S1_V02N0001 arc: H00L0100 S1_V02N0101 arc: H00R0100 W1_H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02E0501 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02N0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: A0 F5 arc: A1 S1_V02N0501 arc: A2 E1_H01E0001 arc: A3 V01N0101 arc: A4 N1_V01N0101 arc: A5 H02E0501 arc: A6 F7 arc: A7 Q7 arc: B0 F3 arc: B2 H01W0100 arc: B3 V01N0001 arc: B4 V02N0501 arc: B5 V02N0501 arc: B6 V02S0701 arc: B7 V01S0000 arc: C0 F4 arc: C1 F4 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V02N0201 arc: C5 W1_H02E0401 arc: C6 V02N0001 arc: C7 E1_H02W0401 arc: CE0 H00L0000 arc: CE1 H00L0100 arc: CE2 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V00T0100 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 V00B0000 arc: D6 H02W0001 arc: D7 V02S0401 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F6 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q1 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: M4 H02W0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q7 arc: N1_V02N0101 Q1 arc: N1_V02N0601 Q4 arc: N1_V02N0701 Q7 arc: V00T0000 F2 arc: V00T0100 F3 arc: V01S0000 Q4 arc: W1_H02W0001 F0 word: SLICEB.K0.INIT 0000010100000011 word: SLICEC.K0.INIT 0001000000010011 word: SLICEB.K1.INIT 0101000000110000 word: SLICEC.K1.INIT 0000110001000100 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K1.INIT 0000000010101100 word: SLICED.K0.INIT 0011001011111110 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C80:PLC2 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02S0401 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 H02W0001 arc: H00R0000 V02N0401 arc: H00R0100 V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 E1_H01W0100 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0701 H06E0203 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02N0601 arc: A0 E1_H02W0501 arc: A1 H00L0000 arc: A2 W1_H02E0501 arc: A4 H02W0701 arc: B0 E1_H02W0301 arc: B1 E1_H02W0301 arc: B2 W1_H02E0101 arc: B4 H02E0101 arc: C0 H00L0000 arc: C1 E1_H01W0000 arc: C2 H02W0401 arc: C4 V02N0001 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02N0201 arc: D2 H00R0000 arc: D4 H02E0001 arc: E1_H01E0101 Q0 arc: E1_H02E0101 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: LSR1 H02E0501 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: S1_V02S0001 Q0 arc: V00B0000 F4 arc: V01S0000 Q1 arc: W1_H02W0001 F2 word: SLICEA.K1.INIT 1111000111100000 word: SLICEA.K0.INIT 1010101110101000 word: SLICEC.K0.INIT 0000111000000100 word: SLICEB.K0.INIT 0011010111111111 word: SLICEB.K1.INIT 0000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R3C81:PLC2 arc: H00R0000 H02W0601 arc: H01W0100 W3_H06E0303 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02N0201 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 H00R0000 arc: A3 V01N0101 arc: B2 V01N0001 arc: B4 H01E0101 arc: B5 N1_V01S0000 arc: B6 V00B0000 arc: B7 H02E0101 arc: E1_H01E0101 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F6 arc: V01S0000 F3 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0011001100111100 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C82:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V06N0203 arc: E3_H06E0203 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02N0201 arc: V00T0000 H02W0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0103 E1_H01W0100 arc: A0 H02W0701 arc: A5 V00B0000 arc: B1 V02N0101 arc: B2 V01N0001 arc: B3 V02S0101 arc: B4 S1_V02N0701 arc: B6 N1_V01S0000 arc: B7 V00T0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F4 arc: N1_V02N0601 F6 arc: S1_V02S0201 F2 arc: S1_V02S0501 F5 arc: V01S0000 F7 arc: V01S0100 F0 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0011001100111100 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R3C83:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 V06N0203 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02S0201 arc: H01W0100 W3_H06E0303 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0701 H01E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0701 V01N0101 arc: A1 H00L0000 arc: A4 V00T0000 arc: A7 N1_V01S0100 arc: B0 V00B0000 arc: B4 V02S0701 arc: B7 V00B0000 arc: C4 H02E0601 arc: C7 V02N0001 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D4 V01N0001 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: LSR1 H02W0301 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F1 arc: V00B0000 Q4 arc: V00T0000 F0 arc: V01S0000 F7 word: SLICED.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 1010101110101000 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0101010101011010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C84:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V06N0203 arc: H00L0000 H02W0201 arc: H00L0100 H02E0101 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0201 H02W0201 arc: N1_V02N0601 H02E0601 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0301 V02S0301 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 H02W0701 arc: A5 H02W0701 arc: B0 S1_V02N0101 arc: B1 S1_V02N0301 arc: B2 H01W0100 arc: B4 V02N0501 arc: B5 V02N0501 arc: C0 N1_V01N0001 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 H02E0601 arc: C5 H02E0601 arc: CE0 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H01W0000 arc: E1_H01E0101 F4 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: V01S0000 F2 word: SLICEA.K0.INIT 1111100010111011 word: SLICEA.K1.INIT 1010101010111011 word: SLICEB.K0.INIT 1110111111000101 word: SLICEB.K1.INIT 1111111100000101 word: SLICEC.K0.INIT 1111101110001011 word: SLICEC.K1.INIT 1010101110101011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C85:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H01E0101 arc: S3_V06S0203 H06E0203 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: V00T0100 N1_V02S0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0701 V06N0203 arc: A0 H00R0000 arc: A1 F5 arc: A3 H00L0100 arc: A5 Q5 arc: A7 Q7 arc: B0 H02E0101 arc: B1 H01W0100 arc: B3 V02N0101 arc: B4 S1_V02N0501 arc: B5 F3 arc: B7 E1_H02W0101 arc: C0 V02N0401 arc: C1 E1_H01W0000 arc: C3 H02E0401 arc: C4 Q4 arc: C5 H02W0601 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 V00B0100 arc: D3 N1_V01S0000 arc: D4 E1_H02W0001 arc: D5 S1_V02N0601 arc: D7 H01W0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q2 arc: E1_H02E0401 Q6 arc: E1_H02E0501 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q6 arc: H01W0100 F4 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M2 H02E0601 arc: M3 H00L0000 arc: M4 V00B0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: S1_V02S0301 F1 arc: S1_V02S0601 Q4 arc: S1_V02S0701 Q7 arc: S3_V06S0003 Q0 arc: V00B0100 F7 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1111111000111010 word: SLICEA.K1.INIT 1000000000000000 word: SLICEC.K1.INIT 1100000001000000 word: SLICED.K1.INIT 1100010011110101 word: SLICEC.K0.INIT 1100001100000000 word: SLICEB.K1.INIT 1101000011011101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R3C86:PLC2 arc: E1_H02E0501 V06N0303 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 V02S0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 H02E0001 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 H01E0101 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: A0 H02E0501 arc: A1 S1_V02N0701 arc: A2 W1_H02E0701 arc: A3 W1_H02E0701 arc: A5 V02N0101 arc: B0 S1_V02N0301 arc: B1 H02E0301 arc: B2 V02N0301 arc: B5 V02S0701 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 H02W0401 arc: C3 H02W0401 arc: C5 S1_V02N0001 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 H00R0000 arc: D5 H02E0001 arc: E1_H01E0101 Q5 arc: E1_H02E0401 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H01W0000 F5 arc: H01W0100 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 H02W0501 arc: M2 H02W0601 arc: M3 H00R0100 arc: M5 H00L0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00T0000 F2 arc: V00T0100 Q3 word: SLICEA.K0.INIT 1010111011111100 word: SLICEA.K1.INIT 1111111001011100 word: SLICEC.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1110111110100011 word: SLICEB.K1.INIT 1010101010101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C87:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0201 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02W0601 arc: S1_V02S0701 H01E0101 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V06N0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 V06N0303 arc: A0 H02E0701 arc: A1 H02E0501 arc: A2 S1_V02N0501 arc: A3 V02N0501 arc: A4 V02N0101 arc: A5 E1_H01W0000 arc: A6 F5 arc: A7 W1_H02E0701 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 E1_H01W0100 arc: B3 Q3 arc: B4 H01E0101 arc: B5 V02N0501 arc: B6 F3 arc: B7 H01E0101 arc: C0 H02E0401 arc: C1 S1_V02N0401 arc: C2 H02E0401 arc: C3 H02W0401 arc: C4 W1_H02E0401 arc: C5 H02W0401 arc: C6 F4 arc: C7 V02N0201 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V01S0000 arc: D2 V02N0201 arc: D3 V02N0001 arc: D4 S1_V02N0601 arc: D5 H00R0100 arc: D6 H01W0000 arc: D7 S1_V02N0601 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR1 V00B0000 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: S1_V02S0301 Q3 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: V01S0000 Q3 arc: V01S0100 F6 arc: W1_H02W0001 F2 word: SLICEA.K0.INIT 1111001111101010 word: SLICEA.K1.INIT 1111111001110010 word: SLICED.K1.INIT 1100010011110101 word: SLICEB.K1.INIT 1000110010101111 word: SLICED.K0.INIT 1000000000000000 word: SLICEC.K0.INIT 1111010100110001 word: SLICEC.K1.INIT 1010001011110011 word: SLICEB.K0.INIT 1011000010111011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R3C88:PLC2 arc: H00L0100 S1_V02N0301 arc: H00R0100 H02E0701 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 S3_V06N0103 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02S0201 arc: V00B0100 W1_H02E0501 arc: V00T0000 V02S0601 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0601 S3_V06N0303 arc: A0 H02E0501 arc: A1 H02E0501 arc: A2 V02S0501 arc: B0 V02S0301 arc: B2 H02E0101 arc: C0 V02N0401 arc: C1 H02E0401 arc: C2 N1_V01N0001 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02S0001 arc: D2 V00B0100 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H00L0000 F0 arc: H01W0000 Q5 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 V00T0000 arc: M0 H02E0601 arc: M1 H00R0100 arc: M4 V00B0000 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: S1_V02S0501 Q5 arc: S3_V06S0103 Q2 arc: V00T0100 Q1 arc: W1_H02W0401 Q4 word: SLICEB.K0.INIT 1111001111101010 word: SLICEA.K0.INIT 1110111110100011 word: SLICEA.K1.INIT 1010101010101111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R40C87:PLC2 arc: S1_V02S0701 N3_V06S0203 arc: S3_V06S0203 N3_V06S0103 .tile R40C88:PLC2 arc: N1_V02N0201 N3_V06S0103 arc: S1_V02S0201 N3_V06S0103 .tile R41C28:PLC2 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0203 S3_V06N0203 .tile R41C34:PLC2 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 .tile R41C40:PLC2 arc: N3_V06N0303 S3_V06N0203 .tile R41C43:PLC2 arc: N3_V06N0203 S3_V06N0203 .tile R41C46:PLC2 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0203 .tile R41C55:PLC2 arc: N3_V06N0103 S3_V06N0103 .tile R41C58:PLC2 arc: N3_V06N0103 S3_V06N0103 .tile R41C64:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R41C67:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R41C70:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R41C73:PLC2 arc: N3_V06N0003 S3_V06N0303 .tile R41C76:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R41C79:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R41C82:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R41C87:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0701 V02S0701 arc: N1_V02N0501 E1_H02W0501 .tile R41C88:PLC2 arc: N3_V06N0103 S3_V06N0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 V02S0201 arc: C5 V02S0201 arc: D2 V02S0201 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F2 arc: E1_H02E0701 F7 arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F5 word: SLICED.K1.INIT 0000000011111111 word: SLICEC.K1.INIT 0000111100001111 word: SLICEB.K0.INIT 0000000011111111 word: SLICED.K0.INIT 0000000011111111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 .tile R42C87:PLC2 arc: S3_V06S0303 N3_V06S0303 .tile R43C87:PLC2 arc: E1_H02E0701 V06S0203 .tile R47C28:PLC2 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 .tile R47C34:PLC2 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 .tile R47C40:PLC2 arc: N3_V06N0203 S3_V06N0203 .tile R47C43:PLC2 arc: N3_V06N0203 S3_V06N0103 .tile R47C46:PLC2 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0203 .tile R47C55:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R47C58:PLC2 arc: N3_V06N0103 S3_V06N0003 .tile R47C64:PLC2 arc: N3_V06N0003 S3_V06N0303 .tile R47C67:PLC2 arc: N3_V06N0003 S3_V06N0303 .tile R47C70:PLC2 arc: N3_V06N0003 S3_V06N0303 .tile R47C73:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R47C76:PLC2 arc: N3_V06N0303 S3_V06N0303 .tile R47C79:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R47C82:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R47C88:PLC2 arc: N3_V06N0003 S3_V06N0003 arc: S3_V06S0103 N3_V06S0103 .tile R48C87:PLC2 arc: S3_V06S0303 N3_V06S0303 .tile R4C29:PLC2 arc: N1_V02N0201 E1_H02W0201 .tile R4C30:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 S1_V02N0301 arc: A1 H00R0000 arc: A2 F5 arc: A4 F5 arc: A5 V02N0101 arc: B0 H02W0101 arc: B1 V00T0000 arc: B2 S1_V02N0101 arc: B4 E1_H02W0101 arc: B7 F3 arc: C1 E1_H01W0000 arc: C2 H00L0000 arc: C3 V02N0401 arc: C4 H02W0401 arc: C5 V01N0101 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V00T0100 arc: D2 V00B0100 arc: D3 V01S0100 arc: D4 S1_V02N0601 arc: D5 H02W0201 arc: D7 H02W0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F4 arc: E1_H02E0101 Q1 arc: E1_H02E0201 F2 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q0 arc: N1_V02N0201 F2 arc: S1_V02S0501 F7 arc: V00T0000 Q0 arc: V00T0100 F3 arc: V01S0000 Q0 arc: V01S0100 Q1 word: SLICEA.K0.INIT 0000000011001100 word: SLICEB.K1.INIT 0000111100000000 word: SLICEA.K1.INIT 0101010101010100 word: SLICED.K1.INIT 0011001100000011 word: SLICEC.K1.INIT 0101000001010101 word: SLICEB.K0.INIT 1010100000100000 word: SLICEC.K0.INIT 0000110100000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R4C31:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E3_H06E0203 V01N0001 arc: N1_V02N0301 E1_H01W0100 arc: S1_V02S0001 E3_H06W0003 arc: V00T0000 S1_V02N0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 S1_V02N0401 arc: A0 F5 arc: A3 V02N0501 arc: A5 V00T0000 arc: B0 V00B0000 arc: B3 H02E0101 arc: B4 V02N0501 arc: B5 S1_V02N0501 arc: B6 H02E0101 arc: B7 V00T0000 arc: C0 H00R0100 arc: C3 V02N0401 arc: C4 H01E0001 arc: C5 H02E0601 arc: C7 V02N0001 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D3 H02W0201 arc: D4 V02N0401 arc: D5 E1_H02W0201 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F6 arc: H01W0100 F6 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: S1_V02S0401 F4 arc: S1_V02S0601 F6 arc: V00B0000 F4 arc: V00B0100 F7 arc: V01S0000 F2 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 word: SLICED.K0.INIT 0000000011001100 word: SLICEA.K0.INIT 1111111111101010 word: SLICED.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0000000011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1100000011000100 word: SLICEC.K1.INIT 0000000001000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R4C32:PLC2 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0701 V02S0701 arc: H00L0000 W1_H02E0201 arc: H00R0100 V02S0701 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 H01E0001 arc: A3 H01E0001 arc: A5 Q5 arc: C1 N1_V01S0100 arc: C4 H01E0001 arc: C5 H01E0001 arc: C6 H01E0001 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 V00B0100 arc: D3 N1_V01S0000 arc: D4 H02E0201 arc: D6 H00R0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q4 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q3 arc: E1_H02E0501 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 Q5 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q2 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: V01S0100 Q6 word: SLICEB.K0.INIT 1010101000000000 word: SLICEC.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1010101000000000 word: SLICEC.K1.INIT 0101000001010000 word: SLICEA.K1.INIT 1010000010100000 word: SLICED.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1010101000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 .tile R4C33:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0203 W1_H02E0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H02E0401 arc: V00B0000 H02W0401 arc: V00T0100 V02N0501 arc: A0 H02W0701 arc: A2 F5 arc: A3 V00B0000 arc: A4 N1_V02S0101 arc: A5 E1_H01W0000 arc: A6 W1_H02E0501 arc: A7 H00R0000 arc: B0 H01W0100 arc: B2 H02W0101 arc: B3 H02E0101 arc: B4 H02W0301 arc: B5 H02E0301 arc: B6 V02S0501 arc: B7 F3 arc: C0 S1_V02N0601 arc: C1 W1_H02E0401 arc: C2 N1_V01S0100 arc: C3 S1_V02N0401 arc: C4 H01E0001 arc: C5 S1_V02N0001 arc: C6 S1_V02N0201 arc: C7 H02W0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D2 H02W0001 arc: D3 V02S0001 arc: D4 H00R0100 arc: D5 H02E0201 arc: D6 S1_V02N0401 arc: D7 V02S0601 arc: E1_H01E0101 F7 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0000 F4 arc: H01W0100 Q1 arc: M0 V00T0100 arc: M1 H00L0000 arc: MUXCLK0 CLK0 arc: V01S0000 F2 arc: V01S0100 Q1 arc: W1_H02W0201 F2 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0101010100000100 word: SLICEA.K1.INIT 0000111100001111 word: SLICEC.K0.INIT 1001000000001001 word: SLICEB.K1.INIT 1001000000001001 word: SLICEC.K1.INIT 1001000000001001 word: SLICED.K1.INIT 1000000000000000 word: SLICEB.K0.INIT 1000000000000000 word: SLICED.K0.INIT 1000010000100001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R4C34:PLC2 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0001 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H06E0003 arc: V00T0000 H02W0201 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0701 S1_V02N0701 arc: A1 E1_H01E0001 arc: A3 W1_H02E0501 arc: A4 V00T0100 arc: A5 N1_V01S0100 arc: A6 W1_H02E0501 arc: A7 W1_H02E0701 arc: B1 N1_V02S0301 arc: B3 H00R0000 arc: B4 V00B0100 arc: B5 V02S0701 arc: B6 V02N0701 arc: B7 H02E0301 arc: C1 V02N0601 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 E1_H01E0101 arc: C6 Q6 arc: C7 S1_V02N0001 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D3 V01S0100 arc: D4 V00B0000 arc: D5 F2 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q7 arc: H01W0100 Q1 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 H02W0601 arc: M1 E1_H02W0001 arc: M2 H02E0601 arc: M3 H00L0000 arc: M4 E1_H02W0401 arc: M5 H02W0001 arc: M6 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: N1_V02N0501 Q5 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0601 Q6 arc: V00B0000 Q4 arc: V00B0100 Q5 arc: V00T0100 Q3 arc: V01S0000 Q1 arc: V01S0100 Q6 arc: W1_H02W0001 F0 arc: W1_H02W0401 Q4 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1001000000001001 word: SLICED.K0.INIT 1000010000100001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0100000110000010 word: SLICED.K1.INIT 1000001001000001 word: SLICEC.K1.INIT 1000000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R4C35:PLC2 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 N1_V02S0001 arc: H00R0100 N1_V02S0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H02W0401 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 N1_V01S0000 arc: A0 E1_H02W0701 arc: A2 V00B0000 arc: A4 V02S0101 arc: B0 V00T0000 arc: B2 V02N0301 arc: B3 V01N0001 arc: B4 S1_V02N0501 arc: C0 H02E0401 arc: C2 V02S0601 arc: C3 S1_V02N0601 arc: C4 V02N0201 arc: C5 E1_H02W0401 arc: C7 S1_V02N0201 arc: CE1 N1_V02S0201 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 H02W0201 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 H01W0000 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q3 arc: E3_H06E0003 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0100 arc: M0 H02W0601 arc: M3 H00L0000 arc: M4 E1_H01E0101 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0701 F5 arc: S3_V06S0003 F0 arc: V00B0000 F4 arc: V01S0000 Q4 arc: W1_H02W0201 Q2 word: SLICEC.K0.INIT 1111001110101010 word: SLICEB.K0.INIT 1010101011101010 word: SLICEB.K1.INIT 0000000011000000 word: SLICED.K1.INIT 1111000000000000 word: SLICEC.K1.INIT 1111000000000000 word: SLICEA.K0.INIT 0101000001110000 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C36:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 N1_V01S0000 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 H02E0601 arc: V00B0100 W1_H02E0701 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 V02S0201 arc: W1_H02W0601 V02S0601 arc: W3_H06W0303 E1_H01W0100 arc: A1 H00L0100 arc: A2 V02N0501 arc: B1 V02S0101 arc: B3 V01N0001 arc: B4 N1_V02S0501 arc: C0 N1_V01S0100 arc: C1 H02E0601 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 V01N0101 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V00B0000 arc: E1_H01E0101 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 V01S0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V01S0100 F0 arc: W1_H02W0001 Q2 arc: W1_H02W0401 Q4 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1110111110101111 word: SLICEB.K0.INIT 1010111100000000 word: SLICEB.K1.INIT 1100111100000000 word: SLICEC.K0.INIT 1100000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C37:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0003 W3_H06E0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 W3_H06E0203 arc: B0 H02E0301 arc: B6 H02E0301 arc: C0 E1_H02W0601 arc: C6 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D6 N1_V02S0601 arc: F0 F0_SLICE arc: F6 F6_SLICE arc: H01W0100 Q0 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0000 F6 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 1111000011110011 word: SLICEA.K0.INIT 1111110011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C38:PLC2 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 V02N0601 arc: H00R0100 V02S0501 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N1_V02S0001 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: A0 V02N0701 arc: A3 E1_H01E0001 arc: A5 V02N0101 arc: A6 F5 arc: A7 N1_V01N0101 arc: B2 V02S0301 arc: B3 V02S0301 arc: B5 H02E0101 arc: B6 V00B0100 arc: B7 H02E0101 arc: C0 E1_H02W0601 arc: C2 N1_V01N0001 arc: C5 V00T0000 arc: C6 V01N0101 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D5 N1_V02S0401 arc: D6 W1_H02E0201 arc: D7 H02E0001 arc: E1_H01E0001 Q7 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M6 H02W0401 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: S1_V02S0201 Q0 arc: V00B0100 F7 arc: V01S0000 F6 arc: V01S0100 Q2 word: SLICEC.K1.INIT 0000000100001101 word: SLICED.K1.INIT 1110000011110000 word: SLICED.K0.INIT 0100000001000100 word: SLICEB.K0.INIT 1100000011000000 word: SLICEB.K1.INIT 1000100010001000 word: SLICEA.K0.INIT 1111000010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C39:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 N1_V02S0001 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V02S0301 arc: V00B0100 N1_V02S0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 E1_H02W0701 arc: A0 H00R0000 arc: A4 E1_H01W0000 arc: A5 E1_H02W0501 arc: B1 S1_V02N0301 arc: B3 E1_H02W0101 arc: B4 V02S0501 arc: B5 V02S0701 arc: C0 H00L0000 arc: C1 H00L0000 arc: C3 V02S0601 arc: C6 H02W0401 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D3 E1_H02W0201 arc: D4 V02S0601 arc: D5 V02S0601 arc: D6 H02W0001 arc: E1_H01E0001 Q4 arc: E1_H02E0101 Q3 arc: E1_H02E0701 Q5 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00R0000 Q4 arc: H01W0000 F0 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0101 Q3 arc: V01S0000 Q5 arc: W1_H02W0601 F6 word: SLICED.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1111110011001100 word: SLICEC.K1.INIT 1010101011001100 word: SLICEC.K0.INIT 1010101011001100 word: SLICEB.K1.INIT 1111110000001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C40:PLC2 arc: E3_H06E0303 H01E0101 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 N1_V02S0701 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: A2 V02N0701 arc: A3 H01E0001 arc: A7 V02N0301 arc: B0 H02W0301 arc: B4 H02E0101 arc: B5 S1_V02N0701 arc: B6 V00T0000 arc: E1_H01E0001 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: V01S0000 F7 arc: V01S0100 F5 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C41:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 V02N0001 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 N1_V02S0001 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0201 arc: V00T0000 V02N0401 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0701 V02S0701 arc: A2 V00B0000 arc: A5 W1_H02E0701 arc: B0 V01N0001 arc: B1 V00T0000 arc: B3 V02N0301 arc: B4 H00L0000 arc: B6 N1_V01S0000 arc: B7 V02S0701 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: N1_V01N0001 F6 arc: N1_V01N0101 F7 arc: S1_V02S0101 F1 arc: S1_V02S0201 F0 arc: V01S0000 F3 arc: V01S0100 F4 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C42:PLC2 arc: H00R0000 H02W0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H02W0101 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0601 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0501 N1_V01S0100 arc: A3 V02N0501 arc: A5 V00T0000 arc: A7 E1_H01W0000 arc: B0 S1_V02N0101 arc: B1 E1_H01W0100 arc: B2 H00R0000 arc: B4 S1_V02N0501 arc: B6 V00B0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0301 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: S1_V02S0201 F0 arc: S1_V02S0301 F3 arc: S1_V02S0501 F5 arc: V01S0000 F6 arc: V01S0100 F4 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C43:PLC2 arc: E1_H02E0201 N1_V02S0201 arc: E3_H06E0003 W3_H06E0003 arc: H00R0000 H02W0401 arc: N1_V02N0201 H02W0201 arc: N1_V02N0501 E1_H02W0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 N1_V02S0201 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0303 H06W0303 arc: V00B0100 E1_H02W0701 arc: W1_H02W0201 N1_V02S0201 arc: A0 H02W0501 arc: B1 H00R0100 arc: B4 H01E0101 arc: B5 E1_H02W0101 arc: B6 H02W0101 arc: B7 H02E0301 arc: C4 E1_H02W0401 arc: C5 V00T0100 arc: C6 H01E0001 arc: C7 E1_H02W0601 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 E1_H02W0001 arc: D5 E1_H02W0001 arc: D6 E1_H02W0001 arc: D7 H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q4 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0401 Q4 arc: V00T0100 F1 arc: W1_H02W0601 Q6 arc: W3_H06W0203 Q7 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1100111111000000 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R4C44:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02N0201 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 H02E0201 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 V01N0001 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 S1_V02N0201 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: A0 H00L0000 arc: A2 V00B0000 arc: A5 E1_H02W0701 arc: A7 V02N0101 arc: B3 S1_V02N0101 arc: B4 E1_H02W0301 arc: B6 V00T0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F3 arc: S1_V02S0501 F7 arc: S1_V02S0601 F6 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C45:PLC2 arc: E1_H02E0501 V01N0101 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0303 W3_H06E0203 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 H06W0003 arc: V00B0100 V02S0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02N0501 arc: A2 S1_V02N0701 arc: A4 E1_H02W0701 arc: A5 V02S0101 arc: B1 E1_H02W0101 arc: B3 S1_V02N0101 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: LSR0 H02W0501 arc: M0 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0201 F0 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R4C46:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 W3_H06E0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 N1_V02S0301 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A3 V00T0000 arc: A4 V00T0000 arc: A6 N1_V02S0301 arc: A7 V00T0100 arc: B2 H00R0000 arc: B3 V02S0301 arc: B4 N1_V01S0000 arc: B5 N1_V01S0000 arc: B6 S1_V02N0701 arc: B7 S1_V02N0501 arc: C2 H02E0601 arc: C3 N1_V02S0401 arc: C4 V02N0201 arc: C5 V02N0201 arc: C6 V02S0201 arc: C7 V00B0100 arc: D2 V00B0100 arc: D3 F2 arc: D4 N1_V02S0601 arc: D6 V01N0001 arc: D7 H02W0001 arc: E1_H01E0101 F7 arc: E3_H06E0303 F5 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: N1_V01N0001 F5 arc: N1_V01N0101 F7 arc: N1_V02N0401 F6 arc: V00T0100 F3 arc: V01S0100 F7 word: SLICEC.K1.INIT 1100000011000000 word: SLICED.K0.INIT 0000000000100111 word: SLICEC.K0.INIT 0000111100000100 word: SLICEB.K0.INIT 0011000000110011 word: SLICEB.K1.INIT 1010101100000000 word: SLICED.K1.INIT 0000000000101010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R4C47:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0203 V01N0001 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0601 E1_H01W0000 arc: V00T0000 S1_V02N0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A1 H00L0000 arc: A2 V02S0501 arc: A3 V00B0000 arc: A4 W1_H02E0501 arc: A7 Q7 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 H00L0000 arc: B3 H02W0301 arc: B4 V00B0100 arc: B5 V02N0501 arc: B6 E1_H02W0301 arc: B7 V00B0000 arc: C0 V02N0401 arc: C1 S1_V02N0601 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 V02N0001 arc: C5 E1_H01E0101 arc: C6 F4 arc: C7 H02E0401 arc: CE0 H02W0101 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02E0001 arc: D2 V01S0100 arc: D3 V00B0100 arc: D4 V00B0000 arc: D5 F2 arc: D6 F0 arc: D7 S1_V02N0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q0 arc: N1_V02N0301 F1 arc: V00B0000 Q4 arc: V00B0100 Q7 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000011001010 word: SLICEC.K0.INIT 1101000010000000 word: SLICED.K0.INIT 0000000000000011 word: SLICED.K1.INIT 1010110000000000 word: SLICEA.K1.INIT 0000110000001010 word: SLICEB.K1.INIT 1100100000001000 word: SLICEB.K0.INIT 0101010000000100 word: SLICEC.K1.INIT 0000000000000011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C48:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V01N0001 arc: H00R0100 H02E0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0501 S3_V06N0303 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 H06W0003 arc: V00B0000 V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 E1_H02W0301 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 V01N0101 arc: A3 V01N0101 arc: A4 H02W0501 arc: A5 N1_V01S0100 arc: A6 F5 arc: A7 E1_H01W0000 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02N0101 arc: B4 E1_H02W0101 arc: B5 H00R0000 arc: B6 N1_V02S0701 arc: B7 W1_H02E0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 H02W0401 arc: C5 H02W0601 arc: C6 V00B0100 arc: C7 V00T0100 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 E1_H01W0100 arc: D5 H00R0100 arc: D6 S1_V02N0601 arc: D7 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: M0 V00B0000 arc: M2 V00T0000 arc: M3 W1_H02E0201 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0201 F0 arc: S3_V06S0303 F6 arc: W3_H06W0003 Q3 word: SLICEA.K0.INIT 1111000100000000 word: SLICEA.K1.INIT 0000000100000000 word: SLICEB.K0.INIT 1111101011001100 word: SLICEB.K1.INIT 1111101011111111 word: SLICED.K1.INIT 1100100011111011 word: SLICEC.K0.INIT 0010001100100000 word: SLICEC.K1.INIT 0101010001010101 word: SLICED.K0.INIT 1100111000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R4C49:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 W3_H06E0003 arc: H00R0100 H02E0501 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H02E0601 arc: V00B0000 E1_H02W0401 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 H02E0301 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: A0 F5 arc: A1 F5 arc: A2 H00L0100 arc: A4 V00T0000 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 H00L0000 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 H00L0000 arc: B3 E1_H01W0100 arc: B4 H00L0000 arc: B5 S1_V02N0701 arc: B6 S1_V02N0501 arc: B7 V02N0701 arc: C0 H02W0401 arc: C2 E1_H02W0401 arc: C3 F4 arc: C4 W1_H02E0601 arc: C5 V02N0001 arc: C6 W1_H02E0601 arc: C7 H02W0601 arc: CE0 V02S0201 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 H02W0201 arc: D2 V02N0001 arc: D3 H02E0001 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 H02E0201 arc: D7 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0000 F3 arc: H01W0100 Q6 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 V00T0100 arc: M5 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q5 arc: S1_V02S0201 F0 arc: V01S0000 Q5 word: SLICEB.K0.INIT 0000000000110101 word: SLICEC.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111101110 word: SLICED.K0.INIT 0000110000001010 word: SLICEC.K0.INIT 0000110100001000 word: SLICEB.K1.INIT 0000000000000011 word: SLICED.K1.INIT 0000101100001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C50:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E3_H06E0003 W3_H06E0003 arc: H00L0100 W1_H02E0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 N1_V01S0100 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0401 H06E0203 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V02S0601 arc: A0 S1_V02N0701 arc: A1 F7 arc: A2 V00T0000 arc: A4 V00T0000 arc: A7 Q7 arc: B2 H02W0301 arc: B4 V00B0100 arc: B7 V00T0000 arc: C0 V02N0601 arc: C1 V02N0401 arc: C2 H02W0401 arc: C4 S1_V02N0001 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 V02S0201 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H01E0101 arc: D2 V00B0100 arc: D4 H00R0100 arc: D7 V02S0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 F0 arc: E1_H02E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F4 arc: LSR0 H02W0501 arc: M2 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: N1_V02N0201 F0 arc: S1_V02S0301 F1 arc: V00B0100 Q7 arc: V00T0000 Q2 word: SLICEA.K0.INIT 1010101011110000 word: SLICEB.K0.INIT 0000010011000100 word: SLICEC.K0.INIT 1100000010100000 word: SLICED.K1.INIT 1010110000000000 word: SLICEA.K1.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C51:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 N1_V02S0601 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: V00B0000 V02N0001 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A3 V00B0000 arc: B3 E1_H02W0301 arc: B7 E1_H02W0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C3 N1_V01S0100 arc: C7 E1_H02W0401 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D3 N1_V02S0001 arc: D7 H02E0201 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02E0501 arc: M0 V00T0000 arc: M5 E1_H02W0001 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: W3_H06W0003 F3 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1111111110100000 word: SLICED.K1.INIT 1100111111001100 word: SLICEB.K1.INIT 1100100001000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R4C52:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 S1_V02N0201 arc: H00R0000 H02W0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: V00T0000 V02S0601 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0501 arc: A2 H00L0100 arc: A3 H00L0100 arc: B0 V01N0001 arc: B2 V02N0301 arc: B3 V02N0301 arc: C0 H02W0401 arc: C2 H00L0000 arc: C3 H00L0000 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 V02S0001 arc: D3 V02S0001 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q3 arc: LSR0 H02E0501 arc: M2 V00T0000 arc: M3 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1111111100001000 word: SLICEB.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 0011001100000010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R4C53:PLC2 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 H02E0301 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0601 H02W0601 arc: S1_V02S0601 H02E0601 arc: V00B0000 W1_H02E0601 arc: V00B0100 N1_V02S0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0701 arc: A2 V01N0101 arc: B2 V02N0301 arc: B3 V02N0301 arc: C0 W1_H02E0401 arc: C2 H00L0100 arc: C3 V02N0601 arc: CE0 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: E1_H01E0101 F0 arc: E1_H02E0001 Q0 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: LSR0 V00B0000 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0101 F2 arc: S1_V02S0001 F0 word: SLICEA.K0.INIT 1010111110100000 word: SLICEB.K0.INIT 0011000000100010 word: SLICEB.K1.INIT 0000000000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C54:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 H01E0101 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 V01N0001 arc: H00L0000 H02E0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06W0203 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0701 V01N0101 arc: V00B0100 W1_H02E0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 S3_V06N0303 arc: A0 H02W0501 arc: A2 V02N0701 arc: A3 H00L0100 arc: A5 Q5 arc: A6 E1_H02W0501 arc: B0 V02N0101 arc: B2 V02N0101 arc: B3 H01W0100 arc: B6 N1_V02S0701 arc: B7 F3 arc: C0 E1_H02W0601 arc: C2 H00L0100 arc: C3 V02S0401 arc: C5 E1_H01E0101 arc: C6 H02W0601 arc: C7 H02E0401 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 H02E0001 arc: D3 V02N0201 arc: D5 V02N0401 arc: D6 H01W0000 arc: D7 E1_H01W0100 arc: E1_H01E0101 Q3 arc: E1_H02E0001 F0 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F7 arc: H01W0100 Q5 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M3 H02E0201 arc: M5 H00L0000 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: S3_V06S0303 F6 arc: V00T0000 F2 arc: V01S0100 Q5 word: SLICEC.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 0000001010001010 word: SLICEA.K0.INIT 1111101111111000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 0000101000001100 word: SLICED.K1.INIT 0000000000000011 word: SLICED.K0.INIT 1100000011001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C55:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 H02E0401 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 N1_V02S0701 arc: A0 H00L0100 arc: A1 H00L0100 arc: A2 V02N0701 arc: A3 V01N0101 arc: A4 V00T0000 arc: A5 H02W0701 arc: A6 H00L0000 arc: B0 E1_H02W0101 arc: B1 E1_H02W0301 arc: B2 H02E0101 arc: B3 H02E0101 arc: B5 V01S0000 arc: B6 F3 arc: B7 V02N0701 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V02N0201 arc: C6 N1_V02S0001 arc: C7 V01N0101 arc: CE0 H02W0101 arc: CE2 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 V02N0001 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 V00B0000 arc: D5 H00L0100 arc: D6 H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: H01W0100 F5 arc: LSR1 E1_H02W0501 arc: M0 V00B0100 arc: M1 H00R0100 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F6 arc: V01S0000 Q5 word: SLICEA.K0.INIT 1000100011000000 word: SLICEA.K1.INIT 1011100011111111 word: SLICED.K1.INIT 1111000011001100 word: SLICEB.K1.INIT 0100011100000000 word: SLICEB.K0.INIT 0000000001000111 word: SLICED.K0.INIT 1110000011101111 word: SLICEC.K0.INIT 1010101011110000 word: SLICEC.K1.INIT 1010100000001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C56:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: H00R0000 H02W0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 N1_V02S0001 arc: V00B0100 W1_H02E0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: A0 E1_H01E0001 arc: A1 H00L0100 arc: A2 V02N0501 arc: A3 V02N0701 arc: A4 V00T0100 arc: A5 H02E0501 arc: A6 V00T0100 arc: A7 H00L0000 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0301 arc: B3 V02N0301 arc: B4 V02N0501 arc: B5 N1_V01S0000 arc: B6 H02W0301 arc: B7 V00T0000 arc: C0 H00L0100 arc: C1 N1_V01N0001 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V02S0201 arc: C5 N1_V02S0001 arc: C6 Q6 arc: C7 E1_H02W0601 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: D3 H02E0201 arc: D4 V00B0000 arc: D5 V02S0601 arc: D6 H02E0001 arc: D7 V02S0401 arc: E1_H01E0001 Q6 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 Q1 arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 H01E0001 arc: M1 H00R0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F5 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 F6 word: SLICED.K0.INIT 1011100000000000 word: SLICEC.K0.INIT 0101000000110000 word: SLICEC.K1.INIT 0000000100110001 word: SLICEB.K0.INIT 1000100011000000 word: SLICEB.K1.INIT 1011101111110011 word: SLICEA.K0.INIT 1100000010001000 word: SLICEA.K1.INIT 1011101111110011 word: SLICED.K1.INIT 1010000011000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C57:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0001 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0401 S3_V06N0203 arc: V00B0000 V02N0001 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0203 V01N0001 arc: A0 V01N0101 arc: A2 V01N0101 arc: A3 H02E0701 arc: A4 N1_V01N0101 arc: A6 V02N0301 arc: A7 H02W0501 arc: B0 E1_H02W0301 arc: B2 E1_H02W0101 arc: B3 Q3 arc: B4 E1_H02W0101 arc: B5 F3 arc: B7 E1_H02W0301 arc: C0 N1_V01N0001 arc: C2 V02S0401 arc: C3 E1_H01W0000 arc: C4 E1_H01E0101 arc: C5 V00T0000 arc: C6 Q6 arc: C7 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 V02S0401 arc: D5 F2 arc: D6 H01W0000 arc: D7 H02E0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q6 arc: E1_H02E0301 Q3 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F4 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M3 H00L0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: S1_V02S0701 F5 arc: V00B0100 F7 arc: V01S0000 Q3 word: SLICED.K0.INIT 1111010110100000 word: SLICED.K1.INIT 0001110100000000 word: SLICEA.K0.INIT 1111111110111000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000011100010 word: SLICEB.K1.INIT 1000100010100000 word: SLICEB.K0.INIT 0000111000000010 word: SLICEC.K1.INIT 0000000000000011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C58:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W1_H02E0101 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 H02W0301 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 V02S0601 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A1 H02E0701 arc: A2 E1_H01E0001 arc: A3 N1_V02S0701 arc: A4 V00B0000 arc: A5 F7 arc: A6 E1_H02W0701 arc: A7 N1_V01N0101 arc: B0 H01W0100 arc: B1 Q1 arc: B2 V02N0301 arc: B3 W1_H02E0301 arc: B4 H02W0301 arc: B5 H00R0000 arc: B6 V02S0501 arc: B7 H02E0301 arc: C0 H02E0401 arc: C1 N1_V01N0001 arc: C2 W1_H02E0401 arc: C3 E1_H01W0000 arc: C4 E1_H01E0101 arc: C5 H01E0001 arc: C6 V00B0100 arc: C7 V00T0000 arc: CE0 H02E0101 arc: CE1 W1_H02E0101 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0001 arc: D2 Q2 arc: D3 F2 arc: D4 W1_H02E0201 arc: D5 H02W0001 arc: D6 H02W0201 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q1 arc: E1_H02E0601 Q6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0000 Q4 arc: H01W0100 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M1 H00R0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q2 arc: S1_V02S0401 Q4 arc: S1_V02S0601 Q6 arc: S1_V02S0701 F5 arc: V00B0000 Q4 arc: V01S0000 F3 arc: V01S0100 F0 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 1100000010100000 word: SLICEA.K1.INIT 1110010011111111 word: SLICED.K1.INIT 0011000001010000 word: SLICEC.K0.INIT 0000000001000111 word: SLICEC.K1.INIT 1110111000001111 word: SLICED.K0.INIT 0101010001010101 word: SLICEB.K0.INIT 1110000000100000 word: SLICEB.K1.INIT 1111000011100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C59:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 V01N0001 arc: H00L0000 V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 W3_H06E0303 arc: W3_H06W0003 V06N0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0501 arc: A3 V01N0101 arc: A4 V00B0000 arc: B0 V02S0301 arc: B3 H00L0000 arc: B4 E1_H02W0101 arc: C1 S1_V02N0401 arc: C3 V02S0601 arc: C4 H02E0601 arc: D0 E1_H02W0201 arc: D3 H00R0000 arc: D4 V02N0401 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00R0000 F4 arc: H01W0000 F3 arc: H01W0100 F0 arc: M0 V00B0100 word: SLICEA.K0.INIT 1011101110001000 word: SLICEA.K1.INIT 1111000011110000 word: SLICEC.K0.INIT 0101000101000000 word: SLICEB.K1.INIT 0000111100001011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ .tile R4C60:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 V01N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0701 N1_V01S0100 .tile R4C61:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 V01N0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 W1_H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 H02E0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0701 V01N0101 arc: V00B0000 E1_H02W0601 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V01S0000 arc: A0 F7 arc: A1 F7 arc: A2 V02N0701 arc: A3 V02S0501 arc: A4 V00T0000 arc: A5 V00T0100 arc: A6 H02E0501 arc: A7 Q7 arc: B0 F3 arc: B2 V02S0101 arc: B3 H02W0301 arc: B4 V02N0501 arc: B5 V01S0000 arc: B6 H02W0101 arc: B7 H02E0301 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C2 S1_V02N0401 arc: C3 H02E0601 arc: C4 V02N0001 arc: C5 H02E0601 arc: C6 V02S0201 arc: C7 V02N0201 arc: CE0 H02E0101 arc: CE1 E1_H02W0101 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 Q2 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 H02E0201 arc: D6 F2 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M2 H02W0601 arc: M5 W1_H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F4 arc: N1_V02N0301 Q1 arc: V00B0100 F5 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: V01S0100 Q7 word: SLICEC.K1.INIT 0101000000110000 word: SLICED.K1.INIT 0000010011000100 word: SLICEB.K1.INIT 0000001100000101 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 1011000010000000 word: SLICEB.K0.INIT 1100100000001000 word: SLICED.K0.INIT 0101010101010001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C62:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02S0301 arc: H00R0100 V02N0701 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0601 N1_V01S0000 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 F5 arc: A2 W1_H02E0701 arc: A3 E1_H01E0001 arc: A4 E1_H01W0000 arc: A5 V02N0301 arc: A6 V02S0101 arc: A7 V02N0301 arc: B0 H02E0301 arc: B2 F3 arc: B3 H02E0101 arc: B4 H02E0101 arc: B5 H00R0000 arc: B6 E1_H02W0301 arc: B7 V02N0501 arc: C0 E1_H02W0401 arc: C2 F4 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 V00T0100 arc: C6 V02N0201 arc: C7 H02E0601 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 H01W0000 arc: D5 S1_V02N0601 arc: D6 F2 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q4 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 Q4 arc: H01W0100 Q1 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M1 H00L0100 arc: M3 H00L0100 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V02N0301 Q1 arc: V00T0100 Q3 arc: V01S0000 F0 arc: V01S0100 F7 arc: W1_H02W0301 Q1 word: SLICED.K1.INIT 1110010000000000 word: SLICEC.K1.INIT 0000000011011000 word: SLICEA.K0.INIT 0000111100011111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 1110000000100000 word: SLICEB.K1.INIT 0000111000000010 word: SLICEB.K0.INIT 1010101010101000 word: SLICED.K0.INIT 1111000000100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C63:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0201 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0601 S3_V06N0303 arc: V00B0100 H02W0501 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0103 N1_V01S0100 arc: A0 F5 arc: A1 F5 arc: A2 H01E0001 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 W1_H02E0701 arc: B0 E1_H01W0100 arc: B2 V01N0001 arc: B3 E1_H02W0301 arc: B4 V01S0000 arc: B5 V02N0701 arc: B6 H02E0301 arc: B7 F3 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 V02N0401 arc: C3 V02S0401 arc: C4 Q4 arc: C5 H02E0401 arc: C6 N1_V02S0001 arc: C7 S1_V02N0201 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H01E0101 arc: D3 V00B0100 arc: D4 V01N0001 arc: D5 V02N0401 arc: D6 H02E0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q4 arc: E1_H02E0301 Q1 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 H02E0601 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 F0 arc: N1_V02N0601 Q6 arc: V00B0000 F4 arc: V01S0000 Q1 arc: V01S0100 Q2 arc: W1_H02W0701 Q7 word: SLICEC.K0.INIT 0001101100000000 word: SLICEC.K1.INIT 0000101000100010 word: SLICEB.K0.INIT 0000000100110001 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K0.INIT 0000010011000100 word: SLICEB.K1.INIT 1100100000001000 word: SLICED.K1.INIT 0101010101000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C64:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0103 S3_V06N0103 arc: H00R0000 V02S0601 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 H06E0103 arc: S1_V02S0301 H06E0003 arc: V00B0000 V02N0201 arc: V00B0100 H02W0501 arc: V00T0000 H02E0201 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 H01E0101 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A2 H02W0501 arc: A3 V02N0501 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: B0 V00B0000 arc: B1 V01N0001 arc: B2 H02E0301 arc: B3 V02N0301 arc: B4 V00B0100 arc: B5 H02W0301 arc: C0 H02E0601 arc: C1 F4 arc: C2 S1_V02N0401 arc: C3 V02N0401 arc: C4 V02S0001 arc: C5 V02S0001 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 F2 arc: D2 H01E0101 arc: D3 V02S0201 arc: D4 S1_V02N0401 arc: D5 V02S0401 arc: E1_H01E0001 F5 arc: E1_H01E0101 Q5 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H01W0100 F0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 W1_H02E0601 arc: M5 H02E0001 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: V01S0100 Q7 arc: W1_H02W0301 F1 arc: W3_H06W0003 Q3 word: SLICEA.K0.INIT 0000000100001101 word: SLICEB.K1.INIT 1111111100100000 word: SLICEC.K1.INIT 0011000000100010 word: SLICEB.K0.INIT 1010100000001000 word: SLICEC.K0.INIT 0011000000100010 word: SLICEA.K1.INIT 0000000000000011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C65:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 H01E0101 arc: H00L0100 H02W0301 arc: H00R0000 V02N0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H06E0303 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S3_V06N0303 arc: W3_H06W0003 E3_H06W0003 arc: A2 V01N0101 arc: A6 H02W0701 arc: B0 S1_V02N0101 arc: B1 S1_V02N0101 arc: B2 V02S0301 arc: C0 H00L0100 arc: C1 V02N0401 arc: C2 H00R0100 arc: C6 V02S0001 arc: CE1 S1_V02N0201 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 E1_H02W0001 arc: D2 V00B0100 arc: D6 V02S0601 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: H01W0000 F0 arc: LSR0 V00T0000 arc: M0 H02E0601 arc: M5 H02W0001 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V02N0701 Q5 arc: S3_V06S0303 F6 arc: W3_H06W0103 Q2 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111111111000000 word: SLICED.K0.INIT 0101010101010000 word: SLICEB.K0.INIT 1011101000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R4C66:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0701 V01N0101 arc: V00T0000 N1_V02S0601 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: B0 V02N0101 arc: B1 V02N0101 arc: C0 H02E0601 arc: C1 S1_V02N0401 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: E1_H01E0001 Q6 arc: E1_H02E0301 Q3 arc: F0 F5A_SLICE arc: H00L0000 Q2 arc: H01W0000 Q4 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 W1_H02E0601 arc: M1 H00R0000 arc: M2 V00B0100 arc: M3 H02E0201 arc: M4 V00T0000 arc: M5 H00R0000 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q1 arc: S1_V02S0301 Q3 arc: V00B0100 Q5 arc: V01S0000 Q2 arc: V01S0100 Q3 arc: W1_H02W0001 F0 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1111110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C67:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00R0100 V02N0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02W0601 arc: S1_V02S0101 H06E0103 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 W3_H06E0203 arc: B0 V00B0000 arc: C0 N1_V01N0001 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H02E0001 F0 arc: E1_H02E0201 F0 arc: E1_H02E0401 Q4 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: H00L0100 Q3 arc: H00R0000 Q6 arc: H01W0000 Q2 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 H02W0501 arc: M0 V00T0000 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: M4 V00T0100 arc: M5 H00L0000 arc: M6 V00B0100 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: V00B0000 Q6 arc: V01S0100 Q2 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1111111100000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C68:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 H02W0001 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 V01N0001 arc: V00B0000 W1_H02E0601 arc: V00T0100 H02E0101 arc: V01S0000 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 S3_V06N0303 arc: A1 V01N0101 arc: A2 H00L0100 arc: A5 V00T0100 arc: B0 H02E0301 arc: B5 N1_V01S0000 arc: C0 H00L0000 arc: C2 E1_H02W0601 arc: C5 N1_V02S0001 arc: CE0 E1_H02W0101 arc: CE2 V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 H02W0001 arc: D3 V02N0001 arc: D5 E1_H01W0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M1 H00R0000 arc: M2 H02E0601 arc: M5 H00R0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: S1_V02S0701 Q5 arc: S3_V06S0303 F5 arc: V01S0100 Q6 word: SLICEB.K0.INIT 1111000010101010 word: SLICEB.K1.INIT 1111111100000000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1010101010101010 word: SLICEC.K1.INIT 1010001010100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R4C69:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0501 W1_H02E0501 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 N1_V02S0701 arc: A0 W1_H02E0701 arc: A6 V02N0101 arc: B6 V02S0701 arc: C0 W1_H02E0401 arc: C6 H02W0401 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D6 V02S0601 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F6 F6_SLICE arc: H01W0000 F0 arc: H01W0100 F6 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 Q0 word: SLICEA.K0.INIT 1010101011110000 word: SLICED.K0.INIT 1111110100000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C70:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 N1_V02S0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 H06W0003 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02E0401 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0203 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 S1_V02N0701 arc: A3 F5 arc: A4 H02W0701 arc: A6 H02W0501 arc: B0 S1_V02N0301 arc: B1 S1_V02N0101 arc: B2 H01W0100 arc: B3 E1_H02W0101 arc: B4 S1_V02N0701 arc: B5 H02W0101 arc: B6 N1_V02S0701 arc: C0 E1_H02W0401 arc: C2 H02W0401 arc: C3 S1_V02N0601 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C6 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 W1_H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 H02W0201 arc: D2 Q2 arc: D3 V02S0001 arc: D4 H01W0000 arc: D5 N1_V02S0401 arc: D6 V02S0601 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 W1_H02E0501 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 W1_H02E0601 arc: M4 V00T0100 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: N1_V02N0101 Q1 arc: N1_V02N0701 Q7 arc: S1_V02S0101 F3 arc: S3_V06S0303 F6 arc: V01S0000 Q7 arc: W1_H02W0401 F4 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 0000110000001010 word: SLICEA.K1.INIT 0000000000100010 word: SLICEC.K0.INIT 0101000101000000 word: SLICEB.K0.INIT 1110000001000000 word: SLICEC.K1.INIT 0000000000000011 word: SLICEB.K1.INIT 1111000001000000 word: SLICED.K0.INIT 0000000001010001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C71:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0701 H06E0203 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 E3_H06W0303 arc: A0 E1_H01E0001 arc: A3 S1_V02N0701 arc: A4 N1_V01N0101 arc: A5 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 V01N0001 arc: B1 F3 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02S0701 arc: B7 V01S0000 arc: C0 F4 arc: C1 F4 arc: C3 N1_V01N0001 arc: C4 S1_V02N0201 arc: C5 V02N0001 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D3 S1_V02N0201 arc: D4 H02E0001 arc: D5 H00R0100 arc: D7 S1_V02N0401 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q6 arc: E1_H02E0301 Q3 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F7 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M1 W1_H02E0001 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q4 arc: V01S0000 Q1 word: SLICEB.K1.INIT 0001101100000000 word: SLICEC.K0.INIT 0000010100000011 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111100 word: SLICEC.K1.INIT 0000000010111000 word: SLICED.K1.INIT 0000101000001100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C72:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06N0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 H02E0401 arc: H00R0100 H02W0501 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 W3_H06E0303 arc: V00B0100 E1_H02W0701 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02S0601 arc: A0 H02W0701 arc: A1 S1_V02N0701 arc: A2 F5 arc: A3 F5 arc: A4 V02S0101 arc: A5 F7 arc: A6 V00T0100 arc: A7 Q7 arc: B0 H02E0301 arc: B1 H02E0101 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 W1_H02E0101 arc: B5 E1_H02W0101 arc: B6 H01E0101 arc: B7 V02N0701 arc: C0 E1_H02W0401 arc: C1 F4 arc: C2 V02N0601 arc: C3 V02N0601 arc: C6 S1_V02N0001 arc: C7 V02S0201 arc: CE2 H00R0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 E1_H02W0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 F0 arc: D5 H02E0201 arc: D6 V02S0401 arc: D7 V02N0401 arc: E1_H01E0101 F6 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: LSR1 W1_H02E0501 arc: M2 W1_H02E0601 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q5 arc: W3_H06W0103 F2 word: SLICED.K1.INIT 0000000001000111 word: SLICEC.K1.INIT 0000000000010001 word: SLICEB.K0.INIT 1110000011110000 word: SLICEB.K1.INIT 1110000000000000 word: SLICED.K0.INIT 1100000010100000 word: SLICEA.K0.INIT 1110000001000000 word: SLICEC.K0.INIT 0000000000010001 word: SLICEA.K1.INIT 1000101010001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C73:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02S0201 arc: H00L0100 E1_H02W0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0201 E1_H02W0201 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: A0 V02S0701 arc: A2 V00T0000 arc: A3 H02E0701 arc: A4 H02E0701 arc: A5 H02W0501 arc: A6 F5 arc: A7 Q7 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B2 H01W0100 arc: B3 H00R0100 arc: B4 H02E0301 arc: B5 S1_V02N0701 arc: B6 F3 arc: B7 E1_H02W0101 arc: C0 F4 arc: C1 F4 arc: C2 E1_H02W0601 arc: C3 S1_V02N0401 arc: C4 E1_H02W0601 arc: C5 V02N0001 arc: C6 V00T0100 arc: C7 V02N0001 arc: CE2 H00L0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 V01S0100 arc: D3 H02E0201 arc: D4 V02S0401 arc: D5 H01W0000 arc: D6 V02N0401 arc: D7 E1_H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F2 arc: V01S0000 Q5 arc: V01S0100 Q5 arc: W3_H06W0003 F0 word: SLICED.K1.INIT 0100010000001100 word: SLICEB.K0.INIT 1101000010000000 word: SLICEC.K0.INIT 0000101000001100 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1111111111110011 word: SLICEC.K1.INIT 1010100000100000 word: SLICEB.K1.INIT 0010001100100000 word: SLICED.K0.INIT 0000111000001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C74:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 V02S0601 arc: H00R0100 V02S0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0501 W1_H02E0501 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 V02N0701 arc: A0 V02S0501 arc: A1 V02S0501 arc: A2 S1_V02N0501 arc: A3 F7 arc: A7 V00T0100 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 E1_H02W0301 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 H02E0401 arc: C3 E1_H02W0401 arc: C7 H02E0401 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 N1_V01S0000 arc: D2 Q2 arc: D3 F2 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M1 E1_H02W0001 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q1 arc: S1_V02S0301 F3 arc: V01S0000 Q7 arc: V01S0100 Q4 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1111000011100000 word: SLICEA.K1.INIT 0011000000100000 word: SLICEB.K0.INIT 0101010000000100 word: SLICED.K1.INIT 1010100000001000 word: SLICEB.K1.INIT 1100110011001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C75:PLC2 arc: E1_H02E0001 V06N0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00L0100 E1_H02W0301 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 E1_H02W0301 arc: A0 F7 arc: A2 H01E0001 arc: A3 W1_H02E0501 arc: A4 N1_V01N0101 arc: A5 E1_H02W0701 arc: A6 V02N0101 arc: A7 W1_H02E0501 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 V02N0101 arc: B3 V02N0101 arc: B4 H02W0101 arc: B5 H01E0101 arc: B6 V02N0701 arc: B7 V01S0000 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 H02E0401 arc: C3 N1_V01N0001 arc: C4 E1_H02W0401 arc: C5 H02E0401 arc: C6 Q6 arc: C7 E1_H02W0401 arc: CE1 H00L0000 arc: CE2 V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H00L0100 arc: D5 H00L0100 arc: D6 V00B0000 arc: D7 H00L0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0100 Q2 arc: LSR0 V00T0000 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M2 V00T0100 arc: M4 V00T0100 arc: M6 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: S1_V02S0101 F3 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: V00B0000 Q4 arc: V00B0100 F5 arc: V01S0000 Q2 arc: V01S0100 F2 arc: W1_H02W0201 F0 word: SLICED.K0.INIT 0000010000010101 word: SLICEB.K1.INIT 0000110001000100 word: SLICEB.K0.INIT 0001000100000011 word: SLICEC.K0.INIT 0000000010101100 word: SLICED.K1.INIT 1100101000000000 word: SLICEC.K1.INIT 0000000011011000 word: SLICEA.K0.INIT 1110111011100010 word: SLICEA.K1.INIT 1111111111110011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C76:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0601 V01N0001 arc: V00B0000 V02S0001 arc: V00B0100 H02E0501 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: A0 H01E0001 arc: A1 V02N0501 arc: A2 V01N0101 arc: A3 H00L0100 arc: A4 H02W0501 arc: A5 H02W0501 arc: A7 H02W0701 arc: B0 V00T0000 arc: B1 H02E0301 arc: B2 S1_V02N0301 arc: B3 H01W0100 arc: B4 H02E0301 arc: B5 H02E0301 arc: B7 S1_V02N0701 arc: C0 W1_H02E0601 arc: C1 V02N0401 arc: C2 W1_H02E0601 arc: C3 V02N0601 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C7 V01N0101 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 V00B0100 arc: D3 V02N0201 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q1 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F7 arc: H01W0100 Q6 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0301 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: V01S0100 F0 arc: W1_H02W0301 F1 arc: W3_H06W0203 F4 word: SLICEB.K1.INIT 0011010100000000 word: SLICED.K1.INIT 1110010000000000 word: SLICEC.K0.INIT 1000100010001010 word: SLICEC.K1.INIT 0000000000000010 word: SLICEA.K0.INIT 0000101100001000 word: SLICEB.K0.INIT 1010000011000000 word: SLICEA.K1.INIT 0011001100100011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C77:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V01N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0001 arc: H00L0100 V02N0301 arc: H00R0000 H02E0601 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02S0301 arc: V00T0100 V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V02S0701 arc: A0 H02W0701 arc: A1 V02N0701 arc: A2 F5 arc: A3 F5 arc: A4 S1_V02N0101 arc: A5 S1_V02N0101 arc: A6 H02E0701 arc: A7 Q7 arc: B0 V02N0101 arc: B2 H01W0100 arc: B4 V02N0501 arc: B5 S1_V02N0701 arc: B6 V00T0000 arc: B7 H02E0301 arc: C0 F4 arc: C1 F4 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C4 V01N0101 arc: C5 E1_H01E0101 arc: C6 V02N0001 arc: C7 S1_V02N0201 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 E1_H02W0001 arc: D2 V02N0201 arc: D3 V00T0100 arc: D4 V02N0401 arc: D5 H01W0000 arc: D6 F0 arc: D7 S1_V02N0601 arc: E1_H01E0101 Q5 arc: E1_H02E0101 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F7 arc: LSR0 H02E0501 arc: LSR1 H02W0301 arc: M0 H01E0001 arc: M1 H00L0100 arc: M2 V00B0100 arc: M3 H00L0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q7 arc: N1_V02N0101 Q3 arc: V00T0000 F2 arc: V01S0000 Q1 arc: W3_H06W0303 F6 word: SLICEC.K0.INIT 0000001010001010 word: SLICEA.K0.INIT 1111111000110010 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K1.INIT 0000001100000101 word: SLICEC.K1.INIT 0000010000010101 word: SLICEB.K0.INIT 1100110011111010 word: SLICEB.K1.INIT 1111111111111010 word: SLICED.K0.INIT 0010000001110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C78:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 H01E0101 arc: S1_V02S0701 H06E0203 arc: V00B0000 S1_V02N0201 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02E0301 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 W3_H06E0303 arc: A0 E1_H02W0501 arc: A1 H02E0701 arc: A3 H02E0501 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: A6 H02E0701 arc: A7 Q7 arc: B0 H02E0101 arc: B1 H01W0100 arc: B3 E1_H02W0301 arc: B4 F3 arc: B5 V00B0100 arc: B6 H02E0101 arc: B7 V01S0000 arc: C0 H02W0601 arc: C1 H00L0000 arc: C3 H02W0601 arc: C5 V02N0001 arc: C6 H02E0401 arc: C7 V02N0001 arc: CE0 H00R0000 arc: CE1 V02S0201 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V01S0100 arc: D3 V01S0100 arc: D4 F0 arc: D5 V02N0401 arc: D6 V00B0000 arc: D7 V02N0401 arc: E1_H01E0001 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F5 arc: H01W0100 Q3 arc: LSR0 W1_H02E0501 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M3 H00L0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q0 arc: N1_V02N0101 F1 arc: N1_V02N0201 Q0 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: V00B0100 Q5 arc: V01S0000 Q3 arc: V01S0100 Q7 arc: W1_H02W0401 F4 arc: W1_H02W0701 F7 word: SLICED.K1.INIT 0000000000110101 word: SLICEC.K1.INIT 0011010100000000 word: SLICED.K0.INIT 1101100000000000 word: SLICEA.K1.INIT 0000110100001000 word: SLICEA.K0.INIT 1000101010000000 word: SLICEB.K1.INIT 0010001100100000 word: SLICEC.K0.INIT 0000000000010001 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C79:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V01N0101 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02N0001 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0201 E1_H01W0000 arc: V00B0000 S1_V02N0201 arc: V00T0000 H02W0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0601 S1_V02N0601 arc: A0 H02W0501 arc: A1 E1_H01E0001 arc: A2 S1_V02N0501 arc: A3 H02E0701 arc: A4 F5 arc: A5 Q5 arc: A6 W1_H02E0701 arc: A7 N1_V01N0101 arc: B0 H02E0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 V02S0101 arc: B4 N1_V02S0701 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 V00B0100 arc: C0 E1_H02W0401 arc: C1 H02E0401 arc: C2 W1_H02E0601 arc: C3 V02N0601 arc: C4 V02S0001 arc: C5 E1_H02W0401 arc: C6 V00T0100 arc: C7 H02W0401 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 E1_H02W0201 arc: D2 Q2 arc: D3 S1_V02N0201 arc: D4 F0 arc: D5 H01W0000 arc: D6 H02W0001 arc: D7 V02S0401 arc: E1_H01E0001 Q5 arc: E1_H02E0101 F3 arc: E1_H02E0401 F6 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0501 arc: M1 H02E0001 arc: M2 E1_H02W0601 arc: M5 H02E0001 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q2 arc: N1_V02N0001 F2 arc: N1_V02N0701 F7 arc: S1_V02S0601 F4 arc: V00B0100 Q7 arc: V00T0100 Q1 arc: V01S0000 F1 word: SLICEA.K1.INIT 0000010100000011 word: SLICED.K0.INIT 0011001000010000 word: SLICEB.K1.INIT 1110001000000000 word: SLICED.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 1010100000001000 word: SLICEC.K1.INIT 0010001100100000 word: SLICEC.K0.INIT 0000111100001011 word: SLICEB.K0.INIT 1110000001000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C80:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0501 N1_V02S0501 arc: E3_H06E0303 H01E0101 arc: H00L0000 N1_V02S0001 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S3_V06N0303 arc: A0 F5 arc: A1 H00L0000 arc: A3 V02N0501 arc: A5 S1_V02N0101 arc: B0 V02S0101 arc: B1 H02E0101 arc: B3 H02E0301 arc: B5 E1_H02W0101 arc: C0 H02E0601 arc: C1 H02E0401 arc: C3 S1_V02N0401 arc: C5 V00B0100 arc: D0 V00T0100 arc: D3 V02S0201 arc: D5 V00B0000 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: M0 V00T0000 arc: V01S0000 F0 word: SLICEC.K1.INIT 1010000010001000 word: SLICEB.K1.INIT 0000110000001010 word: SLICEA.K0.INIT 1110111011100010 word: SLICEA.K1.INIT 1111110111111101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 .tile R4C81:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 E1_H01W0100 arc: H00L0000 H02W0001 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 W3_H06E0303 arc: A0 N1_V02S0501 arc: A1 N1_V02S0701 arc: A2 V02S0701 arc: A3 V00T0000 arc: A6 E1_H01W0000 arc: A7 V00T0100 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0301 arc: B3 E1_H02W0301 arc: B6 V00B0100 arc: B7 V01S0000 arc: C0 V02N0401 arc: C1 H00L0000 arc: C2 H00L0000 arc: C3 H02W0601 arc: C6 E1_H01E0101 arc: C7 N1_V02S0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 N1_V01S0000 arc: D2 Q2 arc: D3 H02E0201 arc: D6 E1_H02W0201 arc: D7 H02E0001 arc: E1_H01E0101 F3 arc: E3_H06E0203 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: N1_V02N0201 Q0 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V00T0100 Q1 arc: V01S0000 Q2 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000000000100 word: SLICEB.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1000000000000000 word: SLICEA.K0.INIT 1010101010111000 word: SLICEA.K1.INIT 1111111000000010 word: SLICEB.K0.INIT 0000001011111110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C82:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0301 S1_V02N0301 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02W0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02S0501 arc: A1 N1_V02S0501 arc: A2 V02S0701 arc: A4 N1_V01N0101 arc: A7 N1_V02S0101 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 V02S0301 arc: B4 S1_V02N0701 arc: B5 S1_V02N0701 arc: B7 V01S0000 arc: C0 E1_H02W0401 arc: C1 S1_V02N0401 arc: C2 V02N0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0201 arc: D4 H00R0100 arc: D5 H00R0100 arc: D7 H00L0100 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F7 arc: LSR0 H02E0501 arc: LSR1 V00B0100 arc: M4 V00B0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q0 arc: V00T0000 Q0 arc: V01S0000 Q2 arc: V01S0100 Q1 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1010101010111000 word: SLICEA.K1.INIT 1010101010111000 word: SLICEB.K0.INIT 1111111000010000 word: SLICEC.K0.INIT 1110101011001111 word: SLICEC.K1.INIT 1100110011001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R4C83:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 H01E0101 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02S0001 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02W0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0501 W3_H06E0303 arc: V00B0100 H02W0501 arc: V00T0100 H02W0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 H01E0101 arc: A0 E1_H01E0001 arc: A1 H02E0501 arc: A2 V02S0701 arc: A6 E1_H01W0000 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B4 H02W0301 arc: B5 H02W0301 arc: B6 V00B0000 arc: C0 H02E0601 arc: C1 E1_H02W0601 arc: C2 H00L0000 arc: C6 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V00B0100 arc: D4 E1_H02W0201 arc: D5 H00R0100 arc: D6 H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q1 arc: N1_V02N0001 Q0 arc: V00B0000 Q4 arc: W1_H02W0301 Q1 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 1111000011100010 word: SLICEA.K1.INIT 1010101010111000 word: SLICEB.K0.INIT 1010101110101000 word: SLICEC.K1.INIT 0011001100000000 word: SLICEC.K0.INIT 0011001100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C84:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 V02S0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 W1_H02E0701 arc: A4 H02W0701 arc: B0 H02W0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: C0 E1_H02W0401 arc: C4 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V02N0001 arc: D3 V00T0100 arc: D4 V01N0001 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q6 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H01W0000 Q3 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0601 Q4 arc: W1_H02W0001 Q2 word: SLICEA.K0.INIT 1100111011111010 word: SLICEB.K0.INIT 0011001100000000 word: SLICEB.K1.INIT 0011001100000000 word: SLICEC.K0.INIT 1111101001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C85:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02S0401 arc: E3_H06E0203 H01E0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: H00R0100 V02S0501 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 N1_V01S0000 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0401 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: A0 S1_V02N0501 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 N1_V01N0101 arc: A6 V00T0100 arc: B0 E1_H02W0301 arc: B2 S1_V02N0101 arc: B3 V02N0101 arc: B4 V02N0701 arc: B6 V00T0000 arc: C0 E1_H01W0000 arc: C2 W1_H02E0401 arc: C3 V02S0601 arc: C4 H02W0401 arc: C6 W1_H02E0601 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 V00T0100 arc: D3 S1_V02N0001 arc: D4 S1_V02N0401 arc: D6 V01N0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F6 arc: E1_H02E0601 Q6 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: LSR0 W1_H02E0501 arc: LSR1 H02W0301 arc: M6 H02E0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q7 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 word: SLICEB.K0.INIT 1111111001110010 word: SLICEC.K0.INIT 1011111110111000 word: SLICEB.K1.INIT 1111010011101110 word: SLICED.K0.INIT 1000110010101111 word: SLICEA.K0.INIT 1000000000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R4C86:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V02S0701 arc: H00L0000 H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0401 arc: H00R0100 W1_H02E0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0303 W3_H06E0303 arc: V00B0100 N1_V02S0301 arc: V00T0000 S1_V02N0401 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S1_V02N0401 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 W1_H02E0501 arc: A3 H01E0001 arc: A4 N1_V01N0101 arc: A7 V00T0100 arc: B0 H01W0100 arc: B1 V00T0000 arc: B2 H02E0301 arc: B3 Q3 arc: B4 H00L0000 arc: B7 H01E0101 arc: C0 S1_V02N0401 arc: C1 H02E0601 arc: C2 H02W0601 arc: C3 V02S0601 arc: C4 H02E0601 arc: C7 F4 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 H02E0201 arc: D2 Q2 arc: D3 H02E0201 arc: D4 V02S0401 arc: D7 F2 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q3 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0301 arc: M2 V00B0100 arc: M3 W1_H02E0201 arc: M4 E1_H02W0401 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0101 Q3 arc: V00B0000 Q4 arc: V00T0100 F3 arc: W1_H02W0101 Q3 word: SLICEA.K0.INIT 1111111001011100 word: SLICEA.K1.INIT 1111011111100100 word: SLICEB.K1.INIT 1111001101010001 word: SLICEC.K0.INIT 0101000100000000 word: SLICEB.K0.INIT 1101110100001101 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C87:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S1_V02N0601 arc: H00R0000 H02W0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H02E0601 arc: V00B0000 S1_V02N0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: A0 H02E0701 arc: A1 V02S0701 arc: A2 H01E0001 arc: A3 V00B0000 arc: B0 S1_V02N0101 arc: B1 V02N0301 arc: B2 V02S0301 arc: B3 H02E0101 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 V02N0201 arc: E1_H01E0101 Q2 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 word: SLICEA.K0.INIT 1010111011111100 word: SLICEA.K1.INIT 1010111011111100 word: SLICEB.K1.INIT 1101111111011000 word: SLICEB.K0.INIT 1100111011111010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R4C88:PLC2 arc: H00L0100 V02N0301 arc: H00R0100 V02N0701 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0401 H02E0401 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H01E0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: A0 V02N0701 arc: A1 V02S0501 arc: A2 V02N0501 arc: A3 V02N0501 arc: B0 S1_V02N0301 arc: B1 V02N0101 arc: B2 H01W0100 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02E0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: H00L0000 F2 arc: H01W0100 Q3 arc: LSR0 H02W0501 arc: LSR1 H02W0301 arc: M2 H02E0601 arc: M3 H00R0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: V00B0100 Q7 word: SLICEA.K1.INIT 1010111011111100 word: SLICEA.K0.INIT 1111111000111010 word: SLICEB.K0.INIT 1111110110001101 word: SLICEB.K1.INIT 1111111100000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R53C28:PLC2 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S3_V06N0203 .tile R53C34:PLC2 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 S3_V06N0203 arc: W3_H06W0103 E3_H06W0103 .tile R53C40:PLC2 arc: N3_V06N0203 S3_V06N0103 arc: W3_H06W0103 E3_H06W0103 .tile R53C43:PLC2 arc: N3_V06N0103 H06W0103 .tile R53C46:PLC2 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0203 S3_V06N0103 arc: W3_H06W0103 E3_H06W0003 .tile R53C52:PLC2 arc: W3_H06W0003 E3_H06W0303 .tile R53C55:PLC2 arc: N3_V06N0003 S3_V06N0003 .tile R53C58:PLC2 arc: N3_V06N0003 S3_V06N0303 arc: W3_H06W0303 E3_H06W0303 .tile R53C64:PLC2 arc: E3_H06E0303 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: W3_H06W0303 S3_V06N0303 .tile R53C67:PLC2 arc: N3_V06N0303 H06E0303 .tile R53C70:PLC2 arc: E3_H06E0303 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 .tile R53C73:PLC2 arc: N3_V06N0303 H06E0303 .tile R53C76:PLC2 arc: E3_H06E0003 W3_H06E0303 arc: N3_V06N0303 W3_H06E0303 .tile R53C79:PLC2 arc: N3_V06N0003 H06E0003 .tile R53C82:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: N3_V06N0003 W3_H06E0003 .tile R53C88:PLC2 arc: N3_V06N0003 W3_H06E0003 arc: S3_V06S0203 N3_V06S0103 .tile R54C87:PLC2 arc: S3_V06S0303 N3_V06S0303 .tile R59C28:PLC2 arc: N3_V06N0203 E3_H06W0203 .tile R59C34:PLC2 arc: N3_V06N0203 E3_H06W0203 arc: W3_H06W0203 E3_H06W0203 .tile R59C40:PLC2 arc: N3_V06N0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 .tile R59C46:PLC2 arc: N3_V06N0103 E3_H06W0103 arc: W3_H06W0103 E3_H06W0103 .tile R59C52:PLC2 arc: W3_H06W0103 E3_H06W0003 .tile R59C55:PLC2 arc: N3_V06N0003 H06W0003 .tile R59C58:PLC2 arc: N3_V06N0303 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 .tile R59C64:PLC2 arc: E3_H06E0303 F5 arc: F5 F5_SLICE arc: N3_V06N0303 F5 arc: W3_H06W0303 F5 word: SLICEC.K1.INIT 1111111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R59C70:PLC2 arc: E3_H06E0303 W3_H06E0303 .tile R59C76:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R59C82:PLC2 arc: E3_H06E0003 W3_H06E0003 .tile R59C88:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0701 N3_V06S0203 .tile R5C11:PLC2 arc: W3_H06W0303 E3_H06W0203 .tile R5C17:PLC2 arc: W3_H06W0203 E3_H06W0103 .tile R5C23:PLC2 arc: W3_H06W0103 E3_H06W0003 .tile R5C29:PLC2 arc: V00B0100 V02N0101 arc: C2 E1_H01W0000 arc: C6 V00B0100 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 V00B0100 arc: D6 E1_H01W0100 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F6 F6_SLICE arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V02N0201 F2 arc: V00B0000 F6 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEB.K0.INIT 0000000011110000 word: SLICED.K0.INIT 1111000011111111 word: SLICEA.K0.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C2:PLC2 arc: S3_V06S0303 H06W0303 .tile R5C30:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 V02N0201 arc: H00L0000 H02W0201 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 H02W0101 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 N1_V02S0101 arc: V00B0000 V02N0201 arc: V00T0100 V02S0501 arc: W1_H02W0101 N1_V02S0101 arc: A1 V02S0701 arc: A3 F7 arc: A4 F5 arc: A5 V02N0301 arc: A6 N1_V02S0101 arc: A7 V02N0101 arc: B0 V02S0101 arc: B1 E1_H01W0100 arc: B3 H02W0101 arc: B4 V02S0501 arc: B5 H00L0000 arc: B7 V02N0501 arc: C0 N1_V02S0601 arc: C1 H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C5 E1_H01E0101 arc: C6 V00T0000 arc: C7 V02S0201 arc: CE0 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 F2 arc: D3 N1_V01S0000 arc: D4 E1_H01W0100 arc: D5 V01N0001 arc: D6 H02E0201 arc: D7 H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E1_H02E0601 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F1 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR1 V00B0000 arc: M2 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0101 F6 arc: N1_V02N0401 F6 arc: S1_V02S0001 Q0 arc: S1_V02S0601 F4 arc: V00T0000 Q0 arc: V01S0100 F4 word: SLICEA.K0.INIT 1111111111111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0011000000010000 word: SLICEA.K1.INIT 0000000100000000 word: SLICED.K1.INIT 0000000000000100 word: SLICEC.K0.INIT 0000000010000000 word: SLICEC.K1.INIT 0000001000000011 word: SLICED.K0.INIT 0000000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 .tile R5C31:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 V01N0001 arc: H00L0000 V02S0001 arc: H00R0000 V02N0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0301 N1_V01S0100 arc: V00B0000 V02S0001 arc: V00T0000 V02N0401 arc: W1_H02W0401 V02S0401 arc: A0 V02N0701 arc: A1 F5 arc: A2 F5 arc: A4 F7 arc: A7 H00R0000 arc: B0 V00T0000 arc: B1 V01N0001 arc: B2 V01N0001 arc: B4 H00R0000 arc: B7 N1_V01S0000 arc: C0 H00L0000 arc: C1 N1_V01S0100 arc: C2 N1_V01S0100 arc: C3 E1_H02W0601 arc: C4 E1_H02W0401 arc: C5 V01N0101 arc: C6 H02E0601 arc: C7 E1_H01E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 V01S0100 arc: D4 H02W0001 arc: D5 H02E0001 arc: D6 F2 arc: D7 V00B0000 arc: E1_H01E0101 F3 arc: E1_H02E0401 F6 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 F3 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: N1_V01N0001 F5 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0101 F1 arc: W1_H02W0201 F2 word: SLICEC.K0.INIT 0111010101010101 word: SLICEA.K0.INIT 0011001100000010 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1111000000000000 word: SLICEB.K0.INIT 0010000000000000 word: SLICEA.K1.INIT 1101000011110000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K1.INIT 0010001100110011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R5C32:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0701 N1_V01S0100 arc: H00L0100 V02S0101 arc: H00R0100 H02W0701 arc: N1_V02N0501 N1_V01S0100 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 V02S0401 arc: V00T0100 H02W0101 arc: W1_H02W0001 E1_H02W0501 arc: A0 V02N0701 arc: A1 V02N0501 arc: A4 E1_H02W0701 arc: A5 V02S0101 arc: A6 H02E0501 arc: A7 H02W0501 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B6 V02S0701 arc: B7 V00B0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C4 E1_H01E0101 arc: C5 V00B0100 arc: C6 W1_H02E0601 arc: C7 V02N0201 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 W1_H02E0001 arc: D4 H01W0000 arc: D6 V02N0601 arc: D7 H00L0100 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0401 F6 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: LSR0 V00T0000 arc: M0 V00T0100 arc: M1 H00R0100 arc: M2 V00T0100 arc: M7 E1_H02W0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: S1_V02S0501 F5 arc: V01S0100 Q7 arc: W1_H02W0401 F6 word: SLICED.K1.INIT 0100000000000000 word: SLICEC.K0.INIT 0101000000000000 word: SLICED.K0.INIT 1111010100110001 word: SLICEA.K0.INIT 0100000000000000 word: SLICEA.K1.INIT 0000000000001001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 0000010100000101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C33:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 V06S0303 arc: H00L0100 H02W0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: N1_V02N0201 H01E0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 N1_V01S0100 arc: V00B0000 E1_H02W0401 arc: V00B0100 W1_H02E0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H02W0701 arc: A0 H01E0001 arc: A1 W1_H02E0701 arc: A3 H00L0100 arc: A6 V02N0301 arc: A7 H02E0501 arc: B1 V00B0000 arc: B2 H02W0301 arc: B3 H00R0000 arc: B6 V02N0701 arc: C0 N1_V01N0001 arc: C1 W1_H02E0601 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C4 W1_H02E0401 arc: C5 F4 arc: C6 V02N0001 arc: CLK0 G_HPBX0000 arc: D1 V02S0201 arc: D2 H00R0000 arc: D3 E1_H02W0001 arc: D4 E1_H01W0100 arc: D5 H00R0100 arc: D6 V02N0401 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR1 H02E0301 arc: M2 V00B0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F5 arc: N1_V02N0501 F5 arc: S1_V02S0301 F1 arc: V01S0000 F2 arc: W1_H02W0401 F4 word: SLICED.K1.INIT 1111111110101010 word: SLICEC.K1.INIT 0000000011110000 word: SLICEA.K0.INIT 1111101011111010 word: SLICEB.K0.INIT 1111001100000000 word: SLICEB.K1.INIT 0100000011000100 word: SLICEA.K1.INIT 0000001000000000 word: SLICED.K0.INIT 0000000000000001 word: SLICEC.K0.INIT 0000000011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R5C34:PLC2 arc: E1_H02E0401 V01N0001 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V02N0701 arc: H00R0000 V02S0601 arc: H00R0100 V02N0701 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: V00T0000 V02S0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 V02S0501 arc: A2 H02W0501 arc: A3 V02N0501 arc: A4 V02S0301 arc: A7 V00T0100 arc: B2 H02W0301 arc: B3 S1_V02N0101 arc: B4 H02E0301 arc: B7 V00T0000 arc: C0 H02W0401 arc: C1 H02E0401 arc: C2 E1_H02W0401 arc: C3 V02N0401 arc: C4 W1_H02E0401 arc: C6 H02E0401 arc: C7 H01E0001 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 F0 arc: D2 N1_V01S0000 arc: D3 H00R0000 arc: D4 F0 arc: D6 H00R0100 arc: D7 F2 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F1 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F0 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0000 F6 arc: V00T0100 F3 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000000011110000 word: SLICEA.K1.INIT 1111000000000000 word: SLICED.K0.INIT 1111111100001111 word: SLICEC.K0.INIT 1110000001000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000001 word: SLICED.K1.INIT 1000000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R5C35:PLC2 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: S1_V02S0101 E3_H06W0103 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: A0 V02N0501 arc: A1 V02N0501 arc: A3 F7 arc: A5 V00B0000 arc: A7 N1_V01N0101 arc: B3 E1_H01W0100 arc: B7 V00T0000 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C3 V02N0401 arc: C5 V02N0001 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 S1_V02N0001 arc: D2 V00T0100 arc: D3 E1_H02W0201 arc: D5 V01N0001 arc: D7 H02E0201 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H01W0000 Q3 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M3 H00L0000 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q5 arc: V01S0000 Q5 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0501 Q7 word: SLICEB.K1.INIT 1000000000000000 word: SLICEA.K0.INIT 1111000001010000 word: SLICEA.K1.INIT 1111000001010000 word: SLICEC.K1.INIT 1111101000001010 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C36:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 V06S0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H02W0501 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0601 H06W0303 arc: V00B0100 H02W0701 arc: V00T0100 V02S0701 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06S0203 arc: A0 H02E0501 arc: A1 H02W0501 arc: A3 S1_V02N0701 arc: A5 N1_V02S0301 arc: A6 S1_V02N0101 arc: B1 E1_H02W0301 arc: B2 N1_V02S0301 arc: B3 V02N0301 arc: B6 V01S0000 arc: C0 H02E0601 arc: C1 H02W0401 arc: C2 V02N0601 arc: C5 V02N0001 arc: C6 S1_V02N0201 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V00B0100 arc: D3 S1_V02N0001 arc: D5 V01N0001 arc: D6 H00L0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0100 F1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: N1_V02N0601 Q6 arc: S1_V02S0301 Q3 arc: V00T0000 Q0 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W1_H02W0401 Q6 word: SLICEA.K0.INIT 1111000001010000 word: SLICEC.K1.INIT 1111101001010000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1100110010101010 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C37:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 V06N0203 arc: H00R0000 H02E0401 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0701 E3_H06W0203 arc: V00B0100 N1_V02S0301 arc: V00T0100 V02N0701 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E3_H06W0203 arc: A2 F7 arc: A3 V00T0000 arc: A5 H02W0701 arc: B2 H02E0301 arc: B3 V02N0301 arc: B4 V02N0501 arc: B5 V02N0501 arc: B7 F3 arc: C0 E1_H01W0000 arc: C1 H00L0000 arc: C2 H02W0401 arc: C3 H00L0100 arc: C4 V01N0101 arc: C7 S1_V02N0201 arc: CE0 H00R0000 arc: CE1 H02E0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 N1_V02S0001 arc: D3 V02N0201 arc: D4 H02W0001 arc: D5 V01N0001 arc: D7 E1_H01W0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0000 Q4 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M2 E1_H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: S1_V02S0401 Q4 arc: S1_V02S0501 Q5 arc: V00T0000 Q0 arc: W1_H02W0401 Q4 arc: W1_H02W0501 Q5 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1110111000100010 word: SLICEB.K1.INIT 0000110001000100 word: SLICED.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 0000000011111011 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C38:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: H00L0000 V02S0201 arc: H00R0000 W1_H02E0401 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H06W0203 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 H02E0401 arc: V00B0100 E1_H02W0701 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E3_H06W0203 arc: A5 N1_V02S0301 arc: A7 V00T0100 arc: B0 N1_V02S0301 arc: B1 N1_V02S0301 arc: B2 V02S0101 arc: B3 V02S0101 arc: B7 H02E0101 arc: C1 H00L0100 arc: C2 H00L0000 arc: C3 V02N0601 arc: C7 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 V02S0001 arc: D3 V02S0001 arc: D5 V02N0401 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 Q7 arc: H01W0100 F7 arc: LSR0 V00B0000 arc: LSR1 H02W0501 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: M6 V00B0100 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q5 arc: V00T0100 Q1 arc: V01S0100 Q6 word: SLICED.K1.INIT 0000000001000111 word: SLICEA.K0.INIT 1100110000000000 word: SLICEA.K1.INIT 1100000011000000 word: SLICEC.K1.INIT 1010101000000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111110011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C39:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 N1_V02S0201 arc: H00L0100 N1_V02S0101 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 V01N0101 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02S0301 arc: V00T0100 H02W0101 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W3_H06W0303 E1_H01W0100 arc: A1 V02N0701 arc: A2 V00B0000 arc: A4 E1_H01W0000 arc: A5 E1_H01W0000 arc: B0 H02W0301 arc: B1 H02W0101 arc: B3 V02N0101 arc: C0 H00L0000 arc: C2 H00L0100 arc: C3 H00L0100 arc: C4 N1_V02S0201 arc: C5 N1_V02S0201 arc: D0 V00T0100 arc: D1 N1_V02S0201 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D4 H02W0001 arc: D5 E1_H02W0201 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 F0 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: N1_V01N0001 F4 word: SLICEB.K0.INIT 1111000010101010 word: SLICEB.K1.INIT 1111110011001100 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1110111010101010 word: SLICEC.K0.INIT 1010111110100000 word: SLICEC.K1.INIT 1111111110100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R5C40:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 E1_H02W0001 arc: H00L0100 S1_V02N0101 arc: H00R0000 V02N0601 arc: H00R0100 S1_V02N0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 V01N0101 arc: N3_V06N0103 E1_H01W0100 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 H01E0101 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: A1 V02S0501 arc: A2 H02E0501 arc: A4 V02S0101 arc: A5 S1_V02N0301 arc: A6 E1_H02W0701 arc: A7 V02N0101 arc: B3 H00L0000 arc: B6 V00B0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 N1_V01S0100 arc: C3 V02N0601 arc: C4 V00T0000 arc: C5 H02W0401 arc: C7 V02S0201 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0001 arc: D2 H00R0000 arc: D3 N1_V01S0000 arc: D4 V02N0601 arc: D5 V02N0601 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q0 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 arc: S1_V02S0401 Q4 arc: V01S0000 Q7 arc: V01S0100 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0101 Q1 arc: W1_H02W0301 Q3 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1010111110100000 word: SLICED.K0.INIT 1100110010101010 word: SLICED.K1.INIT 1111101010101010 word: SLICEC.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1111110000001100 word: SLICEC.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1111000010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C41:PLC2 arc: E1_H02E0501 V02N0501 arc: H00L0000 N1_V02S0201 arc: H00L0100 E1_H02W0101 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 H02E0001 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 N1_V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0100 V02N0501 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V02N0501 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A2 N1_V02S0501 arc: A4 V02N0101 arc: A6 V02S0101 arc: B1 V00B0000 arc: B7 N1_V02S0501 arc: C0 H00L0000 arc: C1 H02W0601 arc: C2 N1_V01S0100 arc: C4 V02S0001 arc: C6 H02W0401 arc: C7 V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 N1_V02S0201 arc: D2 V00B0100 arc: D4 N1_V02S0401 arc: D5 N1_V02S0601 arc: D6 V02N0601 arc: D7 H00L0100 arc: E1_H01E0001 Q7 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 W1_H02E0601 arc: M1 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q2 arc: N1_V02N0401 Q6 arc: S1_V02S0701 F5 arc: V01S0100 Q4 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 1111000010101010 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1111110011110000 word: SLICEC.K1.INIT 0000000011111111 word: SLICEB.K0.INIT 1111010110100000 word: SLICED.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1111001111000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C42:PLC2 arc: E1_H02E0301 V06S0003 arc: H00R0000 E1_H02W0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 H06W0003 arc: V00B0100 V02S0301 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0103 arc: A1 H02W0701 arc: A3 H02W0501 arc: A5 E1_H01W0000 arc: A7 N1_V01S0100 arc: B0 V02S0101 arc: B1 H02W0101 arc: B2 H02W0301 arc: B4 N1_V01S0000 arc: B6 V02S0501 arc: C0 H02W0601 arc: C1 E1_H02W0401 arc: C2 V02N0401 arc: C3 E1_H01W0000 arc: C4 V00T0000 arc: C5 V00B0100 arc: C6 V02S0001 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 S1_V02N0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 H02W0201 arc: D5 N1_V02S0601 arc: D6 N1_V02S0601 arc: D7 E1_H01W0100 arc: E1_H01E0001 Q2 arc: E1_H01E0101 Q0 arc: E1_H02E0101 Q3 arc: E1_H02E0401 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q6 arc: N1_V02N0701 Q5 arc: S1_V02S0301 F1 arc: V01S0000 Q4 arc: V01S0100 Q7 word: SLICEB.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1100110011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111000010101010 word: SLICED.K1.INIT 1010111110100000 word: SLICEA.K1.INIT 0000000000000001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R5C43:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0103 S3_V06N0103 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 H01E0101 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 S3_V06N0303 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 N1_V02S0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: A2 V00T0000 arc: A3 H01E0001 arc: A5 H02W0701 arc: B0 V02S0301 arc: B4 V02N0501 arc: B6 H01E0101 arc: B7 H02E0101 arc: E1_H01E0001 F5 arc: E1_H01E0101 F4 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0101 F6 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0100 F3 arc: W1_H02W0301 F3 arc: W1_H02W0501 F7 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C44:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0301 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00T0000 H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0701 arc: A3 V00T0000 arc: A5 E1_H01W0000 arc: B1 V01N0001 arc: B2 E1_H01W0100 arc: B4 V02N0701 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: E1_H02E0201 F2 arc: E1_H02E0301 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 F2 arc: N1_V01N0001 F5 arc: S1_V02S0401 F4 arc: S1_V02S0701 F5 arc: V01S0000 F0 arc: V01S0100 F1 arc: W1_H02W0301 F3 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 0000000000000000 word: SLICED.K1.INIT 0000000000000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C45:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 V02S0601 arc: E3_H06E0103 W3_H06E0103 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H01E0001 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 H02W0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A3 H02W0501 arc: A4 N1_V02S0101 arc: A5 S1_V02N0101 arc: A6 H02E0501 arc: A7 V00T0100 arc: B2 H02E0301 arc: B5 N1_V01S0000 arc: C2 V02N0401 arc: C3 V02N0601 arc: C4 H02E0401 arc: C5 V01N0101 arc: C6 N1_V02S0201 arc: C7 N1_V02S0201 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 H02W0001 arc: D6 H02E0001 arc: D7 H02E0001 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 Q4 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: M6 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: N1_V02N0601 F6 arc: N3_V06N0103 Q2 arc: V00T0100 Q3 arc: W1_H02W0001 Q2 word: SLICEC.K1.INIT 0010001000100011 word: SLICED.K0.INIT 1111101000001010 word: SLICED.K1.INIT 1111101010101010 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111101001010000 word: SLICEC.K0.INIT 1111000010101010 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R5C46:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 N1_V02S0001 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H02W0601 arc: V00B0000 S1_V02N0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 V06S0303 arc: A2 F7 arc: A4 V00T0100 arc: A5 V00T0100 arc: A6 V02S0301 arc: B0 V01N0001 arc: B2 V01N0001 arc: B3 H02E0301 arc: B4 V02S0501 arc: B5 V02S0501 arc: C0 H02E0601 arc: C2 H02E0401 arc: C3 H00L0000 arc: C4 V02N0001 arc: C5 V02N0001 arc: C6 S1_V02N0001 arc: C7 H02E0601 arc: D0 V02N0001 arc: D2 H02E0201 arc: D3 H02W0201 arc: D4 F0 arc: D5 F0 arc: D6 F2 arc: D7 V02S0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: M4 V00B0000 arc: N1_V01N0001 F0 arc: S1_V02S0201 F0 arc: V00T0100 F3 arc: V01S0100 F4 arc: W1_H02W0401 F6 arc: W1_H02W0601 F4 arc: W3_H06W0203 F4 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1100111100000000 word: SLICEB.K1.INIT 0000001100000000 word: SLICED.K1.INIT 1111000000000000 word: SLICED.K0.INIT 0000000011110101 word: SLICEB.K0.INIT 0000011111110111 word: SLICEC.K0.INIT 0000000010111000 word: SLICEC.K1.INIT 0000000000001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R5C47:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 V02N0601 arc: E3_H06E0203 H01E0001 arc: H00L0000 E1_H02W0201 arc: H00L0100 H02W0301 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0601 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: A0 H02E0701 arc: A2 V00T0000 arc: A3 F5 arc: A4 V00T0000 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 V02N0301 arc: B0 E1_H01W0100 arc: B2 H00R0000 arc: B4 H00L0000 arc: B5 H00R0000 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 S1_V02N0601 arc: C2 S1_V02N0601 arc: C3 H00R0100 arc: C4 Q4 arc: C5 V00T0000 arc: C6 H02W0601 arc: C7 V02S0201 arc: CE0 V02N0201 arc: CE1 H00L0100 arc: CE2 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 V02N0001 arc: D3 H02W0001 arc: D4 W1_H02E0001 arc: D5 V00B0000 arc: D6 F0 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H00R0100 F7 arc: H01W0100 Q0 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F2 arc: V00T0000 Q2 arc: V01S0000 Q0 word: SLICEC.K0.INIT 0000000001000111 word: SLICED.K1.INIT 1010100000001000 word: SLICEC.K1.INIT 0101000001000100 word: SLICEB.K1.INIT 0000010100000000 word: SLICEA.K0.INIT 1100000010100000 word: SLICEB.K0.INIT 0000101000001100 word: SLICED.K0.INIT 1111000010110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C48:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 S3_V06N0103 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 H02W0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0701 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 V02N0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 H01E0001 arc: A2 W1_H02E0701 arc: A3 H02W0701 arc: A4 V00B0000 arc: A6 V00T0100 arc: A7 Q7 arc: B0 F3 arc: B1 S1_V02N0301 arc: B2 H02W0101 arc: B3 E1_H02W0101 arc: B4 H02W0101 arc: B6 V00B0000 arc: B7 E1_H02W0301 arc: C0 F4 arc: C1 F4 arc: C2 H02W0401 arc: C3 H02W0401 arc: C4 H02W0401 arc: C6 H02E0601 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 V01S0100 arc: D2 Q2 arc: D3 H02W0001 arc: D4 H01W0000 arc: D6 H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q7 arc: E1_H02E0301 Q1 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: V00B0000 Q4 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0000 F7 arc: V01S0100 F3 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 0000010011000100 word: SLICEB.K1.INIT 0000000001010011 word: SLICEC.K0.INIT 0000010011000100 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K1.INIT 0000101000001100 word: SLICED.K0.INIT 1010000011000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C49:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S3_V06N0203 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0201 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 H02E0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A1 F5 arc: A2 H02W0501 arc: A3 S1_V02N0501 arc: A4 V00T0100 arc: A5 Q5 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 V00T0000 arc: B1 W1_H02E0101 arc: B2 H00L0000 arc: B3 H02E0301 arc: B4 W1_H02E0101 arc: B5 N1_V01S0000 arc: B6 V00T0000 arc: B7 E1_H02W0101 arc: C0 H02W0601 arc: C1 F4 arc: C2 H02W0601 arc: C3 H02E0401 arc: C4 H02E0601 arc: C5 V02N0001 arc: C6 W1_H02E0601 arc: C7 V00T0000 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 F0 arc: D2 H01E0101 arc: D3 V02N0001 arc: D4 F2 arc: D5 V00B0000 arc: D6 W1_H02E0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 F1 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 F6 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M3 H00R0100 arc: M5 H00R0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q7 arc: V00T0000 Q0 arc: V00T0100 F3 arc: V01S0100 Q5 word: SLICED.K1.INIT 0100011100000000 word: SLICED.K0.INIT 1010000011000000 word: SLICEB.K0.INIT 0000111000000010 word: SLICEB.K1.INIT 1000100010100000 word: SLICEC.K1.INIT 0000000010101100 word: SLICEA.K0.INIT 1110000001000000 word: SLICEC.K0.INIT 0000111100001011 word: SLICEA.K1.INIT 1111000011100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C50:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 S1_V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 H02E0301 arc: S1_V02S0701 H02W0701 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 H02W0601 arc: V00B0100 V02N0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 N1_V02S0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A2 V00B0000 arc: A5 E1_H02W0701 arc: A6 V02S0301 arc: B2 V02S0101 arc: B5 V02N0501 arc: B6 H02W0301 arc: C0 H02W0401 arc: C2 H00L0000 arc: C5 H02E0401 arc: C6 H01E0001 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 W1_H02E0201 arc: D2 E1_H02W0201 arc: D5 E1_H02W0001 arc: D6 V02S0401 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F5 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q1 arc: H01W0100 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00R0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: S3_V06S0303 F6 word: SLICEC.K1.INIT 0111011100000111 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111111100000000 word: SLICEB.K0.INIT 1011001110100000 word: SLICED.K0.INIT 1100010011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R5C51:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 E3_H06W0203 arc: H00L0000 H02E0001 arc: H00R0000 E1_H02W0401 arc: H01W0000 E3_H06W0103 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02E0501 arc: V00B0000 E1_H02W0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0103 E1_H02W0201 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0501 arc: A2 S1_V02N0501 arc: A5 H02W0701 arc: A6 V00T0100 arc: B0 V01N0001 arc: B3 V02N0101 arc: B5 V02N0701 arc: B6 V00B0000 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C5 V01N0101 arc: C6 V00B0100 arc: CE0 H00R0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 H01E0101 arc: D2 V00B0100 arc: D3 V00B0100 arc: D5 H02W0001 arc: D6 H02W0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M2 V00T0000 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: V01S0000 Q0 arc: W1_H02W0601 Q4 word: SLICEB.K0.INIT 1111000010101010 word: SLICEB.K1.INIT 1111110011001100 word: SLICEC.K1.INIT 0101111100010011 word: SLICEA.K0.INIT 1111001100110011 word: SLICED.K0.INIT 0101111100010011 word: SLICEA.K1.INIT 1010000011111111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C52:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 V06N0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 E1_H02W0201 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 W1_H02E0601 arc: V00B0100 W1_H02E0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: A0 S1_V02N0701 arc: A1 W1_H02E0701 arc: A7 W1_H02E0701 arc: B1 V00B0000 arc: B2 W1_H02E0101 arc: B4 W1_H02E0301 arc: B7 S1_V02N0701 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0601 arc: C7 V02N0001 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 H01E0101 arc: D4 H00R0100 arc: D7 V02N0401 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 E1_H02W0601 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: S1_V02S0601 Q4 arc: V00T0000 F0 arc: V01S0000 Q4 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1110110011101100 word: SLICEB.K0.INIT 1100000011111111 word: SLICED.K1.INIT 0011000111110101 word: SLICEC.K0.INIT 1100110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 .tile R5C53:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 V06N0203 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 W1_H02E0201 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 S3_V06N0303 arc: V00B0000 V02N0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0201 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 S3_V06N0203 arc: A0 H02E0701 arc: A1 H02E0501 arc: A6 H00L0000 arc: B6 H02E0301 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 V02N0401 arc: C3 S1_V02N0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V00B0100 arc: D2 V00T0100 arc: D3 V02N0201 arc: D6 V02S0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E1_H02E0201 Q0 arc: E3_H06E0003 F3 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: H01W0100 F3 arc: LSR0 V00B0000 arc: LSR1 H02W0501 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q6 arc: S1_V02S0701 Q5 arc: V00T0100 Q1 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W1_H02W0101 F3 arc: W3_H06W0303 Q5 word: SLICED.K0.INIT 1011101110001000 word: SLICEA.K0.INIT 1010000011111111 word: SLICEA.K1.INIT 1010000011111111 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 0000000000001111 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 .tile R5C54:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 V06S0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 H01E0001 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0101 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0303 H01E0101 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V06N0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 V02N0601 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0303 arc: A0 F5 arc: A1 F5 arc: A4 S1_V02N0101 arc: A5 S1_V02N0301 arc: A6 H00R0000 arc: A7 H02E0701 arc: B0 E1_H02W0301 arc: B4 V01S0000 arc: B5 V02N0501 arc: B6 V01S0000 arc: B7 H02E0301 arc: C0 F4 arc: C1 F4 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 Q4 arc: C5 V00B0100 arc: C6 E1_H02W0401 arc: C7 E1_H01E0101 arc: CE1 S1_V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0201 arc: D2 H02E0201 arc: D3 W1_H02E0001 arc: D4 H02W0001 arc: D5 S1_V02N0401 arc: D6 H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q4 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 H02W0601 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: S1_V02S0001 F0 arc: S1_V02S0301 Q3 arc: S1_V02S0601 F6 arc: V00B0000 Q6 arc: V01S0000 Q6 arc: V01S0100 Q3 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1111000000000000 word: SLICED.K1.INIT 0011001000010000 word: SLICED.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 0010000000101010 word: SLICEC.K0.INIT 0000000000100111 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1111101011111111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R5C55:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0203 V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00L0000 W1_H02E0001 arc: H00R0000 W1_H02E0401 arc: H00R0100 E1_H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02S0001 arc: V00T0000 E1_H02W0001 arc: V00T0100 W1_H02E0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 S3_V06N0303 arc: A1 H02E0501 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A4 V00T0100 arc: A5 S1_V02N0101 arc: A6 S1_V02N0101 arc: A7 S1_V02N0101 arc: B0 S1_V02N0301 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 H00R0000 arc: B5 V01S0000 arc: B6 N1_V02S0501 arc: B7 V00T0000 arc: C0 V02S0401 arc: C1 V02S0401 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C4 V01N0101 arc: C6 S1_V02N0001 arc: C7 V01N0101 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: D3 E1_H02W0001 arc: D4 V01N0001 arc: D5 V00B0000 arc: D6 V01N0001 arc: D7 V02N0601 arc: E1_H01E0001 Q7 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 H02E0601 arc: M2 V00B0100 arc: M3 H00L0000 arc: M5 W1_H02E0001 arc: M7 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q3 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q7 arc: S1_V02S0601 F4 arc: V00B0100 F5 arc: V01S0000 Q5 arc: V01S0100 F4 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111101010101010 word: SLICEC.K1.INIT 0001000110111011 word: SLICEB.K0.INIT 1110001011111111 word: SLICEB.K1.INIT 1011100000000000 word: SLICEC.K0.INIT 0000100001001100 word: SLICED.K0.INIT 0000000100001011 word: SLICED.K1.INIT 0000100001001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R5C56:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 V06N0303 arc: H00L0100 N1_V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 S3_V06N0203 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 S3_V06N0303 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0701 arc: A1 V02N0701 arc: A2 F5 arc: A3 F7 arc: A4 S1_V02N0301 arc: A5 N1_V01N0101 arc: A7 E1_H01W0000 arc: B1 F3 arc: B2 E1_H02W0301 arc: B3 H02W0301 arc: B4 H00L0000 arc: B5 N1_V01S0000 arc: B7 H02E0101 arc: C0 N1_V01N0001 arc: C1 E1_H02W0601 arc: C2 N1_V01S0100 arc: C3 H02W0601 arc: C4 S1_V02N0001 arc: C5 E1_H01E0101 arc: C7 V00T0100 arc: CE0 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0201 arc: D2 H02E0001 arc: D3 V02S0201 arc: D4 H00L0100 arc: D5 H02W0001 arc: D7 E1_H01W0100 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q0 arc: LSR0 E1_H02W0501 arc: LSR1 H02E0501 arc: M5 H00R0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: V01S0100 F1 arc: W3_H06W0203 F4 word: SLICEC.K1.INIT 0000000011100100 word: SLICEB.K0.INIT 1111101111001000 word: SLICEC.K0.INIT 1101000010000000 word: SLICEA.K0.INIT 1111101010101010 word: SLICED.K1.INIT 0000111000000010 word: SLICEB.K1.INIT 1111101100000000 word: SLICEA.K1.INIT 1111010000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C57:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 S1_V02N0201 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 N1_V02S0701 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 V06N0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0701 arc: A1 F5 arc: A2 V01N0101 arc: A3 V02N0701 arc: A4 F7 arc: A5 Q5 arc: A6 E1_H01W0000 arc: B0 V00B0000 arc: B1 H02W0301 arc: B3 H01W0100 arc: B4 H02W0301 arc: B5 H02W0101 arc: B6 E1_H02W0301 arc: B7 N1_V01S0000 arc: C0 V02N0401 arc: C1 F4 arc: C2 H00L0000 arc: C3 H02E0601 arc: C4 S1_V02N0001 arc: C5 S1_V02N0201 arc: C6 E1_H01E0101 arc: C7 H02W0401 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F0 arc: D2 Q2 arc: D3 V02N0001 arc: D4 F2 arc: D5 V02N0401 arc: D6 S1_V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q6 arc: LSR0 V00B0100 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M2 V00T0000 arc: M5 H02E0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: V01S0000 F1 arc: V01S0100 Q5 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0101000001011111 word: SLICED.K1.INIT 0011001100001111 word: SLICEA.K0.INIT 0000101100001000 word: SLICEC.K1.INIT 1010110000000000 word: SLICEC.K0.INIT 0010001100100000 word: SLICEA.K1.INIT 0000111100001011 word: SLICEB.K1.INIT 0101000000110000 word: SLICED.K0.INIT 1110001000000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C58:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 V06N0203 arc: H00L0000 N1_V02S0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02N0001 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0103 V06N0103 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00R0000 arc: A2 H02W0701 arc: A3 V00T0000 arc: A4 V00B0000 arc: A5 V02N0301 arc: A6 N1_V01S0100 arc: A7 N1_V01N0101 arc: B0 N1_V02S0101 arc: B2 V02S0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02S0701 arc: B6 F3 arc: B7 H02E0301 arc: C0 W1_H02E0401 arc: C2 F4 arc: C3 V02S0601 arc: C4 N1_V02S0201 arc: C5 V02S0201 arc: C6 E1_H01E0101 arc: C7 V00B0100 arc: CE0 S1_V02N0201 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D2 F0 arc: D3 H02E0001 arc: D4 V02S0601 arc: D5 N1_V02S0401 arc: D6 S1_V02N0601 arc: D7 H02E0201 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F7 arc: E1_H02E0301 Q3 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 H01E0001 arc: M1 H00R0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q4 arc: S1_V02S0601 F6 arc: V00B0100 Q7 arc: V01S0000 Q3 arc: W1_H02W0101 Q1 arc: W1_H02W0701 F5 word: SLICED.K1.INIT 0000000011100010 word: SLICEB.K1.INIT 1000100010100000 word: SLICED.K0.INIT 1111110010101010 word: SLICEA.K0.INIT 1110111011111100 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0010000001110000 word: SLICEB.K0.INIT 0011001011111110 word: SLICEC.K1.INIT 0001101100000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C59:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00R0100 W1_H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H01E0001 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 V01N0001 arc: V00B0000 S1_V02N0201 arc: V00B0100 V02N0101 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 E1_H02W0201 arc: W3_H06W0103 E3_H06W0103 arc: A0 W1_H02E0701 arc: A4 H02E0701 arc: A6 E1_H02W0701 arc: A7 W1_H02E0701 arc: B0 H02E0301 arc: B2 H00R0000 arc: B4 E1_H02W0101 arc: B6 V00T0000 arc: B7 V00B0000 arc: C0 N1_V02S0401 arc: C2 E1_H01W0000 arc: C4 Q4 arc: C6 V01N0101 arc: C7 H02E0601 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 V02N0201 arc: D4 E1_H02W0001 arc: D6 E1_H01W0100 arc: D7 H02W0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q4 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F0 arc: V00T0000 F2 arc: V01S0000 F6 arc: W1_H02W0701 F7 word: SLICEC.K0.INIT 1011100000000000 word: SLICEB.K0.INIT 0000000000000011 word: SLICED.K0.INIT 1111111001010100 word: SLICED.K1.INIT 0001000100000011 word: SLICEA.K0.INIT 1100000010100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C5:PLC2 arc: W3_H06W0303 E3_H06W0303 .tile R5C60:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 E1_H02W0601 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 N1_V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E1_H02W0301 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H01E0001 arc: A2 H01E0001 arc: A3 V02N0501 arc: A4 F5 arc: A5 V00T0000 arc: A6 S1_V02N0101 arc: A7 H02W0501 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 S1_V02N0301 arc: B3 H02W0101 arc: B4 V01S0000 arc: B5 V00B0100 arc: B6 V00T0000 arc: B7 H01E0101 arc: C0 E1_H01W0000 arc: C1 N1_V01N0001 arc: C2 H02E0601 arc: C3 S1_V02N0601 arc: C4 E1_H02W0401 arc: C5 N1_V02S0201 arc: C6 S1_V02N0001 arc: C7 H02E0401 arc: CE1 H02E0101 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 S1_V02N0201 arc: D3 H02E0001 arc: D4 H02E0201 arc: D5 H02W0201 arc: D6 H00R0100 arc: D7 H02W0201 arc: E1_H01E0001 F3 arc: E1_H01E0101 F2 arc: E1_H02E0001 Q2 arc: E1_H02E0501 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 F6 arc: H01W0100 F0 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0301 arc: M0 H02W0601 arc: M2 E1_H02W0601 arc: M5 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F3 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V01S0000 F7 arc: V01S0100 F4 word: SLICEB.K0.INIT 0100010000001100 word: SLICEB.K1.INIT 0000110001000100 word: SLICEA.K0.INIT 1110111011110000 word: SLICEA.K1.INIT 1111110011111111 word: SLICED.K0.INIT 0000110100001000 word: SLICEC.K1.INIT 0000101000001100 word: SLICED.K1.INIT 1000100010100000 word: SLICEC.K0.INIT 1111000011100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C61:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 W1_H02E0301 arc: H00R0000 E1_H02W0601 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 E3_H06W0203 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H01W0100 arc: A0 F7 arc: A2 E1_H01E0001 arc: A3 H02E0501 arc: A4 S1_V02N0101 arc: A5 Q5 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B0 F3 arc: B1 F3 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 V00B0100 arc: B5 V01S0000 arc: B6 V02S0701 arc: B7 H02E0301 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H00L0000 arc: C3 H00L0100 arc: C4 S1_V02N0001 arc: C5 E1_H01E0101 arc: C6 V00T0100 arc: C7 V00T0100 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 E1_H02W0201 arc: D3 H02E0001 arc: D4 H00R0100 arc: D5 V02S0401 arc: D6 W1_H02E0001 arc: D7 H02E0201 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q2 arc: E1_H02E0301 Q1 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0100 Q5 arc: H01W0000 F6 arc: H01W0100 Q7 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M1 H02W0001 arc: M2 H02W0601 arc: M5 H02W0001 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: V00B0100 Q7 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0100 F0 arc: W1_H02W0601 F4 word: SLICEB.K0.INIT 0001000100000011 word: SLICED.K1.INIT 0100010000001100 word: SLICEB.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1111111111111100 word: SLICED.K0.INIT 0000010100010001 word: SLICEC.K0.INIT 0010000000101010 word: SLICEC.K1.INIT 0000000010111000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C62:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0601 arc: H00L0100 V02N0101 arc: H00R0100 H02E0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02W0001 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 V01N0001 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0501 arc: A2 V02N0701 arc: A7 W1_H02E0701 arc: B0 E1_H02W0101 arc: B2 E1_H02W0301 arc: B7 H02E0301 arc: C0 H00R0100 arc: C2 H02E0401 arc: C7 V00B0100 arc: CE1 H00L0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 N1_V01S0000 arc: D7 H02E0201 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 V00T0000 arc: M4 V00B0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: V01S0000 F0 arc: V01S0100 F7 arc: W3_H06W0103 Q2 word: SLICEB.K0.INIT 1000100011111000 word: SLICED.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 0101010101010001 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ .tile R5C63:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S3_V06N0303 arc: E3_H06E0103 H01E0101 arc: H00L0100 W1_H02E0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0001 H02E0001 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: V00B0000 V02S0001 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0701 arc: B0 E1_H01W0100 arc: C4 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D4 V02N0401 arc: E1_H01E0101 Q6 arc: E1_H02E0701 Q7 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M2 V00B0000 arc: M3 H00L0100 arc: M6 E1_H02W0401 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q2 arc: V00T0000 Q0 arc: V01S0100 Q3 word: SLICEA.K0.INIT 1011101100110011 word: SLICEC.K0.INIT 1111000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R5C64:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0501 arc: H00R0000 H02E0401 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H02E0401 arc: V00B0000 E1_H02W0401 arc: V00B0100 V02N0101 arc: V00T0000 V02N0601 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 S3_V06N0303 arc: A2 V01N0101 arc: A5 V02N0101 arc: A7 E1_H02W0701 arc: B0 V00B0000 arc: B1 V02N0101 arc: B4 V02N0701 arc: B5 E1_H02W0301 arc: B7 E1_H02W0301 arc: C0 E1_H02W0601 arc: C1 E1_H02W0601 arc: C2 H00R0100 arc: C4 E1_H01E0101 arc: C5 E1_H02W0401 arc: C7 V00B0100 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02N0201 arc: D2 V02N0001 arc: D5 E1_H02W0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 F5 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: V01S0000 Q4 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111111000000 word: SLICED.K1.INIT 0100110001011111 word: SLICEB.K0.INIT 1010111100001111 word: SLICEC.K1.INIT 0100110001011111 word: SLICEC.K0.INIT 1100000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 .tile R5C65:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W1_H02E0601 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 W1_H02E0401 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 H01E0001 arc: W3_H06W0103 S3_V06N0103 arc: A0 H02W0701 arc: A5 H02W0501 arc: B0 H02E0101 arc: B1 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B5 H02E0101 arc: C0 H00R0100 arc: C1 H00R0100 arc: C2 E1_H02W0401 arc: C3 V02N0401 arc: C5 V02N0001 arc: CE0 W1_H02E0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D2 V00B0100 arc: D3 E1_H02W0001 arc: D5 E1_H01W0100 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00R0100 Q5 arc: H01W0100 Q5 arc: LSR1 H02E0301 arc: M0 H02E0601 arc: M1 V01S0100 arc: M2 H02E0601 arc: M4 V00B0000 arc: M5 E1_H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q1 arc: N1_V02N0401 Q4 arc: S1_V02S0701 F5 arc: V01S0100 F0 arc: W1_H02W0201 F2 arc: W1_H02W0501 Q5 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111110011110000 word: SLICEA.K0.INIT 1110001011100010 word: SLICEA.K1.INIT 1111111111000000 word: SLICEC.K1.INIT 0111000001110111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R5C66:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 S1_V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 H02E0501 arc: V00B0000 V02N0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A4 V02S0301 arc: A5 V02N0301 arc: B0 V02S0101 arc: B1 V00T0000 arc: B4 V02S0701 arc: B5 W1_H02E0101 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C4 V00T0100 arc: C5 E1_H01E0101 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D4 V00B0000 arc: D5 V02S0401 arc: E1_H01E0001 Q6 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q2 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00R0100 Q7 arc: H01W0000 Q1 arc: H01W0100 Q6 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0301 arc: M0 W1_H02E0601 arc: M1 H00L0000 arc: M2 H02W0601 arc: M3 H02E0201 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: N1_V02N0301 Q3 arc: S1_V02S0201 Q2 arc: S1_V02S0701 F5 arc: V00B0100 Q5 arc: V00T0000 Q2 arc: V01S0000 F0 arc: V01S0100 F4 arc: W1_H02W0501 Q7 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111110011001100 word: SLICEC.K1.INIT 0010101000111111 word: SLICEC.K0.INIT 0011111100010101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C67:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 H02W0601 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 V01N0001 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 V01N0001 arc: W3_H06W0203 E3_H06W0103 arc: A2 H02W0701 arc: B0 N1_V02S0301 arc: B2 H00L0000 arc: B3 H00L0000 arc: C0 N1_V01S0100 arc: C1 V02N0401 arc: C2 W1_H02E0401 arc: C3 W1_H02E0401 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE2 H02E0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 V02N0201 arc: D3 E1_H02W0201 arc: E1_H01E0101 Q6 arc: E1_H02E0001 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q4 arc: H01W0100 F2 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M1 H00R0000 arc: M2 V00B0000 arc: M3 H01W0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q1 arc: N1_V02N0101 Q1 arc: S1_V02S0101 Q3 arc: S3_V06S0003 F0 arc: V01S0100 Q7 arc: W3_H06W0003 Q3 word: SLICEA.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 1111000011110000 word: SLICEB.K0.INIT 0010001000110000 word: SLICEB.K1.INIT 0000000000110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R5C68:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0001 arc: H00R0000 H02E0401 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0401 N1_V02S0401 arc: S1_V02S0601 N1_V01S0000 arc: S3_V06S0003 H06E0003 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 E1_H02W0601 arc: A0 V02S0701 arc: A6 V00T0100 arc: A7 Q7 arc: B0 N1_V02S0301 arc: B6 E1_H02W0101 arc: B7 E1_H02W0101 arc: C6 W1_H02E0601 arc: C7 W1_H02E0601 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D6 H00R0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F6 F5D_SLICE arc: H00R0100 Q7 arc: H01W0000 Q4 arc: H01W0100 F6 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0000 arc: M2 H02W0601 arc: M3 H01W0100 arc: M4 V00B0100 arc: M5 W1_H02E0001 arc: M6 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q2 arc: S1_V02S0001 F0 arc: S1_V02S0201 F0 arc: V01S0000 F0 arc: V01S0100 Q0 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 1011101110001000 word: SLICED.K0.INIT 0000101100001000 word: SLICED.K1.INIT 0000001000000010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C69:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 W1_H02E0101 arc: H00R0000 W1_H02E0401 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0601 E1_H01W0000 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 H01E0001 arc: S3_V06S0103 H01E0101 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0701 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0701 S3_V06N0203 arc: A0 H00L0100 arc: A4 V00B0000 arc: A5 V00B0000 arc: B0 H02W0301 arc: B1 V02S0101 arc: B4 H02W0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C4 V02N0201 arc: C5 V02N0201 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00T0100 arc: D4 H00L0100 arc: D5 H00L0100 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: LSR0 H02E0301 arc: M0 V00B0100 arc: M4 H02W0401 arc: M7 H02W0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: W1_H02W0601 F4 arc: W3_H06W0003 F0 arc: W3_H06W0203 Q7 word: SLICEA.K0.INIT 0100010101000000 word: SLICEA.K1.INIT 0000000000001100 word: SLICEC.K0.INIT 0000000011001010 word: SLICEC.K1.INIT 0000000000001010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R5C70:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W1_H02E0401 arc: H00L0100 V02N0301 arc: H00R0100 S1_V02N0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 V01N0101 arc: V00B0000 H02E0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 V01N0001 arc: A0 H00L0100 arc: A7 F5 arc: B0 V02N0101 arc: B1 V02N0101 arc: B3 E1_H01W0100 arc: B5 E1_H02W0101 arc: B7 F3 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C3 E1_H01W0000 arc: C5 E1_H02W0601 arc: C7 V02S0001 arc: D0 V02N0001 arc: D1 V02N0001 arc: D3 V00T0100 arc: D5 H00R0100 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: M0 V00B0100 arc: V00B0100 F7 arc: W1_H02W0201 F0 word: SLICEC.K1.INIT 0000001100000000 word: SLICEB.K1.INIT 0000000000000011 word: SLICED.K1.INIT 1110111000001111 word: SLICEA.K0.INIT 0000000010111000 word: SLICEA.K1.INIT 0000000000110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R5C71:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00R0100 V02S0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 W3_H06E0103 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0101 arc: V00T0100 V02S0701 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: A0 H00R0000 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 V02N0501 arc: A4 V00B0000 arc: A5 H02W0501 arc: A6 S1_V02N0301 arc: B0 V02S0301 arc: B1 H02W0301 arc: B2 H00R0000 arc: B3 Q3 arc: B4 V01S0000 arc: B5 V02N0501 arc: B6 V00T0000 arc: C0 V02N0401 arc: C1 V02S0401 arc: C2 N1_V02S0401 arc: C3 E1_H02W0401 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C6 Q6 arc: CE0 H00L0000 arc: CE1 N1_V02S0201 arc: CE2 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F0 arc: D2 H02W0001 arc: D3 V02N0001 arc: D4 W1_H02E0201 arc: D5 N1_V02S0401 arc: D6 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00R0000 Q6 arc: H01W0000 F5 arc: H01W0100 F2 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M3 H00R0100 arc: M4 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 F1 arc: N1_V02N0401 F6 arc: V00T0000 Q0 arc: V01S0000 Q3 arc: V01S0100 Q4 word: SLICED.K0.INIT 0000101000100010 word: SLICEC.K0.INIT 0000000000011011 word: SLICEB.K0.INIT 1100101000000000 word: SLICEC.K1.INIT 0100010001010000 word: SLICEA.K0.INIT 1000110010000000 word: SLICEB.K1.INIT 0000000010101100 word: SLICEA.K1.INIT 1100110011001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C72:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0001 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 V01N0101 arc: V00B0100 V02S0301 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0501 V02N0501 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0501 arc: A1 E1_H02W0501 arc: A2 E1_H01E0001 arc: A3 F7 arc: A4 E1_H02W0501 arc: A5 H02E0701 arc: A6 F5 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H00L0000 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 V01S0000 arc: B7 V00T0000 arc: C0 V02N0401 arc: C1 V02N0601 arc: C2 S1_V02N0601 arc: C3 V02S0601 arc: C4 V02N0001 arc: C5 S1_V02N0201 arc: C6 H02E0401 arc: C7 H02W0401 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V02N0001 arc: D2 S1_V02N0201 arc: D3 V00T0100 arc: D4 H02W0201 arc: D5 S1_V02N0601 arc: D6 F2 arc: D7 H02E0001 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q1 arc: LSR0 W1_H02E0301 arc: LSR1 E1_H02W0301 arc: M1 H00L0100 arc: M2 V00B0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q5 arc: V00T0000 Q2 arc: V01S0000 Q5 arc: V01S0100 F0 arc: W1_H02W0101 F1 arc: W1_H02W0301 F3 arc: W1_H02W0601 F4 word: SLICEC.K1.INIT 0000001100000101 word: SLICEB.K0.INIT 0101001100000000 word: SLICED.K0.INIT 0000000001010000 word: SLICEC.K0.INIT 1110000001000000 word: SLICEA.K1.INIT 0000000011100100 word: SLICEA.K0.INIT 0000000010101100 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K1.INIT 1110000011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C73:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 S3_V06N0303 arc: V00B0100 S1_V02N0301 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E1_H01W0100 arc: A0 H02W0501 arc: A3 H02W0501 arc: A4 F5 arc: B0 H01W0100 arc: B2 S1_V02N0101 arc: B3 Q3 arc: B4 V02N0501 arc: B5 F3 arc: C0 S1_V02N0401 arc: C2 V02N0601 arc: C3 S1_V02N0401 arc: C4 V02S0201 arc: C5 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 F0 arc: D3 V02N0201 arc: D4 F2 arc: D5 S1_V02N0601 arc: E1_H01E0001 Q4 arc: E1_H02E0101 Q3 arc: E1_H02E0201 Q0 arc: E1_H02E0501 Q7 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 F4 arc: H01W0100 Q7 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M3 H00L0100 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V01S0000 Q4 word: SLICEA.K0.INIT 0000110100001000 word: SLICEB.K1.INIT 0000111000000100 word: SLICEC.K1.INIT 0000001100000000 word: SLICEB.K0.INIT 0000000000000011 word: SLICEC.K0.INIT 1100111110001011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C74:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02E0401 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0203 H06E0203 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0401 H06E0203 arc: S3_V06S0003 H06E0003 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0203 E3_H06W0103 arc: A0 F5 arc: A1 F5 arc: A2 V02N0501 arc: A3 V00B0000 arc: A4 S1_V02N0301 arc: A5 V00T0000 arc: A6 H00L0000 arc: A7 H02E0501 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 H02E0101 arc: B3 S1_V02N0101 arc: B4 H02E0101 arc: B5 S1_V02N0701 arc: B6 V02S0501 arc: B7 V02N0501 arc: C0 F4 arc: C2 V02N0601 arc: C3 E1_H01W0000 arc: C4 H01E0001 arc: C5 V00T0100 arc: C6 H02W0401 arc: C7 H02E0401 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 H00R0000 arc: D3 F0 arc: D4 S1_V02N0401 arc: D5 S1_V02N0401 arc: D6 E1_H01W0100 arc: D7 H02E0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0100 F3 arc: M0 E1_H02W0601 arc: S1_V02S0701 F7 arc: V01S0000 F6 word: SLICEC.K0.INIT 0000000000011011 word: SLICEC.K1.INIT 0000000000011101 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111101110 word: SLICEB.K1.INIT 0000010010001100 word: SLICED.K1.INIT 0010001100100000 word: SLICEB.K0.INIT 0101000001000100 word: SLICED.K0.INIT 1100110010001100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R5C75:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 H02W0701 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 H01E0101 arc: A0 H02E0701 arc: A3 S1_V02N0501 arc: A4 V00B0000 arc: A6 H00R0000 arc: B0 V02S0101 arc: B1 V02S0301 arc: B3 Q3 arc: B4 V02S0701 arc: B6 V01S0000 arc: C0 N1_V01S0100 arc: C1 N1_V01S0100 arc: C3 N1_V01N0001 arc: C4 W1_H02E0401 arc: C6 V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H01E0101 arc: D3 V00B0100 arc: D4 V02N0601 arc: D6 V02N0401 arc: E1_H01E0001 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00R0000 Q4 arc: H01W0000 F0 arc: H01W0100 F4 arc: LSR0 E1_H02W0301 arc: M0 V00T0000 arc: M3 H00L0100 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: V00B0000 Q4 arc: V01S0000 Q3 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 1111111001010100 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K1.INIT 0001101100000000 word: SLICED.K0.INIT 1010000011000000 word: SLICEC.K0.INIT 1000110010000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C76:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 W1_H02E0001 arc: H00R0000 W1_H02E0601 arc: H00R0100 N1_V02S0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02W0701 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: A0 E1_H01E0001 arc: A3 W1_H02E0501 arc: A5 Q5 arc: A7 H02W0501 arc: B0 H02E0101 arc: B3 H01W0100 arc: B5 V00B0100 arc: B7 H02E0301 arc: C0 S1_V02N0401 arc: C3 V02N0401 arc: C5 S1_V02N0201 arc: C7 V00B0100 arc: CE0 W1_H02E0101 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D3 V00B0100 arc: D5 S1_V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 Q3 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q5 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 H02E0601 arc: M3 H00L0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: V00B0100 Q7 arc: V01S0000 F3 arc: V01S0100 Q0 arc: W1_H02W0001 F0 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0100000001001100 word: SLICEC.K1.INIT 0000001100000101 word: SLICEB.K1.INIT 0000111000000100 word: SLICED.K1.INIT 0101000001000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C77:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 N1_V02S0101 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 E1_H02W0501 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 W3_H06E0203 arc: CE0 H00R0100 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q1 arc: H01W0100 Q1 arc: LSR1 H02W0301 arc: M1 H02W0001 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C78:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0401 H06E0203 arc: V00B0000 E1_H02W0401 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 E1_H02W0201 arc: A0 F7 arc: A1 F7 arc: A2 V02N0701 arc: A3 H01E0001 arc: A4 E1_H02W0501 arc: A5 Q5 arc: A6 W1_H02E0701 arc: A7 V00T0100 arc: B0 F3 arc: B2 W1_H02E0301 arc: B3 Q3 arc: B4 E1_H02W0101 arc: B5 S1_V02N0501 arc: B6 V02S0701 arc: B7 V01S0000 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 N1_V01N0001 arc: C3 W1_H02E0601 arc: C4 S1_V02N0001 arc: C5 V01N0101 arc: C6 H02E0601 arc: C7 H02E0401 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 N1_V02S0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 V02N0201 arc: D3 W1_H02E0201 arc: D4 F0 arc: D5 H02E0201 arc: D6 H01W0000 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q7 arc: E1_H02E0201 F2 arc: E1_H02E0401 F6 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: LSR0 V00B0000 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: V00B0100 F5 arc: V00T0100 Q1 arc: V01S0000 Q7 arc: W3_H06W0203 F4 word: SLICEC.K1.INIT 0001110100000000 word: SLICEB.K1.INIT 0000000001010011 word: SLICED.K1.INIT 0011000001010000 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 0001000010110000 word: SLICEB.K0.INIT 0000000011011000 word: SLICED.K0.INIT 0000101100001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C79:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 N1_V02S0701 arc: H00L0100 H02E0301 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 W1_H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: A0 F5 arc: A1 F5 arc: A2 W1_H02E0501 arc: A3 W1_H02E0501 arc: A4 H02E0701 arc: A5 Q5 arc: A6 H02E0701 arc: A7 N1_V01S0100 arc: B0 F3 arc: B1 F3 arc: B2 V02N0301 arc: B3 Q3 arc: B4 H02E0101 arc: B5 V00B0100 arc: B6 H02E0101 arc: B7 V01S0000 arc: C0 H00L0000 arc: C2 W1_H02E0401 arc: C3 N1_V01N0001 arc: C4 V00T0100 arc: C5 W1_H02E0401 arc: C6 V02N0201 arc: C7 H02E0401 arc: CE0 W1_H02E0101 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V02N0001 arc: D3 S1_V02N0201 arc: D4 V02N0601 arc: D5 W1_H02E0001 arc: D6 S1_V02N0401 arc: D7 H00R0100 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F0 arc: E1_H02E0401 F6 arc: E1_H02E0501 Q5 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: LSR0 H02W0301 arc: LSR1 V00T0000 arc: M0 H02W0601 arc: M1 H02E0001 arc: M3 H00L0100 arc: M5 H02E0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q7 arc: S1_V02S0301 Q3 arc: V00B0100 Q7 arc: V01S0000 F4 arc: V01S0100 F7 word: SLICEB.K0.INIT 0000000100001011 word: SLICEC.K1.INIT 0000001100000101 word: SLICEB.K1.INIT 0010011100000000 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111101110 word: SLICED.K0.INIT 1100000010100000 word: SLICEC.K0.INIT 1100000010100000 word: SLICED.K1.INIT 1010100010101010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C80:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 V01N0101 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 W1_H02E0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0501 H02E0501 arc: S1_V02S0101 V01N0101 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H06E0203 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0701 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: A0 H02E0501 arc: A1 F7 arc: A2 N1_V02S0701 arc: A4 N1_V02S0101 arc: A5 V02N0301 arc: A6 F5 arc: A7 N1_V02S0101 arc: B0 V02S0301 arc: B1 V00B0000 arc: B2 H00R0000 arc: B3 H02W0101 arc: B5 V02N0501 arc: B6 V00T0000 arc: C0 N1_V01S0100 arc: C1 F4 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 S1_V02N0001 arc: C5 H01E0001 arc: C6 H02E0601 arc: C7 H02E0401 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 N1_V01S0000 arc: D2 V02N0001 arc: D3 V00B0100 arc: D4 F2 arc: D5 V02S0601 arc: D6 F0 arc: D7 W1_H02E0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR1 H02W0301 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: S1_V02S0301 Q3 arc: W3_H06W0103 F1 word: SLICEB.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000111000000100 word: SLICED.K1.INIT 0000000000001010 word: SLICEC.K0.INIT 0000000000000101 word: SLICEA.K1.INIT 1100100011111011 word: SLICEA.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 1011100000000000 word: SLICED.K0.INIT 1111000011100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R5C81:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0303 V06N0303 arc: H00L0000 V02N0201 arc: H00R0100 E1_H02W0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H01E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0103 H06E0103 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0301 E1_H02W0301 arc: A0 H02W0501 arc: A4 H02W0701 arc: B0 V02N0101 arc: B2 E1_H01W0100 arc: B3 V02N0101 arc: B5 H02E0301 arc: B6 V00B0000 arc: C2 H00L0000 arc: C3 E1_H02W0601 arc: C4 V02S0001 arc: C5 V00T0100 arc: C6 V00T0000 arc: CE0 S1_V02N0201 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D2 V02S0201 arc: D3 V02S0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 H02E0201 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0301 Q3 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: S1_V02S0201 Q2 arc: S3_V06S0303 Q6 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q3 word: SLICEA.K0.INIT 1010101011001100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1010101011110000 word: SLICED.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C82:PLC2 arc: H00R0000 H02E0401 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0701 H02E0701 arc: V00T0000 H02E0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V02N0601 arc: A2 W1_H02E0501 arc: A7 H00R0000 arc: B0 H02E0101 arc: B3 H02E0301 arc: B4 V02N0501 arc: B5 H01E0101 arc: B6 V00T0000 arc: E1_H01E0001 F3 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 F6 arc: V01S0000 F7 arc: W1_H02W0701 F5 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C83:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W3_H06E0003 arc: H00R0000 S1_V02N0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: N3_V06N0003 S3_V06N0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 W1_H02E0601 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 arc: A0 S1_V02N0701 arc: A1 W1_H02E0701 arc: A2 V00B0000 arc: A3 W1_H02E0501 arc: A6 H00R0000 arc: B4 V02N0501 arc: B5 S1_V02N0501 arc: B7 V00T0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F6 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0701 F7 arc: V01S0000 F3 arc: W1_H02W0101 F1 arc: W1_H02W0201 F2 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C84:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: H00R0000 V02S0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0101 W3_H06E0103 arc: V00T0000 E1_H02W0001 arc: A1 E1_H02W0701 arc: A2 H02W0501 arc: A5 E1_H01W0000 arc: A6 H02W0701 arc: B0 E1_H01W0100 arc: B3 H00R0000 arc: B4 E1_H02W0301 arc: B7 V00T0000 arc: E1_H01E0001 F5 arc: E1_H01E0101 F6 arc: E1_H02E0301 F1 arc: E1_H02E0401 F4 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: N1_V01N0001 F3 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R5C85:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0601 arc: H00L0100 H02W0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 V01N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0601 H02W0601 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02N0601 arc: W1_H02W0201 S1_V02N0201 arc: A7 W1_H02E0701 arc: B0 E1_H01W0100 arc: B4 H02W0101 arc: B5 H01E0101 arc: B6 W1_H02E0101 arc: C4 V00T0000 arc: C5 V02N0201 arc: C6 H01E0001 arc: C7 H02W0601 arc: CE0 H02E0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 W1_H02E0001 arc: D5 H00L0100 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: E1_H02E0501 Q7 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0301 arc: M0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q0 arc: S1_V02S0401 Q6 arc: S1_V02S0701 Q5 arc: W1_H02W0501 Q7 arc: W1_H02W0701 Q5 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1100110011110000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1010101011110000 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C86:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02E0601 arc: H00R0100 H02E0701 arc: H01W0000 W3_H06E0103 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0201 W1_H02E0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0601 W3_H06E0303 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 W1_H02E0501 arc: B3 V02N0301 arc: B4 V02N0501 arc: B7 W1_H02E0301 arc: C0 N1_V01N0001 arc: C1 E1_H02W0401 arc: C2 W1_H02E0601 arc: C3 W1_H02E0401 arc: C4 H01E0001 arc: C7 V02N0201 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H01E0101 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 E1_H02W0001 arc: D7 E1_H02W0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 H02E0301 arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: S1_V02S0001 Q2 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0401 Q4 arc: V01S0000 Q0 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 1111101001010000 word: SLICEA.K1.INIT 1111010110100000 word: SLICEB.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEC.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1100110011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C87:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V02N0601 arc: H00R0000 V02S0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H01E0101 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0601 W3_H06E0303 arc: A2 W1_H02E0501 arc: B0 H02E0301 arc: C0 V02N0401 arc: C2 V02N0401 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 W1_H02E0201 arc: E1_H01E0101 Q5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H01W0000 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 V00T0000 arc: M5 H02E0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q0 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q5 arc: N1_V02N0701 Q5 arc: V01S0100 Q2 word: SLICEB.K0.INIT 1111101000001010 word: SLICEA.K0.INIT 1100111111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R5C88:PLC2 arc: H00R0000 S1_V02N0601 arc: H00R0100 V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0501 H02W0501 arc: V00B0100 H02W0501 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0401 V02N0401 arc: A0 V02N0501 arc: A1 V02N0501 arc: B0 H01W0100 arc: C0 V02S0401 arc: C1 V02S0401 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: F0 F5A_SLICE arc: H01W0100 Q5 arc: LSR0 V00T0100 arc: LSR1 H02E0501 arc: M0 H02E0601 arc: M2 V00T0000 arc: M5 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: S1_V02S0201 Q2 arc: V00T0000 F0 arc: V01S0000 Q2 word: SLICEA.K0.INIT 1110110010101111 word: SLICEA.K1.INIT 1010101010101111 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R60C87:PLC2 arc: V01S0100 N3_V06S0303 .tile R61C87:PLC2 arc: E1_H02E0501 N1_V01S0100 .tile R6C11:PLC2 arc: W3_H06W0203 E3_H06W0103 .tile R6C17:PLC2 arc: W3_H06W0103 E3_H06W0103 .tile R6C23:PLC2 arc: W3_H06W0103 E3_H06W0003 .tile R6C29:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: H00R0000 H02W0401 arc: N1_V02N0101 E1_H02W0101 arc: V00T0100 E1_H02W0101 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: LSR1 V00T0100 arc: M3 H02W0201 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: W3_H06W0003 Q3 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET SET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C2:PLC2 arc: S3_V06S0203 H06W0203 .tile R6C30:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: H00R0000 S1_V02N0401 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: W1_H02W0201 V02S0201 arc: A1 H00R0000 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 V00B0000 arc: B1 E1_H02W0301 arc: B2 E1_H02W0101 arc: B3 E1_H02W0301 arc: B5 H02E0101 arc: B6 E1_H02W0101 arc: B7 E1_H02W0101 arc: C0 S1_V02N0601 arc: C1 H00L0100 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C5 V00B0100 arc: C6 V02S0201 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V01S0100 arc: D2 N1_V02S0201 arc: D3 N1_V02S0201 arc: D5 V02S0401 arc: D6 H00L0100 arc: D7 H00L0100 arc: E1_H01E0101 F7 arc: E1_H02E0601 F4 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: M2 V00B0100 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q1 arc: N1_V02N0101 Q1 arc: V00T0000 F2 arc: V01S0100 Q0 arc: W1_H02W0401 F6 word: SLICEA.K0.INIT 0000111100000000 word: SLICEA.K1.INIT 1111111110111010 word: SLICEB.K0.INIT 1101000011011101 word: SLICEB.K1.INIT 1101000010001000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 1111100011110000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1100110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 .tile R6C31:PLC2 arc: E3_H06E0303 H01E0101 arc: N1_V02N0101 H01E0101 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0203 S3_V06N0103 arc: V00B0000 H02E0401 arc: V00B0100 H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: A4 V02S0301 arc: B1 Q1 arc: B2 V02S0301 arc: B3 V01N0001 arc: C0 V02N0601 arc: C2 N1_V02S0601 arc: C4 V01N0101 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 S1_V02N0201 arc: D3 V00B0100 arc: D4 N1_V02S0601 arc: E1_H01E0101 Q2 arc: E1_H02E0401 Q4 arc: E3_H06E0003 Q3 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q3 arc: S1_V02S0401 Q4 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000011110000 word: SLICEB.K0.INIT 1111110000000000 word: SLICEA.K1.INIT 0000000000110011 word: SLICEB.K1.INIT 0000000011001100 word: SLICEC.K0.INIT 1111000010100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C32:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W1_H02E0601 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0501 E3_H06W0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 E1_H02W0601 .tile R6C33:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02N0201 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0501 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 H02W0601 arc: V00B0000 H02E0401 arc: V00B0100 H02E0501 arc: V00T0100 S1_V02N0701 arc: A0 H02W0701 arc: A1 V02S0501 arc: B0 E1_H02W0301 arc: B1 V02S0301 arc: C0 S1_V02N0601 arc: C1 H02E0601 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V01S0000 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00B0000 arc: LSR1 H02E0301 arc: M2 V00T0100 arc: M3 H00R0100 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0001 Q2 arc: N1_V02N0301 Q3 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: S1_V02S0101 F1 arc: V00T0000 Q0 word: SLICEA.K0.INIT 1110101011111010 word: SLICEA.K1.INIT 0000000011010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C34:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0701 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 S1_V02N0601 arc: A0 H02E0501 arc: A1 F7 arc: A4 S1_V02N0101 arc: A6 H02W0501 arc: A7 E1_H02W0501 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 H02E0301 arc: B3 E1_H01W0100 arc: B4 E1_H02W0101 arc: B5 E1_H02W0301 arc: B6 V02N0701 arc: C0 F4 arc: C1 H02E0601 arc: C2 E1_H01W0000 arc: C3 V02N0601 arc: C5 V02N0201 arc: C6 V00T0000 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0001 arc: D2 E1_H02W0001 arc: D3 E1_H02W0001 arc: D4 V00B0000 arc: D5 E1_H02W0201 arc: D6 V01N0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0301 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q7 arc: H01W0100 Q7 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M4 V00T0100 arc: M6 H02E0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q4 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q7 arc: N3_V06N0303 Q6 arc: S1_V02S0301 Q3 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 Q4 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0000000010001000 word: SLICEA.K0.INIT 1111101011110010 word: SLICEC.K1.INIT 0000110000000000 word: SLICED.K1.INIT 0000101000000000 word: SLICEA.K1.INIT 1111101010111010 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K0.INIT 0000000000000001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C35:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0201 E3_H06W0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H06W0303 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02N0201 arc: W1_H02W0001 V01N0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 V01N0101 arc: A2 V00B0000 arc: B0 H02E0101 arc: B3 V01N0001 arc: B4 H02E0301 arc: B5 N1_V01S0000 arc: B6 V02N0701 arc: B7 H01E0101 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F4 arc: N1_V01N0001 F5 arc: S1_V02S0301 F3 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0011001100111100 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C36:PLC2 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02N0201 arc: V00T0000 V02N0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 V06S0103 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 N1_V02S0701 arc: A0 V02N0501 arc: A5 V00B0000 arc: A6 N1_V01S0100 arc: B1 H02E0101 arc: B2 V02N0101 arc: B3 V02S0301 arc: B4 N1_V01S0000 arc: B7 V00T0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F7 arc: N1_V01N0001 F4 arc: N1_V02N0301 F3 arc: N1_V02N0601 F6 arc: S1_V02S0001 F2 arc: S1_V02S0501 F5 arc: V01S0100 F0 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0011001100111100 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0101010101011010 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C37:PLC2 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 V02S0401 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H02W0601 arc: V00B0000 E1_H02W0401 arc: V00T0000 E1_H02W0201 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02S0501 arc: A1 H00R0000 arc: A3 V00T0000 arc: A4 H02W0701 arc: A5 E1_H01W0000 arc: B2 E1_H01W0100 arc: B6 E1_H02W0301 arc: B7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 F5 arc: E1_H02E0001 F2 arc: E1_H02E0101 F3 arc: E1_H02E0601 F4 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F0 arc: N1_V01N0101 F1 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0101010101011010 word: SLICEB.K0.INIT 0011001100111100 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0101010101011010 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C38:PLC2 arc: E1_H02E0201 H01E0001 arc: E1_H02E0701 S1_V02N0701 arc: H00R0000 H02E0601 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H06W0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 E1_H01W0000 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02W0701 arc: A4 W1_H02E0701 arc: A5 V00T0000 arc: A7 H00R0000 arc: B1 E1_H02W0301 arc: B5 V00B0100 arc: B6 H01E0101 arc: C4 H02W0601 arc: C5 E1_H01E0101 arc: C6 H02W0601 arc: C7 H02W0601 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D4 H02E0001 arc: D5 V00B0000 arc: D6 H02W0001 arc: D7 H02E0201 arc: E1_H01E0101 Q4 arc: E1_H02E0001 F0 arc: E1_H02E0301 F1 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0501 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: W1_H02W0701 Q7 word: SLICEC.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1100111111000000 word: SLICED.K1.INIT 1010111110100000 word: SLICEC.K0.INIT 1111101000001010 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C39:PLC2 arc: E1_H02E0201 V06S0103 arc: E1_H02E0601 V06S0303 arc: E3_H06E0303 V06S0303 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 E1_H01W0000 arc: N3_V06N0303 H06E0303 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 H06W0203 arc: V00B0100 H02E0501 arc: V00T0000 V02N0601 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0003 E3_H06W0303 arc: A1 H00L0100 arc: A3 V02N0701 arc: A6 W1_H02E0701 arc: B1 V02S0301 arc: B2 W1_H02E0101 arc: B4 H02E0301 arc: B5 V02S0501 arc: B6 S1_V02N0501 arc: C1 N1_V01N0001 arc: C2 V02N0601 arc: C3 V02N0401 arc: C4 V00T0000 arc: C5 V00T0000 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 V01S0100 arc: D2 V02S0201 arc: D3 H02E0201 arc: D4 H00R0100 arc: D5 H02E0001 arc: D6 V02N0601 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0100 F0 arc: LSR0 H02W0501 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q5 arc: V01S0100 Q6 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q6 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1100111111000000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEC.K1.INIT 1111110000001100 word: SLICED.K0.INIT 1010101011001100 word: SLICEB.K1.INIT 1111101001010000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C40:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0203 W1_H02E0701 arc: H00L0000 E1_H02W0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 V06S0003 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 V00T0000 arc: A6 N1_V01N0101 arc: A7 E1_H01W0000 arc: B4 H00R0000 arc: C0 V02S0401 arc: C1 H00L0000 arc: C2 H02E0601 arc: C4 H02W0401 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D4 V00B0000 arc: D6 H02E0201 arc: D7 H02E0201 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F5D_SLICE arc: H00R0000 Q4 arc: H01W0000 F0 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M6 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: V00T0000 Q2 arc: V01S0100 F6 word: SLICEC.K0.INIT 0011111100110000 word: SLICEA.K0.INIT 1010101011110000 word: SLICEA.K1.INIT 1111101011110000 word: SLICED.K0.INIT 1111000010101010 word: SLICED.K1.INIT 1111101010101010 word: SLICEB.K0.INIT 0101111101010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C41:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 V02N0301 arc: E1_H02E0701 V02S0701 arc: H00L0000 V02N0201 arc: H00R0000 E1_H02W0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02N0001 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 N1_V01S0100 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: A2 E1_H01E0001 arc: A3 H00L0100 arc: A4 N1_V01N0101 arc: A5 V00B0000 arc: A6 H00L0000 arc: A7 Q7 arc: B0 E1_H02W0301 arc: B2 V01N0001 arc: B3 V02N0101 arc: B4 H02E0301 arc: B5 V00B0100 arc: B6 V01S0000 arc: B7 V02N0701 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q2 arc: H00L0100 Q3 arc: H01W0000 Q2 arc: LSR0 H02E0501 arc: M2 V00T0000 arc: M3 E1_H02W0201 arc: M4 H02E0401 arc: M5 H02E0001 arc: M6 V00T0100 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: V00B0100 Q5 arc: V01S0000 Q6 arc: W1_H02W0301 Q3 arc: W1_H02W0601 Q4 arc: W1_H02W0701 Q7 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 1001100110011010 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011100 word: SLICED.K1.INIT 1001100110011010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C42:PLC2 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: H00R0000 V02N0401 arc: H00R0100 E1_H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 V01N0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 V01N0101 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 V02S0201 arc: V00B0100 V02S0101 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A1 H00L0100 arc: A2 V02N0501 arc: A3 E1_H01E0001 arc: A4 S1_V02N0101 arc: A5 V00T0000 arc: A6 H02E0701 arc: A7 H02W0501 arc: B0 V02N0301 arc: B1 H02E0101 arc: B2 V02N0101 arc: B3 V01N0001 arc: B4 V02S0501 arc: B5 V01S0000 arc: B6 S1_V02N0501 arc: B7 V02N0701 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 Q3 arc: H00L0000 Q0 arc: H00L0100 Q1 arc: H01W0000 Q4 arc: LSR0 W1_H02E0501 arc: M0 V00B0100 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q4 arc: N3_V06N0003 Q3 arc: V01S0000 Q7 arc: V01S0100 Q2 arc: W1_H02W0001 Q2 arc: W1_H02W0501 Q7 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1001100110011010 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 1001100110011010 word: SLICEC.K0.INIT 1001100110011100 word: SLICEC.K1.INIT 1001100110011100 word: SLICED.K0.INIT 1001100110011010 word: SLICED.K1.INIT 1001100110011010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C43:PLC2 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0501 E1_H01W0100 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 H06W0303 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 V02S0201 arc: V00T0000 H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0303 arc: A0 V01N0101 arc: A1 V02S0501 arc: A2 E1_H02W0701 arc: A3 H00L0100 arc: A4 V00T0000 arc: A5 H02W0501 arc: A6 H00L0000 arc: A7 V02S0301 arc: B0 H02W0101 arc: B1 V01N0001 arc: B2 N1_V02S0101 arc: B3 H00R0100 arc: B4 H00R0000 arc: B5 H02W0301 arc: B6 V00B0000 arc: B7 E1_H02W0301 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 1001100110011100 word: SLICEC.K0.INIT 1001100110011010 word: SLICEC.K1.INIT 1001100110011010 word: SLICED.K0.INIT 1001100110011100 word: SLICED.K1.INIT 1001100110011010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C44:PLC2 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 S1_V02N0701 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 H02W0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H06W0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0601 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E3_H06W0203 arc: A0 V01N0101 arc: A1 V02S0701 arc: A4 N1_V01S0100 arc: A7 V02S0101 arc: B0 V00T0000 arc: B1 V02N0101 arc: B4 V02S0501 arc: B6 V02S0501 arc: B7 V02S0501 arc: C4 N1_V02S0201 arc: C6 V02S0201 arc: CE0 V02N0201 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D6 H00R0100 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q7 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q0 arc: N3_V06N0003 Q0 arc: N3_V06N0203 Q4 arc: V01S0100 Q0 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 1011100010111000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1011101110001000 word: SLICEA.K0.INIT 1001100110011100 word: SLICEA.K1.INIT 1001100110011010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R6C45:PLC2 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 H02E0401 arc: H00R0100 H02W0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0401 H06W0203 arc: V00T0000 V02N0401 arc: V00T0100 V02S0501 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H02W0501 arc: A1 H02E0701 arc: A3 H01E0001 arc: A4 E1_H01W0000 arc: B0 S1_V02N0301 arc: B1 N1_V02S0301 arc: B2 H00R0000 arc: B3 H00L0000 arc: B4 H00L0000 arc: B6 V00T0000 arc: C0 N1_V02S0401 arc: C2 E1_H02W0401 arc: C3 V02S0601 arc: C4 H01E0001 arc: C6 N1_V02S0201 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0001 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 V02S0601 arc: D6 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F4 arc: N1_V02N0001 Q2 arc: W1_H02W0301 Q1 arc: W1_H02W0401 Q6 word: SLICEB.K1.INIT 0100110100000000 word: SLICEB.K0.INIT 1100110011110000 word: SLICEC.K0.INIT 0101000100010000 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1100110010101010 word: SLICED.K0.INIT 1111000011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R6C46:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0203 W3_H06E0203 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 V01N0101 arc: N1_V02N0701 V01N0101 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 H02W0601 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02W0201 arc: V00T0100 E1_H02W0301 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 W1_H02E0501 arc: A3 F7 arc: A5 H02E0501 arc: A6 N1_V01N0101 arc: A7 H02W0501 arc: B3 V02N0301 arc: B4 E1_H02W0301 arc: B5 H00R0000 arc: B6 H02W0301 arc: B7 H02E0301 arc: C0 V02N0401 arc: C1 E1_H02W0601 arc: C2 V02N0601 arc: C3 H02E0401 arc: C5 V02N0201 arc: C6 H02E0601 arc: C7 S1_V02N0201 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 V00T0100 arc: D3 H02E0201 arc: D4 V02N0601 arc: D5 V00B0000 arc: D6 H02W0001 arc: D7 V02S0601 arc: E1_H01E0001 F0 arc: E1_H01E0101 F0 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 F5 arc: H01W0000 Q2 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 F3 arc: S1_V02S0701 F5 arc: V01S0000 F6 arc: V01S0100 F2 arc: W1_H02W0001 F2 arc: W1_H02W0201 F2 arc: W1_H02W0701 F5 arc: W3_H06W0103 F2 word: SLICEC.K0.INIT 0000000000110011 word: SLICEC.K1.INIT 0000001000000000 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000100000000000 word: SLICEB.K0.INIT 0000000011110000 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1111000011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C47:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 H02E0401 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0003 H01E0001 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 H06W0003 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 N1_V02S0601 arc: V00T0100 S1_V02N0501 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 V06S0103 arc: W3_H06W0303 E3_H06W0203 arc: A3 V02N0501 arc: A4 V00B0000 arc: A5 V00B0000 arc: A6 H02E0701 arc: B0 H02W0101 arc: B3 V02S0101 arc: B4 H02E0101 arc: B6 V02N0701 arc: C0 H02E0601 arc: C3 V02S0601 arc: C4 H02W0401 arc: C5 H02W0401 arc: C6 Q6 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02E0201 arc: D3 H00R0000 arc: D4 V02N0401 arc: D5 V02N0401 arc: D6 H00R0100 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: H01W0000 Q6 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M2 N1_V01N0001 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F4 arc: V01S0100 F0 arc: W1_H02W0001 F2 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111111100000000 word: SLICED.K0.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0100010101000000 word: SLICEC.K1.INIT 0000010100000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R6C48:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0203 H01E0001 arc: H00L0000 S1_V02N0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0401 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 H02W0301 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0100 V02N0501 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: B0 H00R0100 arc: C0 V02N0401 arc: C1 H02E0601 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: H00R0100 Q5 arc: LSR0 V00T0100 arc: M0 V00B0100 arc: M3 H00L0000 arc: M5 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: W1_H02W0101 Q3 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111000011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 .tile R6C49:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 N1_V02S0201 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 E3_H06W0203 arc: V00B0000 H02W0401 arc: V00B0100 H02W0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0701 arc: A3 V02S0501 arc: A7 H02E0501 arc: B1 V02N0301 arc: B3 H01W0100 arc: B7 H02E0101 arc: C1 H00L0000 arc: C3 V02N0401 arc: C7 E1_H02W0601 arc: D1 V02S0201 arc: D3 V00B0100 arc: D7 H02E0201 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F7 F7_SLICE arc: M0 V00B0000 arc: M2 N1_V01N0001 arc: N1_V01N0001 F7 arc: S1_V02S0201 F0 arc: W1_H02W0201 F2 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111101101110011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R6C50:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0701 E1_H01W0100 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02W0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0001 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 V02S0301 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0701 S1_V02N0701 arc: A0 H00L0000 arc: A2 V01N0101 arc: A3 V01N0101 arc: B0 E1_H02W0301 arc: B2 H01W0100 arc: B3 H01W0100 arc: C0 E1_H01W0000 arc: C2 V02N0401 arc: C3 V02N0401 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 H02W0201 arc: D3 H02W0201 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F2 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: H01W0000 Q0 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M2 V00T0100 arc: M3 H00R0000 arc: M4 E1_H01E0101 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0101 Q3 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q3 arc: W1_H02W0601 Q4 arc: W3_H06W0003 Q3 arc: W3_H06W0203 Q4 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 1011101011101010 word: SLICEB.K1.INIT 1011101100111011 word: SLICEB.K0.INIT 1011101111111011 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R6C51:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 V01N0101 arc: H00L0000 V02N0001 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E3_H06W0303 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 H02W0001 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 E3_H06W0303 arc: S1_V02S0701 H02W0701 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 H02W0201 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02E0501 arc: A2 F5 arc: A5 V00T0000 arc: A7 H02W0701 arc: B2 V02S0101 arc: B5 E1_H02W0101 arc: B7 V00B0000 arc: C2 V02N0601 arc: C5 E1_H02W0401 arc: C7 H01E0001 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D2 V00B0100 arc: D5 H02E0001 arc: D7 H02W0001 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 Q7 arc: W3_H06W0103 Q2 word: SLICED.K1.INIT 0111011100000111 word: SLICEA.K0.INIT 1010101000000000 word: SLICEC.K1.INIT 0000101000100010 word: SLICEB.K0.INIT 1010101011101010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R6C52:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 V01N0001 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00R0000 V02S0601 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 H06E0203 arc: V00B0000 H02E0401 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0701 S3_V06N0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A2 V00T0000 arc: A3 H02E0501 arc: A4 V00T0100 arc: A5 W1_H02E0701 arc: A6 V02N0301 arc: A7 H02W0501 arc: B0 V02S0301 arc: B2 H02E0301 arc: B3 H00R0000 arc: B4 H00L0000 arc: B5 H02E0101 arc: B6 V00B0000 arc: B7 S1_V02N0701 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F7 arc: S1_V02S0001 F2 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: S1_V02S0601 F4 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C53:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 N1_V01S0100 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02N0201 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0103 H06W0103 arc: V00B0000 H02E0601 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 V06N0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0501 arc: A1 V02S0701 arc: A2 V00B0000 arc: A3 V02N0501 arc: A4 H02W0701 arc: A5 W1_H02E0701 arc: A6 V02S0101 arc: A7 H00L0000 arc: B0 H02W0301 arc: B1 V02S0301 arc: B2 V02N0101 arc: B3 V02N0301 arc: B4 H00R0000 arc: B5 S1_V02N0501 arc: B6 V02N0701 arc: B7 H02E0101 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F1 arc: S1_V02S0101 F3 arc: S1_V02S0201 F2 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: V01S0000 F4 arc: V01S0100 F7 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C54:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 H02E0601 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H06W0303 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 H06W0003 arc: V00B0000 V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 H02W0201 arc: V00T0100 H02W0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 W1_H02E0701 arc: A1 V02S0701 arc: A2 N1_V02S0701 arc: A3 V02S0501 arc: A4 E1_H02W0501 arc: A5 H02E0501 arc: A6 E1_H02W0701 arc: A7 S1_V02N0301 arc: B0 E1_H02W0301 arc: B1 V00T0000 arc: B2 H00L0000 arc: B3 V02S0301 arc: B4 H02E0101 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 V00B0000 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0501 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F1 arc: H01W0100 F0 arc: LSR0 H02W0501 arc: M2 V00T0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR0 arc: S1_V02S0301 F3 arc: S1_V02S0401 F4 arc: V01S0000 F6 arc: W3_H06W0103 Q2 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R6C55:PLC2 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 S3_V06N0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 E1_H02W0401 arc: N1_V02N0201 H06W0103 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 V01N0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02E0301 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0401 arc: V00T0000 V02N0401 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 S3_V06N0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0501 arc: A4 N1_V01S0100 arc: A5 F7 arc: A6 H02E0501 arc: A7 V02S0101 arc: B0 W1_H02E0301 arc: B1 E1_H02W0301 arc: B4 V00B0100 arc: B6 H01E0101 arc: B7 E1_H02W0101 arc: C4 W1_H02E0401 arc: C5 W1_H02E0401 arc: C6 H01E0001 arc: C7 V02S0001 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D4 V02S0401 arc: D5 V02S0601 arc: D6 F0 arc: D7 V01N0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 V00B0000 arc: M2 H02E0601 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q0 arc: N1_V02N0001 Q2 arc: S1_V02S0701 Q7 arc: V00B0100 F7 arc: V01S0000 F6 arc: V01S0100 F1 arc: W1_H02W0401 F4 word: SLICED.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 word: SLICED.K1.INIT 0000000101000101 word: SLICEC.K0.INIT 0000111011111110 word: SLICEC.K1.INIT 0000111100001010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C56:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0103 V01N0101 arc: H00L0000 V02S0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0701 H02W0701 arc: N3_V06N0203 S1_V02N0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 E1_H02W0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H02W0501 arc: A0 V02S0501 arc: A2 E1_H01E0001 arc: A5 E1_H02W0501 arc: A7 H02E0701 arc: B2 H02E0101 arc: B3 S1_V02N0301 arc: B7 E1_H02W0101 arc: C0 E1_H02W0401 arc: C2 H00L0100 arc: C3 N1_V01N0001 arc: C5 E1_H01E0101 arc: C7 V00T0000 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q0 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: LSR0 E1_H02W0301 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q3 arc: V01S0100 F7 arc: W1_H02W0501 Q5 word: SLICED.K1.INIT 0111011100000111 word: SLICEA.K0.INIT 1010000011111111 word: SLICEB.K0.INIT 0000110000001010 word: SLICEB.K1.INIT 0000000000110000 word: SLICEC.K1.INIT 1010000010100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 .tile R6C57:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 V06S0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0100 H02E0101 arc: H00R0000 N1_V02S0401 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S1_V02N0501 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 S3_V06N0303 arc: W1_H02W0701 N1_V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0701 arc: A2 V02S0501 arc: A6 S1_V02N0301 arc: A7 V02N0301 arc: B0 V02N0101 arc: B2 E1_H02W0301 arc: B7 V02N0501 arc: C2 H02W0601 arc: C6 V01N0101 arc: C7 V00T0000 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 N1_V01S0000 arc: D6 H00R0100 arc: D7 H00L0100 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0000 F2 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: LSR1 H02W0301 arc: M2 V00B0000 arc: M3 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q0 arc: N1_V02N0201 Q0 arc: V00T0100 Q3 arc: W1_H02W0001 F0 word: SLICEA.K0.INIT 1011101110001000 word: SLICEB.K0.INIT 0011011110111111 word: SLICEB.K1.INIT 0000000000000000 word: SLICED.K1.INIT 1100000010100000 word: SLICED.K0.INIT 0000000000001010 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C58:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0100 V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0601 W1_H02E0601 arc: V00B0100 S1_V02N0301 arc: V00T0100 V02S0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 S3_V06N0103 arc: A0 S1_V02N0501 arc: A1 S1_V02N0501 arc: A2 V02S0701 arc: A3 V02S0701 arc: A6 E1_H01W0000 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 E1_H02W0101 arc: B3 E1_H02W0101 arc: B4 H02E0301 arc: B6 W1_H02E0301 arc: B7 E1_H02W0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 S1_V02N0401 arc: C4 V01N0101 arc: C6 F4 arc: C7 V02S0001 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02S0001 arc: D3 V02S0001 arc: D4 H00R0100 arc: D6 W1_H02E0201 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 F0 arc: LSR0 V00B0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M2 V00B0000 arc: M3 H00L0100 arc: M5 H00L0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q3 arc: V00B0000 F6 arc: V01S0000 F7 arc: W1_H02W0501 F7 arc: W3_H06W0203 F7 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 0000000000000011 word: SLICED.K0.INIT 1111110001010101 word: SLICEB.K0.INIT 0000000011100010 word: SLICEB.K1.INIT 0000000000100010 word: SLICED.K1.INIT 0000111100000011 word: SLICEA.K0.INIT 0000000010111010 word: SLICEA.K1.INIT 0000000000010000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R6C59:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 S1_V02N0001 arc: H00L0100 E1_H02W0101 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 W3_H06E0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06W0303 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 V00B0000 arc: A3 F5 arc: A4 V00T0000 arc: A5 V00B0000 arc: A7 Q7 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 H01W0100 arc: B3 S1_V02N0101 arc: B4 V02N0501 arc: B5 V01S0000 arc: B7 V01S0000 arc: C0 S1_V02N0401 arc: C1 V02N0401 arc: C2 H00L0000 arc: C4 Q4 arc: C5 S1_V02N0001 arc: C7 W1_H02E0401 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 H02W0001 arc: D3 F2 arc: D4 V02S0401 arc: D5 V02S0601 arc: D7 W1_H02E0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q2 arc: E1_H02E0501 F7 arc: E1_H02E0601 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M2 E1_H02W0601 arc: M4 E1_H02W0401 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F3 arc: V01S0000 Q4 word: SLICED.K1.INIT 0011000001010000 word: SLICEC.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 0000111000000100 word: SLICEB.K1.INIT 0000000001000100 word: SLICEA.K0.INIT 1111110010111000 word: SLICEA.K1.INIT 1111101111111011 word: SLICEC.K0.INIT 1100010010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C5:PLC2 arc: W3_H06W0203 E3_H06W0203 .tile R6C60:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V01N0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02W0101 arc: H00R0000 V02N0401 arc: H00R0100 V02N0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H02E0201 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0401 N1_V02S0101 arc: S1_V02S0501 V01N0101 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A1 F7 arc: A2 V02S0501 arc: A3 V00B0000 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 V02N0301 arc: A7 F5 arc: B0 H02E0101 arc: B1 H02E0301 arc: B2 W1_H02E0301 arc: B3 Q3 arc: B4 E1_H02W0301 arc: B5 E1_H02W0301 arc: B6 V01S0000 arc: B7 H02E0101 arc: C0 H02E0601 arc: C1 N1_V01S0100 arc: C2 H02E0401 arc: C3 V02S0401 arc: C4 E1_H01E0101 arc: C5 V00T0100 arc: C6 V02N0201 arc: C7 F4 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F0 arc: D2 E1_H02W0001 arc: D3 S1_V02N0001 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 V00B0000 arc: D7 V02S0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q6 arc: E1_H02E0101 Q3 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M1 H00L0100 arc: M3 E1_H02W0201 arc: M5 H00L0100 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 Q1 arc: N1_V02N0501 Q5 arc: S3_V06S0103 F1 arc: V00B0000 Q6 arc: V00T0100 Q3 arc: V01S0000 Q1 word: SLICED.K0.INIT 0010000000101010 word: SLICEB.K1.INIT 0000010100000011 word: SLICEB.K0.INIT 0000111000000100 word: SLICEA.K0.INIT 0000000000000011 word: SLICEC.K0.INIT 1000100011000000 word: SLICEC.K1.INIT 0010001000110000 word: SLICED.K1.INIT 1111101100000000 word: SLICEA.K1.INIT 1100000011001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C61:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0201 arc: H00R0000 V02N0601 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 S1_V02N0601 arc: V00B0100 V02N0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 F5 arc: A1 W1_H02E0501 arc: A2 H02W0701 arc: A4 H02E0701 arc: A5 E1_H02W0701 arc: A6 H00L0000 arc: A7 N1_V01S0100 arc: B0 V02S0301 arc: B4 H02E0101 arc: B5 H02E0301 arc: B6 V02N0701 arc: B7 V00B0100 arc: C0 F4 arc: C1 N1_V01N0001 arc: C2 S1_V02N0601 arc: C4 H02E0601 arc: C5 H02E0401 arc: C6 V01N0101 arc: C7 H02W0401 arc: D0 H02E0001 arc: D1 V02S0001 arc: D2 H00R0000 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D6 F2 arc: D7 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: M0 H01E0001 arc: N1_V01N0001 F5 arc: V01S0100 F7 word: SLICEC.K0.INIT 0000010100000011 word: SLICEC.K1.INIT 0000010100000011 word: SLICEA.K0.INIT 1111001111100010 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K1.INIT 0001000011010000 word: SLICEB.K0.INIT 0000000000000101 word: SLICED.K0.INIT 1010111110001101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R6C62:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V06N0303 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0001 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0301 H02E0301 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: V00B0100 V02S0301 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 V01N0001 arc: W1_H02W0601 V06N0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A1 H00L0100 arc: A5 S1_V02N0301 arc: A6 V00T0100 arc: B1 V00B0000 arc: B2 H02W0301 arc: B5 V02S0701 arc: C1 W1_H02E0401 arc: C2 N1_V02S0601 arc: C5 V02N0201 arc: C6 H02E0601 arc: CE0 V02S0201 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D1 H02W0201 arc: D2 H02W0001 arc: D5 V00B0000 arc: D6 V00B0000 arc: E1_H01E0101 Q2 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q1 arc: H01W0000 F2 arc: H01W0100 F2 arc: LSR0 V00B0100 arc: LSR1 H02E0301 arc: M1 H00R0100 arc: M5 H00R0000 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q1 arc: S1_V02S0401 F6 arc: V00B0000 Q6 arc: V00T0100 Q1 arc: V01S0000 F1 arc: W1_H02W0001 Q2 arc: W1_H02W0201 F2 arc: W1_H02W0501 Q5 arc: W1_H02W0701 F5 word: SLICEB.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 0000001100000101 word: SLICEC.K1.INIT 0101010000000100 word: SLICED.K0.INIT 1111101000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C63:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 S3_V06N0303 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 H02E0601 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0601 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 V02S0001 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0001 V06N0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0303 E3_H06W0303 arc: A5 N1_V01N0101 arc: A7 Q7 arc: B0 V02N0301 arc: B2 H02W0301 arc: B5 V00B0100 arc: B7 H02E0301 arc: C0 N1_V01N0001 arc: C2 H00R0100 arc: C3 H02W0601 arc: C5 V02N0001 arc: C7 W1_H02E0601 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 E1_H02W0201 arc: D5 H02W0001 arc: D7 H00L0100 arc: E1_H01E0001 F5 arc: E1_H01E0101 F7 arc: E1_H02E0201 F0 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00L0100 Q3 arc: H00R0100 Q5 arc: H01W0100 F2 arc: LSR0 V00B0000 arc: LSR1 H02E0501 arc: M2 V00T0000 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q3 arc: V00B0100 Q7 arc: V01S0000 F0 arc: V01S0100 Q0 word: SLICEC.K1.INIT 0000010100000011 word: SLICEA.K0.INIT 1100110011110000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1111000011110000 word: SLICED.K1.INIT 0011001000000010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C64:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00R0100 E1_H02W0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H02W0701 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0701 V01N0101 arc: V00B0000 H02W0601 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0303 S3_V06N0303 arc: A0 F5 arc: A1 F7 arc: A2 H00L0100 arc: A3 H02W0501 arc: A5 V02N0301 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B0 N1_V02S0301 arc: B2 V02S0101 arc: B3 S1_V02N0101 arc: B5 H02W0301 arc: B6 W1_H02E0301 arc: B7 V00B0000 arc: C0 N1_V01N0001 arc: C1 V02N0401 arc: C2 E1_H02W0601 arc: C3 H02E0601 arc: C4 H02W0401 arc: C5 V02N0001 arc: C6 H02W0601 arc: C7 V02N0001 arc: CE0 S1_V02N0201 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 H01E0101 arc: D3 V01S0100 arc: D4 V01N0001 arc: D5 H02E0001 arc: D6 H01W0000 arc: D7 H02E0001 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 Q7 arc: H01W0100 F0 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 H01E0001 arc: M1 H00L0000 arc: M3 H02E0201 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F7 arc: S1_V02S0601 F6 arc: V01S0000 F2 arc: V01S0100 Q3 arc: W3_H06W0203 Q4 word: SLICED.K1.INIT 0101001100000000 word: SLICEC.K1.INIT 0011010100000000 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111010 word: SLICEC.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1011000010000000 word: SLICED.K0.INIT 1100100001000000 word: SLICEB.K0.INIT 0000111100001011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C65:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 V06S0303 arc: H00L0000 E1_H02W0001 arc: H00L0100 V02S0101 arc: H00R0000 V02S0401 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 E1_H02W0401 arc: V00B0000 E1_H02W0401 arc: V00B0100 H02E0501 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 H01E0101 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0701 arc: A3 N1_V02S0501 arc: A5 W1_H02E0701 arc: A7 F5 arc: B0 V00B0000 arc: B2 H01W0100 arc: B3 H02W0301 arc: B5 S1_V02N0701 arc: B7 H02W0101 arc: C0 S1_V02N0401 arc: C2 E1_H02W0601 arc: C3 H02E0601 arc: C5 V02N0201 arc: C7 V01N0101 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D2 V00B0100 arc: D3 E1_H02W0201 arc: D5 V02N0401 arc: D7 N1_V02S0401 arc: E1_H01E0001 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M5 H02W0001 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: S1_V02S0301 F3 arc: S1_V02S0501 F7 arc: W1_H02W0601 Q6 arc: W3_H06W0103 Q2 word: SLICEC.K1.INIT 1100110000000100 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1101010111010101 word: SLICEB.K0.INIT 1111110011110000 word: SLICEB.K1.INIT 0000010000000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C66:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0001 arc: H00R0100 V02S0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0301 H02E0301 arc: V00B0100 V02S0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V06N0303 arc: A0 V02S0701 arc: A1 W1_H02E0701 arc: A3 H01E0001 arc: B0 E1_H01W0100 arc: B4 H01E0101 arc: C1 N1_V01S0100 arc: C2 H00L0100 arc: C4 V00T0000 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02S0201 arc: D2 H01E0101 arc: D3 H01E0101 arc: E1_H01E0101 Q4 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H00L0100 Q1 arc: H01W0000 Q4 arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: M5 H00L0000 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: V00T0000 Q0 arc: V01S0100 Q3 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 1101110101010101 word: SLICEA.K1.INIT 1010111100001111 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1010101000000000 word: SLICEC.K0.INIT 1100000011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 .tile R6C67:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V06N0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 H01E0101 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02N0201 arc: V00T0000 H02W0201 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0100 arc: A6 H02W0701 arc: B0 H02W0101 arc: B1 H02W0101 arc: B6 V02N0701 arc: C0 V02S0601 arc: C1 H00L0100 arc: C6 V02S0201 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 W1_H02E0101 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D6 V02N0401 arc: E1_H01E0001 F0 arc: E1_H02E0501 Q7 arc: F0 F5A_SLICE arc: F6 F6_SLICE arc: H00L0000 Q2 arc: H00L0100 Q1 arc: H01W0000 Q7 arc: H01W0100 Q2 arc: LSR0 W1_H02E0301 arc: LSR1 H02E0501 arc: M0 H02W0601 arc: M1 H02E0001 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q2 arc: N1_V02N0001 Q2 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q7 arc: W1_H02W0601 F6 arc: W3_H06W0003 Q3 arc: W3_H06W0103 Q2 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 0000000011100010 word: SLICEA.K1.INIT 0000000000110000 word: SLICED.K0.INIT 0001000011010000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R6C68:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0001 arc: H00L0100 V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 V01N0001 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 N1_V01S0000 arc: S1_V02S0701 W1_H02E0701 arc: V00B0100 W1_H02E0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 V06S0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E3_H06W0103 arc: A0 E1_H01E0001 arc: A2 V02N0701 arc: A3 E1_H02W0501 arc: A4 N1_V01S0100 arc: A5 F7 arc: A6 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 V00T0000 arc: B1 F3 arc: B2 H01W0100 arc: B3 Q3 arc: B4 H02E0101 arc: B5 V01S0000 arc: B6 H01E0101 arc: B7 V00B0000 arc: C0 F4 arc: C1 F4 arc: C2 N1_V01S0100 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V00B0100 arc: C6 Q6 arc: C7 S1_V02N0001 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 V02N0201 arc: D4 V02N0401 arc: D5 E1_H01W0100 arc: D6 V02S0601 arc: D7 V02S0401 arc: E1_H01E0001 F3 arc: E1_H02E0301 Q1 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M1 H00R0100 arc: M3 H00L0000 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q3 arc: S1_V02S0201 F0 arc: V00B0000 Q6 arc: V01S0000 F2 arc: W1_H02W0701 F5 word: SLICEC.K0.INIT 0010001000110000 word: SLICEB.K1.INIT 1110010000000000 word: SLICEA.K0.INIT 1100110011111010 word: SLICEA.K1.INIT 1111111111111100 word: SLICEB.K0.INIT 0000000000011011 word: SLICED.K1.INIT 0011000001010000 word: SLICEC.K1.INIT 1110111111100000 word: SLICED.K0.INIT 1110001000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C69:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00R0100 W1_H02E0701 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0701 V01N0101 arc: V00B0000 H02W0401 arc: V00B0100 V02S0301 arc: V00T0000 S1_V02N0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 S3_V06N0303 arc: W3_H06W0303 E3_H06W0303 arc: A0 H00L0100 arc: A1 E1_H02W0701 arc: A3 F7 arc: A5 Q5 arc: A6 V00T0100 arc: A7 H00L0000 arc: B0 H02W0101 arc: B1 Q1 arc: B3 V02S0101 arc: B5 V01S0000 arc: B6 V00B0000 arc: B7 H02E0101 arc: C0 H02E0401 arc: C1 N1_V01N0001 arc: C3 H02E0601 arc: C5 V02N0201 arc: C6 E1_H01E0101 arc: C7 W1_H02E0401 arc: CE0 H00R0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 S1_V02N0001 arc: D5 V02N0401 arc: D6 H02E0201 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q5 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 F0 arc: LSR0 V00B0100 arc: M0 V00T0000 arc: M1 H02E0001 arc: M5 H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q5 arc: S1_V02S0101 F3 arc: S1_V02S0501 F5 arc: V00T0100 Q1 arc: V01S0000 Q1 word: SLICEC.K1.INIT 1010000011000000 word: SLICEA.K0.INIT 0011010100000000 word: SLICEA.K1.INIT 0001101111111111 word: SLICED.K0.INIT 1110001000000000 word: SLICED.K1.INIT 0100010001010000 word: SLICEB.K1.INIT 0000000100000001 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C70:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 V02S0101 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: H00R0000 H02E0601 arc: H00R0100 W1_H02E0501 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0401 N1_V02S0101 arc: V00B0100 V02S0101 arc: V00T0100 V02N0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W3_H06W0303 E1_H02W0601 arc: A0 H00R0000 arc: A2 V02S0701 arc: A3 F5 arc: A4 V00T0000 arc: A5 Q5 arc: A6 E1_H02W0701 arc: A7 Q7 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: B2 H02E0101 arc: B4 V02S0701 arc: B5 V01S0000 arc: B6 F3 arc: B7 V00T0000 arc: C0 N1_V01N0001 arc: C1 H02E0601 arc: C2 V02N0401 arc: C3 F4 arc: C4 H02W0401 arc: C5 H02W0401 arc: C6 H02W0601 arc: C7 S1_V02N0201 arc: CE0 H00L0000 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0001 arc: D2 Q2 arc: D3 V00T0100 arc: D4 H02W0001 arc: D5 H02W0001 arc: D6 V02S0601 arc: D7 S1_V02N0401 arc: E1_H01E0001 F2 arc: E1_H02E0301 Q1 arc: E1_H02E0501 F7 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0501 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M1 H00L0100 arc: M2 V00B0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q7 arc: V00B0000 F6 arc: V00T0000 Q2 arc: V01S0000 Q1 arc: W1_H02W0201 F0 word: SLICEB.K0.INIT 0000010011000100 word: SLICEC.K0.INIT 1010110000000000 word: SLICEC.K1.INIT 0000000011001010 word: SLICEB.K1.INIT 0000000000000101 word: SLICED.K0.INIT 1111110001010101 word: SLICEA.K0.INIT 0000000011100100 word: SLICEA.K1.INIT 0000000000001100 word: SLICED.K1.INIT 1100000010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C71:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 S1_V02N0001 arc: H00L0100 H02E0301 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0201 S3_V06N0103 arc: V00B0000 V02S0201 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 V06N0203 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 V02S0501 arc: A3 V02N0501 arc: A4 H02E0701 arc: A5 H02E0501 arc: A6 N1_V01N0101 arc: A7 H02E0701 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 S1_V02N0301 arc: B3 V01N0001 arc: B4 W1_H02E0101 arc: B7 S1_V02N0701 arc: C0 F4 arc: C2 H00L0000 arc: C3 H00R0100 arc: C4 W1_H02E0401 arc: C5 E1_H01E0101 arc: C6 H02W0401 arc: C7 N1_V02S0001 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 V02N0001 arc: D3 S1_V02N0001 arc: D4 H00L0100 arc: D5 V00B0000 arc: D6 F2 arc: D7 H00L0100 arc: E1_H01E0001 F5 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: M0 H01E0001 arc: N1_V01N0101 F3 arc: V01S0000 F0 arc: W1_H02W0601 F6 word: SLICEC.K0.INIT 0000000100110001 word: SLICEA.K0.INIT 1111000011101110 word: SLICEA.K1.INIT 1111111111101110 word: SLICEB.K0.INIT 1110000001000000 word: SLICEB.K1.INIT 0000000010101100 word: SLICED.K0.INIT 0000000001010000 word: SLICED.K1.INIT 0000111000000010 word: SLICEC.K1.INIT 0000000000000101 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 .tile R6C72:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 V01N0101 arc: V00B0000 H02E0401 arc: V00B0100 H02W0701 arc: V00T0100 W1_H02E0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 E1_H01W0100 arc: A0 V02S0501 arc: A1 E1_H01E0001 arc: A2 E1_H02W0501 arc: A3 V02S0701 arc: A4 H02E0501 arc: A5 Q5 arc: A6 F7 arc: A7 H00R0000 arc: B0 V00B0000 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H01W0100 arc: B4 V00B0100 arc: B5 V02N0701 arc: B6 S1_V02N0501 arc: B7 V00T0000 arc: C0 W1_H02E0401 arc: C1 V02N0601 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 V02N0001 arc: C5 V02N0201 arc: C6 H01E0001 arc: C7 F4 arc: CE0 H02E0101 arc: CE1 H00L0100 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: D3 V00B0100 arc: D4 V00B0000 arc: D5 H00R0100 arc: D6 H02W0201 arc: D7 H02E0201 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F3 arc: E1_H02E0001 F2 arc: E1_H02E0501 Q7 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 H02W0501 arc: M1 H00L0000 arc: M2 V00T0100 arc: M5 H02W0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: V00T0000 F0 arc: V01S0000 Q7 arc: W1_H02W0301 F1 arc: W1_H02W0501 F5 arc: W1_H02W0601 F6 word: SLICEC.K1.INIT 0000010000000111 word: SLICEA.K1.INIT 0101001100000000 word: SLICEB.K0.INIT 1101100000000000 word: SLICEB.K1.INIT 1100000010100000 word: SLICEC.K0.INIT 1110001000000000 word: SLICEA.K0.INIT 0010001100100000 word: SLICED.K1.INIT 1010100010101010 word: SLICED.K0.INIT 1100110000001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C73:PLC2 arc: E1_H02E0101 V06N0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 W3_H06E0203 arc: V00B0100 H02E0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 E3_H06W0203 arc: A0 F7 arc: A1 F7 arc: A2 F5 arc: A3 S1_V02N0701 arc: A4 H02E0501 arc: A5 V02S0101 arc: A6 H02W0501 arc: A7 H02W0501 arc: B0 V01N0001 arc: B1 V01N0001 arc: B2 V02S0101 arc: B3 S1_V02N0101 arc: B4 V00B0100 arc: B5 F3 arc: B6 V00B0100 arc: B7 V02N0701 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 F4 arc: C3 W1_H02E0401 arc: C4 W1_H02E0401 arc: C5 V01N0101 arc: C6 V02N0201 arc: C7 V02N0001 arc: D0 H02E0001 arc: D2 H01E0101 arc: D3 V02N0001 arc: D4 S1_V02N0401 arc: D5 H02E0201 arc: D6 E1_H02W0001 arc: D7 E1_H02W0001 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F0 arc: M0 V00B0000 arc: V00B0000 F6 arc: W1_H02W0201 F2 word: SLICED.K0.INIT 0000000011011000 word: SLICED.K1.INIT 1110010000000000 word: SLICEA.K0.INIT 1110111111100000 word: SLICEA.K1.INIT 1110111111101111 word: SLICEB.K1.INIT 1110000001000000 word: SLICEC.K0.INIT 0000110000001010 word: SLICEC.K1.INIT 0000000011111101 word: SLICEB.K0.INIT 1010101010101000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R6C74:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0301 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H02E0601 arc: S1_V02S0501 H02W0501 arc: V00B0000 H02W0401 arc: V00T0100 H02E0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 V02N0501 arc: A0 V02N0501 arc: A1 V02N0501 arc: A2 F7 arc: A3 E1_H02W0701 arc: A4 V00T0000 arc: A5 Q5 arc: B0 H01W0100 arc: B1 V01N0001 arc: B2 N1_V02S0301 arc: B3 V01N0001 arc: B4 V00B0100 arc: B5 V02N0701 arc: B7 V02S0701 arc: C0 H00L0000 arc: C1 H02W0601 arc: C2 S1_V02N0401 arc: C3 H02W0601 arc: C4 H02E0401 arc: C5 V00T0000 arc: C7 F4 arc: CE0 H02E0101 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 N1_V01S0000 arc: D3 N1_V02S0001 arc: D4 H00R0100 arc: D5 V02N0401 arc: D7 V02S0401 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F0 arc: H01W0100 Q5 arc: LSR0 H02W0301 arc: LSR1 V00B0000 arc: M0 V00T0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: V00B0100 Q5 arc: V00T0000 Q0 arc: W3_H06W0103 F2 word: SLICEC.K1.INIT 0100011100000000 word: SLICEA.K1.INIT 0000000011100100 word: SLICEA.K0.INIT 1101100000000000 word: SLICEB.K1.INIT 0000000011100100 word: SLICEC.K0.INIT 1100101000000000 word: SLICED.K1.INIT 0000000000000011 word: SLICEB.K0.INIT 1101000011000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C75:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0103 S1_V02N0101 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: V00B0100 W1_H02E0501 arc: V00T0000 H02E0001 arc: V00T0100 H02E0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: A0 V01N0101 arc: A2 V02N0501 arc: A3 F5 arc: A4 N1_V01N0101 arc: A5 F7 arc: A6 E1_H02W0501 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02N0101 arc: B3 V01N0001 arc: B4 H00R0000 arc: B5 H02E0301 arc: B6 F3 arc: B7 S1_V02N0701 arc: C0 F4 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 H02W0401 arc: C5 H02E0401 arc: C6 E1_H02W0601 arc: C7 W1_H02E0401 arc: CE1 V02N0201 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 Q2 arc: D3 H01E0101 arc: D4 H01W0000 arc: D5 V02S0401 arc: D6 E1_H01W0100 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 V00T0100 arc: LSR1 V00T0000 arc: M0 H01E0001 arc: M2 V00B0100 arc: M7 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q7 arc: V01S0100 F2 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 0000100001001100 word: SLICEC.K0.INIT 1011000010000000 word: SLICEA.K0.INIT 1110111011100010 word: SLICEA.K1.INIT 1111111111110011 word: SLICED.K1.INIT 1000110010000000 word: SLICEC.K1.INIT 0011001100100011 word: SLICEB.K1.INIT 1010101010101000 word: SLICED.K0.INIT 1000101010001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C76:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0001 arc: H00L0100 V02S0101 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0401 H02W0401 arc: V00B0000 H02E0401 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E1_H01W0000 arc: A0 S1_V02N0701 arc: A1 V02S0701 arc: A2 S1_V02N0701 arc: A3 W1_H02E0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 F5 arc: A7 Q7 arc: B0 H00R0100 arc: B1 W1_H02E0301 arc: B2 H02W0301 arc: B3 H00R0100 arc: B4 V02S0501 arc: B5 H02E0101 arc: B7 V02N0701 arc: C0 H02E0601 arc: C1 N1_V01N0001 arc: C2 H02E0601 arc: C3 S1_V02N0601 arc: C4 S1_V02N0201 arc: C5 V00T0000 arc: C6 V00B0100 arc: C7 V02N0201 arc: CE0 V02S0201 arc: CE1 H00L0100 arc: CE2 V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 F0 arc: D2 Q2 arc: D3 V01S0100 arc: D4 H01W0000 arc: D5 V02N0401 arc: D6 V02S0401 arc: D7 H01W0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q7 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q2 arc: H01W0100 F1 arc: LSR0 V00B0000 arc: LSR1 H02E0301 arc: M0 W1_H02E0601 arc: M2 W1_H02E0601 arc: M5 H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q7 arc: V00B0100 F7 arc: V00T0000 Q0 arc: V01S0000 F6 arc: V01S0100 Q0 word: SLICED.K1.INIT 0001000011010000 word: SLICEC.K1.INIT 0001000100000011 word: SLICED.K0.INIT 1111101000000000 word: SLICEC.K0.INIT 1110000000100000 word: SLICEB.K1.INIT 0000110100001000 word: SLICEB.K0.INIT 1110000001000000 word: SLICEA.K0.INIT 0000110100001000 word: SLICEA.K1.INIT 1100110011000100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C77:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02E0401 arc: H00R0100 H02E0501 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: V00B0000 E1_H02W0401 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: A1 F7 arc: A2 H01E0001 arc: A3 V02N0501 arc: A4 V00T0100 arc: A5 V00T0100 arc: A6 F5 arc: A7 V02N0301 arc: B1 V00T0000 arc: B3 H01W0100 arc: B4 V00B0100 arc: B5 V00B0100 arc: C1 H02W0601 arc: C2 V02N0601 arc: C3 H00L0100 arc: C4 S1_V02N0201 arc: C5 E1_H02W0601 arc: C6 V01N0101 arc: C7 F4 arc: CE1 H00R0100 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D2 H00R0000 arc: D3 V02N0201 arc: D4 V00B0000 arc: D5 N1_V02S0601 arc: D6 V02S0401 arc: D7 V02N0601 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F1 arc: H01W0100 Q5 arc: LSR0 E1_H02W0301 arc: LSR1 W1_H02E0301 arc: M3 H00L0000 arc: M5 W1_H02E0001 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V00B0100 Q5 arc: V00T0000 F2 arc: V00T0100 Q3 arc: V01S0000 F3 arc: W1_H02W0601 F6 word: SLICEB.K1.INIT 0000000000100111 word: SLICEC.K0.INIT 0000110000001010 word: SLICEB.K0.INIT 0000000001010000 word: SLICED.K1.INIT 0000000000000101 word: SLICEA.K1.INIT 1110000011101111 word: SLICEC.K1.INIT 0000000011001010 word: SLICED.K0.INIT 0000000000000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C78:PLC2 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 H02E0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 S3_V06N0303 arc: V00B0000 H02E0601 arc: V00B0100 H02E0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 S1_V02N0501 arc: A3 V02N0501 arc: A4 V02N0101 arc: A6 H02E0701 arc: B0 E1_H02W0101 arc: B1 E1_H02W0101 arc: B2 V01N0001 arc: B3 Q3 arc: B4 V02N0501 arc: B6 H02E0101 arc: C0 F4 arc: C2 W1_H02E0601 arc: C3 N1_V01N0001 arc: C4 V01N0101 arc: C6 V01N0101 arc: CE1 V02S0201 arc: CE2 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 W1_H02E0201 arc: D3 W1_H02E0201 arc: D4 V00B0000 arc: D6 H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q7 arc: E1_H02E0101 Q3 arc: E1_H02E0401 Q4 arc: E1_H02E0601 Q4 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 H02E0401 arc: M7 H00R0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: V00T0100 F3 arc: V01S0100 F0 word: SLICEB.K1.INIT 0010011100000000 word: SLICEC.K0.INIT 0000000101000101 word: SLICEB.K0.INIT 0011010100000000 word: SLICEA.K0.INIT 1111001111100010 word: SLICEA.K1.INIT 1111111111101110 word: SLICED.K0.INIT 0011001000010000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C79:PLC2 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 H01E0101 arc: H00L0000 E1_H02W0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: S1_V02S0301 W1_H02E0301 arc: V00B0000 V02N0201 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 V02N0701 arc: A2 S1_V02N0501 arc: A3 V02S0701 arc: A4 H02W0501 arc: A6 E1_H02W0701 arc: A7 N1_V01S0100 arc: B0 H02E0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B6 V01S0000 arc: B7 S1_V02N0701 arc: C0 H02E0401 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 H01E0001 arc: C6 Q6 arc: C7 H02W0401 arc: CE0 H00L0000 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 V00T0100 arc: D3 S1_V02N0201 arc: D4 F0 arc: D6 V00B0000 arc: D7 V02S0601 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q3 arc: E1_H02E0001 Q0 arc: E1_H02E0601 Q6 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F2 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0301 arc: M0 V00B0100 arc: M2 H02W0601 arc: M3 H00L0100 arc: M4 V00T0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F4 arc: N1_V02N0001 Q0 arc: V01S0000 Q3 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 0001101100000000 word: SLICEA.K0.INIT 1101100000000000 word: SLICEC.K0.INIT 0000000000001010 word: SLICED.K1.INIT 1100110000001000 word: SLICEB.K0.INIT 1101100000000000 word: SLICEB.K1.INIT 1101110111110101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C80:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0001 arc: H00R0000 V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 E1_H01W0100 arc: V00B0000 H02E0601 arc: V00B0100 E1_H02W0501 arc: V00T0000 V02S0401 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: W3_H06W0103 E1_H02W0201 arc: A2 V00T0000 arc: A3 W1_H02E0701 arc: A4 S1_V02N0101 arc: A6 F7 arc: A7 V00T0100 arc: B0 V02S0101 arc: B3 H00L0000 arc: B4 H01E0101 arc: B6 V02S0701 arc: B7 H01E0101 arc: C0 H02W0601 arc: C2 H02E0401 arc: C3 S1_V02N0401 arc: C4 E1_H02W0401 arc: C6 E1_H01E0101 arc: C7 H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D2 H02W0201 arc: D3 V00T0100 arc: D4 V00B0000 arc: D7 S1_V02N0401 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 H02W0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0101 Q0 arc: S1_V02S0201 Q2 arc: V01S0000 F4 arc: W1_H02W0401 F6 word: SLICEB.K0.INIT 1111101000001010 word: SLICEA.K0.INIT 0011001111110000 word: SLICEC.K0.INIT 1010100000001000 word: SLICED.K1.INIT 1010000010001000 word: SLICEB.K1.INIT 0000000011001010 word: SLICED.K0.INIT 0000000100000001 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 .tile R6C81:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V01N0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: H00R0000 H02E0601 arc: H00R0100 H02W0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0701 E1_H01W0100 arc: V00B0100 V02S0101 arc: V00T0000 E1_H02W0001 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V02N0701 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 V00T0000 arc: A4 V02N0101 arc: B0 H02W0301 arc: B3 E1_H02W0301 arc: C0 V02S0401 arc: C1 H02W0601 arc: C2 E1_H01W0000 arc: C3 V02S0601 arc: C4 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D1 H02E0201 arc: D2 N1_V02S0001 arc: D3 E1_H02W0001 arc: D4 H00R0100 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H01W0000 Q3 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q4 arc: S1_V02S0201 Q0 arc: V01S0000 Q4 arc: V01S0100 Q1 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 1111010110100000 word: SLICEB.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1111000010101010 word: SLICEA.K0.INIT 1110010011100100 word: SLICEA.K1.INIT 1111010110100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C82:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 V06S0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 H01E0001 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06E0303 arc: N3_V06N0203 H06E0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0501 W3_H06E0303 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: A0 S1_V02N0701 arc: A2 W1_H02E0701 arc: A4 V00B0000 arc: A5 V00T0000 arc: B3 H02E0301 arc: B6 H02E0101 arc: B7 V02N0501 arc: CE0 H00R0100 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F5 arc: H01W0100 F6 arc: LSR0 V00T0100 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M5 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F3 arc: N1_V02N0701 Q5 arc: V01S0000 F7 arc: V01S0100 F4 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C83:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0501 V01N0101 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H02E0501 arc: V00B0000 V02S0201 arc: V00B0100 S1_V02N0101 arc: V00T0000 W1_H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 V02S0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 N1_V02S0501 arc: A0 H02E0701 arc: A1 H02E0501 arc: A4 H02W0501 arc: A6 H00L0000 arc: A7 H00R0000 arc: B2 V02N0101 arc: B3 V02N0301 arc: B5 S1_V02N0701 arc: CE0 H00R0100 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F2 arc: H01W0100 F0 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M0 V00T0100 arc: M2 V00B0100 arc: M4 E1_H01E0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: N1_V02N0601 Q4 arc: N3_V06N0103 Q2 arc: N3_V06N0203 Q4 arc: S1_V02S0101 F3 arc: S1_V02S0601 F6 arc: S1_V02S0701 F5 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0301 F1 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C84:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02N0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0401 W1_H02E0401 arc: V00B0000 H02W0601 arc: V00B0100 S1_V02N0301 arc: V00T0000 E1_H02W0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 V06N0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 S1_V02N0701 arc: A2 H02W0501 arc: A6 E1_H01W0000 arc: B0 E1_H01W0100 arc: B1 V00T0000 arc: B3 E1_H02W0101 arc: B4 H00R0000 arc: B5 V02N0701 arc: B7 V00B0000 arc: CE0 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: E1_H02E0201 F0 arc: E1_H02E0401 F6 arc: E1_H02E0501 Q7 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M1 H00R0100 arc: M4 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N3_V06N0203 Q4 arc: S1_V02S0701 F5 arc: V01S0000 F3 arc: W1_H02W0301 Q1 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1010101010100000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C85:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 H01E0101 arc: H00L0100 V02N0101 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 S3_V06N0103 arc: V00B0100 H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H01W0000 arc: A5 W1_H02E0501 arc: B0 H02W0301 arc: B4 W1_H02E0301 arc: B5 W1_H02E0301 arc: B6 V02N0501 arc: B7 W1_H02E0301 arc: C4 H02E0601 arc: C6 W1_H02E0601 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 H00R0100 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D4 H02E0201 arc: D5 V02S0601 arc: D6 W1_H02E0001 arc: D7 W1_H02E0201 arc: E1_H01E0101 F0 arc: E1_H02E0401 Q6 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 V00B0100 arc: LSR1 H02E0301 arc: M0 H02W0601 arc: M3 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q0 arc: V01S0000 Q3 arc: V01S0100 Q7 arc: W1_H02W0501 Q5 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 1111110000110000 word: SLICEC.K1.INIT 1011101110001000 word: SLICED.K0.INIT 1111000011001100 word: SLICED.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C86:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 W1_H02E0501 arc: H00L0000 V02S0201 arc: H00R0000 H02E0401 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 V01N0101 arc: S1_V02S0301 E1_H01W0100 arc: S3_V06S0203 N1_V01S0000 arc: V00B0000 E1_H02W0401 arc: V00T0000 V02S0401 arc: V00T0100 V02N0501 arc: W1_H02W0701 V06N0203 arc: A0 H01E0001 arc: A1 H02E0501 arc: A2 H02E0701 arc: A7 H00R0000 arc: B0 H02E0101 arc: B1 H02E0301 arc: B2 H02E0301 arc: B3 H02E0301 arc: B6 V01S0000 arc: C3 V02N0601 arc: C6 V00T0000 arc: C7 V02S0001 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H01E0101 arc: D2 H02W0201 arc: D3 H02W0001 arc: D6 V00B0000 arc: D7 V00B0000 arc: E1_H01E0101 Q6 arc: E1_H02E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: S1_V02S0501 Q7 arc: V01S0000 Q1 arc: W1_H02W0101 Q3 arc: W1_H02W0201 Q0 arc: W1_H02W0301 Q1 arc: W1_H02W0601 Q4 word: SLICEA.K0.INIT 1110111000100010 word: SLICEA.K1.INIT 1110111000100010 word: SLICEB.K0.INIT 1011101110001000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1100110011110000 word: SLICED.K1.INIT 1010101011110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C87:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 S3_V06N0303 arc: H00L0100 S1_V02N0301 arc: H00R0000 H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 N1_V01S0100 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H01E0101 arc: V00B0000 E1_H02W0601 arc: V00B0100 V02N0101 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 V02S0501 arc: A0 E1_H01E0001 arc: A1 S1_V02N0501 arc: B0 S1_V02N0301 arc: B1 H02E0301 arc: B2 H02E0101 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 H02W0401 arc: CE0 S1_V02N0201 arc: CE1 V02S0201 arc: CE2 N1_V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 H02E0001 arc: E1_H01E0001 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: H01W0000 Q4 arc: H01W0100 Q2 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 H00R0100 arc: M4 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V02N0301 Q1 arc: S1_V02S0001 F0 word: SLICEB.K0.INIT 1111110000001100 word: SLICEA.K0.INIT 1110101011001111 word: SLICEA.K1.INIT 1010101110101011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R6C88:PLC2 arc: E1_H02E0401 W3_H06E0203 arc: H00L0000 V02N0201 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 V02S0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W1_H02E0501 arc: S1_V02S0701 W3_H06E0203 arc: V00B0000 H02E0601 arc: W1_H02W0401 V06S0203 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 V06S0203 arc: A0 V02N0501 arc: A1 W1_H02E0501 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 V00T0100 arc: A6 W1_H02E0501 arc: A7 Q7 arc: B0 H02E0301 arc: B1 H02E0301 arc: B2 H01W0100 arc: B4 V02N0501 arc: B5 V02N0501 arc: B6 N1_V01S0000 arc: B7 V01S0000 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 N1_V02S0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02S0201 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H00R0100 arc: D5 H00R0100 arc: D7 V02N0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M2 H02E0601 arc: M3 H00L0100 arc: M4 V00B0000 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0601 Q6 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: V00B0100 Q7 arc: V00T0000 F2 arc: V00T0100 Q3 arc: V01S0000 Q6 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1111111000111010 word: SLICEA.K1.INIT 1111111000111010 word: SLICED.K0.INIT 1001000010010000 word: SLICED.K1.INIT 1000001001000001 word: SLICEB.K0.INIT 1111110110001101 word: SLICEB.K1.INIT 1111111100000101 word: SLICEC.K0.INIT 1110101011001111 word: SLICEC.K1.INIT 1100110011001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R7C13:PLC2 arc: E3_H06E0103 W3_H06E0003 .tile R7C19:PLC2 arc: E3_H06E0203 W3_H06E0103 .tile R7C22:PLC2 arc: S1_V02S0701 H06E0203 .tile R7C30:PLC2 arc: E1_H02E0001 V02N0001 arc: H00R0000 N1_V02S0601 arc: V00B0000 V02N0201 arc: V00B0100 E1_H02W0501 arc: C0 E1_H01W0000 arc: CE0 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: E1_H01E0101 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: LSR0 V00B0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0001 Q0 word: SLICEA.K0.INIT 0000000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C31:PLC2 arc: E1_H02E0101 V02N0101 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 V01N0101 arc: V00B0000 V02S0201 arc: V00B0100 V02N0101 arc: V00T0000 V02S0401 arc: A0 V02N0701 arc: A5 V00T0000 arc: B2 V02S0101 arc: B3 V02S0301 arc: B4 N1_V01S0000 arc: B6 H01E0101 arc: B7 V00B0000 arc: CLK0 G_HPBX0000 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: LSR0 V00B0100 arc: M5 H02E0001 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F5 arc: N1_V02N0601 F4 arc: S1_V02S0701 Q5 arc: V01S0000 F7 arc: V01S0100 Q5 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET SET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C32:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 V02S0501 arc: S1_V02S0301 E3_H06W0003 arc: W1_H02W0501 N1_V02S0501 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000001110 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 .tile R7C33:PLC2 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: H00R0000 V02N0401 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 N1_V02S0701 arc: V00B0100 H02E0501 arc: V00T0100 W1_H02E0101 arc: A0 E1_H02W0701 arc: A1 E1_H02W0501 arc: B0 E1_H01W0100 arc: B1 E1_H02W0101 arc: C0 V02N0601 arc: C1 V02N0601 arc: CE0 H00R0000 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: M5 H02W0001 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V02N0201 Q0 arc: S1_V02S0501 Q5 arc: V01S0000 Q5 arc: V01S0100 Q1 word: SLICEA.K0.INIT 1110110011111100 word: SLICEA.K1.INIT 1110101011111010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C34:PLC2 arc: E1_H02E0101 V01N0101 arc: E1_H02E0601 N1_V02S0601 arc: H00R0000 N1_V02S0601 arc: H00R0100 H02E0501 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H06W0103 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0501 E3_H06W0303 arc: V00B0100 W1_H02E0501 arc: V00T0100 V02N0701 arc: W1_H02W0001 V02N0001 arc: A2 F5 arc: A3 F7 arc: B0 V02N0301 arc: B2 V02S0301 arc: B3 H00R0100 arc: B4 H02W0301 arc: B5 E1_H02W0301 arc: B7 H02W0301 arc: C0 H02W0401 arc: C2 H02E0601 arc: C3 E1_H01W0000 arc: C4 E1_H02W0401 arc: C5 E1_H02W0401 arc: C7 E1_H02W0401 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 V01N0001 arc: D5 H02W0201 arc: D7 H02W0001 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 F4 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 word: SLICED.K1.INIT 0011000000000000 word: SLICEC.K0.INIT 0011000000000000 word: SLICEC.K1.INIT 0000000011000000 word: SLICEB.K0.INIT 1110101011111010 word: SLICEB.K1.INIT 1110101011101110 word: SLICEA.K0.INIT 1111000011001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C35:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 S1_V02N0401 arc: H00R0000 H02E0601 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0701 H01E0101 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 H06W0303 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0701 H01E0101 arc: A0 V02S0701 arc: A1 H02W0701 arc: A2 S1_V02N0701 arc: A4 V02S0301 arc: A7 H02W0501 arc: B3 N1_V02S0101 arc: C0 V02N0401 arc: C1 V02S0401 arc: C2 H00L0000 arc: C3 V02S0601 arc: C4 V02N0201 arc: C7 H02W0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 H02W0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q1 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q3 arc: H01W0100 Q1 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0401 Q4 arc: W1_H02W0101 Q1 arc: W1_H02W0501 F7 word: SLICED.K1.INIT 0000000010100000 word: SLICEB.K1.INIT 1111000011001100 word: SLICEB.K0.INIT 0000111110101010 word: SLICEA.K1.INIT 1010101011110000 word: SLICEC.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 1010101011110000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C36:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0103 W3_H06E0003 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0701 H02W0701 arc: V00B0100 H02W0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: A0 V02S0501 arc: A1 H02W0501 arc: A3 S1_V02N0501 arc: A5 V02N0301 arc: A6 N1_V02S0101 arc: A7 F5 arc: B2 V01N0001 arc: B4 H02E0101 arc: B5 W1_H02E0101 arc: B6 V02S0701 arc: B7 V00T0000 arc: C0 V02N0601 arc: C1 V02S0601 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 E1_H02W0401 arc: C6 E1_H02W0601 arc: C7 V00T0100 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 V02S0001 arc: D2 N1_V01S0000 arc: D3 S1_V02N0201 arc: D4 E1_H02W0001 arc: D5 H01W0000 arc: D6 H02E0001 arc: D7 H02E0201 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q4 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q2 arc: N1_V02N0101 Q1 arc: N1_V02N0201 Q0 arc: S1_V02S0001 Q2 arc: V00T0000 Q2 arc: V00T0100 Q3 arc: V01S0000 Q3 arc: V01S0100 Q4 arc: W1_H02W0301 Q3 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1010101011110000 word: SLICEA.K1.INIT 1111101001010000 word: SLICED.K0.INIT 0000010000001111 word: SLICEC.K1.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1111101000001010 word: SLICEC.K0.INIT 1111110000001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R7C37:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0301 V01N0101 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0201 arc: H00R0000 W1_H02E0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: S1_V02S0701 E1_H01W0100 arc: V00B0000 V02S0001 arc: V00T0000 S1_V02N0401 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0103 E1_H02W0201 arc: A0 N1_V02S0701 arc: A3 V00T0000 arc: B1 V01N0001 arc: B3 H01W0100 arc: B4 H00L0000 arc: C0 V02N0401 arc: C1 V02N0601 arc: C3 E1_H01W0000 arc: C4 W1_H02E0401 arc: CE0 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 H00R0000 arc: D3 V00T0100 arc: D4 V02S0601 arc: E1_H01E0101 F2 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0100 Q4 arc: LSR0 E1_H02W0501 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: S1_V02S0101 Q1 arc: S1_V02S0201 Q0 arc: S1_V02S0401 Q4 arc: V00T0100 Q1 arc: V01S0000 Q0 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1111000010101010 word: SLICEA.K1.INIT 1100110011110000 word: SLICEC.K0.INIT 1100111111000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 .tile R7C38:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V01N0101 arc: E1_H02E0701 N1_V02S0701 arc: H00R0100 E1_H02W0501 arc: N1_V02N0301 H06E0003 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 E1_H01W0100 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: W1_H02W0001 V02N0001 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A1 F7 arc: A5 V00T0000 arc: A7 W1_H02E0701 arc: B0 H02E0101 arc: B2 V02N0101 arc: B3 V01N0001 arc: B4 H02E0301 arc: B5 E1_H02W0301 arc: B7 H02W0301 arc: C0 E1_H02W0601 arc: C1 N1_V01N0001 arc: C2 E1_H02W0401 arc: C3 E1_H02W0401 arc: C4 E1_H02W0401 arc: C5 S1_V02N0201 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H01E0101 arc: D2 V02S0001 arc: D3 V02S0201 arc: D4 V02S0401 arc: D5 E1_H02W0201 arc: D7 V02N0401 arc: E3_H06E0103 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: S1_V02S0101 Q3 arc: S3_V06S0003 F0 arc: V00T0100 Q3 arc: V01S0100 Q4 arc: W1_H02W0401 Q4 arc: W3_H06W0003 Q0 word: SLICEC.K1.INIT 0000000000000001 word: SLICED.K1.INIT 0000001000000000 word: SLICEA.K1.INIT 1010000000000000 word: SLICEB.K0.INIT 1100111111000000 word: SLICEB.K1.INIT 1100111111000000 word: SLICEC.K0.INIT 1100111111000000 word: SLICEA.K0.INIT 1100110011110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C39:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: V00B0100 H02E0701 arc: V00T0100 V02S0501 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 V02S0501 arc: W3_H06W0103 E1_H01W0100 arc: A2 V02S0701 arc: B0 H02E0101 arc: B1 V02N0301 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 S1_V02N0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 N1_V02S0201 arc: D2 V02N0001 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0100 Q0 arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: S1_V02S0201 Q2 arc: S1_V02S0301 Q1 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q1 word: SLICEA.K0.INIT 1100111111000000 word: SLICEB.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1100111111000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R7C40:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V02N0501 arc: H00R0100 V02S0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 E3_H06W0303 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0501 E3_H06W0303 arc: V00B0100 V02S0101 arc: V00T0100 V02N0501 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0501 arc: A1 E1_H02W0501 arc: A4 V02S0101 arc: B1 H02W0101 arc: B2 V02N0101 arc: B4 E1_H02W0101 arc: B5 V02N0701 arc: C0 V02N0601 arc: C2 S1_V02N0401 arc: C5 V00B0100 arc: CE0 V02S0201 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 N1_V02S0201 arc: D4 H02W0001 arc: D5 V02N0401 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q1 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0101 Q0 arc: S1_V02S0201 Q2 arc: V01S0100 Q2 arc: W1_H02W0201 Q2 word: SLICEB.K0.INIT 1100111111000000 word: SLICEA.K0.INIT 1010101011110000 word: SLICEC.K0.INIT 1101110110001000 word: SLICEA.K1.INIT 1010101011001100 word: SLICEC.K1.INIT 1100111111000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R7C41:PLC2 arc: E1_H02E0001 V06S0003 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0201 arc: V00T0000 V02N0401 arc: V00T0100 H02E0101 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V01N0101 arc: W1_H02W0501 S1_V02N0501 arc: A0 H00R0000 arc: A1 V02N0701 arc: A4 H02W0701 arc: A5 S1_V02N0301 arc: A7 V02N0101 arc: B1 V02N0301 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 V02N0501 arc: B6 H02E0101 arc: B7 V00T0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 H02W0601 arc: C3 H00L0100 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 H02W0401 arc: C7 V02N0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02N0201 arc: D2 S1_V02N0201 arc: D3 H02W0001 arc: D5 S1_V02N0601 arc: D6 V00B0000 arc: D7 V01N0001 arc: E1_H01E0101 Q4 arc: E1_H02E0101 Q3 arc: E1_H02E0301 F1 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q6 arc: N1_V02N0201 Q0 arc: V01S0100 Q2 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1111001111000000 word: SLICEC.K0.INIT 1010110010101100 word: SLICEC.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1010101011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R7C42:PLC2 arc: H00L0000 E1_H02W0201 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0701 E1_H02W0701 arc: V00T0000 S1_V02N0401 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A1 V01N0101 arc: A2 V02N0701 arc: A3 E1_H02W0701 arc: A5 V02N0301 arc: A7 N1_V02S0301 arc: B0 V02S0301 arc: B1 V01N0001 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: B4 W1_H02E0101 arc: B6 H02W0101 arc: B7 S1_V02N0501 arc: C0 V02S0601 arc: C1 V02N0401 arc: C4 V00T0000 arc: C5 V00T0100 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 V02N0001 arc: D2 H02W0201 arc: D3 S1_V02N0201 arc: D4 V01N0001 arc: D5 W1_H02E0201 arc: D6 E1_H01W0100 arc: D7 S1_V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F7 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q0 arc: N1_V02N0601 Q4 arc: V01S0100 Q3 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 1110111000100010 word: SLICEB.K1.INIT 0111011101000100 word: SLICEC.K0.INIT 1111001111000000 word: SLICEC.K1.INIT 1111101000001010 word: SLICED.K1.INIT 0000000000000010 word: SLICED.K0.INIT 0000000011000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R7C43:PLC2 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 H02W0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 H06W0003 arc: S1_V02S0701 H06W0203 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0201 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V06S0103 arc: W1_H02W0601 S1_V02N0601 arc: A1 V01N0101 arc: A3 V02N0701 arc: A5 H02W0501 arc: A7 W1_H02E0501 arc: B1 V02N0101 arc: B3 V02N0301 arc: B4 H00R0000 arc: B6 H02W0301 arc: B7 W1_H02E0301 arc: C1 S1_V02N0401 arc: C3 V02N0401 arc: C4 V01N0101 arc: C5 S1_V02N0001 arc: C6 V00T0000 arc: C7 E1_H01E0101 arc: CE0 E1_H02W0101 arc: CE2 H00L0000 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D1 V02N0001 arc: D3 V02N0201 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 N1_V02S0601 arc: D7 F0 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 H01E0001 arc: M1 H00L0100 arc: M2 H02W0601 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q4 arc: V01S0100 Q6 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 1100110011110000 word: SLICEC.K1.INIT 1010101011110000 word: SLICED.K1.INIT 1000000000000000 word: SLICED.K0.INIT 1111111111000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R7C44:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 S3_V06N0003 arc: H00R0100 E1_H02W0701 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0601 H02E0601 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 V02N0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H02W0501 arc: A3 E1_H02W0501 arc: B1 V02N0301 arc: B2 E1_H02W0301 arc: B3 E1_H02W0101 arc: B4 H02E0301 arc: B7 V02S0701 arc: C0 H02W0401 arc: C1 H02W0601 arc: C2 V02N0401 arc: C4 V00B0100 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 H00R0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V00B0100 arc: D2 H02W0201 arc: D3 H02E0201 arc: D4 V00B0000 arc: D7 V02N0601 arc: E1_H01E0101 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: H01W0100 Q4 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q0 arc: N1_V02N0101 Q1 arc: N1_V02N0301 Q3 word: SLICEA.K1.INIT 1111000011001100 word: SLICEA.K0.INIT 1111010110100000 word: SLICEB.K0.INIT 1111110000110000 word: SLICEB.K1.INIT 1101110110001000 word: SLICEC.K0.INIT 1111110000001100 word: SLICED.K1.INIT 1100111111000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 .tile R7C45:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0701 V01N0101 arc: H00L0000 E1_H02W0001 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00T0100 V02N0501 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0401 V06S0203 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V06S0303 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00R0000 arc: C0 S1_V02N0401 arc: C1 V02S0401 arc: CE0 H00L0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: H00R0000 Q4 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: M0 V00B0000 arc: M1 H00R0000 arc: M4 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: W1_H02W0301 Q1 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1111000011110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C46:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0501 V02N0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H06W0303 arc: S1_V02S0101 H02W0101 arc: S1_V02S0301 V01N0101 arc: V00B0000 N1_V02S0201 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 V06S0003 arc: W3_H06W0203 V06S0203 arc: A0 F5 arc: A1 F5 arc: A2 W1_H02E0501 arc: A5 N1_V01S0100 arc: A6 H00R0000 arc: A7 V02S0301 arc: B0 H02E0301 arc: B2 H00R0100 arc: B6 V00B0000 arc: B7 N1_V01S0000 arc: C0 H00R0100 arc: C2 H02E0401 arc: C4 S1_V02N0201 arc: C5 E1_H02W0601 arc: C6 V02N0001 arc: C7 E1_H02W0601 arc: D0 W1_H02E0001 arc: D2 W1_H02E0001 arc: D4 H02E0201 arc: D6 F2 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H02E0001 F0 arc: E3_H06E0203 F4 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H00R0100 F7 arc: M0 H01E0001 arc: N1_V01N0101 F0 arc: N1_V02N0001 F2 arc: N1_V02N0201 F0 arc: N3_V06N0303 F6 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 0000010101000101 word: SLICEA.K1.INIT 0101010101010101 word: SLICED.K1.INIT 0000000000110001 word: SLICEC.K1.INIT 1010000010100000 word: SLICEB.K0.INIT 0000110000000100 word: SLICED.K0.INIT 0011001000000010 word: SLICEC.K0.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 .tile R7C47:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V01N0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V01N0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 W1_H02E0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H06W0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 E1_H02W0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H01W0000 arc: A0 H00R0000 arc: B1 V02S0301 arc: C0 V02N0401 arc: C1 V02N0401 arc: CE0 H00L0100 arc: CE1 S1_V02N0201 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 W1_H02E0001 arc: E1_H02E0501 Q5 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V02N0401 Q6 arc: V00T0000 F0 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q5 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111111111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C48:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02S0601 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0501 V01N0101 arc: S1_V02S0701 E1_H02W0701 arc: V00B0000 H02W0401 arc: V00B0100 V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 V01N0001 arc: A0 V02N0501 arc: A2 V02N0701 arc: A3 V02S0501 arc: B1 F3 arc: B2 H02E0101 arc: B3 H02W0301 arc: C0 H00L0000 arc: C1 H02E0401 arc: C2 V02N0401 arc: C3 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 V02S0001 arc: D3 H02E0001 arc: E1_H02E0001 Q0 arc: E1_H02E0301 Q1 arc: E1_H02E0401 Q6 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 F2 arc: H01W0000 Q2 arc: H01W0100 Q4 arc: LSR0 W1_H02E0501 arc: M2 V00B0000 arc: M4 V00T0100 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: V01S0000 Q6 word: SLICEB.K0.INIT 0011111100010101 word: SLICEA.K0.INIT 1010111100001111 word: SLICEB.K1.INIT 0100110001011111 word: SLICEA.K1.INIT 1111001100110011 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C49:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 V01N0101 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0201 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0203 W3_H06E0203 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V02N0701 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02N0501 arc: A2 W1_H02E0501 arc: A4 V02N0301 arc: B2 H01W0100 arc: B4 V00B0100 arc: C0 F4 arc: C3 H02E0601 arc: C4 E1_H02W0401 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 S1_V02N0201 arc: D4 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 Q3 arc: E1_H02E0101 Q3 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q6 arc: H01W0100 Q4 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M6 N1_V01N0101 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q3 word: SLICEC.K0.INIT 0100110001011111 word: SLICEA.K0.INIT 1010111100001111 word: SLICEB.K0.INIT 1010101011001100 word: SLICEB.K1.INIT 1111000011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C50:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 S1_V02N0301 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 H01E0101 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02S0001 arc: V00B0100 E1_H02W0701 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 V02N0401 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0203 E3_H06W0203 arc: A0 F5 arc: A2 E1_H01E0001 arc: A5 Q5 arc: B2 V02S0301 arc: B5 V02S0701 arc: C0 S1_V02N0601 arc: C2 H00L0100 arc: C5 E1_H02W0601 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CE2 W1_H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D5 V00B0000 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: H00R0000 Q4 arc: H01W0000 Q5 arc: H01W0100 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q4 arc: W1_H02W0201 Q2 arc: W3_H06W0303 Q5 word: SLICEC.K1.INIT 0011111100010101 word: SLICEA.K0.INIT 1111010101010101 word: SLICEB.K0.INIT 1000101010001010 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C51:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V01N0101 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 S1_V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0601 V01N0001 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0501 E1_H02W0501 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02W0701 arc: V00T0000 V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 F7 arc: A1 S1_V02N0501 arc: A7 V02N0301 arc: B0 H02W0301 arc: B3 H02E0301 arc: B4 H02E0101 arc: B7 V02S0701 arc: C1 H02E0401 arc: C2 H02E0601 arc: C3 H02E0601 arc: C4 H02E0601 arc: C5 H02E0601 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: D2 H02E0201 arc: D5 W1_H02E0001 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 Q0 arc: E1_H02E0301 Q3 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: LSR1 V00T0100 arc: M6 V00T0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q2 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q5 arc: V01S0000 Q6 arc: V01S0100 Q6 arc: W1_H02W0601 Q6 word: SLICED.K1.INIT 0111000001110111 word: SLICEA.K1.INIT 1010111100001111 word: SLICEA.K0.INIT 1101110101010101 word: SLICEC.K0.INIT 1100000011000000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1100000011000000 word: SLICEC.K1.INIT 1111000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 .tile R7C52:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 N1_V01S0100 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02W0301 arc: H00R0100 H02E0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 S1_V02N0501 arc: S1_V02S0201 V01N0001 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02N0201 arc: V00B0100 V02S0301 arc: V00T0000 E1_H02W0001 arc: V00T0100 V02S0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 S3_V06N0303 arc: A0 V02S0701 arc: A3 W1_H02E0701 arc: A4 F5 arc: A5 F7 arc: A6 E1_H01W0000 arc: A7 V02S0101 arc: B4 E1_H02W0301 arc: B5 N1_V01S0000 arc: B6 H02W0101 arc: B7 V02S0501 arc: C1 V02N0401 arc: C2 H00L0000 arc: C4 V00B0100 arc: C5 N1_V02S0201 arc: C6 F4 arc: C7 V02S0001 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V00T0100 arc: D2 V00T0100 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D5 V02S0401 arc: D6 H02E0001 arc: D7 V02S0601 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q2 arc: E1_H02E0601 Q4 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 Q6 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M4 H02E0401 arc: M6 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0701 Q7 arc: V01S0000 Q4 arc: V01S0100 Q3 arc: W1_H02W0601 Q4 arc: W3_H06W0203 Q4 word: SLICEC.K1.INIT 0000000000000010 word: SLICED.K1.INIT 0000000000000001 word: SLICEC.K0.INIT 0000100000000000 word: SLICED.K0.INIT 0101111101011100 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1010101000000000 word: SLICEA.K0.INIT 1010101000000000 word: SLICEA.K1.INIT 1111000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 .tile R7C53:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 V01N0101 arc: H00L0000 V02N0001 arc: H00L0100 V02N0301 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S1_V02N0201 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 V01N0001 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 H02W0701 arc: V00B0000 H02W0601 arc: V00B0100 H02E0501 arc: V00T0000 V02N0401 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V01N0101 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 V01N0101 arc: W3_H06W0303 E3_H06W0303 arc: A0 S1_V02N0701 arc: A1 V02S0701 arc: A2 V02N0701 arc: A3 V01N0101 arc: A5 V02S0101 arc: A6 V02N0101 arc: B0 V00B0000 arc: B1 V02S0301 arc: B2 V02N0101 arc: B3 H00R0000 arc: B5 N1_V01S0000 arc: B6 E1_H02W0301 arc: C1 N1_V01S0100 arc: C2 E1_H02W0601 arc: C3 N1_V01N0001 arc: C5 V02S0001 arc: C6 S1_V02N0201 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V02S0201 arc: D2 S1_V02N0201 arc: D3 S1_V02N0001 arc: D5 V02S0601 arc: D6 H00L0100 arc: E1_H01E0001 Q0 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: H01W0000 F4 arc: H01W0100 F1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M2 H02E0601 arc: M4 E1_H02W0401 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 F3 arc: N1_V02N0001 Q2 arc: N3_V06N0203 Q7 arc: V01S0000 Q5 arc: V01S0100 Q5 word: SLICEA.K0.INIT 1101110101010101 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000000001 word: SLICEA.K1.INIT 0000000000000001 word: SLICED.K0.INIT 1111111011110100 word: SLICED.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0100011100000000 word: SLICEB.K1.INIT 1011101110110001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C54:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V06N0303 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 V02N0701 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0001 arc: H00L0100 W1_H02E0301 arc: H00R0100 E1_H02W0701 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 E3_H06W0203 arc: N3_V06N0103 S1_V02N0101 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: V00B0000 V02N0001 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0303 arc: A0 H02E0501 arc: A2 H01E0001 arc: A3 V02S0701 arc: A4 N1_V01N0101 arc: A5 S1_V02N0301 arc: A6 H00R0000 arc: A7 E1_H01W0000 arc: B1 Q1 arc: B3 V02S0301 arc: B4 H00R0000 arc: B5 S1_V02N0501 arc: B6 H02E0301 arc: B7 V00T0000 arc: C0 H02E0601 arc: C1 H02E0601 arc: C3 V02S0401 arc: C4 E1_H02W0401 arc: C5 F4 arc: C6 E1_H01E0101 arc: C7 N1_V02S0001 arc: CE0 V02S0201 arc: CE1 S1_V02N0201 arc: CE2 H00L0000 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 W1_H02E0201 arc: D2 V02S0001 arc: D3 N1_V01S0000 arc: D4 H02W0201 arc: D5 N1_V02S0601 arc: D6 H02E0201 arc: D7 W1_H02E0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q4 arc: E3_H06E0103 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q6 arc: H01W0000 Q1 arc: LSR0 V00B0000 arc: LSR1 H02W0501 arc: M0 V00B0100 arc: M1 H00R0100 arc: M4 H02E0401 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q4 arc: N1_V02N0001 Q2 arc: N1_V02N0401 Q6 arc: S3_V06S0203 F7 arc: V01S0000 F5 arc: V01S0100 F0 arc: W1_H02W0301 F3 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111110011001100 word: SLICEB.K1.INIT 0000000000000010 word: SLICEB.K0.INIT 1010101000000000 word: SLICED.K0.INIT 1100000010001000 word: SLICEC.K0.INIT 1010000011000000 word: SLICEC.K1.INIT 1100110011000100 word: SLICED.K1.INIT 0000110001000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R7C55:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0003 V01N0001 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0201 arc: H00R0000 W1_H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0201 V01N0001 arc: S1_V02S0501 S3_V06N0303 arc: S1_V02S0601 E1_H02W0601 arc: V00B0000 H02W0401 arc: V00B0100 V02N0301 arc: V00T0000 E1_H02W0201 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 F5 arc: A1 F5 arc: A2 V00T0000 arc: A3 N1_V02S0701 arc: A4 S1_V02N0301 arc: A5 V00T0000 arc: A6 N1_V02S0301 arc: A7 W1_H02E0701 arc: B0 H02W0301 arc: B1 H02E0301 arc: B2 E1_H02W0301 arc: B3 Q3 arc: B4 V02S0701 arc: B5 V02N0701 arc: B6 S1_V02N0501 arc: B7 E1_H02W0101 arc: C0 H02E0601 arc: C2 V02N0401 arc: C3 H02W0401 arc: C4 Q4 arc: C5 V01N0101 arc: C6 F4 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V02S0201 arc: D2 S1_V02N0001 arc: D3 N1_V02S0201 arc: D4 V00B0000 arc: D5 E1_H02W0001 arc: D6 H00L0100 arc: D7 E1_H02W0001 arc: E1_H01E0001 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 F3 arc: H01W0000 F0 arc: H01W0100 F6 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 H02W0601 arc: M1 W1_H02E0001 arc: M3 H00R0000 arc: M4 W1_H02E0401 arc: M6 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: N1_V02N0301 Q1 arc: N3_V06N0203 Q4 arc: V01S0000 Q6 arc: V01S0100 F7 arc: W1_H02W0601 Q6 word: SLICEC.K0.INIT 0000000011011000 word: SLICEB.K1.INIT 1010000011000000 word: SLICED.K0.INIT 0011001100110001 word: SLICEB.K0.INIT 0000100001001100 word: SLICED.K1.INIT 0000000001000111 word: SLICEC.K1.INIT 0010011100000000 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1110111011111111 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 .tile R7C56:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 S1_V02N0301 arc: H00R0000 N1_V02S0601 arc: H01W0100 W3_H06E0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H06W0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06E0103 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02N0601 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0203 V01N0001 arc: A0 F5 arc: A5 V02S0101 arc: B3 V02N0301 arc: B4 H00L0000 arc: B5 E1_H02W0101 arc: C0 V02S0401 arc: C4 E1_H02W0601 arc: C5 V00T0000 arc: CE0 H00R0000 arc: CE2 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D3 N1_V02S0001 arc: D5 E1_H02W0001 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: H01W0000 Q4 arc: LSR0 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0101 F3 arc: N3_V06N0003 F3 arc: V01S0100 F3 arc: W3_H06W0003 F3 word: SLICEC.K1.INIT 0101111100010011 word: SLICEA.K0.INIT 1111010101010101 word: SLICEC.K0.INIT 1100000011000000 word: SLICEB.K1.INIT 0011001100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 .tile R7C57:PLC2 arc: E1_H02E0001 S3_V06N0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 V01N0001 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 V01N0101 arc: H00L0000 N1_V02S0001 arc: H00R0100 S1_V02N0701 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: V00B0100 E1_H02W0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 S3_V06N0003 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0103 S3_V06N0103 arc: W3_H06W0203 E3_H06W0103 arc: A0 H02E0701 arc: A1 H02E0701 arc: A2 H02W0501 arc: A3 E1_H02W0701 arc: A4 F5 arc: A5 Q5 arc: A7 H00R0000 arc: B0 H01W0100 arc: B1 H01W0100 arc: B2 V02N0101 arc: B3 H02E0301 arc: B4 S1_V02N0501 arc: B5 W1_H02E0301 arc: B6 V01S0000 arc: B7 H02W0301 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H02E0401 arc: C3 W1_H02E0401 arc: C4 N1_V02S0201 arc: C5 H02E0401 arc: C6 Q6 arc: C7 S1_V02N0201 arc: CE0 W1_H02E0101 arc: CE1 H00L0000 arc: CE2 N1_V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 H00R0000 arc: D3 F0 arc: D4 F2 arc: D5 H00L0100 arc: D6 H01W0000 arc: D7 E1_H02W0001 arc: E1_H01E0001 F4 arc: E1_H01E0101 Q2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 W1_H02E0001 arc: M2 E1_H02W0601 arc: M5 W1_H02E0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F7 arc: N1_V02N0301 Q1 arc: N1_V02N0501 Q5 arc: V00B0000 F6 arc: V00T0100 Q1 arc: V01S0100 F3 word: SLICED.K0.INIT 1111110000110000 word: SLICEA.K0.INIT 0010111101111111 word: SLICEA.K1.INIT 0010000001110000 word: SLICEB.K1.INIT 0000010011000100 word: SLICED.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 0000101100001000 word: SLICEC.K1.INIT 1011000010000000 word: SLICEC.K0.INIT 1100110010001100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C58:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V01N0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 W1_H02E0601 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 V01N0101 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 V01N0101 arc: S1_V02S0201 N1_V02S0201 arc: V00T0000 V02S0601 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 V01N0001 arc: A0 H02E0501 arc: A1 W1_H02E0701 arc: A2 H02E0501 arc: A3 E1_H01E0001 arc: A4 V00T0100 arc: A5 V00T0100 arc: A6 F7 arc: A7 H02E0501 arc: B0 H02E0301 arc: B1 Q1 arc: B2 H02W0101 arc: B3 N1_V02S0101 arc: B5 V02N0701 arc: B6 F3 arc: B7 V00B0100 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 H00R0100 arc: C3 W1_H02E0401 arc: C4 Q4 arc: C5 S1_V02N0201 arc: C6 H01E0001 arc: C7 N1_V02S0201 arc: CE0 H00L0100 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0001 arc: D2 H02W0001 arc: D3 V01S0100 arc: D4 H02E0201 arc: D5 H02W0001 arc: D6 E1_H02W0201 arc: D7 S1_V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0100 Q1 arc: LSR0 E1_H02W0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H00L0000 arc: M3 W1_H02E0201 arc: M4 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 F2 arc: N1_V02N0701 F5 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V00T0100 Q3 arc: V01S0000 F6 arc: V01S0100 Q4 word: SLICEC.K0.INIT 1010101011110000 word: SLICEA.K0.INIT 0111011100111111 word: SLICEA.K1.INIT 0010011100000000 word: SLICEB.K0.INIT 1011100000000000 word: SLICEC.K1.INIT 0000000010101100 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K1.INIT 0000101100001000 word: SLICED.K0.INIT 1111000011100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C59:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 S3_V06N0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 V01N0101 arc: H00L0000 V02N0001 arc: H00R0000 V02S0601 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 H06E0003 arc: S1_V02S0101 N1_V02S0101 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 S3_V06N0203 arc: V00T0000 V02S0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 S3_V06N0003 arc: W3_H06W0303 E1_H02W0501 arc: A0 V02N0701 arc: A1 V02N0701 arc: A3 H00L0100 arc: A4 E1_H02W0701 arc: A5 F7 arc: A6 H00L0000 arc: A7 Q7 arc: B0 H01W0100 arc: B1 Q1 arc: B2 H01W0100 arc: B3 E1_H02W0101 arc: B5 W1_H02E0301 arc: B6 V01S0000 arc: B7 V01S0000 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 V00T0100 arc: C6 V00B0100 arc: CE0 S1_V02N0201 arc: CE1 H02W0101 arc: CE2 S1_V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 W1_H02E0201 arc: D3 V02N0001 arc: D4 H00R0100 arc: D5 F2 arc: D6 H02E0201 arc: D7 W1_H02E0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0100 Q7 arc: H01W0100 Q1 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0501 arc: M0 V00B0000 arc: M1 H00R0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 F3 arc: N1_V02N0401 F6 arc: S1_V02S0201 F0 arc: S1_V02S0501 F5 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V01S0000 Q4 arc: V01S0100 Q2 word: SLICED.K1.INIT 0101010100110011 word: SLICEB.K0.INIT 0011001100001111 word: SLICEC.K1.INIT 1110000000100000 word: SLICEB.K1.INIT 1011100000000000 word: SLICED.K0.INIT 0101000001000100 word: SLICEC.K0.INIT 0000010110101111 word: SLICEA.K0.INIT 1101111110001111 word: SLICEA.K1.INIT 1101000010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C60:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 V06N0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 H01E0101 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0103 S3_V06N0003 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0201 V01N0001 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 H06E0203 arc: V00B0000 H02W0401 arc: V00B0100 W1_H02E0501 arc: V00T0000 E1_H02W0201 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02S0501 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 E1_H01E0001 arc: A4 H02W0701 arc: A5 N1_V01N0101 arc: A6 N1_V01N0101 arc: B0 V02N0101 arc: B1 H02W0101 arc: B3 Q3 arc: B4 V00B0100 arc: B5 H02W0101 arc: B6 V01S0000 arc: C0 H02E0401 arc: C1 H00L0100 arc: C2 F4 arc: C3 H02E0601 arc: C4 Q4 arc: C5 V02N0001 arc: C6 H02E0601 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0001 arc: D2 F0 arc: D3 H02E0201 arc: D4 H00L0100 arc: D5 H01W0000 arc: D6 H01W0000 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F3 arc: E1_H02E0601 F6 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 Q0 arc: H01W0100 F1 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00B0000 arc: M3 H02W0201 arc: M4 H02W0401 arc: M6 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V01S0100 F2 word: SLICED.K0.INIT 0000000100001101 word: SLICEB.K1.INIT 0011000001010000 word: SLICEA.K1.INIT 1110001000000000 word: SLICEC.K1.INIT 0000111000000010 word: SLICEC.K0.INIT 1100100001000000 word: SLICEA.K0.INIT 0000111000000010 word: SLICEB.K0.INIT 0000000000000101 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C61:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0201 N1_V01S0000 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H02W0701 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02N0701 arc: W3_H06W0203 V01N0001 arc: A0 F5 arc: A1 F5 arc: A2 W1_H02E0501 arc: A3 V01N0101 arc: A4 S1_V02N0101 arc: A5 Q5 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B0 H02W0301 arc: B1 H02W0301 arc: B2 V02N0101 arc: B4 H02W0101 arc: B5 E1_H02W0301 arc: B6 N1_V02S0701 arc: C0 H02W0601 arc: C1 H02W0601 arc: C2 V02N0401 arc: C3 V02N0401 arc: C4 V00T0000 arc: C5 E1_H01E0101 arc: C6 H02W0401 arc: C7 N1_V02S0201 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 W1_H02E0201 arc: D6 H02E0201 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q7 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: LSR0 H02W0501 arc: M0 H02E0601 arc: M2 V00B0100 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F2 arc: N1_V02N0601 F4 arc: S3_V06S0303 F6 word: SLICEC.K1.INIT 0000110001000100 word: SLICEA.K0.INIT 1111101111001000 word: SLICEA.K1.INIT 1111101111111011 word: SLICED.K0.INIT 0000000000000001 word: SLICEB.K0.INIT 1111110010101010 word: SLICEB.K1.INIT 1111101011111111 word: SLICEC.K0.INIT 1101000010000000 word: SLICED.K1.INIT 1010111110100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C62:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 H02W0401 arc: H00R0100 H02E0501 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02E0301 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H02W0001 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 H01E0001 arc: V00B0000 S1_V02N0201 arc: V00B0100 H02E0701 arc: V00T0000 V02S0401 arc: V00T0100 V02N0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 S3_V06N0003 arc: A0 V01N0101 arc: A1 V01N0101 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 F5 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 V02N0301 arc: B0 V00B0000 arc: B1 V00B0000 arc: B2 H02E0101 arc: B3 Q3 arc: B5 S1_V02N0701 arc: B6 H02E0301 arc: B7 V02N0701 arc: C0 V02S0601 arc: C1 V02S0601 arc: C2 H00L0100 arc: C3 V02S0601 arc: C4 H02E0601 arc: C5 V02N0201 arc: C6 E1_H02W0601 arc: C7 V01N0101 arc: CE1 H00R0100 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 V02N0201 arc: D3 V02N0201 arc: D4 H02W0201 arc: D5 H00L0100 arc: D6 F2 arc: D7 S1_V02N0401 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 F4 arc: LSR0 H02W0501 arc: M0 V00T0000 arc: M2 V00B0100 arc: M3 H00R0000 arc: M4 W1_H02E0401 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0101 F0 arc: N1_V02N0401 Q4 arc: S1_V02S0101 Q3 arc: V01S0100 F6 word: SLICEC.K1.INIT 1010100000100000 word: SLICED.K1.INIT 0101000001000100 word: SLICEC.K0.INIT 0000000001010000 word: SLICEA.K0.INIT 1000110010000000 word: SLICEA.K1.INIT 1011111110110011 word: SLICEB.K0.INIT 1010001010000000 word: SLICEB.K1.INIT 1101111111010101 word: SLICED.K0.INIT 1110000000100000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C63:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 S3_V06N0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0301 arc: H00R0000 N1_V02S0601 arc: H00R0100 N1_V02S0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02W0701 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: V01S0000 S3_V06N0103 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02N0701 arc: B0 V01N0001 arc: B2 H01W0100 arc: B4 V02S0701 arc: C0 E1_H02W0401 arc: C2 N1_V01N0001 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D2 V02N0001 arc: D3 H02W0001 arc: D4 H01W0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q3 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q0 arc: H01W0100 Q7 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M3 W1_H02E0201 arc: M6 V00T0000 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q6 arc: V01S0100 Q4 arc: W3_H06W0203 Q4 word: SLICEA.K0.INIT 1011001110110011 word: SLICEB.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1111111100000000 word: SLICEC.K0.INIT 1100110000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 .tile R7C64:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 V02S0201 arc: H00R0000 N1_V02S0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0401 arc: S1_V02S0401 E1_H01W0000 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 H01E0101 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02E0601 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 V01N0001 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V02N0701 arc: A0 V01N0101 arc: A2 F5 arc: A3 E1_H02W0701 arc: A4 V00T0000 arc: A5 V02S0101 arc: A6 F7 arc: A7 Q7 arc: B0 V02S0101 arc: B1 V02S0101 arc: B3 H02E0301 arc: B4 V02S0701 arc: B5 H02W0301 arc: B6 N1_V01S0000 arc: B7 H02W0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02S0401 arc: C3 H00R0100 arc: C4 Q4 arc: C5 V01N0101 arc: C6 N1_V02S0201 arc: C7 E1_H01E0101 arc: CE0 E1_H02W0101 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D2 E1_H02W0201 arc: D3 W1_H02E0201 arc: D4 H02E0001 arc: D5 V02N0401 arc: D6 V02S0601 arc: D7 V00B0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M4 H02E0401 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q7 arc: V01S0000 F4 arc: V01S0100 F6 arc: W3_H06W0103 Q1 word: SLICEC.K0.INIT 0000000000100111 word: SLICEA.K0.INIT 1110001011100010 word: SLICEA.K1.INIT 1111111111000000 word: SLICEC.K1.INIT 0100110001011111 word: SLICEB.K0.INIT 1111010101010101 word: SLICED.K1.INIT 0000000010111000 word: SLICED.K0.INIT 1100110011001000 word: SLICEB.K1.INIT 0000000100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C65:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 E1_H01W0000 arc: S1_V02S0101 S3_V06N0103 arc: S1_V02S0401 H01E0001 arc: V00T0000 W1_H02E0001 arc: V00T0100 H02E0301 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 V02N0401 arc: A2 F7 arc: A3 W1_H02E0501 arc: A4 V00B0000 arc: A5 W1_H02E0501 arc: A6 S1_V02N0101 arc: A7 E1_H02W0701 arc: B0 V02S0301 arc: B3 Q3 arc: B4 V00B0100 arc: B5 E1_H02W0101 arc: B6 F3 arc: B7 V00B0100 arc: C0 S1_V02N0401 arc: C2 N1_V01N0001 arc: C3 E1_H02W0401 arc: C4 V00T0000 arc: C5 W1_H02E0601 arc: C6 F4 arc: C7 W1_H02E0601 arc: CE0 S1_V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 N1_V02S0201 arc: D3 W1_H02E0001 arc: D4 W1_H02E0201 arc: D5 H00L0100 arc: D6 H02E0001 arc: D7 V00B0000 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F2 arc: LSR0 H02W0301 arc: LSR1 H02E0501 arc: M3 H02E0201 arc: M4 W1_H02E0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: S3_V06S0003 Q0 arc: V00B0000 Q4 arc: V00B0100 Q7 word: SLICEC.K0.INIT 0101000000110000 word: SLICEB.K1.INIT 0000000001010011 word: SLICED.K0.INIT 1010101100000000 word: SLICED.K1.INIT 1110000001000000 word: SLICEC.K1.INIT 0000101100001000 word: SLICEB.K0.INIT 0000000000000101 word: SLICEA.K0.INIT 0011111111111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C66:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 N1_V01S0000 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H06E0303 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 N1_V01S0000 arc: W3_H06W0103 E3_H06W0003 arc: A2 H00L0100 arc: A4 H02W0701 arc: A7 V02N0101 arc: B2 H02E0101 arc: B4 H00L0000 arc: B7 V00T0000 arc: C2 N1_V01N0001 arc: C4 Q4 arc: C7 H01E0001 arc: CE0 V02S0201 arc: CE1 H00R0000 arc: CE2 E1_H02W0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D2 Q2 arc: D4 H00R0100 arc: D7 V02N0601 arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M2 V00B0000 arc: M4 H02E0401 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: V00T0000 F2 arc: V01S0000 F4 arc: W1_H02W0001 Q0 arc: W1_H02W0201 Q0 arc: W1_H02W0501 Q7 arc: W3_H06W0203 Q7 word: SLICEB.K0.INIT 0000001000010011 word: SLICED.K1.INIT 0101000001110000 word: SLICEC.K0.INIT 0000000011100100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C67:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0201 arc: H00R0000 V02S0401 arc: H00R0100 W1_H02E0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 V01N0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 S3_V06N0203 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 W1_H02E0701 arc: V00T0100 V02S0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0701 N1_V01S0100 arc: A0 W1_H02E0501 arc: A2 H00L0100 arc: B0 V00B0000 arc: B1 N1_V02S0101 arc: B2 V02S0301 arc: B3 H00L0000 arc: C2 H00L0000 arc: C3 H00L0100 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 N1_V02S0001 arc: D3 N1_V02S0001 arc: E1_H01E0001 F2 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: H00L0100 Q3 arc: LSR0 H02W0301 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M2 H02E0601 arc: M3 H00R0100 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: V00B0000 Q4 word: SLICEA.K0.INIT 1010101011001100 word: SLICEA.K1.INIT 1100110011001100 word: SLICEB.K0.INIT 0000000011001010 word: SLICEB.K1.INIT 0000000000110000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 .tile R7C68:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00R0000 V02S0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0701 H02E0701 arc: V00B0000 N1_V02S0201 arc: V00B0100 V02S0301 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V06S0303 arc: W3_H06W0203 E3_H06W0203 arc: A0 H00L0000 arc: A2 V00T0000 arc: A3 H02E0701 arc: A4 W1_H02E0701 arc: A5 Q5 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B2 V01N0001 arc: B3 V01N0001 arc: B4 V01S0000 arc: B5 V01S0000 arc: B6 F3 arc: B7 H02E0301 arc: C0 E1_H02W0601 arc: C2 H02W0401 arc: C3 N1_V01N0001 arc: C4 V00T0000 arc: C5 H02W0401 arc: C6 F4 arc: C7 V02S0001 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D2 H02W0201 arc: D3 V00T0100 arc: D4 N1_V02S0401 arc: D5 H02W0201 arc: D6 E1_H02W0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F0 arc: LSR0 H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M2 V00B0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: S1_V02S0001 Q2 arc: V00T0000 Q2 arc: V01S0000 Q7 arc: V01S0100 F2 arc: W1_H02W0401 F6 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 1100101000000000 word: SLICEB.K0.INIT 1010110000000000 word: SLICEA.K0.INIT 0101001111111111 word: SLICEC.K0.INIT 0001101100000000 word: SLICEB.K1.INIT 0001000100000101 word: SLICED.K0.INIT 1111110001010101 word: SLICED.K1.INIT 1011100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C69:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0201 arc: H00L0100 V02S0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 S3_V06N0003 arc: N3_V06N0103 S3_V06N0103 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 N1_V02S0501 arc: S1_V02S0701 V01N0101 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0501 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: A0 H01E0001 arc: A1 H01E0001 arc: A2 H02W0701 arc: A3 V02S0701 arc: A4 V02N0301 arc: A5 N1_V02S0101 arc: A6 W1_H02E0701 arc: A7 F5 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H00R0000 arc: B3 W1_H02E0301 arc: B4 V02N0701 arc: B5 S1_V02N0701 arc: B6 V02S0701 arc: B7 F3 arc: C0 N1_V01N0001 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 V00B0100 arc: C5 W1_H02E0601 arc: C6 Q6 arc: C7 V02S0001 arc: CE1 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 Q2 arc: D3 H02W0201 arc: D4 H00L0100 arc: D5 V01N0001 arc: D7 E1_H02W0201 arc: E1_H01E0001 F4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q6 arc: H01W0100 F0 arc: LSR0 H02E0501 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M2 V00T0000 arc: M6 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q2 arc: V00B0100 F7 arc: V01S0000 F6 word: SLICEB.K0.INIT 0011001000010000 word: SLICEA.K0.INIT 1111110010111000 word: SLICEA.K1.INIT 1111111110111011 word: SLICED.K0.INIT 0010011100100111 word: SLICEB.K1.INIT 0000000010111000 word: SLICEC.K1.INIT 0011001100110001 word: SLICED.K1.INIT 1010101010101000 word: SLICEC.K0.INIT 1100000011001000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C70:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02W0701 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02E0701 arc: V00B0000 V02N0001 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 H01E0101 arc: A0 V02N0701 arc: A1 H02W0501 arc: A2 H02E0701 arc: A4 V00T0100 arc: A6 N1_V01N0101 arc: A7 S1_V02N0101 arc: B0 V02N0101 arc: B1 Q1 arc: B2 H01W0100 arc: B4 H01E0101 arc: B6 H02W0101 arc: B7 V00T0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 N1_V01N0001 arc: C4 Q4 arc: C6 E1_H01E0101 arc: C7 F4 arc: CE0 H00R0100 arc: CE1 H00L0100 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V01S0100 arc: D2 H02E0201 arc: D4 H02E0201 arc: D7 W1_H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q6 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0301 arc: M0 H02W0601 arc: M1 H00L0000 arc: M2 V00B0000 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q6 arc: V00T0000 F2 arc: V00T0100 Q1 arc: V01S0000 F0 arc: V01S0100 Q4 word: SLICEC.K0.INIT 0100011100000000 word: SLICEB.K0.INIT 0000000000100111 word: SLICED.K1.INIT 0000000010101011 word: SLICED.K0.INIT 0100011101000111 word: SLICEA.K0.INIT 1111110101011101 word: SLICEA.K1.INIT 1000101010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C71:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 N1_V02S0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0401 W1_H02E0401 arc: V00B0100 N1_V02S0101 arc: V00T0000 W1_H02E0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 W3_H06E0203 arc: A5 V00T0000 arc: B5 N1_V01S0000 arc: C5 E1_H02W0401 arc: CE0 H00L0000 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D5 E1_H01W0100 arc: E1_H01E0001 Q0 arc: E1_H02E0101 Q3 arc: E1_H02E0601 Q4 arc: E1_H02E0701 Q7 arc: F5 F5_SLICE arc: LSR0 H02E0501 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M3 H02E0201 arc: M4 V00B0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0501 Q7 arc: S1_V02S0701 F5 arc: V01S0100 Q3 word: SLICEC.K1.INIT 0000001010100010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C72:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0201 H06E0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H06E0203 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: A0 H02W0701 arc: A1 H02W0701 arc: A2 W1_H02E0701 arc: A3 E1_H02W0701 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 H02E0501 arc: B0 V02S0101 arc: B2 V01N0001 arc: B3 H02W0101 arc: B4 H02E0301 arc: B5 H02E0301 arc: B6 H02E0301 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 F4 arc: C3 N1_V01N0001 arc: C4 Q4 arc: C5 H02E0601 arc: C6 H01E0001 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 S1_V02N0201 arc: D3 V01S0100 arc: D4 H01W0000 arc: D5 H00R0100 arc: D6 H00L0100 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q3 arc: H01W0100 F0 arc: LSR0 H02W0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M3 H00L0000 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F5 arc: S1_V02S0101 F3 arc: V00B0000 F6 arc: V01S0000 F2 arc: V01S0100 Q3 word: SLICEC.K0.INIT 0000000100100011 word: SLICEB.K0.INIT 0000001010101010 word: SLICED.K0.INIT 0000100001001100 word: SLICEC.K1.INIT 0000000100100011 word: SLICEA.K0.INIT 1100111111001010 word: SLICEA.K1.INIT 1111111111111010 word: SLICEB.K1.INIT 0101010000010000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C73:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02N0001 arc: H00L0100 H02E0301 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H06W0303 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: V00B0000 V02N0001 arc: V00B0100 H02E0701 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W3_H06W0103 E3_H06W0003 arc: A0 V02N0501 arc: A1 E1_H02W0701 arc: A3 S1_V02N0701 arc: A5 V00T0100 arc: B0 W1_H02E0301 arc: B1 H01W0100 arc: B3 Q3 arc: B5 W1_H02E0301 arc: C0 E1_H02W0401 arc: C1 V02N0601 arc: C3 H02E0601 arc: C5 E1_H02W0601 arc: CE0 V02N0201 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00T0100 arc: D3 H02E0001 arc: D5 H01W0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: H01W0000 Q5 arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M3 H00L0000 arc: M5 H00L0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F3 arc: N1_V01N0101 F1 arc: N1_V02N0001 Q0 arc: N1_V02N0701 Q7 arc: V00T0100 Q3 arc: V01S0100 Q7 arc: W1_H02W0001 F0 arc: W1_H02W0701 F5 word: SLICEC.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 0000010011000100 word: SLICEB.K1.INIT 0000000011100100 word: SLICEA.K1.INIT 0100010101000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C74:PLC2 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02N0101 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06E0203 arc: V00B0000 V02N0001 arc: V00T0100 V02S0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 E1_H01W0000 arc: A0 H00L0000 arc: A2 V00B0000 arc: A3 V02N0701 arc: A4 V02N0301 arc: A7 E1_H02W0701 arc: B0 V00T0000 arc: B2 V01N0001 arc: B3 H02E0301 arc: B4 V00B0100 arc: B7 F3 arc: C0 H02W0601 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 V00T0100 arc: CE0 H00L0100 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D2 H02W0001 arc: D3 H02W0001 arc: D4 E1_H02W0201 arc: D7 F2 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0501 arc: M0 H02E0601 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0001 Q0 arc: V00B0100 F7 arc: V00T0000 Q0 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 0000000001010011 word: SLICEB.K1.INIT 0000000010101100 word: SLICEB.K0.INIT 1100101000000000 word: SLICED.K1.INIT 0000000000100010 word: SLICEC.K0.INIT 1110000011101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C75:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 S1_V02N0001 arc: H00R0100 W1_H02E0701 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: V00B0100 W1_H02E0701 arc: W1_H02W0001 V02N0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V02N0701 arc: A0 F5 arc: A1 F5 arc: A2 H02E0701 arc: A3 H00L0100 arc: A4 V00B0000 arc: A5 V00T0100 arc: A7 N1_V01S0100 arc: B0 E1_H01W0100 arc: B2 H00R0000 arc: B3 H01W0100 arc: B4 V02N0701 arc: B5 H01E0101 arc: B7 N1_V02S0701 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H00L0100 arc: C3 H02E0601 arc: C4 V02N0201 arc: C5 W1_H02E0401 arc: C7 W1_H02E0401 arc: CE1 H00L0000 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V02N0001 arc: D3 H00R0000 arc: D4 H00L0100 arc: D5 H02E0201 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H00R0000 Q4 arc: LSR1 H02W0501 arc: M0 H02W0601 arc: M3 H00R0100 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 F2 arc: V00B0000 Q4 arc: V00T0100 F3 arc: V01S0100 F7 arc: W3_H06W0003 F0 word: SLICEA.K0.INIT 1100000011100000 word: SLICEA.K1.INIT 0000000010100000 word: SLICEB.K1.INIT 0100000001110000 word: SLICED.K1.INIT 1110000011100000 word: SLICEC.K1.INIT 0000000011110001 word: SLICEB.K0.INIT 1110010000000000 word: SLICEC.K0.INIT 1100100000001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C76:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 W1_H02E0301 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0201 H02E0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 N1_V02S0301 arc: S1_V02S0701 H06E0203 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: V00T0000 V02S0401 arc: V00T0100 W1_H02E0301 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 V02N0501 arc: A3 H02E0501 arc: A4 S1_V02N0101 arc: B0 V01N0001 arc: B2 V02N0101 arc: B3 Q3 arc: B4 F3 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 W1_H02E0401 arc: C3 N1_V01N0001 arc: C4 H02W0401 arc: CE1 H02E0101 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 V02N0201 arc: D3 H02E0201 arc: D4 W1_H02E0201 arc: E1_H02E0101 Q3 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: H01W0100 F4 arc: LSR0 V00T0000 arc: LSR1 V00B0100 arc: M0 V00B0000 arc: M3 H00L0100 arc: M4 V00T0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: W1_H02W0201 F0 word: SLICEB.K1.INIT 0010011100000000 word: SLICEC.K0.INIT 1010101100000000 word: SLICEB.K0.INIT 0000000010101100 word: SLICEA.K0.INIT 1110111011100100 word: SLICEA.K1.INIT 1111111111110101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C77:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 S1_V02N0501 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 H02E0401 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 W3_H06E0303 arc: A1 H00R0000 arc: A3 V00B0000 arc: B1 H02E0101 arc: B3 H02E0101 arc: C1 V02N0601 arc: C3 S1_V02N0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D1 E1_H02W0201 arc: D3 V02N0201 arc: E1_H01E0101 Q0 arc: F1 F1_SLICE arc: F3 F3_SLICE arc: LSR0 H02E0501 arc: M0 H01E0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 F1 arc: N1_V02N0301 F3 word: SLICEB.K1.INIT 1100101000000000 word: SLICEA.K1.INIT 1100000010100000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C78:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00R0000 N1_V02S0401 arc: H00R0100 H02E0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02S0001 arc: V00B0100 V02N0301 arc: W1_H02W0401 V02N0401 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 V02N0701 arc: A3 H02W0701 arc: A4 F5 arc: A5 E1_H01W0000 arc: A6 N1_V01S0100 arc: A7 Q7 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 V02S0301 arc: B3 H01W0100 arc: B4 V02N0701 arc: B5 H02W0101 arc: B6 H02E0301 arc: B7 W1_H02E0301 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 E1_H01E0101 arc: C5 E1_H02W0601 arc: C6 V02N0001 arc: C7 H02W0601 arc: CE0 H00R0000 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H01E0101 arc: D2 F0 arc: D3 V01S0100 arc: D4 V02S0601 arc: D5 H01W0000 arc: D6 W1_H02E0201 arc: D7 H02E0201 arc: E1_H01E0001 Q1 arc: E1_H01E0101 F3 arc: E1_H02E0301 Q3 arc: E1_H02E0701 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q7 arc: H01W0100 Q5 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0000 arc: M0 V00B0100 arc: M1 W1_H02E0001 arc: M3 H00L0000 arc: M5 W1_H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q1 arc: N1_V02N0701 F7 arc: S1_V02S0401 F4 arc: V01S0000 F2 arc: V01S0100 Q3 arc: W3_H06W0303 F6 word: SLICED.K1.INIT 0000000000011101 word: SLICED.K0.INIT 0100010000001100 word: SLICEA.K0.INIT 1100100000001000 word: SLICEA.K1.INIT 1111101100111011 word: SLICEC.K1.INIT 0000101100001000 word: SLICEB.K1.INIT 1101000010000000 word: SLICEC.K0.INIT 0011001000110011 word: SLICEB.K0.INIT 1000101010000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C79:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 E1_H01W0100 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0303 S3_V06N0303 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 W3_H06E0203 arc: V00B0100 H02W0701 arc: V00T0000 H02E0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 V02N0201 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0701 W3_H06E0203 arc: A0 V01N0101 arc: A1 H00L0000 arc: A2 S1_V02N0701 arc: A3 F7 arc: A4 H02E0701 arc: A5 V02N0301 arc: A6 V02N0101 arc: A7 F5 arc: B0 H02W0301 arc: B2 H02E0301 arc: B3 N1_V02S0101 arc: B4 V01S0000 arc: B5 H00R0000 arc: C0 H00L0000 arc: C1 F4 arc: C2 H02E0401 arc: C3 H02E0601 arc: C4 W1_H02E0401 arc: C5 S1_V02N0001 arc: C6 S1_V02N0001 arc: C7 V02N0001 arc: CE2 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0001 arc: D1 E1_H02W0001 arc: D2 H02E0201 arc: D3 F0 arc: D4 H02E0201 arc: D5 H02E0201 arc: D6 V01N0001 arc: D7 E1_H02W0001 arc: E1_H01E0101 F4 arc: E1_H02E0601 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0000 Q4 arc: LSR1 E1_H02W0301 arc: M0 V00B0100 arc: M4 V00T0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR1 arc: V01S0000 Q4 arc: W1_H02W0601 Q4 arc: W3_H06W0003 F3 word: SLICEC.K0.INIT 0000000011001010 word: SLICEB.K0.INIT 1110010000000000 word: SLICEA.K0.INIT 1111110010101010 word: SLICEA.K1.INIT 1111101011111111 word: SLICEC.K1.INIT 1110001000000000 word: SLICED.K1.INIT 0000000000000101 word: SLICEB.K1.INIT 1110000011101111 word: SLICED.K0.INIT 1111010110100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C7:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R7C80:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02N0001 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: S1_V02S0001 H06E0003 arc: S1_V02S0301 N1_V02S0301 arc: S1_V02S0601 H02W0601 arc: V00B0100 N1_V02S0101 arc: V00T0100 H02E0101 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 H01E0101 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 V02N0701 arc: A2 V00T0000 arc: B0 V02S0301 arc: C0 N1_V01N0001 arc: C2 S1_V02N0401 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CE2 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D2 V00B0100 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: LSR0 V00T0100 arc: LSR1 W1_H02E0501 arc: M4 H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: V00T0000 Q0 arc: V01S0000 Q2 word: SLICEA.K0.INIT 0000111111001100 word: SLICEB.K0.INIT 1010111110100000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C81:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W1_H02E0301 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0201 N1_V02S0201 arc: S1_V02S0501 N1_V01S0100 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0003 H06W0003 arc: V00B0000 V02S0201 arc: V00T0100 W1_H02E0101 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02N0601 arc: A1 V02S0701 arc: A2 V00B0000 arc: B0 H02E0101 arc: B1 V02S0101 arc: C0 H02W0601 arc: C2 H02W0401 arc: CE0 H02W0101 arc: CE1 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 H02W0201 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: LSR0 W1_H02E0501 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: N1_V01N0101 Q1 arc: S1_V02S0001 Q2 arc: S1_V02S0101 Q1 arc: V01S0000 Q0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1010101011001100 word: SLICEB.K0.INIT 1111101000001010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C82:PLC2 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 H02E0001 arc: H00R0000 H02W0601 arc: H00R0100 V02S0501 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H01E0101 arc: S1_V02S0201 N1_V02S0701 arc: V00B0000 V02S0001 arc: V00T0000 V02N0601 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 N1_V01S0000 arc: A3 V02S0701 arc: A4 N1_V02S0101 arc: A6 H02W0701 arc: B0 V02S0301 arc: B1 H01W0100 arc: B2 H02W0301 arc: B3 W1_H02E0301 arc: B5 W1_H02E0301 arc: C0 N1_V01S0100 arc: C1 V02S0401 arc: C2 H02W0401 arc: C4 V00T0000 arc: C5 N1_V02S0201 arc: C6 H02E0601 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 H02W0001 arc: D2 W1_H02E0201 arc: D3 H02W0001 arc: D4 H00R0100 arc: D5 H00R0100 arc: D6 H00R0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q5 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q1 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: LSR0 H02E0501 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: S1_V02S0101 Q1 arc: S1_V02S0501 Q5 arc: V01S0000 Q3 arc: W1_H02W0201 Q0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1111001111000000 word: SLICEA.K1.INIT 1111000011001100 word: SLICEB.K1.INIT 1010101011001100 word: SLICED.K0.INIT 1010101011110000 word: SLICEC.K0.INIT 1010101011110000 word: SLICEC.K1.INIT 1111000011001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C83:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 S1_V02N0401 arc: H00L0100 V02S0101 arc: H00R0100 H02E0701 arc: N1_V02N0101 H02E0101 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 N1_V02S0001 arc: S1_V02S0301 E1_H01W0100 arc: V00B0000 S1_V02N0201 arc: V00T0000 V02S0601 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 N1_V02S0601 arc: W1_H02W0701 N1_V02S0701 arc: A1 V02S0701 arc: A4 H02E0501 arc: A5 H02E0501 arc: A6 V00T0100 arc: A7 H00L0000 arc: B0 V00T0000 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 W1_H02E0101 arc: B5 N1_V02S0501 arc: C0 V02N0601 arc: C1 E1_H02W0601 arc: C2 N1_V01S0100 arc: C3 H00L0100 arc: C5 E1_H02W0601 arc: C6 W1_H02E0401 arc: C7 H01E0001 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CE2 N1_V02S0601 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 E1_H02W0001 arc: D3 H02W0201 arc: D4 N1_V02S0401 arc: D6 V02S0401 arc: D7 V02S0401 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q2 arc: E1_H02E0201 Q2 arc: E1_H02E0501 Q5 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: LSR0 E1_H02W0301 arc: LSR1 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q4 arc: N1_V02N0201 Q0 arc: N1_V02N0301 Q3 arc: N1_V02N0501 Q5 arc: S1_V02S0601 Q6 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q1 word: SLICEA.K0.INIT 1100110011110000 word: SLICEA.K1.INIT 1010101011110000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111001111000000 word: SLICED.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1010101011110000 word: SLICEC.K1.INIT 1101100011011000 word: SLICEC.K0.INIT 1110111001000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C84:PLC2 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 N1_V01S0000 arc: E1_H02E0701 V02S0701 arc: H00L0100 N1_V02S0101 arc: H00R0000 H02E0401 arc: H00R0100 V02N0701 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 S3_V06N0203 arc: V00B0000 H02E0601 arc: V00T0000 V02S0401 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0201 W3_H06E0103 arc: A3 V00B0000 arc: A4 H02E0501 arc: A5 V00T0000 arc: B0 W1_H02E0301 arc: B1 W1_H02E0301 arc: C3 V02S0401 arc: C4 H01E0001 arc: C5 W1_H02E0601 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 W1_H02E0201 arc: D3 H02E0201 arc: D4 V02S0401 arc: D5 W1_H02E0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0100 Q5 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0301 arc: M6 E1_H02W0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V02N0001 Q0 arc: N1_V02N0101 Q1 arc: S1_V02S0101 Q3 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 0011001100000000 word: SLICEA.K1.INIT 0011001100000000 word: SLICEB.K1.INIT 1111101000001010 word: SLICEC.K0.INIT 1111000010101010 word: SLICEC.K1.INIT 1111101001010000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C85:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 S3_V06N0303 arc: E1_H02E0701 S3_V06N0203 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 H02E0501 arc: V00B0100 N1_V02S0101 arc: V00T0000 H02W0001 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 E1_H01W0100 arc: W1_H02W0601 W3_H06E0303 arc: A0 H00L0100 arc: A1 E1_H01E0001 arc: A2 V00T0000 arc: A3 V00T0000 arc: A4 H02E0701 arc: A7 N1_V01S0100 arc: B0 H02E0301 arc: B1 S1_V02N0301 arc: B2 V02S0101 arc: B3 V02S0101 arc: B6 S1_V02N0701 arc: B7 N1_V02S0701 arc: C0 E1_H02W0401 arc: C1 V02N0401 arc: C2 V02N0601 arc: C3 V02N0601 arc: C4 V00B0100 arc: C6 E1_H01E0101 arc: CE0 H00R0100 arc: CE1 S1_V02N0201 arc: CE2 H00R0000 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 S1_V02N0001 arc: D2 H02W0201 arc: D3 H02W0201 arc: D4 W1_H02E0001 arc: D6 N1_V02S0401 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0100 Q4 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0301 arc: M2 V00T0100 arc: M3 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V02N0101 Q3 arc: S1_V02S0201 Q0 arc: V00T0100 F1 arc: V01S0100 Q6 word: SLICEA.K1.INIT 0011000111111101 word: SLICEB.K0.INIT 1000110111011101 word: SLICEB.K1.INIT 1000100011011000 word: SLICEC.K0.INIT 1010101011110000 word: SLICED.K0.INIT 1111001111000000 word: SLICED.K1.INIT 1010101011001100 word: SLICEA.K0.INIT 1010101010101100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 1 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C86:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 W3_H06E0203 arc: H00L0000 E1_H02W0001 arc: H00L0100 N1_V02S0301 arc: H00R0000 S1_V02N0601 arc: H01W0100 W3_H06E0303 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0601 W1_H02E0601 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0301 H02E0301 arc: V00B0100 V02S0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 S3_V06N0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 V02N0401 arc: A0 H02E0701 arc: A1 E1_H02W0501 arc: A2 H00L0100 arc: A4 V02N0101 arc: A5 N1_V01N0101 arc: A7 V02S0301 arc: B0 S1_V02N0301 arc: B1 S1_V02N0301 arc: B2 H02E0301 arc: B4 S1_V02N0501 arc: B5 V02N0701 arc: B7 S1_V02N0701 arc: C0 V02N0601 arc: C1 H02E0401 arc: C2 E1_H02W0601 arc: C4 V00B0100 arc: C5 S1_V02N0001 arc: C7 E1_H02W0601 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V02N0201 arc: D4 W1_H02E0201 arc: D5 W1_H02E0201 arc: D7 H02W0001 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 H02E0501 arc: LSR1 E1_H02W0301 arc: M0 H02W0601 arc: M1 V01S0100 arc: M2 N1_V01N0001 arc: M4 E1_H01E0101 arc: M6 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V02N0401 Q6 arc: N1_V02N0501 Q7 arc: V00T0000 F0 arc: V01S0100 Q2 word: SLICED.K1.INIT 0011001111110101 word: SLICEA.K0.INIT 1100110001011111 word: SLICEA.K1.INIT 1100110000001010 word: SLICEB.K0.INIT 0011000111111101 word: SLICEC.K0.INIT 1101000111110011 word: SLICEC.K1.INIT 1010000010101100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C87:PLC2 arc: E1_H02E0601 W1_H02E0601 arc: H00R0000 H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 N1_V01S0100 arc: S1_V02S0501 N1_V02S0401 arc: S1_V02S0601 V01N0001 arc: V00B0000 V02S0201 arc: V00T0000 H02E0001 arc: V00T0100 W1_H02E0301 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 V02S0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 H01E0001 arc: A0 V02N0701 arc: A1 V02N0701 arc: A3 V02S0701 arc: A5 V02S0301 arc: A7 V02S0101 arc: B0 V00T0000 arc: B1 V00T0000 arc: B3 S1_V02N0101 arc: B5 W1_H02E0301 arc: B7 H02W0101 arc: C0 V02S0601 arc: C1 V02S0601 arc: C3 V02N0601 arc: C5 H02W0601 arc: C7 V00T0100 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D3 V00T0100 arc: D5 H02E0201 arc: D7 V02N0601 arc: E1_H01E0001 F7 arc: E1_H02E0101 F3 arc: F0 F5A_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q3 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M1 H00L0000 arc: M2 N1_V01N0001 arc: M3 W1_H02E0201 arc: M4 E1_H02W0401 arc: M6 N1_V01N0101 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F0 arc: N1_V02N0301 Q1 arc: N1_V02N0501 Q7 arc: N1_V02N0601 Q4 arc: V00B0100 F5 word: SLICEC.K1.INIT 0011000111111101 word: SLICEA.K0.INIT 1101111100010011 word: SLICEA.K1.INIT 1100111000000010 word: SLICED.K1.INIT 0011111100110101 word: SLICEB.K1.INIT 0011001111110101 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R7C88:PLC2 arc: H00R0100 V02N0701 arc: N1_V02N0101 V01N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 V01N0001 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0301 H02W0301 arc: V00T0100 H02E0101 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 V02N0601 arc: A0 W1_H02E0501 arc: A1 W1_H02E0501 arc: A4 V02N0301 arc: A5 V02N0301 arc: B0 H00R0100 arc: B1 H00R0100 arc: B4 S1_V02N0501 arc: B5 V02N0501 arc: C0 V02N0401 arc: C1 V02N0401 arc: C4 H02E0601 arc: C5 H02E0601 arc: D0 V01S0100 arc: D1 V01S0100 arc: D4 V02N0401 arc: D5 W1_H02E0001 arc: F0 F5A_SLICE arc: F4 F5C_SLICE arc: H01W0000 F4 arc: M0 H01E0001 arc: M4 V00T0100 arc: W1_H02W0001 F0 word: SLICEA.K0.INIT 1000110111011101 word: SLICEA.K1.INIT 1000100011011000 word: SLICEC.K0.INIT 1000101110111011 word: SLICEC.K1.INIT 1010101000001100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ .tile R8C13:PLC2 arc: E3_H06E0003 W3_H06E0303 .tile R8C15:PLC2 arc: W3_H06W0103 E3_H06W0003 .tile R8C19:PLC2 arc: E1_H02E0301 W3_H06E0003 arc: E3_H06E0003 W3_H06E0003 .tile R8C21:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: W3_H06W0003 E3_H06W0003 .tile R8C22:PLC2 arc: H00R0100 V02S0701 arc: CLK0 G_HPBX0000 arc: E1_H02E0501 Q7 arc: LSR0 H02E0301 arc: M7 H00R0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C23:PLC2 arc: H00R0100 V02N0701 arc: CLK0 G_HPBX0000 arc: LSR0 E1_H02W0301 arc: M7 H00R0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V01S0000 Q7 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C24:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0701 E3_H06W0203 .tile R8C25:PLC2 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 S3_V06N0203 arc: V00B0100 H02E0701 arc: W1_H02W0301 W3_H06E0003 arc: CLK0 G_HPBX0000 arc: E1_H02E0301 Q1 arc: LSR0 V00B0100 arc: M1 H02E0001 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C27:PLC2 arc: E1_H02E0601 W1_H02E0301 arc: S1_V02S0401 H06W0203 arc: W3_H06W0003 E3_H06W0003 .tile R8C29:PLC2 arc: H00R0000 W1_H02E0601 arc: S1_V02S0401 E3_H06W0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 V02N0001 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q5 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q1 arc: E3_H06E0303 Q5 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M1 V01S0100 arc: M2 V00B0000 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: V01S0100 Q2 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C30:PLC2 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 V01N0001 arc: E3_H06E0103 H01E0101 arc: H00R0100 H02W0701 arc: N1_V02N0001 V01N0001 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0501 V02N0501 arc: W3_H06W0203 E1_H01W0000 arc: A0 E1_H01E0001 arc: C0 H00L0000 arc: C1 H00L0000 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 Q2 arc: E1_H01E0001 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0101 Q1 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H00L0000 Q2 arc: LSR0 H02W0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: V01S0100 Q1 word: SLICEA.K0.INIT 0101101010101010 word: SLICEA.K1.INIT 0000111111110000 word: SLICEB.K0.INIT 0000000011111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C31:PLC2 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H01W0000 W3_H06E0103 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 H02E0601 arc: V00T0000 H02E0001 arc: A0 V02S0701 arc: A1 V02S0701 arc: A2 V00T0000 arc: A3 H01E0001 arc: A4 N1_V01S0100 arc: A6 F5 arc: B1 W1_H02E0301 arc: B2 H02E0101 arc: B3 H02E0101 arc: B5 V02S0701 arc: B7 W1_H02E0301 arc: C0 H02E0601 arc: C1 H02E0601 arc: C2 N1_V01S0100 arc: C5 H02E0401 arc: C7 H02E0601 arc: CLK0 G_HPBX0000 arc: D1 W1_H02E0201 arc: D2 H02E0201 arc: D3 H02E0001 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 H00R0100 arc: D7 W1_H02E0201 arc: E1_H01E0101 F4 arc: E1_H02E0401 F4 arc: E3_H06E0003 Q0 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: M2 H02E0601 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: V00B0100 F5 arc: V01S0000 F1 arc: W1_H02W0501 F5 arc: W1_H02W0701 F7 word: SLICED.K1.INIT 0000001100000000 word: SLICED.K0.INIT 1010101011111111 word: SLICEA.K0.INIT 0101000001010000 word: SLICEC.K0.INIT 0101010100000000 word: SLICEB.K0.INIT 0000111100001110 word: SLICEB.K1.INIT 1111111111101110 word: SLICEA.K1.INIT 0000101000001110 word: SLICEC.K1.INIT 1111000011111100 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R8C32:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: H00L0000 W1_H02E0001 arc: N1_V02N0101 H01E0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 H02E0601 arc: S1_V02S0701 H02W0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: V00B0000 H02W0401 arc: A5 V00B0000 arc: A6 F5 arc: A7 V02N0301 arc: B0 W1_H02E0101 arc: B5 V02N0501 arc: B6 S1_V02N0501 arc: B7 E1_H02W0301 arc: C0 H00L0000 arc: C5 S1_V02N0201 arc: C6 V00B0100 arc: C7 S1_V02N0201 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 V00B0000 arc: E1_H02E0001 F0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR1 W1_H02E0301 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: V00B0100 F7 arc: V01S0000 F6 word: SLICEA.K0.INIT 1100000000000000 word: SLICED.K1.INIT 0101000000110000 word: SLICEC.K1.INIT 0000000100001011 word: SLICED.K0.INIT 0000010011001100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R8C33:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 E3_H06W0103 arc: H00L0000 V02N0001 arc: H00L0100 N1_V02S0101 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A0 V02S0701 arc: C0 V02S0601 arc: C4 W1_H02E0401 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D4 H02E0001 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F4 arc: E1_H02E0201 Q2 arc: E1_H02E0301 Q3 arc: E1_H02E0401 F4 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: H01W0000 Q5 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 E1_H02W0601 arc: M3 H01W0100 arc: M4 V00B0000 arc: M5 H00R0100 arc: M6 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00B0000 Q6 arc: V00B0100 Q7 arc: V01S0000 Q3 arc: W3_H06W0003 Q0 word: SLICEC.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1010111100001111 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C34:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02N0601 arc: H00R0000 H02E0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: V00B0000 E1_H02W0601 arc: V00T0000 E1_H02W0201 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H02W0701 arc: B0 V00B0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0001 arc: E1_H02E0201 Q0 arc: E1_H02E0301 Q1 arc: E3_H06E0003 Q3 arc: E3_H06E0203 Q7 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M3 W1_H02E0201 arc: M4 V00T0000 arc: M5 H02E0001 arc: M6 V00T0100 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: S3_V06S0203 Q4 arc: S3_V06S0303 Q5 arc: V01S0000 Q4 arc: V01S0100 Q5 word: SLICEA.K1.INIT 1010111110100000 word: SLICEA.K0.INIT 1100111111000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 .tile R8C35:PLC2 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0701 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 E1_H02W0401 arc: S1_V02S0301 V01N0101 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0203 arc: A5 E1_H02W0701 arc: CLK0 G_HPBX0000 arc: D5 V02N0401 arc: F5 F5_SLICE arc: H01W0000 Q7 arc: LSR0 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: V00B0100 F5 word: SLICEC.K1.INIT 1010101011111111 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C36:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: H00R0000 W1_H02E0601 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S1_V02N0301 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E1_H01W0100 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00B0100 H02E0701 arc: V00T0000 W1_H02E0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 N3_V06S0203 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00R0000 arc: A3 V00B0000 arc: A5 V02N0101 arc: B2 V02N0301 arc: B4 N1_V01S0000 arc: B6 V00T0000 arc: B7 W1_H02E0301 arc: CE0 W1_H02E0101 arc: CE2 W1_H02E0101 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q6 arc: E3_H06E0003 Q0 arc: E3_H06E0303 Q6 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M5 W1_H02E0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V02N0501 Q5 arc: N3_V06N0303 Q6 arc: S3_V06S0303 Q5 arc: V01S0000 F4 arc: V01S0100 Q5 arc: W1_H02W0501 F5 arc: W1_H02W0601 F6 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011100 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C37:PLC2 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 V02S0401 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 H01E0101 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 H06E0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 V02N0401 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02W0501 arc: A3 V00T0000 arc: A5 V02S0101 arc: B1 H02E0101 arc: B2 H00R0000 arc: B4 V02S0701 arc: B6 N1_V01S0000 arc: B7 V02N0701 arc: E1_H01E0001 F1 arc: E1_H01E0101 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F3 arc: H01W0100 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: N1_V02N0201 F2 arc: N1_V02N0401 F6 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0011001100111100 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C38:PLC2 arc: E3_H06E0003 W3_H06E0003 arc: H00L0000 E1_H02W0201 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 S3_V06N0103 arc: S1_V02S0501 H06W0303 arc: S3_V06S0203 H06W0203 arc: V00B0000 V02S0001 arc: V00T0000 E1_H02W0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 V02S0501 arc: A1 E1_H02W0701 arc: A2 V00B0000 arc: A4 V02S0101 arc: A5 V00T0000 arc: A7 H00L0000 arc: B3 V02S0301 arc: B6 E1_H02W0101 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: E1_H02E0101 F1 arc: E1_H02E0401 F6 arc: E1_H02E0501 F7 arc: E1_H02E0701 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F4 arc: N1_V01N0101 F0 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0101010101011010 word: SLICEB.K0.INIT 0101010101011010 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0101010101011010 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0101010101011010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C39:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 W1_H02E0601 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 N1_V02S0501 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00T0100 H02W0101 arc: W1_H02W0201 V06S0103 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0701 arc: A6 V02N0301 arc: A7 V00T0100 arc: B1 V00B0000 arc: B6 V00B0100 arc: B7 V02N0501 arc: C6 V02S0201 arc: C7 V02N0001 arc: D6 H02W0001 arc: D7 H02W0201 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: V00B0100 F7 arc: V01S0100 F0 word: SLICED.K1.INIT 0000000000000001 word: SLICED.K0.INIT 0000000000000100 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R8C3:PLC2 arc: S3_V06S0203 E3_H06W0203 .tile R8C40:PLC2 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02S0501 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 N1_V02S0501 arc: S1_V02S0101 H02W0101 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H06E0303 arc: S1_V02S0701 H01E0101 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02W0501 arc: V00T0100 E1_H02W0101 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 W1_H02E0701 arc: A1 H00R0000 arc: A2 W1_H02E0501 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: CE0 H00R0100 arc: CE1 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 V00T0100 arc: D2 V00B0100 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: LSR0 H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: V01S0000 Q2 arc: V01S0100 Q0 arc: W1_H02W0001 Q0 arc: W1_H02W0101 Q1 arc: W1_H02W0201 Q2 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1010111110100000 word: SLICEB.K0.INIT 1010111110100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R8C41:PLC2 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 V06S0003 arc: E1_H02E0501 E3_H06W0303 arc: E3_H06E0003 W1_H02E0001 arc: H00L0000 W1_H02E0001 arc: H00R0100 H02W0501 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 E1_H01W0100 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 V02N0401 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A2 V02N0701 arc: A3 H02E0501 arc: A4 E1_H02W0501 arc: A5 W1_H02E0701 arc: A6 S1_V02N0101 arc: A7 H02W0701 arc: B2 V02N0301 arc: B3 H00R0100 arc: B4 V02N0501 arc: B5 E1_H02W0101 arc: B6 V00T0000 arc: B7 S1_V02N0501 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N1_V02N0001 F2 arc: N1_V02N0101 F3 arc: N1_V02N0401 F4 arc: N1_V02N0601 F6 arc: N1_V02N0701 F7 arc: V01S0000 F2 arc: W1_H02W0601 F4 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C42:PLC2 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: H00R0000 V02N0401 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 V01N0001 arc: N1_V02N0501 N1_V01S0100 arc: N3_V06N0103 V01N0101 arc: S1_V02S0001 S3_V06N0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 E1_H02W0401 arc: V00T0000 N1_V02S0401 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N3_V06S0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 V02N0701 arc: A1 V02S0501 arc: A2 V00B0000 arc: A3 V01N0101 arc: A4 S1_V02N0301 arc: A5 E1_H02W0701 arc: A6 H02W0701 arc: A7 E1_H01W0000 arc: B0 N1_V02S0101 arc: B1 H02E0301 arc: B2 V02N0301 arc: B3 V02N0101 arc: B4 H02W0301 arc: B5 H00R0000 arc: B6 V02S0701 arc: B7 V00T0000 arc: E1_H01E0001 F7 arc: E1_H01E0101 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 F0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F3 arc: N1_V02N0001 F2 arc: N1_V02N0301 F3 arc: N1_V02N0401 F4 arc: N1_V02N0601 F4 arc: N1_V02N0701 F7 arc: V01S0000 F6 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101100 word: SLICEC.K0.INIT 0110011001101100 word: SLICEC.K1.INIT 0110011001101010 word: SLICED.K0.INIT 0110011001101010 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C43:PLC2 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 E1_H02W0601 arc: H01W0000 E3_H06W0103 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0501 S3_V06N0303 arc: N1_V02N0601 H02W0601 arc: N3_V06N0003 S3_V06N0303 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 S1_V02N0501 arc: A1 V02S0701 arc: A2 H02E0701 arc: A3 E1_H02W0701 arc: A4 H02E0501 arc: A5 S1_V02N0301 arc: A6 H00R0000 arc: A7 W1_H02E0501 arc: B0 H02W0101 arc: B1 H02W0301 arc: B2 V02S0301 arc: B3 V02S0101 arc: B4 E1_H02W0301 arc: B5 N1_V02S0501 arc: B6 H02E0101 arc: B7 E1_H02W0101 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0401 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F5 arc: N1_V01N0101 F0 arc: N1_V02N0201 F2 arc: N1_V02N0301 F3 arc: N1_V02N0401 F4 arc: N1_V02N0701 F5 arc: V01S0000 F1 word: SLICEA.K0.INIT 0110011001101100 word: SLICEA.K1.INIT 0110011001101100 word: SLICEB.K0.INIT 0110011001101010 word: SLICEB.K1.INIT 0110011001101010 word: SLICEC.K0.INIT 0110011001101010 word: SLICEC.K1.INIT 0110011001101100 word: SLICED.K0.INIT 0110011001101100 word: SLICED.K1.INIT 0110011001101010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C44:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0003 W3_H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 E1_H01W0000 arc: S1_V02S0701 H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 H06W0203 arc: V00T0000 N1_V02S0601 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V06S0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0401 N1_V02S0401 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 H02W0501 arc: A1 N1_V02S0501 arc: B0 V00T0000 arc: B1 N1_V02S0101 arc: B7 H01E0101 arc: C7 H02E0401 arc: D7 F0 arc: E1_H01E0101 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: N1_V01N0001 F7 arc: N1_V01N0101 F2 arc: N1_V02N0001 F0 arc: N1_V02N0301 F1 word: SLICED.K1.INIT 0000000000000011 word: SLICEA.K0.INIT 0110011001101010 word: SLICEA.K1.INIT 0110011001101010 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R8C45:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0501 W1_H02E0501 arc: E3_H06E0303 W1_H02E0601 arc: H00R0000 V02S0401 arc: H00R0100 S1_V02N0701 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 V02N0301 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V06S0303 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 V01N0101 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A2 S1_V02N0501 arc: A3 S1_V02N0501 arc: C2 H02E0601 arc: C3 H02W0601 arc: CE0 E1_H02W0101 arc: CE1 E1_H02W0101 arc: CE2 E1_H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: E1_H01E0001 Q4 arc: F2 F5B_SLICE arc: H00L0000 Q0 arc: H01W0000 Q0 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M2 V00B0000 arc: M3 H00R0000 arc: M4 V00B0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 Q4 arc: N3_V06N0203 Q7 arc: S1_V02S0001 F2 arc: S1_V02S0101 Q3 arc: V00T0100 Q3 word: SLICEB.K0.INIT 1010101011110000 word: SLICEB.K1.INIT 1111101011110000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C46:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 V02S0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0201 V01N0001 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 E1_H02W0601 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 V02N0401 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 E1_H02W0501 arc: A2 V02N0701 arc: A3 V02N0701 arc: A6 E1_H01W0000 arc: A7 E1_H01W0000 arc: B1 E1_H02W0101 arc: B2 N1_V02S0101 arc: B3 Q3 arc: C0 S1_V02N0401 arc: C2 N1_V01N0001 arc: C6 H02W0401 arc: C7 V00B0100 arc: CE0 H00R0100 arc: CE1 W1_H02E0101 arc: CE2 H00R0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 S1_V02N0001 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F6 F5D_SLICE arc: H00L0000 F2 arc: H01W0000 Q5 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 H02W0001 arc: M2 V00T0000 arc: M3 H00R0000 arc: M5 H00L0100 arc: M6 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F0 arc: N1_V02N0701 Q7 arc: V01S0000 F6 arc: V01S0100 Q1 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1110111011001100 word: SLICED.K0.INIT 1010101011110000 word: SLICED.K1.INIT 1111101011110000 word: SLICEB.K0.INIT 0100010001010000 word: SLICEB.K1.INIT 0000000001000100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.C1MUX 1 .tile R8C47:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W1_H02E0501 arc: H00L0000 H02E0201 arc: H00R0000 S1_V02N0601 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 V01N0101 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H01E0101 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0501 arc: V00T0100 H02E0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0501 arc: A1 H02E0701 arc: C0 H02E0401 arc: C1 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D1 H02E0001 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q6 arc: E1_H02E0401 Q6 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: H00R0100 Q5 arc: H01W0000 Q2 arc: H01W0100 Q2 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F0 arc: N1_V02N0001 Q2 arc: S1_V02S0401 Q6 arc: V01S0000 Q5 arc: V01S0100 Q1 arc: W1_H02W0401 Q4 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111101010101010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C48:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 S1_V02N0001 arc: H00L0100 V02S0101 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 H02W0301 arc: S1_V02S0601 V01N0001 arc: S3_V06S0003 N3_V06S0303 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02W0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E3_H06W0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A3 N1_V02S0701 arc: B0 V02S0101 arc: B1 V02S0101 arc: B2 E1_H01W0100 arc: B4 V02S0701 arc: B5 H02E0101 arc: C0 W1_H02E0401 arc: C1 W1_H02E0601 arc: C2 V02N0401 arc: C4 H02E0601 arc: C5 H02E0601 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 H00R0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 W1_H02E0001 arc: D2 S1_V02N0001 arc: D4 W1_H02E0001 arc: D5 W1_H02E0001 arc: E1_H01E0001 Q6 arc: E3_H06E0303 Q5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: H01W0000 Q5 arc: H01W0100 Q1 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M1 H02E0001 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 H00R0100 arc: M6 V00B0000 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q1 arc: N1_V02N0701 Q7 arc: S1_V02S0101 Q1 arc: S1_V02S0201 F2 arc: S1_V02S0401 Q6 arc: S3_V06S0103 F2 arc: V01S0000 F2 arc: V01S0100 F0 arc: W1_H02W0401 F4 arc: W1_H02W0501 Q7 word: SLICEC.K0.INIT 1111000011001100 word: SLICEC.K1.INIT 1111110011001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111110011110000 word: SLICEB.K0.INIT 1111110000001100 word: SLICEB.K1.INIT 1010101010101010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C49:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 E1_H02W0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0101 H01E0101 arc: S1_V02S0201 E1_H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N1_V02S0201 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02E0601 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: V00T0100 V02S0701 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 E1_H01W0000 arc: W1_H02W0701 V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02S0701 arc: A3 E1_H02W0701 arc: A4 N1_V02S0101 arc: B0 E1_H02W0301 arc: B2 F3 arc: B3 W1_H02E0301 arc: B4 E1_H02W0101 arc: B5 E1_H02W0101 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C2 N1_V02S0601 arc: C3 H02W0401 arc: C4 V01N0101 arc: C5 V01N0101 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V02S0201 arc: D2 E1_H02W0001 arc: D3 H02W0001 arc: D4 S1_V02N0401 arc: D5 S1_V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q7 arc: E1_H02E0601 Q6 arc: E1_H02E0701 Q7 arc: E3_H06E0103 Q1 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: H01W0100 Q5 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0100 arc: M1 V01S0100 arc: M4 V00T0000 arc: M5 V01S0000 arc: M6 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: N3_V06N0303 Q6 arc: V01S0000 Q6 arc: V01S0100 F4 arc: W1_H02W0501 Q7 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1111110000001100 word: SLICEA.K1.INIT 1111111110100000 word: SLICEB.K1.INIT 0101111100010011 word: SLICEB.K0.INIT 1111001100110011 word: SLICEC.K0.INIT 0010001000110000 word: SLICEC.K1.INIT 0000000000110000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 .tile R8C50:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 N1_V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 E1_H01W0000 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: H00L0000 N1_V02S0201 arc: H00R0000 V02N0401 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 H06W0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0401 V01N0001 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 S1_V02N0001 arc: V00T0000 V02S0401 arc: V00T0100 H02E0301 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0701 arc: A5 V00T0100 arc: B1 Q1 arc: B2 H01W0100 arc: B5 H02E0101 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 H00L0100 arc: C5 E1_H02W0401 arc: CE0 W1_H02E0101 arc: CE1 E1_H02W0101 arc: CE2 S1_V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H01E0101 arc: D2 V02N0201 arc: D3 H02E0201 arc: D5 V02N0401 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q6 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q4 arc: E3_H06E0103 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: H00L0100 Q3 arc: H01W0000 Q1 arc: H01W0100 Q5 arc: LSR1 H02E0501 arc: M0 V00B0000 arc: M1 H00R0100 arc: M2 H02W0601 arc: M3 H00R0000 arc: M4 V00B0100 arc: M5 H00L0000 arc: M6 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F5 arc: N1_V01N0101 Q1 arc: S1_V02S0501 Q7 arc: S3_V06S0203 Q4 arc: V00B0100 Q5 arc: V01S0100 Q6 word: SLICEC.K1.INIT 0010101000111111 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1111110011001100 word: SLICEB.K0.INIT 1100110011110000 word: SLICEB.K1.INIT 1111111100000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C51:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 N1_V02S0201 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 H02E0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H06E0303 arc: N1_V02N0701 H01E0101 arc: N3_V06N0003 E3_H06W0003 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E1_H02W0401 arc: S1_V02S0501 V01N0101 arc: S1_V02S0601 V01N0001 arc: S1_V02S0701 H06W0203 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H02W0501 arc: A1 H02W0701 arc: A4 E1_H01W0000 arc: A5 V02N0301 arc: A6 V02N0301 arc: A7 E1_H01W0000 arc: B2 H00L0000 arc: B3 H02E0101 arc: B7 V00B0100 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 H02W0401 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 H02W0401 arc: CE0 V02N0201 arc: CE1 S1_V02N0201 arc: CE2 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H01E0101 arc: D3 N1_V02S0201 arc: D4 H00R0100 arc: D5 V02N0401 arc: D6 S1_V02N0601 arc: D7 H02E0001 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F7 arc: E1_H02E0001 F2 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 Q3 arc: LSR1 W1_H02E0501 arc: M0 V00T0000 arc: M1 V01S0100 arc: M2 V00B0000 arc: M3 H02W0201 arc: M4 V00T0000 arc: M5 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q3 arc: V01S0000 Q5 arc: V01S0100 F4 arc: W1_H02W0201 F0 arc: W1_H02W0301 Q3 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111110011001100 word: SLICEA.K0.INIT 1111101000001010 word: SLICEA.K1.INIT 1111101010101010 word: SLICEC.K0.INIT 1111101000001010 word: SLICEC.K1.INIT 1111101010101010 word: SLICED.K1.INIT 0101111100010011 word: SLICED.K0.INIT 1010111100001111 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C52:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00R0100 H02E0701 arc: N1_V02N0001 H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 S3_V06N0103 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0501 H02E0501 arc: S3_V06S0003 N3_V06S0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00B0100 V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A2 H00L0100 arc: A7 H00L0000 arc: B0 V00B0000 arc: B1 E1_H02W0301 arc: B2 V01N0001 arc: B7 V01S0000 arc: C1 N1_V01N0001 arc: C2 E1_H02W0601 arc: C7 S1_V02N0201 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 E1_H02W0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 H02W0001 arc: D7 W1_H02E0001 arc: E1_H01E0001 Q7 arc: E1_H02E0401 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 Q5 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 H02E0501 arc: M0 V00B0100 arc: M1 V01S0100 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00B0000 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q6 arc: S1_V02S0601 Q6 arc: S1_V02S0701 F7 arc: V00B0000 Q4 arc: V01S0000 Q7 arc: V01S0100 F0 word: SLICEA.K0.INIT 1100110010101010 word: SLICEA.K1.INIT 1111110011001100 word: SLICED.K1.INIT 0011111100010101 word: SLICEB.K0.INIT 1100110011101100 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ .tile R8C53:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 N1_V01S0100 arc: H00L0100 S1_V02N0101 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0401 H06E0203 arc: S1_V02S0701 H06E0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 S1_V02N0101 arc: W1_H02W0001 V06N0003 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0203 E1_H01W0000 arc: W3_H06W0303 E3_H06W0303 arc: A1 E1_H01E0001 arc: A2 H02E0501 arc: A3 V02S0501 arc: A4 V00T0000 arc: A5 H02E0701 arc: A6 F5 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 S1_V02N0101 arc: B2 V02N0101 arc: B3 H00R0100 arc: B4 N1_V01S0000 arc: B6 F3 arc: B7 S1_V02N0501 arc: C0 W1_H02E0601 arc: C3 E1_H02W0401 arc: C4 V02N0201 arc: C5 V00T0000 arc: C6 H02W0401 arc: C7 E1_H02W0401 arc: CE1 W1_H02E0101 arc: CE2 H00L0100 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 W1_H02E0001 arc: D2 V01S0100 arc: D3 V02S0201 arc: D4 H01W0000 arc: D5 E1_H01W0100 arc: D6 V02N0401 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F2 arc: E1_H02E0201 Q2 arc: E1_H02E0601 F6 arc: E3_H06E0003 Q0 arc: E3_H06E0103 Q1 arc: E3_H06E0203 Q4 arc: E3_H06E0303 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M4 W1_H02E0401 arc: M5 W1_H02E0001 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F2 arc: N1_V01N0101 Q0 arc: N1_V02N0001 F2 arc: N1_V02N0101 Q1 arc: N1_V02N0401 F4 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: S1_V02S0101 Q1 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q5 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q1 arc: S3_V06S0203 Q4 arc: V00B0000 Q4 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0000 F7 arc: V01S0100 Q6 arc: W1_H02W0201 Q0 arc: W3_H06W0003 Q0 arc: W3_H06W0103 Q1 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1110111000100010 word: SLICEB.K0.INIT 1011101110001000 word: SLICEC.K0.INIT 0101000000110000 word: SLICED.K1.INIT 0000001000010011 word: SLICEB.K1.INIT 1000100010100000 word: SLICEC.K1.INIT 1111010110100000 word: SLICED.K0.INIT 0000000000110001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C54:PLC2 arc: E1_H02E0001 N3_V06S0003 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0701 V02N0701 arc: E3_H06E0103 V01N0101 arc: E3_H06E0303 W3_H06E0203 arc: H00R0100 E1_H02W0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 V01N0001 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0103 H01E0101 arc: N3_V06N0303 S1_V02N0601 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 H06W0103 arc: S1_V02S0201 H02W0201 arc: S1_V02S0401 H06W0203 arc: S1_V02S0501 H02W0501 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0201 arc: V00B0100 H02W0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 H02W0301 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0601 V06S0303 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 V01N0101 arc: A1 F5 arc: A2 H02E0701 arc: A4 E1_H01W0000 arc: A5 V02N0301 arc: A6 V02S0301 arc: A7 H02E0501 arc: B0 H02E0101 arc: B1 E1_H02W0301 arc: B2 H02E0301 arc: B3 H02W0101 arc: B4 H02E0301 arc: B5 V02S0501 arc: B6 V00B0000 arc: B7 F3 arc: C0 N1_V01S0100 arc: C1 H02E0601 arc: C2 V02S0401 arc: C4 H02W0601 arc: C5 F4 arc: C6 Q6 arc: C7 V02N0001 arc: CE1 V02N0201 arc: CE2 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 N1_V01S0000 arc: D2 V00T0100 arc: D3 V00B0100 arc: D4 S1_V02N0401 arc: D5 F2 arc: D6 H02E0201 arc: D7 H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F7 arc: E1_H02E0401 Q4 arc: E3_H06E0003 Q0 arc: E3_H06E0203 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q3 arc: H01W0100 Q6 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0301 arc: M3 H00R0100 arc: M4 V00T0000 arc: M6 H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F6 arc: N1_V01N0101 F6 arc: N1_V02N0301 Q3 arc: N3_V06N0003 Q0 arc: N3_V06N0203 F7 arc: S1_V02S0301 F1 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q0 arc: S3_V06S0203 F7 arc: V01S0000 F3 arc: V01S0100 F3 arc: W3_H06W0003 Q0 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 1111001111000000 word: SLICEB.K0.INIT 0000101100001000 word: SLICEC.K0.INIT 1110001000000000 word: SLICEC.K1.INIT 1100110011001000 word: SLICEA.K1.INIT 1000110010001000 word: SLICED.K0.INIT 0000000101000101 word: SLICEB.K1.INIT 0011001100000000 word: SLICED.K1.INIT 1010101011101010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R8C55:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 W1_H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 E1_H02W0601 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0103 H06E0103 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 H06E0103 arc: S1_V02S0201 H06W0103 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02W0001 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02N0001 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E1_H02W0101 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A3 H02W0701 arc: A4 H02W0701 arc: A5 H02W0701 arc: B0 N1_V02S0301 arc: B2 E1_H02W0301 arc: B3 V02N0101 arc: B4 H00L0000 arc: B5 H00L0000 arc: B6 F3 arc: B7 S1_V02N0701 arc: C0 S1_V02N0401 arc: C2 S1_V02N0601 arc: C3 S1_V02N0601 arc: C4 H02W0401 arc: C5 H02W0601 arc: C6 E1_H01E0101 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00R0000 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D4 E1_H02W0201 arc: D5 E1_H02W0201 arc: D6 F2 arc: D7 E1_H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F7 arc: E1_H02E0001 F0 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F5 arc: H01W0000 Q1 arc: H01W0100 F3 arc: LSR0 V00B0100 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M1 H00L0100 arc: M3 H00L0100 arc: M4 V00T0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q4 arc: N1_V02N0301 Q3 arc: N1_V02N0701 Q7 arc: N3_V06N0203 F4 arc: N3_V06N0303 F5 arc: S1_V02S0301 F3 arc: S1_V02S0401 F6 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: S1_V02S0701 F5 arc: S3_V06S0203 F4 arc: S3_V06S0303 F5 arc: V01S0000 Q1 arc: V01S0100 F2 arc: W1_H02W0101 F3 arc: W1_H02W0201 F2 arc: W1_H02W0301 Q3 arc: W1_H02W0401 Q4 arc: W1_H02W0501 F7 arc: W1_H02W0701 Q7 arc: W3_H06W0203 F4 word: SLICEB.K0.INIT 0000110000001100 word: SLICEC.K0.INIT 1100110011011100 word: SLICEC.K1.INIT 1101110011001100 word: SLICEB.K1.INIT 1100101011001010 word: SLICED.K1.INIT 1111001111000000 word: SLICEA.K0.INIT 1110111101001111 word: SLICEA.K1.INIT 0000000000000000 word: SLICED.K0.INIT 0000000011000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 .tile R8C56:PLC2 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 W1_H02E0401 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 H02E0301 arc: N1_V02N0201 H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06E0303 arc: S1_V02S0601 H01E0001 arc: V00T0000 V02S0401 arc: V00T0100 V02N0701 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: A0 F7 arc: A1 F7 arc: A2 F5 arc: A3 F7 arc: A4 H02W0701 arc: A5 W1_H02E0701 arc: A6 F5 arc: A7 F5 arc: B0 H02E0301 arc: B1 E1_H01W0100 arc: B2 H02E0301 arc: B3 E1_H01W0100 arc: B4 V02N0701 arc: B5 V02N0501 arc: B6 H02E0101 arc: B7 H02W0301 arc: C0 E1_H01W0000 arc: C1 H00L0100 arc: C2 F4 arc: C3 H00L0100 arc: C5 V02N0001 arc: C6 F4 arc: CE0 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 V00T0100 arc: D2 H02W0001 arc: D3 V00T0100 arc: D4 E1_H01W0100 arc: D6 H02W0001 arc: D7 H02W0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F5 arc: E1_H02E0101 F3 arc: E1_H02E0201 F0 arc: E1_H02E0701 F5 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 F2 arc: LSR1 H02E0301 arc: M0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: N1_V01N0001 F3 arc: N1_V01N0101 F6 arc: N1_V02N0001 F2 arc: N1_V02N0101 F1 arc: N1_V02N0401 F6 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: N3_V06N0303 F6 arc: S3_V06S0003 F3 arc: S3_V06S0103 F1 arc: S3_V06S0303 F6 arc: V01S0000 F0 arc: V01S0100 F1 arc: W1_H02W0201 Q0 arc: W1_H02W0401 F4 arc: W1_H02W0601 F4 arc: W1_H02W0701 F5 arc: W3_H06W0303 F6 word: SLICEB.K0.INIT 1110110011001100 word: SLICED.K0.INIT 1100110011101100 word: SLICEB.K1.INIT 1111100011110000 word: SLICEA.K0.INIT 1100111011001100 word: SLICEA.K1.INIT 1111000011111000 word: SLICED.K1.INIT 0000000000100010 word: SLICEC.K1.INIT 1100101011001010 word: SLICEC.K0.INIT 0000000000010001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 .tile R8C57:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W1_H02E0601 arc: N1_V02N0001 V01N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 W1_H02E0501 arc: N3_V06N0003 H01E0001 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 W1_H02E0301 arc: S3_V06S0003 H01E0001 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V01N0101 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H02W0701 arc: A1 F5 arc: A2 F5 arc: A3 V01N0101 arc: A4 F5 arc: A5 H02E0701 arc: A6 H02E0701 arc: A7 H02E0501 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B4 W1_H02E0301 arc: C0 H02E0401 arc: C1 H00R0100 arc: C2 H00R0100 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 V01N0101 arc: C6 V01N0101 arc: C7 V02N0001 arc: D0 V02N0001 arc: D1 S1_V02N0001 arc: D2 S1_V02N0001 arc: D3 H01E0101 arc: D4 V00B0000 arc: D5 F0 arc: D6 F0 arc: D7 H02W0201 arc: E1_H01E0001 F4 arc: E1_H01E0101 F3 arc: E1_H02E0201 F2 arc: E1_H02E0701 F7 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 F7 arc: H01W0000 F7 arc: H01W0100 F7 arc: N1_V01N0001 F4 arc: N1_V01N0101 F1 arc: N1_V02N0601 F4 arc: N3_V06N0103 F1 arc: N3_V06N0203 F4 arc: S1_V02S0001 F2 arc: S1_V02S0601 F6 arc: S1_V02S0701 F7 arc: S3_V06S0103 F1 arc: V00B0100 F7 arc: V01S0000 F7 arc: V01S0100 F6 arc: W1_H02W0001 F0 arc: W1_H02W0101 F1 arc: W1_H02W0201 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEC.K0.INIT 1100111011001100 word: SLICEA.K1.INIT 1110110011001100 word: SLICEB.K0.INIT 1100110011101100 word: SLICEC.K1.INIT 0000101000000000 word: SLICED.K0.INIT 0000000000000101 word: SLICEA.K0.INIT 1111000010101010 word: SLICEB.K1.INIT 0000000001010000 word: SLICED.K1.INIT 1111101000001010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 .tile R8C58:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 N1_V01S0000 arc: E1_H02E0601 V02N0601 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02W0201 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 V01N0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 N1_V01S0100 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0201 N3_V06S0103 arc: S1_V02S0401 V01N0001 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 S1_V02N0301 arc: V00T0100 H02E0101 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A0 H02E0701 arc: A2 H02E0701 arc: A3 H00L0100 arc: A4 H02E0701 arc: A7 H02E0501 arc: B0 H02E0101 arc: B1 Q1 arc: B2 S1_V02N0301 arc: B3 H01W0100 arc: B4 H01E0101 arc: B7 H02W0301 arc: C0 S1_V02N0601 arc: C1 H00L0100 arc: C2 S1_V02N0601 arc: C3 V02N0601 arc: C4 V00B0100 arc: C7 V02N0201 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 H02E0001 arc: D2 H01E0101 arc: D3 V02S0201 arc: D4 S1_V02N0601 arc: D7 H00L0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: E1_H02E0001 F0 arc: E1_H02E0101 F1 arc: E1_H02E0501 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0000 F2 arc: H01W0100 Q1 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M1 H00L0000 arc: M3 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 F4 arc: N1_V02N0001 F0 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: N3_V06N0203 F4 arc: V01S0000 F4 arc: V01S0100 F2 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 arc: W3_H06W0203 F4 word: SLICEA.K1.INIT 0011001100001111 word: SLICEC.K0.INIT 1111000011111000 word: SLICEB.K0.INIT 1101110011001100 word: SLICEA.K0.INIT 1110110011001100 word: SLICED.K1.INIT 0010001100100000 word: SLICEB.K1.INIT 0000110000001010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C59:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V06N0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W1_H02E0201 arc: E3_H06E0203 W3_H06E0103 arc: H00L0100 V02N0301 arc: H00R0100 H02W0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0003 W3_H06E0003 arc: V00B0000 V02S0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 N1_V02S0601 arc: V00T0100 W1_H02E0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0601 V01N0001 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0003 V06N0003 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0501 arc: A2 H02E0701 arc: A3 V02S0701 arc: A4 F5 arc: A5 V02S0301 arc: A6 H00L0000 arc: A7 V02S0101 arc: B0 H01W0100 arc: B1 V02N0101 arc: B2 E1_H02W0301 arc: B3 W1_H02E0301 arc: B4 V02S0501 arc: B5 H02E0101 arc: B6 V01S0000 arc: B7 H01E0101 arc: C0 N1_V01N0001 arc: C1 H02E0401 arc: C2 H02E0601 arc: C3 S1_V02N0401 arc: C5 S1_V02N0001 arc: C6 H02W0401 arc: C7 V02S0201 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V01S0100 arc: D2 Q2 arc: D3 H00R0000 arc: D4 V00B0000 arc: D5 F0 arc: D6 V02S0601 arc: D7 F2 arc: E1_H01E0001 F1 arc: E1_H01E0101 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 F4 arc: H01W0100 Q0 arc: LSR0 V00B0100 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 W1_H02E0401 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q4 arc: N1_V02N0401 F6 arc: V01S0000 Q0 arc: V01S0100 F7 word: SLICEA.K0.INIT 0000111100110011 word: SLICEC.K1.INIT 0000111000000100 word: SLICEC.K0.INIT 0000000000010001 word: SLICEB.K1.INIT 0000010100000111 word: SLICED.K0.INIT 1010110000000000 word: SLICEB.K0.INIT 1110000000100000 word: SLICED.K1.INIT 1111010111100100 word: SLICEA.K1.INIT 1100010011000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C60:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02S0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V01N0101 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 V02N0301 arc: H00R0000 H02W0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0301 W3_H06E0003 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0201 W3_H06E0103 arc: S1_V02S0501 W3_H06E0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 E1_H02W0201 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0501 V02N0501 arc: W3_H06W0103 E3_H06W0003 arc: A0 H02W0501 arc: A1 H02E0501 arc: A2 H02W0701 arc: A3 F5 arc: A4 H02W0701 arc: A5 F7 arc: A6 N1_V01N0101 arc: A7 Q7 arc: B0 H02W0301 arc: B1 V00T0000 arc: B2 V01N0001 arc: B3 E1_H02W0101 arc: B4 S1_V02N0501 arc: B5 V00B0100 arc: B6 V02N0701 arc: B7 H02W0301 arc: C0 W1_H02E0601 arc: C1 H00L0000 arc: C2 W1_H02E0601 arc: C3 N1_V01S0100 arc: C4 W1_H02E0601 arc: C5 V00T0000 arc: C6 V00T0000 arc: C7 W1_H02E0601 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D1 F2 arc: D2 Q2 arc: D3 H02W0201 arc: D4 V00B0000 arc: D5 S1_V02N0401 arc: D7 E1_H01W0100 arc: E1_H01E0101 Q7 arc: E1_H02E0601 F6 arc: E1_H02E0701 Q7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 Q1 arc: H01W0100 Q4 arc: LSR0 W1_H02E0301 arc: LSR1 E1_H02W0301 arc: M1 E1_H02W0001 arc: M2 H02W0601 arc: M4 H02E0401 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F4 arc: S1_V02S0601 Q4 arc: V00B0000 Q4 arc: V01S0000 Q2 arc: V01S0100 Q2 arc: W3_H06W0003 F3 word: SLICED.K1.INIT 1110000000100000 word: SLICEC.K1.INIT 0000000011101111 word: SLICEB.K1.INIT 1100111000000000 word: SLICEA.K0.INIT 0000111000000010 word: SLICEB.K0.INIT 1101000010000000 word: SLICEA.K1.INIT 1010101010100010 word: SLICEC.K0.INIT 0000110100001000 word: SLICED.K0.INIT 0000000100000001 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.D0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C61:PLC2 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 V06N0003 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 V06N0103 arc: E3_H06E0203 S3_V06N0203 arc: H00L0100 H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0203 S3_V06N0203 arc: N3_V06N0303 S3_V06N0203 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 N3_V06S0103 arc: S3_V06S0303 H06E0303 arc: V00T0000 V02N0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 V01N0101 arc: W1_H02W0601 V06N0303 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E3_H06W0303 arc: A2 V00B0000 arc: A3 V00B0000 arc: A4 H02E0701 arc: A5 Q5 arc: A6 V02N0301 arc: A7 V02S0301 arc: B0 E1_H02W0101 arc: B1 W1_H02E0101 arc: B2 V02S0301 arc: B3 V02N0101 arc: B4 V00B0100 arc: B5 H01E0101 arc: B6 S1_V02N0701 arc: B7 H02E0101 arc: C0 W1_H02E0601 arc: C1 W1_H02E0601 arc: C2 E1_H02W0401 arc: C3 H02W0601 arc: C4 H02W0401 arc: C5 E1_H02W0401 arc: C6 Q6 arc: C7 V01N0101 arc: CE0 S1_V02N0201 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V02S0201 arc: D2 Q2 arc: D3 W1_H02E0001 arc: D4 W1_H02E0001 arc: D5 V02S0601 arc: D6 H01W0000 arc: D7 V01N0001 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F6 arc: E1_H02E0001 F2 arc: E1_H02E0501 F5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H01W0000 Q2 arc: H01W0100 Q5 arc: LSR0 W1_H02E0301 arc: LSR1 H02W0301 arc: M0 V00T0000 arc: M1 H00L0000 arc: M2 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F3 arc: N1_V02N0101 F3 arc: N1_V02N0401 F4 arc: V00B0000 Q6 arc: V00B0100 Q5 arc: V01S0000 F7 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111110011001100 word: SLICEB.K0.INIT 0001000000010011 word: SLICEC.K1.INIT 0101001100000000 word: SLICEB.K1.INIT 0000000010111000 word: SLICEC.K0.INIT 1100101000000000 word: SLICED.K0.INIT 0101000101000000 word: SLICED.K1.INIT 0000000101000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C62:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00R0000 H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 W3_H06E0303 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 W1_H02E0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0701 E1_H02W0701 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 H02E0401 arc: V00B0100 N1_V02S0301 arc: V00T0000 H02E0001 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0203 E1_H02W0701 arc: W3_H06W0303 E1_H01W0100 arc: A0 H02E0501 arc: A1 F7 arc: A2 E1_H01E0001 arc: A3 V01N0101 arc: A4 V00T0100 arc: A6 H02E0701 arc: A7 V02S0301 arc: B0 H01W0100 arc: B2 V02S0101 arc: B3 H02W0301 arc: B4 N1_V01S0000 arc: B6 F3 arc: B7 V01S0000 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 H02W0601 arc: C3 W1_H02E0601 arc: C4 E1_H01E0101 arc: C6 E1_H02W0601 arc: C7 H02W0601 arc: CE1 H02E0101 arc: CE2 S1_V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 F2 arc: D1 F2 arc: D2 H02W0001 arc: D3 W1_H02E0201 arc: D4 V02S0601 arc: D6 V01N0001 arc: D7 H01W0000 arc: E1_H01E0001 Q2 arc: E1_H01E0101 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q5 arc: H01W0100 F7 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: M2 V00B0000 arc: M5 H00R0000 arc: M7 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: N1_V01N0101 Q5 arc: N1_V02N0201 Q2 arc: N1_V02N0501 Q7 arc: N1_V02N0701 Q7 arc: S3_V06S0203 F4 arc: V01S0000 Q7 word: SLICEB.K0.INIT 0011010100000000 word: SLICED.K1.INIT 0000000101010001 word: SLICEA.K0.INIT 1111101011001010 word: SLICEA.K1.INIT 1111111110101111 word: SLICEC.K0.INIT 0000100001001100 word: SLICEB.K1.INIT 1000110010001000 word: SLICED.K0.INIT 0000001000000011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C63:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0103 N1_V01S0100 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 V02N0401 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 V01N0101 arc: S3_V06S0303 H06W0303 arc: V00B0000 W1_H02E0601 arc: V00T0100 H02E0101 arc: W1_H02W0001 V06N0003 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0203 E3_H06W0103 arc: A0 V02N0701 arc: A1 V01N0101 arc: A2 V00T0000 arc: A3 S1_V02N0701 arc: A4 E1_H01W0000 arc: A5 E1_H01W0000 arc: A6 S1_V02N0101 arc: A7 S1_V02N0101 arc: B1 E1_H01W0100 arc: B2 V01N0001 arc: B3 Q3 arc: B4 H00R0000 arc: B5 H00R0000 arc: B6 V00B0100 arc: C1 V02N0401 arc: C2 E1_H01W0000 arc: C3 W1_H02E0601 arc: C4 E1_H01E0101 arc: C5 E1_H01E0101 arc: C6 N1_V02S0001 arc: C7 V00B0100 arc: CE0 H02W0101 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D2 V02N0201 arc: D3 E1_H02W0001 arc: D4 V01N0001 arc: D5 V01N0001 arc: D6 V02N0601 arc: D7 V02N0601 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q0 arc: E1_H02E0301 Q3 arc: E1_H02E0401 Q4 arc: E1_H02E0701 F5 arc: E3_H06E0203 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F5D_SLICE arc: H01W0000 F2 arc: H01W0100 F6 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M3 H00L0000 arc: M4 V00B0000 arc: M6 H02E0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F3 arc: N1_V02N0401 Q4 arc: N3_V06N0203 F4 arc: S1_V02S0001 Q0 arc: S3_V06S0003 Q0 arc: S3_V06S0103 F2 arc: S3_V06S0203 F4 arc: V00B0100 Q7 arc: V00T0000 Q0 arc: V01S0000 F1 arc: V01S0100 Q0 arc: W1_H02W0101 Q3 arc: W1_H02W0201 Q0 arc: W1_H02W0301 F1 arc: W3_H06W0103 F1 arc: W3_H06W0303 F5 word: SLICEB.K1.INIT 0111011100000111 word: SLICEA.K0.INIT 0000000010101010 word: SLICED.K0.INIT 0000000011100100 word: SLICED.K1.INIT 0000000001010000 word: SLICEC.K1.INIT 0000000000000010 word: SLICEC.K0.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000010 word: SLICEA.K1.INIT 0000000000010000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C64:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 H02W0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02W0501 arc: V00T0100 V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0501 E1_H02W0501 arc: A0 S1_V02N0501 arc: A1 S1_V02N0701 arc: A3 H02W0501 arc: A5 H02W0501 arc: A6 N1_V01S0100 arc: B0 S1_V02N0301 arc: B1 E1_H01W0100 arc: B2 H02W0301 arc: B6 E1_H02W0101 arc: C0 H02E0601 arc: C1 H02E0601 arc: C3 H02W0401 arc: C4 V01N0101 arc: C6 V02N0001 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V00B0100 arc: D4 H00R0100 arc: D5 V01N0001 arc: D6 V02S0401 arc: E1_H01E0101 Q4 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 F0 arc: H01W0000 Q4 arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 W1_H02E0301 arc: M0 E1_H02W0601 arc: M1 H00L0000 arc: M6 H02E0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q7 arc: S1_V02S0101 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q5 arc: S1_V02S0601 Q6 arc: S3_V06S0203 Q4 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 arc: W1_H02W0601 F6 arc: W1_H02W0701 Q5 arc: W3_H06W0103 Q2 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 1010111110101100 word: SLICEA.K1.INIT 1010110010101100 word: SLICEB.K0.INIT 1100110000000000 word: SLICEC.K1.INIT 1010101000000000 word: SLICEB.K1.INIT 1010000010100000 word: SLICEC.K0.INIT 1111000000000000 word: SLICED.K0.INIT 1010000011100000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C65:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V06S0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: E3_H06E0303 H01E0101 arc: H00L0000 S1_V02N0201 arc: H00R0000 V02S0401 arc: H00R0100 N1_V02S0501 arc: H01W0000 W3_H06E0103 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 H06E0203 arc: V00B0100 S1_V02N0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 V01N0101 arc: W1_H02W0401 V01N0001 arc: W1_H02W0501 V06N0303 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 E1_H01W0100 arc: W3_H06W0103 E1_H01W0100 arc: A1 V02N0701 arc: A5 V02N0301 arc: A6 H02E0701 arc: B1 V02S0101 arc: B5 H02W0301 arc: B6 V01S0000 arc: C0 N1_V01N0001 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C6 V00B0100 arc: CE1 H02E0101 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 N1_V01S0000 arc: D1 W1_H02E0001 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D6 E1_H02W0001 arc: E1_H01E0001 F1 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0100 F5 arc: LSR0 V00T0100 arc: LSR1 E1_H02W0301 arc: M0 E1_H02W0601 arc: M1 H00R0100 arc: M2 E1_H02W0601 arc: M3 H00R0000 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: S1_V02S0701 F5 arc: V01S0000 Q3 arc: W3_H06W0303 Q6 word: SLICEC.K1.INIT 1000100010001000 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 0000011100000011 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000000000001111 word: SLICED.K0.INIT 1000100011111000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R8C66:PLC2 arc: E1_H02E0001 V01N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0401 V01N0001 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0001 arc: H00R0000 H02E0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H01E0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 H06E0203 arc: S3_V06S0203 E1_H01W0000 arc: V00B0000 N1_V02S0001 arc: V00T0000 E1_H02W0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W3_H06W0303 E3_H06W0303 arc: A1 V01N0101 arc: A4 E1_H02W0501 arc: A6 N1_V01N0101 arc: B1 V02N0101 arc: B4 V02S0701 arc: B6 V01S0000 arc: C1 F4 arc: C4 Q4 arc: C6 V02S0201 arc: CE0 H00R0000 arc: CE1 N1_V02S0201 arc: CE2 V02S0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 N1_V01S0000 arc: D4 H01W0000 arc: D6 V02S0401 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H01W0000 Q6 arc: H01W0100 Q3 arc: LSR0 H02E0501 arc: LSR1 V00T0000 arc: M3 H00R0100 arc: M4 V00B0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q6 arc: N1_V02N0301 Q3 arc: N1_V02N0601 F6 arc: S3_V06S0003 Q0 arc: V01S0000 Q4 arc: W1_H02W0101 F1 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0011000001010000 word: SLICEA.K0.INIT 0000000011111111 word: SLICEC.K0.INIT 1010001010000000 word: SLICEA.K1.INIT 1010101010100010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C67:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 N1_V02S0601 arc: E1_H02E0701 V01N0101 arc: E3_H06E0003 V06S0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 V02N0201 arc: H00L0100 V02N0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 H06E0003 arc: N1_V02N0201 W1_H02E0201 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 H02E0101 arc: S1_V02S0201 N1_V02S0701 arc: S1_V02S0301 N1_V01S0100 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0601 H02E0601 arc: S3_V06S0003 W3_H06E0003 arc: V00T0000 V02S0401 arc: V00T0100 H02W0301 arc: W1_H02W0001 V01N0001 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0303 E3_H06W0203 arc: A1 V02S0701 arc: A3 V00T0000 arc: B1 V00T0000 arc: C0 V02S0401 arc: C1 H02E0401 arc: C2 V02S0401 arc: C3 H02E0401 arc: C4 V00T0000 arc: C5 H02E0401 arc: C6 H02E0401 arc: C7 H02E0401 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0001 arc: D1 H02E0201 arc: D2 H02E0001 arc: D4 H02E0001 arc: D5 V02S0401 arc: D6 V02S0401 arc: D7 V02S0401 arc: F0 F5A_SLICE arc: F1 FXA_SLICE arc: F2 F5B_SLICE arc: F3 FXB_SLICE arc: F4 F5C_SLICE arc: F5 FXC_SLICE arc: F6 F5D_SLICE arc: H01W0000 F3 arc: LSR1 W1_H02E0501 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00L0000 arc: M4 V00T0100 arc: M5 H00R0000 arc: M6 V00T0100 arc: M7 H00L0100 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V02N0701 Q7 word: SLICEA.K0.INIT 0000000000001111 word: SLICEA.K1.INIT 0000101100000011 word: SLICEB.K0.INIT 0000000000001111 word: SLICEB.K1.INIT 0000010100000101 word: SLICEC.K0.INIT 0000000000001111 word: SLICEC.K1.INIT 0000000000001111 word: SLICED.K0.INIT 0000000000001111 word: SLICED.K1.INIT 0000000000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICED.B1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C68:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 H02W0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: S1_V02S0101 V01N0101 arc: S1_V02S0201 H06E0103 arc: S1_V02S0501 W1_H02E0501 arc: S1_V02S0701 V01N0101 arc: S3_V06S0203 W3_H06E0203 arc: V00T0000 N1_V02S0601 arc: V00T0100 V02S0701 arc: W1_H02W0001 V06S0003 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0501 S1_V02N0501 arc: A0 V02S0701 arc: A2 S1_V02N0501 arc: A3 F7 arc: A4 V02S0301 arc: A6 N1_V01N0101 arc: A7 H02E0501 arc: B0 W1_H02E0301 arc: B2 H01W0100 arc: B3 N1_V02S0101 arc: B4 H00L0000 arc: B6 W1_H02E0301 arc: B7 V01S0000 arc: C0 H00L0000 arc: C2 H02E0601 arc: C3 V02N0401 arc: C4 Q4 arc: C6 V00T0100 arc: C7 V02S0001 arc: CE0 H00R0100 arc: CE1 H02E0101 arc: CE2 H00R0000 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 Q2 arc: D3 F2 arc: D4 V02S0401 arc: D6 E1_H01W0100 arc: D7 S1_V02N0601 arc: E1_H01E0101 F3 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q4 arc: N1_V02N0401 F4 arc: V00B0000 F6 arc: V01S0000 Q7 arc: V01S0100 F0 word: SLICEC.K0.INIT 0101000001000100 word: SLICED.K0.INIT 0100000001110000 word: SLICEA.K0.INIT 1111101111101010 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0100010101000000 word: SLICED.K1.INIT 1110010000000000 word: SLICEB.K1.INIT 1111000010110000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C69:PLC2 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0203 W3_H06E0103 arc: H00L0000 V02N0001 arc: H00L0100 V02N0101 arc: H00R0000 H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0201 V01N0001 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02S0001 arc: W1_H02W0201 V06S0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: W3_H06W0103 E3_H06W0003 arc: A0 W1_H02E0701 arc: A1 V02N0501 arc: A2 V00T0000 arc: A5 V00T0000 arc: A6 E1_H02W0701 arc: A7 N1_V01S0100 arc: B1 V02S0301 arc: B2 V02S0101 arc: B5 V01S0000 arc: B6 H02W0101 arc: B7 E1_H02W0101 arc: C0 S1_V02N0401 arc: C1 V02N0601 arc: C2 V02S0401 arc: C5 S1_V02N0201 arc: C6 W1_H02E0401 arc: C7 V02N0201 arc: CE0 H00R0000 arc: CE1 H00L0100 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 S1_V02N0201 arc: D2 V01S0100 arc: D5 S1_V02N0601 arc: D6 V02N0401 arc: D7 E1_H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 F7 arc: E1_H02E0001 F0 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q5 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M2 V00B0000 arc: M5 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: N1_V01N0001 F5 arc: N1_V01N0101 F1 arc: N1_V02N0201 F2 arc: V00T0000 Q2 arc: V01S0000 Q5 arc: V01S0100 Q5 arc: W1_H02W0001 Q2 arc: W1_H02W0601 F6 word: SLICEB.K0.INIT 0011001000000010 word: SLICED.K0.INIT 0000000000000001 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 0000000011100010 word: SLICEC.K1.INIT 0000110000001010 word: SLICED.K1.INIT 0000000001000101 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C70:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 N1_V01S0000 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W1_H02E0501 arc: H00L0100 V02N0301 arc: H00R0000 W1_H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0303 W3_H06E0303 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: W1_H02W0101 V01N0101 arc: W1_H02W0401 W3_H06E0203 arc: A0 F5 arc: A2 V02S0701 arc: A3 H02E0701 arc: A4 V02S0101 arc: A5 V02N0101 arc: A6 H02W0501 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B2 N1_V02S0101 arc: B3 H00L0000 arc: B4 E1_H02W0301 arc: B5 V02S0501 arc: B6 H01E0101 arc: B7 S1_V02N0501 arc: C0 E1_H02W0601 arc: C2 N1_V01N0001 arc: C3 N1_V01N0001 arc: C4 V00B0100 arc: C5 V02S0201 arc: C6 V02S0001 arc: C7 H02E0601 arc: CE0 H00R0100 arc: CE1 H00R0000 arc: CE2 V02S0601 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 Q2 arc: D3 S1_V02N0201 arc: D4 H02E0201 arc: D5 V00B0000 arc: D6 N1_V02S0401 arc: D7 H02E0201 arc: E1_H01E0101 Q4 arc: E1_H02E0301 F3 arc: E1_H02E0701 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0100 Q4 arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M0 V00T0100 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F2 arc: V00B0000 F4 arc: V00B0100 Q7 arc: V01S0000 F6 arc: W1_H02W0201 F0 word: SLICEC.K0.INIT 0000000100100011 word: SLICEB.K0.INIT 0000010010001100 word: SLICEC.K1.INIT 1010000010110000 word: SLICEA.K0.INIT 0000110111111111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K1.INIT 1101100000000000 word: SLICED.K1.INIT 0011001000000010 word: SLICED.K0.INIT 0000000000000100 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C71:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0301 V06S0003 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02S0101 arc: H00R0000 V02N0601 arc: H00R0100 H02E0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 E1_H02W0701 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0301 N1_V02S0201 arc: S1_V02S0401 H06E0203 arc: V00B0000 V02S0201 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V01N0101 arc: W1_H02W0701 V02S0701 arc: W3_H06W0303 E3_H06W0203 arc: A0 W1_H02E0501 arc: A1 H02W0501 arc: A2 S1_V02N0701 arc: A3 F5 arc: A4 N1_V01N0101 arc: A5 F7 arc: A7 N1_V01N0101 arc: B0 V00B0000 arc: B1 F3 arc: B2 H00L0000 arc: B3 H02E0301 arc: B4 V01S0000 arc: B5 V02N0501 arc: B6 E1_H02W0101 arc: B7 S1_V02N0701 arc: C0 V02S0401 arc: C1 H02E0601 arc: C2 E1_H02W0601 arc: C3 H00R0100 arc: C4 W1_H02E0401 arc: C5 N1_V02S0201 arc: C6 F4 arc: C7 V02N0201 arc: CE0 H02E0101 arc: CE1 H00R0000 arc: CE2 W1_H02E0101 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 N1_V02S0201 arc: D2 H01E0101 arc: D3 N1_V02S0201 arc: D4 V00B0000 arc: D5 F2 arc: D6 F0 arc: D7 H00L0100 arc: E1_H02E0201 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 F6 arc: LSR0 W1_H02E0301 arc: LSR1 V00B0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: V01S0000 Q4 arc: W1_H02W0101 F1 word: SLICEC.K0.INIT 0000000001010011 word: SLICEA.K0.INIT 0100000001001100 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 0010001000110000 word: SLICEB.K0.INIT 1010100000001000 word: SLICEC.K1.INIT 1100110010001100 word: SLICEB.K1.INIT 1010101010101000 word: SLICEA.K1.INIT 0001000100010011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C72:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0201 arc: H00R0100 E1_H02W0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H01E0001 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0401 W1_H02E0401 arc: V00B0000 E1_H02W0601 arc: V00T0000 W1_H02E0001 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 V02S0301 arc: W1_H02W0601 N1_V01S0000 arc: W3_H06W0303 E3_H06W0303 arc: A5 V02S0101 arc: A6 H00L0000 arc: A7 H02E0701 arc: B5 S1_V02N0701 arc: B6 V01S0000 arc: B7 V01S0000 arc: C5 E1_H01E0101 arc: C6 V02S0201 arc: C7 H02E0601 arc: CE2 H00R0100 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D5 S1_V02N0401 arc: D6 V02S0401 arc: D7 H02E0201 arc: E1_H01E0101 F7 arc: E1_H02E0601 Q4 arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 H02E0301 arc: M4 V00B0000 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F6 arc: V01S0000 Q6 arc: W1_H02W0501 F5 word: SLICED.K0.INIT 0011000001010000 word: SLICED.K1.INIT 1000101010000000 word: SLICEC.K1.INIT 0011001000110011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C73:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00R0100 V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 W3_H06E0203 arc: S1_V02S0701 H02W0701 arc: V00B0100 H02E0501 arc: V00T0000 E1_H02W0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 W1_H02E0701 arc: A1 H00R0000 arc: A2 S1_V02N0701 arc: A3 W1_H02E0701 arc: A4 F5 arc: A5 V00B0000 arc: A6 H00R0000 arc: A7 E1_H02W0701 arc: B0 E1_H01W0100 arc: B1 Q1 arc: B2 F3 arc: B3 V02S0101 arc: B5 E1_H02W0301 arc: B6 V02N0701 arc: B7 V01S0000 arc: C0 H02E0601 arc: C1 E1_H02W0401 arc: C2 E1_H01W0000 arc: C3 N1_V01N0001 arc: C4 V02N0201 arc: C5 V02S0201 arc: C6 H02E0401 arc: C7 E1_H02W0601 arc: CE0 S1_V02N0201 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02E0201 arc: D2 V02N0201 arc: D3 V01S0100 arc: D4 F0 arc: D5 H00L0100 arc: D6 H00L0100 arc: D7 F2 arc: E1_H01E0101 F1 arc: E1_H02E0301 Q3 arc: E1_H02E0601 F6 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H00R0000 Q6 arc: H01W0000 Q5 arc: LSR0 H02W0301 arc: LSR1 V00T0000 arc: M1 H02W0001 arc: M3 H00L0000 arc: M5 H02W0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 Q3 arc: V00B0000 Q6 arc: V01S0000 F4 arc: V01S0100 Q3 arc: W3_H06W0203 F7 word: SLICED.K0.INIT 1110000000100000 word: SLICEA.K1.INIT 0011010100000000 word: SLICEB.K1.INIT 0101000101000000 word: SLICEB.K0.INIT 1010100010101010 word: SLICEC.K1.INIT 1100100000001000 word: SLICEA.K0.INIT 0100010001010000 word: SLICEC.K0.INIT 0000000000000101 word: SLICED.K1.INIT 1010001010100000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C74:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 V02S0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 H02E0701 arc: V00B0000 E1_H02W0601 arc: V00B0100 W1_H02E0701 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 V06N0103 arc: W1_H02W0301 V06S0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 W3_H06E0203 arc: A0 E1_H02W0701 arc: A1 F7 arc: A2 V02S0501 arc: A3 V02S0501 arc: A4 V02S0301 arc: A5 V02S0101 arc: A7 N1_V01N0101 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 H02E0301 arc: B3 Q3 arc: B4 V01S0000 arc: B5 H01E0101 arc: B6 E1_H02W0101 arc: B7 V02N0701 arc: C0 S1_V02N0401 arc: C1 H02E0601 arc: C2 V02S0601 arc: C3 W1_H02E0601 arc: C4 Q4 arc: C5 E1_H01E0101 arc: C6 F4 arc: C7 W1_H02E0601 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D2 W1_H02E0001 arc: D3 V02S0001 arc: D4 V02S0601 arc: D5 V02S0401 arc: D6 F2 arc: D7 E1_H02W0001 arc: E1_H01E0001 F6 arc: E1_H01E0101 F3 arc: E1_H02E0501 F5 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: M0 E1_H02W0601 arc: M3 H00R0000 arc: M4 V00B0000 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q3 arc: N1_V02N0001 Q0 arc: N1_V02N0301 F1 arc: V00T0000 Q0 arc: V01S0000 Q0 arc: V01S0100 Q4 word: SLICED.K1.INIT 0000000010111000 word: SLICEA.K1.INIT 0000000100000001 word: SLICEC.K0.INIT 0001101100000000 word: SLICEB.K0.INIT 0000000100001011 word: SLICED.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 0000000000100111 word: SLICEC.K1.INIT 1010101000000010 word: SLICEA.K0.INIT 1110000001000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C75:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 V01N0001 arc: E3_H06E0203 S3_V06N0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0401 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0701 H02E0701 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02E0001 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 V02S0401 arc: W1_H02W0701 E1_H02W0701 arc: A0 H02E0501 arc: A2 S1_V02N0501 arc: A3 H02W0701 arc: A4 F5 arc: A5 V00T0100 arc: A6 H00L0000 arc: A7 Q7 arc: B0 V02S0301 arc: B1 V02S0301 arc: B2 V02S0101 arc: B3 V02N0301 arc: B4 H02W0101 arc: B5 V00B0100 arc: B6 F3 arc: B7 V01S0000 arc: C0 E1_H01W0000 arc: C1 E1_H01W0000 arc: C2 N1_V01N0001 arc: C3 H02E0401 arc: C4 E1_H01E0101 arc: C5 H02E0601 arc: C6 S1_V02N0201 arc: C7 H02E0601 arc: CE0 E1_H02W0101 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V02S0201 arc: D3 V00T0100 arc: D4 H02E0201 arc: D5 V02S0401 arc: D6 E1_H01W0100 arc: D7 V02S0401 arc: E1_H01E0001 F4 arc: E1_H01E0101 F7 arc: E1_H02E0001 Q2 arc: E1_H02E0501 Q7 arc: E1_H02E0701 Q5 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: LSR1 V00B0000 arc: M0 H01E0001 arc: M1 H02E0001 arc: M2 V00T0000 arc: M5 H02E0001 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q2 arc: V00B0100 Q5 arc: V00T0100 Q1 arc: V01S0000 Q2 arc: V01S0100 Q5 arc: W1_H02W0601 F6 arc: W3_H06W0003 F0 word: SLICED.K1.INIT 0000001100000101 word: SLICEC.K1.INIT 0011000001010000 word: SLICEC.K0.INIT 0000000011001101 word: SLICEA.K0.INIT 1000110010001000 word: SLICEA.K1.INIT 0000110000000000 word: SLICEB.K1.INIT 1101000010000000 word: SLICEB.K0.INIT 0100010001010000 word: SLICED.K0.INIT 1111111000000000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C76:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 V02N0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0601 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 H06E0203 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: W1_H02W0701 V02S0701 arc: A0 E1_H01E0001 arc: A1 V01N0101 arc: A2 H02E0501 arc: A3 V02S0501 arc: A5 Q5 arc: A6 F5 arc: A7 H02E0701 arc: B0 V01N0001 arc: B1 Q1 arc: B2 E1_H02W0301 arc: B3 Q3 arc: B4 F3 arc: B5 S1_V02N0701 arc: B6 V00B0100 arc: B7 W1_H02E0101 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 H02W0401 arc: C3 H00R0100 arc: C4 V02N0201 arc: C5 V00T0100 arc: C6 H02W0601 arc: C7 H02W0401 arc: CE0 S1_V02N0201 arc: CE1 H00R0000 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V01S0100 arc: D2 H02E0001 arc: D3 V02S0201 arc: D4 H02W0001 arc: D5 V02S0401 arc: D6 H02E0201 arc: D7 E1_H02W0001 arc: E1_H01E0001 Q1 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 F4 arc: H01W0100 F6 arc: LSR0 V00T0000 arc: LSR1 H02W0501 arc: M3 H00L0100 arc: M5 W1_H02E0001 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F7 arc: N1_V02N0001 F2 arc: N1_V02N0101 Q3 arc: N1_V02N0501 Q5 arc: V00T0100 Q3 arc: V01S0000 Q1 arc: V01S0100 Q0 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 0011001000000010 word: SLICEA.K0.INIT 0000000011110100 word: SLICEA.K1.INIT 0010001011000000 word: SLICEB.K1.INIT 0000000000011011 word: SLICEC.K0.INIT 1111000011000000 word: SLICEC.K1.INIT 0010001000110000 word: SLICED.K0.INIT 0011001000110011 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C77:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0401 V02N0401 arc: E3_H06E0003 V06N0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 V01N0101 arc: H00L0100 H02E0101 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0601 S1_V02N0601 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 W3_H06E0303 arc: V00T0000 H02E0001 arc: V00T0100 V02N0701 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 V02N0101 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 S1_V02N0501 arc: A1 H01E0001 arc: A2 V02S0701 arc: A4 E1_H02W0701 arc: A5 V02N0301 arc: A6 N1_V01N0101 arc: A7 H02E0501 arc: B0 W1_H02E0101 arc: B1 W1_H02E0101 arc: B2 H00L0000 arc: B4 H00L0000 arc: B5 H01E0101 arc: B6 H02W0301 arc: B7 V02N0701 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: C2 N1_V01N0001 arc: C4 Q4 arc: C5 W1_H02E0401 arc: C6 E1_H01E0101 arc: C7 S1_V02N0001 arc: CE0 E1_H02W0101 arc: CE1 V02N0201 arc: CE2 H02W0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 V02S0201 arc: D4 S1_V02N0601 arc: D5 F0 arc: D6 V02N0401 arc: D7 H02E0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q2 arc: E1_H02E0301 Q1 arc: E1_H02E0601 Q6 arc: E1_H02E0701 F7 arc: E3_H06E0203 Q7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0301 arc: M0 V00T0000 arc: M1 H00L0100 arc: M2 H02E0601 arc: M4 E1_H02W0401 arc: M6 V00T0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: N1_V02N0501 F7 arc: N3_V06N0303 F5 arc: W1_H02W0001 F2 arc: W1_H02W0601 F4 arc: W1_H02W0701 F7 arc: W3_H06W0203 F7 word: SLICEA.K0.INIT 0000111100001100 word: SLICEA.K1.INIT 0101111101011100 word: SLICEC.K1.INIT 1101000000000000 word: SLICED.K0.INIT 1100000010001000 word: SLICED.K1.INIT 0001000000000000 word: SLICEB.K0.INIT 0010011100000000 word: SLICEC.K0.INIT 1101100000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C78:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 S1_V02N0601 arc: H00L0000 V02S0001 arc: H00R0000 V02N0401 arc: H00R0100 V02N0701 arc: N1_V02N0001 H02W0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0401 S3_V06N0203 arc: V00B0000 H02E0401 arc: V00B0100 W1_H02E0701 arc: V00T0000 V02S0401 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0701 S1_V02N0701 arc: A0 F5 arc: A1 H02W0701 arc: A2 V00B0000 arc: A5 Q5 arc: A6 H02E0701 arc: A7 Q7 arc: B0 S1_V02N0101 arc: B1 Q1 arc: B2 H01W0100 arc: B3 H02E0301 arc: B5 V02S0701 arc: B6 N1_V01S0000 arc: B7 V02S0501 arc: C0 E1_H01W0000 arc: C1 N1_V01N0001 arc: C2 N1_V01N0001 arc: C3 E1_H02W0401 arc: C5 V00T0100 arc: C6 V00T0000 arc: C7 V02S0201 arc: CE0 H00R0000 arc: CE1 E1_H02W0101 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 H02E0201 arc: D3 V00B0100 arc: D5 S1_V02N0401 arc: D6 F0 arc: D7 H01W0000 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: E1_H02E0101 Q3 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q1 arc: LSR0 H02W0301 arc: LSR1 E1_H02W0301 arc: M1 H02E0001 arc: M3 H00L0000 arc: M5 H02E0001 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V02N0301 F1 arc: V00T0100 Q3 arc: V01S0000 F3 arc: W3_H06W0303 F6 word: SLICEB.K1.INIT 1100110011110000 word: SLICED.K1.INIT 0000000100001101 word: SLICEB.K0.INIT 0000000011011000 word: SLICEA.K1.INIT 1101100011011000 word: SLICEC.K1.INIT 0000000010111000 word: SLICEA.K0.INIT 0000000100000001 word: SLICED.K0.INIT 1000100010101000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.D0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C79:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0201 V01N0001 arc: E1_H02E0301 V01N0101 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 N3_V06S0203 arc: E3_H06E0203 W1_H02E0401 arc: H00L0000 H02W0001 arc: H00R0000 V02N0401 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 W1_H02E0701 arc: S1_V02S0401 N3_V06S0203 arc: V00B0100 V02S0301 arc: V00T0000 H02E0201 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0701 V02S0701 arc: A0 F7 arc: A1 F7 arc: A2 H02E0701 arc: A3 E1_H01E0001 arc: A4 V00T0000 arc: A5 V00T0100 arc: A6 H02W0501 arc: A7 H02E0701 arc: B0 F3 arc: B1 F3 arc: B2 H02E0101 arc: B3 Q3 arc: B4 V02S0501 arc: B5 V02N0501 arc: B6 H02E0301 arc: B7 H02E0101 arc: C0 V02S0601 arc: C2 W1_H02E0401 arc: C3 E1_H02W0601 arc: C4 Q4 arc: C5 W1_H02E0401 arc: C6 Q6 arc: C7 E1_H02W0601 arc: CE0 H00R0000 arc: CE1 W1_H02E0101 arc: CE2 S1_V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V02S0001 arc: D2 W1_H02E0201 arc: D3 V02S0201 arc: D4 H00L0100 arc: D5 W1_H02E0201 arc: D6 V02S0401 arc: D7 H02E0201 arc: E1_H01E0001 Q6 arc: E1_H01E0101 F2 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F6 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0000 arc: M1 H02W0001 arc: M3 H00L0000 arc: M4 V00B0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 F5 arc: N1_V02N0301 Q1 arc: V00B0000 F4 arc: V00T0100 Q3 arc: V01S0000 Q4 arc: V01S0100 Q6 arc: W1_H02W0001 F0 word: SLICEC.K0.INIT 0000100000101010 word: SLICED.K1.INIT 0000000001010011 word: SLICEB.K1.INIT 0101001100000000 word: SLICEA.K0.INIT 1111111000001110 word: SLICEA.K1.INIT 1111111111101110 word: SLICEC.K1.INIT 1100101000000000 word: SLICEB.K0.INIT 0000000010101100 word: SLICED.K0.INIT 1010000010001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C7:PLC2 arc: E3_H06E0303 W3_H06E0303 .tile R8C80:PLC2 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0501 W3_H06E0303 arc: H00R0100 H02W0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 H02E0201 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H02W0701 arc: V00B0000 V02N0201 arc: V00T0000 V02N0601 arc: V00T0100 H02E0301 arc: W1_H02W0001 V02S0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 S1_V02N0501 arc: A2 H02E0701 arc: B3 V02S0301 arc: C2 H02E0601 arc: C3 E1_H02W0401 arc: CE2 V02S0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D2 N1_V02S0201 arc: D3 H02W0201 arc: E1_H01E0001 Q6 arc: E3_H06E0203 Q4 arc: F2 F2_SLICE arc: F3 F3_SLICE arc: LSR0 V00B0000 arc: LSR1 H02W0301 arc: M4 V00T0100 arc: M6 V00T0000 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V01S0000 F3 arc: V01S0100 F2 word: SLICEB.K1.INIT 1111110000001100 word: SLICEB.K0.INIT 1111010110100000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C81:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 V06S0103 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V06S0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 S1_V02N0301 arc: H00R0100 H02E0501 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 E1_H01W0000 arc: S1_V02S0201 E1_H01W0000 arc: S1_V02S0301 S3_V06N0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 W3_H06E0203 arc: V00B0100 S1_V02N0101 arc: V00T0100 V02N0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 S3_V06N0203 arc: A1 V02S0501 arc: B0 V02S0101 arc: B7 V00T0000 arc: C0 V02N0401 arc: C1 V02N0401 arc: C7 H02W0401 arc: CE0 V02N0201 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 N1_V01S0000 arc: D7 H00R0100 arc: E1_H01E0001 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F7 F7_SLICE arc: LSR0 H02E0301 arc: LSR1 V00T0100 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR3 LSR0 arc: N3_V06N0303 Q6 arc: S1_V02S0101 Q1 arc: V00T0000 Q0 word: SLICED.K1.INIT 1111110000001100 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111101000001010 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C82:PLC2 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 N3_V06S0203 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 S3_V06N0203 arc: E3_H06E0103 H01E0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0401 H06E0203 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0401 H01E0001 arc: S1_V02S0701 N3_V06S0203 arc: V00B0000 N1_V02S0001 arc: V00B0100 V02S0101 arc: V00T0000 W1_H02E0201 arc: W1_H02W0401 N3_V06S0203 arc: A0 H02W0501 arc: A1 H02E0501 arc: A2 V02S0501 arc: C0 V02N0401 arc: C1 V02N0401 arc: C2 V02N0401 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 V00B0100 arc: D2 N1_V01S0000 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H01W0100 Q1 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: V01S0000 Q2 arc: V01S0100 Q0 word: SLICEB.K0.INIT 1111101000001010 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1111101000001010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C83:PLC2 arc: E1_H02E0001 E1_H01W0000 arc: E1_H02E0301 V06S0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0701 V02N0701 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 H02W0201 arc: H00R0000 H02W0401 arc: H00R0100 H02E0701 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 N1_V01S0100 arc: S1_V02S0101 H02E0101 arc: S1_V02S0701 W1_H02E0701 arc: V00B0000 V02S0001 arc: V00B0100 W1_H02E0701 arc: V00T0000 H02E0001 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0501 N1_V02S0501 arc: W1_H02W0701 W3_H06E0203 arc: W3_H06W0303 V01N0101 arc: A0 V02N0701 arc: A1 V02N0701 arc: A2 V02N0501 arc: A3 V02N0501 arc: A4 V02N0301 arc: A6 V02S0301 arc: A7 H00L0000 arc: B0 H02W0101 arc: B1 H02W0101 arc: B2 H02E0301 arc: B3 H02E0301 arc: B4 N1_V01S0000 arc: B6 H02W0301 arc: B7 E1_H02W0301 arc: C0 W1_H02E0401 arc: C1 W1_H02E0401 arc: C2 S1_V02N0401 arc: C3 W1_H02E0401 arc: C4 H02E0401 arc: C6 H02E0401 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V01S0100 arc: D1 V01S0100 arc: D2 V00B0100 arc: D3 H02W0001 arc: D4 W1_H02E0001 arc: D6 V01N0001 arc: D7 V02S0601 arc: E1_H01E0001 F7 arc: E1_H01E0101 F2 arc: E1_H02E0101 Q3 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F4 arc: H01W0100 Q4 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M0 H02W0601 arc: M1 H00R0100 arc: M2 N1_V01N0001 arc: M3 H01W0100 arc: M4 E1_H01E0101 arc: M5 V01S0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: N1_V01N0001 F6 arc: N1_V02N0101 Q1 arc: N1_V02N0501 Q5 arc: V01S0000 F0 word: SLICED.K1.INIT 0111010001110111 word: SLICEA.K0.INIT 1000110111011101 word: SLICEA.K1.INIT 1000100011011000 word: SLICED.K0.INIT 0011000111111101 word: SLICEB.K0.INIT 1000110111011101 word: SLICEB.K1.INIT 1000100011011000 word: SLICEC.K0.INIT 0101010111110011 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C84:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0701 E1_H01W0100 arc: H00L0100 V02N0301 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 S3_V06N0103 arc: V00B0100 V02S0101 arc: V00T0000 S1_V02N0401 arc: V00T0100 S1_V02N0701 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 S3_V06N0003 arc: W1_H02W0101 V01N0101 arc: W1_H02W0201 V01N0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S3_V06N0203 arc: W1_H02W0601 H01E0001 arc: W3_H06W0003 E1_H02W0301 arc: A0 V02N0501 arc: A1 S1_V02N0701 arc: A2 H02E0701 arc: A3 H02E0701 arc: A4 V02S0301 arc: A5 H02E0701 arc: A6 V02N0101 arc: A7 V02N0301 arc: B0 V00T0000 arc: B1 V00T0000 arc: B2 S1_V02N0101 arc: B3 S1_V02N0101 arc: B4 V02N0501 arc: B5 V02N0701 arc: B6 N1_V01S0000 arc: B7 V00B0100 arc: C0 H02E0401 arc: C1 H02E0401 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 H02E0401 arc: C5 H02E0401 arc: C6 W1_H02E0401 arc: C7 W1_H02E0401 arc: CE0 S1_V02N0201 arc: CE1 S1_V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 E1_H02W0001 arc: D2 V01S0100 arc: D3 V01S0100 arc: D4 V02S0401 arc: D5 V02S0401 arc: D6 H00L0100 arc: D7 V02N0401 arc: E1_H01E0101 F7 arc: E1_H02E0401 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 Q7 arc: H01W0000 Q5 arc: LSR0 H02E0301 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M1 H02E0001 arc: M2 W1_H02E0601 arc: M3 H00R0100 arc: M4 E1_H01E0101 arc: M5 V01S0000 arc: M6 N1_V01N0101 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 F4 arc: N1_V02N0301 Q1 arc: V00B0000 F6 arc: V01S0000 F2 word: SLICEB.K0.INIT 1000110111011101 word: SLICEB.K1.INIT 1000100011011000 word: SLICED.K0.INIT 0101010111110011 word: SLICEA.K0.INIT 1000110111011101 word: SLICEA.K1.INIT 1100110001010000 word: SLICED.K1.INIT 0101000111111011 word: SLICEC.K0.INIT 1000101110111011 word: SLICEC.K1.INIT 1000100011011000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C85:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 S3_V06N0303 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 H06E0103 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 E1_H02W0601 arc: V00B0000 E1_H02W0401 arc: V00T0000 E1_H02W0201 arc: W1_H02W0301 V02N0301 arc: A2 S1_V02N0501 arc: B0 H02E0301 arc: B3 S1_V02N0301 arc: B4 V02N0501 arc: B5 E1_H02W0301 arc: B6 V00T0000 arc: B7 V00B0000 arc: E1_H02E0601 F6 arc: E1_H02E0701 F5 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: S1_V02S0301 F3 arc: S3_V06S0203 F4 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1100110011000000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R8C86:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0701 W3_H06E0203 arc: H00R0000 V02N0601 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 V01N0001 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 E1_H01W0100 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02E0101 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 S1_V02N0301 arc: A4 H02E0501 arc: A5 H02E0501 arc: A7 V02S0301 arc: B0 V00T0000 arc: B1 V00B0000 arc: B4 V02N0501 arc: B5 V02N0501 arc: B7 H02E0301 arc: C4 V01N0101 arc: C5 H02W0601 arc: C6 V02S0001 arc: C7 E1_H02W0601 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D4 E1_H01W0100 arc: D5 V02N0401 arc: D6 H01W0000 arc: D7 S1_V02N0401 arc: E1_H01E0001 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F1 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 E1_H02W0301 arc: M0 V00T0100 arc: M2 N1_V01N0001 arc: M4 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N3_V06N0003 Q0 arc: S3_V06S0303 Q6 arc: V00B0000 Q6 arc: V00B0100 F7 word: SLICED.K1.INIT 0101000111111011 word: SLICEC.K0.INIT 1101000111110011 word: SLICEC.K1.INIT 1101110000010000 word: SLICED.K0.INIT 1111000000000000 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C87:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 N1_V02S0001 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 W1_H02E0701 arc: H00L0000 E1_H02W0001 arc: H00R0100 V02N0701 arc: H01W0100 W3_H06E0303 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0101 S3_V06N0103 arc: N1_V02N0201 S3_V06N0103 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 W3_H06E0203 arc: V00B0100 H02W0501 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 W3_H06E0303 arc: A0 V01N0101 arc: A1 H02E0501 arc: A3 H01E0001 arc: A6 N1_V01N0101 arc: A7 N1_V01N0101 arc: B0 V02N0301 arc: B1 V01N0001 arc: B6 V00B0100 arc: B7 V00B0100 arc: C0 S1_V02N0601 arc: C1 H02W0601 arc: C2 W1_H02E0601 arc: C4 S1_V02N0001 arc: C6 E1_H01E0101 arc: C7 E1_H01E0101 arc: CE0 H00L0000 arc: CE1 H02W0101 arc: CE2 H02W0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 H02E0201 arc: D6 H02E0001 arc: D7 H02E0001 arc: E1_H01E0001 Q3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F5D_SLICE arc: H00R0000 F6 arc: LSR0 E1_H02W0301 arc: LSR1 E1_H02W0501 arc: M6 V00T0100 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q0 arc: S1_V02S0001 Q2 arc: S1_V02S0301 Q3 arc: S3_V06S0203 Q4 arc: V00T0100 F1 arc: W1_H02W0201 Q2 arc: W1_H02W0401 Q4 arc: W3_H06W0203 Q7 word: SLICEA.K1.INIT 0011001111110101 word: SLICED.K0.INIT 1100110001011111 word: SLICED.K1.INIT 1100110001010000 word: SLICEA.K0.INIT 1010101010111000 word: SLICEB.K0.INIT 1111000000000000 word: SLICEB.K1.INIT 1010101000000000 word: SLICEC.K0.INIT 1111000000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C88:PLC2 arc: H00L0000 V02N0001 arc: H00R0000 W1_H02E0401 arc: N1_V02N0201 V01N0001 arc: N1_V02N0301 S3_V06N0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 S3_V06N0203 arc: S1_V02S0401 H02E0401 arc: S1_V02S0601 N3_V06S0303 arc: V00B0100 H02E0501 arc: V00T0000 N1_V02S0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 S3_V06N0103 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 S3_V06N0303 arc: W1_H02W0601 N3_V06S0303 arc: A0 V02N0701 arc: A1 W1_H02E0701 arc: A2 H02E0701 arc: B0 V00T0000 arc: B1 H00R0100 arc: C0 S1_V02N0401 arc: C1 S1_V02N0401 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 V02N0201 arc: D2 S1_V02N0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: H00R0100 Q5 arc: H01W0100 Q2 arc: LSR0 H02W0301 arc: LSR1 V00T0100 arc: M5 H02E0001 arc: M6 V00B0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: S3_V06S0003 Q0 arc: S3_V06S0103 Q2 arc: V01S0100 Q1 word: SLICEA.K0.INIT 1100111011111010 word: SLICEA.K1.INIT 1100111011111010 word: SLICEB.K0.INIT 1010101000000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R8C9:PLC2 arc: W3_H06W0203 E3_H06W0103 .tile R9C23:PLC2 arc: E3_H06E0003 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 .tile R9C27:PLC2 arc: E1_H02E0401 V02S0401 .tile R9C29:PLC2 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0701 E1_H01W0100 arc: N1_V02N0001 W3_H06E0003 .tile R9C30:PLC2 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02S0201 arc: H00R0100 E1_H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0501 H02E0501 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E1_H02W0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02W0001 arc: A0 E1_H02W0501 arc: A2 H02E0701 arc: A3 H02W0501 arc: A4 H02W0501 arc: A6 H00L0000 arc: A7 E1_H01W0000 arc: B0 H01W0100 arc: B2 E1_H02W0301 arc: B3 E1_H01W0100 arc: B4 V02S0701 arc: B6 H02E0301 arc: B7 V01S0000 arc: C0 S1_V02N0601 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 H02E0401 arc: C6 V00T0100 arc: C7 H02E0401 arc: CE0 H00R0100 arc: CE1 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D2 V01S0100 arc: D3 E1_H02W0001 arc: D4 V02N0601 arc: D6 H01W0000 arc: D7 E1_H02W0201 arc: E1_H01E0001 F6 arc: E1_H01E0101 F0 arc: E1_H02E0601 F4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F2 arc: H01W0100 Q2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0000 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q2 arc: V00B0100 F7 arc: V00T0100 F3 arc: V01S0000 Q0 arc: V01S0100 Q0 word: SLICEA.K0.INIT 0000000101010001 word: SLICED.K1.INIT 0101001100000000 word: SLICEC.K0.INIT 1111111110101100 word: SLICEC.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0011001000000010 word: SLICEB.K1.INIT 1100101000000000 word: SLICED.K0.INIT 0000000011111011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET SET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C31:PLC2 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 S1_V02N0401 arc: E3_H06E0003 N1_V01S0000 arc: H00L0100 V02S0101 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0501 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02E0201 arc: W1_H02W0001 E3_H06W0003 arc: A0 F5 arc: A1 V02S0701 arc: A2 H01E0001 arc: A3 E1_H02W0701 arc: A4 S1_V02N0301 arc: A5 Q5 arc: A7 V00T0100 arc: B0 V00B0000 arc: B1 V02N0301 arc: B2 W1_H02E0301 arc: B3 Q3 arc: B4 F3 arc: B5 E1_H02W0101 arc: B7 V01S0000 arc: C0 S1_V02N0401 arc: C1 W1_H02E0401 arc: C2 E1_H01W0000 arc: C3 N1_V01N0001 arc: C4 H02W0401 arc: C5 E1_H02W0401 arc: C7 S1_V02N0001 arc: CE0 H00R0100 arc: CE1 V02S0201 arc: CE2 H00L0100 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 V01S0100 arc: D2 V00B0100 arc: D3 E1_H02W0001 arc: D4 S1_V02N0401 arc: D5 H01W0000 arc: D7 H02W0001 arc: E1_H01E0001 F0 arc: E1_H01E0101 F2 arc: E1_H02E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q0 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M0 E1_H02W0601 arc: M3 E1_H02W0201 arc: M5 H00R0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q3 arc: V00B0000 F4 arc: V00B0100 F7 arc: V00T0100 Q3 arc: V01S0000 Q7 arc: V01S0100 Q7 arc: W1_H02W0501 Q5 word: SLICEB.K1.INIT 0010001000001010 word: SLICEC.K1.INIT 0001000011010000 word: SLICEC.K0.INIT 0101010100000001 word: SLICEA.K0.INIT 0000110001001100 word: SLICEA.K1.INIT 1011000010000000 word: SLICED.K1.INIT 1010110000000000 word: SLICEB.K0.INIT 1010101010101000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C32:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 H01E0001 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0501 H01E0101 arc: H00L0100 H02W0101 arc: H00R0000 H02W0601 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 E1_H01W0000 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 N1_V02S0301 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 E3_H06W0203 arc: A0 E1_H01E0001 arc: A1 E1_H01E0001 arc: A2 V02S0701 arc: A3 E1_H01E0001 arc: A4 H02W0701 arc: A5 V02S0301 arc: A6 H00L0000 arc: A7 N1_V01N0101 arc: B0 E1_H02W0101 arc: B1 Q1 arc: B2 H02E0101 arc: B3 H02W0301 arc: B4 V01S0000 arc: B5 N1_V01S0000 arc: B6 F3 arc: B7 V01S0000 arc: C0 S1_V02N0601 arc: C1 N1_V01N0001 arc: C2 H00R0100 arc: C3 E1_H01W0000 arc: C4 Q4 arc: C5 W1_H02E0601 arc: C6 S1_V02N0001 arc: C7 V02N0201 arc: CE0 V02S0201 arc: CE2 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 H02E0001 arc: D2 E1_H02W0201 arc: D3 H02E0001 arc: D4 H00L0100 arc: D5 F2 arc: D6 E1_H02W0001 arc: D7 V02S0401 arc: E1_H01E0101 F6 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 F7 arc: H01W0000 F1 arc: LSR0 V00T0000 arc: M1 H00R0000 arc: M4 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 Q4 arc: V01S0000 Q1 arc: W1_H02W0401 F4 word: SLICEC.K0.INIT 0001000100000101 word: SLICED.K1.INIT 0000000011001010 word: SLICEB.K0.INIT 1111111000000000 word: SLICEC.K1.INIT 0000000000110111 word: SLICEA.K1.INIT 0100010001010000 word: SLICEB.K1.INIT 1000100010100000 word: SLICEA.K0.INIT 0100010101000000 word: SLICED.K0.INIT 1110111100000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C33:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 V02N0201 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 V02S0001 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H00R0100 H02W0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 N1_V01S0000 arc: S1_V02S0201 E3_H06W0103 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: V00B0000 V02N0201 arc: V00T0100 V02S0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 S1_V02N0701 arc: A0 H02E0501 arc: A1 F5 arc: A2 S1_V02N0701 arc: A4 V00B0000 arc: A5 Q5 arc: A7 V00T0100 arc: B0 V02S0101 arc: B1 E1_H02W0301 arc: B2 V02N0101 arc: B4 V02N0701 arc: B5 V00B0100 arc: B7 V02S0701 arc: C0 E1_H01W0000 arc: C1 W1_H02E0401 arc: C2 S1_V02N0601 arc: C4 H02W0401 arc: C5 S1_V02N0001 arc: C7 F4 arc: CE0 H00L0000 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H01E0101 arc: D1 F2 arc: D2 Q2 arc: D4 E1_H02W0001 arc: D5 S1_V02N0401 arc: D7 E1_H01W0100 arc: E1_H01E0001 F7 arc: E1_H01E0101 Q5 arc: E1_H02E0301 F1 arc: E3_H06E0003 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q2 arc: LSR0 H02E0301 arc: LSR1 H02E0301 arc: M1 H00L0100 arc: M2 E1_H02W0601 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: V00B0100 Q7 arc: V01S0100 Q1 arc: W1_H02W0301 Q1 arc: W1_H02W0501 Q7 word: SLICEC.K1.INIT 0000000001010011 word: SLICEB.K0.INIT 0010000000101010 word: SLICEA.K1.INIT 0000110001001100 word: SLICEC.K0.INIT 1101000010000000 word: SLICED.K1.INIT 0101010101010001 word: SLICEA.K0.INIT 1000110010001000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C34:PLC2 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0000 V02S0001 arc: H00L0100 V02S0101 arc: H00R0000 H02W0601 arc: N1_V02N0301 H01E0101 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 S3_V06N0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0100 S1_V02N0301 arc: V00T0100 V02S0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 H01E0001 arc: W1_H02W0401 V02S0401 arc: W1_H02W0501 E3_H06W0303 arc: A0 H02E0701 arc: A1 V02N0501 arc: A2 E1_H01E0001 arc: A3 E1_H02W0501 arc: A4 F5 arc: A5 S1_V02N0101 arc: A7 Q7 arc: B0 V00T0000 arc: B1 H00R0100 arc: B2 E1_H02W0301 arc: B3 H02E0301 arc: B4 S1_V02N0701 arc: B5 V01S0000 arc: B6 S1_V02N0501 arc: B7 E1_H02W0301 arc: C0 H02E0601 arc: C1 V02S0401 arc: C2 N1_V01N0001 arc: C3 F4 arc: C5 V00B0100 arc: C6 E1_H01E0101 arc: C7 S1_V02N0001 arc: CE0 H00L0000 arc: CE1 H00L0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 H02E0201 arc: D2 S1_V02N0001 arc: D3 W1_H02E0001 arc: D4 F0 arc: D5 V02N0601 arc: D6 F2 arc: D7 V02N0601 arc: E1_H01E0001 Q0 arc: E1_H01E0101 F7 arc: E3_H06E0003 F3 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q7 arc: H01W0000 F6 arc: H01W0100 F1 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M0 H02W0601 arc: M2 H02W0601 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: V00T0000 Q2 arc: V01S0000 Q7 arc: V01S0100 Q2 word: SLICEC.K1.INIT 0000000101010001 word: SLICEA.K0.INIT 0010000000101010 word: SLICEC.K0.INIT 0011001100100010 word: SLICEB.K1.INIT 1010101000001000 word: SLICEA.K1.INIT 0000101000001100 word: SLICEB.K0.INIT 1100000010001000 word: SLICED.K1.INIT 0011001000000010 word: SLICED.K0.INIT 0000000000000011 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C35:PLC2 arc: E1_H02E0401 N3_V06S0203 arc: H01W0100 E3_H06W0303 arc: N1_V01N0101 N3_V06S0203 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0001 H06W0003 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 V02S0301 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 H01E0001 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 E1_H02W0601 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A1 V02S0501 arc: B0 V00T0000 arc: C0 V02N0401 arc: C1 V02N0601 arc: CE0 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 V00B0100 arc: E1_H01E0101 Q0 arc: E1_H02E0101 Q1 arc: E1_H02E0301 Q1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR0 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V02N0201 Q0 arc: V00T0000 Q0 word: SLICEA.K0.INIT 0011001111110000 word: SLICEA.K1.INIT 1010101011110000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R9C36:PLC2 arc: E1_H02E0701 N1_V02S0701 arc: E3_H06E0303 N1_V01S0100 arc: H00R0000 V02S0401 arc: N1_V02N0001 N3_V06S0003 arc: N1_V02N0101 H02E0101 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H01E0101 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 E1_H01W0000 arc: N1_V02N0701 E1_H02W0701 arc: S1_V02S0101 E3_H06W0103 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V02S0101 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H02W0401 arc: W3_H06W0303 E3_H06W0203 arc: A1 E1_H02W0701 arc: B0 V02S0301 arc: C0 H02E0401 arc: C1 H02E0401 arc: CE0 N1_V02S0201 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D1 V02S0001 arc: E1_H01E0001 Q1 arc: E1_H01E0101 Q0 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 word: SLICEA.K0.INIT 1100111111000000 word: SLICEA.K1.INIT 1111101000001010 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 .tile R9C37:PLC2 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0701 V06N0203 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0401 arc: N1_V02N0401 H01E0001 arc: N1_V02N0701 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02E0701 arc: V00T0000 N1_V02S0401 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V06N0203 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 H00L0000 arc: A2 V00T0000 arc: A3 H01E0001 arc: A5 N1_V02S0101 arc: B4 N1_V02S0701 arc: B6 V00B0000 arc: B7 H01E0101 arc: CE2 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: E3_H06E0303 Q5 arc: H01W0000 Q5 arc: H01W0100 Q5 arc: LSR0 V00B0100 arc: M5 H00R0000 arc: MUXCLK2 CLK0 arc: MUXLSR2 LSR0 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 1001100110011010 word: SLICEB.K1.INIT 0101010101011010 word: SLICEC.K0.INIT 0011001100111100 word: SLICEC.K1.INIT 0101010101011010 word: SLICED.K0.INIT 0011001100111100 word: SLICED.K1.INIT 0011001100111100 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C38:PLC2 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0401 S3_V06N0203 arc: E1_H02E0601 W3_H06E0303 arc: H00L0000 S1_V02N0001 arc: H00R0000 E1_H02W0401 arc: N1_V02N0101 E1_H01W0100 arc: N1_V02N0201 W1_H02E0201 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 N1_V02S0001 arc: V00T0000 E1_H02W0201 arc: V01S0000 S3_V06N0103 arc: V01S0100 S3_V06N0303 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 N1_V02S0501 arc: A2 V00B0000 arc: A4 N1_V02S0101 arc: A6 V02S0101 arc: A7 H00R0000 arc: B1 V00T0000 arc: B3 H02W0301 arc: B5 E1_H02W0301 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 Q7 arc: E3_H06E0203 Q7 arc: LSR1 H02W0501 arc: M7 H00L0000 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR1 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 0101010101011010 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0101010101011010 word: SLICEB.K1.INIT 0011001100111100 word: SLICEC.K0.INIT 0101010101011010 word: SLICEC.K1.INIT 0011001100111100 word: SLICED.K0.INIT 0101010101011010 word: SLICED.K1.INIT 0101010101011010 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C39:PLC2 arc: E1_H02E0301 N1_V01S0100 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 N3_V06S0303 arc: N1_V02N0701 E1_H01W0100 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 H06W0303 arc: S1_V02S0701 E3_H06W0203 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00T0000 H02W0001 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 V02S0501 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0303 E3_H06W0203 arc: B0 E1_H01W0100 arc: B1 V00T0000 arc: F2 F2_SLICE arc: N1_V02N0201 F2 arc: N3_V06N0103 F2 word: SLICEA.K0.INIT 0011001100111100 word: SLICEA.K1.INIT 0011001100111100 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 .tile R9C40:PLC2 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 W3_H06E0303 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 H02W0401 arc: S1_V02S0101 E1_H02W0101 arc: S3_V06S0203 E3_H06W0203 arc: V00T0100 V02S0501 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 N1_V01S0000 arc: W1_H02W0501 S3_V06N0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0303 E1_H02W0601 arc: A0 V02S0701 arc: B1 H02E0301 arc: C0 H02W0401 arc: C1 H02W0401 arc: CE0 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 E1_H02W0001 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: H01W0000 Q0 arc: H01W0100 Q1 arc: LSR1 V00T0100 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR1 arc: W1_H02W0001 Q0 word: SLICEA.K0.INIT 1010111110100000 word: SLICEA.K1.INIT 1100111111000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 .tile R9C41:PLC2 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 V06N0303 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0303 E1_H01W0100 arc: S1_V02S0001 H06W0003 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0701 H02W0701 arc: S3_V06S0003 H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0401 N3_V06S0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0203 .tile R9C42:PLC2 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 W1_H02E0301 arc: E1_H02E0701 E3_H06W0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 N1_V02S0001 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0701 N3_V06S0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0201 H02W0201 arc: S1_V02S0301 H06W0003 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 W1_H02E0401 arc: V00B0100 V02S0101 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0601 E1_H02W0301 arc: W1_H02W0701 V02S0701 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A1 H00L0000 arc: A2 H02W0701 arc: A3 H02W0501 arc: A4 W1_H02E0701 arc: A5 V02N0101 arc: A6 E1_H02W0501 arc: A7 H00R0000 arc: B0 S1_V02N0301 arc: B1 W1_H02E0301 arc: B2 W1_H02E0301 arc: B3 W1_H02E0301 arc: B4 W1_H02E0301 arc: B5 W1_H02E0301 arc: B7 V00T0000 arc: C0 E1_H02W0601 arc: C1 S1_V02N0601 arc: C2 H00L0000 arc: C3 H02E0601 arc: C4 N1_V02S0001 arc: C5 N1_V02S0001 arc: C6 N1_V02S0001 arc: C7 V00T0100 arc: CE0 V02N0201 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 N1_V02S0001 arc: D1 V00B0100 arc: D2 S1_V02N0201 arc: D3 N1_V02S0001 arc: D4 E1_H02W0201 arc: D5 V00B0000 arc: D6 V02N0401 arc: D7 H01W0000 arc: E1_H01E0001 Q5 arc: E1_H01E0101 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q0 arc: H01W0100 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q3 arc: N1_V01N0101 Q2 arc: N1_V02N0301 Q1 arc: N1_V02N0401 Q4 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q6 arc: N3_V06N0003 Q0 arc: N3_V06N0103 Q1 arc: N3_V06N0203 Q4 arc: N3_V06N0303 Q5 arc: V00T0000 Q2 arc: V00T0100 Q1 arc: V01S0100 Q0 arc: W1_H02W0201 Q2 arc: W1_H02W0301 Q3 word: SLICED.K1.INIT 0000000000000001 word: SLICEA.K0.INIT 1111110011001100 word: SLICEA.K1.INIT 1010111000001100 word: SLICEB.K0.INIT 1010000011101100 word: SLICEC.K1.INIT 1010000011101100 word: SLICEB.K1.INIT 1010111000001100 word: SLICED.K0.INIT 1111111110100000 word: SLICEC.K0.INIT 1111010001000100 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 1 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ .tile R9C43:PLC2 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02S0301 arc: H00R0000 E1_H02W0401 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0501 W3_H06E0303 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0101 H02W0101 arc: S1_V02S0401 H02E0401 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 E1_H02W0601 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E3_H06W0203 arc: V00T0000 V02S0601 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 E1_H01W0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 V02S0201 arc: W1_H02W0501 E1_H02W0501 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A0 E1_H01E0001 arc: A2 H02W0701 arc: B4 V02N0701 arc: C0 V02S0401 arc: C2 S1_V02N0401 arc: C3 H02W0401 arc: C4 N1_V02S0001 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 H00R0000 arc: D4 S1_V02N0601 arc: E1_H01E0001 Q3 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q0 arc: H01W0100 F2 arc: LSR0 V00T0000 arc: LSR1 V00T0000 arc: M2 V00T0100 arc: M3 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0601 Q4 arc: N3_V06N0203 Q4 arc: S1_V02S0001 Q0 arc: S1_V02S0201 Q0 arc: V01S0000 F2 arc: V01S0100 F0 arc: W1_H02W0401 Q4 word: SLICEA.K0.INIT 1010101011110000 word: SLICEB.K0.INIT 1111000010101010 word: SLICEB.K1.INIT 1111000011110000 word: SLICEC.K0.INIT 1111111111000000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C44:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0401 N1_V02S0401 arc: E1_H02E0501 V02S0501 arc: E1_H02E0601 E3_H06W0303 arc: E1_H02E0701 W1_H02E0701 arc: E3_H06E0003 H01E0001 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 V02N0201 arc: H00L0100 H02E0301 arc: H00R0000 H02W0401 arc: H00R0100 N1_V02S0501 arc: S1_V02S0301 E1_H02W0301 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 S3_V06N0303 arc: S1_V02S0701 S3_V06N0203 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0001 arc: V00T0100 V02S0501 arc: V01S0000 S3_V06N0103 arc: W1_H02W0101 H01E0101 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E1_H02W0601 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E1_H01W0100 arc: A2 H02E0501 arc: B0 E1_H02W0101 arc: B2 N1_V02S0301 arc: C0 V02S0601 arc: C2 W1_H02E0601 arc: CE0 H00L0100 arc: CE1 H02E0101 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 N1_V01S0000 arc: E1_H01E0001 Q7 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: H01W0000 Q7 arc: H01W0100 F0 arc: LSR0 V00T0100 arc: LSR1 V00T0100 arc: M5 H02W0001 arc: M6 V00B0000 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V02N0401 Q6 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 arc: W1_H02W0701 Q5 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1000100011111000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C45:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0601 N1_V02S0601 arc: E3_H06E0103 W3_H06E0003 arc: H00L0000 V02S0001 arc: H00L0100 V02S0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 H02W0501 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 H02W0001 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 E3_H06W0203 arc: N3_V06N0003 S3_V06N0003 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0100 V02N0301 arc: V00T0000 V02N0401 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0501 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 E1_H02W0401 arc: W1_H02W0601 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A2 V00B0000 arc: B0 V02S0101 arc: C0 E1_H02W0601 arc: C2 E1_H02W0601 arc: C3 W1_H02E0601 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 V02N0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 S1_V02N0201 arc: E1_H01E0101 F0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: H01W0100 F2 arc: LSR0 H02E0501 arc: LSR1 H02E0501 arc: M2 V00B0100 arc: M3 H00L0000 arc: M4 V00T0000 arc: M5 H00R0100 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q3 arc: S1_V02S0001 F0 arc: S1_V02S0201 Q0 arc: S1_V02S0701 Q5 arc: V00B0000 Q4 arc: V01S0100 F0 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 1100111111000000 word: SLICEB.K0.INIT 1111101000001010 word: SLICEB.K1.INIT 1111000011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C46:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 V02N0001 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 H02E0401 arc: H00R0100 V02S0701 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0301 H06E0003 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 H06W0103 arc: S1_V02S0401 H06W0203 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02S0001 arc: V00B0100 N1_V02S0301 arc: V00T0000 E1_H02W0001 arc: V00T0100 H02W0301 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 N1_V01S0100 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 H01E0101 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V02S0501 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A0 S1_V02N0501 arc: A2 S1_V02N0701 arc: A3 V00B0000 arc: A4 S1_V02N0301 arc: A5 Q5 arc: A6 V02S0301 arc: A7 F5 arc: B0 W1_H02E0101 arc: B2 V02N0101 arc: B4 H02E0101 arc: B5 H02E0101 arc: B6 F3 arc: C0 W1_H02E0401 arc: C2 H00L0000 arc: C3 S1_V02N0401 arc: C4 V00T0100 arc: C5 V00T0100 arc: C6 V02S0201 arc: C7 F4 arc: CE0 E1_H02W0101 arc: CE1 H00R0100 arc: CE2 V02S0601 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D2 W1_H02E0201 arc: D3 F2 arc: D4 H01W0000 arc: D5 V02N0601 arc: D6 H02W0001 arc: D7 V00B0000 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 H02E0601 arc: M1 E1_H02W0001 arc: M2 V00T0000 arc: M5 E1_H02W0001 arc: M6 V00B0100 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F7 arc: N1_V02N0401 F6 arc: S1_V02S0001 Q2 arc: S1_V02S0501 Q5 arc: S3_V06S0003 F0 arc: V01S0000 Q1 arc: V01S0100 Q2 arc: W1_H02W0601 Q6 arc: W1_H02W0701 Q7 word: SLICEA.K0.INIT 1011111110001111 word: SLICEA.K1.INIT 0000000000000000 word: SLICEC.K1.INIT 1110000000100000 word: SLICEC.K0.INIT 0000111000000010 word: SLICEB.K0.INIT 1011100000000000 word: SLICEB.K1.INIT 0000000000001010 word: SLICED.K1.INIT 0000000000000101 word: SLICED.K0.INIT 1010100011111101 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C47:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 V02S0001 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 N1_V01S0100 arc: E1_H02E0701 H01E0101 arc: E3_H06E0303 H01E0101 arc: H00L0000 E1_H02W0201 arc: H00L0100 S1_V02N0301 arc: H00R0000 E1_H02W0401 arc: H00R0100 H02W0701 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 N1_V01S0000 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0001 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 H02W0001 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 V02N0201 arc: V00T0100 N1_V02S0501 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 V02S0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0203 arc: A0 F5 arc: A1 F5 arc: A2 S1_V02N0701 arc: A3 H02W0501 arc: A4 V02S0301 arc: A5 V02S0301 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B0 E1_H01W0100 arc: B2 E1_H02W0101 arc: B3 H01W0100 arc: B4 S1_V02N0501 arc: B5 V02S0501 arc: B6 F3 arc: B7 S1_V02N0501 arc: C0 F4 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 S1_V02N0601 arc: C4 V00B0100 arc: C5 V02N0201 arc: C6 H02W0401 arc: C7 H02E0601 arc: CE0 H00L0100 arc: CE1 H00L0000 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 V02S0001 arc: D1 V02S0001 arc: D2 V02N0001 arc: D3 F2 arc: D4 V00B0000 arc: D5 V02N0401 arc: D6 S1_V02N0601 arc: D7 S1_V02N0401 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q3 arc: H01W0100 F7 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 H02W0601 arc: M1 H02W0001 arc: M2 V00T0100 arc: M3 H00R0100 arc: M4 H02E0401 arc: M5 E1_H02W0001 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q1 arc: S1_V02S0301 Q1 arc: S1_V02S0501 Q7 arc: V00B0100 Q7 arc: V01S0000 Q2 arc: V01S0100 F6 arc: W1_H02W0001 F0 arc: W1_H02W0401 Q4 arc: W3_H06W0303 Q5 word: SLICEC.K0.INIT 1000100010100000 word: SLICEC.K1.INIT 0100010101000000 word: SLICEA.K0.INIT 1111101011001100 word: SLICEA.K1.INIT 1111101011111111 word: SLICED.K1.INIT 1100000010100000 word: SLICEB.K0.INIT 0011000100100000 word: SLICEB.K1.INIT 0101010101000101 word: SLICED.K0.INIT 1100110011001000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C48:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0101 V06N0103 arc: E1_H02E0201 E3_H06W0103 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 V02S0201 arc: H00L0100 V02S0301 arc: H00R0000 H02E0401 arc: H00R0100 N1_V02S0501 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 E3_H06W0103 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 H02W0601 arc: N1_V02N0701 H06W0203 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0301 H02E0301 arc: S1_V02S0401 N1_V01S0000 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 V02S0201 arc: V00T0100 E1_H02W0101 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 N1_V01S0100 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 N1_V01S0000 arc: W3_H06W0303 E3_H06W0303 arc: A0 E1_H02W0701 arc: A2 E1_H02W0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 N1_V01N0101 arc: B0 H02W0301 arc: B2 V02S0101 arc: B3 V02S0101 arc: B4 H02E0301 arc: B5 S1_V02N0501 arc: B6 S1_V02N0701 arc: C3 H02W0601 arc: C4 E1_H01E0101 arc: C5 S1_V02N0001 arc: C6 E1_H02W0601 arc: CE0 H00L0100 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 W1_H02E0001 arc: D3 W1_H02E0001 arc: D4 H02E0201 arc: D5 V02S0601 arc: D6 V02S0601 arc: E1_H01E0101 Q6 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H01W0000 Q3 arc: H01W0100 F4 arc: LSR1 H02W0501 arc: M2 V00T0100 arc: M3 H00R0100 arc: M5 H00L0000 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q5 arc: S1_V02S0701 F5 arc: V01S0000 F0 arc: V01S0100 Q0 arc: W1_H02W0201 F2 arc: W1_H02W0401 F6 word: SLICEC.K1.INIT 0100000001110000 word: SLICEB.K0.INIT 1100110010101010 word: SLICEB.K1.INIT 1111110011110000 word: SLICEA.K0.INIT 1011101110001000 word: SLICEC.K0.INIT 1000100011000000 word: SLICED.K0.INIT 1011000010000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C49:PLC2 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0201 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 E3_H06W0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0201 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 E1_H02W0701 arc: H01W0000 E3_H06W0103 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 E1_H02W0101 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 E1_H01W0100 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0101 E3_H06W0103 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00T0000 W1_H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0101 E1_H01W0100 arc: W1_H02W0201 E1_H02W0701 arc: W1_H02W0301 E1_H02W0201 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V06N0303 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E1_H01W0100 arc: A1 H02E0501 arc: A2 H02E0701 arc: A4 F5 arc: A5 H02E0701 arc: A6 V02S0301 arc: A7 H02E0701 arc: B0 N1_V02S0101 arc: B2 V02N0301 arc: B4 H02W0301 arc: B5 V00B0100 arc: B6 S1_V02N0501 arc: B7 S1_V02N0701 arc: C0 H02W0401 arc: C1 H02W0401 arc: C2 N1_V01N0001 arc: C5 V00T0000 arc: C6 F4 arc: C7 V00B0100 arc: CE0 V02N0201 arc: CE1 H00R0000 arc: CE2 H00R0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 S1_V02N0201 arc: D4 W1_H02E0001 arc: D5 H00L0100 arc: D6 H02W0001 arc: D7 E1_H01W0100 arc: E1_H01E0001 F2 arc: E1_H01E0101 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q2 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0501 arc: M0 V00T0100 arc: M1 E1_H02W0001 arc: M2 E1_H02W0601 arc: M4 V00B0000 arc: M7 E1_H01W0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q1 arc: N1_V02N0401 F6 arc: V00B0100 Q7 arc: V01S0000 Q4 arc: W1_H02W0001 F0 word: SLICEA.K0.INIT 1111000011001100 word: SLICEA.K1.INIT 1111101010101010 word: SLICEB.K0.INIT 0000001100010001 word: SLICEC.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 0000000000010001 word: SLICED.K0.INIT 1010100011111101 word: SLICED.K1.INIT 0000000011100010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C50:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0301 N1_V02S0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 E3_H06W0303 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0001 arc: H00R0000 H02W0401 arc: H00R0100 H02E0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 H06E0303 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0301 H06W0003 arc: S1_V02S0401 H01E0001 arc: S1_V02S0501 H01E0101 arc: S1_V02S0601 E3_H06W0303 arc: S3_V06S0003 H06W0003 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 E1_H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 V02S0701 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E1_H02W0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 V02N0701 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E3_H06W0103 arc: W3_H06W0203 E3_H06W0203 arc: W3_H06W0303 E3_H06W0303 arc: A1 N1_V02S0701 arc: A2 F5 arc: A3 E1_H02W0501 arc: A5 Q5 arc: A6 N1_V02S0101 arc: B0 V00T0000 arc: B2 V02S0301 arc: B3 V02S0301 arc: B5 H02E0301 arc: B6 H02E0301 arc: C0 H00L0100 arc: C2 E1_H01W0000 arc: C3 E1_H01W0000 arc: C5 V02S0001 arc: C6 S1_V02N0001 arc: CE0 H00L0000 arc: CE1 V02N0201 arc: CE2 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D2 V00B0100 arc: D5 V02N0401 arc: D6 V02S0601 arc: E1_H01E0001 F0 arc: E1_H02E0001 F0 arc: E1_H02E0201 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: H01W0000 F0 arc: LSR0 H02W0501 arc: LSR1 H02W0501 arc: M0 V00T0100 arc: M1 V01S0100 arc: M2 V00B0000 arc: M3 H00R0000 arc: M5 V01S0000 arc: M6 H02W0401 arc: M7 H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q7 arc: N1_V02N0401 Q6 arc: N1_V02N0701 Q7 arc: S1_V02S0001 F0 arc: S1_V02S0101 Q1 arc: S1_V02S0701 Q5 arc: S3_V06S0203 Q7 arc: V00B0000 F6 arc: V01S0000 F0 arc: V01S0100 F0 arc: W1_H02W0001 F2 arc: W1_H02W0401 Q6 word: SLICEA.K0.INIT 1111110000110000 word: SLICEA.K1.INIT 1010101010101010 word: SLICEC.K1.INIT 1011000010000000 word: SLICED.K0.INIT 0101000101000000 word: SLICEB.K0.INIT 1110111011100010 word: SLICEB.K1.INIT 1111101111111011 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C51:PLC2 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 N1_V01S0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W1_H02E0601 arc: H00L0000 V02N0201 arc: H00L0100 E1_H02W0301 arc: H00R0000 S1_V02N0401 arc: H00R0100 S1_V02N0501 arc: H01W0100 E3_H06W0303 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0101 E3_H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H02E0601 arc: N3_V06N0003 E3_H06W0003 arc: N3_V06N0103 E3_H06W0103 arc: S1_V02S0001 H01E0001 arc: S1_V02S0201 H06W0103 arc: S1_V02S0501 E3_H06W0303 arc: S1_V02S0601 H06W0303 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 H06W0303 arc: V00B0000 S1_V02N0001 arc: V00B0100 S1_V02N0301 arc: V00T0000 H02E0201 arc: V00T0100 V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 V06N0003 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 H01E0001 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0303 arc: A1 H00R0000 arc: A2 N1_V02S0501 arc: A4 H02E0501 arc: A6 E1_H02W0701 arc: B1 Q1 arc: B2 V02S0101 arc: B4 V02S0501 arc: B6 H02W0301 arc: C1 N1_V01N0001 arc: C2 V02S0401 arc: C4 W1_H02E0401 arc: C6 F4 arc: CE0 H02W0101 arc: CE1 H00R0100 arc: CE2 H00L0100 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D1 N1_V02S0001 arc: D2 Q2 arc: D4 V02S0601 arc: D6 E1_H01W0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 F1 arc: E1_H02E0401 Q4 arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H01W0000 F2 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M1 H02E0001 arc: M2 V00T0000 arc: M4 V00B0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V01N0101 Q1 arc: N3_V06N0203 Q4 arc: S1_V02S0401 F6 arc: V01S0000 Q6 arc: V01S0100 Q4 arc: W1_H02W0401 Q6 word: SLICEA.K1.INIT 0001101100000000 word: SLICEB.K0.INIT 1010100000001000 word: SLICEC.K0.INIT 1010100000001000 word: SLICED.K0.INIT 0011001100110001 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C52:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: H00L0000 E1_H02W0201 arc: H00L0100 V02S0301 arc: H00R0100 V02N0701 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H02W0201 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0501 H06E0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E3_H06W0203 arc: S1_V02S0101 E1_H02W0101 arc: S1_V02S0301 H01E0101 arc: S1_V02S0401 W1_H02E0401 arc: S1_V02S0501 H01E0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 V02S0201 arc: V00T0000 V02S0601 arc: V00T0100 V02S0501 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 V06N0203 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E3_H06W0203 arc: A0 E1_H01E0001 arc: A4 E1_H01W0000 arc: A6 N1_V01N0101 arc: A7 V02N0301 arc: B0 H02E0101 arc: B2 H02E0101 arc: B4 H02E0301 arc: B6 S1_V02N0701 arc: B7 S1_V02N0501 arc: C2 H02E0601 arc: C3 H02E0401 arc: C4 E1_H01E0101 arc: C6 E1_H02W0401 arc: C7 V00B0100 arc: CE0 H00L0100 arc: CE1 H00R0100 arc: CE2 V02N0601 arc: CE3 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 H00R0000 arc: D2 V02N0001 arc: D4 S1_V02N0601 arc: D6 S1_V02N0401 arc: D7 V00B0000 arc: E1_H01E0001 Q3 arc: E1_H02E0001 F0 arc: E1_H02E0201 Q0 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0100 F6 arc: LSR0 H02E0501 arc: LSR1 V00T0100 arc: M2 H02W0601 arc: M3 H02E0201 arc: M4 V00T0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F4 arc: N1_V01N0101 Q7 arc: S1_V02S0001 F0 arc: S1_V02S0201 F0 arc: S1_V02S0701 Q7 arc: V00B0100 Q7 arc: V01S0000 F2 arc: W1_H02W0501 F7 word: SLICEA.K0.INIT 1011101110001000 word: SLICEB.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 1111000011110000 word: SLICED.K1.INIT 0000000011100100 word: SLICEC.K0.INIT 0100000001110000 word: SLICED.K0.INIT 0000101000001100 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C53:PLC2 arc: E1_H01E0001 E3_H06W0003 arc: E1_H02E0001 V02N0001 arc: E3_H06E0303 W3_H06E0303 arc: H00L0000 H02E0001 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02S0701 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0301 E3_H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 H06E0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 E3_H06W0103 arc: N3_V06N0303 H06W0303 arc: S1_V02S0001 H02E0001 arc: S1_V02S0201 H02E0201 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 H06W0303 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 E3_H06W0003 arc: W1_H02W0101 E3_H06W0103 arc: W1_H02W0201 E3_H06W0103 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0601 V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: A0 S1_V02N0501 arc: A3 H02W0701 arc: A4 V02S0301 arc: A6 V02S0301 arc: A7 W1_H02E0501 arc: B0 V02S0101 arc: B1 V02S0301 arc: B2 E1_H02W0101 arc: B4 V00B0100 arc: B6 V00T0000 arc: C0 S1_V02N0601 arc: C1 V02N0401 arc: C2 V02S0401 arc: C3 H02W0601 arc: C4 V00T0000 arc: C6 V02N0201 arc: C7 E1_H02W0401 arc: CE0 H02E0101 arc: CE2 E1_H02W0101 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 S1_V02N0001 arc: D2 V02N0001 arc: D3 H02W0001 arc: D4 H00L0100 arc: D6 H02E0201 arc: D7 E1_H01W0100 arc: E1_H01E0101 F3 arc: E1_H02E0501 Q5 arc: E1_H02E0701 Q5 arc: E3_H06E0003 F3 arc: E3_H06E0103 Q2 arc: E3_H06E0203 F7 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F5C_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 F0 arc: H01W0100 F7 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0501 arc: M0 V00T0100 arc: M1 H02E0001 arc: M4 V00B0000 arc: M5 H00R0100 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q2 arc: N1_V02N0201 Q2 arc: N3_V06N0003 F3 arc: N3_V06N0203 F7 arc: S1_V02S0101 Q1 arc: S1_V02S0501 F7 arc: S1_V02S0601 F4 arc: S1_V02S0701 Q7 arc: S3_V06S0003 F3 arc: V00B0000 F6 arc: V00B0100 Q7 arc: V00T0000 Q2 arc: V01S0000 Q5 arc: V01S0100 Q2 arc: W3_H06W0003 F3 word: SLICEB.K0.INIT 1111001111000000 word: SLICEA.K0.INIT 0011111100101110 word: SLICEA.K1.INIT 0011001100110000 word: SLICED.K0.INIT 0000010010001100 word: SLICEC.K0.INIT 1111111011110100 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K1.INIT 1111101010101010 word: SLICEB.K1.INIT 1111101011110000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R9C54:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 E3_H06W0003 arc: E1_H02E0601 S1_V02N0601 arc: E1_H02E0701 V06N0203 arc: E3_H06E0203 W3_H06E0103 arc: H00R0100 V02S0501 arc: N1_V02N0001 E1_H01W0000 arc: N1_V02N0201 H01E0001 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02E0701 arc: N3_V06N0303 H01E0101 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0301 H02W0301 arc: S1_V02S0501 H02E0501 arc: S1_V02S0601 H06W0303 arc: S1_V02S0701 H01E0101 arc: S3_V06S0003 H06W0003 arc: S3_V06S0103 H06W0103 arc: S3_V06S0203 N1_V02S0401 arc: S3_V06S0303 E3_H06W0303 arc: V00B0100 H02W0501 arc: V00T0100 E1_H02W0301 arc: W1_H02W0001 N1_V01S0000 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E3_H06W0003 arc: W1_H02W0401 E1_H02W0401 arc: W1_H02W0601 E1_H02W0301 arc: W3_H06W0303 E3_H06W0303 arc: A0 F5 arc: A1 F5 arc: A2 F5 arc: A3 W1_H02E0501 arc: A5 H02W0701 arc: A6 F7 arc: A7 H02W0701 arc: B1 E1_H02W0301 arc: B2 E1_H02W0301 arc: B3 E1_H01W0100 arc: B4 V02S0701 arc: B6 V02S0701 arc: C0 E1_H02W0601 arc: C1 F4 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C6 V00T0100 arc: C7 V02S0201 arc: D0 V00T0100 arc: D1 V00B0100 arc: D2 V00B0100 arc: D3 V02S0201 arc: D4 H00R0100 arc: D5 H02W0201 arc: D6 H00R0100 arc: D7 H02W0201 arc: E1_H01E0001 F7 arc: E1_H01E0101 F1 arc: E1_H02E0001 F0 arc: E1_H02E0201 F2 arc: E1_H02E0501 F5 arc: E3_H06E0003 F3 arc: E3_H06E0103 F2 arc: E3_H06E0303 F6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F6 arc: H01W0100 F4 arc: N1_V01N0001 F6 arc: N1_V01N0101 F2 arc: N1_V02N0101 F1 arc: N3_V06N0003 F0 arc: N3_V06N0103 F2 arc: S1_V02S0201 F2 arc: S1_V02S0401 F4 arc: V01S0000 F3 arc: V01S0100 F0 arc: W1_H02W0101 F3 arc: W1_H02W0701 F7 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICEC.K1.INIT 0000000010101010 word: SLICEC.K0.INIT 0000000011001100 word: SLICEA.K1.INIT 1100110011101100 word: SLICEB.K0.INIT 1100110011101100 word: SLICED.K1.INIT 0000000000000101 word: SLICED.K0.INIT 1111100011110000 word: SLICEB.K1.INIT 1010101011101010 word: SLICEA.K0.INIT 1111111110100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 .tile R9C55:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0701 V02S0701 arc: E3_H06E0203 N3_V06S0203 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00L0100 V02S0301 arc: H00R0000 H02E0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0501 H06W0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02E0701 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0001 E3_H06W0003 arc: S1_V02S0101 E1_H01W0100 arc: S1_V02S0501 E3_H06W0303 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 H01E0101 arc: V00B0000 V02N0001 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 V02S0601 arc: A1 H02E0501 arc: A2 H02W0501 arc: A3 F5 arc: A4 N1_V01S0100 arc: A5 Q5 arc: A6 F5 arc: A7 F5 arc: B0 V00T0000 arc: B1 V02N0301 arc: B3 H02W0101 arc: B4 V02S0501 arc: C0 V02N0601 arc: C1 F4 arc: C2 N1_V01N0001 arc: C3 F4 arc: C5 V00B0100 arc: CE0 V02N0201 arc: CE2 H00L0000 arc: CE3 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 E1_H02W0201 arc: D2 V02N0201 arc: D3 F0 arc: D4 H00L0100 arc: D5 V02N0601 arc: D6 F0 arc: D7 F0 arc: E1_H01E0001 F1 arc: E1_H02E0301 F3 arc: E1_H02E0401 Q6 arc: E3_H06E0003 F3 arc: E3_H06E0103 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F6 arc: LSR0 E1_H02W0501 arc: LSR1 H02W0301 arc: M1 W1_H02E0001 arc: M5 H00R0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V02N0101 Q1 arc: N3_V06N0003 F3 arc: N3_V06N0103 F1 arc: S1_V02S0301 Q1 arc: S1_V02S0401 F6 arc: S1_V02S0601 F4 arc: S1_V02S0701 F7 arc: S3_V06S0103 F1 arc: V01S0000 F3 arc: V01S0100 Q2 arc: W1_H02W0201 F0 arc: W1_H02W0701 F5 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 arc: W3_H06W0303 Q6 word: SLICEC.K1.INIT 1010101011110000 word: SLICED.K1.INIT 1010101000000000 word: SLICEC.K0.INIT 0000000000010001 word: SLICEA.K1.INIT 1110110011101100 word: SLICEB.K1.INIT 1100110011011100 word: SLICED.K0.INIT 0101010100000000 word: SLICEA.K0.INIT 1100111111000000 word: SLICEB.K0.INIT 1010101011110000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 .tile R9C56:PLC2 arc: E1_H01E0101 E3_H06W0203 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 E3_H06W0203 arc: E1_H02E0501 V02S0501 arc: E1_H02E0701 S1_V02N0701 arc: E3_H06E0003 N1_V01S0000 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0401 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H02W0101 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 E3_H06W0203 arc: N1_V02N0501 E3_H06W0303 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 E1_H01W0100 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 E3_H06W0203 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 E3_H06W0203 arc: S1_V02S0601 H01E0001 arc: S3_V06S0003 H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: S3_V06S0203 H06E0203 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02S0301 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0101 V02S0101 arc: W1_H02W0301 V02S0301 arc: W1_H02W0401 E3_H06W0203 arc: W1_H02W0501 V02S0501 arc: W1_H02W0601 V02S0601 arc: W3_H06W0003 E1_H02W0001 arc: W3_H06W0103 N1_V01S0100 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 E3_H06W0203 arc: A0 F5 arc: A2 N1_V02S0701 arc: A3 V02N0501 arc: A4 N1_V01N0101 arc: A5 Q5 arc: A6 F7 arc: A7 Q7 arc: B0 V02N0301 arc: B1 V02N0101 arc: B2 H02W0301 arc: B3 H00R0100 arc: B4 W1_H02E0101 arc: B5 H02W0301 arc: B6 W1_H02E0301 arc: B7 W1_H02E0101 arc: C0 S1_V02N0601 arc: C1 S1_V02N0601 arc: C2 N1_V01N0001 arc: C3 V02N0401 arc: C4 E1_H01E0101 arc: C5 V02N0201 arc: C6 F4 arc: C7 E1_H01E0101 arc: CE1 H00R0000 arc: CE2 H02E0101 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0201 arc: D1 S1_V02N0201 arc: D2 Q2 arc: D3 H02E0001 arc: D4 V00B0000 arc: D5 V00B0000 arc: D6 S1_V02N0401 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 Q5 arc: H01W0000 Q2 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0501 arc: M0 V00T0000 arc: M2 V00T0100 arc: M5 H00L0100 arc: M7 H00L0100 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q5 arc: S1_V02S0301 F3 arc: S1_V02S0701 Q7 arc: V00T0000 F2 arc: V01S0100 Q2 word: SLICEB.K1.INIT 0000000001010011 word: SLICED.K1.INIT 1011000010000000 word: SLICEC.K0.INIT 0000111000000010 word: SLICED.K0.INIT 1100100011001100 word: SLICEB.K0.INIT 0000100001001100 word: SLICEC.K1.INIT 0000000100110001 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111111111100 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C57:PLC2 arc: E1_H02E0001 W1_H02E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0103 W1_H02E0101 arc: E3_H06E0203 W1_H02E0701 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 E3_H06W0003 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0501 H06W0303 arc: N1_V02N0701 H02E0701 arc: S1_V02S0001 E1_H01W0000 arc: S1_V02S0201 E3_H06W0103 arc: S1_V02S0301 E3_H06W0003 arc: S1_V02S0501 H06W0303 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 H06E0003 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06E0303 arc: V00B0100 S1_V02N0101 arc: V00T0000 V02N0401 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0201 N1_V01S0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E1_H02W0501 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: A0 S1_V02N0701 arc: A1 V02N0501 arc: A2 F7 arc: A3 F7 arc: A4 V02N0101 arc: A6 F7 arc: A7 H02E0501 arc: B0 V02N0301 arc: B1 V02N0301 arc: B2 V02S0301 arc: B3 V02S0301 arc: B4 H02W0101 arc: B5 E1_H02W0101 arc: B6 V02S0701 arc: C0 H02W0401 arc: C1 S1_V02N0401 arc: C2 N1_V01S0100 arc: C3 N1_V01S0100 arc: C4 E1_H02W0401 arc: C5 F4 arc: C6 V00T0000 arc: C7 E1_H02W0601 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 E1_H02W0001 arc: D2 N1_V01S0000 arc: D3 N1_V01S0000 arc: D4 V02N0601 arc: D5 H02E0001 arc: D6 V02S0601 arc: D7 H02E0001 arc: E1_H01E0001 F2 arc: E1_H01E0101 F3 arc: E3_H06E0003 F3 arc: E3_H06E0303 F6 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 F7 arc: LSR0 H02W0501 arc: M0 H01E0001 arc: M7 H02E0201 arc: MUXCLK3 CLK0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F0 arc: N1_V01N0101 F5 arc: N1_V02N0601 F6 arc: N3_V06N0003 F3 arc: N3_V06N0103 F2 arc: N3_V06N0203 Q7 arc: N3_V06N0303 F6 arc: S1_V02S0401 F4 arc: S3_V06S0103 F2 arc: V01S0000 F7 arc: V01S0100 F4 arc: W1_H02W0101 F3 arc: W1_H02W0601 F6 arc: W1_H02W0701 F7 arc: W3_H06W0003 F3 arc: W3_H06W0303 F6 word: SLICEA.K0.INIT 1010101010101000 word: SLICEA.K1.INIT 0011000000100000 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 1110110011001100 word: SLICED.K0.INIT 1111001011110000 word: SLICEB.K1.INIT 1101110011001100 word: SLICEC.K0.INIT 0000000100000000 word: SLICEC.K1.INIT 0000000000111111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C58:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W1_H02E0101 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0501 V02N0501 arc: E3_H06E0003 H01E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 N1_V01S0000 arc: E3_H06E0303 N1_V01S0100 arc: H00L0100 W1_H02E0301 arc: H00R0000 H02E0601 arc: H00R0100 H02W0701 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 E1_H01W0000 arc: N1_V02N0301 S1_V02N0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0501 H01E0101 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 H02W0701 arc: N3_V06N0303 H01E0101 arc: S1_V02S0301 H02E0301 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 H06W0303 arc: S3_V06S0103 H06E0103 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 H06W0303 arc: V00B0100 H02E0501 arc: V00T0100 V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0501 V02N0501 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0103 E1_H01W0100 arc: W3_H06W0303 E1_H02W0501 arc: A5 Q5 arc: A6 F5 arc: A7 H00L0000 arc: B0 S1_V02N0101 arc: B3 H02E0101 arc: B4 F3 arc: B5 H00L0000 arc: B7 E1_H02W0301 arc: C0 N1_V01N0001 arc: C5 V02N0201 arc: C6 S1_V02N0001 arc: C7 W1_H02E0401 arc: CE0 H00R0000 arc: CE2 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D3 V02N0001 arc: D4 S1_V02N0401 arc: D5 H02E0201 arc: D6 S1_V02N0601 arc: D7 V02S0401 arc: E1_H01E0001 F6 arc: F0 F0_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F3 arc: LSR0 V00T0100 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M5 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F3 arc: N3_V06N0003 F3 arc: N3_V06N0203 F4 arc: S1_V02S0001 F0 arc: V01S0000 F4 arc: V01S0100 F7 arc: W1_H02W0401 F6 arc: W3_H06W0203 F4 word: SLICEA.K0.INIT 1111001111000000 word: SLICEB.K1.INIT 0011001100000000 word: SLICEC.K0.INIT 0000000011001100 word: SLICED.K1.INIT 0000111000000010 word: SLICEC.K1.INIT 0000000001010011 word: SLICED.K0.INIT 0000000000000101 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C59:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02N0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 V02S0001 arc: H00L0100 H02W0101 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 H06W0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 H02W0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0003 H06W0003 arc: N3_V06N0203 H06W0203 arc: S1_V02S0101 N3_V06S0103 arc: S1_V02S0301 H06W0003 arc: S1_V02S0601 W1_H02E0601 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 E1_H01W0100 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 E1_H02W0701 arc: V00T0000 S1_V02N0601 arc: V00T0100 V02N0501 arc: W1_H02W0001 H01E0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E3_H06W0303 arc: W1_H02W0701 W3_H06E0203 arc: A1 V02N0701 arc: A3 V02N0701 arc: A4 S1_V02N0101 arc: A7 H00R0000 arc: B1 W1_H02E0101 arc: B3 W1_H02E0101 arc: B4 V02S0701 arc: B7 E1_H02W0101 arc: C1 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 E1_H02W0601 arc: C7 H02W0401 arc: CE1 V02N0201 arc: CLK0 G_HPBX0000 arc: D1 H02E0001 arc: D3 H02E0001 arc: D4 W1_H02E0001 arc: D7 H00L0100 arc: E3_H06E0003 F0 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F5C_SLICE arc: F7 F7_SLICE arc: H00R0000 F4 arc: H01W0100 Q3 arc: LSR1 V00T0100 arc: M0 V00T0000 arc: M2 V00T0000 arc: M3 H00L0000 arc: M4 V00B0100 arc: MUXCLK1 CLK0 arc: MUXLSR1 LSR1 arc: N1_V01N0001 F0 arc: N3_V06N0103 F2 arc: V01S0000 F7 arc: V01S0100 F2 arc: W3_H06W0003 F0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 0000000000000000 word: SLICEA.K1.INIT 1111001111111101 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 1111011111111101 word: SLICEC.K0.INIT 1111111111100100 word: SLICEC.K1.INIT 0000000000000000 word: SLICED.K1.INIT 1101110111010001 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C60:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0201 W1_H02E0201 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0201 arc: H00R0100 H02W0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H02E0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 H01E0001 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0303 E3_H06W0303 arc: S1_V02S0501 E1_H02W0501 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: S3_V06S0303 E3_H06W0303 arc: V00B0000 S1_V02N0001 arc: V00T0000 S1_V02N0401 arc: V00T0100 S1_V02N0701 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0501 E3_H06W0303 arc: W3_H06W0003 E3_H06W0303 arc: W3_H06W0303 E3_H06W0303 arc: A1 V02N0701 arc: A2 S1_V02N0501 arc: A3 S1_V02N0701 arc: A4 V00T0100 arc: A5 S1_V02N0301 arc: A6 S1_V02N0101 arc: A7 H00R0000 arc: B0 E1_H01W0100 arc: B1 S1_V02N0101 arc: B2 V02N0101 arc: B3 Q3 arc: B4 V00B0100 arc: B5 V00B0100 arc: B6 V00T0000 arc: B7 N1_V01S0000 arc: C0 V02N0601 arc: C1 S1_V02N0401 arc: C2 E1_H01W0000 arc: C3 N1_V01S0100 arc: C4 Q4 arc: C5 E1_H02W0401 arc: C6 S1_V02N0201 arc: C7 V00T0000 arc: CE0 H00L0000 arc: CE1 V02S0201 arc: CE2 H00R0100 arc: CE3 W1_H02E0101 arc: CLK0 G_HPBX0000 arc: D0 Q0 arc: D1 V00B0100 arc: D2 V02N0001 arc: D3 V02N0001 arc: D4 H02W0001 arc: D5 H01W0000 arc: D6 V02S0601 arc: D7 S1_V02N0601 arc: E1_H01E0001 F1 arc: E1_H01E0101 F2 arc: E1_H02E0001 Q0 arc: E1_H02E0701 F7 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0000 Q4 arc: H01W0000 Q3 arc: LSR0 H02E0501 arc: LSR1 W1_H02E0501 arc: M0 V00B0000 arc: M3 W1_H02E0201 arc: M4 V00B0000 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q4 arc: N1_V01N0101 F6 arc: N1_V02N0701 F5 arc: S1_V02S0001 F0 arc: V00B0100 Q7 arc: V01S0100 Q3 arc: W1_H02W0101 F3 arc: W1_H02W0401 F4 word: SLICEB.K0.INIT 0001101100000000 word: SLICEB.K1.INIT 0000000000011011 word: SLICEC.K0.INIT 0001101100000000 word: SLICEA.K0.INIT 0011000000111111 word: SLICEA.K1.INIT 0000010011000100 word: SLICED.K0.INIT 0000010000010101 word: SLICED.K1.INIT 0101001100000000 word: SLICEC.K1.INIT 1101000010000000 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C61:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 E1_H01W0000 arc: E1_H02E0301 V02S0301 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 H02E0001 arc: H00L0100 H02E0301 arc: H00R0000 S1_V02N0601 arc: H00R0100 S1_V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W1_H02E0101 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 H02W0401 arc: N1_V02N0601 H06W0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 E1_H01W0100 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0501 E1_H01W0100 arc: S1_V02S0601 W3_H06E0303 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 H02E0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 H01E0101 arc: W3_H06W0303 E1_H01W0100 arc: A0 V02S0501 arc: A1 S1_V02N0701 arc: A2 F7 arc: A3 F7 arc: A4 V00T0000 arc: A5 S1_V02N0301 arc: A6 V02N0301 arc: A7 Q7 arc: B0 H02W0301 arc: B2 H02W0301 arc: B4 H00L0000 arc: B5 V02S0701 arc: B6 V01S0000 arc: B7 V00T0000 arc: C0 E1_H02W0401 arc: C1 H02W0601 arc: C2 F4 arc: C3 H02W0601 arc: C4 H02E0401 arc: C5 E1_H01E0101 arc: C6 H02W0401 arc: C7 H02E0401 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 E1_H02W0101 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 H02W0201 arc: D2 N1_V01S0000 arc: D3 V01S0100 arc: D4 V02N0601 arc: D5 F0 arc: D6 S1_V02N0401 arc: D7 S1_V02N0401 arc: E1_H01E0101 F2 arc: E1_H02E0401 F6 arc: E1_H02E0701 F5 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q7 arc: LSR0 W1_H02E0501 arc: LSR1 W1_H02E0501 arc: M0 H01E0001 arc: M1 H00R0100 arc: M2 V00B0100 arc: M3 W1_H02E0201 arc: M4 V00T0100 arc: M7 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q4 arc: V01S0000 Q7 arc: V01S0100 F4 arc: W1_H02W0601 Q4 arc: W3_H06W0003 Q3 word: SLICEC.K1.INIT 0000100001001100 word: SLICEA.K0.INIT 1011101110111000 word: SLICEA.K1.INIT 1111111111111010 word: SLICED.K0.INIT 1110000001000000 word: SLICEC.K0.INIT 0000000101010001 word: SLICED.K1.INIT 0000010011000100 word: SLICEB.K0.INIT 1111111000110010 word: SLICEB.K1.INIT 1111111111111010 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 .tile R9C62:PLC2 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 W3_H06E0103 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 V02N0401 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: H00L0100 H02W0301 arc: H00R0000 E1_H02W0601 arc: H00R0100 V02N0501 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 W3_H06E0203 arc: N3_V06N0303 W3_H06E0303 arc: S1_V02S0301 W1_H02E0301 arc: S1_V02S0601 H02W0601 arc: S3_V06S0203 E3_H06W0203 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 H02E0501 arc: W1_H02W0101 V06N0103 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00L0000 arc: A1 H02W0501 arc: A2 F5 arc: A3 V02N0701 arc: A4 E1_H02W0701 arc: A5 V00B0000 arc: A6 S1_V02N0101 arc: A7 H00L0000 arc: B0 V02S0101 arc: B1 E1_H02W0301 arc: B2 H00R0000 arc: B3 H01W0100 arc: B5 V02N0701 arc: B6 F3 arc: B7 H02E0101 arc: C0 W1_H02E0601 arc: C1 H02W0601 arc: C2 H02E0401 arc: C3 H00L0000 arc: C4 E1_H02W0401 arc: C5 H02E0601 arc: C6 S1_V02N0001 arc: C7 V02N0001 arc: CE0 W1_H02E0101 arc: CE1 H00L0100 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 V02S0201 arc: D2 S1_V02N0201 arc: D3 H02E0201 arc: D4 H02W0201 arc: D5 W1_H02E0001 arc: D6 F2 arc: D7 H01W0000 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q4 arc: E1_H02E0001 Q2 arc: E1_H02E0601 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 Q7 arc: H01W0100 Q4 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M0 V00B0100 arc: M2 V00T0100 arc: M3 E1_H02W0201 arc: M7 W1_H02E0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 F1 arc: N1_V01N0101 F6 arc: N3_V06N0103 Q2 arc: V00B0000 Q4 arc: V00T0100 Q3 arc: V01S0000 Q3 arc: V01S0100 Q4 arc: W1_H02W0201 F0 arc: W1_H02W0401 Q4 arc: W1_H02W0501 F7 arc: W3_H06W0103 F1 arc: W3_H06W0203 Q4 word: SLICEC.K0.INIT 1111101000001010 word: SLICED.K1.INIT 0000101100001000 word: SLICEA.K0.INIT 0000010000000111 word: SLICEA.K1.INIT 0000010000000000 word: SLICEC.K1.INIT 0101000101000000 word: SLICEB.K1.INIT 0011000100100000 word: SLICEB.K0.INIT 0011001000110011 word: SLICED.K0.INIT 1111111000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C63:PLC2 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W1_H02E0701 arc: H00L0100 V02N0301 arc: H00R0000 V02N0401 arc: H00R0100 H02E0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0601 arc: N1_V02N0701 S1_V02N0701 arc: N3_V06N0303 H01E0101 arc: S1_V02S0201 E3_H06W0103 arc: S3_V06S0203 N1_V01S0000 arc: V00B0100 V02N0301 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 S1_V02N0501 arc: W3_H06W0203 E3_H06W0103 arc: A1 F7 arc: A3 F7 arc: A4 V02S0301 arc: A5 S1_V02N0301 arc: A7 H02W0501 arc: B0 E1_H01W0100 arc: B1 E1_H02W0301 arc: B2 H02E0301 arc: B4 H00L0000 arc: B5 H02W0301 arc: B6 S1_V02N0701 arc: B7 S1_V02N0501 arc: C1 F4 arc: C2 E1_H01W0000 arc: C3 H02E0401 arc: C4 V02S0201 arc: C5 V02S0001 arc: C7 V02S0001 arc: CE0 H02W0101 arc: CE1 H00R0000 arc: CE2 H00L0100 arc: CE3 H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D3 V00B0100 arc: D4 H00R0100 arc: D5 V00B0000 arc: D6 E1_H02W0201 arc: D7 V00B0000 arc: E1_H01E0001 F3 arc: E1_H01E0101 Q2 arc: E1_H02E0601 Q4 arc: E3_H06E0303 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0000 F3 arc: H01W0100 Q0 arc: LSR0 W1_H02E0301 arc: LSR1 E1_H02W0501 arc: M4 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q6 arc: N3_V06N0003 F3 arc: S1_V02S0401 Q6 arc: S1_V02S0601 Q6 arc: S1_V02S0701 F5 arc: S3_V06S0003 F3 arc: S3_V06S0303 F5 arc: V00B0000 Q6 arc: V01S0000 F3 arc: W1_H02W0201 F2 arc: W1_H02W0601 Q6 arc: W3_H06W0003 F3 arc: W3_H06W0103 F1 word: SLICEC.K0.INIT 0100000000000000 word: SLICEA.K1.INIT 1000000010000000 word: SLICEA.K0.INIT 1100110000000000 word: SLICED.K0.INIT 1100110000000000 word: SLICEB.K0.INIT 1100000011000000 word: SLICEB.K1.INIT 0000101000000000 word: SLICEC.K1.INIT 0000000000100000 word: SLICED.K1.INIT 1000000000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ .tile R9C64:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 N3_V06S0103 arc: E1_H02E0401 W1_H02E0101 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 V02S0601 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 N3_V06S0303 arc: N1_V02N0601 E1_H02W0601 arc: N1_V02N0701 H02W0701 arc: N3_V06N0003 H01E0001 arc: S1_V02S0201 W1_H02E0201 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: V00B0000 V02N0001 arc: V00T0000 S1_V02N0601 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 N1_V01S0100 arc: W1_H02W0401 V02N0401 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 E1_H02W0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0203 E3_H06W0103 arc: W3_H06W0303 V06N0303 arc: A0 E1_H02W0701 arc: A2 V02S0701 arc: A3 H02E0501 arc: A5 V00T0000 arc: B4 N1_V01S0000 arc: B6 W1_H02E0101 arc: B7 V02S0501 arc: CE0 V02N0201 arc: CLK0 G_HPBX0000 arc: E1_H01E0001 F3 arc: E1_H02E0301 Q1 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 F6 arc: LSR0 V00B0000 arc: M1 H00R0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: N1_V01N0001 F7 arc: N1_V01N0101 F4 arc: S1_V02S0701 F5 arc: V01S0000 F6 word: SLICEA.K0.INIT 0000000000001010 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C65:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 V02S0001 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: E3_H06E0303 H01E0101 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 H06W0003 arc: N1_V02N0401 S1_V02N0401 arc: N1_V02N0601 H02E0601 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0201 H06W0103 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 H06W0203 arc: S3_V06S0303 W3_H06E0303 arc: V00T0000 W1_H02E0201 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H01W0100 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V02S0701 arc: W3_H06W0303 E1_H01W0100 arc: B0 V00T0000 arc: B1 E1_H01W0100 arc: B2 V02N0101 arc: E1_H01E0101 F1 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: N1_V01N0001 F2 arc: N1_V01N0101 F0 arc: S1_V02S0001 F0 word: SLICEA.K0.INIT 1100110011000000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEC.K0.INIT 0000000000000000 word: SLICEC.K1.INIT 0000000000001110 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.A1MUX 1 enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 .tile R9C66:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0501 V02S0501 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 W3_H06E0303 arc: H00R0000 V02N0401 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0401 H06W0203 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 H06E0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0301 H06E0003 arc: S1_V02S0401 H02W0401 arc: S1_V02S0601 W1_H02E0601 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 W3_H06E0203 arc: V00T0100 S1_V02N0501 arc: W1_H02W0701 V02N0701 arc: A1 F5 arc: A3 H02E0701 arc: A5 H02E0701 arc: B0 W1_H02E0301 arc: B1 F3 arc: B3 E1_H01W0100 arc: B4 H01E0101 arc: B5 H00L0000 arc: B6 V00B0000 arc: C0 H02E0601 arc: C1 V02S0401 arc: C2 S1_V02N0601 arc: C3 S1_V02N0401 arc: C5 V00T0100 arc: C6 F4 arc: CE0 E1_H02W0101 arc: CE1 W1_H02E0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H02W0201 arc: D2 H01E0101 arc: D3 H02E0001 arc: D4 V02N0601 arc: D5 H02E0001 arc: D6 V02N0401 arc: E1_H01E0001 Q6 arc: E1_H02E0201 F0 arc: E1_H02E0301 F1 arc: E1_H02E0401 Q6 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 Q0 arc: H01W0100 Q2 arc: LSR0 H02W0501 arc: LSR1 H02E0301 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N3_V06N0303 Q6 arc: S1_V02S0001 Q0 arc: S1_V02S0201 F0 arc: S3_V06S0303 Q6 arc: V00B0000 Q4 arc: V01S0000 Q6 arc: V01S0100 Q2 arc: W1_H02W0601 Q6 arc: W3_H06W0303 Q6 word: SLICEA.K0.INIT 1111000011001100 word: SLICEB.K0.INIT 1111000000000000 word: SLICEC.K0.INIT 1100110000000000 word: SLICED.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 1101100000000000 word: SLICEC.K1.INIT 0000000011011000 word: SLICEA.K1.INIT 0000000011101111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 1 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C67:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 S1_V02N0001 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W3_H06E0203 arc: E1_H02E0501 W1_H02E0501 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 H01E0101 arc: E3_H06E0203 W1_H02E0401 arc: E3_H06E0303 H01E0101 arc: H00L0000 H02E0201 arc: H00L0100 V02S0301 arc: H00R0000 W1_H02E0401 arc: H00R0100 V02N0501 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 N3_V06S0103 arc: N1_V02N0401 E1_H02W0401 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0203 H06E0203 arc: N3_V06N0303 H06E0303 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0101 H01E0101 arc: S1_V02S0401 W3_H06E0203 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0003 E3_H06W0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 H01E0001 arc: V00B0000 V02N0001 arc: V00B0100 S1_V02N0101 arc: V00T0000 H02E0201 arc: V00T0100 V02S0501 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0501 V02S0501 arc: W3_H06W0103 E3_H06W0003 arc: A0 S1_V02N0701 arc: A2 E1_H02W0701 arc: A4 W1_H02E0701 arc: A5 F7 arc: A7 V02N0301 arc: B0 H02E0301 arc: B2 E1_H02W0101 arc: B4 V01S0000 arc: B5 S1_V02N0501 arc: B7 H02W0301 arc: C0 F4 arc: C2 S1_V02N0601 arc: C4 V02S0001 arc: C5 E1_H01E0101 arc: C7 S1_V02N0001 arc: CE0 H00R0000 arc: CE1 H00R0100 arc: CE2 N1_V02S0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D2 V02N0201 arc: D4 H01W0000 arc: D5 F2 arc: D7 H02W0001 arc: F0 F5A_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H01W0000 Q1 arc: H01W0100 Q6 arc: LSR0 V00B0000 arc: LSR1 V00T0100 arc: M0 V00B0100 arc: M1 H00L0000 arc: M3 H00L0100 arc: M4 V00T0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: N1_V01N0001 F0 arc: N1_V01N0101 Q3 arc: N1_V02N0301 Q3 arc: S1_V02S0301 Q1 arc: S1_V02S0501 F5 arc: V01S0000 Q4 arc: V01S0100 Q4 arc: W1_H02W0401 Q6 word: SLICED.K1.INIT 1010100000001000 word: SLICEB.K0.INIT 0000000010101100 word: SLICEC.K1.INIT 1111000010110000 word: SLICEC.K0.INIT 1101000010000000 word: SLICEA.K0.INIT 0011001100110111 word: SLICEA.K1.INIT 0000000000000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C68:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 V02S0201 arc: E1_H02E0301 V02N0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0003 W1_H02E0001 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02E0201 arc: H00R0000 E1_H02W0401 arc: H00R0100 V02S0501 arc: N1_V02N0001 H01E0001 arc: N1_V02N0101 N1_V01S0100 arc: N1_V02N0301 H02W0301 arc: N1_V02N0401 W1_H02E0401 arc: N1_V02N0601 H06E0303 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 H06E0203 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0401 H06E0203 arc: S1_V02S0601 H01E0001 arc: S1_V02S0701 W3_H06E0203 arc: S3_V06S0103 E3_H06W0103 arc: S3_V06S0203 H06E0203 arc: S3_V06S0303 H06W0303 arc: V00B0000 H02W0601 arc: V00B0100 H02W0501 arc: V00T0000 H02W0201 arc: V00T0100 S1_V02N0701 arc: W1_H02W0101 W3_H06E0103 arc: W3_H06W0003 E3_H06W0003 arc: W3_H06W0203 E3_H06W0103 arc: A0 F5 arc: A1 F7 arc: A2 V02S0701 arc: A3 H00L0100 arc: A4 E1_H02W0501 arc: A5 Q5 arc: B0 S1_V02N0101 arc: B1 V00T0000 arc: B2 S1_V02N0301 arc: B3 V02S0101 arc: B4 H02W0101 arc: B7 F3 arc: C0 H00L0000 arc: C1 W1_H02E0601 arc: C2 H00L0100 arc: C3 V02N0601 arc: C4 V02N0001 arc: C5 S1_V02N0001 arc: C7 F4 arc: CE0 H00R0100 arc: CE1 V02N0201 arc: CE2 H00R0000 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00B0100 arc: D1 S1_V02N0201 arc: D2 V00T0100 arc: D3 V02N0001 arc: D4 H01W0000 arc: D5 E1_H01W0100 arc: D7 V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 Q6 arc: E1_H02E0501 Q5 arc: E1_H02E0601 Q6 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0000 Q6 arc: LSR0 W1_H02E0501 arc: LSR1 H02E0301 arc: M1 H02W0001 arc: M2 H02W0601 arc: M5 H02W0001 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q2 arc: S3_V06S0003 F0 arc: W1_H02W0001 Q2 arc: W1_H02W0301 Q1 arc: W3_H06W0103 F1 word: SLICEB.K0.INIT 0100010000001100 word: SLICEC.K1.INIT 1111101000001010 word: SLICEA.K0.INIT 0001000000010011 word: SLICEC.K0.INIT 0101010000000100 word: SLICEB.K1.INIT 1100000010100000 word: SLICED.K1.INIT 0000001100000000 word: SLICEA.K1.INIT 1111001110100011 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.A1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C69:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 H01E0001 arc: E3_H06E0003 W3_H06E0303 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W1_H02E0601 arc: H00L0000 H02E0201 arc: H00R0000 S1_V02N0601 arc: H00R0100 W1_H02E0501 arc: N1_V02N0001 H02E0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0701 H02E0701 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 S1_V02N0401 arc: S1_V02S0101 H06E0103 arc: S1_V02S0701 W1_H02E0701 arc: S3_V06S0103 W3_H06E0103 arc: V00B0100 V02N0101 arc: V00T0000 S1_V02N0601 arc: V00T0100 N1_V02S0701 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0401 W3_H06E0203 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 H01E0101 arc: W3_H06W0103 E3_H06W0003 arc: W3_H06W0203 E1_H01W0000 arc: A0 F7 arc: A1 F7 arc: A2 V00B0000 arc: A4 H02E0501 arc: A5 Q5 arc: A6 H02E0501 arc: A7 N1_V01N0101 arc: B0 S1_V02N0301 arc: B1 V02N0301 arc: B2 W1_H02E0101 arc: B3 W1_H02E0101 arc: B4 S1_V02N0501 arc: B6 V01S0000 arc: B7 S1_V02N0501 arc: C0 F4 arc: C1 F4 arc: C2 E1_H02W0601 arc: C3 E1_H02W0601 arc: C4 V02S0201 arc: C5 E1_H01E0101 arc: C6 V02N0201 arc: C7 E1_H01E0101 arc: CE0 H02W0101 arc: CE1 H00L0000 arc: CE2 H02E0101 arc: CE3 H00R0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 S1_V02N0201 arc: D3 S1_V02N0201 arc: D4 S1_V02N0401 arc: D5 W1_H02E0001 arc: D6 V02N0601 arc: D7 S1_V02N0401 arc: E1_H01E0001 Q3 arc: E1_H01E0101 Q6 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F0 arc: H01W0100 Q1 arc: LSR0 E1_H02W0301 arc: LSR1 H02W0301 arc: M0 V00B0100 arc: M1 H00R0000 arc: M2 V00T0100 arc: M3 H00R0000 arc: M5 H00R0000 arc: M6 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q1 arc: N1_V01N0101 Q5 arc: N1_V02N0501 Q5 arc: N1_V02N0601 Q6 arc: V00B0000 F6 arc: V01S0000 Q1 arc: W1_H02W0101 Q3 arc: W1_H02W0201 F2 arc: W1_H02W0501 F5 word: SLICEA.K1.INIT 1111111011111110 word: SLICEA.K0.INIT 1100110011111010 word: SLICEC.K0.INIT 0001110100000000 word: SLICED.K1.INIT 0000000000011101 word: SLICEC.K1.INIT 1111000010101010 word: SLICED.K0.INIT 1100000010100000 word: SLICEB.K0.INIT 1110111011100010 word: SLICEB.K1.INIT 1111111111110011 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.D1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C70:PLC2 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0201 V02N0201 arc: E1_H02E0401 V02S0401 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0003 W1_H02E0301 arc: E3_H06E0303 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 S1_V02N0401 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 H06E0003 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0301 H02E0301 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0701 S3_V06N0203 arc: N3_V06N0103 H06E0103 arc: S1_V02S0101 H06E0103 arc: S3_V06S0003 N1_V01S0000 arc: S3_V06S0103 H06E0103 arc: V00B0000 W1_H02E0601 arc: V00T0000 H02W0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V02N0501 arc: A0 H02W0501 arc: A1 H02W0501 arc: A2 F5 arc: A3 F5 arc: A4 H02E0501 arc: A5 V00T0100 arc: A6 S1_V02N0101 arc: A7 Q7 arc: B0 V02N0101 arc: B1 V02N0101 arc: B2 H00R0100 arc: B3 H00R0100 arc: B4 H02E0101 arc: B5 V01S0000 arc: B6 V02S0701 arc: B7 V02N0701 arc: C0 F4 arc: C2 H02E0401 arc: C3 H02E0401 arc: C4 H01E0001 arc: C5 S1_V02N0201 arc: C6 W1_H02E0401 arc: C7 S1_V02N0201 arc: CE0 H00L0100 arc: CE1 H00R0000 arc: CE2 S1_V02N0601 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 V02N0001 arc: D2 S1_V02N0001 arc: D3 S1_V02N0001 arc: D4 V00B0000 arc: D5 V02N0401 arc: D6 F0 arc: D7 V02N0401 arc: E1_H01E0001 Q7 arc: E1_H01E0101 Q1 arc: E1_H02E0301 Q3 arc: E1_H02E0501 Q7 arc: E1_H02E0601 Q4 arc: F0 F5A_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00R0100 F7 arc: LSR0 W1_H02E0301 arc: LSR1 W1_H02E0301 arc: M0 H02E0601 arc: M1 H02W0001 arc: M2 E1_H02W0601 arc: M3 H00L0000 arc: M4 V00T0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 F6 arc: V00T0100 Q1 arc: V01S0000 Q3 arc: V01S0100 Q4 arc: W3_H06W0103 F2 word: SLICEA.K1.INIT 1111111111101110 word: SLICEA.K0.INIT 1111000011101110 word: SLICEC.K0.INIT 0000000100100011 word: SLICED.K0.INIT 0000010010001100 word: SLICEC.K1.INIT 0101000000110000 word: SLICED.K1.INIT 0000010100000011 word: SLICEB.K0.INIT 0000111000000000 word: SLICEB.K1.INIT 0000111000001111 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.C1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C71:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 W3_H06E0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0301 H01E0101 arc: E1_H02E0501 E1_H01W0100 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0203 arc: H00L0000 H02W0001 arc: H00R0000 S1_V02N0401 arc: H00R0100 V02N0501 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 W3_H06E0003 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 N1_V01S0000 arc: N1_V02N0301 H06E0003 arc: N1_V02N0501 E1_H02W0501 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 S1_V02N0301 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0201 W1_H02E0201 arc: S1_V02S0301 W3_H06E0003 arc: S1_V02S0601 H06E0303 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0203 H06E0203 arc: V00B0100 H02W0501 arc: V00T0000 W1_H02E0001 arc: W1_H02W0001 V02N0001 arc: W1_H02W0301 N1_V02S0301 arc: W1_H02W0501 S1_V02N0501 arc: W1_H02W0601 S1_V02N0601 arc: A0 H00L0100 arc: A1 H00L0100 arc: A4 V02S0301 arc: A7 V02N0101 arc: B0 V02N0301 arc: B1 Q1 arc: B7 H02W0301 arc: C0 E1_H02W0401 arc: C1 E1_H02W0401 arc: C4 S1_V02N0001 arc: C6 H02E0401 arc: C7 F4 arc: CE0 E1_H02W0101 arc: CE1 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D1 H00R0000 arc: D4 V02N0601 arc: D6 V02S0401 arc: D7 H02W0201 arc: E1_H01E0001 F0 arc: E1_H01E0101 Q1 arc: E1_H02E0401 F6 arc: F0 F5A_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q3 arc: H01W0100 Q3 arc: LSR0 E1_H02W0301 arc: LSR1 V00T0000 arc: M0 V00B0100 arc: M1 H00R0100 arc: M3 H00R0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: N1_V01N0101 F7 arc: S3_V06S0303 F6 arc: V00T0100 Q1 arc: W3_H06W0303 F6 word: SLICED.K0.INIT 0000000011110000 word: SLICEA.K0.INIT 0100000001110000 word: SLICEA.K1.INIT 0101111100111111 word: SLICEC.K0.INIT 0000000000000101 word: SLICED.K1.INIT 1100110000001000 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICED.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C72:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 W1_H02E0701 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 V02S0401 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0103 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 W3_H06E0303 arc: H00R0100 H02W0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H02W0201 arc: N1_V02N0401 H06E0203 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 H06E0203 arc: S1_V02S0001 E1_H02W0001 arc: S1_V02S0101 W3_H06E0103 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 W3_H06E0103 arc: S3_V06S0303 E1_H01W0100 arc: V00B0000 S1_V02N0001 arc: V00B0100 V02N0101 arc: V00T0000 H02E0001 arc: V00T0100 V02N0501 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 E1_H01W0000 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 H01E0001 arc: A0 W1_H02E0701 arc: A1 F7 arc: A2 W1_H02E0501 arc: A3 S1_V02N0501 arc: A4 V00B0000 arc: A5 Q5 arc: A6 H00L0000 arc: A7 N1_V01N0101 arc: B0 S1_V02N0101 arc: B1 W1_H02E0101 arc: B2 H02E0301 arc: B3 H00L0000 arc: B4 W1_H02E0301 arc: B5 H00L0000 arc: B6 H01E0101 arc: B7 W1_H02E0101 arc: C0 N1_V01N0001 arc: C1 F4 arc: C2 S1_V02N0401 arc: C3 S1_V02N0401 arc: C4 W1_H02E0601 arc: C6 V02N0001 arc: C7 S1_V02N0201 arc: CE0 E1_H02W0101 arc: CE2 H02E0101 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 S1_V02N0001 arc: D1 F2 arc: D2 S1_V02N0001 arc: D3 H01E0101 arc: D4 S1_V02N0401 arc: D5 H00R0100 arc: D6 W1_H02E0201 arc: D7 F0 arc: E1_H02E0501 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H01W0100 F6 arc: LSR0 V00B0100 arc: LSR1 E1_H02W0301 arc: M0 V00T0000 arc: M5 H02E0001 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q5 arc: N1_V01N0101 F3 arc: S1_V02S0301 F1 arc: V01S0100 Q6 arc: W1_H02W0501 F5 word: SLICEA.K0.INIT 0100010000001100 word: SLICEB.K1.INIT 0000000100001011 word: SLICEB.K0.INIT 0011000001010000 word: SLICEC.K0.INIT 0000000000100111 word: SLICED.K1.INIT 0000110000001101 word: SLICEA.K1.INIT 0010001000101010 word: SLICEC.K1.INIT 0101010100110011 word: SLICED.K0.INIT 0000000011001010 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.C1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C73:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0501 W1_H02E0401 arc: E1_H02E0601 H01E0001 arc: E1_H02E0701 E1_H01W0100 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0103 arc: H00R0000 V02N0601 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 W1_H02E0201 arc: N1_V02N0301 H06E0003 arc: N1_V02N0401 S1_V02N0101 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0103 W3_H06E0103 arc: V00B0000 W1_H02E0601 arc: V00B0100 H02E0501 arc: V00T0000 H02W0201 arc: V00T0100 W1_H02E0301 arc: W1_H02W0101 E1_H02W0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0501 V02N0501 arc: W1_H02W0701 V06N0203 arc: A2 F5 arc: A3 V02S0701 arc: A4 E1_H02W0501 arc: A5 E1_H02W0501 arc: A6 W1_H02E0501 arc: A7 E1_H02W0501 arc: B0 V02N0301 arc: B2 H00R0100 arc: B4 H00R0000 arc: B5 H02E0301 arc: B6 V01S0000 arc: B7 V00B0000 arc: C2 V02N0401 arc: C3 H00L0000 arc: C4 V00B0100 arc: C5 H02E0601 arc: C6 F4 arc: C7 V00T0100 arc: CLK0 G_HPBX0000 arc: D0 H02W0001 arc: D2 W1_H02E0201 arc: D4 H02E0201 arc: D5 V02N0601 arc: D6 W1_H02E0201 arc: D7 V02N0601 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 F0 arc: H00R0100 F7 arc: H01W0000 F6 arc: H01W0100 Q0 arc: LSR0 V00T0000 arc: MUXCLK0 CLK0 arc: MUXLSR0 LSR0 arc: S1_V02S0101 F3 arc: S1_V02S0201 Q0 arc: V01S0000 F2 arc: V01S0100 F3 arc: W3_H06W0003 Q0 word: SLICEA.K0.INIT 1111111111001100 word: SLICEB.K1.INIT 0101000001010000 word: SLICEC.K1.INIT 0100010001010000 word: SLICED.K1.INIT 1010000010001000 word: SLICEC.K0.INIT 1010100000100000 word: SLICEB.K0.INIT 0000111000001111 word: SLICED.K0.INIT 1100110011001000 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ .tile R9C74:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0201 S1_V02N0201 arc: E1_H02E0301 S1_V02N0301 arc: E1_H02E0401 W1_H02E0401 arc: E1_H02E0601 W3_H06E0303 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 W3_H06E0203 arc: N1_V02N0001 S1_V02N0001 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 H01E0001 arc: N1_V02N0401 H06E0203 arc: N1_V02N0501 W3_H06E0303 arc: N1_V02N0601 W3_H06E0303 arc: N1_V02N0701 H06E0203 arc: S1_V02S0501 H02E0501 arc: S1_V02S0701 E1_H01W0100 arc: S3_V06S0103 E3_H06W0103 arc: V00T0000 S1_V02N0401 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 W3_H06E0003 arc: W3_H06W0003 E1_H01W0000 arc: W3_H06W0103 E3_H06W0103 arc: A0 H02E0701 arc: A1 H00L0000 arc: A2 E1_H02W0701 arc: A3 S1_V02N0501 arc: B0 V00T0000 arc: B1 Q1 arc: B2 F3 arc: B3 E1_H01W0100 arc: C0 H02W0601 arc: C1 H02W0601 arc: C3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V02N0201 arc: D1 S1_V02N0201 arc: D2 S1_V02N0201 arc: D3 H02W0201 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: H00L0000 Q2 arc: H01W0000 Q1 arc: H01W0100 Q0 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: N3_V06N0003 Q0 arc: S1_V02S0101 Q1 arc: V01S0100 Q0 arc: W1_H02W0001 Q2 word: SLICEB.K1.INIT 1010001011110011 word: SLICEA.K0.INIT 0011001100000010 word: SLICEA.K1.INIT 0000000010101110 word: SLICEB.K0.INIT 0000000000100010 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.C0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C75:PLC2 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 V02N0101 arc: E1_H02E0201 H01E0001 arc: E1_H02E0401 S1_V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 E1_H01W0000 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0203 H01E0001 arc: H00R0000 W1_H02E0401 arc: N1_V02N0001 H06E0003 arc: N1_V02N0301 N1_V01S0100 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0203 S1_V02N0701 arc: N3_V06N0303 S1_V02N0501 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0201 W1_H02E0201 arc: V00B0100 H02W0501 arc: V00T0000 H02W0001 arc: W1_H02W0101 E1_H02W0001 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 E1_H02W0601 arc: A0 H00R0000 arc: A1 H02W0701 arc: A2 H00L0100 arc: A3 H00L0100 arc: A5 W1_H02E0701 arc: A6 H02W0501 arc: B0 V00B0000 arc: B1 Q1 arc: B2 E1_H01W0100 arc: B5 V02S0701 arc: B6 V01S0000 arc: C0 E1_H02W0601 arc: C1 H00L0000 arc: C2 H02W0601 arc: C3 H02W0601 arc: C4 H02E0401 arc: C5 E1_H02W0601 arc: C6 H02W0601 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 V00B0100 arc: D3 V00B0100 arc: D4 H01W0000 arc: D5 V00B0000 arc: D6 S1_V02N0601 arc: E1_H01E0001 Q1 arc: E1_H02E0301 Q1 arc: E1_H02E0701 F5 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: H00L0000 F2 arc: H00L0100 Q1 arc: H01W0000 Q0 arc: H01W0100 F6 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 F5 arc: N3_V06N0003 Q0 arc: V00B0000 F4 arc: V01S0000 Q1 arc: V01S0100 Q0 arc: W1_H02W0201 Q0 arc: W3_H06W0003 Q0 word: SLICED.K0.INIT 0000000000001000 word: SLICEC.K0.INIT 0000111100000000 word: SLICEC.K1.INIT 0000000000110001 word: SLICEA.K0.INIT 0000000011101100 word: SLICEB.K0.INIT 0101111100010101 word: SLICEB.K1.INIT 0101111101010101 word: SLICEA.K1.INIT 0000000001001110 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.B0MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C76:PLC2 arc: E1_H02E0001 N1_V01S0000 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0401 V02N0401 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 W3_H06E0303 arc: E1_H02E0701 W1_H02E0601 arc: E3_H06E0103 W3_H06E0003 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 H02E0301 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 S1_V02N0101 arc: N1_V02N0201 S1_V02N0701 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 H01E0001 arc: N1_V02N0601 W1_H02E0601 arc: N1_V02N0701 H06E0203 arc: N3_V06N0003 S1_V02N0301 arc: S3_V06S0203 E1_H01W0000 arc: S3_V06S0303 W3_H06E0303 arc: W1_H02W0001 S1_V02N0001 arc: W1_H02W0501 N1_V01S0100 arc: W1_H02W0601 N1_V01S0000 arc: W1_H02W0701 V02S0701 arc: A0 V02S0701 arc: A1 H00L0000 arc: A2 V00T0000 arc: A5 N1_V01S0100 arc: A6 N1_V01S0100 arc: A7 V02N0101 arc: B0 V00T0000 arc: B1 V02N0101 arc: B2 H02E0301 arc: B5 N1_V01S0000 arc: B6 N1_V01S0000 arc: C0 H00R0100 arc: C1 H00L0100 arc: C2 H02E0401 arc: C5 H02E0401 arc: C6 S1_V02N0001 arc: C7 V00B0100 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0201 arc: D1 H02E0001 arc: D2 H02E0001 arc: D5 H01W0000 arc: D6 H01W0000 arc: D7 S1_V02N0401 arc: E1_H01E0001 F2 arc: E1_H01E0101 F6 arc: E1_H02E0201 Q0 arc: E3_H06E0003 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q0 arc: H00R0100 F7 arc: H01W0000 Q0 arc: H01W0100 Q0 arc: M2 V00B0000 arc: MUXCLK0 CLK0 arc: N1_V01N0001 Q0 arc: N1_V01N0101 Q0 arc: N3_V06N0103 F2 arc: S1_V02S0201 Q0 arc: V00B0000 F6 arc: V00B0100 F5 arc: V00T0000 Q0 arc: V01S0000 F1 word: SLICEC.K1.INIT 0000010000001111 word: SLICED.K1.INIT 0101000011110000 word: SLICEA.K0.INIT 0000000001001110 word: SLICED.K0.INIT 1111101100000000 word: SLICEB.K0.INIT 1111111000000000 word: SLICEB.K1.INIT 0000000000000000 word: SLICEA.K1.INIT 1111111000000000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX 1 enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ .tile R9C77:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 E3_H06W0003 arc: E1_H02E0101 E3_H06W0103 arc: E1_H02E0201 S3_V06N0103 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0401 H01E0001 arc: E1_H02E0701 W3_H06E0203 arc: E3_H06E0203 H01E0001 arc: H00L0000 S1_V02N0001 arc: H00L0100 S1_V02N0301 arc: H00R0000 V02S0601 arc: H00R0100 W1_H02E0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0101 H06W0103 arc: S3_V06S0103 E1_H01W0100 arc: V00B0000 V02N0201 arc: V00B0100 V02N0101 arc: V00T0000 W1_H02E0201 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0301 V02N0301 arc: W1_H02W0601 N1_V01S0000 arc: A2 W1_H02E0501 arc: A3 S1_V02N0701 arc: A4 V00B0000 arc: B3 H02E0101 arc: B4 W1_H02E0101 arc: B5 H01E0101 arc: C0 H02E0601 arc: C2 W1_H02E0601 arc: C3 W1_H02E0601 arc: C4 W1_H02E0601 arc: C5 F4 arc: CE0 H00L0000 arc: CE1 H00L0000 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D3 H02E0001 arc: D4 V02S0401 arc: D5 H00R0100 arc: E1_H01E0101 F3 arc: E1_H02E0501 Q5 arc: E1_H02E0601 Q4 arc: E3_H06E0103 Q2 arc: E3_H06E0303 F5 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H01W0000 Q2 arc: H01W0100 Q6 arc: LSR0 H02W0301 arc: LSR1 V00T0000 arc: M4 V00B0100 arc: M5 H00R0000 arc: M6 H02E0401 arc: M7 H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0101 F5 arc: S3_V06S0003 F3 arc: S3_V06S0303 F5 arc: V01S0000 Q0 arc: V01S0100 Q7 word: SLICEC.K0.INIT 1111111000001110 word: SLICEC.K1.INIT 0011000000000000 word: SLICEB.K1.INIT 0010000000000000 word: SLICEA.K0.INIT 1111000000000000 word: SLICEB.K0.INIT 1010000010100000 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.B0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C78:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 N1_V01S0100 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 W3_H06E0303 arc: E1_H02E0601 S1_V02N0601 arc: E3_H06E0303 H01E0101 arc: H00L0000 W1_H02E0201 arc: H00R0000 H02E0401 arc: H00R0100 S1_V02N0701 arc: N1_V02N0101 W3_H06E0103 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0401 E1_H01W0000 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: S3_V06S0303 W3_H06E0303 arc: V00B0100 V02N0301 arc: V00T0000 S1_V02N0401 arc: V00T0100 E1_H02W0101 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: A2 V02N0501 arc: B2 H02W0301 arc: B4 H00L0000 arc: C0 H00L0000 arc: C2 V02S0401 arc: CE0 H00R0000 arc: CE1 H02W0101 arc: CE2 H00R0000 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D2 N1_V01S0000 arc: D4 H00R0100 arc: E3_H06E0003 Q0 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: H01W0100 F2 arc: LSR0 V00T0100 arc: LSR1 V00B0100 arc: M2 V00T0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: S1_V02S0201 Q0 arc: S1_V02S0601 Q4 arc: S3_V06S0003 Q0 arc: S3_V06S0203 Q4 arc: V01S0100 Q2 word: SLICEB.K0.INIT 0000101100001000 word: SLICEC.K0.INIT 0011001100000000 word: SLICEA.K0.INIT 0000111100000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C79:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 V02N0101 arc: E1_H02E0301 W3_H06E0003 arc: E1_H02E0601 W1_H02E0601 arc: E3_H06E0003 W3_H06E0003 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 N1_V01S0000 arc: N1_V02N0101 H06E0103 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W1_H02E0301 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 H01E0001 arc: N1_V02N0701 W1_H02E0701 arc: N3_V06N0003 E1_H01W0000 arc: N3_V06N0303 H06E0303 arc: S3_V06S0303 H06E0303 arc: V00B0000 V02N0001 arc: V00B0100 H02W0701 arc: V00T0000 E1_H02W0001 arc: V00T0100 W1_H02E0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0301 W3_H06E0003 arc: A0 V02N0501 arc: A1 V02N0701 arc: A4 F5 arc: A5 W1_H02E0501 arc: B0 E1_H01W0100 arc: B1 V02N0301 arc: B4 H02W0301 arc: C0 S1_V02N0401 arc: C1 F4 arc: C2 H02E0601 arc: C4 Q4 arc: C5 V00T0000 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H00L0100 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 H02W0201 arc: D1 H02W0201 arc: D2 V00B0100 arc: D4 W1_H02E0001 arc: D5 V02S0401 arc: E1_H01E0001 Q2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: H00L0000 Q0 arc: LSR0 E1_H02W0501 arc: LSR1 E1_H02W0301 arc: M4 V00T0100 arc: M6 V00B0000 arc: M7 H00L0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q7 arc: N1_V01N0101 Q6 arc: V01S0000 Q1 word: SLICEB.K0.INIT 1111000000000000 word: SLICEC.K1.INIT 0101010100001111 word: SLICEC.K0.INIT 1100000001000100 word: SLICEA.K0.INIT 1010101011111100 word: SLICEA.K1.INIT 1111111011111010 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.B1MUX 1 enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C80:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0001 W1_H02E0501 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0601 W1_H02E0301 arc: E3_H06E0203 W3_H06E0103 arc: H00R0000 V02S0601 arc: H00R0100 H02W0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0101 S1_V02N0001 arc: N1_V02N0201 W3_H06E0103 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 E1_H02W0401 arc: V00B0000 V02S0001 arc: V00T0000 H02E0001 arc: V00T0100 S1_V02N0501 arc: W1_H02W0101 W3_H06E0103 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0601 S1_V02N0601 arc: W1_H02W0701 S1_V02N0701 arc: A0 S1_V02N0701 arc: A1 S1_V02N0701 arc: A3 H01E0001 arc: A4 F7 arc: A6 N1_V01N0101 arc: A7 N1_V01S0100 arc: B3 H02W0101 arc: B4 V02S0701 arc: B6 N1_V01S0000 arc: B7 V00B0100 arc: C3 H00L0100 arc: C4 S1_V02N0201 arc: C6 V00T0000 arc: C7 V00T0000 arc: CE0 V02N0201 arc: CE2 S1_V02N0601 arc: CE3 H02E0101 arc: CLK0 G_HPBX0000 arc: D0 V02N0001 arc: D1 W1_H02E0001 arc: D3 V01S0100 arc: D4 V02N0401 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H01E0001 F2 arc: E3_H06E0103 F2 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0100 Q1 arc: H01W0100 F6 arc: LSR0 E1_H02W0501 arc: LSR1 V00B0000 arc: M2 V00T0100 arc: M6 H02W0401 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0101 Q6 arc: N1_V02N0601 Q4 arc: S1_V02S0001 F2 arc: S3_V06S0103 F2 arc: V00B0100 Q7 arc: V01S0100 Q0 arc: W3_H06W0103 F2 word: SLICEA.K0.INIT 1010101000000000 word: SLICEA.K1.INIT 1010101000000000 word: SLICED.K0.INIT 0000000010101100 word: SLICED.K1.INIT 0000000011001010 word: SLICEC.K0.INIT 1100111111001010 word: SLICEB.K1.INIT 0000000000000001 word: SLICEB.K0.INIT 0000000000000000 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C81:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H01E0101 W3_H06E0203 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0401 E1_H01W0000 arc: E1_H02E0601 W1_H02E0601 arc: E1_H02E0701 V02S0701 arc: E3_H06E0003 W3_H06E0003 arc: E3_H06E0303 W3_H06E0203 arc: H00R0100 V02S0701 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 H01E0101 arc: N1_V02N0701 W3_H06E0203 arc: N3_V06N0003 W3_H06E0003 arc: S1_V02S0001 W1_H02E0001 arc: S1_V02S0201 H01E0001 arc: S3_V06S0003 H06E0003 arc: S3_V06S0303 H06E0303 arc: V00T0000 H02W0201 arc: W1_H02W0001 N1_V02S0001 arc: W1_H02W0201 W3_H06E0103 arc: W1_H02W0301 E1_H02W0301 arc: W1_H02W0401 E1_H02W0101 arc: W1_H02W0501 E3_H06W0303 arc: W1_H02W0701 V02S0701 arc: A2 F7 arc: A4 V02S0301 arc: A6 F5 arc: A7 V02S0101 arc: B2 W1_H02E0301 arc: B4 H02E0101 arc: B5 V02S0501 arc: B6 W1_H02E0301 arc: C0 V02N0601 arc: C1 V02N0601 arc: C2 H00L0000 arc: C4 S1_V02N0001 arc: C5 V02N0001 arc: C6 H02W0601 arc: C7 H02E0601 arc: CE0 V02N0201 arc: CE1 W1_H02E0101 arc: CE2 S1_V02N0601 arc: CE3 V02S0601 arc: CLK0 G_HPBX0000 arc: D0 V02S0201 arc: D1 H02E0001 arc: D2 E1_H02W0201 arc: D4 F2 arc: D5 V02S0401 arc: D6 H00R0100 arc: D7 V02S0401 arc: E1_H02E0001 Q0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H00L0000 Q2 arc: H00R0000 Q4 arc: LSR0 E1_H02W0501 arc: LSR1 H02W0501 arc: M2 V00T0000 arc: M7 H00R0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N3_V06N0203 Q7 arc: S1_V02S0601 F6 arc: W1_H02W0101 Q1 word: SLICEA.K0.INIT 1111000000000000 word: SLICEA.K1.INIT 1111000000000000 word: SLICED.K1.INIT 1111000010101010 word: SLICEB.K0.INIT 0000000011100010 word: SLICEC.K0.INIT 1011101110111000 word: SLICEC.K1.INIT 1111000011001100 word: SLICED.K0.INIT 0000000011100010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.A0MUX 1 enum: SLICEA.B0MUX 1 enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICED.B1MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.A1MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C82:PLC2 arc: E1_H02E0001 H01E0001 arc: E1_H02E0101 E1_H01W0100 arc: E1_H02E0201 H01E0001 arc: E1_H02E0501 H01E0101 arc: E1_H02E0701 V02N0701 arc: E3_H06E0203 W3_H06E0103 arc: E3_H06E0303 H01E0101 arc: H00L0000 V02N0201 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: H01W0000 W3_H06E0103 arc: N1_V02N0001 E1_H02W0001 arc: N1_V02N0201 S1_V02N0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N3_V06N0003 W3_H06E0003 arc: N3_V06N0103 W3_H06E0103 arc: N3_V06N0203 H01E0001 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0001 H02E0001 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0303 W3_H06E0303 arc: V00B0000 H02E0401 arc: V00B0100 H02E0701 arc: V00T0000 V02N0401 arc: W1_H02W0401 N3_V06S0203 arc: W1_H02W0501 H01E0101 arc: A0 H01E0001 arc: A1 H01E0001 arc: A3 H00L0100 arc: A4 N1_V01S0100 arc: B0 V02N0101 arc: B1 V02N0101 arc: B3 H02E0301 arc: B6 N1_V01S0000 arc: C0 H02W0401 arc: C1 E1_H01W0000 arc: C3 V02S0401 arc: C4 V02N0001 arc: C6 H02E0601 arc: CE0 H00R0000 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: D0 W1_H02E0001 arc: D1 H02W0001 arc: D3 V00B0100 arc: D4 H00R0100 arc: D6 H00R0100 arc: E1_H01E0001 F6 arc: E1_H01E0101 Q0 arc: E1_H02E0301 Q1 arc: E1_H02E0401 F4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F6 F6_SLICE arc: H00L0100 Q3 arc: LSR0 V00B0000 arc: LSR1 V00T0000 arc: M3 E1_H02W0201 arc: M4 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: S1_V02S0301 F3 arc: V00T0100 Q1 arc: W1_H02W0201 Q0 arc: W1_H02W0601 Q4 word: SLICEC.K0.INIT 1111000010101010 word: SLICED.K0.INIT 1111000011001100 word: SLICEB.K1.INIT 0000000010111000 word: SLICEA.K0.INIT 1111000111100000 word: SLICEA.K1.INIT 1111111000010000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.B0MUX 1 enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_0 _NONE_ enum: SLICED.A0MUX 1 enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C83:PLC2 arc: E1_H02E0101 H01E0101 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 V02N0601 arc: E3_H06E0303 W3_H06E0303 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 V02S0701 arc: H01W0000 W3_H06E0103 arc: H01W0100 W3_H06E0303 arc: N1_V02N0201 H06W0103 arc: N1_V02N0301 E1_H01W0100 arc: N1_V02N0401 W3_H06E0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 H01E0001 arc: S1_V02S0101 W3_H06E0103 arc: S1_V02S0601 W3_H06E0303 arc: S3_V06S0103 H06E0103 arc: V00B0100 V02N0101 arc: V00T0100 V02N0501 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 V02N0201 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 E1_H01W0000 arc: W1_H02W0501 V02N0501 arc: W1_H02W0601 W3_H06E0303 arc: W3_H06W0003 E1_H02W0301 arc: A0 E1_H02W0701 arc: A1 E1_H02W0501 arc: A2 S1_V02N0701 arc: A4 V02N0101 arc: A5 H02E0701 arc: A7 Q7 arc: B0 S1_V02N0101 arc: B1 V02S0101 arc: B2 V02N0101 arc: B4 H00R0000 arc: B5 V02N0701 arc: B7 E1_H02W0301 arc: C0 H00L0100 arc: C1 H00L0100 arc: C2 H02W0401 arc: C4 V02N0001 arc: C5 V00B0100 arc: C7 H02E0401 arc: CE0 H02E0101 arc: CE1 H02E0101 arc: CE2 H02E0101 arc: CE3 E1_H02W0101 arc: CLK0 G_HPBX0000 arc: D0 H02E0201 arc: D1 H02E0201 arc: D2 H02E0201 arc: D4 H02E0001 arc: D5 H02E0001 arc: D7 H00R0100 arc: E1_H01E0001 Q4 arc: E1_H01E0101 Q0 arc: E1_H02E0001 Q2 arc: E1_H02E0301 Q1 arc: E1_H02E0701 Q5 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F7 F7_SLICE arc: LSR0 V00T0100 arc: LSR1 H02W0301 arc: M6 V00T0000 arc: M7 E1_H02W0201 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q6 arc: N1_V01N0101 Q5 arc: S1_V02S0501 F7 arc: V00T0000 Q0 arc: V01S0100 Q4 arc: W1_H02W0101 Q1 arc: W3_H06W0103 Q2 word: SLICED.K1.INIT 0000000010111000 word: SLICEA.K0.INIT 1010101010101100 word: SLICEA.K1.INIT 1010101010101100 word: SLICEB.K0.INIT 1111000011100010 word: SLICEC.K0.INIT 1100110011011000 word: SLICEC.K1.INIT 1100110011001010 enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_1 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_1 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 1 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 1 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 1 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C84:PLC2 arc: E1_H02E0001 V02N0001 arc: E1_H02E0101 S1_V02N0101 arc: E1_H02E0301 W1_H02E0301 arc: E1_H02E0501 H01E0101 arc: H00L0000 S1_V02N0201 arc: H00L0100 S1_V02N0101 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0301 H02W0301 arc: N1_V02N0501 H02E0501 arc: N1_V02N0601 S1_V02N0301 arc: N1_V02N0701 S1_V02N0601 arc: N3_V06N0103 S3_V06N0103 arc: N3_V06N0203 W3_H06E0203 arc: S1_V02S0301 H06E0003 arc: V00B0000 S1_V02N0001 arc: V00T0000 H02E0001 arc: W1_H02W0001 W3_H06E0003 arc: W1_H02W0201 H01E0001 arc: W1_H02W0301 E1_H02W0301 arc: A2 V00B0000 arc: A4 V00T0000 arc: A5 H02E0701 arc: B0 V02N0301 arc: B3 H02E0301 arc: B6 V02N0501 arc: B7 H02E0101 arc: CE0 H02W0101 arc: CE1 V02N0201 arc: CE2 V02N0601 arc: CE3 V02N0601 arc: CLK0 G_HPBX0000 arc: E1_H01E0101 F3 arc: E1_H02E0201 Q2 arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: H01W0100 Q0 arc: LSR0 W1_H02E0501 arc: LSR1 E1_H02W0301 arc: M0 H02W0601 arc: M1 H00L0000 arc: M2 H02E0601 arc: M4 E1_H02W0401 arc: M7 H00L0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR0 arc: N1_V01N0001 Q7 arc: N1_V02N0101 Q1 arc: N1_V02N0401 Q4 arc: S1_V02S0701 F5 arc: W1_H02W0401 F4 arc: W1_H02W0601 F6 word: SLICEA.K0.INIT 0000000000001100 word: SLICEA.K1.INIT 1111111111111111 word: SLICEB.K0.INIT 0110011001101100 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1100110011000000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG1.SD 0 enum: SLICED.REG1.REGSET RESET enum: SLICED.REG1.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.A0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 YES enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C85:PLC2 arc: E1_H02E0001 W3_H06E0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0301 E1_H01W0100 arc: E1_H02E0701 S1_V02N0701 arc: H00L0000 H02E0001 arc: H00R0000 V02N0401 arc: N1_V02N0201 E1_H02W0201 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 N3_V06S0203 arc: N1_V02N0501 S1_V02N0401 arc: N1_V02N0701 N3_V06S0203 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0203 S3_V06N0103 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 N1_V02S0201 arc: V00B0100 H02W0701 arc: V00T0000 H02E0201 arc: V00T0100 H02W0101 arc: W1_H02W0101 V02N0101 arc: W1_H02W0201 N1_V02S0201 arc: W1_H02W0301 W3_H06E0003 arc: W1_H02W0501 H01E0101 arc: W1_H02W0601 S1_V02N0601 arc: A0 H00R0000 arc: A4 S1_V02N0301 arc: A5 S1_V02N0101 arc: A7 H02E0501 arc: B1 V00B0000 arc: B2 H02E0301 arc: B3 H02E0101 arc: B6 S1_V02N0501 arc: CE1 V02N0201 arc: CE2 H00L0000 arc: CLK0 G_HPBX0000 arc: E3_H06E0203 Q4 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: LSR0 H02W0301 arc: LSR1 V00B0100 arc: M2 V00T0100 arc: M4 V00T0000 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR1 arc: N1_V02N0001 Q2 arc: N1_V02N0101 F1 arc: S1_V02S0001 F0 arc: S1_V02S0401 F4 arc: S1_V02S0501 F5 arc: S1_V02S0601 F6 arc: V01S0100 F3 arc: W1_H02W0001 F2 arc: W1_H02W0701 F7 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1100110011000000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1100110011000000 word: SLICEC.K0.INIT 1010101010100000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1100110011000000 word: SLICED.K1.INIT 1010101010100000 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.B0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.A0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.B1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C86:PLC2 arc: E1_H02E0101 W1_H02E0001 arc: E1_H02E0301 S3_V06N0003 arc: E1_H02E0501 S1_V02N0501 arc: E1_H02E0601 E1_H01W0000 arc: E1_H02E0701 V06S0203 arc: E3_H06E0303 W3_H06E0203 arc: H00L0100 V02N0101 arc: H00R0000 H02W0601 arc: H00R0100 S1_V02N0701 arc: N1_V01N0101 S3_V06N0203 arc: N1_V02N0001 S1_V02N0501 arc: N1_V02N0101 H02E0101 arc: N1_V02N0301 S1_V02N0201 arc: N1_V02N0401 S3_V06N0203 arc: N1_V02N0501 S1_V02N0501 arc: N1_V02N0601 S1_V02N0301 arc: N3_V06N0203 W3_H06E0203 arc: S3_V06S0103 W3_H06E0103 arc: V00B0000 S1_V02N0001 arc: V00B0100 H02E0701 arc: V00T0000 H02W0001 arc: V00T0100 V02N0701 arc: W1_H02W0101 S1_V02N0101 arc: W1_H02W0301 V02N0301 arc: W1_H02W0401 S1_V02N0401 arc: W1_H02W0701 E1_H02W0701 arc: W3_H06W0103 E1_H01W0100 arc: A0 H00R0000 arc: A1 H02E0701 arc: A3 V02N0501 arc: A5 V00B0000 arc: A6 S1_V02N0101 arc: B2 E1_H02W0301 arc: B4 S1_V02N0701 arc: B7 H02W0301 arc: CE0 H00L0100 arc: CE1 H00L0100 arc: CE2 H00L0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: E1_H02E0201 F0 arc: F0 F0_SLICE arc: F1 F1_SLICE arc: F2 F2_SLICE arc: F3 F3_SLICE arc: F4 F4_SLICE arc: F5 F5_SLICE arc: F6 F6_SLICE arc: F7 F7_SLICE arc: H01W0100 Q4 arc: LSR0 V00T0000 arc: LSR1 E1_H02W0501 arc: M0 H02W0601 arc: M2 V00T0100 arc: M4 V00B0100 arc: M5 H00R0100 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR1 arc: MUXLSR1 LSR0 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q0 arc: N1_V02N0201 Q2 arc: N1_V02N0701 Q5 arc: S1_V02S0201 F2 arc: S1_V02S0301 F3 arc: S1_V02S0401 F4 arc: S1_V02S0501 F7 arc: S1_V02S0701 F5 arc: S3_V06S0303 F6 arc: V01S0000 Q6 arc: V01S0100 F1 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 1010101010100000 word: SLICEB.K0.INIT 1100110011000000 word: SLICEB.K1.INIT 1010101010100000 word: SLICEC.K0.INIT 1100110011000000 word: SLICEC.K1.INIT 1010101010100000 word: SLICED.K0.INIT 1010101010100000 word: SLICED.K1.INIT 1100110011000000 enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG1.SD 0 enum: SLICEC.REG1.REGSET RESET enum: SLICEC.REG1.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 0 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_0 NO enum: SLICEC.A0MUX 1 enum: SLICEC.C0MUX 1 enum: SLICEC.D0MUX 1 enum: SLICEC.MODE CCU2 enum: SLICEC.CCU2.INJECT1_1 NO enum: SLICEC.B1MUX 1 enum: SLICEC.C1MUX 1 enum: SLICEC.D1MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_0 NO enum: SLICED.B0MUX 1 enum: SLICED.C0MUX 1 enum: SLICED.D0MUX 1 enum: SLICED.MODE CCU2 enum: SLICED.CCU2.INJECT1_1 NO enum: SLICED.A1MUX 1 enum: SLICED.C1MUX 1 enum: SLICED.D1MUX 1 .tile R9C87:PLC2 arc: E1_H01E0001 W3_H06E0003 arc: E1_H02E0101 S3_V06N0103 arc: E1_H02E0201 V06N0103 arc: E1_H02E0501 N1_V02S0501 arc: E1_H02E0601 E1_H01W0000 arc: H00L0100 V02N0101 arc: H00R0000 N1_V02S0601 arc: H00R0100 E1_H02W0501 arc: H01W0100 W3_H06E0303 arc: N1_V02N0001 W1_H02E0001 arc: N1_V02N0301 W3_H06E0003 arc: N1_V02N0401 H02W0401 arc: N1_V02N0501 N1_V01S0100 arc: N1_V02N0601 N1_V01S0000 arc: N1_V02N0701 S1_V02N0601 arc: S1_V02S0001 W3_H06E0003 arc: S1_V02S0301 W3_H06E0003 arc: S3_V06S0003 W3_H06E0003 arc: S3_V06S0103 N3_V06S0003 arc: V00B0000 V02N0201 arc: V00B0100 H02W0701 arc: V00T0100 H02W0301 arc: V01S0000 N3_V06S0103 arc: W1_H02W0001 E1_H02W0001 arc: W1_H02W0201 S1_V02N0201 arc: W1_H02W0301 S1_V02N0301 arc: W3_H06W0303 E1_H01W0100 arc: A0 H00R0000 arc: A4 V02N0301 arc: A7 H02E0701 arc: B4 V02N0501 arc: B7 W1_H02E0301 arc: C4 H02W0401 arc: C7 H02W0601 arc: CE0 H00L0100 arc: CE1 S1_V02N0201 arc: CE2 H00R0100 arc: CE3 H00L0100 arc: CLK0 G_HPBX0000 arc: D4 H02E0201 arc: D7 W1_H02E0001 arc: E1_H01E0101 Q0 arc: F0 F0_SLICE arc: F4 F4_SLICE arc: F7 F7_SLICE arc: H01W0000 F7 arc: LSR0 H02W0501 arc: LSR1 V00B0100 arc: M0 V00T0100 arc: M1 H00R0000 arc: M2 E1_H02W0601 arc: M6 V00B0000 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR0 arc: MUXLSR3 LSR1 arc: N1_V01N0001 Q6 arc: N1_V01N0101 F0 arc: N1_V02N0101 Q1 arc: V01S0100 Q2 arc: W1_H02W0601 Q4 word: SLICED.K1.INIT 0011001111110101 word: SLICEC.K0.INIT 1111111000000010 word: SLICEA.K0.INIT 1010101010100000 word: SLICEA.K1.INIT 0000000000000000 word: SLICEB.K0.INIT 0000000000000000 word: SLICEB.K1.INIT 0000000000001110 enum: SLICEA.GSR DISABLED enum: SLICEA.REG1.SD 0 enum: SLICEA.REG1.REGSET RESET enum: SLICEA.REG1.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 0 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICED.MODE LOGIC enum: SLICED.CCU2.INJECT1_1 _NONE_ enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_0 NO enum: SLICEA.B0MUX 1 enum: SLICEA.C0MUX 1 enum: SLICEA.D0MUX 1 enum: SLICEA.MODE CCU2 enum: SLICEA.CCU2.INJECT1_1 NO enum: SLICEA.A1MUX 1 enum: SLICEA.B1MUX 1 enum: SLICEA.C1MUX 1 enum: SLICEA.D1MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_0 NO enum: SLICEB.A0MUX 1 enum: SLICEB.B0MUX 1 enum: SLICEB.C0MUX 1 enum: SLICEB.D0MUX 1 enum: SLICEB.MODE CCU2 enum: SLICEB.CCU2.INJECT1_1 NO enum: SLICEB.A1MUX 1 enum: SLICEB.B1MUX 1 enum: SLICEB.C1MUX 1 enum: SLICEB.D1MUX 1 enum: SLICEB.GSR DISABLED enum: SLICEB.REG0.SD 0 enum: SLICEB.REG0.REGSET RESET enum: SLICEB.REG0.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile R9C88:PLC2 arc: E1_H01E0101 W3_H06E0203 arc: H00L0100 W1_H02E0301 arc: H00R0000 V02S0401 arc: H01W0100 W3_H06E0303 arc: N1_V01N0001 S3_V06N0003 arc: N1_V02N0001 S3_V06N0003 arc: N1_V02N0101 H01E0101 arc: N1_V02N0201 H02E0201 arc: N1_V02N0501 W1_H02E0501 arc: N1_V02N0601 S3_V06N0303 arc: N1_V02N0701 H06E0203 arc: N3_V06N0103 S3_V06N0003 arc: N3_V06N0303 S3_V06N0303 arc: S1_V02S0501 N1_V01S0100 arc: S3_V06S0103 N3_V06S0103 arc: V00B0100 W1_H02E0501 arc: W1_H02W0301 S1_V02N0301 arc: W1_H02W0401 H01E0001 arc: W1_H02W0501 W3_H06E0303 arc: W1_H02W0601 V02S0601 arc: W1_H02W0701 W3_H06E0203 arc: A0 V02N0701 arc: A2 S1_V02N0701 arc: A3 W1_H02E0501 arc: A4 V00T0000 arc: B0 S1_V02N0101 arc: B2 H02E0101 arc: B3 H02E0101 arc: B4 V01S0000 arc: C0 H02E0601 arc: C2 V02S0401 arc: C3 S1_V02N0401 arc: C4 H02W0401 arc: CE0 H00L0100 arc: CE1 W1_H02E0101 arc: CE2 V02N0601 arc: CE3 S1_V02N0601 arc: CLK0 G_HPBX0000 arc: D0 V00T0100 arc: D2 V00B0100 arc: D3 H00R0000 arc: D4 H02E0201 arc: E1_H01E0001 F2 arc: F0 F0_SLICE arc: F2 F5B_SLICE arc: F4 F4_SLICE arc: H01W0000 Q6 arc: LSR0 H02E0501 arc: LSR1 H02W0301 arc: M2 W1_H02E0601 arc: M3 H02W0201 arc: M6 V00T0100 arc: MUXCLK0 CLK0 arc: MUXCLK1 CLK0 arc: MUXCLK2 CLK0 arc: MUXCLK3 CLK0 arc: MUXLSR0 LSR0 arc: MUXLSR1 LSR1 arc: MUXLSR2 LSR1 arc: MUXLSR3 LSR1 arc: S1_V02S0401 Q4 arc: V00T0000 Q0 arc: V00T0100 Q3 arc: V01S0000 Q3 word: SLICEB.K0.INIT 1100110001011111 word: SLICEB.K1.INIT 1000110110001000 word: SLICEC.K0.INIT 1110101011000000 word: SLICEA.K0.INIT 1101010111000000 enum: SLICEC.GSR DISABLED enum: SLICEC.REG0.SD 1 enum: SLICEC.REG0.REGSET RESET enum: SLICEC.REG0.LSRMODE LSR enum: SLICEC.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_0 _NONE_ enum: SLICEB.MODE LOGIC enum: SLICEB.CCU2.INJECT1_1 _NONE_ enum: SLICED.GSR DISABLED enum: SLICED.REG0.SD 0 enum: SLICED.REG0.REGSET RESET enum: SLICED.REG0.LSRMODE LSR enum: SLICED.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEC.MODE LOGIC enum: SLICEC.CCU2.INJECT1_0 _NONE_ enum: SLICEA.MODE LOGIC enum: SLICEA.CCU2.INJECT1_0 _NONE_ enum: SLICEB.GSR DISABLED enum: SLICEB.REG1.SD 0 enum: SLICEB.REG1.REGSET RESET enum: SLICEB.REG1.LSRMODE LSR enum: SLICEB.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK enum: SLICEA.GSR DISABLED enum: SLICEA.REG0.SD 1 enum: SLICEA.REG0.REGSET RESET enum: SLICEA.REG0.LSRMODE LSR enum: SLICEA.CEMUX CE enum: LSR0.SRMODE LSR_OVER_CE enum: LSR0.LSRMUX LSR enum: LSR1.SRMODE LSR_OVER_CE enum: LSR1.LSRMUX LSR enum: CLK0.CLKMUX CLK .tile TAP_R10C31:TAP_DRIVE_CIB arc: R_HPBX0000 G_VPTX0000 .tile TAP_R10C51:TAP_DRIVE_CIB arc: L_HPBX0000 G_VPTX0000 .tile TAP_R11C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R11C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R11C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R12C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R13C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R13C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R13C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R14C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R15C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R16C31:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R16C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R16C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R17C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R17C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R17C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R18C31:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R18C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R18C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R19C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R19C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R19C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C31:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R20C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R21C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R23C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R23C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R23C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R24C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R25C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R25C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R25C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R26C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R27C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R28C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R28C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R28C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C31:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R29C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R2C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R2C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R2C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R30C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R31C78:TAP_DRIVE arc: R_HPBX0000 G_VPTX0000 .tile TAP_R3C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R3C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R3C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R4C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R4C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R4C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R5C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R5C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R5C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R6C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R6C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R6C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R7C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R7C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R7C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R8C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R8C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R8C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R9C31:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R9C51:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .tile TAP_R9C78:TAP_DRIVE arc: L_HPBX0000 G_VPTX0000 arc: R_HPBX0000 G_VPTX0000 .bram_init 3 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .bram_init 4 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 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000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 .tile_group MIB_R22C42:MIB_DSP0 MIB_R22C42:MIB2_DSP0 MIB_R22C43:MIB_DSP1 MIB_R22C43:MIB2_DSP1 MIB_R22C44:MIB_DSP2 MIB_R22C44:MIB2_DSP2 MIB_R22C45:MIB_DSP3 MIB_R22C45:MIB2_DSP3 MIB_R22C46:MIB_DSP4 MIB_R22C46:MIB2_DSP4 enum: MULT18_1.REG_INPUTA_CLK NONE enum: MULT18_1.REG_INPUTA_CE CE0 enum: MULT18_1.REG_INPUTA_RST RST0 enum: MULT18_1.REG_INPUTB_CLK NONE enum: MULT18_1.REG_INPUTB_CE CE0 enum: MULT18_1.REG_INPUTB_RST RST0 enum: MULT18_1.REG_INPUTC_CLK NONE enum: MULT18_1.REG_PIPELINE_CLK NONE enum: MULT18_1.REG_PIPELINE_CE CE0 enum: MULT18_1.REG_PIPELINE_RST RST0 enum: MULT18_1.REG_OUTPUT_CLK NONE enum: MULT18_1.CLK0_DIV ENABLED enum: MULT18_1.CLK1_DIV ENABLED enum: MULT18_1.CLK2_DIV ENABLED enum: MULT18_1.CLK3_DIV ENABLED enum: MULT18_1.GSR ENABLED enum: MULT18_1.SOURCEB_MODE B_SHIFT enum: MULT18_1.RESETMODE SYNC enum: MULT18_1.MODE MULT18X18D enum: MULT18_1.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_1.CLK0MUX CLK0 enum: MULT18_1.CLK1MUX CLK1 enum: MULT18_1.CLK2MUX CLK2 enum: MULT18_1.CLK3MUX CLK3 enum: MULT18_1.CE0MUX CE0 enum: MULT18_1.CE1MUX CE1 enum: MULT18_1.CE2MUX CE2 enum: MULT18_1.CE3MUX CE3 enum: MULT18_1.RST0MUX RST0 enum: MULT18_1.RST1MUX RST1 enum: MULT18_1.RST2MUX RST2 enum: MULT18_1.RST3MUX RST3 .tile_group MIB_R22C42:MIB_DSP0 MIB_R22C42:MIB2_DSP0 MIB_R22C43:MIB_DSP1 MIB_R22C43:MIB2_DSP1 MIB_R22C44:MIB_DSP2 MIB_R22C44:MIB2_DSP2 MIB_R22C45:MIB_DSP3 MIB_R22C45:MIB2_DSP3 MIB_R22C46:MIB_DSP4 MIB_R22C46:MIB2_DSP4 enum: MULT18_0.REG_INPUTA_CLK NONE enum: MULT18_0.REG_INPUTA_CE CE0 enum: MULT18_0.REG_INPUTA_RST RST0 enum: MULT18_0.REG_INPUTB_CLK NONE enum: MULT18_0.REG_INPUTB_CE CE0 enum: MULT18_0.REG_INPUTB_RST RST0 enum: MULT18_0.REG_INPUTC_CLK NONE enum: MULT18_0.REG_PIPELINE_CLK NONE enum: MULT18_0.REG_PIPELINE_CE CE0 enum: MULT18_0.REG_PIPELINE_RST RST0 enum: MULT18_0.REG_OUTPUT_CLK NONE enum: MULT18_0.REG_OUTPUT_RST RST0 enum: MULT18_0.CLK0_DIV ENABLED enum: MULT18_0.CLK1_DIV ENABLED enum: MULT18_0.CLK2_DIV ENABLED enum: MULT18_0.CLK3_DIV ENABLED enum: MULT18_0.GSR ENABLED enum: MULT18_0.SOURCEB_MODE B_SHIFT enum: MULT18_0.RESETMODE SYNC enum: MULT18_0.MODE MULT18X18D enum: MULT18_0.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_0.CLK0MUX CLK0 enum: MULT18_0.CLK1MUX CLK1 enum: MULT18_0.CLK2MUX CLK2 enum: MULT18_0.CLK3MUX CLK3 enum: MULT18_0.CE0MUX CE0 enum: MULT18_0.CE1MUX CE1 enum: MULT18_0.CE2MUX CE2 enum: MULT18_0.CE3MUX CE3 enum: MULT18_0.RST0MUX RST0 enum: MULT18_0.RST1MUX RST1 enum: MULT18_0.RST2MUX RST2 enum: MULT18_0.RST3MUX RST3 .tile_group MIB_R22C35:MIB_DSP4 MIB_R22C35:MIB2_DSP4 MIB_R22C36:MIB_DSP5 MIB_R22C36:MIB2_DSP5 MIB_R22C37:MIB_DSP6 MIB_R22C37:MIB2_DSP6 MIB_R22C38:MIB_DSP7 MIB_R22C38:MIB2_DSP7 MIB_R22C39:MIB_DSP8 MIB_R22C39:MIB2_DSP8 enum: MULT18_4.REG_INPUTA_CLK NONE enum: MULT18_4.REG_INPUTA_CE CE0 enum: MULT18_4.REG_INPUTA_RST RST0 enum: MULT18_4.REG_INPUTB_CLK NONE enum: MULT18_4.REG_INPUTB_CE CE0 enum: MULT18_4.REG_INPUTB_RST RST0 enum: MULT18_4.REG_INPUTC_CLK NONE enum: MULT18_4.REG_PIPELINE_CLK NONE enum: MULT18_4.REG_PIPELINE_CE CE0 enum: MULT18_4.REG_PIPELINE_RST RST0 enum: MULT18_4.REG_OUTPUT_CLK NONE enum: MULT18_4.REG_OUTPUT_RST RST0 enum: MULT18_4.CLK0_DIV ENABLED enum: MULT18_4.CLK1_DIV ENABLED enum: MULT18_4.CLK2_DIV ENABLED enum: MULT18_4.CLK3_DIV ENABLED enum: MULT18_4.GSR ENABLED enum: MULT18_4.SOURCEB_MODE B_SHIFT enum: MULT18_4.RESETMODE SYNC enum: MULT18_4.MODE MULT18X18D enum: MULT18_4.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_4.CLK0MUX CLK0 enum: MULT18_4.CLK1MUX CLK1 enum: MULT18_4.CLK2MUX CLK2 enum: MULT18_4.CLK3MUX CLK3 enum: MULT18_4.CE0MUX CE0 enum: MULT18_4.CE1MUX CE1 enum: MULT18_4.CE2MUX CE2 enum: MULT18_4.CE3MUX CE3 enum: MULT18_4.RST0MUX RST0 enum: MULT18_4.RST1MUX RST1 enum: MULT18_4.RST2MUX RST2 enum: MULT18_4.RST3MUX RST3 .tile_group MIB_R22C31:MIB_DSP0 MIB_R22C31:MIB2_DSP0 MIB_R22C32:MIB_DSP1 MIB_R22C32:MIB2_DSP1 MIB_R22C33:MIB_DSP2 MIB_R22C33:MIB2_DSP2 MIB_R22C34:MIB_DSP3 MIB_R22C34:MIB2_DSP3 MIB_R22C35:MIB_DSP4 MIB_R22C35:MIB2_DSP4 enum: MULT18_1.REG_INPUTA_CLK NONE enum: MULT18_1.REG_INPUTA_CE CE0 enum: MULT18_1.REG_INPUTA_RST RST0 enum: MULT18_1.REG_INPUTB_CLK NONE enum: MULT18_1.REG_INPUTB_CE CE0 enum: MULT18_1.REG_INPUTB_RST RST0 enum: MULT18_1.REG_INPUTC_CLK NONE enum: MULT18_1.REG_PIPELINE_CLK NONE enum: MULT18_1.REG_PIPELINE_CE CE0 enum: MULT18_1.REG_PIPELINE_RST RST0 enum: MULT18_1.REG_OUTPUT_CLK NONE enum: MULT18_1.CLK0_DIV ENABLED enum: MULT18_1.CLK1_DIV ENABLED enum: MULT18_1.CLK2_DIV ENABLED enum: MULT18_1.CLK3_DIV ENABLED enum: MULT18_1.GSR ENABLED enum: MULT18_1.SOURCEB_MODE B_SHIFT enum: MULT18_1.RESETMODE SYNC enum: MULT18_1.MODE MULT18X18D enum: MULT18_1.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_1.CLK0MUX CLK0 enum: MULT18_1.CLK1MUX CLK1 enum: MULT18_1.CLK2MUX CLK2 enum: MULT18_1.CLK3MUX CLK3 enum: MULT18_1.CE0MUX CE0 enum: MULT18_1.CE1MUX CE1 enum: MULT18_1.CE2MUX CE2 enum: MULT18_1.CE3MUX CE3 enum: MULT18_1.RST0MUX RST0 enum: MULT18_1.RST1MUX RST1 enum: MULT18_1.RST2MUX RST2 enum: MULT18_1.RST3MUX RST3 .tile_group MIB_R22C26:MIB_DSP4 MIB_R22C26:MIB2_DSP4 MIB_R22C27:MIB_DSP5 MIB_R22C27:MIB2_DSP5 MIB_R22C28:MIB_DSP6 MIB_R22C28:MIB2_DSP6 MIB_R22C29:MIB_DSP7 MIB_R22C29:MIB2_DSP7 MIB_R22C30:MIB_DSP8 MIB_R22C30:MIB2_DSP8 enum: MULT18_4.REG_INPUTA_CLK NONE enum: MULT18_4.REG_INPUTA_CE CE0 enum: MULT18_4.REG_INPUTA_RST RST0 enum: MULT18_4.REG_INPUTB_CLK NONE enum: MULT18_4.REG_INPUTB_CE CE0 enum: MULT18_4.REG_INPUTB_RST RST0 enum: MULT18_4.REG_INPUTC_CLK NONE enum: MULT18_4.REG_PIPELINE_CLK NONE enum: MULT18_4.REG_PIPELINE_CE CE0 enum: MULT18_4.REG_PIPELINE_RST RST0 enum: MULT18_4.REG_OUTPUT_CLK NONE enum: MULT18_4.REG_OUTPUT_RST RST0 enum: MULT18_4.CLK0_DIV ENABLED enum: MULT18_4.CLK1_DIV ENABLED enum: MULT18_4.CLK2_DIV ENABLED enum: MULT18_4.CLK3_DIV ENABLED enum: MULT18_4.GSR ENABLED enum: MULT18_4.SOURCEB_MODE B_SHIFT enum: MULT18_4.RESETMODE SYNC enum: MULT18_4.MODE MULT18X18D enum: MULT18_4.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_4.CLK0MUX CLK0 enum: MULT18_4.CLK1MUX CLK1 enum: MULT18_4.CLK2MUX CLK2 enum: MULT18_4.CLK3MUX CLK3 enum: MULT18_4.CE0MUX CE0 enum: MULT18_4.CE1MUX CE1 enum: MULT18_4.CE2MUX CE2 enum: MULT18_4.CE3MUX CE3 enum: MULT18_4.RST0MUX RST0 enum: MULT18_4.RST1MUX RST1 enum: MULT18_4.RST2MUX RST2 enum: MULT18_4.RST3MUX RST3 .tile_group MIB_R22C26:MIB_DSP4 MIB_R22C26:MIB2_DSP4 MIB_R22C27:MIB_DSP5 MIB_R22C27:MIB2_DSP5 MIB_R22C28:MIB_DSP6 MIB_R22C28:MIB2_DSP6 MIB_R22C29:MIB_DSP7 MIB_R22C29:MIB2_DSP7 MIB_R22C30:MIB_DSP8 MIB_R22C30:MIB2_DSP8 enum: MULT18_5.REG_INPUTA_CLK NONE enum: MULT18_5.REG_INPUTA_CE CE0 enum: MULT18_5.REG_INPUTA_RST RST0 enum: MULT18_5.REG_INPUTB_CLK NONE enum: MULT18_5.REG_INPUTB_CE CE0 enum: MULT18_5.REG_INPUTB_RST RST0 enum: MULT18_5.REG_INPUTC_CLK NONE enum: MULT18_5.REG_PIPELINE_CLK NONE enum: MULT18_5.REG_PIPELINE_CE CE0 enum: MULT18_5.REG_PIPELINE_RST RST0 enum: MULT18_5.REG_OUTPUT_CLK NONE enum: MULT18_5.CLK0_DIV ENABLED enum: MULT18_5.CLK1_DIV ENABLED enum: MULT18_5.CLK2_DIV ENABLED enum: MULT18_5.CLK3_DIV ENABLED enum: MULT18_5.GSR ENABLED enum: MULT18_5.SOURCEB_MODE B_SHIFT enum: MULT18_5.RESETMODE SYNC enum: MULT18_5.MODE MULT18X18D enum: MULT18_5.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_5.CLK0MUX CLK0 enum: MULT18_5.CLK1MUX CLK1 enum: MULT18_5.CLK2MUX CLK2 enum: MULT18_5.CLK3MUX CLK3 enum: MULT18_5.CE0MUX CE0 enum: MULT18_5.CE1MUX CE1 enum: MULT18_5.CE2MUX CE2 enum: MULT18_5.CE3MUX CE3 enum: MULT18_5.RST0MUX RST0 enum: MULT18_5.RST1MUX RST1 enum: MULT18_5.RST2MUX RST2 enum: MULT18_5.RST3MUX RST3 .tile_group MIB_R22C35:MIB_DSP4 MIB_R22C35:MIB2_DSP4 MIB_R22C36:MIB_DSP5 MIB_R22C36:MIB2_DSP5 MIB_R22C37:MIB_DSP6 MIB_R22C37:MIB2_DSP6 MIB_R22C38:MIB_DSP7 MIB_R22C38:MIB2_DSP7 MIB_R22C39:MIB_DSP8 MIB_R22C39:MIB2_DSP8 enum: MULT18_5.REG_INPUTA_CLK NONE enum: MULT18_5.REG_INPUTA_CE CE0 enum: MULT18_5.REG_INPUTA_RST RST0 enum: MULT18_5.REG_INPUTB_CLK NONE enum: MULT18_5.REG_INPUTB_CE CE0 enum: MULT18_5.REG_INPUTB_RST RST0 enum: MULT18_5.REG_INPUTC_CLK NONE enum: MULT18_5.REG_PIPELINE_CLK NONE enum: MULT18_5.REG_PIPELINE_CE CE0 enum: MULT18_5.REG_PIPELINE_RST RST0 enum: MULT18_5.REG_OUTPUT_CLK NONE enum: MULT18_5.CLK0_DIV ENABLED enum: MULT18_5.CLK1_DIV ENABLED enum: MULT18_5.CLK2_DIV ENABLED enum: MULT18_5.CLK3_DIV ENABLED enum: MULT18_5.GSR ENABLED enum: MULT18_5.SOURCEB_MODE B_SHIFT enum: MULT18_5.RESETMODE SYNC enum: MULT18_5.MODE MULT18X18D enum: MULT18_5.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_5.CLK0MUX CLK0 enum: MULT18_5.CLK1MUX CLK1 enum: MULT18_5.CLK2MUX CLK2 enum: MULT18_5.CLK3MUX CLK3 enum: MULT18_5.CE0MUX CE0 enum: MULT18_5.CE1MUX CE1 enum: MULT18_5.CE2MUX CE2 enum: MULT18_5.CE3MUX CE3 enum: MULT18_5.RST0MUX RST0 enum: MULT18_5.RST1MUX RST1 enum: MULT18_5.RST2MUX RST2 enum: MULT18_5.RST3MUX RST3 .tile_group MIB_R22C22:MIB_DSP0 MIB_R22C22:MIB2_DSP0 MIB_R22C23:MIB_DSP1 MIB_R22C23:MIB2_DSP1 MIB_R22C24:MIB_DSP2 MIB_R22C24:MIB2_DSP2 MIB_R22C25:MIB_DSP3 MIB_R22C25:MIB2_DSP3 MIB_R22C26:MIB_DSP4 MIB_R22C26:MIB2_DSP4 enum: MULT18_1.REG_INPUTA_CLK NONE enum: MULT18_1.REG_INPUTA_CE CE0 enum: MULT18_1.REG_INPUTA_RST RST0 enum: MULT18_1.REG_INPUTB_CLK NONE enum: MULT18_1.REG_INPUTB_CE CE0 enum: MULT18_1.REG_INPUTB_RST RST0 enum: MULT18_1.REG_INPUTC_CLK NONE enum: MULT18_1.REG_PIPELINE_CLK NONE enum: MULT18_1.REG_PIPELINE_CE CE0 enum: MULT18_1.REG_PIPELINE_RST RST0 enum: MULT18_1.REG_OUTPUT_CLK NONE enum: MULT18_1.CLK0_DIV ENABLED enum: MULT18_1.CLK1_DIV ENABLED enum: MULT18_1.CLK2_DIV ENABLED enum: MULT18_1.CLK3_DIV ENABLED enum: MULT18_1.GSR ENABLED enum: MULT18_1.SOURCEB_MODE B_SHIFT enum: MULT18_1.RESETMODE SYNC enum: MULT18_1.MODE MULT18X18D enum: MULT18_1.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_1.CLK0MUX CLK0 enum: MULT18_1.CLK1MUX CLK1 enum: MULT18_1.CLK2MUX CLK2 enum: MULT18_1.CLK3MUX CLK3 enum: MULT18_1.CE0MUX CE0 enum: MULT18_1.CE1MUX CE1 enum: MULT18_1.CE2MUX CE2 enum: MULT18_1.CE3MUX CE3 enum: MULT18_1.RST0MUX RST0 enum: MULT18_1.RST1MUX RST1 enum: MULT18_1.RST2MUX RST2 enum: MULT18_1.RST3MUX RST3 .tile_group MIB_R10C42:EBR_CMUX_UR MIB_R10C43:MIB_EBR1 word: EBR0.WID 110000000 word: EBR0.CSDECODE_A 111 word: EBR0.CSDECODE_B 111 enum: EBR0.MODE DP16KD enum: EBR0.DP16KD.DATA_WIDTH_A 4 enum: EBR0.DP16KD.DATA_WIDTH_B 4 enum: EBR0.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR0.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR0.REGMODE_A NOREG enum: EBR0.REGMODE_B NOREG enum: EBR0.RESETMODE ASYNC enum: EBR0.ASYNC_RESET_RELEASE ASYNC enum: EBR0.GSR DISABLED enum: EBR0.CLKAMUX CLKA enum: EBR0.CLKBMUX CLKB enum: EBR0.RSTAMUX INV enum: EBR0.RSTBMUX INV enum: EBR0.WEAMUX WEA enum: EBR0.WEBMUX INV enum: EBR0.CEAMUX CEA enum: EBR0.CEBMUX CEB enum: EBR0.OCEAMUX OCEA enum: EBR0.OCEBMUX OCEB .tile_group MIB_R10C37:MIB_EBR6 MIB_R10C38:MIB_EBR7 MIB_R10C39:EBR_CMUX_UL word: EBR3.WID 001000000 word: EBR3.CSDECODE_A 111 word: EBR3.CSDECODE_B 111 enum: EBR3.MODE DP16KD enum: EBR3.DP16KD.DATA_WIDTH_A 4 enum: EBR3.DP16KD.DATA_WIDTH_B 4 enum: EBR3.DP16KD.WRITEMODE_A READBEFOREWRITE enum: EBR3.DP16KD.WRITEMODE_B READBEFOREWRITE enum: EBR3.REGMODE_A NOREG enum: EBR3.REGMODE_B NOREG enum: EBR3.RESETMODE ASYNC enum: EBR3.ASYNC_RESET_RELEASE ASYNC enum: EBR3.GSR DISABLED enum: EBR3.CLKAMUX CLKA enum: EBR3.CLKBMUX CLKB enum: EBR3.RSTAMUX INV enum: EBR3.RSTBMUX INV enum: EBR3.WEAMUX WEA enum: EBR3.WEBMUX INV enum: EBR3.CEAMUX CEA enum: EBR3.CEBMUX CEB enum: EBR3.OCEAMUX OCEA enum: EBR3.OCEBMUX OCEB .tile_group MIB_R22C55:MIB_DSP4 MIB_R22C55:MIB2_DSP4 MIB_R22C56:MIB_DSP5 MIB_R22C56:MIB2_DSP5 MIB_R22C57:MIB_DSP6 MIB_R22C57:MIB2_DSP6 MIB_R22C58:MIB_DSP7 MIB_R22C58:MIB2_DSP7 MIB_R22C59:MIB_DSP8 MIB_R22C59:MIB2_DSP8 enum: MULT18_4.REG_INPUTA_CLK NONE enum: MULT18_4.REG_INPUTA_CE CE0 enum: MULT18_4.REG_INPUTA_RST RST0 enum: MULT18_4.REG_INPUTB_CLK NONE enum: MULT18_4.REG_INPUTB_CE CE0 enum: MULT18_4.REG_INPUTB_RST RST0 enum: MULT18_4.REG_INPUTC_CLK NONE enum: MULT18_4.REG_PIPELINE_CLK NONE enum: MULT18_4.REG_PIPELINE_CE CE0 enum: MULT18_4.REG_PIPELINE_RST RST0 enum: MULT18_4.REG_OUTPUT_CLK NONE enum: MULT18_4.REG_OUTPUT_RST RST0 enum: MULT18_4.CLK0_DIV ENABLED enum: MULT18_4.CLK1_DIV ENABLED enum: MULT18_4.CLK2_DIV ENABLED enum: MULT18_4.CLK3_DIV ENABLED enum: MULT18_4.GSR ENABLED enum: MULT18_4.SOURCEB_MODE B_SHIFT enum: MULT18_4.RESETMODE SYNC enum: MULT18_4.MODE MULT18X18D enum: MULT18_4.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_4.CLK0MUX CLK0 enum: MULT18_4.CLK1MUX CLK1 enum: MULT18_4.CLK2MUX CLK2 enum: MULT18_4.CLK3MUX CLK3 enum: MULT18_4.CE0MUX CE0 enum: MULT18_4.CE1MUX CE1 enum: MULT18_4.CE2MUX CE2 enum: MULT18_4.CE3MUX CE3 enum: MULT18_4.RST0MUX RST0 enum: MULT18_4.RST1MUX RST1 enum: MULT18_4.RST2MUX RST2 enum: MULT18_4.RST3MUX RST3 .tile_group MIB_R22C55:MIB_DSP4 MIB_R22C55:MIB2_DSP4 MIB_R22C56:MIB_DSP5 MIB_R22C56:MIB2_DSP5 MIB_R22C57:MIB_DSP6 MIB_R22C57:MIB2_DSP6 MIB_R22C58:MIB_DSP7 MIB_R22C58:MIB2_DSP7 MIB_R22C59:MIB_DSP8 MIB_R22C59:MIB2_DSP8 enum: MULT18_5.REG_INPUTA_CLK NONE enum: MULT18_5.REG_INPUTA_CE CE0 enum: MULT18_5.REG_INPUTA_RST RST0 enum: MULT18_5.REG_INPUTB_CLK NONE enum: MULT18_5.REG_INPUTB_CE CE0 enum: MULT18_5.REG_INPUTB_RST RST0 enum: MULT18_5.REG_INPUTC_CLK NONE enum: MULT18_5.REG_PIPELINE_CLK NONE enum: MULT18_5.REG_PIPELINE_CE CE0 enum: MULT18_5.REG_PIPELINE_RST RST0 enum: MULT18_5.REG_OUTPUT_CLK NONE enum: MULT18_5.CLK0_DIV ENABLED enum: MULT18_5.CLK1_DIV ENABLED enum: MULT18_5.CLK2_DIV ENABLED enum: MULT18_5.CLK3_DIV ENABLED enum: MULT18_5.GSR ENABLED enum: MULT18_5.SOURCEB_MODE B_SHIFT enum: MULT18_5.RESETMODE SYNC enum: MULT18_5.MODE MULT18X18D enum: MULT18_5.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_5.CLK0MUX CLK0 enum: MULT18_5.CLK1MUX CLK1 enum: MULT18_5.CLK2MUX CLK2 enum: MULT18_5.CLK3MUX CLK3 enum: MULT18_5.CE0MUX CE0 enum: MULT18_5.CE1MUX CE1 enum: MULT18_5.CE2MUX CE2 enum: MULT18_5.CE3MUX CE3 enum: MULT18_5.RST0MUX RST0 enum: MULT18_5.RST1MUX RST1 enum: MULT18_5.RST2MUX RST2 enum: MULT18_5.RST3MUX RST3 .tile_group MIB_R22C64:MIB_DSP4 MIB_R22C64:MIB2_DSP4 MIB_R22C65:MIB_DSP5 MIB_R22C65:MIB2_DSP5 MIB_R22C66:MIB_DSP6 MIB_R22C66:MIB2_DSP6 MIB_R22C67:MIB_DSP7 MIB_R22C67:MIB2_DSP7 MIB_R22C68:MIB_DSP8 MIB_R22C68:MIB2_DSP8 enum: MULT18_4.REG_INPUTA_CLK NONE enum: MULT18_4.REG_INPUTA_CE CE0 enum: MULT18_4.REG_INPUTA_RST RST0 enum: MULT18_4.REG_INPUTB_CLK NONE enum: MULT18_4.REG_INPUTB_CE CE0 enum: MULT18_4.REG_INPUTB_RST RST0 enum: MULT18_4.REG_INPUTC_CLK NONE enum: MULT18_4.REG_PIPELINE_CLK NONE enum: MULT18_4.REG_PIPELINE_CE CE0 enum: MULT18_4.REG_PIPELINE_RST RST0 enum: MULT18_4.REG_OUTPUT_CLK NONE enum: MULT18_4.REG_OUTPUT_RST RST0 enum: MULT18_4.CLK0_DIV ENABLED enum: MULT18_4.CLK1_DIV ENABLED enum: MULT18_4.CLK2_DIV ENABLED enum: MULT18_4.CLK3_DIV ENABLED enum: MULT18_4.GSR ENABLED enum: MULT18_4.SOURCEB_MODE B_SHIFT enum: MULT18_4.RESETMODE SYNC enum: MULT18_4.MODE MULT18X18D enum: MULT18_4.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_4.CLK0MUX CLK0 enum: MULT18_4.CLK1MUX CLK1 enum: MULT18_4.CLK2MUX CLK2 enum: MULT18_4.CLK3MUX CLK3 enum: MULT18_4.CE0MUX CE0 enum: MULT18_4.CE1MUX CE1 enum: MULT18_4.CE2MUX CE2 enum: MULT18_4.CE3MUX CE3 enum: MULT18_4.RST0MUX RST0 enum: MULT18_4.RST1MUX RST1 enum: MULT18_4.RST2MUX RST2 enum: MULT18_4.RST3MUX RST3 .tile_group MIB_R22C60:MIB_DSP0 MIB_R22C60:MIB2_DSP0 MIB_R22C61:MIB_DSP1 MIB_R22C61:MIB2_DSP1 MIB_R22C62:MIB_DSP2 MIB_R22C62:MIB2_DSP2 MIB_R22C63:MIB_DSP3 MIB_R22C63:MIB2_DSP3 MIB_R22C64:MIB_DSP4 MIB_R22C64:MIB2_DSP4 enum: MULT18_1.REG_INPUTA_CLK NONE enum: MULT18_1.REG_INPUTA_CE CE0 enum: MULT18_1.REG_INPUTA_RST RST0 enum: MULT18_1.REG_INPUTB_CLK NONE enum: MULT18_1.REG_INPUTB_CE CE0 enum: MULT18_1.REG_INPUTB_RST RST0 enum: MULT18_1.REG_INPUTC_CLK NONE enum: MULT18_1.REG_PIPELINE_CLK NONE enum: MULT18_1.REG_PIPELINE_CE CE0 enum: MULT18_1.REG_PIPELINE_RST RST0 enum: MULT18_1.REG_OUTPUT_CLK NONE enum: MULT18_1.CLK0_DIV ENABLED enum: MULT18_1.CLK1_DIV ENABLED enum: MULT18_1.CLK2_DIV ENABLED enum: MULT18_1.CLK3_DIV ENABLED enum: MULT18_1.GSR ENABLED enum: MULT18_1.SOURCEB_MODE B_SHIFT enum: MULT18_1.RESETMODE SYNC enum: MULT18_1.MODE MULT18X18D enum: MULT18_1.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_1.CLK0MUX CLK0 enum: MULT18_1.CLK1MUX CLK1 enum: MULT18_1.CLK2MUX CLK2 enum: MULT18_1.CLK3MUX CLK3 enum: MULT18_1.CE0MUX CE0 enum: MULT18_1.CE1MUX CE1 enum: MULT18_1.CE2MUX CE2 enum: MULT18_1.CE3MUX CE3 enum: MULT18_1.RST0MUX RST0 enum: MULT18_1.RST1MUX RST1 enum: MULT18_1.RST2MUX RST2 enum: MULT18_1.RST3MUX RST3 .tile_group MIB_R22C69:MIB_DSP0 MIB_R22C69:MIB2_DSP0 MIB_R22C70:MIB_DSP1 MIB_R22C70:MIB2_DSP1 MIB_R22C71:MIB_DSP2 MIB_R22C71:MIB2_DSP2 MIB_R22C72:MIB_DSP3 MIB_R22C72:MIB2_DSP3 MIB_R22C73:MIB_DSP4 MIB_R22C73:MIB2_DSP4 enum: MULT18_0.REG_INPUTA_CLK NONE enum: MULT18_0.REG_INPUTA_CE CE0 enum: MULT18_0.REG_INPUTA_RST RST0 enum: MULT18_0.REG_INPUTB_CLK NONE enum: MULT18_0.REG_INPUTB_CE CE0 enum: MULT18_0.REG_INPUTB_RST RST0 enum: MULT18_0.REG_INPUTC_CLK NONE enum: MULT18_0.REG_PIPELINE_CLK NONE enum: MULT18_0.REG_PIPELINE_CE CE0 enum: MULT18_0.REG_PIPELINE_RST RST0 enum: MULT18_0.REG_OUTPUT_CLK NONE enum: MULT18_0.REG_OUTPUT_RST RST0 enum: MULT18_0.CLK0_DIV ENABLED enum: MULT18_0.CLK1_DIV ENABLED enum: MULT18_0.CLK2_DIV ENABLED enum: MULT18_0.CLK3_DIV ENABLED enum: MULT18_0.GSR ENABLED enum: MULT18_0.SOURCEB_MODE B_SHIFT enum: MULT18_0.RESETMODE SYNC enum: MULT18_0.MODE MULT18X18D enum: MULT18_0.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_0.CLK0MUX CLK0 enum: MULT18_0.CLK1MUX CLK1 enum: MULT18_0.CLK2MUX CLK2 enum: MULT18_0.CLK3MUX CLK3 enum: MULT18_0.CE0MUX CE0 enum: MULT18_0.CE1MUX CE1 enum: MULT18_0.CE2MUX CE2 enum: MULT18_0.CE3MUX CE3 enum: MULT18_0.RST0MUX RST0 enum: MULT18_0.RST1MUX RST1 enum: MULT18_0.RST2MUX RST2 enum: MULT18_0.RST3MUX RST3 .tile_group MIB_R22C69:MIB_DSP0 MIB_R22C69:MIB2_DSP0 MIB_R22C70:MIB_DSP1 MIB_R22C70:MIB2_DSP1 MIB_R22C71:MIB_DSP2 MIB_R22C71:MIB2_DSP2 MIB_R22C72:MIB_DSP3 MIB_R22C72:MIB2_DSP3 MIB_R22C73:MIB_DSP4 MIB_R22C73:MIB2_DSP4 enum: MULT18_1.REG_INPUTA_CLK NONE enum: MULT18_1.REG_INPUTA_CE CE0 enum: MULT18_1.REG_INPUTA_RST RST0 enum: MULT18_1.REG_INPUTB_CLK NONE enum: MULT18_1.REG_INPUTB_CE CE0 enum: MULT18_1.REG_INPUTB_RST RST0 enum: MULT18_1.REG_INPUTC_CLK NONE enum: MULT18_1.REG_PIPELINE_CLK NONE enum: MULT18_1.REG_PIPELINE_CE CE0 enum: MULT18_1.REG_PIPELINE_RST RST0 enum: MULT18_1.REG_OUTPUT_CLK NONE enum: MULT18_1.CLK0_DIV ENABLED enum: MULT18_1.CLK1_DIV ENABLED enum: MULT18_1.CLK2_DIV ENABLED enum: MULT18_1.CLK3_DIV ENABLED enum: MULT18_1.GSR ENABLED enum: MULT18_1.SOURCEB_MODE B_SHIFT enum: MULT18_1.RESETMODE SYNC enum: MULT18_1.MODE MULT18X18D enum: MULT18_1.CIBOUT_BYP ON enum: DSP_LEFT.CIBOUT ON enum: MULT18_1.CLK0MUX CLK0 enum: MULT18_1.CLK1MUX CLK1 enum: MULT18_1.CLK2MUX CLK2 enum: MULT18_1.CLK3MUX CLK3 enum: MULT18_1.CE0MUX CE0 enum: MULT18_1.CE1MUX CE1 enum: MULT18_1.CE2MUX CE2 enum: MULT18_1.CE3MUX CE3 enum: MULT18_1.RST0MUX RST0 enum: MULT18_1.RST1MUX RST1 enum: MULT18_1.RST2MUX RST2 enum: MULT18_1.RST3MUX RST3 .tile_group MIB_R22C73:MIB_DSP4 MIB_R22C73:MIB2_DSP4 MIB_R22C74:MIB_DSP5 MIB_R22C74:MIB2_DSP5 MIB_R22C75:MIB_DSP6 MIB_R22C75:MIB2_DSP6 MIB_R22C76:MIB_DSP7 MIB_R22C76:MIB2_DSP7 MIB_R22C77:MIB_DSP8 MIB_R22C77:MIB2_DSP8 enum: MULT18_4.REG_INPUTA_CLK NONE enum: MULT18_4.REG_INPUTA_CE CE0 enum: MULT18_4.REG_INPUTA_RST RST0 enum: MULT18_4.REG_INPUTB_CLK NONE enum: MULT18_4.REG_INPUTB_CE CE0 enum: MULT18_4.REG_INPUTB_RST RST0 enum: MULT18_4.REG_INPUTC_CLK NONE enum: MULT18_4.REG_PIPELINE_CLK NONE enum: MULT18_4.REG_PIPELINE_CE CE0 enum: MULT18_4.REG_PIPELINE_RST RST0 enum: MULT18_4.REG_OUTPUT_CLK NONE enum: MULT18_4.REG_OUTPUT_RST RST0 enum: MULT18_4.CLK0_DIV ENABLED enum: MULT18_4.CLK1_DIV ENABLED enum: MULT18_4.CLK2_DIV ENABLED enum: MULT18_4.CLK3_DIV ENABLED enum: MULT18_4.GSR ENABLED enum: MULT18_4.SOURCEB_MODE B_SHIFT enum: MULT18_4.RESETMODE SYNC enum: MULT18_4.MODE MULT18X18D enum: MULT18_4.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_4.CLK0MUX CLK0 enum: MULT18_4.CLK1MUX CLK1 enum: MULT18_4.CLK2MUX CLK2 enum: MULT18_4.CLK3MUX CLK3 enum: MULT18_4.CE0MUX CE0 enum: MULT18_4.CE1MUX CE1 enum: MULT18_4.CE2MUX CE2 enum: MULT18_4.CE3MUX CE3 enum: MULT18_4.RST0MUX RST0 enum: MULT18_4.RST1MUX RST1 enum: MULT18_4.RST2MUX RST2 enum: MULT18_4.RST3MUX RST3 .tile_group MIB_R22C64:MIB_DSP4 MIB_R22C64:MIB2_DSP4 MIB_R22C65:MIB_DSP5 MIB_R22C65:MIB2_DSP5 MIB_R22C66:MIB_DSP6 MIB_R22C66:MIB2_DSP6 MIB_R22C67:MIB_DSP7 MIB_R22C67:MIB2_DSP7 MIB_R22C68:MIB_DSP8 MIB_R22C68:MIB2_DSP8 enum: MULT18_5.REG_INPUTA_CLK NONE enum: MULT18_5.REG_INPUTA_CE CE0 enum: MULT18_5.REG_INPUTA_RST RST0 enum: MULT18_5.REG_INPUTB_CLK NONE enum: MULT18_5.REG_INPUTB_CE CE0 enum: MULT18_5.REG_INPUTB_RST RST0 enum: MULT18_5.REG_INPUTC_CLK NONE enum: MULT18_5.REG_PIPELINE_CLK NONE enum: MULT18_5.REG_PIPELINE_CE CE0 enum: MULT18_5.REG_PIPELINE_RST RST0 enum: MULT18_5.REG_OUTPUT_CLK NONE enum: MULT18_5.CLK0_DIV ENABLED enum: MULT18_5.CLK1_DIV ENABLED enum: MULT18_5.CLK2_DIV ENABLED enum: MULT18_5.CLK3_DIV ENABLED enum: MULT18_5.GSR ENABLED enum: MULT18_5.SOURCEB_MODE B_SHIFT enum: MULT18_5.RESETMODE SYNC enum: MULT18_5.MODE MULT18X18D enum: MULT18_5.CIBOUT_BYP ON enum: DSP_RIGHT.CIBOUT ON enum: MULT18_5.CLK0MUX CLK0 enum: MULT18_5.CLK1MUX CLK1 enum: MULT18_5.CLK2MUX CLK2 enum: MULT18_5.CLK3MUX CLK3 enum: MULT18_5.CE0MUX CE0 enum: MULT18_5.CE1MUX CE1 enum: MULT18_5.CE2MUX CE2 enum: MULT18_5.CE3MUX CE3 enum: MULT18_5.RST0MUX RST0 enum: MULT18_5.RST1MUX RST1 enum: MULT18_5.RST2MUX RST2 enum: MULT18_5.RST3MUX RST3