Info: Logic utilisation before packing:
Info:     Total LUT4s:      8822/43848    20%
Info:         logic LUTs:   7710/43848    17%
Info:         carry LUTs:   1112/43848     2%
Info:           RAM LUTs:      0/ 5481     0%
Info:          RAMW LUTs:      0/10962     0%

Info:      Total DFFs:      4855/43848    11%

Info: Packing IOs..
Info: $psram_dq[15]$iobuf_i: psram_dq_$_TBUF__Y.Y
Info: pin 'psram_dq[15]$tr_io' constrained to Bel 'X90/Y41/PIOD'.
Info: $psram_dq[14]$iobuf_i: psram_dq_$_TBUF__Y_15.Y
Info: pin 'psram_dq[14]$tr_io' constrained to Bel 'X90/Y41/PIOC'.
Info: $psram_dq[13]$iobuf_i: psram_dq_$_TBUF__Y_14.Y
Info: pin 'psram_dq[13]$tr_io' constrained to Bel 'X90/Y41/PIOA'.
Info: $psram_dq[12]$iobuf_i: psram_dq_$_TBUF__Y_13.Y
Info: pin 'psram_dq[12]$tr_io' constrained to Bel 'X90/Y41/PIOB'.
Info: $psram_dq[11]$iobuf_i: psram_dq_$_TBUF__Y_12.Y
Info: pin 'psram_dq[11]$tr_io' constrained to Bel 'X90/Y38/PIOD'.
Info: $psram_dq[10]$iobuf_i: psram_dq_$_TBUF__Y_11.Y
Info: pin 'psram_dq[10]$tr_io' constrained to Bel 'X90/Y38/PIOB'.
Info: $psram_dq[9]$iobuf_i: psram_dq_$_TBUF__Y_10.Y
Info: pin 'psram_dq[9]$tr_io' constrained to Bel 'X90/Y32/PIOD'.
Info: $psram_dq[8]$iobuf_i: psram_dq_$_TBUF__Y_9.Y
Info: pin 'psram_dq[8]$tr_io' constrained to Bel 'X90/Y32/PIOB'.
Info: $psram_dq[7]$iobuf_i: psram_dq_$_TBUF__Y_8.Y
Info: pin 'psram_dq[7]$tr_io' constrained to Bel 'X90/Y32/PIOC'.
Info: $psram_dq[6]$iobuf_i: psram_dq_$_TBUF__Y_7.Y
Info: pin 'psram_dq[6]$tr_io' constrained to Bel 'X90/Y32/PIOA'.
Info: $psram_dq[5]$iobuf_i: psram_dq_$_TBUF__Y_6.Y
Info: pin 'psram_dq[5]$tr_io' constrained to Bel 'X90/Y29/PIOC'.
Info: $psram_dq[4]$iobuf_i: psram_dq_$_TBUF__Y_5.Y
Info: pin 'psram_dq[4]$tr_io' constrained to Bel 'X90/Y29/PIOA'.
Info: $psram_dq[3]$iobuf_i: psram_dq_$_TBUF__Y_4.Y
Info: pin 'psram_dq[3]$tr_io' constrained to Bel 'X90/Y23/PIOC'.
Info: $psram_dq[2]$iobuf_i: psram_dq_$_TBUF__Y_3.Y
Info: pin 'psram_dq[2]$tr_io' constrained to Bel 'X90/Y11/PIOB'.
Info: $psram_dq[1]$iobuf_i: psram_dq_$_TBUF__Y_2.Y
Info: pin 'psram_dq[1]$tr_io' constrained to Bel 'X90/Y11/PIOA'.
Info: $psram_dq[0]$iobuf_i: psram_dq_$_TBUF__Y_1.Y
Info: pin 'psram_dq[0]$tr_io' constrained to Bel 'X90/Y29/PIOD'.
Info: pin 'sclk$tr_io' constrained to Bel 'X0/Y11/PIOC'.
Info: pin 'rst$tr_io' constrained to Bel 'X0/Y14/PIOB'.
Info: pin 'psram_zz_n$tr_io' constrained to Bel 'X90/Y59/PIOB'.
Info: pin 'psram_we_n$tr_io' constrained to Bel 'X90/Y44/PIOD'.
Info: pin 'psram_ub_n$tr_io' constrained to Bel 'X90/Y59/PIOA'.
Info: pin 'psram_oe_n$tr_io' constrained to Bel 'X90/Y44/PIOC'.
Info: pin 'psram_lb_n$tr_io' constrained to Bel 'X90/Y53/PIOA'.
Info: pin 'psram_ce_n$tr_io' constrained to Bel 'X90/Y44/PIOA'.
Info: pin 'psram_a[22]$tr_io' constrained to Bel 'X90/Y59/PIOD'.
Info: pin 'psram_a[21]$tr_io' constrained to Bel 'X90/Y29/PIOB'.
Info: pin 'psram_a[20]$tr_io' constrained to Bel 'X90/Y26/PIOD'.
Info: pin 'psram_a[19]$tr_io' constrained to Bel 'X90/Y26/PIOC'.
Info: pin 'psram_a[18]$tr_io' constrained to Bel 'X90/Y26/PIOB'.
Info: pin 'psram_a[17]$tr_io' constrained to Bel 'X90/Y26/PIOA'.
Info: pin 'psram_a[16]$tr_io' constrained to Bel 'X90/Y23/PIOD'.
Info: pin 'psram_a[15]$tr_io' constrained to Bel 'X90/Y23/PIOB'.
Info: pin 'psram_a[14]$tr_io' constrained to Bel 'X90/Y23/PIOA'.
Info: pin 'psram_a[13]$tr_io' constrained to Bel 'X90/Y20/PIOC'.
Info: pin 'psram_a[12]$tr_io' constrained to Bel 'X90/Y20/PIOD'.
Info: pin 'psram_a[11]$tr_io' constrained to Bel 'X90/Y20/PIOA'.
Info: pin 'psram_a[10]$tr_io' constrained to Bel 'X90/Y20/PIOB'.
Info: pin 'psram_a[9]$tr_io' constrained to Bel 'X90/Y17/PIOD'.
Info: pin 'psram_a[8]$tr_io' constrained to Bel 'X90/Y17/PIOB'.
Info: pin 'psram_a[7]$tr_io' constrained to Bel 'X90/Y17/PIOC'.
Info: pin 'psram_a[6]$tr_io' constrained to Bel 'X90/Y17/PIOA'.
Info: pin 'psram_a[5]$tr_io' constrained to Bel 'X90/Y14/PIOD'.
Info: pin 'psram_a[4]$tr_io' constrained to Bel 'X90/Y14/PIOC'.
Info: pin 'psram_a[3]$tr_io' constrained to Bel 'X90/Y14/PIOB'.
Info: pin 'psram_a[2]$tr_io' constrained to Bel 'X90/Y14/PIOA'.
Info: pin 'psram_a[1]$tr_io' constrained to Bel 'X90/Y11/PIOD'.
Info: pin 'psram_a[0]$tr_io' constrained to Bel 'X90/Y11/PIOC'.
Info: pin 'mosi$tr_io' constrained to Bel 'X0/Y11/PIOD'.
Info: pin 'miso$tr_io' constrained to Bel 'X0/Y14/PIOC'.
Info: pin 'irq_n$tr_io' constrained to Bel 'X0/Y14/PIOA'.
Info: pin 'flash_sclk$tr_io' constrained to Bel 'X0/Y20/PIOB'.
Info: pin 'flash_mosi$tr_io' constrained to Bel 'X0/Y17/PIOD'.
Info: pin 'flash_miso$tr_io' constrained to Bel 'X0/Y17/PIOB'.
Info: pin 'flash_cs_n$tr_io' constrained to Bel 'X0/Y17/PIOA'.
Info: pin 'data_ready_n$tr_io' constrained to Bel 'X0/Y17/PIOC'.
Info: pin 'cs_n$tr_io' constrained to Bel 'X0/Y14/PIOD'.
Info: pin 'clk$tr_io' constrained to Bel 'X0/Y29/PIOC'.
Info: Packing constants..
Info: Packing carries...
Info: Packing LUTs...
Info: Packing LUT5-7s...
Info: Packing FFs...
Info:     1110 FFs paired with LUTs.
Info: Generating derived timing constraints...
Info: Promoting globals...
Info:     promoting clock net clk$TRELLIS_IO_IN to global network
Info: Checksum: 0x2eab0b08

Info: Device utilisation:
Info: 	          TRELLIS_IO:      57/    245    23%
Info: 	                DCCA:       1/     56     1%
Info: 	              DP16KD:       2/    108     1%
Info: 	          MULT18X18D:      16/     72    22%
Info: 	              ALU54B:       0/     36     0%
Info: 	             EHXPLLL:       0/      4     0%
Info: 	             EXTREFB:       0/      2     0%
Info: 	                DCUA:       0/      2     0%
Info: 	           PCSCLKDIV:       0/      2     0%
Info: 	             IOLOGIC:       0/    160     0%
Info: 	            SIOLOGIC:       0/     85     0%
Info: 	                 GSR:       0/      1     0%
Info: 	               JTAGG:       0/      1     0%
Info: 	                OSCG:       0/      1     0%
Info: 	               SEDGA:       0/      1     0%
Info: 	                 DTR:       0/      1     0%
Info: 	             USRMCLK:       0/      1     0%
Info: 	             CLKDIVF:       0/      4     0%
Info: 	           ECLKSYNCB:       0/     10     0%
Info: 	             DLLDELD:       0/      8     0%
Info: 	              DDRDLL:       0/      4     0%
Info: 	             DQSBUFM:       0/     10     0%
Info: 	     TRELLIS_ECLKBUF:       0/      8     0%
Info: 	        ECLKBRIDGECS:       0/      2     0%
Info: 	                DCSC:       0/      2     0%
Info: 	          TRELLIS_FF:    4855/  43848    11%
Info: 	        TRELLIS_COMB:    9080/  43848    20%
Info: 	        TRELLIS_RAMW:       0/   5481     0%

Info: Placed 57 cells based on constraints.
Info: Creating initial analytic placement for 10394 cells, random placement wirelen = 792017.
Info:     at initial placer iter 0, wirelen = 5250
Info:     at initial placer iter 1, wirelen = 3793
Info:     at initial placer iter 2, wirelen = 3760
Info:     at initial placer iter 3, wirelen = 4127
Info: Running main analytical placer, max placement attempts per cell = 24538515.
Info:     at iteration #1, type ALL: wirelen solved = 3786, spread = 116752, legal = 119542; time = 0.17s
Info:     at iteration #2, type ALL: wirelen solved = 14488, spread = 72347, legal = 75050; time = 0.15s
Info:     at iteration #3, type ALL: wirelen solved = 21396, spread = 64098, legal = 67226; time = 0.15s
Info:     at iteration #4, type ALL: wirelen solved = 24564, spread = 56783, legal = 60087; time = 0.14s
Info:     at iteration #5, type ALL: wirelen solved = 26800, spread = 50635, legal = 55154; time = 0.14s
Info:     at iteration #6, type ALL: wirelen solved = 27410, spread = 48851, legal = 52769; time = 0.13s
Info:     at iteration #7, type ALL: wirelen solved = 27687, spread = 45724, legal = 51761; time = 0.14s
Info:     at iteration #8, type ALL: wirelen solved = 28115, spread = 45207, legal = 50856; time = 0.13s
Info:     at iteration #9, type ALL: wirelen solved = 28937, spread = 45520, legal = 49845; time = 0.13s
Info:     at iteration #10, type ALL: wirelen solved = 29852, spread = 45381, legal = 49658; time = 0.13s
Info:     at iteration #11, type ALL: wirelen solved = 30210, spread = 44229, legal = 49542; time = 0.13s
Info:     at iteration #12, type ALL: wirelen solved = 30977, spread = 44812, legal = 50036; time = 0.12s
Info:     at iteration #13, type ALL: wirelen solved = 31201, spread = 44093, legal = 49382; time = 0.13s
Info:     at iteration #14, type ALL: wirelen solved = 31282, spread = 43907, legal = 49503; time = 0.12s
Info:     at iteration #15, type ALL: wirelen solved = 31578, spread = 43248, legal = 48729; time = 0.12s
Info:     at iteration #16, type ALL: wirelen solved = 31502, spread = 44064, legal = 48127; time = 0.12s
Info:     at iteration #17, type ALL: wirelen solved = 32231, spread = 45015, legal = 50114; time = 0.12s
Info:     at iteration #18, type ALL: wirelen solved = 32623, spread = 44628, legal = 50213; time = 0.12s
Info:     at iteration #19, type ALL: wirelen solved = 33131, spread = 45352, legal = 50623; time = 0.12s
Info:     at iteration #20, type ALL: wirelen solved = 33661, spread = 46860, legal = 51193; time = 0.12s
Info:     at iteration #21, type ALL: wirelen solved = 34564, spread = 47538, legal = 52420; time = 0.12s
Info: HeAP Placer Time: 3.90s
Info:   of which solving equations: 2.69s
Info:   of which spreading cells: 0.43s
Info:   of which strict legalisation: 0.17s

Info: Running simulated annealing placer for refinement.
Info:   at iteration #1: temp = 0.000000, timing cost = 2580, wirelen = 48127
Info:   at iteration #5: temp = 0.000000, timing cost = 1734, wirelen = 43127
Info:   at iteration #10: temp = 0.000000, timing cost = 1816, wirelen = 41772
Info:   at iteration #15: temp = 0.000000, timing cost = 1823, wirelen = 41190
Info:   at iteration #20: temp = 0.000000, timing cost = 1815, wirelen = 40998
Info:   at iteration #20: temp = 0.000000, timing cost = 1804, wirelen = 41021 
Info: SA placement time 5.67s

Info: Max frequency for clock '$glbnet$clk$TRELLIS_IO_IN': 58.60 MHz (FAIL at 80.00 MHz)

Info: Max delay <async>                           -> posedge $glbnet$clk$TRELLIS_IO_IN: 13.36 ns
Info: Max delay posedge $glbnet$clk$TRELLIS_IO_IN -> <async>                          : 7.02 ns

Info: Slack histogram:
Info:  legend: * represents 21 endpoint(s)
Info:          + represents [1,21) endpoint(s)
Info: [ -4564,  -3739) |*+
Info: [ -3739,  -2914) |*+
Info: [ -2914,  -2089) |+
Info: [ -2089,  -1264) |+
Info: [ -1264,   -439) | 
Info: [  -439,    386) |+
Info: [   386,   1211) |+
Info: [  1211,   2036) |**+
Info: [  2036,   2861) |*******+
Info: [  2861,   3686) |************************+
Info: [  3686,   4511) |*****************************************+
Info: [  4511,   5336) |*****************************************+
Info: [  5336,   6161) |********************************************************+
Info: [  6161,   6986) |************************************************************ 
Info: [  6986,   7811) |*****************************************+
Info: [  7811,   8636) |*******************************************************+
Info: [  8636,   9461) |*****************************************+
Info: [  9461,  10286) |**************************************+
Info: [ 10286,  11111) |******************************************+
Info: [ 11111,  11936) |*************************************+
Info: Checksum: 0xa0b42877
Info: Routing globals...
Info:     routing clock net $glbnet$clk$TRELLIS_IO_IN using global 0

Info: Routing..
Info: Setting up routing queue.
Info: Routing 45262 arcs.
Info:            |   (re-)routed arcs  |   delta    | remaining|       time spent     |
Info:    IterCnt |  w/ripup   wo/ripup |  w/r  wo/r |      arcs| batch(sec) total(sec)|
Info:       1000 |      447        552 |  447   552 |     44900|       0.30       0.30|
Info:       2000 |      729       1270 |  282   718 |     44407|       0.12       0.41|
Info:       3000 |     1014       1985 |  285   715 |     43759|       0.11       0.53|
Info:       4000 |     1345       2654 |  331   669 |     43169|       0.13       0.66|
Info:       5000 |     1426       3573 |   81   919 |     42389|       0.13       0.79|
Info:       6000 |     1603       4396 |  177   823 |     41641|       0.15       0.94|
Info:       7000 |     1742       5257 |  139   861 |     41011|       0.09       1.03|
Info:       8000 |     1854       6145 |  112   888 |     40484|       0.10       1.13|
Info:       9000 |     2040       6959 |  186   814 |     39750|       0.09       1.22|
Info:      10000 |     2176       7823 |  136   864 |     39194|       0.09       1.31|
Info:      11000 |     2328       8671 |  152   848 |     38419|       0.10       1.40|
Info:      12000 |     2457       9542 |  129   871 |     37793|       0.11       1.51|
Info:      13000 |     2631      10368 |  174   826 |     37049|       0.11       1.63|
Info:      14000 |     2769      11230 |  138   862 |     36361|       0.10       1.72|
Info:      15000 |     2896      12103 |  127   873 |     35543|       0.08       1.81|
Info:      16000 |     3044      12955 |  148   852 |     34816|       0.10       1.91|
Info:      17000 |     3235      13764 |  191   809 |     34124|       0.11       2.01|
Info:      18000 |     3448      14551 |  213   787 |     33395|       0.09       2.10|
Info:      19000 |     3661      15338 |  213   787 |     32741|       0.12       2.23|
Info:      20000 |     3878      16121 |  217   783 |     32047|       0.13       2.36|
Info:      21000 |     4053      16946 |  175   825 |     31274|       0.09       2.45|
Info:      22000 |     4292      17707 |  239   761 |     30649|       0.12       2.57|
Info:      23000 |     4457      18503 |  165   796 |     29829|       0.09       2.66|
Info:      24000 |     4684      19201 |  227   698 |     29068|       0.08       2.74|
Info:      25000 |     4904      19912 |  220   711 |     28341|       0.09       2.84|
Info:      26000 |     5205      20551 |  301   639 |     27669|       0.11       2.95|
Info:      27000 |     5559      21134 |  354   583 |     27046|       0.09       3.04|
Info:      28000 |     5945      21709 |  386   575 |     26523|       0.13       3.17|
Info:      29000 |     6308      22311 |  363   602 |     25953|       0.11       3.28|
Info:      30000 |     6653      22951 |  345   640 |     25339|       0.11       3.39|
Info:      31000 |     7030      23568 |  377   617 |     24759|       0.12       3.51|
Info:      32000 |     7336      24253 |  306   685 |     24139|       0.14       3.65|
Info:      33000 |     7651      24927 |  315   674 |     23537|       0.13       3.78|
Info:      34000 |     7847      25714 |  196   787 |     22761|       0.11       3.89|
Info:      35000 |     8032      26512 |  185   798 |     21992|       0.11       4.01|
Info:      36000 |     8235      27271 |  203   759 |     21256|       0.12       4.13|
Info:      37000 |     8462      28011 |  227   740 |     20516|       0.12       4.25|
Info:      38000 |     8695      28753 |  233   742 |     19812|       0.13       4.38|
Info:      39000 |     8912      29518 |  217   765 |     19192|       0.13       4.51|
Info:      40000 |     9126      30280 |  214   762 |     18509|       0.10       4.61|
Info:      41000 |     9387      30966 |  261   686 |     17817|       0.12       4.73|
Info:      42000 |     9637      31677 |  250   711 |     17102|       0.12       4.85|
Info:      43000 |     9917      32348 |  280   671 |     16441|       0.13       4.98|
Info:      44000 |    10168      33076 |  251   728 |     15756|       0.13       5.11|
Info:      45000 |    10448      33761 |  280   685 |     15093|       0.13       5.24|
Info:      46000 |    10699      34471 |  251   710 |     14394|       0.13       5.37|
Info:      47000 |    10980      35168 |  281   697 |     13722|       0.11       5.47|
Info:      48000 |    11247      35867 |  267   699 |     13050|       0.14       5.61|
Info:      49000 |    11493      36563 |  246   696 |     12347|       0.12       5.73|
Info:      50000 |    11741      37255 |  248   692 |     11637|       0.13       5.87|
Info:      51000 |    11997      37926 |  256   671 |     10979|       0.12       5.98|
Info:      52000 |    12258      38605 |  261   679 |     10352|       0.14       6.12|
Info:      53000 |    12487      39342 |  229   737 |      9711|       0.14       6.26|
Info:      54000 |    12671      40111 |  184   769 |      8967|       0.11       6.37|
Info:      55000 |    12942      40812 |  271   701 |      8372|       0.16       6.52|
Info:      56000 |    13159      41523 |  217   711 |      7629|       0.14       6.67|
Info:      57000 |    13315      42280 |  156   757 |      6803|       0.11       6.78|
Info:      58000 |    13494      43021 |  179   741 |      6055|       0.14       6.92|
Info:      59000 |    13657      43823 |  163   802 |      5249|       0.13       7.05|
Info:      60000 |    13910      44549 |  253   726 |      4742|       0.17       7.23|
Info:      61000 |    14155      45304 |  245   755 |      4327|       0.19       7.41|
Info:      62000 |    14391      46059 |  236   755 |      3743|       0.19       7.60|
Info:      63000 |    14585      46824 |  194   765 |      3027|       0.26       7.87|
Info:      64000 |    14833      47537 |  248   713 |      2484|       0.25       8.12|
Info:      65000 |    15012      48310 |  179   773 |      1763|       0.38       8.50|
Info:      66000 |    15214      49060 |  202   750 |      1189|       0.53       9.03|
Info:      67000 |    15425      49817 |  211   757 |       637|       0.48       9.51|
Info:      68000 |    15696      50515 |  271   698 |        68|       0.89      10.40|
Info:      68102 |    15716      50597 |   20    82 |         0|       0.11      10.51|
Info: Routing complete.
Info: Router1 time 10.51s
Info: Checksum: 0x2f9f5e7b

Info: Critical path report for clock '$glbnet$clk$TRELLIS_IO_IN' (posedge -> posedge):
Info:       type curr  total name
Info:   clk-to-q  0.40  0.40 Source u_graph_engine.u_neuron.group_index_TRELLIS_FF_Q.Q
Info:    routing  1.33  1.73 Net u_graph_engine.u_neuron.group_index[0] (59,27) -> (42,26)
Info:                          Sink u_graph_engine.u_neuron.u_mac8.x_bus_PFUMX_Z_46_C0_LUT4_Z.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  1.91 Source u_graph_engine.u_neuron.u_mac8.x_bus_PFUMX_Z_46_C0_LUT4_Z.F
Info:    routing  0.57  2.47 Net u_graph_engine.u_neuron.u_mac8.x_bus_PFUMX_Z_46_C0[4] (42,26) -> (44,27)
Info:                          Sink u_graph_engine.u_neuron.u_mac8.x_bus_PFUMX_Z_46_BLUT_LUT4_Z.M
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.19  2.67 Source u_graph_engine.u_neuron.u_mac8.x_bus_PFUMX_Z_46_BLUT_LUT4_Z.OFX
Info:    routing  1.51  4.18 Net u_graph_engine.u_neuron.x_group[50] (44,27) -> (32,22)
Info:                          Sink u_graph_engine.u_neuron.u_mac8.GEN_MAC[6].u_mac.product_MULT18X18D_P9.A2
Info:                          Defined in:
Info:                               rtl/neuron_parallel.v:92.43-92.50
Info:      logic  3.07  7.25 Source u_graph_engine.u_neuron.u_mac8.GEN_MAC[6].u_mac.product_MULT18X18D_P9.P3
Info:    routing  1.84  9.09 Net u_graph_engine.u_neuron.u_mac8.products[6][3] (32,22) -> (45,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB1.B
Info:                          Defined in:
Info:                               rtl/mac8.v:73.9-73.13
Info:      logic  0.35  9.45 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB1.FCO
Info:    routing  0.00  9.45 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_S1_CCU2C_S1_1_COUT (45,23) -> (45,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               rtl/mac8.v:101.21-102.44
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  9.50 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1$CCU2_COMB0.FCO
Info:    routing  0.00  9.50 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1$CCU2_FCI_INT (45,23) -> (45,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1$CCU2_COMB1.FCI
Info:      logic  0.00  9.50 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1$CCU2_COMB1.FCO
Info:    routing  0.00  9.50 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_COUT (45,23) -> (46,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               rtl/mac8.v:101.21-102.44
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  9.56 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB0.FCO
Info:    routing  0.00  9.56 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_FCI_INT (46,23) -> (46,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB1.FCI
Info:      logic  0.00  9.56 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB1.FCO
Info:    routing  0.00  9.56 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1_COUT (46,23) -> (46,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               rtl/mac8.v:101.21-102.44
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  9.61 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB0.FCO
Info:    routing  0.00  9.61 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_FCI_INT (46,23) -> (46,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB1.FCI
Info:      logic  0.00  9.61 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB1.FCO
Info:    routing  0.00  9.61 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1_COUT (46,23) -> (46,23)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               rtl/mac8.v:101.21-102.44
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.33  9.94 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_CCU2C_S1_1$CCU2_COMB0.F
Info:    routing  0.86  10.80 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S0[1] (46,23) -> (47,25)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_LUT4_Z.C
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  10.98 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_LUT4_Z.F
Info:    routing  0.47  11.44 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1[4] (47,25) -> (47,25)
Info:                          Sink u_graph_engine.u_neuron.acc_next_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_LUT4_Z.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  11.62 Source u_graph_engine.u_neuron.acc_next_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1_LUT4_Z.F
Info:    routing  0.47  12.09 Net u_graph_engine.u_neuron.acc_next_LUT4_Z_D_CCU2C_S0_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_COUT_CCU2C_CIN_S1[3] (47,25) -> (47,25)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_3_A1_LUT4_Z.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  12.27 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_3_A1_LUT4_Z.F
Info:    routing  1.13  13.40 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_3_A1 (47,25) -> (46,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_3$CCU2_COMB1.A
Info:      logic  0.35  13.76 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_3$CCU2_COMB1.FCO
Info:    routing  0.00  13.76 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_3_COUT (46,20) -> (46,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_4$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  13.81 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_4$CCU2_COMB0.FCO
Info:    routing  0.00  13.81 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_4$CCU2_FCI_INT (46,20) -> (46,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_4$CCU2_COMB1.FCI
Info:      logic  0.00  13.81 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_4$CCU2_COMB1.FCO
Info:    routing  0.00  13.81 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_4_COUT (46,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_5$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  13.87 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_5$CCU2_COMB0.FCO
Info:    routing  0.00  13.87 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_5$CCU2_FCI_INT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_5$CCU2_COMB1.FCI
Info:      logic  0.00  13.87 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_5$CCU2_COMB1.FCO
Info:    routing  0.00  13.87 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_5_COUT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_6$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  13.92 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_6$CCU2_COMB0.FCO
Info:    routing  0.00  13.92 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_6$CCU2_FCI_INT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_6$CCU2_COMB1.FCI
Info:      logic  0.00  13.92 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_6$CCU2_COMB1.FCO
Info:    routing  0.00  13.92 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_6_COUT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_7$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  13.98 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_7$CCU2_COMB0.FCO
Info:    routing  0.00  13.98 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_7$CCU2_FCI_INT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_7$CCU2_COMB1.FCI
Info:      logic  0.00  13.98 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_7$CCU2_COMB1.FCO
Info:    routing  0.00  13.98 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_7_COUT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_13$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  14.03 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_13$CCU2_COMB0.FCO
Info:    routing  0.00  14.03 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_13$CCU2_FCI_INT (47,20) -> (47,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_13$CCU2_COMB1.FCI
Info:      logic  0.00  14.03 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_13$CCU2_COMB1.FCO
Info:    routing  0.00  14.03 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_13_COUT (47,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_8$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  14.09 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_8$CCU2_COMB0.FCO
Info:    routing  0.00  14.09 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_8$CCU2_FCI_INT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_8$CCU2_COMB1.FCI
Info:      logic  0.00  14.09 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_8$CCU2_COMB1.FCO
Info:    routing  0.00  14.09 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_8_COUT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_9$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  14.15 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_9$CCU2_COMB0.FCO
Info:    routing  0.00  14.15 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_9$CCU2_FCI_INT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_9$CCU2_COMB1.FCI
Info:      logic  0.00  14.15 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_9$CCU2_COMB1.FCO
Info:    routing  0.00  14.15 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_9_COUT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_10$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  14.20 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_10$CCU2_COMB0.FCO
Info:    routing  0.00  14.20 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_10$CCU2_FCI_INT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_10$CCU2_COMB1.FCI
Info:      logic  0.00  14.20 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_10$CCU2_COMB1.FCO
Info:    routing  0.00  14.20 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_10_COUT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_11$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  14.26 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_11$CCU2_COMB0.FCO
Info:    routing  0.00  14.26 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_11$CCU2_FCI_INT (48,20) -> (48,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_11$CCU2_COMB1.FCI
Info:      logic  0.00  14.26 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_11$CCU2_COMB1.FCO
Info:    routing  0.00  14.26 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_11_COUT (48,20) -> (49,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_12$CCU2_COMB0.FCI
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/arith_map_ccu2c.v:74.7-80.4
Info:                               /opt/homebrew/bin/../share/yosys/lattice/ccu2c_sim.vh:9.9-9.13
Info:      logic  0.06  14.31 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_12$CCU2_COMB0.FCO
Info:    routing  0.00  14.31 Net u_graph_engine.u_neuron.acc_next_CCU2C_S1_12$CCU2_FCI_INT (49,20) -> (49,20)
Info:                          Sink u_graph_engine.u_neuron.acc_next_CCU2C_S1_12$CCU2_COMB1.FCI
Info:      logic  0.29  14.61 Source u_graph_engine.u_neuron.acc_next_CCU2C_S1_12$CCU2_COMB1.F
Info:    routing  0.12  14.73 Net u_graph_engine.u_neuron.acc_next[31] (49,20) -> (49,20)
Info:                          Sink u_graph_engine.u_neuron.acc_TRELLIS_FF_Q_30.DI
Info:                          Defined in:
Info:                               rtl/mac8.v:9.35-9.42
Info:      setup  0.00  14.73 Source u_graph_engine.u_neuron.acc_TRELLIS_FF_Q_30.DI
Info: 6.43 ns logic, 8.29 ns routing

Info: Critical path report for cross-domain path '<async>' -> 'posedge $glbnet$clk$TRELLIS_IO_IN':
Info:       type curr  total name
Info:     source  0.00  0.00 Source rst$tr_io.O
Info:    routing  3.94  3.94 Net rst$TRELLIS_IO_IN (0,14) -> (74,9)
Info:                          Sink u_flash_slot_manager.u_fce.done_LUT4_C_Z_LUT4_Z.B
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  4.12 Source u_flash_slot_manager.u_fce.done_LUT4_C_Z_LUT4_Z.F
Info:    routing  0.97  5.08 Net u_flash_slot_manager.cat_valid[3]_TRELLIS_FF_Q_DI_LUT4_Z_B[2] (74,9) -> (69,11)
Info:                          Sink u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  5.26 Source u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C.F
Info:    routing  0.37  5.63 Net u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z[1] (69,11) -> (68,11)
Info:                          Sink u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  5.81 Source u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D.F
Info:    routing  0.52  6.33 Net u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_Z_LUT4_D_1_C[1] (68,11) -> (67,11)
Info:                          Sink u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_Z.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  6.51 Source u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_Z.F
Info:    routing  0.16  6.67 Net u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D[1] (67,11) -> (67,11)
Info:                          Sink u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_D.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  6.85 Source u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_D.F
Info:    routing  0.86  7.71 Net u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_D_Z[2] (67,11) -> (68,12)
Info:                          Sink u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_D_Z_LUT4_D_1.D
Info:                          Defined in:
Info:                               /opt/homebrew/bin/../share/yosys/lattice/cells_map_trellis.v:108.23-108.24
Info:      logic  0.18  7.89 Source u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_D_Z_LUT4_D_1.F
Info:    routing  2.40  10.29 Net u_flash_slot_manager.crc_active_TRELLIS_FF_Q_CE_PFUMX_Z_C0_LUT4_D_B_LUT4_D_1_Z_LUT4_Z_2_D_PFUMX_C0_Z_LUT4_Z_2_B_LUT4_Z_C_LUT4_C_Z_LUT4_D_1_B_LUT4_D_Z_LUT4_C_D_LUT4_D_Z_LUT4_D_1_Z (68,12) -> (39,21)
Info:                          Sink u_flash_slot_manager.cat_crc[13]_TRELLIS_FF_Q_24.CE
Info:      setup  0.00  10.29 Source u_flash_slot_manager.cat_crc[13]_TRELLIS_FF_Q_24.CE
Info: 1.08 ns logic, 9.21 ns routing

Info: Critical path report for cross-domain path 'posedge $glbnet$clk$TRELLIS_IO_IN' -> '<async>':
Info:       type curr  total name
Info:   clk-to-q  0.40  0.40 Source u_graph_engine.err_TRELLIS_FF_Q.Q
Info:    routing  2.81  3.21 Net graph_err (66,23) -> (10,16)
Info:                          Sink irq_n_LUT4_Z.D
Info:                          Defined in:
Info:                               rtl/spi_engine.v:116.34-116.43
Info:      logic  0.18  3.39 Source irq_n_LUT4_Z.F
Info:    routing  1.13  4.51 Net irq_n$TRELLIS_IO_OUT (10,16) -> (0,14)
Info:                          Sink irq_n$tr_io.I
Info:                          Defined in:
Info:                               rtl/spi_neuron_top.v:67.17-67.22
Info: 0.57 ns logic, 3.94 ns routing

ERROR: Max frequency for clock '$glbnet$clk$TRELLIS_IO_IN': 67.91 MHz (FAIL at 80.00 MHz)

Info: Max delay <async>                           -> posedge $glbnet$clk$TRELLIS_IO_IN: 10.29 ns
Info: Max delay posedge $glbnet$clk$TRELLIS_IO_IN -> <async>                          : 4.51 ns

Info: Slack histogram:
Info:  legend: * represents 21 endpoint(s)
Info:          + represents [1,21) endpoint(s)
Info: [ -2226,  -1524) |*+
Info: [ -1524,   -822) |+
Info: [  -822,   -120) |+
Info: [  -120,    582) |+
Info: [   582,   1284) |+
Info: [  1284,   1986) |+
Info: [  1986,   2688) | 
Info: [  2688,   3390) |**+
Info: [  3390,   4092) |*********+
Info: [  4092,   4794) |**************************+
Info: [  4794,   5496) |************************************+
Info: [  5496,   6198) |**************************+
Info: [  6198,   6900) |******************************************+
Info: [  6900,   7602) |************************************************************ 
Info: [  7602,   8304) |***********************************************+
Info: [  8304,   9006) |***************************************+
Info: [  9006,   9708) |*********************************************************+
Info: [  9708,  10410) |**************************************+
Info: [ 10410,  11112) |****************************************************+
Info: [ 11112,  11814) |***************************************+
0 warnings, 1 error

Info: Program finished normally.