#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp :ivl_version "13.0 (stable)" "(v13_0)"; :ivl_delay_selection "TYPICAL"; :vpi_time_precision - 12; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi"; S_0x102cce1c0 .scope package, "$unit" "$unit" 2 1; .timescale 0 0; S_0x102cc09e0 .scope module, "tb" "tb" 3 3; .timescale -9 -12; P_0x102ccf000 .param/l "ADDR_WIDTH" 1 3 5, +C4<00000000000000000000000000010110>; P_0x102ccf040 .param/real "CLK_PERIOD" 1 3 6, Cr; value=12.5000 L_0x102ccff60 .functor BUFZ 16, v0x74b08cdc0_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>; L_0x102ccf620 .functor BUFZ 1, v0x74b08ce60_0, C4<0>, C4<0>, C4<0>; v0x74b08c640_0 .var "addr", 21 0; v0x74b08c6e0_0 .var "clk", 0 0; v0x74b08c780_0 .var/i "i", 31 0; v0x74b08c820_0 .net "mem_addr", 21 0, v0x102ccd820_0; 1 drivers v0x74b08c8c0_0 .net "mem_lb_n", 0 0, v0x102ccf580_0; 1 drivers v0x74b08c960_0 .net "mem_rdata", 15 0, L_0x102ccff60; 1 drivers v0x74b08ca00_0 .net "mem_ready", 0 0, L_0x102ccf620; 1 drivers v0x74b08caa0_0 .net "mem_req", 0 0, v0x102ccfb40_0; 1 drivers v0x74b08cb40_0 .net "mem_ub_n", 0 0, v0x102ccfbe0_0; 1 drivers v0x74b08cbe0_0 .net "mem_wdata", 15 0, v0x102ccfc80_0; 1 drivers v0x74b08cc80_0 .net "mem_wr", 0 0, v0x102ccfd20_0; 1 drivers v0x74b08cd20 .array "memory", 1023 0, 15 0; v0x74b08cdc0_0 .var "model_rdata", 15 0; v0x74b08ce60_0 .var "model_ready", 0 0; v0x74b08cf00_0 .net/s "rdata", 7 0, v0x102ccfdc0_0; 1 drivers v0x74b08cfa0_0 .net "ready", 0 0, v0x74b08c000_0; 1 drivers v0x74b08d040_0 .var "req", 0 0; v0x74b08d0e0_0 .var "rst", 0 0; v0x74b08d180_0 .var/s "wdata", 7 0; v0x74b08d220_0 .var "wr", 0 0; S_0x102cc0b60 .scope module, "dut" "int8_memory_access" 3 43, 4 1 0, S_0x102cc09e0; .timescale -9 -12; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "rst"; .port_info 2 /INPUT 1 "req"; .port_info 3 /INPUT 1 "wr"; .port_info 4 /INPUT 22 "addr"; .port_info 5 /INPUT 8 "wdata"; .port_info 6 /OUTPUT 8 "rdata"; .port_info 7 /OUTPUT 1 "ready"; .port_info 8 /OUTPUT 1 "mem_req"; .port_info 9 /OUTPUT 1 "mem_wr"; .port_info 10 /OUTPUT 22 "mem_addr"; .port_info 11 /OUTPUT 16 "mem_wdata"; .port_info 12 /OUTPUT 1 "mem_lb_n"; .port_info 13 /OUTPUT 1 "mem_ub_n"; .port_info 14 /INPUT 16 "mem_rdata"; .port_info 15 /INPUT 1 "mem_ready"; P_0x102cce340 .param/l "ADDR_WIDTH" 0 4 2, +C4<00000000000000000000000000010110>; P_0x102cce380 .param/l "STATE_IDLE" 1 4 40, C4<00>; P_0x102cce3c0 .param/l "STATE_WAIT" 1 4 41, C4<01>; v0x102ccb170_0 .net "addr", 21 0, v0x74b08c640_0; 1 drivers v0x102ccd070_0 .var "addr_reg", 21 0; v0x102ccebc0_0 .net "clk", 0 0, v0x74b08c6e0_0; 1 drivers v0x102ccd820_0 .var "mem_addr", 21 0; v0x102ccf580_0 .var "mem_lb_n", 0 0; v0x102ccfa00_0 .net "mem_rdata", 15 0, L_0x102ccff60; alias, 1 drivers v0x102ccfaa0_0 .net "mem_ready", 0 0, L_0x102ccf620; alias, 1 drivers v0x102ccfb40_0 .var "mem_req", 0 0; v0x102ccfbe0_0 .var "mem_ub_n", 0 0; v0x102ccfc80_0 .var "mem_wdata", 15 0; v0x102ccfd20_0 .var "mem_wr", 0 0; v0x102ccfdc0_0 .var/s "rdata", 7 0; v0x74b08c000_0 .var "ready", 0 0; v0x74b08c0a0_0 .net "req", 0 0, v0x74b08d040_0; 1 drivers v0x74b08c140_0 .net "rst", 0 0, v0x74b08d0e0_0; 1 drivers v0x74b08c1e0_0 .var "state", 1 0; v0x74b08c280_0 .net/s "wdata", 7 0, v0x74b08d180_0; 1 drivers v0x74b08c320_0 .net "wr", 0 0, v0x74b08d220_0; 1 drivers E_0x74ac1b040 .event posedge, v0x102ccebc0_0; S_0x102cd1180 .scope task, "read_byte" "read_byte" 3 174, 3 174 0, S_0x102cc09e0; .timescale -9 -12; v0x74b08c3c0_0 .var "byte_addr", 21 0; v0x74b08c460_0 .var/s "expected", 7 0; E_0x74ac1b080 .event anyedge, v0x74b08c000_0; TD_tb.read_byte ; %wait E_0x74ac1b040; %load/vec4 v0x74b08c3c0_0; %assign/vec4 v0x74b08c640_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x74b08d220_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x74b08d040_0, 0; %wait E_0x74ac1b040; %pushi/vec4 0, 0, 1; %assign/vec4 v0x74b08d040_0, 0; T_0.0 ; %load/vec4 v0x74b08cfa0_0; %cmpi/ne 1, 0, 1; %jmp/0xz T_0.1, 6; %wait E_0x74ac1b080; %jmp T_0.0; T_0.1 ; %load/vec4 v0x74b08cf00_0; %load/vec4 v0x74b08c460_0; %cmp/ne; %jmp/0xz T_0.2, 6; %vpi_call/w 3 195 "$display", "READ BYTE addr=0x%08x FAIL got=0x%02x expected=0x%02x", v0x74b08c3c0_0, v0x74b08cf00_0, v0x74b08c460_0 {0 0 0}; %vpi_call/w 3 202 "$fatal" {0 0 0}; %jmp T_0.3; T_0.2 ; %vpi_call/w 3 206 "$display", "READ BYTE addr=0x%08x data=0x%02x PASS", v0x74b08c3c0_0, v0x74b08cf00_0 {0 0 0}; T_0.3 ; %wait E_0x74ac1b040; %end; S_0x102cd1300 .scope task, "write_byte" "write_byte" 3 138, 3 138 0, S_0x102cc09e0; .timescale -9 -12; v0x74b08c500_0 .var "byte_addr", 21 0; v0x74b08c5a0_0 .var/s "data", 7 0; TD_tb.write_byte ; %wait E_0x74ac1b040; %load/vec4 v0x74b08c500_0; %assign/vec4 v0x74b08c640_0, 0; %load/vec4 v0x74b08c5a0_0; %assign/vec4 v0x74b08d180_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x74b08d220_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x74b08d040_0, 0; %wait E_0x74ac1b040; %pushi/vec4 0, 0, 1; %assign/vec4 v0x74b08d040_0, 0; T_1.4 ; %load/vec4 v0x74b08cfa0_0; %cmpi/ne 1, 0, 1; %jmp/0xz T_1.5, 6; %wait E_0x74ac1b080; %jmp T_1.4; T_1.5 ; %vpi_call/w 3 158 "$display", "WRITE BYTE addr=0x%08x data=0x%02x PASS", v0x74b08c500_0, v0x74b08c5a0_0 {0 0 0}; %wait E_0x74ac1b040; %end; .scope S_0x102cc0b60; T_2 ; %wait E_0x74ac1b040; %load/vec4 v0x74b08c140_0; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0x74b08c1e0_0, 0; %pushi/vec4 0, 0, 22; %assign/vec4 v0x102ccd070_0, 0; %pushi/vec4 0, 0, 8; %assign/vec4 v0x102ccfdc0_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x74b08c000_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x102ccfb40_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x102ccfd20_0, 0; %pushi/vec4 0, 0, 22; %assign/vec4 v0x102ccd820_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v0x102ccfc80_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccf580_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccfbe0_0, 0; %jmp T_2.1; T_2.0 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0x74b08c000_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x102ccfb40_0, 0; %load/vec4 v0x74b08c1e0_0; %dup/vec4; %pushi/vec4 0, 0, 2; %cmp/u; %jmp/1 T_2.2, 6; %dup/vec4; %pushi/vec4 1, 0, 2; %cmp/u; %jmp/1 T_2.3, 6; %pushi/vec4 0, 0, 2; %assign/vec4 v0x74b08c1e0_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x102ccfb40_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccf580_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccfbe0_0, 0; %jmp T_2.5; T_2.2 ; %load/vec4 v0x74b08c0a0_0; %flag_set/vec4 8; %jmp/0xz T_2.6, 8; %load/vec4 v0x102ccb170_0; %assign/vec4 v0x102ccd070_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccfb40_0, 0; %load/vec4 v0x74b08c320_0; %assign/vec4 v0x102ccfd20_0, 0; %load/vec4 v0x102ccb170_0; %ix/load 4, 1, 0; %flag_set/imm 4, 0; %shiftr 4; %assign/vec4 v0x102ccd820_0, 0; %load/vec4 v0x102ccb170_0; %parti/s 1, 0, 2; %cmpi/e 0, 0, 1; %jmp/0xz T_2.8, 4; %pushi/vec4 0, 0, 1; %assign/vec4 v0x102ccf580_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccfbe0_0, 0; %pushi/vec4 0, 0, 8; %load/vec4 v0x74b08c280_0; %concat/vec4; draw_concat_vec4 %assign/vec4 v0x102ccfc80_0, 0; %jmp T_2.9; T_2.8 ; %pushi/vec4 1, 0, 1; %assign/vec4 v0x102ccf580_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0x102ccfbe0_0, 0; %load/vec4 v0x74b08c280_0; %concati/vec4 0, 0, 8; %assign/vec4 v0x102ccfc80_0, 0; T_2.9 ; %pushi/vec4 1, 0, 2; %assign/vec4 v0x74b08c1e0_0, 0; T_2.6 ; %jmp T_2.5; T_2.3 ; %load/vec4 v0x102ccfaa0_0; %flag_set/vec4 8; %jmp/0xz T_2.10, 8; %load/vec4 v0x102ccd070_0; %parti/s 1, 0, 2; %cmpi/e 0, 0, 1; %jmp/0xz T_2.12, 4; %load/vec4 v0x102ccfa00_0; %parti/s 8, 0, 2; %assign/vec4 v0x102ccfdc0_0, 0; %jmp T_2.13; T_2.12 ; %load/vec4 v0x102ccfa00_0; %parti/s 8, 8, 5; %assign/vec4 v0x102ccfdc0_0, 0; T_2.13 ; %pushi/vec4 1, 0, 1; %assign/vec4 v0x74b08c000_0, 0; %pushi/vec4 0, 0, 2; %assign/vec4 v0x74b08c1e0_0, 0; T_2.10 ; %jmp T_2.5; T_2.5 ; %pop/vec4 1; T_2.1 ; %jmp T_2; .thread T_2; .scope S_0x102cc09e0; T_3 ; %pushi/vec4 0, 0, 1; %store/vec4 v0x74b08c6e0_0, 0, 1; T_3.0 ; %delay 6250, 0; %load/vec4 v0x74b08c6e0_0; %inv; %store/vec4 v0x74b08c6e0_0, 0, 1; %jmp T_3.0; T_3.1 ; %end; .thread T_3; .scope S_0x102cc09e0; T_4 ; %vpi_call/w 3 99 "$dumpfile", "sim/int8_memory_access.vcd" {0 0 0}; %vpi_call/w 3 100 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x102cc09e0 {0 0 0}; %end; .thread T_4; .scope S_0x102cc09e0; T_5 ; %wait E_0x74ac1b040; %pushi/vec4 0, 0, 1; %assign/vec4 v0x74b08ce60_0, 0; %load/vec4 v0x74b08caa0_0; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; %load/vec4 v0x74b08cc80_0; %flag_set/vec4 8; %jmp/0xz T_5.2, 8; %load/vec4 v0x74b08c8c0_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_5.4, 8; %load/vec4 v0x74b08cbe0_0; %parti/s 8, 0, 2; %ix/getv 3, v0x74b08c820_0; %ix/load 4, 0, 0; Constant delay %assign/vec4/a/d v0x74b08cd20, 0, 4; T_5.4 ; %load/vec4 v0x74b08cb40_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_5.6, 8; %load/vec4 v0x74b08cbe0_0; %parti/s 8, 8, 5; %ix/getv 3, v0x74b08c820_0; %ix/load 4, 8, 0; part off %ix/load 5, 0, 0; Constant delay %assign/vec4/a/d v0x74b08cd20, 4, 5; T_5.6 ; %jmp T_5.3; T_5.2 ; %ix/getv 4, v0x74b08c820_0; %load/vec4a v0x74b08cd20, 4; %assign/vec4 v0x74b08cdc0_0, 0; T_5.3 ; %pushi/vec4 1, 0, 1; %assign/vec4 v0x74b08ce60_0, 0; T_5.0 ; %jmp T_5; .thread T_5; .scope S_0x102cc09e0; T_6 ; %pushi/vec4 0, 0, 1; %store/vec4 v0x74b08d040_0, 0, 1; %pushi/vec4 0, 0, 1; %store/vec4 v0x74b08d220_0, 0, 1; %pushi/vec4 0, 0, 22; %store/vec4 v0x74b08c640_0, 0, 22; %pushi/vec4 0, 0, 8; %store/vec4 v0x74b08d180_0, 0, 8; %pushi/vec4 0, 0, 16; %store/vec4 v0x74b08cdc0_0, 0, 16; %pushi/vec4 0, 0, 1; %store/vec4 v0x74b08ce60_0, 0, 1; %pushi/vec4 0, 0, 32; %store/vec4 v0x74b08c780_0, 0, 32; T_6.0 ; Top of for-loop %load/vec4 v0x74b08c780_0; %cmpi/s 1024, 0, 32; %jmp/0xz T_6.1, 5; %pushi/vec4 0, 0, 16; %ix/getv/s 4, v0x74b08c780_0; %store/vec4a v0x74b08cd20, 4, 0; T_6.2 ; for-loop step statement %load/vec4 v0x74b08c780_0; %addi 1, 0, 32; %store/vec4 v0x74b08c780_0, 0, 32; %jmp T_6.0; T_6.1 ; for-loop exit label %pushi/vec4 1, 0, 1; %store/vec4 v0x74b08d0e0_0, 0, 1; %pushi/vec4 5, 0, 32; T_6.3 %dup/vec4; %cmpi/s 0, 0, 32; %jmp/1xz T_6.4, 5; %jmp/1 T_6.4, 4; %subi 1, 0, 32; %wait E_0x74ac1b040; %jmp T_6.3; T_6.4 ; %pop/vec4 1; %pushi/vec4 0, 0, 1; %store/vec4 v0x74b08d0e0_0, 0, 1; %vpi_call/w 3 244 "$display", "\000" {0 0 0}; %vpi_call/w 3 245 "$display", "========================================" {0 0 0}; %vpi_call/w 3 246 "$display", "INT8 MEMORY ACCESS TEST" {0 0 0}; %vpi_call/w 3 247 "$display", "========================================" {0 0 0}; %vpi_call/w 3 248 "$display", "\000" {0 0 0}; %pushi/vec4 0, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 18, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 1, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 52, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 2, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 86, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 3, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 120, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 0, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 18, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %pushi/vec4 1, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 52, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %pushi/vec4 2, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 86, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %pushi/vec4 3, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 120, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %ix/load 4, 0, 0; %flag_set/imm 4, 0; %load/vec4a v0x74b08cd20, 4; %cmpi/ne 13330, 0, 16; %jmp/0xz T_6.5, 6; %vpi_call/w 3 276 "$display", "PACKING ERROR word[0]=0x%04x expected=0x3412", &A {0 0 0}; %vpi_call/w 3 281 "$fatal" {0 0 0}; %jmp T_6.6; T_6.5 ; %vpi_call/w 3 285 "$display", "PACKING word[0] = 0x%04x PASS", &A {0 0 0}; T_6.6 ; %ix/load 4, 1, 0; %flag_set/imm 4, 0; %load/vec4a v0x74b08cd20, 4; %cmpi/ne 30806, 0, 16; %jmp/0xz T_6.7, 6; %vpi_call/w 3 294 "$display", "PACKING ERROR word[1]=0x%04x expected=0x7856", &A {0 0 0}; %vpi_call/w 3 299 "$fatal" {0 0 0}; %jmp T_6.8; T_6.7 ; %vpi_call/w 3 303 "$display", "PACKING word[1] = 0x%04x PASS", &A {0 0 0}; T_6.8 ; %pushi/vec4 16, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 52, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 17, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 18, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %ix/load 4, 8, 0; %flag_set/imm 4, 0; %load/vec4a v0x74b08cd20, 4; %cmpi/ne 4660, 0, 16; %jmp/0xz T_6.9, 6; %vpi_call/w 3 320 "$display", "INITIAL WORD ERROR = 0x%04x", &A {0 0 0}; %vpi_call/w 3 325 "$fatal" {0 0 0}; T_6.9 ; %pushi/vec4 16, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 170, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %ix/load 4, 8, 0; %flag_set/imm 4, 0; %load/vec4a v0x74b08cd20, 4; %cmpi/ne 4778, 0, 16; %jmp/0xz T_6.11, 6; %vpi_call/w 3 336 "$display", "LOW BYTE PRESERVE ERROR = 0x%04x expected=0x12AA", &A {0 0 0}; %vpi_call/w 3 341 "$fatal" {0 0 0}; %jmp T_6.12; T_6.11 ; %vpi_call/w 3 345 "$display", "LOW BYTE PRESERVE 0x1234 -> 0x12AA PASS" {0 0 0}; T_6.12 ; %pushi/vec4 17, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 187, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %ix/load 4, 8, 0; %flag_set/imm 4, 0; %load/vec4a v0x74b08cd20, 4; %cmpi/ne 48042, 0, 16; %jmp/0xz T_6.13, 6; %vpi_call/w 3 358 "$display", "HIGH BYTE PRESERVE ERROR = 0x%04x expected=0xBBAA", &A {0 0 0}; %vpi_call/w 3 363 "$fatal" {0 0 0}; %jmp T_6.14; T_6.13 ; %vpi_call/w 3 367 "$display", "HIGH BYTE PRESERVE 0x12AA -> 0xBBAA PASS" {0 0 0}; T_6.14 ; %pushi/vec4 32, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 255, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 33, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 128, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 34, 0, 22; %store/vec4 v0x74b08c500_0, 0, 22; %pushi/vec4 127, 0, 8; %store/vec4 v0x74b08c5a0_0, 0, 8; %fork TD_tb.write_byte, S_0x102cd1300; %join; %pushi/vec4 32, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 255, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %pushi/vec4 33, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 128, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %pushi/vec4 34, 0, 22; %store/vec4 v0x74b08c3c0_0, 0, 22; %pushi/vec4 127, 0, 8; %store/vec4 v0x74b08c460_0, 0, 8; %fork TD_tb.read_byte, S_0x102cd1180; %join; %vpi_call/w 3 389 "$display", "\000" {0 0 0}; %vpi_call/w 3 390 "$display", "========================================" {0 0 0}; %vpi_call/w 3 391 "$display", "INT8 MEMORY ACCESS TEST PASSED" {0 0 0}; %vpi_call/w 3 392 "$display", "BYTE ADDRESSING : PASS" {0 0 0}; %vpi_call/w 3 393 "$display", "LOW BYTE : PASS" {0 0 0}; %vpi_call/w 3 394 "$display", "HIGH BYTE : PASS" {0 0 0}; %vpi_call/w 3 395 "$display", "INT8 PACKING : PASS" {0 0 0}; %vpi_call/w 3 396 "$display", "BYTE PRESERVATION : PASS" {0 0 0}; %vpi_call/w 3 397 "$display", "SIGNED INT8 : PASS" {0 0 0}; %vpi_call/w 3 398 "$display", "========================================" {0 0 0}; %vpi_call/w 3 399 "$display", "\000" {0 0 0}; %vpi_call/w 3 401 "$finish" {0 0 0}; %end; .thread T_6; # The file index is used to find the file name in the following table. :file_names 5; "N/A"; ""; "-"; "sim/int8_memory_access_tb.v"; "rtl/int8_memory_access.v";