# V2 timing log -- solo append, mai troncato/sovrascritto (vedi README.md) # Nessuna entry ancora -- popolato incrementalmente man mano che avanza lo sviluppo V2. [2026-09-05] EXP-0001 -- neural_processor (P_IN=8, ACC_WIDTH=32) nextpnr-ecp5 --45k --package CABGA381 --speed 8 --freq 80 --lpf-allow-unconstrained Fmax: 183.12 MHz -- PASS at 80 MHz (real place&route measurement) Critical path: job_ready -> TRELLIS_IO output pad (i.e. the design's own logic is NOT the bottleneck at this Fmax -- an unconstrained output pin dominates; a real system-level Fmax will differ once this signal is consumed on-chip instead of driven to a pad in isolation). Log: hardware/v2/synthesis/neural_processor_p8/nextpnr.log WNS/TNS: not reported by this nextpnr version in this invocation. [2026-09-05] EXP-0002 -- neural_processor (P_IN=8, ACC_WIDTH=24) Same command as above, ACC_WIDTH=24 build. Fmax: 176.21 MHz -- PASS at 80 MHz (real place&route measurement) Delta vs ACC_WIDTH=32: -6.91 MHz (-3.8%) despite FEWER resources -- attributed to placement noise, not a real architectural effect (no seed sweep run to confirm either way -- see experiments.log EXP-0002 and benchmark.log). Log: hardware/v2/synthesis/ neural_processor_p8_acc24/nextpnr.log [2026-09-05] EXP-0003 -- N_PROCESSORS sweep (P_IN=8), real nextpnr-ecp5 --45k --package CABGA381 --speed 8 --freq 80 --lpf-allow-unconstrained N=1: Fmax=159.11 MHz PASS MULT18X18D 8/72 (11%) N=2: Fmax=149.59 MHz PASS MULT18X18D 16/72 (22%) N=4: Fmax=151.01 MHz PASS MULT18X18D 32/72 (44%) N=8: Fmax=134.70 MHz PASS MULT18X18D 64/72 (88%) TRELLIS_IO stays at 18/245 (7%) throughout (harness has only clk/rst/seed/checksum as real pins, by design -- see ERR-0005). See decisions.log DEC-0005: DSP, not Fmax or LUT/FF, is the resource that will first prevent scaling N_PROCESSORS further at P_IN=8. [2026-09-05] EXP-0004 -- default-depth buffer configs, real nextpnr-ecp5 activation_buffer (D=4096): Fmax=325.20 MHz PASS weight_buffer (D=512): Fmax=339.67 MHz PASS result_buffer (D=4096): Fmax=325.20 MHz PASS All far above the 80MHz target -- buffers are not a timing concern in isolation at these depths. [2026-09-05] EXP-0005 -- memory_manager + prefetch_engine (via harness_memory_manager.v, see errors.log ERR-0005 for why a harness was needed), real nextpnr-ecp5 --45k --package CABGA381 --speed 8 --freq 80 --lpf-allow-unconstrained Fmax: 165.86 MHz -- PASS at 80MHz (real place&route measurement)