#! /opt/homebrew/Cellar/icarus-verilog/13.0/bin/vvp :ivl_version "13.0 (stable)" "(v13_0)"; :ivl_delay_selection "TYPICAL"; :vpi_time_precision - 12; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/system.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_sys.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/vhdl_textio.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2005_math.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/va_math.vpi"; :vpi_module "/opt/homebrew/Cellar/icarus-verilog/13.0/lib/ivl/v2009.vpi"; S_0x1015ce110 .scope package, "$unit" "$unit" 2 1; .timescale 0 0; S_0x1015cf250 .scope module, "tb" "tb" 3 3; .timescale -9 -12; P_0x1015cec90 .param/l "ACC_WIDTH" 0 3 10, +C4<00000000000000000000000000101000>; P_0x1015cecd0 .param/l "DATA_WIDTH" 0 3 5, +C4<00000000000000000000000000010000>; P_0x1015ced10 .param/l "FRAC_BITS" 0 3 6, +C4<00000000000000000000000000001000>; P_0x1015ced50 .param/l "N_INPUTS" 0 3 7, +C4<00000000000000000000000000100000>; P_0x1015ced90 .param/l "N_NEURONS" 0 3 8, +C4<00000000000000000000000000000100>; P_0x1015cedd0 .param/l "PARALLEL" 0 3 9, +C4<00000000000000000000000000001000>; v0xa571545a0_0 .var/s "bias_bus", 63 0; v0xa57154640_0 .net "busy", 0 0, L_0xa56ce0b40; 1 drivers v0xa571546e0_0 .var "clk", 0 0; v0xa57154780_0 .net "done", 0 0, L_0xa56ce0be0; 1 drivers v0xa57154820_0 .var/i "errors", 31 0; v0xa571548c0_0 .var/i "expected", 31 0; v0xa57154960_0 .var/i "i", 31 0; v0xa57154a00_0 .var "rst", 0 0; v0xa57154aa0_0 .var "start", 0 0; v0xa57154b40_0 .var/s "weights_bus", 2047 0; v0xa57154be0_0 .var/s "x_bus", 511 0; v0xa57154c80_0 .net/s "y_bus", 63 0, L_0xa5715b3e0; 1 drivers S_0x1015ce6d0 .scope module, "dut" "layer" 3 42, 4 1 0, S_0x1015cf250; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "rst"; .port_info 2 /INPUT 1 "start"; .port_info 3 /INPUT 512 "x_bus"; .port_info 4 /INPUT 2048 "weights_bus"; .port_info 5 /INPUT 64 "bias_bus"; .port_info 6 /OUTPUT 64 "y_bus"; .port_info 7 /OUTPUT 1 "busy"; .port_info 8 /OUTPUT 1 "done"; P_0x1015c67a0 .param/l "ACC_WIDTH" 0 4 7, +C4<00000000000000000000000000101000>; P_0x1015c67e0 .param/l "DATA_WIDTH" 0 4 2, +C4<00000000000000000000000000010000>; P_0x1015c6820 .param/l "FRAC_BITS" 0 4 3, +C4<00000000000000000000000000001000>; P_0x1015c6860 .param/l "N_INPUTS" 0 4 4, +C4<00000000000000000000000000100000>; P_0x1015c68a0 .param/l "N_NEURONS" 0 4 5, +C4<00000000000000000000000000000100>; P_0x1015c68e0 .param/l "PARALLEL" 0 4 6, +C4<00000000000000000000000000001000>; v0xa57153d40_0 .net/s "bias_bus", 63 0, v0xa571545a0_0; 1 drivers v0xa57153de0_0 .net "busy", 0 0, L_0xa56ce0b40; alias, 1 drivers v0xa57153e80_0 .net "clk", 0 0, v0xa571546e0_0; 1 drivers v0xa57153f20_0 .net "done", 0 0, L_0xa56ce0be0; alias, 1 drivers v0xa57154000_0 .net "neuron_busy", 3 0, L_0xa5715b480; 1 drivers v0xa571540a0_0 .net "neuron_done", 3 0, L_0xa5715b520; 1 drivers v0xa57154140_0 .net "rst", 0 0, v0xa57154a00_0; 1 drivers v0xa571541e0_0 .net "start", 0 0, v0xa57154aa0_0; 1 drivers v0xa57154280_0 .net/s "weights_bus", 2047 0, v0xa57154b40_0; 1 drivers v0xa57154320_0 .net/s "x_bus", 511 0, v0xa57154be0_0; 1 drivers v0xa571543c0_0 .net/s "y_bus", 63 0, L_0xa5715b3e0; alias, 1 drivers L_0xa56c60000 .part v0xa57154b40_0, 0, 512; L_0xa56c600a0 .part v0xa571545a0_0, 0, 16; L_0xa56cd5680 .part v0xa57154b40_0, 512, 512; L_0xa56cd5720 .part v0xa571545a0_0, 16, 16; L_0xa56cd7020 .part v0xa57154b40_0, 1024, 512; L_0xa56cd70c0 .part v0xa571545a0_0, 32, 16; L_0xa56ce0a00 .part v0xa57154b40_0, 1536, 512; L_0xa56ce0aa0 .part v0xa571545a0_0, 48, 16; L_0xa5715b3e0 .concat8 [ 16 16 16 16], v0xa57141540_0, v0xa57146260_0, v0xa5714ef80_0, v0xa57153ca0_0; L_0xa5715b480 .concat8 [ 1 1 1 1], v0xa57140dc0_0, v0xa57145ae0_0, v0xa5714e800_0, v0xa57153520_0; L_0xa5715b520 .concat8 [ 1 1 1 1], v0xa57140f00_0, v0xa57145c20_0, v0xa5714e940_0, v0xa57153660_0; L_0xa56ce0b40 .reduce/or L_0xa5715b480; L_0xa56ce0be0 .reduce/and L_0xa5715b520; S_0x1015c6920 .scope generate, "GEN_NEURON[0]" "GEN_NEURON[0]" 4 35, 4 35 0, S_0x1015ce6d0; .timescale 0 0; P_0xa56c06580 .param/l "n" 1 4 35, +C4<00>; S_0x1015c1ae0 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0x1015c6920; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "rst"; .port_info 2 /INPUT 1 "start"; .port_info 3 /INPUT 512 "x_bus"; .port_info 4 /INPUT 512 "w_bus"; .port_info 5 /INPUT 16 "bias"; .port_info 6 /OUTPUT 16 "y"; .port_info 7 /OUTPUT 1 "busy"; .port_info 8 /OUTPUT 1 "done"; P_0x1015c1c60 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>; P_0x1015c1ca0 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>; P_0x1015c1ce0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>; P_0x1015c1d20 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000100>; P_0x1015c1d60 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000010>; P_0x1015c1da0 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>; P_0x1015c1de0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>; L_0x1015cdeb0 .functor BUFZ 16, L_0xa56c600a0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>; v0xa570cbf20_0 .net *"_ivl_0", 31 0, L_0xa57154d20; 1 drivers v0xa57140000_0 .net *"_ivl_11", 31 0, L_0xa57154e60; 1 drivers v0xa571400a0_0 .net *"_ivl_14", 31 0, L_0xa57154f00; 1 drivers L_0xa568540e8 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57140140_0 .net *"_ivl_17", 29 0, L_0xa568540e8; 1 drivers L_0xa56854130 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa571401e0_0 .net/2u *"_ivl_18", 31 0, L_0xa56854130; 1 drivers v0xa57140280_0 .net *"_ivl_21", 31 0, L_0xa57154fa0; 1 drivers L_0xa56854178 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa57140320_0 .net/2u *"_ivl_22", 31 0, L_0xa56854178; 1 drivers v0xa571403c0_0 .net *"_ivl_25", 31 0, L_0xa57155040; 1 drivers L_0xa56854010 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57140460_0 .net *"_ivl_3", 29 0, L_0xa56854010; 1 drivers v0xa57140500_0 .net *"_ivl_31", 0 0, L_0xa56c93d40; 1 drivers v0xa571405a0_0 .net *"_ivl_33", 23 0, L_0xa56c93de0; 1 drivers v0xa57140640_0 .net *"_ivl_36", 39 0, L_0xa57156580; 1 drivers v0xa571406e0_0 .net *"_ivl_38", 31 0, L_0xa56c93e80; 1 drivers L_0xa56854058 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa57140780_0 .net/2u *"_ivl_4", 31 0, L_0xa56854058; 1 drivers L_0xa56854400 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>; v0xa57140820_0 .net *"_ivl_40", 7 0, L_0xa56854400; 1 drivers v0xa571408c0_0 .net *"_ivl_46", 31 0, L_0xa56c93f20; 1 drivers v0xa57140960_0 .net *"_ivl_7", 31 0, L_0xa57154dc0; 1 drivers L_0xa568540a0 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa57140a00_0 .net/2u *"_ivl_8", 31 0, L_0xa568540a0; 1 drivers v0xa57140aa0_0 .var/s "acc", 39 0; v0xa57140b40_0 .net/s "acc_next", 39 0, L_0xa56c5b200; 1 drivers v0xa57140be0_0 .net/s "bias", 15 0, L_0xa56c600a0; 1 drivers v0xa57140c80_0 .net/s "bias_ext", 39 0, L_0xa571564e0; 1 drivers v0xa57140d20_0 .net/s "bias_ext_small", 15 0, L_0x1015cdeb0; 1 drivers v0xa57140dc0_0 .var "busy", 0 0; v0xa57140e60_0 .net "clk", 0 0, v0xa571546e0_0; alias, 1 drivers v0xa57140f00_0 .var "done", 0 0; v0xa57140fa0_0 .net/s "final_acc", 39 0, L_0xa56c5b2a0; 1 drivers v0xa57141040_0 .net/s "final_value", 39 0, L_0xa57156620; 1 drivers v0xa571410e0_0 .var "group_index", 1 0; v0xa57141180_0 .net "rst", 0 0, v0xa57154a00_0; alias, 1 drivers v0xa57141220_0 .net "start", 0 0, v0xa57154aa0_0; alias, 1 drivers v0xa571412c0_0 .net/s "w_bus", 511 0, L_0xa56c60000; 1 drivers v0xa57141360_0 .net/s "w_group", 127 0, L_0xa56c924e0; 1 drivers v0xa57141400_0 .net/s "x_bus", 511 0, v0xa57154be0_0; alias, 1 drivers v0xa571414a0_0 .net/s "x_group", 127 0, L_0xa56c92800; 1 drivers v0xa57141540_0 .var/s "y", 15 0; E_0xa56ca2580 .event posedge, v0xa57140e60_0; L_0xa57154d20 .concat [ 2 30 0 0], v0xa571410e0_0, L_0xa56854010; L_0xa57154dc0 .arith/mult 32, L_0xa57154d20, L_0xa56854058; L_0xa57154e60 .arith/mult 32, L_0xa57154dc0, L_0xa568540a0; L_0xa56c92800 .part/v v0xa57154be0_0, L_0xa57154e60, 128; L_0xa57154f00 .concat [ 2 30 0 0], v0xa571410e0_0, L_0xa568540e8; L_0xa57154fa0 .arith/mult 32, L_0xa57154f00, L_0xa56854130; L_0xa57155040 .arith/mult 32, L_0xa57154fa0, L_0xa56854178; L_0xa56c924e0 .part/v L_0xa56c60000, L_0xa57155040, 128; L_0xa56c93d40 .part L_0x1015cdeb0, 15, 1; L_0xa56c93de0 .repeat 24, 24, L_0xa56c93d40; L_0xa571564e0 .concat [ 16 24 0 0], L_0x1015cdeb0, L_0xa56c93de0; L_0xa56c93e80 .part L_0xa571564e0, 0, 32; L_0xa57156580 .concat [ 8 32 0 0], L_0xa56854400, L_0xa56c93e80; L_0xa56c5b2a0 .arith/sum 40, L_0xa56c5b200, L_0xa57156580; L_0xa56c93f20 .part L_0xa56c5b2a0, 8, 32; L_0xa57156620 .extend/s 40, L_0xa56c93f20; S_0x1015ba950 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0x1015c1ae0; .timescale 0 0; .port_info 0 /INPUT 128 "x_bus"; .port_info 1 /INPUT 128 "w_bus"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0x1015ce850 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>; P_0x1015ce890 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>; P_0x1015ce8d0 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>; v0xa570cbac0_0 .net/s "acc_in", 39 0, v0xa57140aa0_0; 1 drivers v0xa570cbb60_0 .net/s "acc_out", 39 0, L_0xa56c5b200; alias, 1 drivers v0xa570cbc00_0 .var/i "j", 31 0; v0xa570cbca0 .array "products", 7 0; v0xa570cbca0_0 .net/s v0xa570cbca0 0, 39 0, L_0xa56c5aee0; 1 drivers v0xa570cbca0_1 .net/s v0xa570cbca0 1, 39 0, L_0xa56c5af80; 1 drivers v0xa570cbca0_2 .net/s v0xa570cbca0 2, 39 0, L_0xa56c5ad00; 1 drivers v0xa570cbca0_3 .net/s v0xa570cbca0 3, 39 0, L_0xa56c5ada0; 1 drivers v0xa570cbca0_4 .net/s v0xa570cbca0 4, 39 0, L_0xa56c5ae40; 1 drivers v0xa570cbca0_5 .net/s v0xa570cbca0 5, 39 0, L_0xa56c5b020; 1 drivers v0xa570cbca0_6 .net/s v0xa570cbca0 6, 39 0, L_0xa56c5b0c0; 1 drivers v0xa570cbca0_7 .net/s v0xa570cbca0 7, 39 0, L_0xa56c5b160; 1 drivers v0xa570cbd40_0 .var/s "sum", 39 0; v0xa570cbde0_0 .net/s "w_bus", 127 0, L_0xa56c924e0; alias, 1 drivers v0xa570cbe80_0 .net/s "x_bus", 127 0, L_0xa56c92800; alias, 1 drivers E_0xa56ca25c0/0 .event anyedge, v0xa570cbd40_0, v0xa570c8be0_0, v0xa570c9220_0, v0xa570c9860_0; E_0xa56ca25c0/1 .event anyedge, v0xa570c9ea0_0, v0xa570ca4e0_0, v0xa570cab20_0, v0xa570cb160_0; E_0xa56ca25c0/2 .event anyedge, v0xa570cb7a0_0; E_0xa56ca25c0 .event/or E_0xa56ca25c0/0, E_0xa56ca25c0/1, E_0xa56ca25c0/2; L_0xa56c929e0 .part L_0xa56c92800, 0, 16; L_0xa56c92a80 .part L_0xa56c924e0, 0, 16; L_0xa56c92c60 .part L_0xa56c92800, 16, 16; L_0xa56c92d00 .part L_0xa56c924e0, 16, 16; L_0xa56c92ee0 .part L_0xa56c92800, 32, 16; L_0xa56c92f80 .part L_0xa56c924e0, 32, 16; L_0xa56c93160 .part L_0xa56c92800, 48, 16; L_0xa56c93200 .part L_0xa56c924e0, 48, 16; L_0xa56c933e0 .part L_0xa56c92800, 64, 16; L_0xa56c93480 .part L_0xa56c924e0, 64, 16; L_0xa56c93660 .part L_0xa56c92800, 80, 16; L_0xa56c93700 .part L_0xa56c924e0, 80, 16; L_0xa56c938e0 .part L_0xa56c92800, 96, 16; L_0xa56c93980 .part L_0xa56c924e0, 96, 16; L_0xa56c93b60 .part L_0xa56c92800, 112, 16; L_0xa56c93c00 .part L_0xa56c924e0, 112, 16; L_0xa56c5b200 .arith/sum 40, v0xa57140aa0_0, v0xa570cbd40_0; S_0x1015baad0 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c065c0 .param/l "i" 1 6 17, +C4<00>; S_0x1015be270 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x1015baad0; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0x1015cee10 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0x1015cee50 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0x1015cee90 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570c88c0_0 .net/s *"_ivl_0", 31 0, L_0xa571550e0; 1 drivers v0xa570c8960_0 .net/s *"_ivl_2", 31 0, L_0xa57155180; 1 drivers v0xa570c8a00_0 .net *"_ivl_7", 0 0, L_0xa56c928a0; 1 drivers v0xa570c8aa0_0 .net *"_ivl_9", 7 0, L_0xa56c92940; 1 drivers L_0xa568541c0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570c8b40_0 .net/s "acc_in", 39 0, L_0xa568541c0; 1 drivers v0xa570c8be0_0 .net/s "acc_out", 39 0, L_0xa56c5aee0; alias, 1 drivers v0xa570c8c80_0 .net/s "product", 31 0, L_0xa57155220; 1 drivers v0xa570c8d20_0 .net/s "product_ext", 39 0, L_0xa571552c0; 1 drivers v0xa570c8dc0_0 .net/s "w", 15 0, L_0xa56c92a80; 1 drivers v0xa570c8e60_0 .net/s "x", 15 0, L_0xa56c929e0; 1 drivers L_0xa571550e0 .extend/s 32, L_0xa56c929e0; L_0xa57155180 .extend/s 32, L_0xa56c92a80; L_0xa57155220 .arith/mult 32, L_0xa571550e0, L_0xa57155180; L_0xa56c928a0 .part L_0xa57155220, 31, 1; L_0xa56c92940 .repeat 8, 8, L_0xa56c928a0; L_0xa571552c0 .concat [ 32 8 0 0], L_0xa57155220, L_0xa56c92940; L_0xa56c5aee0 .arith/sum 40, L_0xa568541c0, L_0xa571552c0; S_0x1015be3f0 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c06600 .param/l "i" 1 6 17, +C4<01>; S_0x1015c55a0 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0x1015be3f0; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0x1015cf3d0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0x1015cf410 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0x1015cf450 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570c8f00_0 .net/s *"_ivl_0", 31 0, L_0xa57155360; 1 drivers v0xa570c8fa0_0 .net/s *"_ivl_2", 31 0, L_0xa57155400; 1 drivers v0xa570c9040_0 .net *"_ivl_7", 0 0, L_0xa56c92b20; 1 drivers v0xa570c90e0_0 .net *"_ivl_9", 7 0, L_0xa56c92bc0; 1 drivers L_0xa56854208 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570c9180_0 .net/s "acc_in", 39 0, L_0xa56854208; 1 drivers v0xa570c9220_0 .net/s "acc_out", 39 0, L_0xa56c5af80; alias, 1 drivers v0xa570c92c0_0 .net/s "product", 31 0, L_0xa571554a0; 1 drivers v0xa570c9360_0 .net/s "product_ext", 39 0, L_0xa57155540; 1 drivers v0xa570c9400_0 .net/s "w", 15 0, L_0xa56c92d00; 1 drivers v0xa570c94a0_0 .net/s "x", 15 0, L_0xa56c92c60; 1 drivers L_0xa57155360 .extend/s 32, L_0xa56c92c60; L_0xa57155400 .extend/s 32, L_0xa56c92d00; L_0xa571554a0 .arith/mult 32, L_0xa57155360, L_0xa57155400; L_0xa56c92b20 .part L_0xa571554a0, 31, 1; L_0xa56c92bc0 .repeat 8, 8, L_0xa56c92b20; L_0xa57155540 .concat [ 32 8 0 0], L_0xa571554a0, L_0xa56c92bc0; L_0xa56c5af80 .arith/sum 40, L_0xa56854208, L_0xa57155540; S_0xa5713c000 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c06640 .param/l "i" 1 6 17, +C4<010>; S_0xa5713c180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713c000; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0x1015ce290 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0x1015ce2d0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0x1015ce310 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570c9540_0 .net/s *"_ivl_0", 31 0, L_0xa571555e0; 1 drivers v0xa570c95e0_0 .net/s *"_ivl_2", 31 0, L_0xa57155680; 1 drivers v0xa570c9680_0 .net *"_ivl_7", 0 0, L_0xa56c92da0; 1 drivers v0xa570c9720_0 .net *"_ivl_9", 7 0, L_0xa56c92e40; 1 drivers L_0xa56854250 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570c97c0_0 .net/s "acc_in", 39 0, L_0xa56854250; 1 drivers v0xa570c9860_0 .net/s "acc_out", 39 0, L_0xa56c5ad00; alias, 1 drivers v0xa570c9900_0 .net/s "product", 31 0, L_0xa57155720; 1 drivers v0xa570c99a0_0 .net/s "product_ext", 39 0, L_0xa571557c0; 1 drivers v0xa570c9a40_0 .net/s "w", 15 0, L_0xa56c92f80; 1 drivers v0xa570c9ae0_0 .net/s "x", 15 0, L_0xa56c92ee0; 1 drivers L_0xa571555e0 .extend/s 32, L_0xa56c92ee0; L_0xa57155680 .extend/s 32, L_0xa56c92f80; L_0xa57155720 .arith/mult 32, L_0xa571555e0, L_0xa57155680; L_0xa56c92da0 .part L_0xa57155720, 31, 1; L_0xa56c92e40 .repeat 8, 8, L_0xa56c92da0; L_0xa571557c0 .concat [ 32 8 0 0], L_0xa57155720, L_0xa56c92e40; L_0xa56c5ad00 .arith/sum 40, L_0xa56854250, L_0xa571557c0; S_0xa5713c300 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c06680 .param/l "i" 1 6 17, +C4<011>; S_0xa5713c480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713c300; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0x1015cceb0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0x1015ccef0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0x1015ccf30 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570c9b80_0 .net/s *"_ivl_0", 31 0, L_0xa57155860; 1 drivers v0xa570c9c20_0 .net/s *"_ivl_2", 31 0, L_0xa57155900; 1 drivers v0xa570c9cc0_0 .net *"_ivl_7", 0 0, L_0xa56c93020; 1 drivers v0xa570c9d60_0 .net *"_ivl_9", 7 0, L_0xa56c930c0; 1 drivers L_0xa56854298 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570c9e00_0 .net/s "acc_in", 39 0, L_0xa56854298; 1 drivers v0xa570c9ea0_0 .net/s "acc_out", 39 0, L_0xa56c5ada0; alias, 1 drivers v0xa570c9f40_0 .net/s "product", 31 0, L_0xa571559a0; 1 drivers v0xa570c9fe0_0 .net/s "product_ext", 39 0, L_0xa57155a40; 1 drivers v0xa570ca080_0 .net/s "w", 15 0, L_0xa56c93200; 1 drivers v0xa570ca120_0 .net/s "x", 15 0, L_0xa56c93160; 1 drivers L_0xa57155860 .extend/s 32, L_0xa56c93160; L_0xa57155900 .extend/s 32, L_0xa56c93200; L_0xa571559a0 .arith/mult 32, L_0xa57155860, L_0xa57155900; L_0xa56c93020 .part L_0xa571559a0, 31, 1; L_0xa56c930c0 .repeat 8, 8, L_0xa56c93020; L_0xa57155a40 .concat [ 32 8 0 0], L_0xa571559a0, L_0xa56c930c0; L_0xa56c5ada0 .arith/sum 40, L_0xa56854298, L_0xa57155a40; S_0xa5713c600 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c066c0 .param/l "i" 1 6 17, +C4<0100>; S_0xa5713c780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713c600; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0x1015cddf0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0x1015cde30 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0x1015cde70 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570ca1c0_0 .net/s *"_ivl_0", 31 0, L_0xa57155ae0; 1 drivers v0xa570ca260_0 .net/s *"_ivl_2", 31 0, L_0xa57155b80; 1 drivers v0xa570ca300_0 .net *"_ivl_7", 0 0, L_0xa56c932a0; 1 drivers v0xa570ca3a0_0 .net *"_ivl_9", 7 0, L_0xa56c93340; 1 drivers L_0xa568542e0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570ca440_0 .net/s "acc_in", 39 0, L_0xa568542e0; 1 drivers v0xa570ca4e0_0 .net/s "acc_out", 39 0, L_0xa56c5ae40; alias, 1 drivers v0xa570ca580_0 .net/s "product", 31 0, L_0xa57155c20; 1 drivers v0xa570ca620_0 .net/s "product_ext", 39 0, L_0xa57155cc0; 1 drivers v0xa570ca6c0_0 .net/s "w", 15 0, L_0xa56c93480; 1 drivers v0xa570ca760_0 .net/s "x", 15 0, L_0xa56c933e0; 1 drivers L_0xa57155ae0 .extend/s 32, L_0xa56c933e0; L_0xa57155b80 .extend/s 32, L_0xa56c93480; L_0xa57155c20 .arith/mult 32, L_0xa57155ae0, L_0xa57155b80; L_0xa56c932a0 .part L_0xa57155c20, 31, 1; L_0xa56c93340 .repeat 8, 8, L_0xa56c932a0; L_0xa57155cc0 .concat [ 32 8 0 0], L_0xa57155c20, L_0xa56c93340; L_0xa56c5ae40 .arith/sum 40, L_0xa568542e0, L_0xa57155cc0; S_0xa5713c900 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c06700 .param/l "i" 1 6 17, +C4<0101>; S_0xa5713ca80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713c900; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8000 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8040 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8080 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570ca800_0 .net/s *"_ivl_0", 31 0, L_0xa57155d60; 1 drivers v0xa570ca8a0_0 .net/s *"_ivl_2", 31 0, L_0xa57155e00; 1 drivers v0xa570ca940_0 .net *"_ivl_7", 0 0, L_0xa56c93520; 1 drivers v0xa570ca9e0_0 .net *"_ivl_9", 7 0, L_0xa56c935c0; 1 drivers L_0xa56854328 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570caa80_0 .net/s "acc_in", 39 0, L_0xa56854328; 1 drivers v0xa570cab20_0 .net/s "acc_out", 39 0, L_0xa56c5b020; alias, 1 drivers v0xa570cabc0_0 .net/s "product", 31 0, L_0xa57155ea0; 1 drivers v0xa570cac60_0 .net/s "product_ext", 39 0, L_0xa57155f40; 1 drivers v0xa570cad00_0 .net/s "w", 15 0, L_0xa56c93700; 1 drivers v0xa570cada0_0 .net/s "x", 15 0, L_0xa56c93660; 1 drivers L_0xa57155d60 .extend/s 32, L_0xa56c93660; L_0xa57155e00 .extend/s 32, L_0xa56c93700; L_0xa57155ea0 .arith/mult 32, L_0xa57155d60, L_0xa57155e00; L_0xa56c93520 .part L_0xa57155ea0, 31, 1; L_0xa56c935c0 .repeat 8, 8, L_0xa56c93520; L_0xa57155f40 .concat [ 32 8 0 0], L_0xa57155ea0, L_0xa56c935c0; L_0xa56c5b020 .arith/sum 40, L_0xa56854328, L_0xa57155f40; S_0xa5713cc00 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c06740 .param/l "i" 1 6 17, +C4<0110>; S_0xa5713cd80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713cc00; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc80c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8100 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8140 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570cae40_0 .net/s *"_ivl_0", 31 0, L_0xa57155fe0; 1 drivers v0xa570caee0_0 .net/s *"_ivl_2", 31 0, L_0xa57156080; 1 drivers v0xa570caf80_0 .net *"_ivl_7", 0 0, L_0xa56c937a0; 1 drivers v0xa570cb020_0 .net *"_ivl_9", 7 0, L_0xa56c93840; 1 drivers L_0xa56854370 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570cb0c0_0 .net/s "acc_in", 39 0, L_0xa56854370; 1 drivers v0xa570cb160_0 .net/s "acc_out", 39 0, L_0xa56c5b0c0; alias, 1 drivers v0xa570cb200_0 .net/s "product", 31 0, L_0xa57156120; 1 drivers v0xa570cb2a0_0 .net/s "product_ext", 39 0, L_0xa571561c0; 1 drivers v0xa570cb340_0 .net/s "w", 15 0, L_0xa56c93980; 1 drivers v0xa570cb3e0_0 .net/s "x", 15 0, L_0xa56c938e0; 1 drivers L_0xa57155fe0 .extend/s 32, L_0xa56c938e0; L_0xa57156080 .extend/s 32, L_0xa56c93980; L_0xa57156120 .arith/mult 32, L_0xa57155fe0, L_0xa57156080; L_0xa56c937a0 .part L_0xa57156120, 31, 1; L_0xa56c93840 .repeat 8, 8, L_0xa56c937a0; L_0xa571561c0 .concat [ 32 8 0 0], L_0xa57156120, L_0xa56c93840; L_0xa56c5b0c0 .arith/sum 40, L_0xa56854370, L_0xa571561c0; S_0xa5713cf00 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0x1015ba950; .timescale 0 0; P_0xa56c06780 .param/l "i" 1 6 17, +C4<0111>; S_0xa5713d080 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713cf00; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8180 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc81c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8200 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa570cb480_0 .net/s *"_ivl_0", 31 0, L_0xa57156260; 1 drivers v0xa570cb520_0 .net/s *"_ivl_2", 31 0, L_0xa57156300; 1 drivers v0xa570cb5c0_0 .net *"_ivl_7", 0 0, L_0xa56c93a20; 1 drivers v0xa570cb660_0 .net *"_ivl_9", 7 0, L_0xa56c93ac0; 1 drivers L_0xa568543b8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa570cb700_0 .net/s "acc_in", 39 0, L_0xa568543b8; 1 drivers v0xa570cb7a0_0 .net/s "acc_out", 39 0, L_0xa56c5b160; alias, 1 drivers v0xa570cb840_0 .net/s "product", 31 0, L_0xa571563a0; 1 drivers v0xa570cb8e0_0 .net/s "product_ext", 39 0, L_0xa57156440; 1 drivers v0xa570cb980_0 .net/s "w", 15 0, L_0xa56c93c00; 1 drivers v0xa570cba20_0 .net/s "x", 15 0, L_0xa56c93b60; 1 drivers L_0xa57156260 .extend/s 32, L_0xa56c93b60; L_0xa57156300 .extend/s 32, L_0xa56c93c00; L_0xa571563a0 .arith/mult 32, L_0xa57156260, L_0xa57156300; L_0xa56c93a20 .part L_0xa571563a0, 31, 1; L_0xa56c93ac0 .repeat 8, 8, L_0xa56c93a20; L_0xa57156440 .concat [ 32 8 0 0], L_0xa571563a0, L_0xa56c93ac0; L_0xa56c5b160 .arith/sum 40, L_0xa568543b8, L_0xa57156440; S_0xa5713d200 .scope generate, "GEN_NEURON[1]" "GEN_NEURON[1]" 4 35, 4 35 0, S_0x1015ce6d0; .timescale 0 0; P_0xa56c067c0 .param/l "n" 1 4 35, +C4<01>; S_0xa5713d380 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0xa5713d200; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "rst"; .port_info 2 /INPUT 1 "start"; .port_info 3 /INPUT 512 "x_bus"; .port_info 4 /INPUT 512 "w_bus"; .port_info 5 /INPUT 16 "bias"; .port_info 6 /OUTPUT 16 "y"; .port_info 7 /OUTPUT 1 "busy"; .port_info 8 /OUTPUT 1 "done"; P_0x1015c5720 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>; P_0x1015c5760 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>; P_0x1015c57a0 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>; P_0x1015c57e0 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000100>; P_0x1015c5820 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000010>; P_0x1015c5860 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>; P_0x1015c58a0 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>; L_0x1015ccf70 .functor BUFZ 16, L_0xa56cd5720, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>; v0xa57144c80_0 .net *"_ivl_0", 31 0, L_0xa571566c0; 1 drivers v0xa57144d20_0 .net *"_ivl_11", 31 0, L_0xa57156800; 1 drivers v0xa57144dc0_0 .net *"_ivl_14", 31 0, L_0xa571568a0; 1 drivers L_0xa56854520 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57144e60_0 .net *"_ivl_17", 29 0, L_0xa56854520; 1 drivers L_0xa56854568 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa57144f00_0 .net/2u *"_ivl_18", 31 0, L_0xa56854568; 1 drivers v0xa57144fa0_0 .net *"_ivl_21", 31 0, L_0xa57156940; 1 drivers L_0xa568545b0 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa57145040_0 .net/2u *"_ivl_22", 31 0, L_0xa568545b0; 1 drivers v0xa571450e0_0 .net *"_ivl_25", 31 0, L_0xa571569e0; 1 drivers L_0xa56854448 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57145180_0 .net *"_ivl_3", 29 0, L_0xa56854448; 1 drivers v0xa57145220_0 .net *"_ivl_31", 0 0, L_0xa56cd5400; 1 drivers v0xa571452c0_0 .net *"_ivl_33", 23 0, L_0xa56cd54a0; 1 drivers v0xa57145360_0 .net *"_ivl_36", 39 0, L_0xa57157f20; 1 drivers v0xa57145400_0 .net *"_ivl_38", 31 0, L_0xa56cd5540; 1 drivers L_0xa56854490 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa571454a0_0 .net/2u *"_ivl_4", 31 0, L_0xa56854490; 1 drivers L_0xa56854838 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>; v0xa57145540_0 .net *"_ivl_40", 7 0, L_0xa56854838; 1 drivers v0xa571455e0_0 .net *"_ivl_46", 31 0, L_0xa56cd55e0; 1 drivers v0xa57145680_0 .net *"_ivl_7", 31 0, L_0xa57156760; 1 drivers L_0xa568544d8 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa57145720_0 .net/2u *"_ivl_8", 31 0, L_0xa568544d8; 1 drivers v0xa571457c0_0 .var/s "acc", 39 0; v0xa57145860_0 .net/s "acc_next", 39 0, L_0xa56c5b840; 1 drivers v0xa57145900_0 .net/s "bias", 15 0, L_0xa56cd5720; 1 drivers v0xa571459a0_0 .net/s "bias_ext", 39 0, L_0xa57157e80; 1 drivers v0xa57145a40_0 .net/s "bias_ext_small", 15 0, L_0x1015ccf70; 1 drivers v0xa57145ae0_0 .var "busy", 0 0; v0xa57145b80_0 .net "clk", 0 0, v0xa571546e0_0; alias, 1 drivers v0xa57145c20_0 .var "done", 0 0; v0xa57145cc0_0 .net/s "final_acc", 39 0, L_0xa56c5b8e0; 1 drivers v0xa57145d60_0 .net/s "final_value", 39 0, L_0xa57158000; 1 drivers v0xa57145e00_0 .var "group_index", 1 0; v0xa57145ea0_0 .net "rst", 0 0, v0xa57154a00_0; alias, 1 drivers v0xa57145f40_0 .net "start", 0 0, v0xa57154aa0_0; alias, 1 drivers v0xa57145fe0_0 .net/s "w_bus", 511 0, L_0xa56cd5680; 1 drivers v0xa57146080_0 .net/s "w_group", 127 0, L_0xa56c86bc0; 1 drivers v0xa57146120_0 .net/s "x_bus", 511 0, v0xa57154be0_0; alias, 1 drivers v0xa571461c0_0 .net/s "x_group", 127 0, L_0xa56c601e0; 1 drivers v0xa57146260_0 .var/s "y", 15 0; L_0xa571566c0 .concat [ 2 30 0 0], v0xa57145e00_0, L_0xa56854448; L_0xa57156760 .arith/mult 32, L_0xa571566c0, L_0xa56854490; L_0xa57156800 .arith/mult 32, L_0xa57156760, L_0xa568544d8; L_0xa56c601e0 .part/v v0xa57154be0_0, L_0xa57156800, 128; L_0xa571568a0 .concat [ 2 30 0 0], v0xa57145e00_0, L_0xa56854520; L_0xa57156940 .arith/mult 32, L_0xa571568a0, L_0xa56854568; L_0xa571569e0 .arith/mult 32, L_0xa57156940, L_0xa568545b0; L_0xa56c86bc0 .part/v L_0xa56cd5680, L_0xa571569e0, 128; L_0xa56cd5400 .part L_0x1015ccf70, 15, 1; L_0xa56cd54a0 .repeat 24, 24, L_0xa56cd5400; L_0xa57157e80 .concat [ 16 24 0 0], L_0x1015ccf70, L_0xa56cd54a0; L_0xa56cd5540 .part L_0xa57157e80, 0, 32; L_0xa57157f20 .concat [ 8 32 0 0], L_0xa56854838, L_0xa56cd5540; L_0xa56c5b8e0 .arith/sum 40, L_0xa56c5b840, L_0xa57157f20; L_0xa56cd55e0 .part L_0xa56c5b8e0, 8, 32; L_0xa57158000 .extend/s 40, L_0xa56cd55e0; S_0xa5713d500 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0xa5713d380; .timescale 0 0; .port_info 0 /INPUT 128 "x_bus"; .port_info 1 /INPUT 128 "w_bus"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8240 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>; P_0xa56cc8280 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>; P_0xa56cc82c0 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>; v0xa57144820_0 .net/s "acc_in", 39 0, v0xa571457c0_0; 1 drivers v0xa571448c0_0 .net/s "acc_out", 39 0, L_0xa56c5b840; alias, 1 drivers v0xa57144960_0 .var/i "j", 31 0; v0xa57144a00 .array "products", 7 0; v0xa57144a00_0 .net/s v0xa57144a00 0, 39 0, L_0xa56c5b340; 1 drivers v0xa57144a00_1 .net/s v0xa57144a00 1, 39 0, L_0xa56c5b3e0; 1 drivers v0xa57144a00_2 .net/s v0xa57144a00 2, 39 0, L_0xa56c5b480; 1 drivers v0xa57144a00_3 .net/s v0xa57144a00 3, 39 0, L_0xa56c5b520; 1 drivers v0xa57144a00_4 .net/s v0xa57144a00 4, 39 0, L_0xa56c5b5c0; 1 drivers v0xa57144a00_5 .net/s v0xa57144a00 5, 39 0, L_0xa56c5b660; 1 drivers v0xa57144a00_6 .net/s v0xa57144a00 6, 39 0, L_0xa56c5b700; 1 drivers v0xa57144a00_7 .net/s v0xa57144a00 7, 39 0, L_0xa56c5b7a0; 1 drivers v0xa57144aa0_0 .var/s "sum", 39 0; v0xa57144b40_0 .net/s "w_bus", 127 0, L_0xa56c86bc0; alias, 1 drivers v0xa57144be0_0 .net/s "x_bus", 127 0, L_0xa56c601e0; alias, 1 drivers E_0xa56ca2880/0 .event anyedge, v0xa57144aa0_0, v0xa57141900_0, v0xa57141f40_0, v0xa57142580_0; E_0xa56ca2880/1 .event anyedge, v0xa57142bc0_0, v0xa57143200_0, v0xa57143840_0, v0xa57143e80_0; E_0xa56ca2880/2 .event anyedge, v0xa57144500_0; E_0xa56ca2880 .event/or E_0xa56ca2880/0, E_0xa56ca2880/1, E_0xa56ca2880/2; L_0xa56cd40a0 .part L_0xa56c601e0, 0, 16; L_0xa56cd4140 .part L_0xa56c86bc0, 0, 16; L_0xa56cd4320 .part L_0xa56c601e0, 16, 16; L_0xa56cd43c0 .part L_0xa56c86bc0, 16, 16; L_0xa56cd45a0 .part L_0xa56c601e0, 32, 16; L_0xa56cd4640 .part L_0xa56c86bc0, 32, 16; L_0xa56cd4820 .part L_0xa56c601e0, 48, 16; L_0xa56cd48c0 .part L_0xa56c86bc0, 48, 16; L_0xa56cd4aa0 .part L_0xa56c601e0, 64, 16; L_0xa56cd4b40 .part L_0xa56c86bc0, 64, 16; L_0xa56cd4d20 .part L_0xa56c601e0, 80, 16; L_0xa56cd4dc0 .part L_0xa56c86bc0, 80, 16; L_0xa56cd4fa0 .part L_0xa56c601e0, 96, 16; L_0xa56cd5040 .part L_0xa56c86bc0, 96, 16; L_0xa56cd5220 .part L_0xa56c601e0, 112, 16; L_0xa56cd52c0 .part L_0xa56c86bc0, 112, 16; L_0xa56c5b840 .arith/sum 40, v0xa571457c0_0, v0xa57144aa0_0; S_0xa5713d680 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c06800 .param/l "i" 1 6 17, +C4<00>; S_0xa5713d800 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713d680; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8300 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8340 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8380 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa571415e0_0 .net/s *"_ivl_0", 31 0, L_0xa57156a80; 1 drivers v0xa57141680_0 .net/s *"_ivl_2", 31 0, L_0xa57156b20; 1 drivers v0xa57141720_0 .net *"_ivl_7", 0 0, L_0xa56c732a0; 1 drivers v0xa571417c0_0 .net *"_ivl_9", 7 0, L_0xa56cd4000; 1 drivers L_0xa568545f8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57141860_0 .net/s "acc_in", 39 0, L_0xa568545f8; 1 drivers v0xa57141900_0 .net/s "acc_out", 39 0, L_0xa56c5b340; alias, 1 drivers v0xa571419a0_0 .net/s "product", 31 0, L_0xa57156bc0; 1 drivers v0xa57141a40_0 .net/s "product_ext", 39 0, L_0xa57156c60; 1 drivers v0xa57141ae0_0 .net/s "w", 15 0, L_0xa56cd4140; 1 drivers v0xa57141b80_0 .net/s "x", 15 0, L_0xa56cd40a0; 1 drivers L_0xa57156a80 .extend/s 32, L_0xa56cd40a0; L_0xa57156b20 .extend/s 32, L_0xa56cd4140; L_0xa57156bc0 .arith/mult 32, L_0xa57156a80, L_0xa57156b20; L_0xa56c732a0 .part L_0xa57156bc0, 31, 1; L_0xa56cd4000 .repeat 8, 8, L_0xa56c732a0; L_0xa57156c60 .concat [ 32 8 0 0], L_0xa57156bc0, L_0xa56cd4000; L_0xa56c5b340 .arith/sum 40, L_0xa568545f8, L_0xa57156c60; S_0xa5713d980 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c06840 .param/l "i" 1 6 17, +C4<01>; S_0xa5713db00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713d980; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc83c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8400 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8440 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57141c20_0 .net/s *"_ivl_0", 31 0, L_0xa57156d00; 1 drivers v0xa57141cc0_0 .net/s *"_ivl_2", 31 0, L_0xa57156da0; 1 drivers v0xa57141d60_0 .net *"_ivl_7", 0 0, L_0xa56cd41e0; 1 drivers v0xa57141e00_0 .net *"_ivl_9", 7 0, L_0xa56cd4280; 1 drivers L_0xa56854640 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57141ea0_0 .net/s "acc_in", 39 0, L_0xa56854640; 1 drivers v0xa57141f40_0 .net/s "acc_out", 39 0, L_0xa56c5b3e0; alias, 1 drivers v0xa57141fe0_0 .net/s "product", 31 0, L_0xa57156e40; 1 drivers v0xa57142080_0 .net/s "product_ext", 39 0, L_0xa57156ee0; 1 drivers v0xa57142120_0 .net/s "w", 15 0, L_0xa56cd43c0; 1 drivers v0xa571421c0_0 .net/s "x", 15 0, L_0xa56cd4320; 1 drivers L_0xa57156d00 .extend/s 32, L_0xa56cd4320; L_0xa57156da0 .extend/s 32, L_0xa56cd43c0; L_0xa57156e40 .arith/mult 32, L_0xa57156d00, L_0xa57156da0; L_0xa56cd41e0 .part L_0xa57156e40, 31, 1; L_0xa56cd4280 .repeat 8, 8, L_0xa56cd41e0; L_0xa57156ee0 .concat [ 32 8 0 0], L_0xa57156e40, L_0xa56cd4280; L_0xa56c5b3e0 .arith/sum 40, L_0xa56854640, L_0xa57156ee0; S_0xa5713dc80 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c06880 .param/l "i" 1 6 17, +C4<010>; S_0xa5713de00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713dc80; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8480 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc84c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8500 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57142260_0 .net/s *"_ivl_0", 31 0, L_0xa57156f80; 1 drivers v0xa57142300_0 .net/s *"_ivl_2", 31 0, L_0xa57157020; 1 drivers v0xa571423a0_0 .net *"_ivl_7", 0 0, L_0xa56cd4460; 1 drivers v0xa57142440_0 .net *"_ivl_9", 7 0, L_0xa56cd4500; 1 drivers L_0xa56854688 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa571424e0_0 .net/s "acc_in", 39 0, L_0xa56854688; 1 drivers v0xa57142580_0 .net/s "acc_out", 39 0, L_0xa56c5b480; alias, 1 drivers v0xa57142620_0 .net/s "product", 31 0, L_0xa571570c0; 1 drivers v0xa571426c0_0 .net/s "product_ext", 39 0, L_0xa57157160; 1 drivers v0xa57142760_0 .net/s "w", 15 0, L_0xa56cd4640; 1 drivers v0xa57142800_0 .net/s "x", 15 0, L_0xa56cd45a0; 1 drivers L_0xa57156f80 .extend/s 32, L_0xa56cd45a0; L_0xa57157020 .extend/s 32, L_0xa56cd4640; L_0xa571570c0 .arith/mult 32, L_0xa57156f80, L_0xa57157020; L_0xa56cd4460 .part L_0xa571570c0, 31, 1; L_0xa56cd4500 .repeat 8, 8, L_0xa56cd4460; L_0xa57157160 .concat [ 32 8 0 0], L_0xa571570c0, L_0xa56cd4500; L_0xa56c5b480 .arith/sum 40, L_0xa56854688, L_0xa57157160; S_0xa5713df80 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c068c0 .param/l "i" 1 6 17, +C4<011>; S_0xa5713e100 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713df80; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8540 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8580 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc85c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa571428a0_0 .net/s *"_ivl_0", 31 0, L_0xa57157200; 1 drivers v0xa57142940_0 .net/s *"_ivl_2", 31 0, L_0xa571572a0; 1 drivers v0xa571429e0_0 .net *"_ivl_7", 0 0, L_0xa56cd46e0; 1 drivers v0xa57142a80_0 .net *"_ivl_9", 7 0, L_0xa56cd4780; 1 drivers L_0xa568546d0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57142b20_0 .net/s "acc_in", 39 0, L_0xa568546d0; 1 drivers v0xa57142bc0_0 .net/s "acc_out", 39 0, L_0xa56c5b520; alias, 1 drivers v0xa57142c60_0 .net/s "product", 31 0, L_0xa57157340; 1 drivers v0xa57142d00_0 .net/s "product_ext", 39 0, L_0xa571573e0; 1 drivers v0xa57142da0_0 .net/s "w", 15 0, L_0xa56cd48c0; 1 drivers v0xa57142e40_0 .net/s "x", 15 0, L_0xa56cd4820; 1 drivers L_0xa57157200 .extend/s 32, L_0xa56cd4820; L_0xa571572a0 .extend/s 32, L_0xa56cd48c0; L_0xa57157340 .arith/mult 32, L_0xa57157200, L_0xa571572a0; L_0xa56cd46e0 .part L_0xa57157340, 31, 1; L_0xa56cd4780 .repeat 8, 8, L_0xa56cd46e0; L_0xa571573e0 .concat [ 32 8 0 0], L_0xa57157340, L_0xa56cd4780; L_0xa56c5b520 .arith/sum 40, L_0xa568546d0, L_0xa571573e0; S_0xa5713e280 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c06900 .param/l "i" 1 6 17, +C4<0100>; S_0xa5713e400 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713e280; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8600 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8640 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8680 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57142ee0_0 .net/s *"_ivl_0", 31 0, L_0xa57157480; 1 drivers v0xa57142f80_0 .net/s *"_ivl_2", 31 0, L_0xa57157520; 1 drivers v0xa57143020_0 .net *"_ivl_7", 0 0, L_0xa56cd4960; 1 drivers v0xa571430c0_0 .net *"_ivl_9", 7 0, L_0xa56cd4a00; 1 drivers L_0xa56854718 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57143160_0 .net/s "acc_in", 39 0, L_0xa56854718; 1 drivers v0xa57143200_0 .net/s "acc_out", 39 0, L_0xa56c5b5c0; alias, 1 drivers v0xa571432a0_0 .net/s "product", 31 0, L_0xa571575c0; 1 drivers v0xa57143340_0 .net/s "product_ext", 39 0, L_0xa57157660; 1 drivers v0xa571433e0_0 .net/s "w", 15 0, L_0xa56cd4b40; 1 drivers v0xa57143480_0 .net/s "x", 15 0, L_0xa56cd4aa0; 1 drivers L_0xa57157480 .extend/s 32, L_0xa56cd4aa0; L_0xa57157520 .extend/s 32, L_0xa56cd4b40; L_0xa571575c0 .arith/mult 32, L_0xa57157480, L_0xa57157520; L_0xa56cd4960 .part L_0xa571575c0, 31, 1; L_0xa56cd4a00 .repeat 8, 8, L_0xa56cd4960; L_0xa57157660 .concat [ 32 8 0 0], L_0xa571575c0, L_0xa56cd4a00; L_0xa56c5b5c0 .arith/sum 40, L_0xa56854718, L_0xa57157660; S_0xa5713e580 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c06940 .param/l "i" 1 6 17, +C4<0101>; S_0xa5713e700 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713e580; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc86c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8700 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8740 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57143520_0 .net/s *"_ivl_0", 31 0, L_0xa57157700; 1 drivers v0xa571435c0_0 .net/s *"_ivl_2", 31 0, L_0xa571577a0; 1 drivers v0xa57143660_0 .net *"_ivl_7", 0 0, L_0xa56cd4be0; 1 drivers v0xa57143700_0 .net *"_ivl_9", 7 0, L_0xa56cd4c80; 1 drivers L_0xa56854760 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa571437a0_0 .net/s "acc_in", 39 0, L_0xa56854760; 1 drivers v0xa57143840_0 .net/s "acc_out", 39 0, L_0xa56c5b660; alias, 1 drivers v0xa571438e0_0 .net/s "product", 31 0, L_0xa57157840; 1 drivers v0xa57143980_0 .net/s "product_ext", 39 0, L_0xa571578e0; 1 drivers v0xa57143a20_0 .net/s "w", 15 0, L_0xa56cd4dc0; 1 drivers v0xa57143ac0_0 .net/s "x", 15 0, L_0xa56cd4d20; 1 drivers L_0xa57157700 .extend/s 32, L_0xa56cd4d20; L_0xa571577a0 .extend/s 32, L_0xa56cd4dc0; L_0xa57157840 .arith/mult 32, L_0xa57157700, L_0xa571577a0; L_0xa56cd4be0 .part L_0xa57157840, 31, 1; L_0xa56cd4c80 .repeat 8, 8, L_0xa56cd4be0; L_0xa571578e0 .concat [ 32 8 0 0], L_0xa57157840, L_0xa56cd4c80; L_0xa56c5b660 .arith/sum 40, L_0xa56854760, L_0xa571578e0; S_0xa5713e880 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c06980 .param/l "i" 1 6 17, +C4<0110>; S_0xa5713ea00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713e880; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8780 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc87c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8800 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57143b60_0 .net/s *"_ivl_0", 31 0, L_0xa57157980; 1 drivers v0xa57143c00_0 .net/s *"_ivl_2", 31 0, L_0xa57157a20; 1 drivers v0xa57143ca0_0 .net *"_ivl_7", 0 0, L_0xa56cd4e60; 1 drivers v0xa57143d40_0 .net *"_ivl_9", 7 0, L_0xa56cd4f00; 1 drivers L_0xa568547a8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57143de0_0 .net/s "acc_in", 39 0, L_0xa568547a8; 1 drivers v0xa57143e80_0 .net/s "acc_out", 39 0, L_0xa56c5b700; alias, 1 drivers v0xa57143f20_0 .net/s "product", 31 0, L_0xa57157ac0; 1 drivers v0xa57144000_0 .net/s "product_ext", 39 0, L_0xa57157b60; 1 drivers v0xa571440a0_0 .net/s "w", 15 0, L_0xa56cd5040; 1 drivers v0xa57144140_0 .net/s "x", 15 0, L_0xa56cd4fa0; 1 drivers L_0xa57157980 .extend/s 32, L_0xa56cd4fa0; L_0xa57157a20 .extend/s 32, L_0xa56cd5040; L_0xa57157ac0 .arith/mult 32, L_0xa57157980, L_0xa57157a20; L_0xa56cd4e60 .part L_0xa57157ac0, 31, 1; L_0xa56cd4f00 .repeat 8, 8, L_0xa56cd4e60; L_0xa57157b60 .concat [ 32 8 0 0], L_0xa57157ac0, L_0xa56cd4f00; L_0xa56c5b700 .arith/sum 40, L_0xa568547a8, L_0xa57157b60; S_0xa5713eb80 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0xa5713d500; .timescale 0 0; P_0xa56c069c0 .param/l "i" 1 6 17, +C4<0111>; S_0xa5713ed00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713eb80; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8840 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8880 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc88c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa571441e0_0 .net/s *"_ivl_0", 31 0, L_0xa57157c00; 1 drivers v0xa57144280_0 .net/s *"_ivl_2", 31 0, L_0xa57157ca0; 1 drivers v0xa57144320_0 .net *"_ivl_7", 0 0, L_0xa56cd50e0; 1 drivers v0xa571443c0_0 .net *"_ivl_9", 7 0, L_0xa56cd5180; 1 drivers L_0xa568547f0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57144460_0 .net/s "acc_in", 39 0, L_0xa568547f0; 1 drivers v0xa57144500_0 .net/s "acc_out", 39 0, L_0xa56c5b7a0; alias, 1 drivers v0xa571445a0_0 .net/s "product", 31 0, L_0xa57157d40; 1 drivers v0xa57144640_0 .net/s "product_ext", 39 0, L_0xa57157de0; 1 drivers v0xa571446e0_0 .net/s "w", 15 0, L_0xa56cd52c0; 1 drivers v0xa57144780_0 .net/s "x", 15 0, L_0xa56cd5220; 1 drivers L_0xa57157c00 .extend/s 32, L_0xa56cd5220; L_0xa57157ca0 .extend/s 32, L_0xa56cd52c0; L_0xa57157d40 .arith/mult 32, L_0xa57157c00, L_0xa57157ca0; L_0xa56cd50e0 .part L_0xa57157d40, 31, 1; L_0xa56cd5180 .repeat 8, 8, L_0xa56cd50e0; L_0xa57157de0 .concat [ 32 8 0 0], L_0xa57157d40, L_0xa56cd5180; L_0xa56c5b7a0 .arith/sum 40, L_0xa568547f0, L_0xa57157de0; S_0xa5713ee80 .scope generate, "GEN_NEURON[2]" "GEN_NEURON[2]" 4 35, 4 35 0, S_0x1015ce6d0; .timescale 0 0; P_0xa56c06a00 .param/l "n" 1 4 35, +C4<010>; S_0xa5713f000 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0xa5713ee80; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "rst"; .port_info 2 /INPUT 1 "start"; .port_info 3 /INPUT 512 "x_bus"; .port_info 4 /INPUT 512 "w_bus"; .port_info 5 /INPUT 16 "bias"; .port_info 6 /OUTPUT 16 "y"; .port_info 7 /OUTPUT 1 "busy"; .port_info 8 /OUTPUT 1 "done"; P_0x1015d36d0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>; P_0x1015d3710 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>; P_0x1015d3750 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>; P_0x1015d3790 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000100>; P_0x1015d37d0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000010>; P_0x1015d3810 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>; P_0x1015d3850 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>; L_0x1015be570 .functor BUFZ 16, L_0xa56cd70c0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>; v0xa5714d9a0_0 .net *"_ivl_0", 31 0, L_0xa571580a0; 1 drivers v0xa5714da40_0 .net *"_ivl_11", 31 0, L_0xa571581e0; 1 drivers v0xa5714dae0_0 .net *"_ivl_14", 31 0, L_0xa57158280; 1 drivers L_0xa56854958 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714db80_0 .net *"_ivl_17", 29 0, L_0xa56854958; 1 drivers L_0xa568549a0 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa5714dc20_0 .net/2u *"_ivl_18", 31 0, L_0xa568549a0; 1 drivers v0xa5714dcc0_0 .net *"_ivl_21", 31 0, L_0xa57158320; 1 drivers L_0xa568549e8 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa5714dd60_0 .net/2u *"_ivl_22", 31 0, L_0xa568549e8; 1 drivers v0xa5714de00_0 .net *"_ivl_25", 31 0, L_0xa571583c0; 1 drivers L_0xa56854880 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714dea0_0 .net *"_ivl_3", 29 0, L_0xa56854880; 1 drivers v0xa5714df40_0 .net *"_ivl_31", 0 0, L_0xa56cd6da0; 1 drivers v0xa5714dfe0_0 .net *"_ivl_33", 23 0, L_0xa56cd6e40; 1 drivers v0xa5714e080_0 .net *"_ivl_36", 39 0, L_0xa57159900; 1 drivers v0xa5714e120_0 .net *"_ivl_38", 31 0, L_0xa56cd6ee0; 1 drivers L_0xa568548c8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa5714e1c0_0 .net/2u *"_ivl_4", 31 0, L_0xa568548c8; 1 drivers L_0xa56854c70 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>; v0xa5714e260_0 .net *"_ivl_40", 7 0, L_0xa56854c70; 1 drivers v0xa5714e300_0 .net *"_ivl_46", 31 0, L_0xa56cd6f80; 1 drivers v0xa5714e3a0_0 .net *"_ivl_7", 31 0, L_0xa57158140; 1 drivers L_0xa56854910 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa5714e440_0 .net/2u *"_ivl_8", 31 0, L_0xa56854910; 1 drivers v0xa5714e4e0_0 .var/s "acc", 39 0; v0xa5714e580_0 .net/s "acc_next", 39 0, L_0xa56c5be80; 1 drivers v0xa5714e620_0 .net/s "bias", 15 0, L_0xa56cd70c0; 1 drivers v0xa5714e6c0_0 .net/s "bias_ext", 39 0, L_0xa57159860; 1 drivers v0xa5714e760_0 .net/s "bias_ext_small", 15 0, L_0x1015be570; 1 drivers v0xa5714e800_0 .var "busy", 0 0; v0xa5714e8a0_0 .net "clk", 0 0, v0xa571546e0_0; alias, 1 drivers v0xa5714e940_0 .var "done", 0 0; v0xa5714e9e0_0 .net/s "final_acc", 39 0, L_0xa56c5bf20; 1 drivers v0xa5714ea80_0 .net/s "final_value", 39 0, L_0xa571599a0; 1 drivers v0xa5714eb20_0 .var "group_index", 1 0; v0xa5714ebc0_0 .net "rst", 0 0, v0xa57154a00_0; alias, 1 drivers v0xa5714ec60_0 .net "start", 0 0, v0xa57154aa0_0; alias, 1 drivers v0xa5714ed00_0 .net/s "w_bus", 511 0, L_0xa56cd7020; 1 drivers v0xa5714eda0_0 .net/s "w_group", 127 0, L_0xa56cd5860; 1 drivers v0xa5714ee40_0 .net/s "x_bus", 511 0, v0xa57154be0_0; alias, 1 drivers v0xa5714eee0_0 .net/s "x_group", 127 0, L_0xa56cd57c0; 1 drivers v0xa5714ef80_0 .var/s "y", 15 0; L_0xa571580a0 .concat [ 2 30 0 0], v0xa5714eb20_0, L_0xa56854880; L_0xa57158140 .arith/mult 32, L_0xa571580a0, L_0xa568548c8; L_0xa571581e0 .arith/mult 32, L_0xa57158140, L_0xa56854910; L_0xa56cd57c0 .part/v v0xa57154be0_0, L_0xa571581e0, 128; L_0xa57158280 .concat [ 2 30 0 0], v0xa5714eb20_0, L_0xa56854958; L_0xa57158320 .arith/mult 32, L_0xa57158280, L_0xa568549a0; L_0xa571583c0 .arith/mult 32, L_0xa57158320, L_0xa568549e8; L_0xa56cd5860 .part/v L_0xa56cd7020, L_0xa571583c0, 128; L_0xa56cd6da0 .part L_0x1015be570, 15, 1; L_0xa56cd6e40 .repeat 24, 24, L_0xa56cd6da0; L_0xa57159860 .concat [ 16 24 0 0], L_0x1015be570, L_0xa56cd6e40; L_0xa56cd6ee0 .part L_0xa57159860, 0, 32; L_0xa57159900 .concat [ 8 32 0 0], L_0xa56854c70, L_0xa56cd6ee0; L_0xa56c5bf20 .arith/sum 40, L_0xa56c5be80, L_0xa57159900; L_0xa56cd6f80 .part L_0xa56c5bf20, 8, 32; L_0xa571599a0 .extend/s 40, L_0xa56cd6f80; S_0xa5713f180 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0xa5713f000; .timescale 0 0; .port_info 0 /INPUT 128 "x_bus"; .port_info 1 /INPUT 128 "w_bus"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8900 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>; P_0xa56cc8940 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>; P_0xa56cc8980 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>; v0xa5714d540_0 .net/s "acc_in", 39 0, v0xa5714e4e0_0; 1 drivers v0xa5714d5e0_0 .net/s "acc_out", 39 0, L_0xa56c5be80; alias, 1 drivers v0xa5714d680_0 .var/i "j", 31 0; v0xa5714d720 .array "products", 7 0; v0xa5714d720_0 .net/s v0xa5714d720 0, 39 0, L_0xa56c5b980; 1 drivers v0xa5714d720_1 .net/s v0xa5714d720 1, 39 0, L_0xa56c5ba20; 1 drivers v0xa5714d720_2 .net/s v0xa5714d720 2, 39 0, L_0xa56c5bac0; 1 drivers v0xa5714d720_3 .net/s v0xa5714d720 3, 39 0, L_0xa56c5bb60; 1 drivers v0xa5714d720_4 .net/s v0xa5714d720 4, 39 0, L_0xa56c5bc00; 1 drivers v0xa5714d720_5 .net/s v0xa5714d720 5, 39 0, L_0xa56c5bca0; 1 drivers v0xa5714d720_6 .net/s v0xa5714d720 6, 39 0, L_0xa56c5bd40; 1 drivers v0xa5714d720_7 .net/s v0xa5714d720 7, 39 0, L_0xa56c5bde0; 1 drivers v0xa5714d7c0_0 .var/s "sum", 39 0; v0xa5714d860_0 .net/s "w_bus", 127 0, L_0xa56cd5860; alias, 1 drivers v0xa5714d900_0 .net/s "x_bus", 127 0, L_0xa56cd57c0; alias, 1 drivers E_0xa56ca2b40/0 .event anyedge, v0xa5714d7c0_0, v0xa57146620_0, v0xa57146c60_0, v0xa571472a0_0; E_0xa56ca2b40/1 .event anyedge, v0xa571478e0_0, v0xa57147f20_0, v0xa5714c5a0_0, v0xa5714cbe0_0; E_0xa56ca2b40/2 .event anyedge, v0xa5714d220_0; E_0xa56ca2b40 .event/or E_0xa56ca2b40/0, E_0xa56ca2b40/1, E_0xa56ca2b40/2; L_0xa56cd5a40 .part L_0xa56cd57c0, 0, 16; L_0xa56cd5ae0 .part L_0xa56cd5860, 0, 16; L_0xa56cd5cc0 .part L_0xa56cd57c0, 16, 16; L_0xa56cd5d60 .part L_0xa56cd5860, 16, 16; L_0xa56cd5f40 .part L_0xa56cd57c0, 32, 16; L_0xa56cd5fe0 .part L_0xa56cd5860, 32, 16; L_0xa56cd61c0 .part L_0xa56cd57c0, 48, 16; L_0xa56cd6260 .part L_0xa56cd5860, 48, 16; L_0xa56cd6440 .part L_0xa56cd57c0, 64, 16; L_0xa56cd64e0 .part L_0xa56cd5860, 64, 16; L_0xa56cd66c0 .part L_0xa56cd57c0, 80, 16; L_0xa56cd6760 .part L_0xa56cd5860, 80, 16; L_0xa56cd6940 .part L_0xa56cd57c0, 96, 16; L_0xa56cd69e0 .part L_0xa56cd5860, 96, 16; L_0xa56cd6bc0 .part L_0xa56cd57c0, 112, 16; L_0xa56cd6c60 .part L_0xa56cd5860, 112, 16; L_0xa56c5be80 .arith/sum 40, v0xa5714e4e0_0, v0xa5714d7c0_0; S_0xa5713f300 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06a40 .param/l "i" 1 6 17, +C4<00>; S_0xa5713f480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713f300; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc89c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8a00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8a40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57146300_0 .net/s *"_ivl_0", 31 0, L_0xa57158460; 1 drivers v0xa571463a0_0 .net/s *"_ivl_2", 31 0, L_0xa57158500; 1 drivers v0xa57146440_0 .net *"_ivl_7", 0 0, L_0xa56cd5900; 1 drivers v0xa571464e0_0 .net *"_ivl_9", 7 0, L_0xa56cd59a0; 1 drivers L_0xa56854a30 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57146580_0 .net/s "acc_in", 39 0, L_0xa56854a30; 1 drivers v0xa57146620_0 .net/s "acc_out", 39 0, L_0xa56c5b980; alias, 1 drivers v0xa571466c0_0 .net/s "product", 31 0, L_0xa571585a0; 1 drivers v0xa57146760_0 .net/s "product_ext", 39 0, L_0xa57158640; 1 drivers v0xa57146800_0 .net/s "w", 15 0, L_0xa56cd5ae0; 1 drivers v0xa571468a0_0 .net/s "x", 15 0, L_0xa56cd5a40; 1 drivers L_0xa57158460 .extend/s 32, L_0xa56cd5a40; L_0xa57158500 .extend/s 32, L_0xa56cd5ae0; L_0xa571585a0 .arith/mult 32, L_0xa57158460, L_0xa57158500; L_0xa56cd5900 .part L_0xa571585a0, 31, 1; L_0xa56cd59a0 .repeat 8, 8, L_0xa56cd5900; L_0xa57158640 .concat [ 32 8 0 0], L_0xa571585a0, L_0xa56cd59a0; L_0xa56c5b980 .arith/sum 40, L_0xa56854a30, L_0xa57158640; S_0xa5713f600 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06a80 .param/l "i" 1 6 17, +C4<01>; S_0xa5713f780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713f600; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8a80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8ac0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8b00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57146940_0 .net/s *"_ivl_0", 31 0, L_0xa571586e0; 1 drivers v0xa571469e0_0 .net/s *"_ivl_2", 31 0, L_0xa57158780; 1 drivers v0xa57146a80_0 .net *"_ivl_7", 0 0, L_0xa56cd5b80; 1 drivers v0xa57146b20_0 .net *"_ivl_9", 7 0, L_0xa56cd5c20; 1 drivers L_0xa56854a78 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57146bc0_0 .net/s "acc_in", 39 0, L_0xa56854a78; 1 drivers v0xa57146c60_0 .net/s "acc_out", 39 0, L_0xa56c5ba20; alias, 1 drivers v0xa57146d00_0 .net/s "product", 31 0, L_0xa57158820; 1 drivers v0xa57146da0_0 .net/s "product_ext", 39 0, L_0xa571588c0; 1 drivers v0xa57146e40_0 .net/s "w", 15 0, L_0xa56cd5d60; 1 drivers v0xa57146ee0_0 .net/s "x", 15 0, L_0xa56cd5cc0; 1 drivers L_0xa571586e0 .extend/s 32, L_0xa56cd5cc0; L_0xa57158780 .extend/s 32, L_0xa56cd5d60; L_0xa57158820 .arith/mult 32, L_0xa571586e0, L_0xa57158780; L_0xa56cd5b80 .part L_0xa57158820, 31, 1; L_0xa56cd5c20 .repeat 8, 8, L_0xa56cd5b80; L_0xa571588c0 .concat [ 32 8 0 0], L_0xa57158820, L_0xa56cd5c20; L_0xa56c5ba20 .arith/sum 40, L_0xa56854a78, L_0xa571588c0; S_0xa5713f900 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06ac0 .param/l "i" 1 6 17, +C4<010>; S_0xa5713fa80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713f900; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8b40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8b80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8bc0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57146f80_0 .net/s *"_ivl_0", 31 0, L_0xa57158960; 1 drivers v0xa57147020_0 .net/s *"_ivl_2", 31 0, L_0xa57158a00; 1 drivers v0xa571470c0_0 .net *"_ivl_7", 0 0, L_0xa56cd5e00; 1 drivers v0xa57147160_0 .net *"_ivl_9", 7 0, L_0xa56cd5ea0; 1 drivers L_0xa56854ac0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57147200_0 .net/s "acc_in", 39 0, L_0xa56854ac0; 1 drivers v0xa571472a0_0 .net/s "acc_out", 39 0, L_0xa56c5bac0; alias, 1 drivers v0xa57147340_0 .net/s "product", 31 0, L_0xa57158aa0; 1 drivers v0xa571473e0_0 .net/s "product_ext", 39 0, L_0xa57158b40; 1 drivers v0xa57147480_0 .net/s "w", 15 0, L_0xa56cd5fe0; 1 drivers v0xa57147520_0 .net/s "x", 15 0, L_0xa56cd5f40; 1 drivers L_0xa57158960 .extend/s 32, L_0xa56cd5f40; L_0xa57158a00 .extend/s 32, L_0xa56cd5fe0; L_0xa57158aa0 .arith/mult 32, L_0xa57158960, L_0xa57158a00; L_0xa56cd5e00 .part L_0xa57158aa0, 31, 1; L_0xa56cd5ea0 .repeat 8, 8, L_0xa56cd5e00; L_0xa57158b40 .concat [ 32 8 0 0], L_0xa57158aa0, L_0xa56cd5ea0; L_0xa56c5bac0 .arith/sum 40, L_0xa56854ac0, L_0xa57158b40; S_0xa5713fc00 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06b00 .param/l "i" 1 6 17, +C4<011>; S_0xa5713fd80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5713fc00; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8c00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8c40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8c80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa571475c0_0 .net/s *"_ivl_0", 31 0, L_0xa57158be0; 1 drivers v0xa57147660_0 .net/s *"_ivl_2", 31 0, L_0xa57158c80; 1 drivers v0xa57147700_0 .net *"_ivl_7", 0 0, L_0xa56cd6080; 1 drivers v0xa571477a0_0 .net *"_ivl_9", 7 0, L_0xa56cd6120; 1 drivers L_0xa56854b08 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57147840_0 .net/s "acc_in", 39 0, L_0xa56854b08; 1 drivers v0xa571478e0_0 .net/s "acc_out", 39 0, L_0xa56c5bb60; alias, 1 drivers v0xa57147980_0 .net/s "product", 31 0, L_0xa57158d20; 1 drivers v0xa57147a20_0 .net/s "product_ext", 39 0, L_0xa57158dc0; 1 drivers v0xa57147ac0_0 .net/s "w", 15 0, L_0xa56cd6260; 1 drivers v0xa57147b60_0 .net/s "x", 15 0, L_0xa56cd61c0; 1 drivers L_0xa57158be0 .extend/s 32, L_0xa56cd61c0; L_0xa57158c80 .extend/s 32, L_0xa56cd6260; L_0xa57158d20 .arith/mult 32, L_0xa57158be0, L_0xa57158c80; L_0xa56cd6080 .part L_0xa57158d20, 31, 1; L_0xa56cd6120 .repeat 8, 8, L_0xa56cd6080; L_0xa57158dc0 .concat [ 32 8 0 0], L_0xa57158d20, L_0xa56cd6120; L_0xa56c5bb60 .arith/sum 40, L_0xa56854b08, L_0xa57158dc0; S_0xa57148000 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06b40 .param/l "i" 1 6 17, +C4<0100>; S_0xa57148180 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57148000; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8cc0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8d00 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8d40 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57147c00_0 .net/s *"_ivl_0", 31 0, L_0xa57158e60; 1 drivers v0xa57147ca0_0 .net/s *"_ivl_2", 31 0, L_0xa57158f00; 1 drivers v0xa57147d40_0 .net *"_ivl_7", 0 0, L_0xa56cd6300; 1 drivers v0xa57147de0_0 .net *"_ivl_9", 7 0, L_0xa56cd63a0; 1 drivers L_0xa56854b50 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57147e80_0 .net/s "acc_in", 39 0, L_0xa56854b50; 1 drivers v0xa57147f20_0 .net/s "acc_out", 39 0, L_0xa56c5bc00; alias, 1 drivers v0xa5714c000_0 .net/s "product", 31 0, L_0xa57158fa0; 1 drivers v0xa5714c0a0_0 .net/s "product_ext", 39 0, L_0xa57159040; 1 drivers v0xa5714c140_0 .net/s "w", 15 0, L_0xa56cd64e0; 1 drivers v0xa5714c1e0_0 .net/s "x", 15 0, L_0xa56cd6440; 1 drivers L_0xa57158e60 .extend/s 32, L_0xa56cd6440; L_0xa57158f00 .extend/s 32, L_0xa56cd64e0; L_0xa57158fa0 .arith/mult 32, L_0xa57158e60, L_0xa57158f00; L_0xa56cd6300 .part L_0xa57158fa0, 31, 1; L_0xa56cd63a0 .repeat 8, 8, L_0xa56cd6300; L_0xa57159040 .concat [ 32 8 0 0], L_0xa57158fa0, L_0xa56cd63a0; L_0xa56c5bc00 .arith/sum 40, L_0xa56854b50, L_0xa57159040; S_0xa57148300 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06b80 .param/l "i" 1 6 17, +C4<0101>; S_0xa57148480 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57148300; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8d80 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8dc0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8e00 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa5714c280_0 .net/s *"_ivl_0", 31 0, L_0xa571590e0; 1 drivers v0xa5714c320_0 .net/s *"_ivl_2", 31 0, L_0xa57159180; 1 drivers v0xa5714c3c0_0 .net *"_ivl_7", 0 0, L_0xa56cd6580; 1 drivers v0xa5714c460_0 .net *"_ivl_9", 7 0, L_0xa56cd6620; 1 drivers L_0xa56854b98 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714c500_0 .net/s "acc_in", 39 0, L_0xa56854b98; 1 drivers v0xa5714c5a0_0 .net/s "acc_out", 39 0, L_0xa56c5bca0; alias, 1 drivers v0xa5714c640_0 .net/s "product", 31 0, L_0xa57159220; 1 drivers v0xa5714c6e0_0 .net/s "product_ext", 39 0, L_0xa571592c0; 1 drivers v0xa5714c780_0 .net/s "w", 15 0, L_0xa56cd6760; 1 drivers v0xa5714c820_0 .net/s "x", 15 0, L_0xa56cd66c0; 1 drivers L_0xa571590e0 .extend/s 32, L_0xa56cd66c0; L_0xa57159180 .extend/s 32, L_0xa56cd6760; L_0xa57159220 .arith/mult 32, L_0xa571590e0, L_0xa57159180; L_0xa56cd6580 .part L_0xa57159220, 31, 1; L_0xa56cd6620 .repeat 8, 8, L_0xa56cd6580; L_0xa571592c0 .concat [ 32 8 0 0], L_0xa57159220, L_0xa56cd6620; L_0xa56c5bca0 .arith/sum 40, L_0xa56854b98, L_0xa571592c0; S_0xa57148600 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06bc0 .param/l "i" 1 6 17, +C4<0110>; S_0xa57148780 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57148600; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8e40 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8e80 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8ec0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa5714c8c0_0 .net/s *"_ivl_0", 31 0, L_0xa57159360; 1 drivers v0xa5714c960_0 .net/s *"_ivl_2", 31 0, L_0xa57159400; 1 drivers v0xa5714ca00_0 .net *"_ivl_7", 0 0, L_0xa56cd6800; 1 drivers v0xa5714caa0_0 .net *"_ivl_9", 7 0, L_0xa56cd68a0; 1 drivers L_0xa56854be0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714cb40_0 .net/s "acc_in", 39 0, L_0xa56854be0; 1 drivers v0xa5714cbe0_0 .net/s "acc_out", 39 0, L_0xa56c5bd40; alias, 1 drivers v0xa5714cc80_0 .net/s "product", 31 0, L_0xa571594a0; 1 drivers v0xa5714cd20_0 .net/s "product_ext", 39 0, L_0xa57159540; 1 drivers v0xa5714cdc0_0 .net/s "w", 15 0, L_0xa56cd69e0; 1 drivers v0xa5714ce60_0 .net/s "x", 15 0, L_0xa56cd6940; 1 drivers L_0xa57159360 .extend/s 32, L_0xa56cd6940; L_0xa57159400 .extend/s 32, L_0xa56cd69e0; L_0xa571594a0 .arith/mult 32, L_0xa57159360, L_0xa57159400; L_0xa56cd6800 .part L_0xa571594a0, 31, 1; L_0xa56cd68a0 .repeat 8, 8, L_0xa56cd6800; L_0xa57159540 .concat [ 32 8 0 0], L_0xa571594a0, L_0xa56cd68a0; L_0xa56c5bd40 .arith/sum 40, L_0xa56854be0, L_0xa57159540; S_0xa57148900 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0xa5713f180; .timescale 0 0; P_0xa56c06c00 .param/l "i" 1 6 17, +C4<0111>; S_0xa57148a80 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57148900; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8f00 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc8f40 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc8f80 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa5714cf00_0 .net/s *"_ivl_0", 31 0, L_0xa571595e0; 1 drivers v0xa5714cfa0_0 .net/s *"_ivl_2", 31 0, L_0xa57159680; 1 drivers v0xa5714d040_0 .net *"_ivl_7", 0 0, L_0xa56cd6a80; 1 drivers v0xa5714d0e0_0 .net *"_ivl_9", 7 0, L_0xa56cd6b20; 1 drivers L_0xa56854c28 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714d180_0 .net/s "acc_in", 39 0, L_0xa56854c28; 1 drivers v0xa5714d220_0 .net/s "acc_out", 39 0, L_0xa56c5bde0; alias, 1 drivers v0xa5714d2c0_0 .net/s "product", 31 0, L_0xa57159720; 1 drivers v0xa5714d360_0 .net/s "product_ext", 39 0, L_0xa571597c0; 1 drivers v0xa5714d400_0 .net/s "w", 15 0, L_0xa56cd6c60; 1 drivers v0xa5714d4a0_0 .net/s "x", 15 0, L_0xa56cd6bc0; 1 drivers L_0xa571595e0 .extend/s 32, L_0xa56cd6bc0; L_0xa57159680 .extend/s 32, L_0xa56cd6c60; L_0xa57159720 .arith/mult 32, L_0xa571595e0, L_0xa57159680; L_0xa56cd6a80 .part L_0xa57159720, 31, 1; L_0xa56cd6b20 .repeat 8, 8, L_0xa56cd6a80; L_0xa571597c0 .concat [ 32 8 0 0], L_0xa57159720, L_0xa56cd6b20; L_0xa56c5bde0 .arith/sum 40, L_0xa56854c28, L_0xa571597c0; S_0xa57148c00 .scope generate, "GEN_NEURON[3]" "GEN_NEURON[3]" 4 35, 4 35 0, S_0x1015ce6d0; .timescale 0 0; P_0xa56c06c40 .param/l "n" 1 4 35, +C4<011>; S_0xa57148d80 .scope module, "u_neuron" "neuron_parallel" 4 43, 5 1 0, S_0xa57148c00; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "rst"; .port_info 2 /INPUT 1 "start"; .port_info 3 /INPUT 512 "x_bus"; .port_info 4 /INPUT 512 "w_bus"; .port_info 5 /INPUT 16 "bias"; .port_info 6 /OUTPUT 16 "y"; .port_info 7 /OUTPUT 1 "busy"; .port_info 8 /OUTPUT 1 "done"; P_0x1015d44d0 .param/l "ACC_WIDTH" 0 5 6, +C4<00000000000000000000000000101000>; P_0x1015d4510 .param/l "DATA_WIDTH" 0 5 2, +C4<00000000000000000000000000010000>; P_0x1015d4550 .param/l "FRAC_BITS" 0 5 3, +C4<00000000000000000000000000001000>; P_0x1015d4590 .param/l "GROUPS" 1 5 21, +C4<00000000000000000000000000000100>; P_0x1015d45d0 .param/l "GROUP_INDEX_WIDTH" 1 5 22, +C4<00000000000000000000000000000010>; P_0x1015d4610 .param/l "N_INPUTS" 0 5 4, +C4<00000000000000000000000000100000>; P_0x1015d4650 .param/l "PARALLEL" 0 5 5, +C4<00000000000000000000000000001000>; L_0x1015bac50 .functor BUFZ 16, L_0xa56ce0aa0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>; v0xa571526c0_0 .net *"_ivl_0", 31 0, L_0xa57159a40; 1 drivers v0xa57152760_0 .net *"_ivl_11", 31 0, L_0xa57159b80; 1 drivers v0xa57152800_0 .net *"_ivl_14", 31 0, L_0xa57159c20; 1 drivers L_0xa56854d90 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa571528a0_0 .net *"_ivl_17", 29 0, L_0xa56854d90; 1 drivers L_0xa56854dd8 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa57152940_0 .net/2u *"_ivl_18", 31 0, L_0xa56854dd8; 1 drivers v0xa571529e0_0 .net *"_ivl_21", 31 0, L_0xa57159cc0; 1 drivers L_0xa56854e20 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa57152a80_0 .net/2u *"_ivl_22", 31 0, L_0xa56854e20; 1 drivers v0xa57152b20_0 .net *"_ivl_25", 31 0, L_0xa57159d60; 1 drivers L_0xa56854cb8 .functor BUFT 1, C4<000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57152bc0_0 .net *"_ivl_3", 29 0, L_0xa56854cb8; 1 drivers v0xa57152c60_0 .net *"_ivl_31", 0 0, L_0xa56ce0780; 1 drivers v0xa57152d00_0 .net *"_ivl_33", 23 0, L_0xa56ce0820; 1 drivers v0xa57152da0_0 .net *"_ivl_36", 39 0, L_0xa5715b2a0; 1 drivers v0xa57152e40_0 .net *"_ivl_38", 31 0, L_0xa56ce08c0; 1 drivers L_0xa56854d00 .functor BUFT 1, C4<00000000000000000000000000001000>, C4<0>, C4<0>, C4<0>; v0xa57152ee0_0 .net/2u *"_ivl_4", 31 0, L_0xa56854d00; 1 drivers L_0xa568550a8 .functor BUFT 1, C4<00000000>, C4<0>, C4<0>, C4<0>; v0xa57152f80_0 .net *"_ivl_40", 7 0, L_0xa568550a8; 1 drivers v0xa57153020_0 .net *"_ivl_46", 31 0, L_0xa56ce0960; 1 drivers v0xa571530c0_0 .net *"_ivl_7", 31 0, L_0xa57159ae0; 1 drivers L_0xa56854d48 .functor BUFT 1, C4<00000000000000000000000000010000>, C4<0>, C4<0>, C4<0>; v0xa57153160_0 .net/2u *"_ivl_8", 31 0, L_0xa56854d48; 1 drivers v0xa57153200_0 .var/s "acc", 39 0; v0xa571532a0_0 .net/s "acc_next", 39 0, L_0xa56cdc500; 1 drivers v0xa57153340_0 .net/s "bias", 15 0, L_0xa56ce0aa0; 1 drivers v0xa571533e0_0 .net/s "bias_ext", 39 0, L_0xa5715b200; 1 drivers v0xa57153480_0 .net/s "bias_ext_small", 15 0, L_0x1015bac50; 1 drivers v0xa57153520_0 .var "busy", 0 0; v0xa571535c0_0 .net "clk", 0 0, v0xa571546e0_0; alias, 1 drivers v0xa57153660_0 .var "done", 0 0; v0xa57153700_0 .net/s "final_acc", 39 0, L_0xa56cdc5a0; 1 drivers v0xa571537a0_0 .net/s "final_value", 39 0, L_0xa5715b340; 1 drivers v0xa57153840_0 .var "group_index", 1 0; v0xa571538e0_0 .net "rst", 0 0, v0xa57154a00_0; alias, 1 drivers v0xa57153980_0 .net "start", 0 0, v0xa57154aa0_0; alias, 1 drivers v0xa57153a20_0 .net/s "w_bus", 511 0, L_0xa56ce0a00; 1 drivers v0xa57153ac0_0 .net/s "w_group", 127 0, L_0xa56cd7200; 1 drivers v0xa57153b60_0 .net/s "x_bus", 511 0, v0xa57154be0_0; alias, 1 drivers v0xa57153c00_0 .net/s "x_group", 127 0, L_0xa56cd7160; 1 drivers v0xa57153ca0_0 .var/s "y", 15 0; L_0xa57159a40 .concat [ 2 30 0 0], v0xa57153840_0, L_0xa56854cb8; L_0xa57159ae0 .arith/mult 32, L_0xa57159a40, L_0xa56854d00; L_0xa57159b80 .arith/mult 32, L_0xa57159ae0, L_0xa56854d48; L_0xa56cd7160 .part/v v0xa57154be0_0, L_0xa57159b80, 128; L_0xa57159c20 .concat [ 2 30 0 0], v0xa57153840_0, L_0xa56854d90; L_0xa57159cc0 .arith/mult 32, L_0xa57159c20, L_0xa56854dd8; L_0xa57159d60 .arith/mult 32, L_0xa57159cc0, L_0xa56854e20; L_0xa56cd7200 .part/v L_0xa56ce0a00, L_0xa57159d60, 128; L_0xa56ce0780 .part L_0x1015bac50, 15, 1; L_0xa56ce0820 .repeat 24, 24, L_0xa56ce0780; L_0xa5715b200 .concat [ 16 24 0 0], L_0x1015bac50, L_0xa56ce0820; L_0xa56ce08c0 .part L_0xa5715b200, 0, 32; L_0xa5715b2a0 .concat [ 8 32 0 0], L_0xa568550a8, L_0xa56ce08c0; L_0xa56cdc5a0 .arith/sum 40, L_0xa56cdc500, L_0xa5715b2a0; L_0xa56ce0960 .part L_0xa56cdc5a0, 8, 32; L_0xa5715b340 .extend/s 40, L_0xa56ce0960; S_0xa57148f00 .scope module, "u_mac8" "mac8" 5 52, 6 1 0, S_0xa57148d80; .timescale 0 0; .port_info 0 /INPUT 128 "x_bus"; .port_info 1 /INPUT 128 "w_bus"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc8fc0 .param/l "ACC_WIDTH" 0 6 3, +C4<00000000000000000000000000101000>; P_0xa56cc9000 .param/l "DATA_WIDTH" 0 6 2, +C4<00000000000000000000000000010000>; P_0xa56cc9040 .param/l "PARALLEL" 0 6 4, +C4<00000000000000000000000000001000>; v0xa57152260_0 .net/s "acc_in", 39 0, v0xa57153200_0; 1 drivers v0xa57152300_0 .net/s "acc_out", 39 0, L_0xa56cdc500; alias, 1 drivers v0xa571523a0_0 .var/i "j", 31 0; v0xa57152440 .array "products", 7 0; v0xa57152440_0 .net/s v0xa57152440 0, 39 0, L_0xa56cdc000; 1 drivers v0xa57152440_1 .net/s v0xa57152440 1, 39 0, L_0xa56cdc0a0; 1 drivers v0xa57152440_2 .net/s v0xa57152440 2, 39 0, L_0xa56cdc140; 1 drivers v0xa57152440_3 .net/s v0xa57152440 3, 39 0, L_0xa56cdc1e0; 1 drivers v0xa57152440_4 .net/s v0xa57152440 4, 39 0, L_0xa56cdc280; 1 drivers v0xa57152440_5 .net/s v0xa57152440 5, 39 0, L_0xa56cdc320; 1 drivers v0xa57152440_6 .net/s v0xa57152440 6, 39 0, L_0xa56cdc3c0; 1 drivers v0xa57152440_7 .net/s v0xa57152440 7, 39 0, L_0xa56cdc460; 1 drivers v0xa571524e0_0 .var/s "sum", 39 0; v0xa57152580_0 .net/s "w_bus", 127 0, L_0xa56cd7200; alias, 1 drivers v0xa57152620_0 .net/s "x_bus", 127 0, L_0xa56cd7160; alias, 1 drivers E_0xa56ca2e00/0 .event anyedge, v0xa571524e0_0, v0xa5714f340_0, v0xa5714f980_0, v0xa57150000_0; E_0xa56ca2e00/1 .event anyedge, v0xa57150640_0, v0xa57150c80_0, v0xa571512c0_0, v0xa57151900_0; E_0xa56ca2e00/2 .event anyedge, v0xa57151f40_0; E_0xa56ca2e00 .event/or E_0xa56ca2e00/0, E_0xa56ca2e00/1, E_0xa56ca2e00/2; L_0xa56cd73e0 .part L_0xa56cd7160, 0, 16; L_0xa56cd7480 .part L_0xa56cd7200, 0, 16; L_0xa56cd7660 .part L_0xa56cd7160, 16, 16; L_0xa56cd7700 .part L_0xa56cd7200, 16, 16; L_0xa56cd78e0 .part L_0xa56cd7160, 32, 16; L_0xa56cd7980 .part L_0xa56cd7200, 32, 16; L_0xa56cd7b60 .part L_0xa56cd7160, 48, 16; L_0xa56cd7c00 .part L_0xa56cd7200, 48, 16; L_0xa56cd7de0 .part L_0xa56cd7160, 64, 16; L_0xa56cd7e80 .part L_0xa56cd7200, 64, 16; L_0xa56ce00a0 .part L_0xa56cd7160, 80, 16; L_0xa56ce0140 .part L_0xa56cd7200, 80, 16; L_0xa56ce0320 .part L_0xa56cd7160, 96, 16; L_0xa56ce03c0 .part L_0xa56cd7200, 96, 16; L_0xa56ce05a0 .part L_0xa56cd7160, 112, 16; L_0xa56ce0640 .part L_0xa56cd7200, 112, 16; L_0xa56cdc500 .arith/sum 40, v0xa57153200_0, v0xa571524e0_0; S_0xa57149080 .scope generate, "GEN_MAC[0]" "GEN_MAC[0]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06c80 .param/l "i" 1 6 17, +C4<00>; S_0xa57149200 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57149080; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc9080 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc90c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc9100 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa5714f020_0 .net/s *"_ivl_0", 31 0, L_0xa57159e00; 1 drivers v0xa5714f0c0_0 .net/s *"_ivl_2", 31 0, L_0xa57159ea0; 1 drivers v0xa5714f160_0 .net *"_ivl_7", 0 0, L_0xa56cd72a0; 1 drivers v0xa5714f200_0 .net *"_ivl_9", 7 0, L_0xa56cd7340; 1 drivers L_0xa56854e68 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714f2a0_0 .net/s "acc_in", 39 0, L_0xa56854e68; 1 drivers v0xa5714f340_0 .net/s "acc_out", 39 0, L_0xa56cdc000; alias, 1 drivers v0xa5714f3e0_0 .net/s "product", 31 0, L_0xa57159f40; 1 drivers v0xa5714f480_0 .net/s "product_ext", 39 0, L_0xa57159fe0; 1 drivers v0xa5714f520_0 .net/s "w", 15 0, L_0xa56cd7480; 1 drivers v0xa5714f5c0_0 .net/s "x", 15 0, L_0xa56cd73e0; 1 drivers L_0xa57159e00 .extend/s 32, L_0xa56cd73e0; L_0xa57159ea0 .extend/s 32, L_0xa56cd7480; L_0xa57159f40 .arith/mult 32, L_0xa57159e00, L_0xa57159ea0; L_0xa56cd72a0 .part L_0xa57159f40, 31, 1; L_0xa56cd7340 .repeat 8, 8, L_0xa56cd72a0; L_0xa57159fe0 .concat [ 32 8 0 0], L_0xa57159f40, L_0xa56cd7340; L_0xa56cdc000 .arith/sum 40, L_0xa56854e68, L_0xa57159fe0; S_0xa57149380 .scope generate, "GEN_MAC[1]" "GEN_MAC[1]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06cc0 .param/l "i" 1 6 17, +C4<01>; S_0xa57149500 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57149380; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc9140 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc9180 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc91c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa5714f660_0 .net/s *"_ivl_0", 31 0, L_0xa5715a080; 1 drivers v0xa5714f700_0 .net/s *"_ivl_2", 31 0, L_0xa5715a120; 1 drivers v0xa5714f7a0_0 .net *"_ivl_7", 0 0, L_0xa56cd7520; 1 drivers v0xa5714f840_0 .net *"_ivl_9", 7 0, L_0xa56cd75c0; 1 drivers L_0xa56854eb0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714f8e0_0 .net/s "acc_in", 39 0, L_0xa56854eb0; 1 drivers v0xa5714f980_0 .net/s "acc_out", 39 0, L_0xa56cdc0a0; alias, 1 drivers v0xa5714fa20_0 .net/s "product", 31 0, L_0xa5715a1c0; 1 drivers v0xa5714fac0_0 .net/s "product_ext", 39 0, L_0xa5715a260; 1 drivers v0xa5714fb60_0 .net/s "w", 15 0, L_0xa56cd7700; 1 drivers v0xa5714fc00_0 .net/s "x", 15 0, L_0xa56cd7660; 1 drivers L_0xa5715a080 .extend/s 32, L_0xa56cd7660; L_0xa5715a120 .extend/s 32, L_0xa56cd7700; L_0xa5715a1c0 .arith/mult 32, L_0xa5715a080, L_0xa5715a120; L_0xa56cd7520 .part L_0xa5715a1c0, 31, 1; L_0xa56cd75c0 .repeat 8, 8, L_0xa56cd7520; L_0xa5715a260 .concat [ 32 8 0 0], L_0xa5715a1c0, L_0xa56cd75c0; L_0xa56cdc0a0 .arith/sum 40, L_0xa56854eb0, L_0xa5715a260; S_0xa57149680 .scope generate, "GEN_MAC[2]" "GEN_MAC[2]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06d00 .param/l "i" 1 6 17, +C4<010>; S_0xa57149800 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57149680; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc9200 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc9240 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc9280 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa5714fca0_0 .net/s *"_ivl_0", 31 0, L_0xa5715a300; 1 drivers v0xa5714fd40_0 .net/s *"_ivl_2", 31 0, L_0xa5715a3a0; 1 drivers v0xa5714fde0_0 .net *"_ivl_7", 0 0, L_0xa56cd77a0; 1 drivers v0xa5714fe80_0 .net *"_ivl_9", 7 0, L_0xa56cd7840; 1 drivers L_0xa56854ef8 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa5714ff20_0 .net/s "acc_in", 39 0, L_0xa56854ef8; 1 drivers v0xa57150000_0 .net/s "acc_out", 39 0, L_0xa56cdc140; alias, 1 drivers v0xa571500a0_0 .net/s "product", 31 0, L_0xa5715a440; 1 drivers v0xa57150140_0 .net/s "product_ext", 39 0, L_0xa5715a4e0; 1 drivers v0xa571501e0_0 .net/s "w", 15 0, L_0xa56cd7980; 1 drivers v0xa57150280_0 .net/s "x", 15 0, L_0xa56cd78e0; 1 drivers L_0xa5715a300 .extend/s 32, L_0xa56cd78e0; L_0xa5715a3a0 .extend/s 32, L_0xa56cd7980; L_0xa5715a440 .arith/mult 32, L_0xa5715a300, L_0xa5715a3a0; L_0xa56cd77a0 .part L_0xa5715a440, 31, 1; L_0xa56cd7840 .repeat 8, 8, L_0xa56cd77a0; L_0xa5715a4e0 .concat [ 32 8 0 0], L_0xa5715a440, L_0xa56cd7840; L_0xa56cdc140 .arith/sum 40, L_0xa56854ef8, L_0xa5715a4e0; S_0xa57149980 .scope generate, "GEN_MAC[3]" "GEN_MAC[3]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06d40 .param/l "i" 1 6 17, +C4<011>; S_0xa57149b00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57149980; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc92c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc9300 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc9340 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57150320_0 .net/s *"_ivl_0", 31 0, L_0xa5715a580; 1 drivers v0xa571503c0_0 .net/s *"_ivl_2", 31 0, L_0xa5715a620; 1 drivers v0xa57150460_0 .net *"_ivl_7", 0 0, L_0xa56cd7a20; 1 drivers v0xa57150500_0 .net *"_ivl_9", 7 0, L_0xa56cd7ac0; 1 drivers L_0xa56854f40 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa571505a0_0 .net/s "acc_in", 39 0, L_0xa56854f40; 1 drivers v0xa57150640_0 .net/s "acc_out", 39 0, L_0xa56cdc1e0; alias, 1 drivers v0xa571506e0_0 .net/s "product", 31 0, L_0xa5715a6c0; 1 drivers v0xa57150780_0 .net/s "product_ext", 39 0, L_0xa5715a760; 1 drivers v0xa57150820_0 .net/s "w", 15 0, L_0xa56cd7c00; 1 drivers v0xa571508c0_0 .net/s "x", 15 0, L_0xa56cd7b60; 1 drivers L_0xa5715a580 .extend/s 32, L_0xa56cd7b60; L_0xa5715a620 .extend/s 32, L_0xa56cd7c00; L_0xa5715a6c0 .arith/mult 32, L_0xa5715a580, L_0xa5715a620; L_0xa56cd7a20 .part L_0xa5715a6c0, 31, 1; L_0xa56cd7ac0 .repeat 8, 8, L_0xa56cd7a20; L_0xa5715a760 .concat [ 32 8 0 0], L_0xa5715a6c0, L_0xa56cd7ac0; L_0xa56cdc1e0 .arith/sum 40, L_0xa56854f40, L_0xa5715a760; S_0xa57149c80 .scope generate, "GEN_MAC[4]" "GEN_MAC[4]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06d80 .param/l "i" 1 6 17, +C4<0100>; S_0xa57149e00 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57149c80; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc9380 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc93c0 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc9400 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57150960_0 .net/s *"_ivl_0", 31 0, L_0xa5715a800; 1 drivers v0xa57150a00_0 .net/s *"_ivl_2", 31 0, L_0xa5715a8a0; 1 drivers v0xa57150aa0_0 .net *"_ivl_7", 0 0, L_0xa56cd7ca0; 1 drivers v0xa57150b40_0 .net *"_ivl_9", 7 0, L_0xa56cd7d40; 1 drivers L_0xa56854f88 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57150be0_0 .net/s "acc_in", 39 0, L_0xa56854f88; 1 drivers v0xa57150c80_0 .net/s "acc_out", 39 0, L_0xa56cdc280; alias, 1 drivers v0xa57150d20_0 .net/s "product", 31 0, L_0xa5715a940; 1 drivers v0xa57150dc0_0 .net/s "product_ext", 39 0, L_0xa5715a9e0; 1 drivers v0xa57150e60_0 .net/s "w", 15 0, L_0xa56cd7e80; 1 drivers v0xa57150f00_0 .net/s "x", 15 0, L_0xa56cd7de0; 1 drivers L_0xa5715a800 .extend/s 32, L_0xa56cd7de0; L_0xa5715a8a0 .extend/s 32, L_0xa56cd7e80; L_0xa5715a940 .arith/mult 32, L_0xa5715a800, L_0xa5715a8a0; L_0xa56cd7ca0 .part L_0xa5715a940, 31, 1; L_0xa56cd7d40 .repeat 8, 8, L_0xa56cd7ca0; L_0xa5715a9e0 .concat [ 32 8 0 0], L_0xa5715a940, L_0xa56cd7d40; L_0xa56cdc280 .arith/sum 40, L_0xa56854f88, L_0xa5715a9e0; S_0xa57149f80 .scope generate, "GEN_MAC[5]" "GEN_MAC[5]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06dc0 .param/l "i" 1 6 17, +C4<0101>; S_0xa5714a100 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa57149f80; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc9440 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc9480 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc94c0 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57150fa0_0 .net/s *"_ivl_0", 31 0, L_0xa5715aa80; 1 drivers v0xa57151040_0 .net/s *"_ivl_2", 31 0, L_0xa5715ab20; 1 drivers v0xa571510e0_0 .net *"_ivl_7", 0 0, L_0xa56cd7f20; 1 drivers v0xa57151180_0 .net *"_ivl_9", 7 0, L_0xa56ce0000; 1 drivers L_0xa56854fd0 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57151220_0 .net/s "acc_in", 39 0, L_0xa56854fd0; 1 drivers v0xa571512c0_0 .net/s "acc_out", 39 0, L_0xa56cdc320; alias, 1 drivers v0xa57151360_0 .net/s "product", 31 0, L_0xa5715abc0; 1 drivers v0xa57151400_0 .net/s "product_ext", 39 0, L_0xa5715ac60; 1 drivers v0xa571514a0_0 .net/s "w", 15 0, L_0xa56ce0140; 1 drivers v0xa57151540_0 .net/s "x", 15 0, L_0xa56ce00a0; 1 drivers L_0xa5715aa80 .extend/s 32, L_0xa56ce00a0; L_0xa5715ab20 .extend/s 32, L_0xa56ce0140; L_0xa5715abc0 .arith/mult 32, L_0xa5715aa80, L_0xa5715ab20; L_0xa56cd7f20 .part L_0xa5715abc0, 31, 1; L_0xa56ce0000 .repeat 8, 8, L_0xa56cd7f20; L_0xa5715ac60 .concat [ 32 8 0 0], L_0xa5715abc0, L_0xa56ce0000; L_0xa56cdc320 .arith/sum 40, L_0xa56854fd0, L_0xa5715ac60; S_0xa5714a280 .scope generate, "GEN_MAC[6]" "GEN_MAC[6]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06e00 .param/l "i" 1 6 17, +C4<0110>; S_0xa5714a400 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5714a280; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc9500 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc9540 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc9580 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa571515e0_0 .net/s *"_ivl_0", 31 0, L_0xa5715ad00; 1 drivers v0xa57151680_0 .net/s *"_ivl_2", 31 0, L_0xa5715ada0; 1 drivers v0xa57151720_0 .net *"_ivl_7", 0 0, L_0xa56ce01e0; 1 drivers v0xa571517c0_0 .net *"_ivl_9", 7 0, L_0xa56ce0280; 1 drivers L_0xa56855018 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57151860_0 .net/s "acc_in", 39 0, L_0xa56855018; 1 drivers v0xa57151900_0 .net/s "acc_out", 39 0, L_0xa56cdc3c0; alias, 1 drivers v0xa571519a0_0 .net/s "product", 31 0, L_0xa5715ae40; 1 drivers v0xa57151a40_0 .net/s "product_ext", 39 0, L_0xa5715aee0; 1 drivers v0xa57151ae0_0 .net/s "w", 15 0, L_0xa56ce03c0; 1 drivers v0xa57151b80_0 .net/s "x", 15 0, L_0xa56ce0320; 1 drivers L_0xa5715ad00 .extend/s 32, L_0xa56ce0320; L_0xa5715ada0 .extend/s 32, L_0xa56ce03c0; L_0xa5715ae40 .arith/mult 32, L_0xa5715ad00, L_0xa5715ada0; L_0xa56ce01e0 .part L_0xa5715ae40, 31, 1; L_0xa56ce0280 .repeat 8, 8, L_0xa56ce01e0; L_0xa5715aee0 .concat [ 32 8 0 0], L_0xa5715ae40, L_0xa56ce0280; L_0xa56cdc3c0 .arith/sum 40, L_0xa56855018, L_0xa5715aee0; S_0xa5714a580 .scope generate, "GEN_MAC[7]" "GEN_MAC[7]" 6 17, 6 17 0, S_0xa57148f00; .timescale 0 0; P_0xa56c06e40 .param/l "i" 1 6 17, +C4<0111>; S_0xa5714a700 .scope module, "u_mac" "mac_unit" 6 22, 7 1 0, S_0xa5714a580; .timescale 0 0; .port_info 0 /INPUT 16 "x"; .port_info 1 /INPUT 16 "w"; .port_info 2 /INPUT 40 "acc_in"; .port_info 3 /OUTPUT 40 "acc_out"; P_0xa56cc95c0 .param/l "ACC_WIDTH" 0 7 3, +C4<00000000000000000000000000101000>; P_0xa56cc9600 .param/l "DATA_WIDTH" 0 7 2, +C4<00000000000000000000000000010000>; P_0xa56cc9640 .param/l "PROD_WIDTH" 1 7 11, +C4<0000000000000000000000000000000000000000000000000000000000100000>; v0xa57151c20_0 .net/s *"_ivl_0", 31 0, L_0xa5715af80; 1 drivers v0xa57151cc0_0 .net/s *"_ivl_2", 31 0, L_0xa5715b020; 1 drivers v0xa57151d60_0 .net *"_ivl_7", 0 0, L_0xa56ce0460; 1 drivers v0xa57151e00_0 .net *"_ivl_9", 7 0, L_0xa56ce0500; 1 drivers L_0xa56855060 .functor BUFT 1, C4<0000000000000000000000000000000000000000>, C4<0>, C4<0>, C4<0>; v0xa57151ea0_0 .net/s "acc_in", 39 0, L_0xa56855060; 1 drivers v0xa57151f40_0 .net/s "acc_out", 39 0, L_0xa56cdc460; alias, 1 drivers v0xa57151fe0_0 .net/s "product", 31 0, L_0xa5715b0c0; 1 drivers v0xa57152080_0 .net/s "product_ext", 39 0, L_0xa5715b160; 1 drivers v0xa57152120_0 .net/s "w", 15 0, L_0xa56ce0640; 1 drivers v0xa571521c0_0 .net/s "x", 15 0, L_0xa56ce05a0; 1 drivers L_0xa5715af80 .extend/s 32, L_0xa56ce05a0; L_0xa5715b020 .extend/s 32, L_0xa56ce0640; L_0xa5715b0c0 .arith/mult 32, L_0xa5715af80, L_0xa5715b020; L_0xa56ce0460 .part L_0xa5715b0c0, 31, 1; L_0xa56ce0500 .repeat 8, 8, L_0xa56ce0460; L_0xa5715b160 .concat [ 32 8 0 0], L_0xa5715b0c0, L_0xa56ce0500; L_0xa56cdc460 .arith/sum 40, L_0xa56855060, L_0xa5715b160; S_0xa5714a880 .scope function.vec4.u16, "q8_8" "q8_8" 3 59, 3 59 0, S_0x1015cf250; .timescale -9 -12; ; Variable q8_8 is vec4 return value of scope S_0xa5714a880 v0xa57154500_0 .var/real "value", 0 0; TD_tb.q8_8 ; %load/real v0xa57154500_0; %pushi/real 1073741824, 4074; load=256.000 %mul/wr; %vpi_func 3 62 "$rtoi" 32, W<0,r> {0 1 0}; %pad/s 16; %ret/vec4 0, 0, 16; Assign to q8_8 (store_vec4_to_lval) %end; S_0xa5714aa00 .scope task, "run_layer" "run_layer" 3 66, 3 66 0, S_0x1015cf250; .timescale -9 -12; E_0xa56ca30c0 .event anyedge, v0xa57153f20_0; TD_tb.run_layer ; %wait E_0xa56ca2580; %pushi/vec4 1, 0, 1; %store/vec4 v0xa57154aa0_0, 0, 1; %wait E_0xa56ca2580; %pushi/vec4 0, 0, 1; %store/vec4 v0xa57154aa0_0, 0, 1; T_1.0 ; %load/vec4 v0xa57154780_0; %pad/u 32; %pushi/vec4 1, 0, 32; %cmp/e; %flag_get/vec4 4; %cmpi/ne 1, 0, 1; %jmp/0xz T_1.1, 6; %wait E_0xa56ca30c0; %jmp T_1.0; T_1.1 ; %wait E_0xa56ca2580; %end; .scope S_0x1015ba950; T_2 ; %wait E_0xa56ca25c0; %pushi/vec4 0, 0, 40; %store/vec4 v0xa570cbd40_0, 0, 40; %pushi/vec4 0, 0, 32; %store/vec4 v0xa570cbc00_0, 0, 32; T_2.0 ; Top of for-loop %load/vec4 v0xa570cbc00_0; %cmpi/s 8, 0, 32; %jmp/0xz T_2.1, 5; %load/vec4 v0xa570cbd40_0; %ix/getv/s 4, v0xa570cbc00_0; %load/vec4a v0xa570cbca0, 4; %add; %store/vec4 v0xa570cbd40_0, 0, 40; T_2.2 ; for-loop step statement %load/vec4 v0xa570cbc00_0; %addi 1, 0, 32; %store/vec4 v0xa570cbc00_0, 0, 32; %jmp T_2.0; T_2.1 ; for-loop exit label %jmp T_2; .thread T_2, $push; .scope S_0x1015c1ae0; T_3 ; %wait E_0xa56ca2580; %load/vec4 v0xa57141180_0; %flag_set/vec4 8; %jmp/0xz T_3.0, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa571410e0_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa57140aa0_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa57141540_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57140dc0_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57140f00_0, 0; %jmp T_3.1; T_3.0 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57140f00_0, 0; %load/vec4 v0xa57141220_0; %flag_set/vec4 9; %flag_get/vec4 9; %jmp/0 T_3.4, 9; %load/vec4 v0xa57140dc0_0; %nor/r; %and; T_3.4; %flag_set/vec4 8; %jmp/0xz T_3.2, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa571410e0_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa57140aa0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa57140dc0_0, 0; %jmp T_3.3; T_3.2 ; %load/vec4 v0xa57140dc0_0; %flag_set/vec4 8; %jmp/0xz T_3.5, 8; %load/vec4 v0xa571410e0_0; %pad/u 32; %cmpi/e 3, 0, 32; %jmp/0xz T_3.7, 4; %load/vec4 v0xa57140fa0_0; %assign/vec4 v0xa57140aa0_0, 0; %load/vec4 v0xa57141040_0; %cmpi/s 0, 0, 40; %flag_or 5, 4; %jmp/0xz T_3.9, 5; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa57141540_0, 0; %jmp T_3.10; T_3.9 ; %load/vec4 v0xa57141040_0; %cmpi/s 32767, 0, 40; %flag_or 5, 4; GT is !LE %flag_inv 5; %jmp/0xz T_3.11, 5; %pushi/vec4 32767, 0, 16; %assign/vec4 v0xa57141540_0, 0; %jmp T_3.12; T_3.11 ; %load/vec4 v0xa57141040_0; %parti/s 16, 0, 2; %assign/vec4 v0xa57141540_0, 0; T_3.12 ; T_3.10 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57140dc0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa57140f00_0, 0; %jmp T_3.8; T_3.7 ; %load/vec4 v0xa57140b40_0; %assign/vec4 v0xa57140aa0_0, 0; %load/vec4 v0xa571410e0_0; %addi 1, 0, 2; %assign/vec4 v0xa571410e0_0, 0; T_3.8 ; T_3.5 ; T_3.3 ; T_3.1 ; %jmp T_3; .thread T_3; .scope S_0xa5713d500; T_4 ; %wait E_0xa56ca2880; %pushi/vec4 0, 0, 40; %store/vec4 v0xa57144aa0_0, 0, 40; %pushi/vec4 0, 0, 32; %store/vec4 v0xa57144960_0, 0, 32; T_4.0 ; Top of for-loop %load/vec4 v0xa57144960_0; %cmpi/s 8, 0, 32; %jmp/0xz T_4.1, 5; %load/vec4 v0xa57144aa0_0; %ix/getv/s 4, v0xa57144960_0; %load/vec4a v0xa57144a00, 4; %add; %store/vec4 v0xa57144aa0_0, 0, 40; T_4.2 ; for-loop step statement %load/vec4 v0xa57144960_0; %addi 1, 0, 32; %store/vec4 v0xa57144960_0, 0, 32; %jmp T_4.0; T_4.1 ; for-loop exit label %jmp T_4; .thread T_4, $push; .scope S_0xa5713d380; T_5 ; %wait E_0xa56ca2580; %load/vec4 v0xa57145ea0_0; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa57145e00_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa571457c0_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa57146260_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57145ae0_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57145c20_0, 0; %jmp T_5.1; T_5.0 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57145c20_0, 0; %load/vec4 v0xa57145f40_0; %flag_set/vec4 9; %flag_get/vec4 9; %jmp/0 T_5.4, 9; %load/vec4 v0xa57145ae0_0; %nor/r; %and; T_5.4; %flag_set/vec4 8; %jmp/0xz T_5.2, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa57145e00_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa571457c0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa57145ae0_0, 0; %jmp T_5.3; T_5.2 ; %load/vec4 v0xa57145ae0_0; %flag_set/vec4 8; %jmp/0xz T_5.5, 8; %load/vec4 v0xa57145e00_0; %pad/u 32; %cmpi/e 3, 0, 32; %jmp/0xz T_5.7, 4; %load/vec4 v0xa57145cc0_0; %assign/vec4 v0xa571457c0_0, 0; %load/vec4 v0xa57145d60_0; %cmpi/s 0, 0, 40; %flag_or 5, 4; %jmp/0xz T_5.9, 5; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa57146260_0, 0; %jmp T_5.10; T_5.9 ; %load/vec4 v0xa57145d60_0; %cmpi/s 32767, 0, 40; %flag_or 5, 4; GT is !LE %flag_inv 5; %jmp/0xz T_5.11, 5; %pushi/vec4 32767, 0, 16; %assign/vec4 v0xa57146260_0, 0; %jmp T_5.12; T_5.11 ; %load/vec4 v0xa57145d60_0; %parti/s 16, 0, 2; %assign/vec4 v0xa57146260_0, 0; T_5.12 ; T_5.10 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57145ae0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa57145c20_0, 0; %jmp T_5.8; T_5.7 ; %load/vec4 v0xa57145860_0; %assign/vec4 v0xa571457c0_0, 0; %load/vec4 v0xa57145e00_0; %addi 1, 0, 2; %assign/vec4 v0xa57145e00_0, 0; T_5.8 ; T_5.5 ; T_5.3 ; T_5.1 ; %jmp T_5; .thread T_5; .scope S_0xa5713f180; T_6 ; %wait E_0xa56ca2b40; %pushi/vec4 0, 0, 40; %store/vec4 v0xa5714d7c0_0, 0, 40; %pushi/vec4 0, 0, 32; %store/vec4 v0xa5714d680_0, 0, 32; T_6.0 ; Top of for-loop %load/vec4 v0xa5714d680_0; %cmpi/s 8, 0, 32; %jmp/0xz T_6.1, 5; %load/vec4 v0xa5714d7c0_0; %ix/getv/s 4, v0xa5714d680_0; %load/vec4a v0xa5714d720, 4; %add; %store/vec4 v0xa5714d7c0_0, 0, 40; T_6.2 ; for-loop step statement %load/vec4 v0xa5714d680_0; %addi 1, 0, 32; %store/vec4 v0xa5714d680_0, 0, 32; %jmp T_6.0; T_6.1 ; for-loop exit label %jmp T_6; .thread T_6, $push; .scope S_0xa5713f000; T_7 ; %wait E_0xa56ca2580; %load/vec4 v0xa5714ebc0_0; %flag_set/vec4 8; %jmp/0xz T_7.0, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa5714eb20_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa5714e4e0_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa5714ef80_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa5714e800_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa5714e940_0, 0; %jmp T_7.1; T_7.0 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa5714e940_0, 0; %load/vec4 v0xa5714ec60_0; %flag_set/vec4 9; %flag_get/vec4 9; %jmp/0 T_7.4, 9; %load/vec4 v0xa5714e800_0; %nor/r; %and; T_7.4; %flag_set/vec4 8; %jmp/0xz T_7.2, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa5714eb20_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa5714e4e0_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa5714e800_0, 0; %jmp T_7.3; T_7.2 ; %load/vec4 v0xa5714e800_0; %flag_set/vec4 8; %jmp/0xz T_7.5, 8; %load/vec4 v0xa5714eb20_0; %pad/u 32; %cmpi/e 3, 0, 32; %jmp/0xz T_7.7, 4; %load/vec4 v0xa5714e9e0_0; %assign/vec4 v0xa5714e4e0_0, 0; %load/vec4 v0xa5714ea80_0; %cmpi/s 0, 0, 40; %flag_or 5, 4; %jmp/0xz T_7.9, 5; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa5714ef80_0, 0; %jmp T_7.10; T_7.9 ; %load/vec4 v0xa5714ea80_0; %cmpi/s 32767, 0, 40; %flag_or 5, 4; GT is !LE %flag_inv 5; %jmp/0xz T_7.11, 5; %pushi/vec4 32767, 0, 16; %assign/vec4 v0xa5714ef80_0, 0; %jmp T_7.12; T_7.11 ; %load/vec4 v0xa5714ea80_0; %parti/s 16, 0, 2; %assign/vec4 v0xa5714ef80_0, 0; T_7.12 ; T_7.10 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa5714e800_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa5714e940_0, 0; %jmp T_7.8; T_7.7 ; %load/vec4 v0xa5714e580_0; %assign/vec4 v0xa5714e4e0_0, 0; %load/vec4 v0xa5714eb20_0; %addi 1, 0, 2; %assign/vec4 v0xa5714eb20_0, 0; T_7.8 ; T_7.5 ; T_7.3 ; T_7.1 ; %jmp T_7; .thread T_7; .scope S_0xa57148f00; T_8 ; %wait E_0xa56ca2e00; %pushi/vec4 0, 0, 40; %store/vec4 v0xa571524e0_0, 0, 40; %pushi/vec4 0, 0, 32; %store/vec4 v0xa571523a0_0, 0, 32; T_8.0 ; Top of for-loop %load/vec4 v0xa571523a0_0; %cmpi/s 8, 0, 32; %jmp/0xz T_8.1, 5; %load/vec4 v0xa571524e0_0; %ix/getv/s 4, v0xa571523a0_0; %load/vec4a v0xa57152440, 4; %add; %store/vec4 v0xa571524e0_0, 0, 40; T_8.2 ; for-loop step statement %load/vec4 v0xa571523a0_0; %addi 1, 0, 32; %store/vec4 v0xa571523a0_0, 0, 32; %jmp T_8.0; T_8.1 ; for-loop exit label %jmp T_8; .thread T_8, $push; .scope S_0xa57148d80; T_9 ; %wait E_0xa56ca2580; %load/vec4 v0xa571538e0_0; %flag_set/vec4 8; %jmp/0xz T_9.0, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa57153840_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa57153200_0, 0; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa57153ca0_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57153520_0, 0; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57153660_0, 0; %jmp T_9.1; T_9.0 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57153660_0, 0; %load/vec4 v0xa57153980_0; %flag_set/vec4 9; %flag_get/vec4 9; %jmp/0 T_9.4, 9; %load/vec4 v0xa57153520_0; %nor/r; %and; T_9.4; %flag_set/vec4 8; %jmp/0xz T_9.2, 8; %pushi/vec4 0, 0, 2; %assign/vec4 v0xa57153840_0, 0; %pushi/vec4 0, 0, 40; %assign/vec4 v0xa57153200_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa57153520_0, 0; %jmp T_9.3; T_9.2 ; %load/vec4 v0xa57153520_0; %flag_set/vec4 8; %jmp/0xz T_9.5, 8; %load/vec4 v0xa57153840_0; %pad/u 32; %cmpi/e 3, 0, 32; %jmp/0xz T_9.7, 4; %load/vec4 v0xa57153700_0; %assign/vec4 v0xa57153200_0, 0; %load/vec4 v0xa571537a0_0; %cmpi/s 0, 0, 40; %flag_or 5, 4; %jmp/0xz T_9.9, 5; %pushi/vec4 0, 0, 16; %assign/vec4 v0xa57153ca0_0, 0; %jmp T_9.10; T_9.9 ; %load/vec4 v0xa571537a0_0; %cmpi/s 32767, 0, 40; %flag_or 5, 4; GT is !LE %flag_inv 5; %jmp/0xz T_9.11, 5; %pushi/vec4 32767, 0, 16; %assign/vec4 v0xa57153ca0_0, 0; %jmp T_9.12; T_9.11 ; %load/vec4 v0xa571537a0_0; %parti/s 16, 0, 2; %assign/vec4 v0xa57153ca0_0, 0; T_9.12 ; T_9.10 ; %pushi/vec4 0, 0, 1; %assign/vec4 v0xa57153520_0, 0; %pushi/vec4 1, 0, 1; %assign/vec4 v0xa57153660_0, 0; %jmp T_9.8; T_9.7 ; %load/vec4 v0xa571532a0_0; %assign/vec4 v0xa57153200_0, 0; %load/vec4 v0xa57153840_0; %addi 1, 0, 2; %assign/vec4 v0xa57153840_0, 0; T_9.8 ; T_9.5 ; T_9.3 ; T_9.1 ; %jmp T_9; .thread T_9; .scope S_0x1015cf250; T_10 ; %pushi/vec4 0, 0, 1; %store/vec4 v0xa571546e0_0, 0, 1; T_10.0 ; %delay 5000, 0; %load/vec4 v0xa571546e0_0; %inv; %store/vec4 v0xa571546e0_0, 0, 1; %jmp T_10.0; T_10.1 ; %end; .thread T_10; .scope S_0x1015cf250; T_11 ; %vpi_call/w 3 82 "$dumpfile", "sim/parametric.vcd" {0 0 0}; %vpi_call/w 3 83 "$dumpvars", 32'sb00000000000000000000000000000000, S_0x1015cf250 {0 0 0}; %pushi/vec4 1, 0, 1; %store/vec4 v0xa57154a00_0, 0, 1; %pushi/vec4 0, 0, 1; %store/vec4 v0xa57154aa0_0, 0, 1; %pushi/vec4 0, 0, 512; %store/vec4 v0xa57154be0_0, 0, 512; %pushi/vec4 0, 0, 2048; %store/vec4 v0xa57154b40_0, 0, 2048; %pushi/vec4 0, 0, 64; %store/vec4 v0xa571545a0_0, 0, 64; %pushi/vec4 0, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; %pushi/vec4 2, 0, 32; T_11.0 %dup/vec4; %cmpi/s 0, 0, 32; %jmp/1xz T_11.1, 5; %jmp/1 T_11.1, 4; %subi 1, 0, 32; %wait E_0xa56ca2580; %jmp T_11.0; T_11.1 ; %pop/vec4 1; %pushi/vec4 0, 0, 1; %store/vec4 v0xa57154a00_0, 0, 1; %pushi/vec4 0, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; T_11.2 ; Top of for-loop %load/vec4 v0xa57154960_0; %cmpi/s 32, 0, 32; %jmp/0xz T_11.3, 5; %pushi/real 1073741824, 4066; load=1.00000 %store/real v0xa57154500_0; %callf/vec4 TD_tb.q8_8, S_0xa5714a880; %load/vec4 v0xa57154960_0; %muli 16, 0, 32; %ix/vec4/s 4; %store/vec4 v0xa57154be0_0, 4, 16; T_11.4 ; for-loop step statement %load/vec4 v0xa57154960_0; %addi 1, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; %jmp T_11.2; T_11.3 ; for-loop exit label %pushi/vec4 0, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; T_11.5 ; Top of for-loop %load/vec4 v0xa57154960_0; %cmpi/s 32, 0, 32; %jmp/0xz T_11.6, 5; %pushi/real 1073741824, 4066; load=1.00000 %store/real v0xa57154500_0; %callf/vec4 TD_tb.q8_8, S_0xa5714a880; %pushi/vec4 0, 0, 32; %load/vec4 v0xa57154960_0; %muli 16, 0, 32; %add; %ix/vec4/s 4; %store/vec4 v0xa57154b40_0, 4, 16; T_11.7 ; for-loop step statement %load/vec4 v0xa57154960_0; %addi 1, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; %jmp T_11.5; T_11.6 ; for-loop exit label %pushi/vec4 0, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; T_11.8 ; Top of for-loop %load/vec4 v0xa57154960_0; %cmpi/s 32, 0, 32; %jmp/0xz T_11.9, 5; %pushi/real 1073741824, 4065; load=0.500000 %store/real v0xa57154500_0; %callf/vec4 TD_tb.q8_8, S_0xa5714a880; %pushi/vec4 512, 0, 32; %load/vec4 v0xa57154960_0; %muli 16, 0, 32; %add; %ix/vec4/s 4; %store/vec4 v0xa57154b40_0, 4, 16; T_11.10 ; for-loop step statement %load/vec4 v0xa57154960_0; %addi 1, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; %jmp T_11.8; T_11.9 ; for-loop exit label %pushi/vec4 0, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; T_11.11 ; Top of for-loop %load/vec4 v0xa57154960_0; %cmpi/s 32, 0, 32; %jmp/0xz T_11.12, 5; %pushi/real 1073741824, 20449; load=-0.500000 %store/real v0xa57154500_0; %callf/vec4 TD_tb.q8_8, S_0xa5714a880; %pushi/vec4 1024, 0, 32; %load/vec4 v0xa57154960_0; %muli 16, 0, 32; %add; %ix/vec4/s 4; %store/vec4 v0xa57154b40_0, 4, 16; T_11.13 ; for-loop step statement %load/vec4 v0xa57154960_0; %addi 1, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; %jmp T_11.11; T_11.12 ; for-loop exit label %pushi/vec4 0, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; T_11.14 ; Top of for-loop %load/vec4 v0xa57154960_0; %cmpi/s 32, 0, 32; %jmp/0xz T_11.15, 5; %pushi/real 1073741824, 4067; load=2.00000 %store/real v0xa57154500_0; %callf/vec4 TD_tb.q8_8, S_0xa5714a880; %pushi/vec4 1536, 0, 32; %load/vec4 v0xa57154960_0; %muli 16, 0, 32; %add; %ix/vec4/s 4; %store/vec4 v0xa57154b40_0, 4, 16; T_11.16 ; for-loop step statement %load/vec4 v0xa57154960_0; %addi 1, 0, 32; %store/vec4 v0xa57154960_0, 0, 32; %jmp T_11.14; T_11.15 ; for-loop exit label %vpi_call/w 3 192 "$display", "\000" {0 0 0}; %vpi_call/w 3 193 "$display", "========================================" {0 0 0}; %vpi_call/w 3 194 "$display", "PARAMETRIC LAYER TEST" {0 0 0}; %vpi_call/w 3 195 "$display", "N_INPUTS = %0d", P_0x1015ced50 {0 0 0}; %vpi_call/w 3 196 "$display", "N_NEURONS = %0d", P_0x1015ced90 {0 0 0}; %vpi_call/w 3 197 "$display", "PARALLEL = %0d", P_0x1015cedd0 {0 0 0}; %vpi_call/w 3 198 "$display", "========================================" {0 0 0}; %fork TD_tb.run_layer, S_0xa5714aa00; %join; %pushi/vec4 8192, 0, 32; %store/vec4 v0xa571548c0_0, 0, 32; %load/vec4 v0xa57154c80_0; %parti/s 16, 0, 2; %load/vec4 v0xa571548c0_0; %parti/s 16, 0, 2; %cmp/ne; %jmp/0xz T_11.17, 6; %vpi_call/w 3 208 "$display", "FAIL N0: got %0d expected %0d", &PV, v0xa571548c0_0 {0 0 0}; %load/vec4 v0xa57154820_0; %addi 1, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; %jmp T_11.18; T_11.17 ; %vpi_call/w 3 213 "$display", "PASS N0: %0d", &PV {0 0 0}; T_11.18 ; %pushi/vec4 4096, 0, 32; %store/vec4 v0xa571548c0_0, 0, 32; %load/vec4 v0xa57154c80_0; %parti/s 16, 16, 6; %load/vec4 v0xa571548c0_0; %parti/s 16, 0, 2; %cmp/ne; %jmp/0xz T_11.19, 6; %vpi_call/w 3 222 "$display", "FAIL N1: got %0d expected %0d", &PV, v0xa571548c0_0 {0 0 0}; %load/vec4 v0xa57154820_0; %addi 1, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; %jmp T_11.20; T_11.19 ; %vpi_call/w 3 227 "$display", "PASS N1: %0d", &PV {0 0 0}; T_11.20 ; %pushi/vec4 0, 0, 32; %store/vec4 v0xa571548c0_0, 0, 32; %load/vec4 v0xa57154c80_0; %parti/s 16, 32, 7; %cmpi/ne 0, 0, 16; %jmp/0xz T_11.21, 6; %vpi_call/w 3 237 "$display", "FAIL N2: got %0d expected 0", &PV {0 0 0}; %load/vec4 v0xa57154820_0; %addi 1, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; %jmp T_11.22; T_11.21 ; %vpi_call/w 3 242 "$display", "PASS N2: 0 (ReLU)" {0 0 0}; T_11.22 ; %pushi/vec4 16384, 0, 32; %store/vec4 v0xa571548c0_0, 0, 32; %load/vec4 v0xa571548c0_0; %cmpi/s 32767, 0, 32; %flag_or 5, 4; GT is !LE %flag_inv 5; %jmp/0xz T_11.23, 5; %pushi/vec4 32767, 0, 32; %store/vec4 v0xa571548c0_0, 0, 32; T_11.23 ; %load/vec4 v0xa57154c80_0; %parti/s 16, 48, 7; %load/vec4 v0xa571548c0_0; %parti/s 16, 0, 2; %cmp/ne; %jmp/0xz T_11.25, 6; %vpi_call/w 3 260 "$display", "FAIL N3: got %0d expected %0d", &PV, v0xa571548c0_0 {0 0 0}; %load/vec4 v0xa57154820_0; %addi 1, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; %jmp T_11.26; T_11.25 ; %load/vec4 v0xa571548c0_0; %cmpi/e 32767, 0, 32; %jmp/0xz T_11.27, 4; %vpi_call/w 3 266 "$display", "PASS N3: %0d (saturation)", &PV {0 0 0}; %jmp T_11.28; T_11.27 ; %vpi_call/w 3 268 "$display", "PASS N3: %0d", &PV {0 0 0}; T_11.28 ; T_11.26 ; %load/vec4 v0xa57154640_0; %pad/u 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_11.29, 6; %vpi_call/w 3 329 "$display", "FAIL: busy still active" {0 0 0}; %load/vec4 v0xa57154820_0; %addi 1, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; T_11.29 ; %load/vec4 v0xa57154780_0; %pad/u 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_11.31, 6; %vpi_call/w 3 334 "$display", "FAIL: done not asserted" {0 0 0}; %load/vec4 v0xa57154820_0; %addi 1, 0, 32; %store/vec4 v0xa57154820_0, 0, 32; T_11.31 ; %vpi_call/w 3 338 "$display", "\000" {0 0 0}; %vpi_call/w 3 339 "$display", "========================================" {0 0 0}; %load/vec4 v0xa57154820_0; %cmpi/e 0, 0, 32; %jmp/0xz T_11.33, 4; %vpi_call/w 3 342 "$display", "PARAMETRIC TEST PASSED" {0 0 0}; %jmp T_11.34; T_11.33 ; %vpi_call/w 3 344 "$display", "PARAMETRIC TEST FAILED: %0d errors", v0xa57154820_0 {0 0 0}; T_11.34 ; %vpi_call/w 3 346 "$display", "========================================" {0 0 0}; %vpi_call/w 3 347 "$display", "\000" {0 0 0}; %vpi_call/w 3 349 "$finish" {0 0 0}; %end; .thread T_11; # The file index is used to find the file name in the following table. :file_names 8; "N/A"; ""; "-"; "sim/parametric_tb.v"; "rtl/layer.v"; "rtl/neuron_parallel.v"; "rtl/mac8.v"; "rtl/mac_unit.v";